1ba866cce00afdf43c2c632b7d734b7b4d623a1e
[deliverable/linux.git] / arch / x86 / kernel / fpu / core.c
1 /*
2 * Copyright (C) 1994 Linus Torvalds
3 *
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
8 #include <asm/fpu/internal.h>
9 #include <linux/hardirq.h>
10
11 /*
12 * Track whether the kernel is using the FPU state
13 * currently.
14 *
15 * This flag is used:
16 *
17 * - by IRQ context code to potentially use the FPU
18 * if it's unused.
19 *
20 * - to debug kernel_fpu_begin()/end() correctness
21 */
22 static DEFINE_PER_CPU(bool, in_kernel_fpu);
23
24 /*
25 * Track which context is using the FPU on the CPU:
26 */
27 DEFINE_PER_CPU(struct fpu *, fpu_fpregs_owner_ctx);
28
29 static void kernel_fpu_disable(void)
30 {
31 WARN_ON(this_cpu_read(in_kernel_fpu));
32 this_cpu_write(in_kernel_fpu, true);
33 }
34
35 static void kernel_fpu_enable(void)
36 {
37 WARN_ON_ONCE(!this_cpu_read(in_kernel_fpu));
38 this_cpu_write(in_kernel_fpu, false);
39 }
40
41 static bool kernel_fpu_disabled(void)
42 {
43 return this_cpu_read(in_kernel_fpu);
44 }
45
46 /*
47 * Were we in an interrupt that interrupted kernel mode?
48 *
49 * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
50 * pair does nothing at all: the thread must not have fpu (so
51 * that we don't try to save the FPU state), and TS must
52 * be set (so that the clts/stts pair does nothing that is
53 * visible in the interrupted kernel thread).
54 *
55 * Except for the eagerfpu case when we return true; in the likely case
56 * the thread has FPU but we are not going to set/clear TS.
57 */
58 static bool interrupted_kernel_fpu_idle(void)
59 {
60 if (kernel_fpu_disabled())
61 return false;
62
63 if (use_eager_fpu())
64 return true;
65
66 return !current->thread.fpu.fpregs_active && (read_cr0() & X86_CR0_TS);
67 }
68
69 /*
70 * Were we in user mode (or vm86 mode) when we were
71 * interrupted?
72 *
73 * Doing kernel_fpu_begin/end() is ok if we are running
74 * in an interrupt context from user mode - we'll just
75 * save the FPU state as required.
76 */
77 static bool interrupted_user_mode(void)
78 {
79 struct pt_regs *regs = get_irq_regs();
80 return regs && user_mode(regs);
81 }
82
83 /*
84 * Can we use the FPU in kernel mode with the
85 * whole "kernel_fpu_begin/end()" sequence?
86 *
87 * It's always ok in process context (ie "not interrupt")
88 * but it is sometimes ok even from an irq.
89 */
90 bool irq_fpu_usable(void)
91 {
92 return !in_interrupt() ||
93 interrupted_user_mode() ||
94 interrupted_kernel_fpu_idle();
95 }
96 EXPORT_SYMBOL(irq_fpu_usable);
97
98 void __kernel_fpu_begin(void)
99 {
100 struct fpu *fpu = &current->thread.fpu;
101
102 kernel_fpu_disable();
103
104 if (fpu->fpregs_active) {
105 copy_fpregs_to_fpstate(fpu);
106 } else {
107 this_cpu_write(fpu_fpregs_owner_ctx, NULL);
108 __fpregs_activate_hw();
109 }
110 }
111 EXPORT_SYMBOL(__kernel_fpu_begin);
112
113 void __kernel_fpu_end(void)
114 {
115 struct fpu *fpu = &current->thread.fpu;
116
117 if (fpu->fpregs_active) {
118 if (WARN_ON(copy_fpstate_to_fpregs(fpu)))
119 fpu__clear(fpu);
120 } else {
121 __fpregs_deactivate_hw();
122 }
123
124 kernel_fpu_enable();
125 }
126 EXPORT_SYMBOL(__kernel_fpu_end);
127
128 void kernel_fpu_begin(void)
129 {
130 preempt_disable();
131 WARN_ON_ONCE(!irq_fpu_usable());
132 __kernel_fpu_begin();
133 }
134 EXPORT_SYMBOL_GPL(kernel_fpu_begin);
135
136 void kernel_fpu_end(void)
137 {
138 __kernel_fpu_end();
139 preempt_enable();
140 }
141 EXPORT_SYMBOL_GPL(kernel_fpu_end);
142
143 /*
144 * CR0::TS save/restore functions:
145 */
146 int irq_ts_save(void)
147 {
148 /*
149 * If in process context and not atomic, we can take a spurious DNA fault.
150 * Otherwise, doing clts() in process context requires disabling preemption
151 * or some heavy lifting like kernel_fpu_begin()
152 */
153 if (!in_atomic())
154 return 0;
155
156 if (read_cr0() & X86_CR0_TS) {
157 clts();
158 return 1;
159 }
160
161 return 0;
162 }
163 EXPORT_SYMBOL_GPL(irq_ts_save);
164
165 void irq_ts_restore(int TS_state)
166 {
167 if (TS_state)
168 stts();
169 }
170 EXPORT_SYMBOL_GPL(irq_ts_restore);
171
172 /*
173 * Save the FPU state (mark it for reload if necessary):
174 *
175 * This only ever gets called for the current task.
176 */
177 void fpu__save(struct fpu *fpu)
178 {
179 WARN_ON(fpu != &current->thread.fpu);
180
181 preempt_disable();
182 if (fpu->fpregs_active) {
183 if (!copy_fpregs_to_fpstate(fpu))
184 fpregs_deactivate(fpu);
185 }
186 preempt_enable();
187 }
188 EXPORT_SYMBOL_GPL(fpu__save);
189
190 void fpstate_init(struct fpu *fpu)
191 {
192 if (!cpu_has_fpu) {
193 finit_soft_fpu(&fpu->state.soft);
194 return;
195 }
196
197 memset(&fpu->state, 0, xstate_size);
198
199 if (cpu_has_fxsr) {
200 fx_finit(&fpu->state.fxsave);
201 } else {
202 struct i387_fsave_struct *fp = &fpu->state.fsave;
203 fp->cwd = 0xffff037fu;
204 fp->swd = 0xffff0000u;
205 fp->twd = 0xffffffffu;
206 fp->fos = 0xffff0000u;
207 }
208 }
209 EXPORT_SYMBOL_GPL(fpstate_init);
210
211 /*
212 * Copy the current task's FPU state to a new task's FPU context.
213 *
214 * In the 'eager' case we just save to the destination context.
215 *
216 * In the 'lazy' case we save to the source context, mark the FPU lazy
217 * via stts() and copy the source context into the destination context.
218 */
219 static void fpu_copy(struct fpu *dst_fpu, struct fpu *src_fpu)
220 {
221 WARN_ON(src_fpu != &current->thread.fpu);
222
223 /*
224 * Don't let 'init optimized' areas of the XSAVE area
225 * leak into the child task:
226 */
227 if (use_eager_fpu())
228 memset(&dst_fpu->state.xsave, 0, xstate_size);
229
230 /*
231 * Save current FPU registers directly into the child
232 * FPU context, without any memory-to-memory copying.
233 *
234 * If the FPU context got destroyed in the process (FNSAVE
235 * done on old CPUs) then copy it back into the source
236 * context and mark the current task for lazy restore.
237 *
238 * We have to do all this with preemption disabled,
239 * mostly because of the FNSAVE case, because in that
240 * case we must not allow preemption in the window
241 * between the FNSAVE and us marking the context lazy.
242 *
243 * It shouldn't be an issue as even FNSAVE is plenty
244 * fast in terms of critical section length.
245 */
246 preempt_disable();
247 if (!copy_fpregs_to_fpstate(dst_fpu)) {
248 memcpy(&src_fpu->state, &dst_fpu->state, xstate_size);
249 fpregs_deactivate(src_fpu);
250 }
251 preempt_enable();
252 }
253
254 int fpu__copy(struct fpu *dst_fpu, struct fpu *src_fpu)
255 {
256 dst_fpu->counter = 0;
257 dst_fpu->fpregs_active = 0;
258 dst_fpu->last_cpu = -1;
259
260 if (src_fpu->fpstate_active)
261 fpu_copy(dst_fpu, src_fpu);
262
263 return 0;
264 }
265
266 /*
267 * Activate the current task's in-memory FPU context,
268 * if it has not been used before:
269 */
270 void fpu__activate_curr(struct fpu *fpu)
271 {
272 WARN_ON_ONCE(fpu != &current->thread.fpu);
273
274 if (!fpu->fpstate_active) {
275 fpstate_init(fpu);
276
277 /* Safe to do for the current task: */
278 fpu->fpstate_active = 1;
279 }
280 }
281 EXPORT_SYMBOL_GPL(fpu__activate_curr);
282
283 /*
284 * This function must be called before we modify a stopped child's
285 * fpstate.
286 *
287 * If the child has not used the FPU before then initialize its
288 * fpstate.
289 *
290 * If the child has used the FPU before then unlazy it.
291 *
292 * [ After this function call, after registers in the fpstate are
293 * modified and the child task has woken up, the child task will
294 * restore the modified FPU state from the modified context. If we
295 * didn't clear its lazy status here then the lazy in-registers
296 * state pending on its former CPU could be restored, corrupting
297 * the modifications. ]
298 *
299 * This function is also called before we read a stopped child's
300 * FPU state - to make sure it's initialized if the child has
301 * no active FPU state.
302 *
303 * TODO: A future optimization would be to skip the unlazying in
304 * the read-only case, it's not strictly necessary for
305 * read-only access to the context.
306 */
307 static void fpu__activate_stopped(struct fpu *child_fpu)
308 {
309 WARN_ON_ONCE(child_fpu == &current->thread.fpu);
310
311 if (child_fpu->fpstate_active) {
312 child_fpu->last_cpu = -1;
313 } else {
314 fpstate_init(child_fpu);
315
316 /* Safe to do for stopped child tasks: */
317 child_fpu->fpstate_active = 1;
318 }
319 }
320
321 /*
322 * 'fpu__restore()' is called to copy FPU registers from
323 * the FPU fpstate to the live hw registers and to activate
324 * access to the hardware registers, so that FPU instructions
325 * can be used afterwards.
326 *
327 * Must be called with kernel preemption disabled (for example
328 * with local interrupts disabled, as it is in the case of
329 * do_device_not_available()).
330 */
331 void fpu__restore(void)
332 {
333 struct task_struct *tsk = current;
334 struct fpu *fpu = &tsk->thread.fpu;
335
336 fpu__activate_curr(fpu);
337
338 /* Avoid __kernel_fpu_begin() right after fpregs_activate() */
339 kernel_fpu_disable();
340 fpregs_activate(fpu);
341 if (unlikely(copy_fpstate_to_fpregs(fpu))) {
342 fpu__clear(fpu);
343 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
344 } else {
345 tsk->thread.fpu.counter++;
346 }
347 kernel_fpu_enable();
348 }
349 EXPORT_SYMBOL_GPL(fpu__restore);
350
351 /*
352 * Drops current FPU state: deactivates the fpregs and
353 * the fpstate. NOTE: it still leaves previous contents
354 * in the fpregs in the eager-FPU case.
355 *
356 * This function can be used in cases where we know that
357 * a state-restore is coming: either an explicit one,
358 * or a reschedule.
359 */
360 void fpu__drop(struct fpu *fpu)
361 {
362 preempt_disable();
363 fpu->counter = 0;
364
365 if (fpu->fpregs_active) {
366 /* Ignore delayed exceptions from user space */
367 asm volatile("1: fwait\n"
368 "2:\n"
369 _ASM_EXTABLE(1b, 2b));
370 fpregs_deactivate(fpu);
371 }
372
373 fpu->fpstate_active = 0;
374
375 preempt_enable();
376 }
377
378 /*
379 * Clear the FPU state back to init state.
380 *
381 * Called by sys_execve(), by the signal handler code and by various
382 * error paths.
383 */
384 void fpu__clear(struct fpu *fpu)
385 {
386 WARN_ON_ONCE(fpu != &current->thread.fpu); /* Almost certainly an anomaly */
387
388 if (!use_eager_fpu()) {
389 /* FPU state will be reallocated lazily at the first use. */
390 fpu__drop(fpu);
391 } else {
392 if (!fpu->fpstate_active) {
393 fpu__activate_curr(fpu);
394 user_fpu_begin();
395 }
396 restore_init_xstate();
397 }
398 }
399
400 /*
401 * The xstateregs_active() routine is the same as the regset_fpregs_active() routine,
402 * as the "regset->n" for the xstate regset will be updated based on the feature
403 * capabilites supported by the xsave.
404 */
405 int regset_fpregs_active(struct task_struct *target, const struct user_regset *regset)
406 {
407 struct fpu *target_fpu = &target->thread.fpu;
408
409 return target_fpu->fpstate_active ? regset->n : 0;
410 }
411
412 int regset_xregset_fpregs_active(struct task_struct *target, const struct user_regset *regset)
413 {
414 struct fpu *target_fpu = &target->thread.fpu;
415
416 return (cpu_has_fxsr && target_fpu->fpstate_active) ? regset->n : 0;
417 }
418
419 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
420 unsigned int pos, unsigned int count,
421 void *kbuf, void __user *ubuf)
422 {
423 struct fpu *fpu = &target->thread.fpu;
424
425 if (!cpu_has_fxsr)
426 return -ENODEV;
427
428 fpu__activate_stopped(fpu);
429 fpstate_sanitize_xstate(fpu);
430
431 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
432 &fpu->state.fxsave, 0, -1);
433 }
434
435 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
436 unsigned int pos, unsigned int count,
437 const void *kbuf, const void __user *ubuf)
438 {
439 struct fpu *fpu = &target->thread.fpu;
440 int ret;
441
442 if (!cpu_has_fxsr)
443 return -ENODEV;
444
445 fpu__activate_stopped(fpu);
446 fpstate_sanitize_xstate(fpu);
447
448 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
449 &fpu->state.fxsave, 0, -1);
450
451 /*
452 * mxcsr reserved bits must be masked to zero for security reasons.
453 */
454 fpu->state.fxsave.mxcsr &= mxcsr_feature_mask;
455
456 /*
457 * update the header bits in the xsave header, indicating the
458 * presence of FP and SSE state.
459 */
460 if (cpu_has_xsave)
461 fpu->state.xsave.header.xfeatures |= XSTATE_FPSSE;
462
463 return ret;
464 }
465
466 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
467 unsigned int pos, unsigned int count,
468 void *kbuf, void __user *ubuf)
469 {
470 struct fpu *fpu = &target->thread.fpu;
471 struct xsave_struct *xsave;
472 int ret;
473
474 if (!cpu_has_xsave)
475 return -ENODEV;
476
477 fpu__activate_stopped(fpu);
478
479 xsave = &fpu->state.xsave;
480
481 /*
482 * Copy the 48bytes defined by the software first into the xstate
483 * memory layout in the thread struct, so that we can copy the entire
484 * xstateregs to the user using one user_regset_copyout().
485 */
486 memcpy(&xsave->i387.sw_reserved,
487 xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
488 /*
489 * Copy the xstate memory layout.
490 */
491 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
492 return ret;
493 }
494
495 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
496 unsigned int pos, unsigned int count,
497 const void *kbuf, const void __user *ubuf)
498 {
499 struct fpu *fpu = &target->thread.fpu;
500 struct xsave_struct *xsave;
501 int ret;
502
503 if (!cpu_has_xsave)
504 return -ENODEV;
505
506 fpu__activate_stopped(fpu);
507
508 xsave = &fpu->state.xsave;
509
510 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
511 /*
512 * mxcsr reserved bits must be masked to zero for security reasons.
513 */
514 xsave->i387.mxcsr &= mxcsr_feature_mask;
515 xsave->header.xfeatures &= xfeatures_mask;
516 /*
517 * These bits must be zero.
518 */
519 memset(&xsave->header.reserved, 0, 48);
520
521 return ret;
522 }
523
524 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
525
526 /*
527 * FPU tag word conversions.
528 */
529
530 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
531 {
532 unsigned int tmp; /* to avoid 16 bit prefixes in the code */
533
534 /* Transform each pair of bits into 01 (valid) or 00 (empty) */
535 tmp = ~twd;
536 tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
537 /* and move the valid bits to the lower byte. */
538 tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
539 tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
540 tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
541
542 return tmp;
543 }
544
545 #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16)
546 #define FP_EXP_TAG_VALID 0
547 #define FP_EXP_TAG_ZERO 1
548 #define FP_EXP_TAG_SPECIAL 2
549 #define FP_EXP_TAG_EMPTY 3
550
551 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
552 {
553 struct _fpxreg *st;
554 u32 tos = (fxsave->swd >> 11) & 7;
555 u32 twd = (unsigned long) fxsave->twd;
556 u32 tag;
557 u32 ret = 0xffff0000u;
558 int i;
559
560 for (i = 0; i < 8; i++, twd >>= 1) {
561 if (twd & 0x1) {
562 st = FPREG_ADDR(fxsave, (i - tos) & 7);
563
564 switch (st->exponent & 0x7fff) {
565 case 0x7fff:
566 tag = FP_EXP_TAG_SPECIAL;
567 break;
568 case 0x0000:
569 if (!st->significand[0] &&
570 !st->significand[1] &&
571 !st->significand[2] &&
572 !st->significand[3])
573 tag = FP_EXP_TAG_ZERO;
574 else
575 tag = FP_EXP_TAG_SPECIAL;
576 break;
577 default:
578 if (st->significand[3] & 0x8000)
579 tag = FP_EXP_TAG_VALID;
580 else
581 tag = FP_EXP_TAG_SPECIAL;
582 break;
583 }
584 } else {
585 tag = FP_EXP_TAG_EMPTY;
586 }
587 ret |= tag << (2 * i);
588 }
589 return ret;
590 }
591
592 /*
593 * FXSR floating point environment conversions.
594 */
595
596 void
597 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
598 {
599 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state.fxsave;
600 struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
601 struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
602 int i;
603
604 env->cwd = fxsave->cwd | 0xffff0000u;
605 env->swd = fxsave->swd | 0xffff0000u;
606 env->twd = twd_fxsr_to_i387(fxsave);
607
608 #ifdef CONFIG_X86_64
609 env->fip = fxsave->rip;
610 env->foo = fxsave->rdp;
611 /*
612 * should be actually ds/cs at fpu exception time, but
613 * that information is not available in 64bit mode.
614 */
615 env->fcs = task_pt_regs(tsk)->cs;
616 if (tsk == current) {
617 savesegment(ds, env->fos);
618 } else {
619 env->fos = tsk->thread.ds;
620 }
621 env->fos |= 0xffff0000;
622 #else
623 env->fip = fxsave->fip;
624 env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
625 env->foo = fxsave->foo;
626 env->fos = fxsave->fos;
627 #endif
628
629 for (i = 0; i < 8; ++i)
630 memcpy(&to[i], &from[i], sizeof(to[0]));
631 }
632
633 void convert_to_fxsr(struct task_struct *tsk,
634 const struct user_i387_ia32_struct *env)
635
636 {
637 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state.fxsave;
638 struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
639 struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
640 int i;
641
642 fxsave->cwd = env->cwd;
643 fxsave->swd = env->swd;
644 fxsave->twd = twd_i387_to_fxsr(env->twd);
645 fxsave->fop = (u16) ((u32) env->fcs >> 16);
646 #ifdef CONFIG_X86_64
647 fxsave->rip = env->fip;
648 fxsave->rdp = env->foo;
649 /* cs and ds ignored */
650 #else
651 fxsave->fip = env->fip;
652 fxsave->fcs = (env->fcs & 0xffff);
653 fxsave->foo = env->foo;
654 fxsave->fos = env->fos;
655 #endif
656
657 for (i = 0; i < 8; ++i)
658 memcpy(&to[i], &from[i], sizeof(from[0]));
659 }
660
661 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
662 unsigned int pos, unsigned int count,
663 void *kbuf, void __user *ubuf)
664 {
665 struct fpu *fpu = &target->thread.fpu;
666 struct user_i387_ia32_struct env;
667
668 fpu__activate_stopped(fpu);
669
670 if (!static_cpu_has(X86_FEATURE_FPU))
671 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
672
673 if (!cpu_has_fxsr)
674 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
675 &fpu->state.fsave, 0,
676 -1);
677
678 fpstate_sanitize_xstate(fpu);
679
680 if (kbuf && pos == 0 && count == sizeof(env)) {
681 convert_from_fxsr(kbuf, target);
682 return 0;
683 }
684
685 convert_from_fxsr(&env, target);
686
687 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
688 }
689
690 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
691 unsigned int pos, unsigned int count,
692 const void *kbuf, const void __user *ubuf)
693 {
694 struct fpu *fpu = &target->thread.fpu;
695 struct user_i387_ia32_struct env;
696 int ret;
697
698 fpu__activate_stopped(fpu);
699 fpstate_sanitize_xstate(fpu);
700
701 if (!static_cpu_has(X86_FEATURE_FPU))
702 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
703
704 if (!cpu_has_fxsr)
705 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
706 &fpu->state.fsave, 0,
707 -1);
708
709 if (pos > 0 || count < sizeof(env))
710 convert_from_fxsr(&env, target);
711
712 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
713 if (!ret)
714 convert_to_fxsr(target, &env);
715
716 /*
717 * update the header bit in the xsave header, indicating the
718 * presence of FP.
719 */
720 if (cpu_has_xsave)
721 fpu->state.xsave.header.xfeatures |= XSTATE_FP;
722 return ret;
723 }
724
725 /*
726 * FPU state for core dumps.
727 * This is only used for a.out dumps now.
728 * It is declared generically using elf_fpregset_t (which is
729 * struct user_i387_struct) but is in fact only used for 32-bit
730 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
731 */
732 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *ufpu)
733 {
734 struct task_struct *tsk = current;
735 struct fpu *fpu = &tsk->thread.fpu;
736 int fpvalid;
737
738 fpvalid = fpu->fpstate_active;
739 if (fpvalid)
740 fpvalid = !fpregs_get(tsk, NULL,
741 0, sizeof(struct user_i387_ia32_struct),
742 ufpu, NULL);
743
744 return fpvalid;
745 }
746 EXPORT_SYMBOL(dump_fpu);
747
748 #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */
This page took 0.044118 seconds and 4 git commands to generate.