arch/x86/kernel/fpu/core.c

   1 /*
   2  *  Copyright (C) 1994 Linus Torvalds
   3  *
   4  *  Pentium III FXSR, SSE support
   5  *  General FPU state handling cleanups
   6  *      Gareth Hughes <gareth@valinux.com>, May 2000
   7  */
   8 #include <asm/fpu/internal.h>
   9 #include <linux/hardirq.h>
  10
  11 /*
  12  * Track whether the kernel is using the FPU state
  13  * currently.
  14  *
  15  * This flag is used:
  16  *
  17  *   - by IRQ context code to potentially use the FPU
  18  *     if it's unused.
  19  *
  20  *   - to debug kernel_fpu_begin()/end() correctness
  21  */
  22 static DEFINE_PER_CPU(bool, in_kernel_fpu);
  23
  24 /*
  25  * Track which context is using the FPU on the CPU:
  26  */
  27 DEFINE_PER_CPU(struct fpu *, fpu_fpregs_owner_ctx);
  28
  29 static void kernel_fpu_disable(void)
  30 {
  31         WARN_ON(this_cpu_read(in_kernel_fpu));
  32         this_cpu_write(in_kernel_fpu, true);
  33 }
  34
  35 static void kernel_fpu_enable(void)
  36 {
  37         WARN_ON_ONCE(!this_cpu_read(in_kernel_fpu));
  38         this_cpu_write(in_kernel_fpu, false);
  39 }
  40
  41 static bool kernel_fpu_disabled(void)
  42 {
  43         return this_cpu_read(in_kernel_fpu);
  44 }
  45
  46 /*
  47  * Were we in an interrupt that interrupted kernel mode?
  48  *
  49  * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
  50  * pair does nothing at all: the thread must not have fpu (so
  51  * that we don't try to save the FPU state), and TS must
  52  * be set (so that the clts/stts pair does nothing that is
  53  * visible in the interrupted kernel thread).
  54  *
  55  * Except for the eagerfpu case when we return true; in the likely case
  56  * the thread has FPU but we are not going to set/clear TS.
  57  */
  58 static bool interrupted_kernel_fpu_idle(void)
  59 {
  60         if (kernel_fpu_disabled())
  61                 return false;
  62
  63         if (use_eager_fpu())
  64                 return true;
  65
  66         return !current->thread.fpu.fpregs_active && (read_cr0() & X86_CR0_TS);
  67 }
  68
  69 /*
  70  * Were we in user mode (or vm86 mode) when we were
  71  * interrupted?
  72  *
  73  * Doing kernel_fpu_begin/end() is ok if we are running
  74  * in an interrupt context from user mode - we'll just
  75  * save the FPU state as required.
  76  */
  77 static bool interrupted_user_mode(void)
  78 {
  79         struct pt_regs *regs = get_irq_regs();
  80         return regs && user_mode(regs);
  81 }
  82
  83 /*
  84  * Can we use the FPU in kernel mode with the
  85  * whole "kernel_fpu_begin/end()" sequence?
  86  *
  87  * It's always ok in process context (ie "not interrupt")
  88  * but it is sometimes ok even from an irq.
  89  */
  90 bool irq_fpu_usable(void)
  91 {
  92         return !in_interrupt() ||
  93                 interrupted_user_mode() ||
  94                 interrupted_kernel_fpu_idle();
  95 }
  96 EXPORT_SYMBOL(irq_fpu_usable);
  97
  98 void __kernel_fpu_begin(void)
  99 {
 100         struct fpu *fpu = &current->thread.fpu;
 101
 102         kernel_fpu_disable();
 103
 104         if (fpu->fpregs_active) {
 105                 copy_fpregs_to_fpstate(fpu);
 106         } else {
 107                 this_cpu_write(fpu_fpregs_owner_ctx, NULL);
 108                 __fpregs_activate_hw();
 109         }
 110 }
 111 EXPORT_SYMBOL(__kernel_fpu_begin);
 112
 113 void __kernel_fpu_end(void)
 114 {
 115         struct fpu *fpu = &current->thread.fpu;
 116
 117         if (fpu->fpregs_active) {
 118                 if (WARN_ON(restore_fpu_checking(fpu)))
 119                         fpu_reset_state(fpu);
 120         } else {
 121                 __fpregs_deactivate_hw();
 122         }
 123
 124         kernel_fpu_enable();
 125 }
 126 EXPORT_SYMBOL(__kernel_fpu_end);
 127
 128 void kernel_fpu_begin(void)
 129 {
 130         preempt_disable();
 131         WARN_ON_ONCE(!irq_fpu_usable());
 132         __kernel_fpu_begin();
 133 }
 134 EXPORT_SYMBOL_GPL(kernel_fpu_begin);
 135
 136 void kernel_fpu_end(void)
 137 {
 138         __kernel_fpu_end();
 139         preempt_enable();
 140 }
 141 EXPORT_SYMBOL_GPL(kernel_fpu_end);
 142
 143 /*
 144  * CR0::TS save/restore functions:
 145  */
 146 int irq_ts_save(void)
 147 {
 148         /*
 149          * If in process context and not atomic, we can take a spurious DNA fault.
 150          * Otherwise, doing clts() in process context requires disabling preemption
 151          * or some heavy lifting like kernel_fpu_begin()
 152          */
 153         if (!in_atomic())
 154                 return 0;
 155
 156         if (read_cr0() & X86_CR0_TS) {
 157                 clts();
 158                 return 1;
 159         }
 160
 161         return 0;
 162 }
 163 EXPORT_SYMBOL_GPL(irq_ts_save);
 164
 165 void irq_ts_restore(int TS_state)
 166 {
 167         if (TS_state)
 168                 stts();
 169 }
 170 EXPORT_SYMBOL_GPL(irq_ts_restore);
 171
 172 /*
 173  * Save the FPU state (mark it for reload if necessary):
 174  *
 175  * This only ever gets called for the current task.
 176  */
 177 void fpu__save(struct fpu *fpu)
 178 {
 179         WARN_ON(fpu != &current->thread.fpu);
 180
 181         preempt_disable();
 182         if (fpu->fpregs_active) {
 183                 if (!copy_fpregs_to_fpstate(fpu))
 184                         fpregs_deactivate(fpu);
 185         }
 186         preempt_enable();
 187 }
 188 EXPORT_SYMBOL_GPL(fpu__save);
 189
 190 void fpstate_init(struct fpu *fpu)
 191 {
 192         if (!cpu_has_fpu) {
 193                 finit_soft_fpu(&fpu->state.soft);
 194                 return;
 195         }
 196
 197         memset(&fpu->state, 0, xstate_size);
 198
 199         if (cpu_has_fxsr) {
 200                 fx_finit(&fpu->state.fxsave);
 201         } else {
 202                 struct i387_fsave_struct *fp = &fpu->state.fsave;
 203                 fp->cwd = 0xffff037fu;
 204                 fp->swd = 0xffff0000u;
 205                 fp->twd = 0xffffffffu;
 206                 fp->fos = 0xffff0000u;
 207         }
 208 }
 209 EXPORT_SYMBOL_GPL(fpstate_init);
 210
 211 /*
 212  * Copy the current task's FPU state to a new task's FPU context.
 213  *
 214  * In the 'eager' case we just save to the destination context.
 215  *
 216  * In the 'lazy' case we save to the source context, mark the FPU lazy
 217  * via stts() and copy the source context into the destination context.
 218  */
 219 static void fpu_copy(struct fpu *dst_fpu, struct fpu *src_fpu)
 220 {
 221         WARN_ON(src_fpu != &current->thread.fpu);
 222
 223         if (use_eager_fpu()) {
 224                 memset(&dst_fpu->state.xsave, 0, xstate_size);
 225                 copy_fpregs_to_fpstate(dst_fpu);
 226         } else {
 227                 preempt_disable();
 228                 if (!copy_fpregs_to_fpstate(src_fpu))
 229                         fpregs_deactivate(src_fpu);
 230                 preempt_enable();
 231                 memcpy(&dst_fpu->state, &src_fpu->state, xstate_size);
 232         }
 233 }
 234
 235 int fpu__copy(struct fpu *dst_fpu, struct fpu *src_fpu)
 236 {
 237         dst_fpu->counter = 0;
 238         dst_fpu->fpregs_active = 0;
 239         dst_fpu->last_cpu = -1;
 240
 241         if (src_fpu->fpstate_active)
 242                 fpu_copy(dst_fpu, src_fpu);
 243
 244         return 0;
 245 }
 246
 247 /*
 248  * Activate the current task's in-memory FPU context,
 249  * if it has not been used before:
 250  */
 251 void fpu__activate_curr(struct fpu *fpu)
 252 {
 253         WARN_ON_ONCE(fpu != &current->thread.fpu);
 254
 255         if (!fpu->fpstate_active) {
 256                 fpstate_init(fpu);
 257
 258                 /* Safe to do for the current task: */
 259                 fpu->fpstate_active = 1;
 260         }
 261 }
 262 EXPORT_SYMBOL_GPL(fpu__activate_curr);
 263
 264 /*
 265  * This function must be called before we modify a stopped child's
 266  * fpstate.
 267  *
 268  * If the child has not used the FPU before then initialize its
 269  * fpstate.
 270  *
 271  * If the child has used the FPU before then unlazy it.
 272  *
 273  * [ After this function call, after registers in the fpstate are
 274  *   modified and the child task has woken up, the child task will
 275  *   restore the modified FPU state from the modified context. If we
 276  *   didn't clear its lazy status here then the lazy in-registers
 277  *   state pending on its former CPU could be restored, corrupting
 278  *   the modifications. ]
 279  *
 280  * This function is also called before we read a stopped child's
 281  * FPU state - to make sure it's initialized if the child has
 282  * no active FPU state.
 283  *
 284  * TODO: A future optimization would be to skip the unlazying in
 285  *       the read-only case, it's not strictly necessary for
 286  *       read-only access to the context.
 287  */
 288 static void fpu__activate_stopped(struct fpu *child_fpu)
 289 {
 290         WARN_ON_ONCE(child_fpu == &current->thread.fpu);
 291
 292         if (child_fpu->fpstate_active) {
 293                 child_fpu->last_cpu = -1;
 294         } else {
 295                 fpstate_init(child_fpu);
 296
 297                 /* Safe to do for stopped child tasks: */
 298                 child_fpu->fpstate_active = 1;
 299         }
 300 }
 301
 302 /*
 303  * 'fpu__restore()' saves the current math information in the
 304  * old math state array, and gets the new ones from the current task
 305  *
 306  * Careful.. There are problems with IBM-designed IRQ13 behaviour.
 307  * Don't touch unless you *really* know how it works.
 308  *
 309  * Must be called with kernel preemption disabled (eg with local
 310  * local interrupts as in the case of do_device_not_available).
 311  */
 312 void fpu__restore(void)
 313 {
 314         struct task_struct *tsk = current;
 315         struct fpu *fpu = &tsk->thread.fpu;
 316
 317         fpu__activate_curr(fpu);
 318
 319         /* Avoid __kernel_fpu_begin() right after fpregs_activate() */
 320         kernel_fpu_disable();
 321         fpregs_activate(fpu);
 322         if (unlikely(restore_fpu_checking(fpu))) {
 323                 fpu_reset_state(fpu);
 324                 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
 325         } else {
 326                 tsk->thread.fpu.counter++;
 327         }
 328         kernel_fpu_enable();
 329 }
 330 EXPORT_SYMBOL_GPL(fpu__restore);
 331
 332 void fpu__clear(struct task_struct *tsk)
 333 {
 334         struct fpu *fpu = &tsk->thread.fpu;
 335
 336         WARN_ON_ONCE(tsk != current); /* Almost certainly an anomaly */
 337
 338         if (!use_eager_fpu()) {
 339                 /* FPU state will be reallocated lazily at the first use. */
 340                 drop_fpu(fpu);
 341         } else {
 342                 if (!fpu->fpstate_active) {
 343                         fpu__activate_curr(fpu);
 344                         user_fpu_begin();
 345                 }
 346                 restore_init_xstate();
 347         }
 348 }
 349
 350 /*
 351  * The xstateregs_active() routine is the same as the regset_fpregs_active() routine,
 352  * as the "regset->n" for the xstate regset will be updated based on the feature
 353  * capabilites supported by the xsave.
 354  */
 355 int regset_fpregs_active(struct task_struct *target, const struct user_regset *regset)
 356 {
 357         struct fpu *target_fpu = &target->thread.fpu;
 358
 359         return target_fpu->fpstate_active ? regset->n : 0;
 360 }
 361
 362 int regset_xregset_fpregs_active(struct task_struct *target, const struct user_regset *regset)
 363 {
 364         struct fpu *target_fpu = &target->thread.fpu;
 365
 366         return (cpu_has_fxsr && target_fpu->fpstate_active) ? regset->n : 0;
 367 }
 368
 369 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
 370                 unsigned int pos, unsigned int count,
 371                 void *kbuf, void __user *ubuf)
 372 {
 373         struct fpu *fpu = &target->thread.fpu;
 374
 375         if (!cpu_has_fxsr)
 376                 return -ENODEV;
 377
 378         fpu__activate_stopped(fpu);
 379         sanitize_i387_state(target);
 380
 381         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 382                                    &fpu->state.fxsave, 0, -1);
 383 }
 384
 385 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
 386                 unsigned int pos, unsigned int count,
 387                 const void *kbuf, const void __user *ubuf)
 388 {
 389         struct fpu *fpu = &target->thread.fpu;
 390         int ret;
 391
 392         if (!cpu_has_fxsr)
 393                 return -ENODEV;
 394
 395         fpu__activate_stopped(fpu);
 396         sanitize_i387_state(target);
 397
 398         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 399                                  &fpu->state.fxsave, 0, -1);
 400
 401         /*
 402          * mxcsr reserved bits must be masked to zero for security reasons.
 403          */
 404         fpu->state.fxsave.mxcsr &= mxcsr_feature_mask;
 405
 406         /*
 407          * update the header bits in the xsave header, indicating the
 408          * presence of FP and SSE state.
 409          */
 410         if (cpu_has_xsave)
 411                 fpu->state.xsave.header.xfeatures |= XSTATE_FPSSE;
 412
 413         return ret;
 414 }
 415
 416 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
 417                 unsigned int pos, unsigned int count,
 418                 void *kbuf, void __user *ubuf)
 419 {
 420         struct fpu *fpu = &target->thread.fpu;
 421         struct xsave_struct *xsave;
 422         int ret;
 423
 424         if (!cpu_has_xsave)
 425                 return -ENODEV;
 426
 427         fpu__activate_stopped(fpu);
 428
 429         xsave = &fpu->state.xsave;
 430
 431         /*
 432          * Copy the 48bytes defined by the software first into the xstate
 433          * memory layout in the thread struct, so that we can copy the entire
 434          * xstateregs to the user using one user_regset_copyout().
 435          */
 436         memcpy(&xsave->i387.sw_reserved,
 437                 xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
 438         /*
 439          * Copy the xstate memory layout.
 440          */
 441         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
 442         return ret;
 443 }
 444
 445 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
 446                   unsigned int pos, unsigned int count,
 447                   const void *kbuf, const void __user *ubuf)
 448 {
 449         struct fpu *fpu = &target->thread.fpu;
 450         struct xsave_struct *xsave;
 451         int ret;
 452
 453         if (!cpu_has_xsave)
 454                 return -ENODEV;
 455
 456         fpu__activate_stopped(fpu);
 457
 458         xsave = &fpu->state.xsave;
 459
 460         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
 461         /*
 462          * mxcsr reserved bits must be masked to zero for security reasons.
 463          */
 464         xsave->i387.mxcsr &= mxcsr_feature_mask;
 465         xsave->header.xfeatures &= xfeatures_mask;
 466         /*
 467          * These bits must be zero.
 468          */
 469         memset(&xsave->header.reserved, 0, 48);
 470
 471         return ret;
 472 }
 473
 474 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
 475
 476 /*
 477  * FPU tag word conversions.
 478  */
 479
 480 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
 481 {
 482         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
 483
 484         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
 485         tmp = ~twd;
 486         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
 487         /* and move the valid bits to the lower byte. */
 488         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
 489         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
 490         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
 491
 492         return tmp;
 493 }
 494
 495 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16)
 496 #define FP_EXP_TAG_VALID        0
 497 #define FP_EXP_TAG_ZERO         1
 498 #define FP_EXP_TAG_SPECIAL      2
 499 #define FP_EXP_TAG_EMPTY        3
 500
 501 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
 502 {
 503         struct _fpxreg *st;
 504         u32 tos = (fxsave->swd >> 11) & 7;
 505         u32 twd = (unsigned long) fxsave->twd;
 506         u32 tag;
 507         u32 ret = 0xffff0000u;
 508         int i;
 509
 510         for (i = 0; i < 8; i++, twd >>= 1) {
 511                 if (twd & 0x1) {
 512                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
 513
 514                         switch (st->exponent & 0x7fff) {
 515                         case 0x7fff:
 516                                 tag = FP_EXP_TAG_SPECIAL;
 517                                 break;
 518                         case 0x0000:
 519                                 if (!st->significand[0] &&
 520                                     !st->significand[1] &&
 521                                     !st->significand[2] &&
 522                                     !st->significand[3])
 523                                         tag = FP_EXP_TAG_ZERO;
 524                                 else
 525                                         tag = FP_EXP_TAG_SPECIAL;
 526                                 break;
 527                         default:
 528                                 if (st->significand[3] & 0x8000)
 529                                         tag = FP_EXP_TAG_VALID;
 530                                 else
 531                                         tag = FP_EXP_TAG_SPECIAL;
 532                                 break;
 533                         }
 534                 } else {
 535                         tag = FP_EXP_TAG_EMPTY;
 536                 }
 537                 ret |= tag << (2 * i);
 538         }
 539         return ret;
 540 }
 541
 542 /*
 543  * FXSR floating point environment conversions.
 544  */
 545
 546 void
 547 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
 548 {
 549         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state.fxsave;
 550         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
 551         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
 552         int i;
 553
 554         env->cwd = fxsave->cwd | 0xffff0000u;
 555         env->swd = fxsave->swd | 0xffff0000u;
 556         env->twd = twd_fxsr_to_i387(fxsave);
 557
 558 #ifdef CONFIG_X86_64
 559         env->fip = fxsave->rip;
 560         env->foo = fxsave->rdp;
 561         /*
 562          * should be actually ds/cs at fpu exception time, but
 563          * that information is not available in 64bit mode.
 564          */
 565         env->fcs = task_pt_regs(tsk)->cs;
 566         if (tsk == current) {
 567                 savesegment(ds, env->fos);
 568         } else {
 569                 env->fos = tsk->thread.ds;
 570         }
 571         env->fos |= 0xffff0000;
 572 #else
 573         env->fip = fxsave->fip;
 574         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
 575         env->foo = fxsave->foo;
 576         env->fos = fxsave->fos;
 577 #endif
 578
 579         for (i = 0; i < 8; ++i)
 580                 memcpy(&to[i], &from[i], sizeof(to[0]));
 581 }
 582
 583 void convert_to_fxsr(struct task_struct *tsk,
 584                      const struct user_i387_ia32_struct *env)
 585
 586 {
 587         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state.fxsave;
 588         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
 589         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
 590         int i;
 591
 592         fxsave->cwd = env->cwd;
 593         fxsave->swd = env->swd;
 594         fxsave->twd = twd_i387_to_fxsr(env->twd);
 595         fxsave->fop = (u16) ((u32) env->fcs >> 16);
 596 #ifdef CONFIG_X86_64
 597         fxsave->rip = env->fip;
 598         fxsave->rdp = env->foo;
 599         /* cs and ds ignored */
 600 #else
 601         fxsave->fip = env->fip;
 602         fxsave->fcs = (env->fcs & 0xffff);
 603         fxsave->foo = env->foo;
 604         fxsave->fos = env->fos;
 605 #endif
 606
 607         for (i = 0; i < 8; ++i)
 608                 memcpy(&to[i], &from[i], sizeof(from[0]));
 609 }
 610
 611 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
 612                unsigned int pos, unsigned int count,
 613                void *kbuf, void __user *ubuf)
 614 {
 615         struct fpu *fpu = &target->thread.fpu;
 616         struct user_i387_ia32_struct env;
 617
 618         fpu__activate_stopped(fpu);
 619
 620         if (!static_cpu_has(X86_FEATURE_FPU))
 621                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
 622
 623         if (!cpu_has_fxsr)
 624                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 625                                            &fpu->state.fsave, 0,
 626                                            -1);
 627
 628         sanitize_i387_state(target);
 629
 630         if (kbuf && pos == 0 && count == sizeof(env)) {
 631                 convert_from_fxsr(kbuf, target);
 632                 return 0;
 633         }
 634
 635         convert_from_fxsr(&env, target);
 636
 637         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 638 }
 639
 640 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
 641                unsigned int pos, unsigned int count,
 642                const void *kbuf, const void __user *ubuf)
 643 {
 644         struct fpu *fpu = &target->thread.fpu;
 645         struct user_i387_ia32_struct env;
 646         int ret;
 647
 648         fpu__activate_stopped(fpu);
 649
 650         sanitize_i387_state(target);
 651
 652         if (!static_cpu_has(X86_FEATURE_FPU))
 653                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
 654
 655         if (!cpu_has_fxsr)
 656                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 657                                           &fpu->state.fsave, 0,
 658                                           -1);
 659
 660         if (pos > 0 || count < sizeof(env))
 661                 convert_from_fxsr(&env, target);
 662
 663         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 664         if (!ret)
 665                 convert_to_fxsr(target, &env);
 666
 667         /*
 668          * update the header bit in the xsave header, indicating the
 669          * presence of FP.
 670          */
 671         if (cpu_has_xsave)
 672                 fpu->state.xsave.header.xfeatures |= XSTATE_FP;
 673         return ret;
 674 }
 675
 676 /*
 677  * FPU state for core dumps.
 678  * This is only used for a.out dumps now.
 679  * It is declared generically using elf_fpregset_t (which is
 680  * struct user_i387_struct) but is in fact only used for 32-bit
 681  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
 682  */
 683 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *ufpu)
 684 {
 685         struct task_struct *tsk = current;
 686         struct fpu *fpu = &tsk->thread.fpu;
 687         int fpvalid;
 688
 689         fpvalid = fpu->fpstate_active;
 690         if (fpvalid)
 691                 fpvalid = !fpregs_get(tsk, NULL,
 692                                       0, sizeof(struct user_i387_ia32_struct),
 693                                       ufpu, NULL);
 694
 695         return fpvalid;
 696 }
 697 EXPORT_SYMBOL(dump_fpu);
 698
 699 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */