arch/x86/kernel/fpu/xstate.c

   1 /*
   2  * xsave/xrstor support.
   3  *
   4  * Author: Suresh Siddha <suresh.b.siddha@intel.com>
   5  */
   6 #include <linux/compat.h>
   7 #include <linux/cpu.h>
   8 #include <asm/fpu/api.h>
   9 #include <asm/fpu/internal.h>
  10 #include <asm/sigframe.h>
  11 #include <asm/tlbflush.h>
  12 #include <asm/xcr.h>
  13
  14 /*
  15  * Mask of xstate features supported by the CPU and the kernel:
  16  */
  17 u64 xfeatures_mask;
  18
  19 /*
  20  * Represents init state for the supported extended state.
  21  */
  22 struct xsave_struct init_xstate_ctx;
  23
  24 static struct _fpx_sw_bytes fx_sw_reserved, fx_sw_reserved_ia32;
  25 static unsigned int xstate_offsets[XFEATURES_NR_MAX], xstate_sizes[XFEATURES_NR_MAX];
  26 static unsigned int xstate_comp_offsets[sizeof(xfeatures_mask)*8];
  27
  28 /* The number of supported xfeatures in xfeatures_mask: */
  29 static unsigned int xfeatures_nr;
  30
  31 /*
  32  * When executing XSAVEOPT (optimized XSAVE), if a processor implementation
  33  * detects that an FPU state component is still (or is again) in its
  34  * initialized state, it may clear the corresponding bit in the header.xfeatures
  35  * field, and can skip the writeout of registers to the corresponding memory layout.
  36  *
  37  * This means that when the bit is zero, the state component might still contain
  38  * some previous - non-initialized register state.
  39  *
  40  * Before writing xstate information to user-space we sanitize those components,
  41  * to always ensure that the memory layout of a feature will be in the init state
  42  * if the corresponding header bit is zero. This is to ensure that user-space doesn't
  43  * see some stale state in the memory layout during signal handling, debugging etc.
  44  */
  45 void __sanitize_i387_state(struct task_struct *tsk)
  46 {
  47         struct i387_fxsave_struct *fx = &tsk->thread.fpu.state.fxsave;
  48         int feature_bit;
  49         u64 xfeatures;
  50
  51         if (!fx)
  52                 return;
  53
  54         xfeatures = tsk->thread.fpu.state.xsave.header.xfeatures;
  55
  56         /*
  57          * None of the feature bits are in init state. So nothing else
  58          * to do for us, as the memory layout is up to date.
  59          */
  60         if ((xfeatures & xfeatures_mask) == xfeatures_mask)
  61                 return;
  62
  63         /*
  64          * FP is in init state
  65          */
  66         if (!(xfeatures & XSTATE_FP)) {
  67                 fx->cwd = 0x37f;
  68                 fx->swd = 0;
  69                 fx->twd = 0;
  70                 fx->fop = 0;
  71                 fx->rip = 0;
  72                 fx->rdp = 0;
  73                 memset(&fx->st_space[0], 0, 128);
  74         }
  75
  76         /*
  77          * SSE is in init state
  78          */
  79         if (!(xfeatures & XSTATE_SSE))
  80                 memset(&fx->xmm_space[0], 0, 256);
  81
  82         /*
  83          * First two features are FPU and SSE, which above we handled
  84          * in a special way already:
  85          */
  86         feature_bit = 0x2;
  87         xfeatures = (xfeatures_mask & ~xfeatures) >> 2;
  88
  89         /*
  90          * Update all the remaining memory layouts according to their
  91          * standard xstate layout, if their header bit is in the init
  92          * state:
  93          */
  94         while (xfeatures) {
  95                 if (xfeatures & 0x1) {
  96                         int offset = xstate_offsets[feature_bit];
  97                         int size = xstate_sizes[feature_bit];
  98
  99                         memcpy((void *)fx + offset,
 100                                (void *)&init_xstate_ctx + offset,
 101                                size);
 102                 }
 103
 104                 xfeatures >>= 1;
 105                 feature_bit++;
 106         }
 107 }
 108
 109 /*
 110  * Check for the presence of extended state information in the
 111  * user fpstate pointer in the sigcontext.
 112  */
 113 static inline int check_for_xstate(struct i387_fxsave_struct __user *buf,
 114                                    void __user *fpstate,
 115                                    struct _fpx_sw_bytes *fx_sw)
 116 {
 117         int min_xstate_size = sizeof(struct i387_fxsave_struct) +
 118                               sizeof(struct xstate_header);
 119         unsigned int magic2;
 120
 121         if (__copy_from_user(fx_sw, &buf->sw_reserved[0], sizeof(*fx_sw)))
 122                 return -1;
 123
 124         /* Check for the first magic field and other error scenarios. */
 125         if (fx_sw->magic1 != FP_XSTATE_MAGIC1 ||
 126             fx_sw->xstate_size < min_xstate_size ||
 127             fx_sw->xstate_size > xstate_size ||
 128             fx_sw->xstate_size > fx_sw->extended_size)
 129                 return -1;
 130
 131         /*
 132          * Check for the presence of second magic word at the end of memory
 133          * layout. This detects the case where the user just copied the legacy
 134          * fpstate layout with out copying the extended state information
 135          * in the memory layout.
 136          */
 137         if (__get_user(magic2, (__u32 __user *)(fpstate + fx_sw->xstate_size))
 138             || magic2 != FP_XSTATE_MAGIC2)
 139                 return -1;
 140
 141         return 0;
 142 }
 143
 144 /*
 145  * Signal frame handlers.
 146  */
 147 static inline int save_fsave_header(struct task_struct *tsk, void __user *buf)
 148 {
 149         if (use_fxsr()) {
 150                 struct xsave_struct *xsave = &tsk->thread.fpu.state.xsave;
 151                 struct user_i387_ia32_struct env;
 152                 struct _fpstate_ia32 __user *fp = buf;
 153
 154                 convert_from_fxsr(&env, tsk);
 155
 156                 if (__copy_to_user(buf, &env, sizeof(env)) ||
 157                     __put_user(xsave->i387.swd, &fp->status) ||
 158                     __put_user(X86_FXSR_MAGIC, &fp->magic))
 159                         return -1;
 160         } else {
 161                 struct i387_fsave_struct __user *fp = buf;
 162                 u32 swd;
 163                 if (__get_user(swd, &fp->swd) || __put_user(swd, &fp->status))
 164                         return -1;
 165         }
 166
 167         return 0;
 168 }
 169
 170 static inline int save_xstate_epilog(void __user *buf, int ia32_frame)
 171 {
 172         struct xsave_struct __user *x = buf;
 173         struct _fpx_sw_bytes *sw_bytes;
 174         u32 xfeatures;
 175         int err;
 176
 177         /* Setup the bytes not touched by the [f]xsave and reserved for SW. */
 178         sw_bytes = ia32_frame ? &fx_sw_reserved_ia32 : &fx_sw_reserved;
 179         err = __copy_to_user(&x->i387.sw_reserved, sw_bytes, sizeof(*sw_bytes));
 180
 181         if (!use_xsave())
 182                 return err;
 183
 184         err |= __put_user(FP_XSTATE_MAGIC2, (__u32 *)(buf + xstate_size));
 185
 186         /*
 187          * Read the xfeatures which we copied (directly from the cpu or
 188          * from the state in task struct) to the user buffers.
 189          */
 190         err |= __get_user(xfeatures, (__u32 *)&x->header.xfeatures);
 191
 192         /*
 193          * For legacy compatible, we always set FP/SSE bits in the bit
 194          * vector while saving the state to the user context. This will
 195          * enable us capturing any changes(during sigreturn) to
 196          * the FP/SSE bits by the legacy applications which don't touch
 197          * xfeatures in the xsave header.
 198          *
 199          * xsave aware apps can change the xfeatures in the xsave
 200          * header as well as change any contents in the memory layout.
 201          * xrestore as part of sigreturn will capture all the changes.
 202          */
 203         xfeatures |= XSTATE_FPSSE;
 204
 205         err |= __put_user(xfeatures, (__u32 *)&x->header.xfeatures);
 206
 207         return err;
 208 }
 209
 210 static inline int save_user_xstate(struct xsave_struct __user *buf)
 211 {
 212         int err;
 213
 214         if (use_xsave())
 215                 err = xsave_user(buf);
 216         else if (use_fxsr())
 217                 err = fxsave_user((struct i387_fxsave_struct __user *) buf);
 218         else
 219                 err = fsave_user((struct i387_fsave_struct __user *) buf);
 220
 221         if (unlikely(err) && __clear_user(buf, xstate_size))
 222                 err = -EFAULT;
 223         return err;
 224 }
 225
 226 /*
 227  * Save the fpu, extended register state to the user signal frame.
 228  *
 229  * 'buf_fx' is the 64-byte aligned pointer at which the [f|fx|x]save
 230  *  state is copied.
 231  *  'buf' points to the 'buf_fx' or to the fsave header followed by 'buf_fx'.
 232  *
 233  *      buf == buf_fx for 64-bit frames and 32-bit fsave frame.
 234  *      buf != buf_fx for 32-bit frames with fxstate.
 235  *
 236  * If the fpu, extended register state is live, save the state directly
 237  * to the user frame pointed by the aligned pointer 'buf_fx'. Otherwise,
 238  * copy the thread's fpu state to the user frame starting at 'buf_fx'.
 239  *
 240  * If this is a 32-bit frame with fxstate, put a fsave header before
 241  * the aligned state at 'buf_fx'.
 242  *
 243  * For [f]xsave state, update the SW reserved fields in the [f]xsave frame
 244  * indicating the absence/presence of the extended state to the user.
 245  */
 246 int save_xstate_sig(void __user *buf, void __user *buf_fx, int size)
 247 {
 248         struct xsave_struct *xsave = &current->thread.fpu.state.xsave;
 249         struct task_struct *tsk = current;
 250         int ia32_fxstate = (buf != buf_fx);
 251
 252         ia32_fxstate &= (config_enabled(CONFIG_X86_32) ||
 253                          config_enabled(CONFIG_IA32_EMULATION));
 254
 255         if (!access_ok(VERIFY_WRITE, buf, size))
 256                 return -EACCES;
 257
 258         if (!static_cpu_has(X86_FEATURE_FPU))
 259                 return fpregs_soft_get(current, NULL, 0,
 260                         sizeof(struct user_i387_ia32_struct), NULL,
 261                         (struct _fpstate_ia32 __user *) buf) ? -1 : 1;
 262
 263         if (user_has_fpu()) {
 264                 /* Save the live register state to the user directly. */
 265                 if (save_user_xstate(buf_fx))
 266                         return -1;
 267                 /* Update the thread's fxstate to save the fsave header. */
 268                 if (ia32_fxstate)
 269                         fpu_fxsave(&tsk->thread.fpu);
 270         } else {
 271                 sanitize_i387_state(tsk);
 272                 if (__copy_to_user(buf_fx, xsave, xstate_size))
 273                         return -1;
 274         }
 275
 276         /* Save the fsave header for the 32-bit frames. */
 277         if ((ia32_fxstate || !use_fxsr()) && save_fsave_header(tsk, buf))
 278                 return -1;
 279
 280         if (use_fxsr() && save_xstate_epilog(buf_fx, ia32_fxstate))
 281                 return -1;
 282
 283         return 0;
 284 }
 285
 286 static inline void
 287 sanitize_restored_xstate(struct task_struct *tsk,
 288                          struct user_i387_ia32_struct *ia32_env,
 289                          u64 xfeatures, int fx_only)
 290 {
 291         struct xsave_struct *xsave = &tsk->thread.fpu.state.xsave;
 292         struct xstate_header *header = &xsave->header;
 293
 294         if (use_xsave()) {
 295                 /* These bits must be zero. */
 296                 memset(header->reserved, 0, 48);
 297
 298                 /*
 299                  * Init the state that is not present in the memory
 300                  * layout and not enabled by the OS.
 301                  */
 302                 if (fx_only)
 303                         header->xfeatures = XSTATE_FPSSE;
 304                 else
 305                         header->xfeatures &= (xfeatures_mask & xfeatures);
 306         }
 307
 308         if (use_fxsr()) {
 309                 /*
 310                  * mscsr reserved bits must be masked to zero for security
 311                  * reasons.
 312                  */
 313                 xsave->i387.mxcsr &= mxcsr_feature_mask;
 314
 315                 convert_to_fxsr(tsk, ia32_env);
 316         }
 317 }
 318
 319 /*
 320  * Restore the extended state if present. Otherwise, restore the FP/SSE state.
 321  */
 322 static inline int restore_user_xstate(void __user *buf, u64 xbv, int fx_only)
 323 {
 324         if (use_xsave()) {
 325                 if ((unsigned long)buf % 64 || fx_only) {
 326                         u64 init_bv = xfeatures_mask & ~XSTATE_FPSSE;
 327                         xrstor_state(&init_xstate_ctx, init_bv);
 328                         return fxrstor_user(buf);
 329                 } else {
 330                         u64 init_bv = xfeatures_mask & ~xbv;
 331                         if (unlikely(init_bv))
 332                                 xrstor_state(&init_xstate_ctx, init_bv);
 333                         return xrestore_user(buf, xbv);
 334                 }
 335         } else if (use_fxsr()) {
 336                 return fxrstor_user(buf);
 337         } else
 338                 return frstor_user(buf);
 339 }
 340
 341 int __restore_xstate_sig(void __user *buf, void __user *buf_fx, int size)
 342 {
 343         int ia32_fxstate = (buf != buf_fx);
 344         struct task_struct *tsk = current;
 345         struct fpu *fpu = &tsk->thread.fpu;
 346         int state_size = xstate_size;
 347         u64 xfeatures = 0;
 348         int fx_only = 0;
 349
 350         ia32_fxstate &= (config_enabled(CONFIG_X86_32) ||
 351                          config_enabled(CONFIG_IA32_EMULATION));
 352
 353         if (!buf) {
 354                 fpu_reset_state(fpu);
 355                 return 0;
 356         }
 357
 358         if (!access_ok(VERIFY_READ, buf, size))
 359                 return -EACCES;
 360
 361         fpu__activate_curr(fpu);
 362
 363         if (!static_cpu_has(X86_FEATURE_FPU))
 364                 return fpregs_soft_set(current, NULL,
 365                                        0, sizeof(struct user_i387_ia32_struct),
 366                                        NULL, buf) != 0;
 367
 368         if (use_xsave()) {
 369                 struct _fpx_sw_bytes fx_sw_user;
 370                 if (unlikely(check_for_xstate(buf_fx, buf_fx, &fx_sw_user))) {
 371                         /*
 372                          * Couldn't find the extended state information in the
 373                          * memory layout. Restore just the FP/SSE and init all
 374                          * the other extended state.
 375                          */
 376                         state_size = sizeof(struct i387_fxsave_struct);
 377                         fx_only = 1;
 378                 } else {
 379                         state_size = fx_sw_user.xstate_size;
 380                         xfeatures = fx_sw_user.xfeatures;
 381                 }
 382         }
 383
 384         if (ia32_fxstate) {
 385                 /*
 386                  * For 32-bit frames with fxstate, copy the user state to the
 387                  * thread's fpu state, reconstruct fxstate from the fsave
 388                  * header. Sanitize the copied state etc.
 389                  */
 390                 struct fpu *fpu = &tsk->thread.fpu;
 391                 struct user_i387_ia32_struct env;
 392                 int err = 0;
 393
 394                 /*
 395                  * Drop the current fpu which clears fpu->fpstate_active. This ensures
 396                  * that any context-switch during the copy of the new state,
 397                  * avoids the intermediate state from getting restored/saved.
 398                  * Thus avoiding the new restored state from getting corrupted.
 399                  * We will be ready to restore/save the state only after
 400                  * fpu->fpstate_active is again set.
 401                  */
 402                 drop_fpu(fpu);
 403
 404                 if (__copy_from_user(&fpu->state.xsave, buf_fx, state_size) ||
 405                     __copy_from_user(&env, buf, sizeof(env))) {
 406                         fpstate_init(fpu);
 407                         err = -1;
 408                 } else {
 409                         sanitize_restored_xstate(tsk, &env, xfeatures, fx_only);
 410                 }
 411
 412                 fpu->fpstate_active = 1;
 413                 if (use_eager_fpu()) {
 414                         preempt_disable();
 415                         fpu__restore();
 416                         preempt_enable();
 417                 }
 418
 419                 return err;
 420         } else {
 421                 /*
 422                  * For 64-bit frames and 32-bit fsave frames, restore the user
 423                  * state to the registers directly (with exceptions handled).
 424                  */
 425                 user_fpu_begin();
 426                 if (restore_user_xstate(buf_fx, xfeatures, fx_only)) {
 427                         fpu_reset_state(fpu);
 428                         return -1;
 429                 }
 430         }
 431
 432         return 0;
 433 }
 434
 435 /*
 436  * Prepare the SW reserved portion of the fxsave memory layout, indicating
 437  * the presence of the extended state information in the memory layout
 438  * pointed by the fpstate pointer in the sigcontext.
 439  * This will be saved when ever the FP and extended state context is
 440  * saved on the user stack during the signal handler delivery to the user.
 441  */
 442 static void prepare_fx_sw_frame(void)
 443 {
 444         int fsave_header_size = sizeof(struct i387_fsave_struct);
 445         int size = xstate_size + FP_XSTATE_MAGIC2_SIZE;
 446
 447         if (config_enabled(CONFIG_X86_32))
 448                 size += fsave_header_size;
 449
 450         fx_sw_reserved.magic1 = FP_XSTATE_MAGIC1;
 451         fx_sw_reserved.extended_size = size;
 452         fx_sw_reserved.xfeatures = xfeatures_mask;
 453         fx_sw_reserved.xstate_size = xstate_size;
 454
 455         if (config_enabled(CONFIG_IA32_EMULATION)) {
 456                 fx_sw_reserved_ia32 = fx_sw_reserved;
 457                 fx_sw_reserved_ia32.extended_size += fsave_header_size;
 458         }
 459 }
 460
 461 /*
 462  * Enable the extended processor state save/restore feature.
 463  * Called once per CPU onlining.
 464  */
 465 void fpu__init_cpu_xstate(void)
 466 {
 467         if (!cpu_has_xsave || !xfeatures_mask)
 468                 return;
 469
 470         cr4_set_bits(X86_CR4_OSXSAVE);
 471         xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
 472 }
 473
 474 /*
 475  * Record the offsets and sizes of different state managed by the xsave
 476  * memory layout.
 477  */
 478 static void __init setup_xstate_features(void)
 479 {
 480         int eax, ebx, ecx, edx, leaf = 0x2;
 481
 482         xfeatures_nr = fls64(xfeatures_mask);
 483
 484         do {
 485                 cpuid_count(XSTATE_CPUID, leaf, &eax, &ebx, &ecx, &edx);
 486
 487                 if (eax == 0)
 488                         break;
 489
 490                 xstate_offsets[leaf] = ebx;
 491                 xstate_sizes[leaf] = eax;
 492
 493                 leaf++;
 494         } while (1);
 495 }
 496
 497 static void print_xstate_feature(u64 xstate_mask, const char *desc)
 498 {
 499         if (xfeatures_mask & xstate_mask) {
 500                 int xstate_feature = fls64(xstate_mask)-1;
 501
 502                 pr_info("x86/fpu: Supporting XSAVE feature %2d: '%s'\n", xstate_feature, desc);
 503         }
 504 }
 505
 506 /*
 507  * Print out all the supported xstate features:
 508  */
 509 static void print_xstate_features(void)
 510 {
 511         print_xstate_feature(XSTATE_FP,         "x87 floating point registers");
 512         print_xstate_feature(XSTATE_SSE,        "SSE registers");
 513         print_xstate_feature(XSTATE_YMM,        "AVX registers");
 514         print_xstate_feature(XSTATE_BNDREGS,    "MPX bounds registers");
 515         print_xstate_feature(XSTATE_BNDCSR,     "MPX CSR");
 516         print_xstate_feature(XSTATE_OPMASK,     "AVX-512 opmask");
 517         print_xstate_feature(XSTATE_ZMM_Hi256,  "AVX-512 Hi256");
 518         print_xstate_feature(XSTATE_Hi16_ZMM,   "AVX-512 ZMM_Hi256");
 519 }
 520
 521 /*
 522  * This function sets up offsets and sizes of all extended states in
 523  * xsave area. This supports both standard format and compacted format
 524  * of the xsave aread.
 525  *
 526  * Input: void
 527  * Output: void
 528  */
 529 void setup_xstate_comp(void)
 530 {
 531         unsigned int xstate_comp_sizes[sizeof(xfeatures_mask)*8];
 532         int i;
 533
 534         /*
 535          * The FP xstates and SSE xstates are legacy states. They are always
 536          * in the fixed offsets in the xsave area in either compacted form
 537          * or standard form.
 538          */
 539         xstate_comp_offsets[0] = 0;
 540         xstate_comp_offsets[1] = offsetof(struct i387_fxsave_struct, xmm_space);
 541
 542         if (!cpu_has_xsaves) {
 543                 for (i = 2; i < xfeatures_nr; i++) {
 544                         if (test_bit(i, (unsigned long *)&xfeatures_mask)) {
 545                                 xstate_comp_offsets[i] = xstate_offsets[i];
 546                                 xstate_comp_sizes[i] = xstate_sizes[i];
 547                         }
 548                 }
 549                 return;
 550         }
 551
 552         xstate_comp_offsets[2] = FXSAVE_SIZE + XSAVE_HDR_SIZE;
 553
 554         for (i = 2; i < xfeatures_nr; i++) {
 555                 if (test_bit(i, (unsigned long *)&xfeatures_mask))
 556                         xstate_comp_sizes[i] = xstate_sizes[i];
 557                 else
 558                         xstate_comp_sizes[i] = 0;
 559
 560                 if (i > 2)
 561                         xstate_comp_offsets[i] = xstate_comp_offsets[i-1]
 562                                         + xstate_comp_sizes[i-1];
 563
 564         }
 565 }
 566
 567 /*
 568  * setup the xstate image representing the init state
 569  */
 570 static void setup_init_fpu_buf(void)
 571 {
 572         static int on_boot_cpu = 1;
 573
 574         if (!on_boot_cpu)
 575                 return;
 576         on_boot_cpu = 0;
 577
 578         if (!cpu_has_xsave)
 579                 return;
 580
 581         setup_xstate_features();
 582         print_xstate_features();
 583
 584         if (cpu_has_xsaves) {
 585                 init_xstate_ctx.header.xcomp_bv = (u64)1 << 63 | xfeatures_mask;
 586                 init_xstate_ctx.header.xfeatures = xfeatures_mask;
 587         }
 588
 589         /*
 590          * Init all the features state with header_bv being 0x0
 591          */
 592         xrstor_state_booting(&init_xstate_ctx, -1);
 593
 594         /*
 595          * Dump the init state again. This is to identify the init state
 596          * of any feature which is not represented by all zero's.
 597          */
 598         xsave_state_booting(&init_xstate_ctx);
 599 }
 600
 601 /*
 602  * Calculate total size of enabled xstates in XCR0/xfeatures_mask.
 603  */
 604 static void __init init_xstate_size(void)
 605 {
 606         unsigned int eax, ebx, ecx, edx;
 607         int i;
 608
 609         if (!cpu_has_xsaves) {
 610                 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
 611                 xstate_size = ebx;
 612                 return;
 613         }
 614
 615         xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE;
 616         for (i = 2; i < 64; i++) {
 617                 if (test_bit(i, (unsigned long *)&xfeatures_mask)) {
 618                         cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
 619                         xstate_size += eax;
 620                 }
 621         }
 622 }
 623
 624 /*
 625  * Enable and initialize the xsave feature.
 626  * Called once per system bootup.
 627  *
 628  * ( Not marked __init because of false positive section warnings. )
 629  */
 630 void fpu__init_system_xstate(void)
 631 {
 632         unsigned int eax, ebx, ecx, edx;
 633         static bool on_boot_cpu = 1;
 634
 635         if (!on_boot_cpu)
 636                 return;
 637         on_boot_cpu = 0;
 638
 639         if (!cpu_has_xsave) {
 640                 pr_info("x86/fpu: Legacy x87 FPU detected.\n");
 641                 return;
 642         }
 643
 644         if (boot_cpu_data.cpuid_level < XSTATE_CPUID) {
 645                 WARN(1, "x86/fpu: XSTATE_CPUID missing!\n");
 646                 return;
 647         }
 648
 649         cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
 650         xfeatures_mask = eax + ((u64)edx << 32);
 651
 652         if ((xfeatures_mask & XSTATE_FPSSE) != XSTATE_FPSSE) {
 653                 pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", xfeatures_mask);
 654                 BUG();
 655         }
 656
 657         /*
 658          * Support only the state known to OS.
 659          */
 660         xfeatures_mask = xfeatures_mask & XCNTXT_MASK;
 661
 662         /* Enable xstate instructions to be able to continue with initialization: */
 663         fpu__init_cpu_xstate();
 664
 665         /*
 666          * Recompute the context size for enabled features
 667          */
 668         init_xstate_size();
 669
 670         update_regset_xstate_info(xstate_size, xfeatures_mask);
 671         prepare_fx_sw_frame();
 672         setup_init_fpu_buf();
 673
 674         pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is 0x%x bytes, using '%s' format.\n",
 675                 xfeatures_mask,
 676                 xstate_size,
 677                 cpu_has_xsaves ? "compacted" : "standard");
 678 }
 679
 680 /*
 681  * Restore minimal FPU state after suspend:
 682  */
 683 void fpu__resume_cpu(void)
 684 {
 685         /*
 686          * Restore XCR0 on xsave capable CPUs:
 687          */
 688         if (cpu_has_xsave)
 689                 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
 690 }
 691
 692 /*
 693  * Given the xsave area and a state inside, this function returns the
 694  * address of the state.
 695  *
 696  * This is the API that is called to get xstate address in either
 697  * standard format or compacted format of xsave area.
 698  *
 699  * Inputs:
 700  *      xsave: base address of the xsave area;
 701  *      xstate: state which is defined in xsave.h (e.g. XSTATE_FP, XSTATE_SSE,
 702  *      etc.)
 703  * Output:
 704  *      address of the state in the xsave area.
 705  */
 706 void *get_xsave_addr(struct xsave_struct *xsave, int xstate)
 707 {
 708         int feature = fls64(xstate) - 1;
 709         if (!test_bit(feature, (unsigned long *)&xfeatures_mask))
 710                 return NULL;
 711
 712         return (void *)xsave + xstate_comp_offsets[feature];
 713 }
 714 EXPORT_SYMBOL_GPL(get_xsave_addr);