x86-32: remove ALLOCATOR_SLOP from head_32.S
[deliverable/linux.git] / arch / x86 / kernel / head_32.S
1 /*
2 *
3 * Copyright (C) 1991, 1992 Linus Torvalds
4 *
5 * Enhanced CPU detection and feature setting code by Mike Jagdis
6 * and Martin Mares, November 1997.
7 */
8
9 .text
10 #include <linux/threads.h>
11 #include <linux/init.h>
12 #include <linux/linkage.h>
13 #include <asm/segment.h>
14 #include <asm/page_types.h>
15 #include <asm/pgtable_types.h>
16 #include <asm/desc.h>
17 #include <asm/cache.h>
18 #include <asm/thread_info.h>
19 #include <asm/asm-offsets.h>
20 #include <asm/setup.h>
21 #include <asm/processor-flags.h>
22 #include <asm/percpu.h>
23
24 /* Physical address */
25 #define pa(X) ((X) - __PAGE_OFFSET)
26
27 /*
28 * References to members of the new_cpu_data structure.
29 */
30
31 #define X86 new_cpu_data+CPUINFO_x86
32 #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
33 #define X86_MODEL new_cpu_data+CPUINFO_x86_model
34 #define X86_MASK new_cpu_data+CPUINFO_x86_mask
35 #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
36 #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
37 #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
38 #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
39
40 /*
41 * This is how much memory in addition to the memory covered up to
42 * and including _end we need mapped initially.
43 * We need:
44 * (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE)
45 * (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE)
46 *
47 * Modulo rounding, each megabyte assigned here requires a kilobyte of
48 * memory, which is currently unreclaimed.
49 *
50 * This should be a multiple of a page.
51 *
52 * KERNEL_IMAGE_SIZE should be greater than pa(_end)
53 * and small than max_low_pfn, otherwise will waste some page table entries
54 */
55
56 #if PTRS_PER_PMD > 1
57 #define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD)
58 #else
59 #define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)
60 #endif
61
62 /* Enough space to fit pagetables for the low memory linear map */
63 MAPPING_BEYOND_END = (PAGE_TABLE_SIZE(1 << (32 - PAGE_SHIFT)) * PAGE_SIZE)
64
65 /*
66 * Worst-case size of the kernel mapping we need to make:
67 * the worst-case size of the kernel itself, plus the extra we need
68 * to map for the linear map.
69 */
70 KERNEL_PAGES = (KERNEL_IMAGE_SIZE + MAPPING_BEYOND_END)>>PAGE_SHIFT
71
72 INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE_asm
73 RESERVE_BRK(pagetables, INIT_MAP_SIZE)
74
75 /*
76 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
77 * %esi points to the real-mode code as a 32-bit pointer.
78 * CS and DS must be 4 GB flat segments, but we don't depend on
79 * any particular GDT layout, because we load our own as soon as we
80 * can.
81 */
82 .section .text.head,"ax",@progbits
83 ENTRY(startup_32)
84 /* test KEEP_SEGMENTS flag to see if the bootloader is asking
85 us to not reload segments */
86 testb $(1<<6), BP_loadflags(%esi)
87 jnz 2f
88
89 /*
90 * Set segments to known values.
91 */
92 lgdt pa(boot_gdt_descr)
93 movl $(__BOOT_DS),%eax
94 movl %eax,%ds
95 movl %eax,%es
96 movl %eax,%fs
97 movl %eax,%gs
98 2:
99
100 /*
101 * Clear BSS first so that there are no surprises...
102 */
103 cld
104 xorl %eax,%eax
105 movl $pa(__bss_start),%edi
106 movl $pa(__bss_stop),%ecx
107 subl %edi,%ecx
108 shrl $2,%ecx
109 rep ; stosl
110 /*
111 * Copy bootup parameters out of the way.
112 * Note: %esi still has the pointer to the real-mode data.
113 * With the kexec as boot loader, parameter segment might be loaded beyond
114 * kernel image and might not even be addressable by early boot page tables.
115 * (kexec on panic case). Hence copy out the parameters before initializing
116 * page tables.
117 */
118 movl $pa(boot_params),%edi
119 movl $(PARAM_SIZE/4),%ecx
120 cld
121 rep
122 movsl
123 movl pa(boot_params) + NEW_CL_POINTER,%esi
124 andl %esi,%esi
125 jz 1f # No comand line
126 movl $pa(boot_command_line),%edi
127 movl $(COMMAND_LINE_SIZE/4),%ecx
128 rep
129 movsl
130 1:
131
132 #ifdef CONFIG_PARAVIRT
133 /* This is can only trip for a broken bootloader... */
134 cmpw $0x207, pa(boot_params + BP_version)
135 jb default_entry
136
137 /* Paravirt-compatible boot parameters. Look to see what architecture
138 we're booting under. */
139 movl pa(boot_params + BP_hardware_subarch), %eax
140 cmpl $num_subarch_entries, %eax
141 jae bad_subarch
142
143 movl pa(subarch_entries)(,%eax,4), %eax
144 subl $__PAGE_OFFSET, %eax
145 jmp *%eax
146
147 bad_subarch:
148 WEAK(lguest_entry)
149 WEAK(xen_entry)
150 /* Unknown implementation; there's really
151 nothing we can do at this point. */
152 ud2a
153
154 __INITDATA
155
156 subarch_entries:
157 .long default_entry /* normal x86/PC */
158 .long lguest_entry /* lguest hypervisor */
159 .long xen_entry /* Xen hypervisor */
160 num_subarch_entries = (. - subarch_entries) / 4
161 .previous
162 #endif /* CONFIG_PARAVIRT */
163
164 /*
165 * Initialize page tables. This creates a PDE and a set of page
166 * tables, which are located immediately beyond __brk_base. The variable
167 * _brk_end is set up to point to the first "safe" location.
168 * Mappings are created both at virtual address 0 (identity mapping)
169 * and PAGE_OFFSET for up to _end.
170 *
171 * Note that the stack is not yet set up!
172 */
173 default_entry:
174 #ifdef CONFIG_X86_PAE
175
176 /*
177 * In PAE mode swapper_pg_dir is statically defined to contain enough
178 * entries to cover the VMSPLIT option (that is the top 1, 2 or 3
179 * entries). The identity mapping is handled by pointing two PGD
180 * entries to the first kernel PMD.
181 *
182 * Note the upper half of each PMD or PTE are always zero at
183 * this stage.
184 */
185
186 #define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
187
188 xorl %ebx,%ebx /* %ebx is kept at zero */
189
190 movl $pa(__brk_base), %edi
191 movl $pa(swapper_pg_pmd), %edx
192 movl $PTE_IDENT_ATTR, %eax
193 10:
194 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */
195 movl %ecx,(%edx) /* Store PMD entry */
196 /* Upper half already zero */
197 addl $8,%edx
198 movl $512,%ecx
199 11:
200 stosl
201 xchgl %eax,%ebx
202 stosl
203 xchgl %eax,%ebx
204 addl $0x1000,%eax
205 loop 11b
206
207 /*
208 * End condition: we must map up to the end + MAPPING_BEYOND_END.
209 */
210 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
211 cmpl %ebp,%eax
212 jb 10b
213 1:
214 addl $__PAGE_OFFSET, %edi
215 movl %edi, pa(_brk_end)
216 shrl $12, %eax
217 movl %eax, pa(max_pfn_mapped)
218
219 /* Do early initialization of the fixmap area */
220 movl $pa(swapper_pg_fixmap)+PDE_IDENT_ATTR,%eax
221 movl %eax,pa(swapper_pg_pmd+0x1000*KPMDS-8)
222 #else /* Not PAE */
223
224 page_pde_offset = (__PAGE_OFFSET >> 20);
225
226 movl $pa(__brk_base), %edi
227 movl $pa(swapper_pg_dir), %edx
228 movl $PTE_IDENT_ATTR, %eax
229 10:
230 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */
231 movl %ecx,(%edx) /* Store identity PDE entry */
232 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
233 addl $4,%edx
234 movl $1024, %ecx
235 11:
236 stosl
237 addl $0x1000,%eax
238 loop 11b
239 /*
240 * End condition: we must map up to the end + MAPPING_BEYOND_END.
241 */
242 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
243 cmpl %ebp,%eax
244 jb 10b
245 addl $__PAGE_OFFSET, %edi
246 movl %edi, pa(_brk_end)
247 shrl $12, %eax
248 movl %eax, pa(max_pfn_mapped)
249
250 /* Do early initialization of the fixmap area */
251 movl $pa(swapper_pg_fixmap)+PDE_IDENT_ATTR,%eax
252 movl %eax,pa(swapper_pg_dir+0xffc)
253 #endif
254 jmp 3f
255 /*
256 * Non-boot CPU entry point; entered from trampoline.S
257 * We can't lgdt here, because lgdt itself uses a data segment, but
258 * we know the trampoline has already loaded the boot_gdt for us.
259 *
260 * If cpu hotplug is not supported then this code can go in init section
261 * which will be freed later
262 */
263
264 #ifndef CONFIG_HOTPLUG_CPU
265 .section .init.text,"ax",@progbits
266 #endif
267
268 #ifdef CONFIG_SMP
269 ENTRY(startup_32_smp)
270 cld
271 movl $(__BOOT_DS),%eax
272 movl %eax,%ds
273 movl %eax,%es
274 movl %eax,%fs
275 movl %eax,%gs
276 #endif /* CONFIG_SMP */
277 3:
278
279 /*
280 * New page tables may be in 4Mbyte page mode and may
281 * be using the global pages.
282 *
283 * NOTE! If we are on a 486 we may have no cr4 at all!
284 * So we do not try to touch it unless we really have
285 * some bits in it to set. This won't work if the BSP
286 * implements cr4 but this AP does not -- very unlikely
287 * but be warned! The same applies to the pse feature
288 * if not equally supported. --macro
289 *
290 * NOTE! We have to correct for the fact that we're
291 * not yet offset PAGE_OFFSET..
292 */
293 #define cr4_bits pa(mmu_cr4_features)
294 movl cr4_bits,%edx
295 andl %edx,%edx
296 jz 6f
297 movl %cr4,%eax # Turn on paging options (PSE,PAE,..)
298 orl %edx,%eax
299 movl %eax,%cr4
300
301 btl $5, %eax # check if PAE is enabled
302 jnc 6f
303
304 /* Check if extended functions are implemented */
305 movl $0x80000000, %eax
306 cpuid
307 cmpl $0x80000000, %eax
308 jbe 6f
309 mov $0x80000001, %eax
310 cpuid
311 /* Execute Disable bit supported? */
312 btl $20, %edx
313 jnc 6f
314
315 /* Setup EFER (Extended Feature Enable Register) */
316 movl $0xc0000080, %ecx
317 rdmsr
318
319 btsl $11, %eax
320 /* Make changes effective */
321 wrmsr
322
323 6:
324
325 /*
326 * Enable paging
327 */
328 movl $pa(swapper_pg_dir),%eax
329 movl %eax,%cr3 /* set the page table pointer.. */
330 movl %cr0,%eax
331 orl $X86_CR0_PG,%eax
332 movl %eax,%cr0 /* ..and set paging (PG) bit */
333 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
334 1:
335 /* Set up the stack pointer */
336 lss stack_start,%esp
337
338 /*
339 * Initialize eflags. Some BIOS's leave bits like NT set. This would
340 * confuse the debugger if this code is traced.
341 * XXX - best to initialize before switching to protected mode.
342 */
343 pushl $0
344 popfl
345
346 #ifdef CONFIG_SMP
347 cmpb $0, ready
348 jz 1f /* Initial CPU cleans BSS */
349 jmp checkCPUtype
350 1:
351 #endif /* CONFIG_SMP */
352
353 /*
354 * start system 32-bit setup. We need to re-do some of the things done
355 * in 16-bit mode for the "real" operations.
356 */
357 call setup_idt
358
359 checkCPUtype:
360
361 movl $-1,X86_CPUID # -1 for no CPUID initially
362
363 /* check if it is 486 or 386. */
364 /*
365 * XXX - this does a lot of unnecessary setup. Alignment checks don't
366 * apply at our cpl of 0 and the stack ought to be aligned already, and
367 * we don't need to preserve eflags.
368 */
369
370 movb $3,X86 # at least 386
371 pushfl # push EFLAGS
372 popl %eax # get EFLAGS
373 movl %eax,%ecx # save original EFLAGS
374 xorl $0x240000,%eax # flip AC and ID bits in EFLAGS
375 pushl %eax # copy to EFLAGS
376 popfl # set EFLAGS
377 pushfl # get new EFLAGS
378 popl %eax # put it in eax
379 xorl %ecx,%eax # change in flags
380 pushl %ecx # restore original EFLAGS
381 popfl
382 testl $0x40000,%eax # check if AC bit changed
383 je is386
384
385 movb $4,X86 # at least 486
386 testl $0x200000,%eax # check if ID bit changed
387 je is486
388
389 /* get vendor info */
390 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
391 cpuid
392 movl %eax,X86_CPUID # save CPUID level
393 movl %ebx,X86_VENDOR_ID # lo 4 chars
394 movl %edx,X86_VENDOR_ID+4 # next 4 chars
395 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
396
397 orl %eax,%eax # do we have processor info as well?
398 je is486
399
400 movl $1,%eax # Use the CPUID instruction to get CPU type
401 cpuid
402 movb %al,%cl # save reg for future use
403 andb $0x0f,%ah # mask processor family
404 movb %ah,X86
405 andb $0xf0,%al # mask model
406 shrb $4,%al
407 movb %al,X86_MODEL
408 andb $0x0f,%cl # mask mask revision
409 movb %cl,X86_MASK
410 movl %edx,X86_CAPABILITY
411
412 is486: movl $0x50022,%ecx # set AM, WP, NE and MP
413 jmp 2f
414
415 is386: movl $2,%ecx # set MP
416 2: movl %cr0,%eax
417 andl $0x80000011,%eax # Save PG,PE,ET
418 orl %ecx,%eax
419 movl %eax,%cr0
420
421 call check_x87
422 lgdt early_gdt_descr
423 lidt idt_descr
424 ljmp $(__KERNEL_CS),$1f
425 1: movl $(__KERNEL_DS),%eax # reload all the segment registers
426 movl %eax,%ss # after changing gdt.
427
428 movl $(__USER_DS),%eax # DS/ES contains default USER segment
429 movl %eax,%ds
430 movl %eax,%es
431
432 movl $(__KERNEL_PERCPU), %eax
433 movl %eax,%fs # set this cpu's percpu
434
435 #ifdef CONFIG_CC_STACKPROTECTOR
436 /*
437 * The linker can't handle this by relocation. Manually set
438 * base address in stack canary segment descriptor.
439 */
440 cmpb $0,ready
441 jne 1f
442 movl $per_cpu__gdt_page,%eax
443 movl $per_cpu__stack_canary,%ecx
444 subl $20, %ecx
445 movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
446 shrl $16, %ecx
447 movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
448 movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
449 1:
450 #endif
451 movl $(__KERNEL_STACK_CANARY),%eax
452 movl %eax,%gs
453
454 xorl %eax,%eax # Clear LDT
455 lldt %ax
456
457 cld # gcc2 wants the direction flag cleared at all times
458 pushl $0 # fake return address for unwinder
459 #ifdef CONFIG_SMP
460 movb ready, %cl
461 movb $1, ready
462 cmpb $0,%cl # the first CPU calls start_kernel
463 je 1f
464 movl (stack_start), %esp
465 1:
466 #endif /* CONFIG_SMP */
467 jmp *(initial_code)
468
469 /*
470 * We depend on ET to be correct. This checks for 287/387.
471 */
472 check_x87:
473 movb $0,X86_HARD_MATH
474 clts
475 fninit
476 fstsw %ax
477 cmpb $0,%al
478 je 1f
479 movl %cr0,%eax /* no coprocessor: have to set bits */
480 xorl $4,%eax /* set EM */
481 movl %eax,%cr0
482 ret
483 ALIGN
484 1: movb $1,X86_HARD_MATH
485 .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
486 ret
487
488 /*
489 * setup_idt
490 *
491 * sets up a idt with 256 entries pointing to
492 * ignore_int, interrupt gates. It doesn't actually load
493 * idt - that can be done only after paging has been enabled
494 * and the kernel moved to PAGE_OFFSET. Interrupts
495 * are enabled elsewhere, when we can be relatively
496 * sure everything is ok.
497 *
498 * Warning: %esi is live across this function.
499 */
500 setup_idt:
501 lea ignore_int,%edx
502 movl $(__KERNEL_CS << 16),%eax
503 movw %dx,%ax /* selector = 0x0010 = cs */
504 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
505
506 lea idt_table,%edi
507 mov $256,%ecx
508 rp_sidt:
509 movl %eax,(%edi)
510 movl %edx,4(%edi)
511 addl $8,%edi
512 dec %ecx
513 jne rp_sidt
514
515 .macro set_early_handler handler,trapno
516 lea \handler,%edx
517 movl $(__KERNEL_CS << 16),%eax
518 movw %dx,%ax
519 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
520 lea idt_table,%edi
521 movl %eax,8*\trapno(%edi)
522 movl %edx,8*\trapno+4(%edi)
523 .endm
524
525 set_early_handler handler=early_divide_err,trapno=0
526 set_early_handler handler=early_illegal_opcode,trapno=6
527 set_early_handler handler=early_protection_fault,trapno=13
528 set_early_handler handler=early_page_fault,trapno=14
529
530 ret
531
532 early_divide_err:
533 xor %edx,%edx
534 pushl $0 /* fake errcode */
535 jmp early_fault
536
537 early_illegal_opcode:
538 movl $6,%edx
539 pushl $0 /* fake errcode */
540 jmp early_fault
541
542 early_protection_fault:
543 movl $13,%edx
544 jmp early_fault
545
546 early_page_fault:
547 movl $14,%edx
548 jmp early_fault
549
550 early_fault:
551 cld
552 #ifdef CONFIG_PRINTK
553 pusha
554 movl $(__KERNEL_DS),%eax
555 movl %eax,%ds
556 movl %eax,%es
557 cmpl $2,early_recursion_flag
558 je hlt_loop
559 incl early_recursion_flag
560 movl %cr2,%eax
561 pushl %eax
562 pushl %edx /* trapno */
563 pushl $fault_msg
564 call printk
565 #endif
566 call dump_stack
567 hlt_loop:
568 hlt
569 jmp hlt_loop
570
571 /* This is the default interrupt "handler" :-) */
572 ALIGN
573 ignore_int:
574 cld
575 #ifdef CONFIG_PRINTK
576 pushl %eax
577 pushl %ecx
578 pushl %edx
579 pushl %es
580 pushl %ds
581 movl $(__KERNEL_DS),%eax
582 movl %eax,%ds
583 movl %eax,%es
584 cmpl $2,early_recursion_flag
585 je hlt_loop
586 incl early_recursion_flag
587 pushl 16(%esp)
588 pushl 24(%esp)
589 pushl 32(%esp)
590 pushl 40(%esp)
591 pushl $int_msg
592 call printk
593
594 call dump_stack
595
596 addl $(5*4),%esp
597 popl %ds
598 popl %es
599 popl %edx
600 popl %ecx
601 popl %eax
602 #endif
603 iret
604
605 .section .cpuinit.data,"wa"
606 .align 4
607 ENTRY(initial_code)
608 .long i386_start_kernel
609
610 .section .text
611 /*
612 * Real beginning of normal "text" segment
613 */
614 ENTRY(stext)
615 ENTRY(_stext)
616
617 /*
618 * BSS section
619 */
620 .section ".bss.page_aligned","wa"
621 .align PAGE_SIZE_asm
622 #ifdef CONFIG_X86_PAE
623 swapper_pg_pmd:
624 .fill 1024*KPMDS,4,0
625 #else
626 ENTRY(swapper_pg_dir)
627 .fill 1024,4,0
628 #endif
629 swapper_pg_fixmap:
630 .fill 1024,4,0
631 ENTRY(empty_zero_page)
632 .fill 4096,1,0
633
634 /*
635 * This starts the data section.
636 */
637 #ifdef CONFIG_X86_PAE
638 .section ".data.page_aligned","wa"
639 /* Page-aligned for the benefit of paravirt? */
640 .align PAGE_SIZE_asm
641 ENTRY(swapper_pg_dir)
642 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */
643 # if KPMDS == 3
644 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0
645 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x1000),0
646 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x2000),0
647 # elif KPMDS == 2
648 .long 0,0
649 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0
650 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x1000),0
651 # elif KPMDS == 1
652 .long 0,0
653 .long 0,0
654 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0
655 # else
656 # error "Kernel PMDs should be 1, 2 or 3"
657 # endif
658 .align PAGE_SIZE_asm /* needs to be page-sized too */
659 #endif
660
661 .data
662 ENTRY(stack_start)
663 .long init_thread_union+THREAD_SIZE
664 .long __BOOT_DS
665
666 ready: .byte 0
667
668 early_recursion_flag:
669 .long 0
670
671 int_msg:
672 .asciz "Unknown interrupt or fault at: %p %p %p\n"
673
674 fault_msg:
675 /* fault info: */
676 .ascii "BUG: Int %d: CR2 %p\n"
677 /* pusha regs: */
678 .ascii " EDI %p ESI %p EBP %p ESP %p\n"
679 .ascii " EBX %p EDX %p ECX %p EAX %p\n"
680 /* fault frame: */
681 .ascii " err %p EIP %p CS %p flg %p\n"
682 .ascii "Stack: %p %p %p %p %p %p %p %p\n"
683 .ascii " %p %p %p %p %p %p %p %p\n"
684 .asciz " %p %p %p %p %p %p %p %p\n"
685
686 #include "../../x86/xen/xen-head.S"
687
688 /*
689 * The IDT and GDT 'descriptors' are a strange 48-bit object
690 * only used by the lidt and lgdt instructions. They are not
691 * like usual segment descriptors - they consist of a 16-bit
692 * segment size, and 32-bit linear address value:
693 */
694
695 .globl boot_gdt_descr
696 .globl idt_descr
697
698 ALIGN
699 # early boot GDT descriptor (must use 1:1 address mapping)
700 .word 0 # 32 bit align gdt_desc.address
701 boot_gdt_descr:
702 .word __BOOT_DS+7
703 .long boot_gdt - __PAGE_OFFSET
704
705 .word 0 # 32-bit align idt_desc.address
706 idt_descr:
707 .word IDT_ENTRIES*8-1 # idt contains 256 entries
708 .long idt_table
709
710 # boot GDT descriptor (later on used by CPU#0):
711 .word 0 # 32 bit align gdt_desc.address
712 ENTRY(early_gdt_descr)
713 .word GDT_ENTRIES*8-1
714 .long per_cpu__gdt_page /* Overwritten for secondary CPUs */
715
716 /*
717 * The boot_gdt must mirror the equivalent in setup.S and is
718 * used only for booting.
719 */
720 .align L1_CACHE_BYTES
721 ENTRY(boot_gdt)
722 .fill GDT_ENTRY_BOOT_CS,8,0
723 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
724 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */
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