x86: allow extend_brk users to reserve brk space
[deliverable/linux.git] / arch / x86 / kernel / head_32.S
1 /*
2 *
3 * Copyright (C) 1991, 1992 Linus Torvalds
4 *
5 * Enhanced CPU detection and feature setting code by Mike Jagdis
6 * and Martin Mares, November 1997.
7 */
8
9 .text
10 #include <linux/threads.h>
11 #include <linux/init.h>
12 #include <linux/linkage.h>
13 #include <asm/segment.h>
14 #include <asm/page_types.h>
15 #include <asm/pgtable_types.h>
16 #include <asm/desc.h>
17 #include <asm/cache.h>
18 #include <asm/thread_info.h>
19 #include <asm/asm-offsets.h>
20 #include <asm/setup.h>
21 #include <asm/processor-flags.h>
22 #include <asm/percpu.h>
23
24 /* Physical address */
25 #define pa(X) ((X) - __PAGE_OFFSET)
26
27 /*
28 * References to members of the new_cpu_data structure.
29 */
30
31 #define X86 new_cpu_data+CPUINFO_x86
32 #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
33 #define X86_MODEL new_cpu_data+CPUINFO_x86_model
34 #define X86_MASK new_cpu_data+CPUINFO_x86_mask
35 #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
36 #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
37 #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
38 #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
39
40 /*
41 * This is how much memory *in addition to the memory covered up to
42 * and including _end* we need mapped initially.
43 * We need:
44 * - one bit for each possible page, but only in low memory, which means
45 * 2^32/4096/8 = 128K worst case (4G/4G split.)
46 * - enough space to map all low memory, which means
47 * (2^32/4096) / 1024 pages (worst case, non PAE)
48 * (2^32/4096) / 512 + 4 pages (worst case for PAE)
49 * - a few pages for allocator use before the kernel pagetable has
50 * been set up
51 *
52 * Modulo rounding, each megabyte assigned here requires a kilobyte of
53 * memory, which is currently unreclaimed.
54 *
55 * This should be a multiple of a page.
56 */
57 LOW_PAGES = (KERNEL_IMAGE_SIZE + PAGE_SIZE_asm - 1)>>PAGE_SHIFT
58
59 /*
60 * To preserve the DMA pool in PAGEALLOC kernels, we'll allocate
61 * pagetables from above the 16MB DMA limit, so we'll have to set
62 * up pagetables 16MB more (worst-case):
63 */
64 #ifdef CONFIG_DEBUG_PAGEALLOC
65 LOW_PAGES = LOW_PAGES + 0x1000000
66 #endif
67
68 #if PTRS_PER_PMD > 1
69 PAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PMD) + PTRS_PER_PGD
70 #else
71 PAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PGD)
72 #endif
73 BOOTBITMAP_SIZE = LOW_PAGES / 8
74 ALLOCATOR_SLOP = 4
75
76 INIT_MAP_BEYOND_END = BOOTBITMAP_SIZE + (PAGE_TABLE_SIZE + ALLOCATOR_SLOP)*PAGE_SIZE_asm
77
78 RESERVE_BRK(pagetables, PAGE_TABLE_SIZE * PAGE_SIZE)
79
80 /*
81 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
82 * %esi points to the real-mode code as a 32-bit pointer.
83 * CS and DS must be 4 GB flat segments, but we don't depend on
84 * any particular GDT layout, because we load our own as soon as we
85 * can.
86 */
87 .section .text.head,"ax",@progbits
88 ENTRY(startup_32)
89 /* test KEEP_SEGMENTS flag to see if the bootloader is asking
90 us to not reload segments */
91 testb $(1<<6), BP_loadflags(%esi)
92 jnz 2f
93
94 /*
95 * Set segments to known values.
96 */
97 lgdt pa(boot_gdt_descr)
98 movl $(__BOOT_DS),%eax
99 movl %eax,%ds
100 movl %eax,%es
101 movl %eax,%fs
102 movl %eax,%gs
103 2:
104
105 /*
106 * Clear BSS first so that there are no surprises...
107 */
108 cld
109 xorl %eax,%eax
110 movl $pa(__bss_start),%edi
111 movl $pa(__bss_stop),%ecx
112 subl %edi,%ecx
113 shrl $2,%ecx
114 rep ; stosl
115 /*
116 * Copy bootup parameters out of the way.
117 * Note: %esi still has the pointer to the real-mode data.
118 * With the kexec as boot loader, parameter segment might be loaded beyond
119 * kernel image and might not even be addressable by early boot page tables.
120 * (kexec on panic case). Hence copy out the parameters before initializing
121 * page tables.
122 */
123 movl $pa(boot_params),%edi
124 movl $(PARAM_SIZE/4),%ecx
125 cld
126 rep
127 movsl
128 movl pa(boot_params) + NEW_CL_POINTER,%esi
129 andl %esi,%esi
130 jz 1f # No comand line
131 movl $pa(boot_command_line),%edi
132 movl $(COMMAND_LINE_SIZE/4),%ecx
133 rep
134 movsl
135 1:
136
137 #ifdef CONFIG_PARAVIRT
138 /* This is can only trip for a broken bootloader... */
139 cmpw $0x207, pa(boot_params + BP_version)
140 jb default_entry
141
142 /* Paravirt-compatible boot parameters. Look to see what architecture
143 we're booting under. */
144 movl pa(boot_params + BP_hardware_subarch), %eax
145 cmpl $num_subarch_entries, %eax
146 jae bad_subarch
147
148 movl pa(subarch_entries)(,%eax,4), %eax
149 subl $__PAGE_OFFSET, %eax
150 jmp *%eax
151
152 bad_subarch:
153 WEAK(lguest_entry)
154 WEAK(xen_entry)
155 /* Unknown implementation; there's really
156 nothing we can do at this point. */
157 ud2a
158
159 __INITDATA
160
161 subarch_entries:
162 .long default_entry /* normal x86/PC */
163 .long lguest_entry /* lguest hypervisor */
164 .long xen_entry /* Xen hypervisor */
165 num_subarch_entries = (. - subarch_entries) / 4
166 .previous
167 #endif /* CONFIG_PARAVIRT */
168
169 /*
170 * Initialize page tables. This creates a PDE and a set of page
171 * tables, which are located immediately beyond _end. The variable
172 * _brk_end is set up to point to the first "safe" location.
173 * Mappings are created both at virtual address 0 (identity mapping)
174 * and PAGE_OFFSET for up to _end+sizeof(page tables)+INIT_MAP_BEYOND_END.
175 *
176 * Note that the stack is not yet set up!
177 */
178 default_entry:
179 #ifdef CONFIG_X86_PAE
180
181 /*
182 * In PAE mode swapper_pg_dir is statically defined to contain enough
183 * entries to cover the VMSPLIT option (that is the top 1, 2 or 3
184 * entries). The identity mapping is handled by pointing two PGD
185 * entries to the first kernel PMD.
186 *
187 * Note the upper half of each PMD or PTE are always zero at
188 * this stage.
189 */
190
191 #define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
192
193 xorl %ebx,%ebx /* %ebx is kept at zero */
194
195 movl $pa(__brk_base), %edi
196 movl $pa(swapper_pg_pmd), %edx
197 movl $PTE_IDENT_ATTR, %eax
198 10:
199 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */
200 movl %ecx,(%edx) /* Store PMD entry */
201 /* Upper half already zero */
202 addl $8,%edx
203 movl $512,%ecx
204 11:
205 stosl
206 xchgl %eax,%ebx
207 stosl
208 xchgl %eax,%ebx
209 addl $0x1000,%eax
210 loop 11b
211
212 /*
213 * End condition: we must map up to and including INIT_MAP_BEYOND_END
214 * bytes beyond the end of our own page tables.
215 */
216 leal (INIT_MAP_BEYOND_END+PTE_IDENT_ATTR)(%edi),%ebp
217 cmpl %ebp,%eax
218 jb 10b
219 1:
220 addl $__PAGE_OFFSET, %edi
221 movl %edi, pa(_brk_end)
222 shrl $12, %eax
223 movl %eax, pa(max_pfn_mapped)
224
225 /* Do early initialization of the fixmap area */
226 movl $pa(swapper_pg_fixmap)+PDE_IDENT_ATTR,%eax
227 movl %eax,pa(swapper_pg_pmd+0x1000*KPMDS-8)
228 #else /* Not PAE */
229
230 page_pde_offset = (__PAGE_OFFSET >> 20);
231
232 movl $pa(__brk_base), %edi
233 movl $pa(swapper_pg_dir), %edx
234 movl $PTE_IDENT_ATTR, %eax
235 10:
236 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */
237 movl %ecx,(%edx) /* Store identity PDE entry */
238 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
239 addl $4,%edx
240 movl $1024, %ecx
241 11:
242 stosl
243 addl $0x1000,%eax
244 loop 11b
245 /*
246 * End condition: we must map up to and including INIT_MAP_BEYOND_END
247 * bytes beyond the end of our own page tables; the +0x007 is
248 * the attribute bits
249 */
250 leal (INIT_MAP_BEYOND_END+PTE_IDENT_ATTR)(%edi),%ebp
251 cmpl %ebp,%eax
252 jb 10b
253 addl $__PAGE_OFFSET, %edi
254 movl %edi, pa(_brk_end)
255 shrl $12, %eax
256 movl %eax, pa(max_pfn_mapped)
257
258 /* Do early initialization of the fixmap area */
259 movl $pa(swapper_pg_fixmap)+PDE_IDENT_ATTR,%eax
260 movl %eax,pa(swapper_pg_dir+0xffc)
261 #endif
262 jmp 3f
263 /*
264 * Non-boot CPU entry point; entered from trampoline.S
265 * We can't lgdt here, because lgdt itself uses a data segment, but
266 * we know the trampoline has already loaded the boot_gdt for us.
267 *
268 * If cpu hotplug is not supported then this code can go in init section
269 * which will be freed later
270 */
271
272 #ifndef CONFIG_HOTPLUG_CPU
273 .section .init.text,"ax",@progbits
274 #endif
275
276 #ifdef CONFIG_SMP
277 ENTRY(startup_32_smp)
278 cld
279 movl $(__BOOT_DS),%eax
280 movl %eax,%ds
281 movl %eax,%es
282 movl %eax,%fs
283 movl %eax,%gs
284 #endif /* CONFIG_SMP */
285 3:
286
287 /*
288 * New page tables may be in 4Mbyte page mode and may
289 * be using the global pages.
290 *
291 * NOTE! If we are on a 486 we may have no cr4 at all!
292 * So we do not try to touch it unless we really have
293 * some bits in it to set. This won't work if the BSP
294 * implements cr4 but this AP does not -- very unlikely
295 * but be warned! The same applies to the pse feature
296 * if not equally supported. --macro
297 *
298 * NOTE! We have to correct for the fact that we're
299 * not yet offset PAGE_OFFSET..
300 */
301 #define cr4_bits pa(mmu_cr4_features)
302 movl cr4_bits,%edx
303 andl %edx,%edx
304 jz 6f
305 movl %cr4,%eax # Turn on paging options (PSE,PAE,..)
306 orl %edx,%eax
307 movl %eax,%cr4
308
309 btl $5, %eax # check if PAE is enabled
310 jnc 6f
311
312 /* Check if extended functions are implemented */
313 movl $0x80000000, %eax
314 cpuid
315 cmpl $0x80000000, %eax
316 jbe 6f
317 mov $0x80000001, %eax
318 cpuid
319 /* Execute Disable bit supported? */
320 btl $20, %edx
321 jnc 6f
322
323 /* Setup EFER (Extended Feature Enable Register) */
324 movl $0xc0000080, %ecx
325 rdmsr
326
327 btsl $11, %eax
328 /* Make changes effective */
329 wrmsr
330
331 6:
332
333 /*
334 * Enable paging
335 */
336 movl $pa(swapper_pg_dir),%eax
337 movl %eax,%cr3 /* set the page table pointer.. */
338 movl %cr0,%eax
339 orl $X86_CR0_PG,%eax
340 movl %eax,%cr0 /* ..and set paging (PG) bit */
341 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
342 1:
343 /* Set up the stack pointer */
344 lss stack_start,%esp
345
346 /*
347 * Initialize eflags. Some BIOS's leave bits like NT set. This would
348 * confuse the debugger if this code is traced.
349 * XXX - best to initialize before switching to protected mode.
350 */
351 pushl $0
352 popfl
353
354 #ifdef CONFIG_SMP
355 cmpb $0, ready
356 jz 1f /* Initial CPU cleans BSS */
357 jmp checkCPUtype
358 1:
359 #endif /* CONFIG_SMP */
360
361 /*
362 * start system 32-bit setup. We need to re-do some of the things done
363 * in 16-bit mode for the "real" operations.
364 */
365 call setup_idt
366
367 checkCPUtype:
368
369 movl $-1,X86_CPUID # -1 for no CPUID initially
370
371 /* check if it is 486 or 386. */
372 /*
373 * XXX - this does a lot of unnecessary setup. Alignment checks don't
374 * apply at our cpl of 0 and the stack ought to be aligned already, and
375 * we don't need to preserve eflags.
376 */
377
378 movb $3,X86 # at least 386
379 pushfl # push EFLAGS
380 popl %eax # get EFLAGS
381 movl %eax,%ecx # save original EFLAGS
382 xorl $0x240000,%eax # flip AC and ID bits in EFLAGS
383 pushl %eax # copy to EFLAGS
384 popfl # set EFLAGS
385 pushfl # get new EFLAGS
386 popl %eax # put it in eax
387 xorl %ecx,%eax # change in flags
388 pushl %ecx # restore original EFLAGS
389 popfl
390 testl $0x40000,%eax # check if AC bit changed
391 je is386
392
393 movb $4,X86 # at least 486
394 testl $0x200000,%eax # check if ID bit changed
395 je is486
396
397 /* get vendor info */
398 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
399 cpuid
400 movl %eax,X86_CPUID # save CPUID level
401 movl %ebx,X86_VENDOR_ID # lo 4 chars
402 movl %edx,X86_VENDOR_ID+4 # next 4 chars
403 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
404
405 orl %eax,%eax # do we have processor info as well?
406 je is486
407
408 movl $1,%eax # Use the CPUID instruction to get CPU type
409 cpuid
410 movb %al,%cl # save reg for future use
411 andb $0x0f,%ah # mask processor family
412 movb %ah,X86
413 andb $0xf0,%al # mask model
414 shrb $4,%al
415 movb %al,X86_MODEL
416 andb $0x0f,%cl # mask mask revision
417 movb %cl,X86_MASK
418 movl %edx,X86_CAPABILITY
419
420 is486: movl $0x50022,%ecx # set AM, WP, NE and MP
421 jmp 2f
422
423 is386: movl $2,%ecx # set MP
424 2: movl %cr0,%eax
425 andl $0x80000011,%eax # Save PG,PE,ET
426 orl %ecx,%eax
427 movl %eax,%cr0
428
429 call check_x87
430 lgdt early_gdt_descr
431 lidt idt_descr
432 ljmp $(__KERNEL_CS),$1f
433 1: movl $(__KERNEL_DS),%eax # reload all the segment registers
434 movl %eax,%ss # after changing gdt.
435
436 movl $(__USER_DS),%eax # DS/ES contains default USER segment
437 movl %eax,%ds
438 movl %eax,%es
439
440 movl $(__KERNEL_PERCPU), %eax
441 movl %eax,%fs # set this cpu's percpu
442
443 #ifdef CONFIG_CC_STACKPROTECTOR
444 /*
445 * The linker can't handle this by relocation. Manually set
446 * base address in stack canary segment descriptor.
447 */
448 cmpb $0,ready
449 jne 1f
450 movl $per_cpu__gdt_page,%eax
451 movl $per_cpu__stack_canary,%ecx
452 subl $20, %ecx
453 movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
454 shrl $16, %ecx
455 movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
456 movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
457 1:
458 #endif
459 movl $(__KERNEL_STACK_CANARY),%eax
460 movl %eax,%gs
461
462 xorl %eax,%eax # Clear LDT
463 lldt %ax
464
465 cld # gcc2 wants the direction flag cleared at all times
466 pushl $0 # fake return address for unwinder
467 #ifdef CONFIG_SMP
468 movb ready, %cl
469 movb $1, ready
470 cmpb $0,%cl # the first CPU calls start_kernel
471 je 1f
472 movl (stack_start), %esp
473 1:
474 #endif /* CONFIG_SMP */
475 jmp *(initial_code)
476
477 /*
478 * We depend on ET to be correct. This checks for 287/387.
479 */
480 check_x87:
481 movb $0,X86_HARD_MATH
482 clts
483 fninit
484 fstsw %ax
485 cmpb $0,%al
486 je 1f
487 movl %cr0,%eax /* no coprocessor: have to set bits */
488 xorl $4,%eax /* set EM */
489 movl %eax,%cr0
490 ret
491 ALIGN
492 1: movb $1,X86_HARD_MATH
493 .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
494 ret
495
496 /*
497 * setup_idt
498 *
499 * sets up a idt with 256 entries pointing to
500 * ignore_int, interrupt gates. It doesn't actually load
501 * idt - that can be done only after paging has been enabled
502 * and the kernel moved to PAGE_OFFSET. Interrupts
503 * are enabled elsewhere, when we can be relatively
504 * sure everything is ok.
505 *
506 * Warning: %esi is live across this function.
507 */
508 setup_idt:
509 lea ignore_int,%edx
510 movl $(__KERNEL_CS << 16),%eax
511 movw %dx,%ax /* selector = 0x0010 = cs */
512 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
513
514 lea idt_table,%edi
515 mov $256,%ecx
516 rp_sidt:
517 movl %eax,(%edi)
518 movl %edx,4(%edi)
519 addl $8,%edi
520 dec %ecx
521 jne rp_sidt
522
523 .macro set_early_handler handler,trapno
524 lea \handler,%edx
525 movl $(__KERNEL_CS << 16),%eax
526 movw %dx,%ax
527 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
528 lea idt_table,%edi
529 movl %eax,8*\trapno(%edi)
530 movl %edx,8*\trapno+4(%edi)
531 .endm
532
533 set_early_handler handler=early_divide_err,trapno=0
534 set_early_handler handler=early_illegal_opcode,trapno=6
535 set_early_handler handler=early_protection_fault,trapno=13
536 set_early_handler handler=early_page_fault,trapno=14
537
538 ret
539
540 early_divide_err:
541 xor %edx,%edx
542 pushl $0 /* fake errcode */
543 jmp early_fault
544
545 early_illegal_opcode:
546 movl $6,%edx
547 pushl $0 /* fake errcode */
548 jmp early_fault
549
550 early_protection_fault:
551 movl $13,%edx
552 jmp early_fault
553
554 early_page_fault:
555 movl $14,%edx
556 jmp early_fault
557
558 early_fault:
559 cld
560 #ifdef CONFIG_PRINTK
561 pusha
562 movl $(__KERNEL_DS),%eax
563 movl %eax,%ds
564 movl %eax,%es
565 cmpl $2,early_recursion_flag
566 je hlt_loop
567 incl early_recursion_flag
568 movl %cr2,%eax
569 pushl %eax
570 pushl %edx /* trapno */
571 pushl $fault_msg
572 call printk
573 #endif
574 call dump_stack
575 hlt_loop:
576 hlt
577 jmp hlt_loop
578
579 /* This is the default interrupt "handler" :-) */
580 ALIGN
581 ignore_int:
582 cld
583 #ifdef CONFIG_PRINTK
584 pushl %eax
585 pushl %ecx
586 pushl %edx
587 pushl %es
588 pushl %ds
589 movl $(__KERNEL_DS),%eax
590 movl %eax,%ds
591 movl %eax,%es
592 cmpl $2,early_recursion_flag
593 je hlt_loop
594 incl early_recursion_flag
595 pushl 16(%esp)
596 pushl 24(%esp)
597 pushl 32(%esp)
598 pushl 40(%esp)
599 pushl $int_msg
600 call printk
601
602 call dump_stack
603
604 addl $(5*4),%esp
605 popl %ds
606 popl %es
607 popl %edx
608 popl %ecx
609 popl %eax
610 #endif
611 iret
612
613 .section .cpuinit.data,"wa"
614 .align 4
615 ENTRY(initial_code)
616 .long i386_start_kernel
617
618 .section .text
619 /*
620 * Real beginning of normal "text" segment
621 */
622 ENTRY(stext)
623 ENTRY(_stext)
624
625 /*
626 * BSS section
627 */
628 .section ".bss.page_aligned","wa"
629 .align PAGE_SIZE_asm
630 #ifdef CONFIG_X86_PAE
631 swapper_pg_pmd:
632 .fill 1024*KPMDS,4,0
633 #else
634 ENTRY(swapper_pg_dir)
635 .fill 1024,4,0
636 #endif
637 swapper_pg_fixmap:
638 .fill 1024,4,0
639 ENTRY(empty_zero_page)
640 .fill 4096,1,0
641 /*
642 * This starts the data section.
643 */
644 #ifdef CONFIG_X86_PAE
645 .section ".data.page_aligned","wa"
646 /* Page-aligned for the benefit of paravirt? */
647 .align PAGE_SIZE_asm
648 ENTRY(swapper_pg_dir)
649 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */
650 # if KPMDS == 3
651 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0
652 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x1000),0
653 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x2000),0
654 # elif KPMDS == 2
655 .long 0,0
656 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0
657 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x1000),0
658 # elif KPMDS == 1
659 .long 0,0
660 .long 0,0
661 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0
662 # else
663 # error "Kernel PMDs should be 1, 2 or 3"
664 # endif
665 .align PAGE_SIZE_asm /* needs to be page-sized too */
666 #endif
667
668 .data
669 ENTRY(stack_start)
670 .long init_thread_union+THREAD_SIZE
671 .long __BOOT_DS
672
673 ready: .byte 0
674
675 early_recursion_flag:
676 .long 0
677
678 int_msg:
679 .asciz "Unknown interrupt or fault at: %p %p %p\n"
680
681 fault_msg:
682 /* fault info: */
683 .ascii "BUG: Int %d: CR2 %p\n"
684 /* pusha regs: */
685 .ascii " EDI %p ESI %p EBP %p ESP %p\n"
686 .ascii " EBX %p EDX %p ECX %p EAX %p\n"
687 /* fault frame: */
688 .ascii " err %p EIP %p CS %p flg %p\n"
689 .ascii "Stack: %p %p %p %p %p %p %p %p\n"
690 .ascii " %p %p %p %p %p %p %p %p\n"
691 .asciz " %p %p %p %p %p %p %p %p\n"
692
693 #include "../../x86/xen/xen-head.S"
694
695 /*
696 * The IDT and GDT 'descriptors' are a strange 48-bit object
697 * only used by the lidt and lgdt instructions. They are not
698 * like usual segment descriptors - they consist of a 16-bit
699 * segment size, and 32-bit linear address value:
700 */
701
702 .globl boot_gdt_descr
703 .globl idt_descr
704
705 ALIGN
706 # early boot GDT descriptor (must use 1:1 address mapping)
707 .word 0 # 32 bit align gdt_desc.address
708 boot_gdt_descr:
709 .word __BOOT_DS+7
710 .long boot_gdt - __PAGE_OFFSET
711
712 .word 0 # 32-bit align idt_desc.address
713 idt_descr:
714 .word IDT_ENTRIES*8-1 # idt contains 256 entries
715 .long idt_table
716
717 # boot GDT descriptor (later on used by CPU#0):
718 .word 0 # 32 bit align gdt_desc.address
719 ENTRY(early_gdt_descr)
720 .word GDT_ENTRIES*8-1
721 .long per_cpu__gdt_page /* Overwritten for secondary CPUs */
722
723 /*
724 * The boot_gdt must mirror the equivalent in setup.S and is
725 * used only for booting.
726 */
727 .align L1_CACHE_BYTES
728 ENTRY(boot_gdt)
729 .fill GDT_ENTRY_BOOT_CS,8,0
730 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
731 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */
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