1 #include <linux/clocksource.h>
2 #include <linux/clockchips.h>
3 #include <linux/interrupt.h>
4 #include <linux/sysdev.h>
5 #include <linux/delay.h>
6 #include <linux/errno.h>
7 #include <linux/hpet.h>
8 #include <linux/init.h>
13 #include <asm/fixmap.h>
14 #include <asm/i8253.h>
17 #define HPET_MASK CLOCKSOURCE_MASK(32)
22 #define FSEC_PER_NSEC 1000000L
24 #define HPET_DEV_USED_BIT 2
25 #define HPET_DEV_USED (1 << HPET_DEV_USED_BIT)
26 #define HPET_DEV_VALID 0x8
27 #define HPET_DEV_FSB_CAP 0x1000
28 #define HPET_DEV_PERI_CAP 0x2000
30 #define EVT_TO_HPET_DEV(evt) container_of(evt, struct hpet_dev, evt)
33 * HPET address is set in acpi/boot.c, when an ACPI entry exists
35 unsigned long hpet_address
;
36 unsigned long hpet_num_timers
;
37 static void __iomem
*hpet_virt_address
;
40 struct clock_event_device evt
;
48 static struct hpet_dev
*hpet_devs
;
50 static DEFINE_PER_CPU(struct hpet_dev
*, cpu_hpet_dev
);
52 unsigned long hpet_readl(unsigned long a
)
54 return readl(hpet_virt_address
+ a
);
57 static inline void hpet_writel(unsigned long d
, unsigned long a
)
59 writel(d
, hpet_virt_address
+ a
);
63 #include <asm/pgtable.h>
66 static inline void hpet_set_mapping(void)
68 hpet_virt_address
= ioremap_nocache(hpet_address
, HPET_MMAP_SIZE
);
70 __set_fixmap(VSYSCALL_HPET
, hpet_address
, PAGE_KERNEL_VSYSCALL_NOCACHE
);
74 static inline void hpet_clear_mapping(void)
76 iounmap(hpet_virt_address
);
77 hpet_virt_address
= NULL
;
81 * HPET command line enable / disable
83 static int boot_hpet_disable
;
86 static int __init
hpet_setup(char *str
)
89 if (!strncmp("disable", str
, 7))
90 boot_hpet_disable
= 1;
91 if (!strncmp("force", str
, 5))
96 __setup("hpet=", hpet_setup
);
98 static int __init
disable_hpet(char *str
)
100 boot_hpet_disable
= 1;
103 __setup("nohpet", disable_hpet
);
105 static inline int is_hpet_capable(void)
107 return !boot_hpet_disable
&& hpet_address
;
111 * HPET timer interrupt enable / disable
113 static int hpet_legacy_int_enabled
;
116 * is_hpet_enabled - check whether the hpet timer interrupt is enabled
118 int is_hpet_enabled(void)
120 return is_hpet_capable() && hpet_legacy_int_enabled
;
122 EXPORT_SYMBOL_GPL(is_hpet_enabled
);
125 * When the hpet driver (/dev/hpet) is enabled, we need to reserve
126 * timer 0 and timer 1 in case of RTC emulation.
129 static void hpet_reserve_msi_timers(struct hpet_data
*hd
)
136 for (i
= 0; i
< hpet_num_timers
; i
++) {
137 struct hpet_dev
*hdev
= &hpet_devs
[i
];
139 if (!(hdev
->flags
& HPET_DEV_VALID
))
142 hd
->hd_irq
[hdev
->num
] = hdev
->irq
;
143 hpet_reserve_timer(hd
, hdev
->num
);
147 static void hpet_reserve_platform_timers(unsigned long id
)
149 struct hpet __iomem
*hpet
= hpet_virt_address
;
150 struct hpet_timer __iomem
*timer
= &hpet
->hpet_timers
[2];
151 unsigned int nrtimers
, i
;
154 nrtimers
= ((id
& HPET_ID_NUMBER
) >> HPET_ID_NUMBER_SHIFT
) + 1;
156 memset(&hd
, 0, sizeof(hd
));
157 hd
.hd_phys_address
= hpet_address
;
158 hd
.hd_address
= hpet
;
159 hd
.hd_nirqs
= nrtimers
;
160 hpet_reserve_timer(&hd
, 0);
162 #ifdef CONFIG_HPET_EMULATE_RTC
163 hpet_reserve_timer(&hd
, 1);
167 * NOTE that hd_irq[] reflects IOAPIC input pins (LEGACY_8254
168 * is wrong for i8259!) not the output IRQ. Many BIOS writers
169 * don't bother configuring *any* comparator interrupts.
171 hd
.hd_irq
[0] = HPET_LEGACY_8254
;
172 hd
.hd_irq
[1] = HPET_LEGACY_RTC
;
174 for (i
= 2; i
< nrtimers
; timer
++, i
++) {
175 hd
.hd_irq
[i
] = (readl(&timer
->hpet_config
) &
176 Tn_INT_ROUTE_CNF_MASK
) >> Tn_INT_ROUTE_CNF_SHIFT
;
179 hpet_reserve_msi_timers(&hd
);
185 static void hpet_reserve_platform_timers(unsigned long id
) { }
191 static unsigned long hpet_period
;
193 static void hpet_legacy_set_mode(enum clock_event_mode mode
,
194 struct clock_event_device
*evt
);
195 static int hpet_legacy_next_event(unsigned long delta
,
196 struct clock_event_device
*evt
);
199 * The hpet clock event device
201 static struct clock_event_device hpet_clockevent
= {
203 .features
= CLOCK_EVT_FEAT_PERIODIC
| CLOCK_EVT_FEAT_ONESHOT
,
204 .set_mode
= hpet_legacy_set_mode
,
205 .set_next_event
= hpet_legacy_next_event
,
211 static void hpet_start_counter(void)
213 unsigned long cfg
= hpet_readl(HPET_CFG
);
215 cfg
&= ~HPET_CFG_ENABLE
;
216 hpet_writel(cfg
, HPET_CFG
);
217 hpet_writel(0, HPET_COUNTER
);
218 hpet_writel(0, HPET_COUNTER
+ 4);
219 cfg
|= HPET_CFG_ENABLE
;
220 hpet_writel(cfg
, HPET_CFG
);
223 static void hpet_resume_device(void)
228 static void hpet_restart_counter(void)
230 hpet_resume_device();
231 hpet_start_counter();
234 static void hpet_enable_legacy_int(void)
236 unsigned long cfg
= hpet_readl(HPET_CFG
);
238 cfg
|= HPET_CFG_LEGACY
;
239 hpet_writel(cfg
, HPET_CFG
);
240 hpet_legacy_int_enabled
= 1;
243 static void hpet_legacy_clockevent_register(void)
245 /* Start HPET legacy interrupts */
246 hpet_enable_legacy_int();
249 * The mult factor is defined as (include/linux/clockchips.h)
250 * mult/2^shift = cyc/ns (in contrast to ns/cyc in clocksource.h)
251 * hpet_period is in units of femtoseconds (per cycle), so
252 * mult/2^shift = cyc/ns = 10^6/hpet_period
253 * mult = (10^6 * 2^shift)/hpet_period
254 * mult = (FSEC_PER_NSEC << hpet_clockevent.shift)/hpet_period
256 hpet_clockevent
.mult
= div_sc((unsigned long) FSEC_PER_NSEC
,
257 hpet_period
, hpet_clockevent
.shift
);
258 /* Calculate the min / max delta */
259 hpet_clockevent
.max_delta_ns
= clockevent_delta2ns(0x7FFFFFFF,
261 /* 5 usec minimum reprogramming delta. */
262 hpet_clockevent
.min_delta_ns
= 5000;
265 * Start hpet with the boot cpu mask and make it
266 * global after the IO_APIC has been initialized.
268 hpet_clockevent
.cpumask
= cpumask_of_cpu(smp_processor_id());
269 clockevents_register_device(&hpet_clockevent
);
270 global_clock_event
= &hpet_clockevent
;
271 printk(KERN_DEBUG
"hpet clockevent registered\n");
274 static int hpet_setup_msi_irq(unsigned int irq
);
276 static void hpet_set_mode(enum clock_event_mode mode
,
277 struct clock_event_device
*evt
, int timer
)
279 unsigned long cfg
, cmp
, now
;
283 case CLOCK_EVT_MODE_PERIODIC
:
284 delta
= ((uint64_t)(NSEC_PER_SEC
/HZ
)) * evt
->mult
;
285 delta
>>= evt
->shift
;
286 now
= hpet_readl(HPET_COUNTER
);
287 cmp
= now
+ (unsigned long) delta
;
288 cfg
= hpet_readl(HPET_Tn_CFG(timer
));
289 cfg
|= HPET_TN_ENABLE
| HPET_TN_PERIODIC
|
290 HPET_TN_SETVAL
| HPET_TN_32BIT
;
291 hpet_writel(cfg
, HPET_Tn_CFG(timer
));
293 * The first write after writing TN_SETVAL to the
294 * config register sets the counter value, the second
295 * write sets the period.
297 hpet_writel(cmp
, HPET_Tn_CMP(timer
));
299 hpet_writel((unsigned long) delta
, HPET_Tn_CMP(timer
));
302 case CLOCK_EVT_MODE_ONESHOT
:
303 cfg
= hpet_readl(HPET_Tn_CFG(timer
));
304 cfg
&= ~HPET_TN_PERIODIC
;
305 cfg
|= HPET_TN_ENABLE
| HPET_TN_32BIT
;
306 hpet_writel(cfg
, HPET_Tn_CFG(timer
));
309 case CLOCK_EVT_MODE_UNUSED
:
310 case CLOCK_EVT_MODE_SHUTDOWN
:
311 cfg
= hpet_readl(HPET_Tn_CFG(timer
));
312 cfg
&= ~HPET_TN_ENABLE
;
313 hpet_writel(cfg
, HPET_Tn_CFG(timer
));
316 case CLOCK_EVT_MODE_RESUME
:
318 hpet_enable_legacy_int();
320 struct hpet_dev
*hdev
= EVT_TO_HPET_DEV(evt
);
321 hpet_setup_msi_irq(hdev
->irq
);
322 disable_irq(hdev
->irq
);
323 irq_set_affinity(hdev
->irq
, cpumask_of_cpu(hdev
->cpu
));
324 enable_irq(hdev
->irq
);
330 static int hpet_next_event(unsigned long delta
,
331 struct clock_event_device
*evt
, int timer
)
335 cnt
= hpet_readl(HPET_COUNTER
);
337 hpet_writel(cnt
, HPET_Tn_CMP(timer
));
340 * We need to read back the CMP register to make sure that
341 * what we wrote hit the chip before we compare it to the
344 WARN_ON((u32
)hpet_readl(HPET_T0_CMP
) != cnt
);
346 return (s32
)((u32
)hpet_readl(HPET_COUNTER
) - cnt
) >= 0 ? -ETIME
: 0;
349 static void hpet_legacy_set_mode(enum clock_event_mode mode
,
350 struct clock_event_device
*evt
)
352 hpet_set_mode(mode
, evt
, 0);
355 static int hpet_legacy_next_event(unsigned long delta
,
356 struct clock_event_device
*evt
)
358 return hpet_next_event(delta
, evt
, 0);
364 #ifdef CONFIG_PCI_MSI
365 void hpet_msi_unmask(unsigned int irq
)
367 struct hpet_dev
*hdev
= get_irq_data(irq
);
371 cfg
= hpet_readl(HPET_Tn_CFG(hdev
->num
));
373 hpet_writel(cfg
, HPET_Tn_CFG(hdev
->num
));
376 void hpet_msi_mask(unsigned int irq
)
379 struct hpet_dev
*hdev
= get_irq_data(irq
);
382 cfg
= hpet_readl(HPET_Tn_CFG(hdev
->num
));
384 hpet_writel(cfg
, HPET_Tn_CFG(hdev
->num
));
387 void hpet_msi_write(unsigned int irq
, struct msi_msg
*msg
)
389 struct hpet_dev
*hdev
= get_irq_data(irq
);
391 hpet_writel(msg
->data
, HPET_Tn_ROUTE(hdev
->num
));
392 hpet_writel(msg
->address_lo
, HPET_Tn_ROUTE(hdev
->num
) + 4);
395 void hpet_msi_read(unsigned int irq
, struct msi_msg
*msg
)
397 struct hpet_dev
*hdev
= get_irq_data(irq
);
399 msg
->data
= hpet_readl(HPET_Tn_ROUTE(hdev
->num
));
400 msg
->address_lo
= hpet_readl(HPET_Tn_ROUTE(hdev
->num
) + 4);
404 static void hpet_msi_set_mode(enum clock_event_mode mode
,
405 struct clock_event_device
*evt
)
407 struct hpet_dev
*hdev
= EVT_TO_HPET_DEV(evt
);
408 hpet_set_mode(mode
, evt
, hdev
->num
);
411 static int hpet_msi_next_event(unsigned long delta
,
412 struct clock_event_device
*evt
)
414 struct hpet_dev
*hdev
= EVT_TO_HPET_DEV(evt
);
415 return hpet_next_event(delta
, evt
, hdev
->num
);
418 static int hpet_setup_msi_irq(unsigned int irq
)
420 if (arch_setup_hpet_msi(irq
)) {
427 static int hpet_assign_irq(struct hpet_dev
*dev
)
435 set_irq_data(irq
, dev
);
437 if (hpet_setup_msi_irq(irq
))
444 static irqreturn_t
hpet_interrupt_handler(int irq
, void *data
)
446 struct hpet_dev
*dev
= (struct hpet_dev
*)data
;
447 struct clock_event_device
*hevt
= &dev
->evt
;
449 if (!hevt
->event_handler
) {
450 printk(KERN_INFO
"Spurious HPET timer interrupt on HPET timer %d\n",
455 hevt
->event_handler(hevt
);
459 static int hpet_setup_irq(struct hpet_dev
*dev
)
462 if (request_irq(dev
->irq
, hpet_interrupt_handler
,
463 IRQF_SHARED
|IRQF_NOBALANCING
, dev
->name
, dev
))
466 disable_irq(dev
->irq
);
467 irq_set_affinity(dev
->irq
, cpumask_of_cpu(dev
->cpu
));
468 enable_irq(dev
->irq
);
470 printk(KERN_DEBUG
"hpet: %s irq %d for MSI\n",
471 dev
->name
, dev
->irq
);
476 /* This should be called in specific @cpu */
477 static void init_one_hpet_msi_clockevent(struct hpet_dev
*hdev
, int cpu
)
479 struct clock_event_device
*evt
= &hdev
->evt
;
482 WARN_ON(cpu
!= smp_processor_id());
483 if (!(hdev
->flags
& HPET_DEV_VALID
))
486 if (hpet_setup_msi_irq(hdev
->irq
))
490 per_cpu(cpu_hpet_dev
, cpu
) = hdev
;
491 evt
->name
= hdev
->name
;
492 hpet_setup_irq(hdev
);
493 evt
->irq
= hdev
->irq
;
496 evt
->features
= CLOCK_EVT_FEAT_ONESHOT
;
497 if (hdev
->flags
& HPET_DEV_PERI_CAP
)
498 evt
->features
|= CLOCK_EVT_FEAT_PERIODIC
;
500 evt
->set_mode
= hpet_msi_set_mode
;
501 evt
->set_next_event
= hpet_msi_next_event
;
505 * The period is a femto seconds value. We need to calculate the
506 * scaled math multiplication factor for nanosecond to hpet tick
509 hpet_freq
= 1000000000000000ULL;
510 do_div(hpet_freq
, hpet_period
);
511 evt
->mult
= div_sc((unsigned long) hpet_freq
,
512 NSEC_PER_SEC
, evt
->shift
);
513 /* Calculate the max delta */
514 evt
->max_delta_ns
= clockevent_delta2ns(0x7FFFFFFF, evt
);
515 /* 5 usec minimum reprogramming delta. */
516 evt
->min_delta_ns
= 5000;
518 evt
->cpumask
= cpumask_of_cpu(hdev
->cpu
);
519 clockevents_register_device(evt
);
523 /* Reserve at least one timer for userspace (/dev/hpet) */
524 #define RESERVE_TIMERS 1
526 #define RESERVE_TIMERS 0
528 void hpet_msi_capability_lookup(unsigned int start_timer
)
531 unsigned int num_timers
;
532 unsigned int num_timers_used
= 0;
535 id
= hpet_readl(HPET_ID
);
537 num_timers
= ((id
& HPET_ID_NUMBER
) >> HPET_ID_NUMBER_SHIFT
);
538 num_timers
++; /* Value read out starts from 0 */
540 hpet_devs
= kzalloc(sizeof(struct hpet_dev
) * num_timers
, GFP_KERNEL
);
544 hpet_num_timers
= num_timers
;
546 for (i
= start_timer
; i
< num_timers
- RESERVE_TIMERS
; i
++) {
547 struct hpet_dev
*hdev
= &hpet_devs
[num_timers_used
];
548 unsigned long cfg
= hpet_readl(HPET_Tn_CFG(i
));
550 /* Only consider HPET timer with MSI support */
551 if (!(cfg
& HPET_TN_FSB_CAP
))
555 if (cfg
& HPET_TN_PERIODIC_CAP
)
556 hdev
->flags
|= HPET_DEV_PERI_CAP
;
559 sprintf(hdev
->name
, "hpet%d", i
);
560 if (hpet_assign_irq(hdev
))
563 hdev
->flags
|= HPET_DEV_FSB_CAP
;
564 hdev
->flags
|= HPET_DEV_VALID
;
566 if (num_timers_used
== num_possible_cpus())
570 printk(KERN_INFO
"HPET: %d timers in total, %d timers will be used for per-cpu timer\n",
571 num_timers
, num_timers_used
);
574 static struct hpet_dev
*hpet_get_unused_timer(void)
581 for (i
= 0; i
< hpet_num_timers
; i
++) {
582 struct hpet_dev
*hdev
= &hpet_devs
[i
];
584 if (!(hdev
->flags
& HPET_DEV_VALID
))
586 if (test_and_set_bit(HPET_DEV_USED_BIT
,
587 (unsigned long *)&hdev
->flags
))
594 struct hpet_work_struct
{
595 struct delayed_work work
;
596 struct completion complete
;
599 static void hpet_work(struct work_struct
*w
)
601 struct hpet_dev
*hdev
;
602 int cpu
= smp_processor_id();
603 struct hpet_work_struct
*hpet_work
;
605 hpet_work
= container_of(w
, struct hpet_work_struct
, work
.work
);
607 hdev
= hpet_get_unused_timer();
609 init_one_hpet_msi_clockevent(hdev
, cpu
);
611 complete(&hpet_work
->complete
);
614 static int hpet_cpuhp_notify(struct notifier_block
*n
,
615 unsigned long action
, void *hcpu
)
617 unsigned long cpu
= (unsigned long)hcpu
;
618 struct hpet_work_struct work
;
619 struct hpet_dev
*hdev
= per_cpu(cpu_hpet_dev
, cpu
);
621 switch (action
& 0xf) {
623 INIT_DELAYED_WORK(&work
.work
, hpet_work
);
624 init_completion(&work
.complete
);
625 /* FIXME: add schedule_work_on() */
626 schedule_delayed_work_on(cpu
, &work
.work
, 0);
627 wait_for_completion(&work
.complete
);
631 free_irq(hdev
->irq
, hdev
);
632 hdev
->flags
&= ~HPET_DEV_USED
;
633 per_cpu(cpu_hpet_dev
, cpu
) = NULL
;
641 static int hpet_setup_msi_irq(unsigned int irq
)
645 void hpet_msi_capability_lookup(unsigned int start_timer
)
650 static int hpet_cpuhp_notify(struct notifier_block
*n
,
651 unsigned long action
, void *hcpu
)
659 * Clock source related code
661 static cycle_t
read_hpet(void)
663 return (cycle_t
)hpet_readl(HPET_COUNTER
);
667 static cycle_t __vsyscall_fn
vread_hpet(void)
669 return readl((const void __iomem
*)fix_to_virt(VSYSCALL_HPET
) + 0xf0);
673 static struct clocksource clocksource_hpet
= {
679 .flags
= CLOCK_SOURCE_IS_CONTINUOUS
,
680 .resume
= hpet_restart_counter
,
686 static int hpet_clocksource_register(void)
691 /* Start the counter */
692 hpet_start_counter();
694 /* Verify whether hpet counter works */
699 * We don't know the TSC frequency yet, but waiting for
700 * 200000 TSC cycles is safe:
707 } while ((now
- start
) < 200000UL);
709 if (t1
== read_hpet()) {
711 "HPET counter not counting. HPET disabled\n");
716 * The definition of mult is (include/linux/clocksource.h)
717 * mult/2^shift = ns/cyc and hpet_period is in units of fsec/cyc
718 * so we first need to convert hpet_period to ns/cyc units:
719 * mult/2^shift = ns/cyc = hpet_period/10^6
720 * mult = (hpet_period * 2^shift)/10^6
721 * mult = (hpet_period << shift)/FSEC_PER_NSEC
723 clocksource_hpet
.mult
= div_sc(hpet_period
, FSEC_PER_NSEC
, HPET_SHIFT
);
725 clocksource_register(&clocksource_hpet
);
731 * hpet_enable - Try to setup the HPET timer. Returns 1 on success.
733 int __init
hpet_enable(void)
738 if (!is_hpet_capable())
744 * Read the period and check for a sane value:
746 hpet_period
= hpet_readl(HPET_PERIOD
);
749 * AMD SB700 based systems with spread spectrum enabled use a
750 * SMM based HPET emulation to provide proper frequency
751 * setting. The SMM code is initialized with the first HPET
752 * register access and takes some time to complete. During
753 * this time the config register reads 0xffffffff. We check
754 * for max. 1000 loops whether the config register reads a non
755 * 0xffffffff value to make sure that HPET is up and running
756 * before we go further. A counting loop is safe, as the HPET
757 * access takes thousands of CPU cycles. On non SB700 based
758 * machines this check is only done once and has no side
761 for (i
= 0; hpet_readl(HPET_CFG
) == 0xFFFFFFFF; i
++) {
764 "HPET config register value = 0xFFFFFFFF. "
770 if (hpet_period
< HPET_MIN_PERIOD
|| hpet_period
> HPET_MAX_PERIOD
)
774 * Read the HPET ID register to retrieve the IRQ routing
775 * information and the number of channels
777 id
= hpet_readl(HPET_ID
);
779 #ifdef CONFIG_HPET_EMULATE_RTC
781 * The legacy routing mode needs at least two channels, tick timer
782 * and the rtc emulation channel.
784 if (!(id
& HPET_ID_NUMBER
))
788 if (hpet_clocksource_register())
791 if (id
& HPET_ID_LEGSUP
) {
792 hpet_legacy_clockevent_register();
793 hpet_msi_capability_lookup(2);
796 hpet_msi_capability_lookup(0);
800 hpet_clear_mapping();
801 boot_hpet_disable
= 1;
806 * Needs to be late, as the reserve_timer code calls kalloc !
808 * Not a problem on i386 as hpet_enable is called from late_time_init,
809 * but on x86_64 it is necessary !
811 static __init
int hpet_late_init(void)
815 if (boot_hpet_disable
)
819 if (!force_hpet_address
)
822 hpet_address
= force_hpet_address
;
824 if (!hpet_virt_address
)
828 hpet_reserve_platform_timers(hpet_readl(HPET_ID
));
830 for_each_online_cpu(cpu
) {
831 hpet_cpuhp_notify(NULL
, CPU_ONLINE
, (void *)(long)cpu
);
834 /* This notifier should be called after workqueue is ready */
835 hotcpu_notifier(hpet_cpuhp_notify
, -20);
839 fs_initcall(hpet_late_init
);
841 void hpet_disable(void)
843 if (is_hpet_capable()) {
844 unsigned long cfg
= hpet_readl(HPET_CFG
);
846 if (hpet_legacy_int_enabled
) {
847 cfg
&= ~HPET_CFG_LEGACY
;
848 hpet_legacy_int_enabled
= 0;
850 cfg
&= ~HPET_CFG_ENABLE
;
851 hpet_writel(cfg
, HPET_CFG
);
855 #ifdef CONFIG_HPET_EMULATE_RTC
857 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
858 * is enabled, we support RTC interrupt functionality in software.
859 * RTC has 3 kinds of interrupts:
860 * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
862 * 2) Alarm Interrupt - generate an interrupt at a specific time of day
863 * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
864 * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
865 * (1) and (2) above are implemented using polling at a frequency of
866 * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
867 * overhead. (DEFAULT_RTC_INT_FREQ)
868 * For (3), we use interrupts at 64Hz or user specified periodic
869 * frequency, whichever is higher.
871 #include <linux/mc146818rtc.h>
872 #include <linux/rtc.h>
875 #define DEFAULT_RTC_INT_FREQ 64
876 #define DEFAULT_RTC_SHIFT 6
877 #define RTC_NUM_INTS 1
879 static unsigned long hpet_rtc_flags
;
880 static int hpet_prev_update_sec
;
881 static struct rtc_time hpet_alarm_time
;
882 static unsigned long hpet_pie_count
;
883 static unsigned long hpet_t1_cmp
;
884 static unsigned long hpet_default_delta
;
885 static unsigned long hpet_pie_delta
;
886 static unsigned long hpet_pie_limit
;
888 static rtc_irq_handler irq_handler
;
891 * Registers a IRQ handler.
893 int hpet_register_irq_handler(rtc_irq_handler handler
)
895 if (!is_hpet_enabled())
900 irq_handler
= handler
;
904 EXPORT_SYMBOL_GPL(hpet_register_irq_handler
);
907 * Deregisters the IRQ handler registered with hpet_register_irq_handler()
910 void hpet_unregister_irq_handler(rtc_irq_handler handler
)
912 if (!is_hpet_enabled())
918 EXPORT_SYMBOL_GPL(hpet_unregister_irq_handler
);
921 * Timer 1 for RTC emulation. We use one shot mode, as periodic mode
922 * is not supported by all HPET implementations for timer 1.
924 * hpet_rtc_timer_init() is called when the rtc is initialized.
926 int hpet_rtc_timer_init(void)
928 unsigned long cfg
, cnt
, delta
, flags
;
930 if (!is_hpet_enabled())
933 if (!hpet_default_delta
) {
936 clc
= (uint64_t) hpet_clockevent
.mult
* NSEC_PER_SEC
;
937 clc
>>= hpet_clockevent
.shift
+ DEFAULT_RTC_SHIFT
;
938 hpet_default_delta
= (unsigned long) clc
;
941 if (!(hpet_rtc_flags
& RTC_PIE
) || hpet_pie_limit
)
942 delta
= hpet_default_delta
;
944 delta
= hpet_pie_delta
;
946 local_irq_save(flags
);
948 cnt
= delta
+ hpet_readl(HPET_COUNTER
);
949 hpet_writel(cnt
, HPET_T1_CMP
);
952 cfg
= hpet_readl(HPET_T1_CFG
);
953 cfg
&= ~HPET_TN_PERIODIC
;
954 cfg
|= HPET_TN_ENABLE
| HPET_TN_32BIT
;
955 hpet_writel(cfg
, HPET_T1_CFG
);
957 local_irq_restore(flags
);
961 EXPORT_SYMBOL_GPL(hpet_rtc_timer_init
);
964 * The functions below are called from rtc driver.
965 * Return 0 if HPET is not being used.
966 * Otherwise do the necessary changes and return 1.
968 int hpet_mask_rtc_irq_bit(unsigned long bit_mask
)
970 if (!is_hpet_enabled())
973 hpet_rtc_flags
&= ~bit_mask
;
976 EXPORT_SYMBOL_GPL(hpet_mask_rtc_irq_bit
);
978 int hpet_set_rtc_irq_bit(unsigned long bit_mask
)
980 unsigned long oldbits
= hpet_rtc_flags
;
982 if (!is_hpet_enabled())
985 hpet_rtc_flags
|= bit_mask
;
987 if ((bit_mask
& RTC_UIE
) && !(oldbits
& RTC_UIE
))
988 hpet_prev_update_sec
= -1;
991 hpet_rtc_timer_init();
995 EXPORT_SYMBOL_GPL(hpet_set_rtc_irq_bit
);
997 int hpet_set_alarm_time(unsigned char hrs
, unsigned char min
,
1000 if (!is_hpet_enabled())
1003 hpet_alarm_time
.tm_hour
= hrs
;
1004 hpet_alarm_time
.tm_min
= min
;
1005 hpet_alarm_time
.tm_sec
= sec
;
1009 EXPORT_SYMBOL_GPL(hpet_set_alarm_time
);
1011 int hpet_set_periodic_freq(unsigned long freq
)
1015 if (!is_hpet_enabled())
1018 if (freq
<= DEFAULT_RTC_INT_FREQ
)
1019 hpet_pie_limit
= DEFAULT_RTC_INT_FREQ
/ freq
;
1021 clc
= (uint64_t) hpet_clockevent
.mult
* NSEC_PER_SEC
;
1023 clc
>>= hpet_clockevent
.shift
;
1024 hpet_pie_delta
= (unsigned long) clc
;
1028 EXPORT_SYMBOL_GPL(hpet_set_periodic_freq
);
1030 int hpet_rtc_dropped_irq(void)
1032 return is_hpet_enabled();
1034 EXPORT_SYMBOL_GPL(hpet_rtc_dropped_irq
);
1036 static void hpet_rtc_timer_reinit(void)
1038 unsigned long cfg
, delta
;
1041 if (unlikely(!hpet_rtc_flags
)) {
1042 cfg
= hpet_readl(HPET_T1_CFG
);
1043 cfg
&= ~HPET_TN_ENABLE
;
1044 hpet_writel(cfg
, HPET_T1_CFG
);
1048 if (!(hpet_rtc_flags
& RTC_PIE
) || hpet_pie_limit
)
1049 delta
= hpet_default_delta
;
1051 delta
= hpet_pie_delta
;
1054 * Increment the comparator value until we are ahead of the
1058 hpet_t1_cmp
+= delta
;
1059 hpet_writel(hpet_t1_cmp
, HPET_T1_CMP
);
1061 } while ((long)(hpet_readl(HPET_COUNTER
) - hpet_t1_cmp
) > 0);
1064 if (hpet_rtc_flags
& RTC_PIE
)
1065 hpet_pie_count
+= lost_ints
;
1066 if (printk_ratelimit())
1067 printk(KERN_WARNING
"hpet1: lost %d rtc interrupts\n",
1072 irqreturn_t
hpet_rtc_interrupt(int irq
, void *dev_id
)
1074 struct rtc_time curr_time
;
1075 unsigned long rtc_int_flag
= 0;
1077 hpet_rtc_timer_reinit();
1078 memset(&curr_time
, 0, sizeof(struct rtc_time
));
1080 if (hpet_rtc_flags
& (RTC_UIE
| RTC_AIE
))
1081 get_rtc_time(&curr_time
);
1083 if (hpet_rtc_flags
& RTC_UIE
&&
1084 curr_time
.tm_sec
!= hpet_prev_update_sec
) {
1085 if (hpet_prev_update_sec
>= 0)
1086 rtc_int_flag
= RTC_UF
;
1087 hpet_prev_update_sec
= curr_time
.tm_sec
;
1090 if (hpet_rtc_flags
& RTC_PIE
&&
1091 ++hpet_pie_count
>= hpet_pie_limit
) {
1092 rtc_int_flag
|= RTC_PF
;
1096 if (hpet_rtc_flags
& RTC_AIE
&&
1097 (curr_time
.tm_sec
== hpet_alarm_time
.tm_sec
) &&
1098 (curr_time
.tm_min
== hpet_alarm_time
.tm_min
) &&
1099 (curr_time
.tm_hour
== hpet_alarm_time
.tm_hour
))
1100 rtc_int_flag
|= RTC_AF
;
1103 rtc_int_flag
|= (RTC_IRQF
| (RTC_NUM_INTS
<< 8));
1105 irq_handler(rtc_int_flag
, dev_id
);
1109 EXPORT_SYMBOL_GPL(hpet_rtc_interrupt
);