x86, 32-bit: trim memory not covered by wb mtrrs
[deliverable/linux.git] / arch / x86 / kernel / init_task.c
1 #include <linux/mm.h>
2 #include <linux/module.h>
3 #include <linux/sched.h>
4 #include <linux/init.h>
5 #include <linux/init_task.h>
6 #include <linux/fs.h>
7 #include <linux/mqueue.h>
8
9 #include <asm/uaccess.h>
10 #include <asm/pgtable.h>
11 #include <asm/desc.h>
12
13 static struct fs_struct init_fs = INIT_FS;
14 static struct files_struct init_files = INIT_FILES;
15 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
16 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
17 struct mm_struct init_mm = INIT_MM(init_mm);
18
19 /*
20 * Initial thread structure.
21 *
22 * We need to make sure that this is THREAD_SIZE aligned due to the
23 * way process stacks are handled. This is done by having a special
24 * "init_task" linker map entry..
25 */
26 union thread_union init_thread_union
27 __attribute__((__section__(".data.init_task"))) =
28 { INIT_THREAD_INFO(init_task) };
29
30 /*
31 * Initial task structure.
32 *
33 * All other task structs will be allocated on slabs in fork.c
34 */
35 struct task_struct init_task = INIT_TASK(init_task);
36 EXPORT_SYMBOL(init_task);
37
38 /*
39 * per-CPU TSS segments. Threads are completely 'soft' on Linux,
40 * no more per-task TSS's. The TSS size is kept cacheline-aligned
41 * so they are allowed to end up in the .data.cacheline_aligned
42 * section. Since TSS's are completely CPU-local, we want them
43 * on exact cacheline boundaries, to eliminate cacheline ping-pong.
44 */
45 DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct, init_tss) = INIT_TSS;
46
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