Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[deliverable/linux.git] / arch / x86 / kernel / microcode_amd.c
1 /*
2 * AMD CPU Microcode Update Driver for Linux
3 * Copyright (C) 2008 Advanced Micro Devices Inc.
4 *
5 * Author: Peter Oruba <peter.oruba@amd.com>
6 *
7 * Based on work by:
8 * Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
9 *
10 * This driver allows to upgrade microcode on AMD
11 * family 0x10 and 0x11 processors.
12 *
13 * Licensed under the terms of the GNU General Public
14 * License version 2. See file COPYING for details.
15 */
16 #include <linux/firmware.h>
17 #include <linux/pci_ids.h>
18 #include <linux/uaccess.h>
19 #include <linux/vmalloc.h>
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/pci.h>
23
24 #include <asm/microcode.h>
25 #include <asm/processor.h>
26 #include <asm/msr.h>
27
28 MODULE_DESCRIPTION("AMD Microcode Update Driver");
29 MODULE_AUTHOR("Peter Oruba");
30 MODULE_LICENSE("GPL v2");
31
32 #define UCODE_MAGIC 0x00414d44
33 #define UCODE_EQUIV_CPU_TABLE_TYPE 0x00000000
34 #define UCODE_UCODE_TYPE 0x00000001
35
36 const struct firmware *firmware;
37 static int supported_cpu;
38
39 struct equiv_cpu_entry {
40 u32 installed_cpu;
41 u32 fixed_errata_mask;
42 u32 fixed_errata_compare;
43 u16 equiv_cpu;
44 u16 res;
45 } __attribute__((packed));
46
47 struct microcode_header_amd {
48 u32 data_code;
49 u32 patch_id;
50 u16 mc_patch_data_id;
51 u8 mc_patch_data_len;
52 u8 init_flag;
53 u32 mc_patch_data_checksum;
54 u32 nb_dev_id;
55 u32 sb_dev_id;
56 u16 processor_rev_id;
57 u8 nb_rev_id;
58 u8 sb_rev_id;
59 u8 bios_api_rev;
60 u8 reserved1[3];
61 u32 match_reg[8];
62 } __attribute__((packed));
63
64 struct microcode_amd {
65 struct microcode_header_amd hdr;
66 unsigned int mpb[0];
67 };
68
69 #define UCODE_MAX_SIZE 2048
70 #define UCODE_CONTAINER_SECTION_HDR 8
71 #define UCODE_CONTAINER_HEADER_SIZE 12
72
73 static struct equiv_cpu_entry *equiv_cpu_table;
74
75 static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
76 {
77 u32 dummy;
78
79 if (!supported_cpu)
80 return -1;
81
82 memset(csig, 0, sizeof(*csig));
83 rdmsr(MSR_AMD64_PATCH_LEVEL, csig->rev, dummy);
84 pr_info("microcode: CPU%d: patch_level=0x%x\n", cpu, csig->rev);
85 return 0;
86 }
87
88 static int get_matching_microcode(int cpu, void *mc, int rev)
89 {
90 struct microcode_header_amd *mc_header = mc;
91 unsigned int current_cpu_id;
92 u16 equiv_cpu_id = 0;
93 unsigned int i = 0;
94
95 BUG_ON(equiv_cpu_table == NULL);
96 current_cpu_id = cpuid_eax(0x00000001);
97
98 while (equiv_cpu_table[i].installed_cpu != 0) {
99 if (current_cpu_id == equiv_cpu_table[i].installed_cpu) {
100 equiv_cpu_id = equiv_cpu_table[i].equiv_cpu;
101 break;
102 }
103 i++;
104 }
105
106 if (!equiv_cpu_id)
107 return 0;
108
109 if (mc_header->processor_rev_id != equiv_cpu_id)
110 return 0;
111
112 /* ucode might be chipset specific -- currently we don't support this */
113 if (mc_header->nb_dev_id || mc_header->sb_dev_id) {
114 pr_err(KERN_ERR "microcode: CPU%d: loading of chipset "
115 "specific code not yet supported\n", cpu);
116 return 0;
117 }
118
119 if (mc_header->patch_id <= rev)
120 return 0;
121
122 return 1;
123 }
124
125 static int apply_microcode_amd(int cpu)
126 {
127 u32 rev, dummy;
128 int cpu_num = raw_smp_processor_id();
129 struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
130 struct microcode_amd *mc_amd = uci->mc;
131
132 /* We should bind the task to the CPU */
133 BUG_ON(cpu_num != cpu);
134
135 if (mc_amd == NULL)
136 return 0;
137
138 wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code);
139 /* get patch id after patching */
140 rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
141
142 /* check current patch id and patch's id for match */
143 if (rev != mc_amd->hdr.patch_id) {
144 pr_err("microcode: CPU%d: update failed "
145 "(for patch_level=0x%x)\n", cpu, mc_amd->hdr.patch_id);
146 return -1;
147 }
148
149 pr_info("microcode: CPU%d: updated (new patch_level=0x%x)\n", cpu, rev);
150 uci->cpu_sig.rev = rev;
151
152 return 0;
153 }
154
155 static int get_ucode_data(void *to, const u8 *from, size_t n)
156 {
157 memcpy(to, from, n);
158 return 0;
159 }
160
161 static void *
162 get_next_ucode(const u8 *buf, unsigned int size, unsigned int *mc_size)
163 {
164 unsigned int total_size;
165 u8 section_hdr[UCODE_CONTAINER_SECTION_HDR];
166 void *mc;
167
168 if (get_ucode_data(section_hdr, buf, UCODE_CONTAINER_SECTION_HDR))
169 return NULL;
170
171 if (section_hdr[0] != UCODE_UCODE_TYPE) {
172 pr_err("microcode: error: invalid type field in "
173 "container file section header\n");
174 return NULL;
175 }
176
177 total_size = (unsigned long) (section_hdr[4] + (section_hdr[5] << 8));
178
179 if (total_size > size || total_size > UCODE_MAX_SIZE) {
180 pr_err("microcode: error: size mismatch\n");
181 return NULL;
182 }
183
184 mc = vmalloc(UCODE_MAX_SIZE);
185 if (mc) {
186 memset(mc, 0, UCODE_MAX_SIZE);
187 if (get_ucode_data(mc, buf + UCODE_CONTAINER_SECTION_HDR,
188 total_size)) {
189 vfree(mc);
190 mc = NULL;
191 } else
192 *mc_size = total_size + UCODE_CONTAINER_SECTION_HDR;
193 }
194 return mc;
195 }
196
197 static int install_equiv_cpu_table(const u8 *buf)
198 {
199 u8 *container_hdr[UCODE_CONTAINER_HEADER_SIZE];
200 unsigned int *buf_pos = (unsigned int *)container_hdr;
201 unsigned long size;
202
203 if (get_ucode_data(&container_hdr, buf, UCODE_CONTAINER_HEADER_SIZE))
204 return 0;
205
206 size = buf_pos[2];
207
208 if (buf_pos[1] != UCODE_EQUIV_CPU_TABLE_TYPE || !size) {
209 pr_err("microcode: error: invalid type field in "
210 "container file section header\n");
211 return 0;
212 }
213
214 equiv_cpu_table = (struct equiv_cpu_entry *) vmalloc(size);
215 if (!equiv_cpu_table) {
216 pr_err("microcode: failed to allocate equivalent CPU table\n");
217 return 0;
218 }
219
220 buf += UCODE_CONTAINER_HEADER_SIZE;
221 if (get_ucode_data(equiv_cpu_table, buf, size)) {
222 vfree(equiv_cpu_table);
223 return 0;
224 }
225
226 return size + UCODE_CONTAINER_HEADER_SIZE; /* add header length */
227 }
228
229 static void free_equiv_cpu_table(void)
230 {
231 vfree(equiv_cpu_table);
232 equiv_cpu_table = NULL;
233 }
234
235 static enum ucode_state
236 generic_load_microcode(int cpu, const u8 *data, size_t size)
237 {
238 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
239 const u8 *ucode_ptr = data;
240 void *new_mc = NULL;
241 void *mc;
242 int new_rev = uci->cpu_sig.rev;
243 unsigned int leftover;
244 unsigned long offset;
245 enum ucode_state state = UCODE_OK;
246
247 offset = install_equiv_cpu_table(ucode_ptr);
248 if (!offset) {
249 pr_err("microcode: failed to create equivalent cpu table\n");
250 return UCODE_ERROR;
251 }
252
253 ucode_ptr += offset;
254 leftover = size - offset;
255
256 while (leftover) {
257 unsigned int uninitialized_var(mc_size);
258 struct microcode_header_amd *mc_header;
259
260 mc = get_next_ucode(ucode_ptr, leftover, &mc_size);
261 if (!mc)
262 break;
263
264 mc_header = (struct microcode_header_amd *)mc;
265 if (get_matching_microcode(cpu, mc, new_rev)) {
266 vfree(new_mc);
267 new_rev = mc_header->patch_id;
268 new_mc = mc;
269 } else
270 vfree(mc);
271
272 ucode_ptr += mc_size;
273 leftover -= mc_size;
274 }
275
276 if (new_mc) {
277 if (!leftover) {
278 vfree(uci->mc);
279 uci->mc = new_mc;
280 pr_debug("microcode: CPU%d found a matching microcode "
281 "update with version 0x%x (current=0x%x)\n",
282 cpu, new_rev, uci->cpu_sig.rev);
283 } else {
284 vfree(new_mc);
285 state = UCODE_ERROR;
286 }
287 } else
288 state = UCODE_NFOUND;
289
290 free_equiv_cpu_table();
291
292 return state;
293 }
294
295 static enum ucode_state request_microcode_fw(int cpu, struct device *device)
296 {
297 enum ucode_state ret;
298
299 if (firmware == NULL)
300 return UCODE_NFOUND;
301
302 if (*(u32 *)firmware->data != UCODE_MAGIC) {
303 pr_err("microcode: invalid UCODE_MAGIC (0x%08x)\n",
304 *(u32 *)firmware->data);
305 return UCODE_ERROR;
306 }
307
308 ret = generic_load_microcode(cpu, firmware->data, firmware->size);
309
310 return ret;
311 }
312
313 static enum ucode_state
314 request_microcode_user(int cpu, const void __user *buf, size_t size)
315 {
316 pr_info("microcode: AMD microcode update via "
317 "/dev/cpu/microcode not supported\n");
318 return UCODE_ERROR;
319 }
320
321 static void microcode_fini_cpu_amd(int cpu)
322 {
323 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
324
325 vfree(uci->mc);
326 uci->mc = NULL;
327 }
328
329 void init_microcode_amd(struct device *device)
330 {
331 const char *fw_name = "amd-ucode/microcode_amd.bin";
332 struct cpuinfo_x86 *c = &boot_cpu_data;
333
334 WARN_ON(c->x86_vendor != X86_VENDOR_AMD);
335
336 if (c->x86 < 0x10) {
337 pr_warning("microcode: AMD CPU family 0x%x not supported\n",
338 c->x86);
339 return;
340 }
341 supported_cpu = 1;
342
343 if (request_firmware(&firmware, fw_name, device))
344 pr_err("microcode: failed to load file %s\n", fw_name);
345 }
346
347 void fini_microcode_amd(void)
348 {
349 release_firmware(firmware);
350 }
351
352 static struct microcode_ops microcode_amd_ops = {
353 .init = init_microcode_amd,
354 .fini = fini_microcode_amd,
355 .request_microcode_user = request_microcode_user,
356 .request_microcode_fw = request_microcode_fw,
357 .collect_cpu_info = collect_cpu_info_amd,
358 .apply_microcode = apply_microcode_amd,
359 .microcode_fini_cpu = microcode_fini_cpu_amd,
360 };
361
362 struct microcode_ops * __init init_amd_microcode(void)
363 {
364 return &microcode_amd_ops;
365 }
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