Merge remote-tracking branch 'asoc/topic/ac97' into asoc-fsl
[deliverable/linux.git] / arch / x86 / kernel / microcode_amd_early.c
1 /*
2 * Copyright (C) 2013 Advanced Micro Devices, Inc.
3 *
4 * Author: Jacob Shin <jacob.shin@amd.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 #include <linux/earlycpio.h>
12 #include <linux/initrd.h>
13
14 #include <asm/cpu.h>
15 #include <asm/setup.h>
16 #include <asm/microcode_amd.h>
17
18 static bool ucode_loaded;
19 static u32 ucode_new_rev;
20 static unsigned long ucode_offset;
21 static size_t ucode_size;
22
23 /*
24 * Microcode patch container file is prepended to the initrd in cpio format.
25 * See Documentation/x86/early-microcode.txt
26 */
27 static __initdata char ucode_path[] = "kernel/x86/microcode/AuthenticAMD.bin";
28
29 static struct cpio_data __init find_ucode_in_initrd(void)
30 {
31 long offset = 0;
32 char *path;
33 void *start;
34 size_t size;
35 unsigned long *uoffset;
36 size_t *usize;
37 struct cpio_data cd;
38
39 #ifdef CONFIG_X86_32
40 struct boot_params *p;
41
42 /*
43 * On 32-bit, early load occurs before paging is turned on so we need
44 * to use physical addresses.
45 */
46 p = (struct boot_params *)__pa_nodebug(&boot_params);
47 path = (char *)__pa_nodebug(ucode_path);
48 start = (void *)p->hdr.ramdisk_image;
49 size = p->hdr.ramdisk_size;
50 uoffset = (unsigned long *)__pa_nodebug(&ucode_offset);
51 usize = (size_t *)__pa_nodebug(&ucode_size);
52 #else
53 path = ucode_path;
54 start = (void *)(boot_params.hdr.ramdisk_image + PAGE_OFFSET);
55 size = boot_params.hdr.ramdisk_size;
56 uoffset = &ucode_offset;
57 usize = &ucode_size;
58 #endif
59
60 cd = find_cpio_data(path, start, size, &offset);
61 if (!cd.data)
62 return cd;
63
64 if (*(u32 *)cd.data != UCODE_MAGIC) {
65 cd.data = NULL;
66 cd.size = 0;
67 return cd;
68 }
69
70 *uoffset = (u8 *)cd.data - (u8 *)start;
71 *usize = cd.size;
72
73 return cd;
74 }
75
76 /*
77 * Early load occurs before we can vmalloc(). So we look for the microcode
78 * patch container file in initrd, traverse equivalent cpu table, look for a
79 * matching microcode patch, and update, all in initrd memory in place.
80 * When vmalloc() is available for use later -- on 64-bit during first AP load,
81 * and on 32-bit during save_microcode_in_initrd_amd() -- we can call
82 * load_microcode_amd() to save equivalent cpu table and microcode patches in
83 * kernel heap memory.
84 */
85 static void apply_ucode_in_initrd(void *ucode, size_t size)
86 {
87 struct equiv_cpu_entry *eq;
88 u32 *header;
89 u8 *data;
90 u16 eq_id = 0;
91 int offset, left;
92 u32 rev, eax;
93 u32 *new_rev;
94 unsigned long *uoffset;
95 size_t *usize;
96
97 #ifdef CONFIG_X86_32
98 new_rev = (u32 *)__pa_nodebug(&ucode_new_rev);
99 uoffset = (unsigned long *)__pa_nodebug(&ucode_offset);
100 usize = (size_t *)__pa_nodebug(&ucode_size);
101 #else
102 new_rev = &ucode_new_rev;
103 uoffset = &ucode_offset;
104 usize = &ucode_size;
105 #endif
106
107 data = ucode;
108 left = size;
109 header = (u32 *)data;
110
111 /* find equiv cpu table */
112
113 if (header[1] != UCODE_EQUIV_CPU_TABLE_TYPE || /* type */
114 header[2] == 0) /* size */
115 return;
116
117 eax = cpuid_eax(0x00000001);
118
119 while (left > 0) {
120 eq = (struct equiv_cpu_entry *)(data + CONTAINER_HDR_SZ);
121
122 offset = header[2] + CONTAINER_HDR_SZ;
123 data += offset;
124 left -= offset;
125
126 eq_id = find_equiv_id(eq, eax);
127 if (eq_id)
128 break;
129
130 /*
131 * support multiple container files appended together. if this
132 * one does not have a matching equivalent cpu entry, we fast
133 * forward to the next container file.
134 */
135 while (left > 0) {
136 header = (u32 *)data;
137 if (header[0] == UCODE_MAGIC &&
138 header[1] == UCODE_EQUIV_CPU_TABLE_TYPE)
139 break;
140
141 offset = header[1] + SECTION_HDR_SIZE;
142 data += offset;
143 left -= offset;
144 }
145
146 /* mark where the next microcode container file starts */
147 offset = data - (u8 *)ucode;
148 *uoffset += offset;
149 *usize -= offset;
150 ucode = data;
151 }
152
153 if (!eq_id) {
154 *usize = 0;
155 return;
156 }
157
158 /* find ucode and update if needed */
159
160 rdmsr(MSR_AMD64_PATCH_LEVEL, rev, eax);
161
162 while (left > 0) {
163 struct microcode_amd *mc;
164
165 header = (u32 *)data;
166 if (header[0] != UCODE_UCODE_TYPE || /* type */
167 header[1] == 0) /* size */
168 break;
169
170 mc = (struct microcode_amd *)(data + SECTION_HDR_SIZE);
171 if (eq_id == mc->hdr.processor_rev_id && rev < mc->hdr.patch_id)
172 if (__apply_microcode_amd(mc) == 0) {
173 rev = mc->hdr.patch_id;
174 *new_rev = rev;
175 }
176
177 offset = header[1] + SECTION_HDR_SIZE;
178 data += offset;
179 left -= offset;
180 }
181
182 /* mark where this microcode container file ends */
183 offset = *usize - (data - (u8 *)ucode);
184 *usize -= offset;
185
186 if (!(*new_rev))
187 *usize = 0;
188 }
189
190 void __init load_ucode_amd_bsp(void)
191 {
192 struct cpio_data cd = find_ucode_in_initrd();
193 if (!cd.data)
194 return;
195
196 apply_ucode_in_initrd(cd.data, cd.size);
197 }
198
199 #ifdef CONFIG_X86_32
200 u8 amd_bsp_mpb[MPB_MAX_SIZE];
201
202 /*
203 * On 32-bit, since AP's early load occurs before paging is turned on, we
204 * cannot traverse cpu_equiv_table and pcache in kernel heap memory. So during
205 * cold boot, AP will apply_ucode_in_initrd() just like the BSP. During
206 * save_microcode_in_initrd_amd() BSP's patch is copied to amd_bsp_mpb, which
207 * is used upon resume from suspend.
208 */
209 void load_ucode_amd_ap(void)
210 {
211 struct microcode_amd *mc;
212 unsigned long *initrd;
213 unsigned long *uoffset;
214 size_t *usize;
215 void *ucode;
216
217 mc = (struct microcode_amd *)__pa(amd_bsp_mpb);
218 if (mc->hdr.patch_id && mc->hdr.processor_rev_id) {
219 __apply_microcode_amd(mc);
220 return;
221 }
222
223 initrd = (unsigned long *)__pa(&initrd_start);
224 uoffset = (unsigned long *)__pa(&ucode_offset);
225 usize = (size_t *)__pa(&ucode_size);
226
227 if (!*usize || !*initrd)
228 return;
229
230 ucode = (void *)((unsigned long)__pa(*initrd) + *uoffset);
231 apply_ucode_in_initrd(ucode, *usize);
232 }
233
234 static void __init collect_cpu_sig_on_bsp(void *arg)
235 {
236 unsigned int cpu = smp_processor_id();
237 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
238 uci->cpu_sig.sig = cpuid_eax(0x00000001);
239 }
240 #else
241 static void collect_cpu_info_amd_early(struct cpuinfo_x86 *c,
242 struct ucode_cpu_info *uci)
243 {
244 u32 rev, eax;
245
246 rdmsr(MSR_AMD64_PATCH_LEVEL, rev, eax);
247 eax = cpuid_eax(0x00000001);
248
249 uci->cpu_sig.sig = eax;
250 uci->cpu_sig.rev = rev;
251 c->microcode = rev;
252 c->x86 = ((eax >> 8) & 0xf) + ((eax >> 20) & 0xff);
253 }
254
255 void load_ucode_amd_ap(void)
256 {
257 unsigned int cpu = smp_processor_id();
258
259 collect_cpu_info_amd_early(&cpu_data(cpu), ucode_cpu_info + cpu);
260
261 if (cpu && !ucode_loaded) {
262 void *ucode;
263
264 if (!ucode_size || !initrd_start)
265 return;
266
267 ucode = (void *)(initrd_start + ucode_offset);
268 if (load_microcode_amd(0, ucode, ucode_size) != UCODE_OK)
269 return;
270 ucode_loaded = true;
271 }
272
273 apply_microcode_amd(cpu);
274 }
275 #endif
276
277 int __init save_microcode_in_initrd_amd(void)
278 {
279 enum ucode_state ret;
280 void *ucode;
281 #ifdef CONFIG_X86_32
282 unsigned int bsp = boot_cpu_data.cpu_index;
283 struct ucode_cpu_info *uci = ucode_cpu_info + bsp;
284
285 if (!uci->cpu_sig.sig)
286 smp_call_function_single(bsp, collect_cpu_sig_on_bsp, NULL, 1);
287 #endif
288 if (ucode_new_rev)
289 pr_info("microcode: updated early to new patch_level=0x%08x\n",
290 ucode_new_rev);
291
292 if (ucode_loaded || !ucode_size || !initrd_start)
293 return 0;
294
295 ucode = (void *)(initrd_start + ucode_offset);
296 ret = load_microcode_amd(0, ucode, ucode_size);
297 if (ret != UCODE_OK)
298 return -EINVAL;
299
300 ucode_loaded = true;
301 return 0;
302 }
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