arch/x86/kernel/mpparse.c

   1 /*
   2  *      Intel Multiprocessor Specification 1.1 and 1.4
   3  *      compliant MP-table parsing routines.
   4  *
   5  *      (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
   6  *      (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
   7  *      (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
   8  */
   9
  10 #include <linux/mm.h>
  11 #include <linux/init.h>
  12 #include <linux/delay.h>
  13 #include <linux/bootmem.h>
  14 #include <linux/memblock.h>
  15 #include <linux/kernel_stat.h>
  16 #include <linux/mc146818rtc.h>
  17 #include <linux/bitops.h>
  18 #include <linux/acpi.h>
  19 #include <linux/module.h>
  20 #include <linux/smp.h>
  21 #include <linux/pci.h>
  22 #include <linux/irqdomain.h>
  23
  24 #include <asm/mtrr.h>
  25 #include <asm/mpspec.h>
  26 #include <asm/pgalloc.h>
  27 #include <asm/io_apic.h>
  28 #include <asm/proto.h>
  29 #include <asm/bios_ebda.h>
  30 #include <asm/e820.h>
  31 #include <asm/setup.h>
  32 #include <asm/smp.h>
  33
  34 #include <asm/apic.h>
  35 /*
  36  * Checksum an MP configuration block.
  37  */
  38
  39 static int __init mpf_checksum(unsigned char *mp, int len)
  40 {
  41         int sum = 0;
  42
  43         while (len--)
  44                 sum += *mp++;
  45
  46         return sum & 0xFF;
  47 }
  48
  49 int __init default_mpc_apic_id(struct mpc_cpu *m)
  50 {
  51         return m->apicid;
  52 }
  53
  54 static void __init MP_processor_info(struct mpc_cpu *m)
  55 {
  56         int apicid;
  57         char *bootup_cpu = "";
  58
  59         if (!(m->cpuflag & CPU_ENABLED)) {
  60                 disabled_cpus++;
  61                 return;
  62         }
  63
  64         apicid = x86_init.mpparse.mpc_apic_id(m);
  65
  66         if (m->cpuflag & CPU_BOOTPROCESSOR) {
  67                 bootup_cpu = " (Bootup-CPU)";
  68                 boot_cpu_physical_apicid = m->apicid;
  69         }
  70
  71         pr_info("Processor #%d%s\n", m->apicid, bootup_cpu);
  72         generic_processor_info(apicid, m->apicver);
  73 }
  74
  75 #ifdef CONFIG_X86_IO_APIC
  76 void __init default_mpc_oem_bus_info(struct mpc_bus *m, char *str)
  77 {
  78         memcpy(str, m->bustype, 6);
  79         str[6] = 0;
  80         apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
  81 }
  82
  83 static void __init MP_bus_info(struct mpc_bus *m)
  84 {
  85         char str[7];
  86
  87         x86_init.mpparse.mpc_oem_bus_info(m, str);
  88
  89 #if MAX_MP_BUSSES < 256
  90         if (m->busid >= MAX_MP_BUSSES) {
  91                 pr_warn("MP table busid value (%d) for bustype %s is too large, max. supported is %d\n",
  92                         m->busid, str, MAX_MP_BUSSES - 1);
  93                 return;
  94         }
  95 #endif
  96
  97         set_bit(m->busid, mp_bus_not_pci);
  98         if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
  99 #ifdef CONFIG_EISA
 100                 mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
 101 #endif
 102         } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
 103                 if (x86_init.mpparse.mpc_oem_pci_bus)
 104                         x86_init.mpparse.mpc_oem_pci_bus(m);
 105
 106                 clear_bit(m->busid, mp_bus_not_pci);
 107 #ifdef CONFIG_EISA
 108                 mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
 109         } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
 110                 mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
 111 #endif
 112         } else
 113                 pr_warn("Unknown bustype %s - ignoring\n", str);
 114 }
 115
 116 static struct irq_domain_ops mp_ioapic_irqdomain_ops = {
 117         .map = mp_irqdomain_map,
 118 };
 119
 120 static void __init MP_ioapic_info(struct mpc_ioapic *m)
 121 {
 122         struct ioapic_domain_cfg cfg = {
 123                 .type = IOAPIC_DOMAIN_LEGACY,
 124                 .ops = &mp_ioapic_irqdomain_ops,
 125         };
 126
 127         if (m->flags & MPC_APIC_USABLE)
 128                 mp_register_ioapic(m->apicid, m->apicaddr, gsi_top, &cfg);
 129 }
 130
 131 static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
 132 {
 133         apic_printk(APIC_VERBOSE,
 134                 "Int: type %d, pol %d, trig %d, bus %02x, IRQ %02x, APIC ID %x, APIC INT %02x\n",
 135                 mp_irq->irqtype, mp_irq->irqflag & 3,
 136                 (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus,
 137                 mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
 138 }
 139
 140 #else /* CONFIG_X86_IO_APIC */
 141 static inline void __init MP_bus_info(struct mpc_bus *m) {}
 142 static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {}
 143 #endif /* CONFIG_X86_IO_APIC */
 144
 145 static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
 146 {
 147         apic_printk(APIC_VERBOSE,
 148                 "Lint: type %d, pol %d, trig %d, bus %02x, IRQ %02x, APIC ID %x, APIC LINT %02x\n",
 149                 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
 150                 m->srcbusirq, m->destapic, m->destapiclint);
 151 }
 152
 153 /*
 154  * Read/parse the MPC
 155  */
 156 static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
 157 {
 158
 159         if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) {
 160                 pr_err("MPTABLE: bad signature [%c%c%c%c]!\n",
 161                        mpc->signature[0], mpc->signature[1],
 162                        mpc->signature[2], mpc->signature[3]);
 163                 return 0;
 164         }
 165         if (mpf_checksum((unsigned char *)mpc, mpc->length)) {
 166                 pr_err("MPTABLE: checksum error!\n");
 167                 return 0;
 168         }
 169         if (mpc->spec != 0x01 && mpc->spec != 0x04) {
 170                 pr_err("MPTABLE: bad table version (%d)!!\n", mpc->spec);
 171                 return 0;
 172         }
 173         if (!mpc->lapic) {
 174                 pr_err("MPTABLE: null local APIC address!\n");
 175                 return 0;
 176         }
 177         memcpy(oem, mpc->oem, 8);
 178         oem[8] = 0;
 179         pr_info("MPTABLE: OEM ID: %s\n", oem);
 180
 181         memcpy(str, mpc->productid, 12);
 182         str[12] = 0;
 183
 184         pr_info("MPTABLE: Product ID: %s\n", str);
 185
 186         pr_info("MPTABLE: APIC at: 0x%X\n", mpc->lapic);
 187
 188         return 1;
 189 }
 190
 191 static void skip_entry(unsigned char **ptr, int *count, int size)
 192 {
 193         *ptr += size;
 194         *count += size;
 195 }
 196
 197 static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt)
 198 {
 199         pr_err("Your mptable is wrong, contact your HW vendor!\n");
 200         pr_cont("type %x\n", *mpt);
 201         print_hex_dump(KERN_ERR, "  ", DUMP_PREFIX_ADDRESS, 16,
 202                         1, mpc, mpc->length, 1);
 203 }
 204
 205 void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { }
 206
 207 static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
 208 {
 209         char str[16];
 210         char oem[10];
 211
 212         int count = sizeof(*mpc);
 213         unsigned char *mpt = ((unsigned char *)mpc) + count;
 214
 215         if (!smp_check_mpc(mpc, oem, str))
 216                 return 0;
 217
 218 #ifdef CONFIG_X86_32
 219         generic_mps_oem_check(mpc, oem, str);
 220 #endif
 221         /* Initialize the lapic mapping */
 222         if (!acpi_lapic)
 223                 register_lapic_address(mpc->lapic);
 224
 225         if (early)
 226                 return 1;
 227
 228         if (mpc->oemptr)
 229                 x86_init.mpparse.smp_read_mpc_oem(mpc);
 230
 231         /*
 232          *      Now process the configuration blocks.
 233          */
 234         x86_init.mpparse.mpc_record(0);
 235
 236         while (count < mpc->length) {
 237                 switch (*mpt) {
 238                 case MP_PROCESSOR:
 239                         /* ACPI may have already provided this data */
 240                         if (!acpi_lapic)
 241                                 MP_processor_info((struct mpc_cpu *)mpt);
 242                         skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
 243                         break;
 244                 case MP_BUS:
 245                         MP_bus_info((struct mpc_bus *)mpt);
 246                         skip_entry(&mpt, &count, sizeof(struct mpc_bus));
 247                         break;
 248                 case MP_IOAPIC:
 249                         MP_ioapic_info((struct mpc_ioapic *)mpt);
 250                         skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
 251                         break;
 252                 case MP_INTSRC:
 253                         mp_save_irq((struct mpc_intsrc *)mpt);
 254                         skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
 255                         break;
 256                 case MP_LINTSRC:
 257                         MP_lintsrc_info((struct mpc_lintsrc *)mpt);
 258                         skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
 259                         break;
 260                 default:
 261                         /* wrong mptable */
 262                         smp_dump_mptable(mpc, mpt);
 263                         count = mpc->length;
 264                         break;
 265                 }
 266                 x86_init.mpparse.mpc_record(1);
 267         }
 268
 269         if (!num_processors)
 270                 pr_err("MPTABLE: no processors registered!\n");
 271         return num_processors;
 272 }
 273
 274 #ifdef CONFIG_X86_IO_APIC
 275
 276 static int __init ELCR_trigger(unsigned int irq)
 277 {
 278         unsigned int port;
 279
 280         port = 0x4d0 + (irq >> 3);
 281         return (inb(port) >> (irq & 7)) & 1;
 282 }
 283
 284 static void __init construct_default_ioirq_mptable(int mpc_default_type)
 285 {
 286         struct mpc_intsrc intsrc;
 287         int i;
 288         int ELCR_fallback = 0;
 289
 290         intsrc.type = MP_INTSRC;
 291         intsrc.irqflag = 0;     /* conforming */
 292         intsrc.srcbus = 0;
 293         intsrc.dstapic = mpc_ioapic_id(0);
 294
 295         intsrc.irqtype = mp_INT;
 296
 297         /*
 298          *  If true, we have an ISA/PCI system with no IRQ entries
 299          *  in the MP table. To prevent the PCI interrupts from being set up
 300          *  incorrectly, we try to use the ELCR. The sanity check to see if
 301          *  there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
 302          *  never be level sensitive, so we simply see if the ELCR agrees.
 303          *  If it does, we assume it's valid.
 304          */
 305         if (mpc_default_type == 5) {
 306                 pr_info("ISA/PCI bus type with no IRQ information... falling back to ELCR\n");
 307
 308                 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
 309                     ELCR_trigger(13))
 310                         pr_err("ELCR contains invalid data... not using ELCR\n");
 311                 else {
 312                         pr_info("Using ELCR to identify PCI interrupts\n");
 313                         ELCR_fallback = 1;
 314                 }
 315         }
 316
 317         for (i = 0; i < 16; i++) {
 318                 switch (mpc_default_type) {
 319                 case 2:
 320                         if (i == 0 || i == 13)
 321                                 continue;       /* IRQ0 & IRQ13 not connected */
 322                         /* fall through */
 323                 default:
 324                         if (i == 2)
 325                                 continue;       /* IRQ2 is never connected */
 326                 }
 327
 328                 if (ELCR_fallback) {
 329                         /*
 330                          *  If the ELCR indicates a level-sensitive interrupt, we
 331                          *  copy that information over to the MP table in the
 332                          *  irqflag field (level sensitive, active high polarity).
 333                          */
 334                         if (ELCR_trigger(i))
 335                                 intsrc.irqflag = 13;
 336                         else
 337                                 intsrc.irqflag = 0;
 338                 }
 339
 340                 intsrc.srcbusirq = i;
 341                 intsrc.dstirq = i ? i : 2;      /* IRQ0 to INTIN2 */
 342                 mp_save_irq(&intsrc);
 343         }
 344
 345         intsrc.irqtype = mp_ExtINT;
 346         intsrc.srcbusirq = 0;
 347         intsrc.dstirq = 0;      /* 8259A to INTIN0 */
 348         mp_save_irq(&intsrc);
 349 }
 350
 351
 352 static void __init construct_ioapic_table(int mpc_default_type)
 353 {
 354         struct mpc_ioapic ioapic;
 355         struct mpc_bus bus;
 356
 357         bus.type = MP_BUS;
 358         bus.busid = 0;
 359         switch (mpc_default_type) {
 360         default:
 361                 pr_err("???\nUnknown standard configuration %d\n",
 362                        mpc_default_type);
 363                 /* fall through */
 364         case 1:
 365         case 5:
 366                 memcpy(bus.bustype, "ISA   ", 6);
 367                 break;
 368         case 2:
 369         case 6:
 370         case 3:
 371                 memcpy(bus.bustype, "EISA  ", 6);
 372                 break;
 373         }
 374         MP_bus_info(&bus);
 375         if (mpc_default_type > 4) {
 376                 bus.busid = 1;
 377                 memcpy(bus.bustype, "PCI   ", 6);
 378                 MP_bus_info(&bus);
 379         }
 380
 381         ioapic.type     = MP_IOAPIC;
 382         ioapic.apicid   = 2;
 383         ioapic.apicver  = mpc_default_type > 4 ? 0x10 : 0x01;
 384         ioapic.flags    = MPC_APIC_USABLE;
 385         ioapic.apicaddr = IO_APIC_DEFAULT_PHYS_BASE;
 386         MP_ioapic_info(&ioapic);
 387
 388         /*
 389          * We set up most of the low 16 IO-APIC pins according to MPS rules.
 390          */
 391         construct_default_ioirq_mptable(mpc_default_type);
 392 }
 393 #else
 394 static inline void __init construct_ioapic_table(int mpc_default_type) { }
 395 #endif
 396
 397 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
 398 {
 399         struct mpc_cpu processor;
 400         struct mpc_lintsrc lintsrc;
 401         int linttypes[2] = { mp_ExtINT, mp_NMI };
 402         int i;
 403
 404         /*
 405          * local APIC has default address
 406          */
 407         mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
 408
 409         /*
 410          * 2 CPUs, numbered 0 & 1.
 411          */
 412         processor.type = MP_PROCESSOR;
 413         /* Either an integrated APIC or a discrete 82489DX. */
 414         processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
 415         processor.cpuflag = CPU_ENABLED;
 416         processor.cpufeature = (boot_cpu_data.x86 << 8) |
 417             (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
 418         processor.featureflag = boot_cpu_data.x86_capability[0];
 419         processor.reserved[0] = 0;
 420         processor.reserved[1] = 0;
 421         for (i = 0; i < 2; i++) {
 422                 processor.apicid = i;
 423                 MP_processor_info(&processor);
 424         }
 425
 426         construct_ioapic_table(mpc_default_type);
 427
 428         lintsrc.type = MP_LINTSRC;
 429         lintsrc.irqflag = 0;            /* conforming */
 430         lintsrc.srcbusid = 0;
 431         lintsrc.srcbusirq = 0;
 432         lintsrc.destapic = MP_APIC_ALL;
 433         for (i = 0; i < 2; i++) {
 434                 lintsrc.irqtype = linttypes[i];
 435                 lintsrc.destapiclint = i;
 436                 MP_lintsrc_info(&lintsrc);
 437         }
 438 }
 439
 440 static struct mpf_intel *mpf_found;
 441
 442 static unsigned long __init get_mpc_size(unsigned long physptr)
 443 {
 444         struct mpc_table *mpc;
 445         unsigned long size;
 446
 447         mpc = early_ioremap(physptr, PAGE_SIZE);
 448         size = mpc->length;
 449         early_iounmap(mpc, PAGE_SIZE);
 450         apic_printk(APIC_VERBOSE, "  mpc: %lx-%lx\n", physptr, physptr + size);
 451
 452         return size;
 453 }
 454
 455 static int __init check_physptr(struct mpf_intel *mpf, unsigned int early)
 456 {
 457         struct mpc_table *mpc;
 458         unsigned long size;
 459
 460         size = get_mpc_size(mpf->physptr);
 461         mpc = early_ioremap(mpf->physptr, size);
 462         /*
 463          * Read the physical hardware table.  Anything here will
 464          * override the defaults.
 465          */
 466         if (!smp_read_mpc(mpc, early)) {
 467 #ifdef CONFIG_X86_LOCAL_APIC
 468                 smp_found_config = 0;
 469 #endif
 470                 pr_err("BIOS bug, MP table errors detected!...\n");
 471                 pr_cont("... disabling SMP support. (tell your hw vendor)\n");
 472                 early_iounmap(mpc, size);
 473                 return -1;
 474         }
 475         early_iounmap(mpc, size);
 476
 477         if (early)
 478                 return -1;
 479
 480 #ifdef CONFIG_X86_IO_APIC
 481         /*
 482          * If there are no explicit MP IRQ entries, then we are
 483          * broken.  We set up most of the low 16 IO-APIC pins to
 484          * ISA defaults and hope it will work.
 485          */
 486         if (!mp_irq_entries) {
 487                 struct mpc_bus bus;
 488
 489                 pr_err("BIOS bug, no explicit IRQ entries, using default mptable. (tell your hw vendor)\n");
 490
 491                 bus.type = MP_BUS;
 492                 bus.busid = 0;
 493                 memcpy(bus.bustype, "ISA   ", 6);
 494                 MP_bus_info(&bus);
 495
 496                 construct_default_ioirq_mptable(0);
 497         }
 498 #endif
 499
 500         return 0;
 501 }
 502
 503 /*
 504  * Scan the memory blocks for an SMP configuration block.
 505  */
 506 void __init default_get_smp_config(unsigned int early)
 507 {
 508         struct mpf_intel *mpf = mpf_found;
 509
 510         if (!mpf)
 511                 return;
 512
 513         if (acpi_lapic && early)
 514                 return;
 515
 516         /*
 517          * MPS doesn't support hyperthreading, aka only have
 518          * thread 0 apic id in MPS table
 519          */
 520         if (acpi_lapic && acpi_ioapic)
 521                 return;
 522
 523         pr_info("Intel MultiProcessor Specification v1.%d\n",
 524                 mpf->specification);
 525 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
 526         if (mpf->feature2 & (1 << 7)) {
 527                 pr_info("    IMCR and PIC compatibility mode.\n");
 528                 pic_mode = 1;
 529         } else {
 530                 pr_info("    Virtual Wire compatibility mode.\n");
 531                 pic_mode = 0;
 532         }
 533 #endif
 534         /*
 535          * Now see if we need to read further.
 536          */
 537         if (mpf->feature1 != 0) {
 538                 if (early) {
 539                         /*
 540                          * local APIC has default address
 541                          */
 542                         mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
 543                         return;
 544                 }
 545
 546                 pr_info("Default MP configuration #%d\n", mpf->feature1);
 547                 construct_default_ISA_mptable(mpf->feature1);
 548
 549         } else if (mpf->physptr) {
 550                 if (check_physptr(mpf, early))
 551                         return;
 552         } else
 553                 BUG();
 554
 555         if (!early)
 556                 pr_info("Processors: %d\n", num_processors);
 557         /*
 558          * Only use the first configuration found.
 559          */
 560 }
 561
 562 static void __init smp_reserve_memory(struct mpf_intel *mpf)
 563 {
 564         memblock_reserve(mpf->physptr, get_mpc_size(mpf->physptr));
 565 }
 566
 567 static int __init smp_scan_config(unsigned long base, unsigned long length)
 568 {
 569         unsigned int *bp = phys_to_virt(base);
 570         struct mpf_intel *mpf;
 571         unsigned long mem;
 572
 573         apic_printk(APIC_VERBOSE, "Scan for SMP in [mem %#010lx-%#010lx]\n",
 574                     base, base + length - 1);
 575         BUILD_BUG_ON(sizeof(*mpf) != 16);
 576
 577         while (length > 0) {
 578                 mpf = (struct mpf_intel *)bp;
 579                 if ((*bp == SMP_MAGIC_IDENT) &&
 580                     (mpf->length == 1) &&
 581                     !mpf_checksum((unsigned char *)bp, 16) &&
 582                     ((mpf->specification == 1)
 583                      || (mpf->specification == 4))) {
 584 #ifdef CONFIG_X86_LOCAL_APIC
 585                         smp_found_config = 1;
 586 #endif
 587                         mpf_found = mpf;
 588
 589                         pr_info("found SMP MP-table at [mem %#010llx-%#010llx] mapped at [%p]\n",
 590                                 (unsigned long long) virt_to_phys(mpf),
 591                                 (unsigned long long) virt_to_phys(mpf) +
 592                                 sizeof(*mpf) - 1, mpf);
 593
 594                         mem = virt_to_phys(mpf);
 595                         memblock_reserve(mem, sizeof(*mpf));
 596                         if (mpf->physptr)
 597                                 smp_reserve_memory(mpf);
 598
 599                         return 1;
 600                 }
 601                 bp += 4;
 602                 length -= 16;
 603         }
 604         return 0;
 605 }
 606
 607 void __init default_find_smp_config(void)
 608 {
 609         unsigned int address;
 610
 611         /*
 612          * FIXME: Linux assumes you have 640K of base ram..
 613          * this continues the error...
 614          *
 615          * 1) Scan the bottom 1K for a signature
 616          * 2) Scan the top 1K of base RAM
 617          * 3) Scan the 64K of bios
 618          */
 619         if (smp_scan_config(0x0, 0x400) ||
 620             smp_scan_config(639 * 0x400, 0x400) ||
 621             smp_scan_config(0xF0000, 0x10000))
 622                 return;
 623         /*
 624          * If it is an SMP machine we should know now, unless the
 625          * configuration is in an EISA bus machine with an
 626          * extended bios data area.
 627          *
 628          * there is a real-mode segmented pointer pointing to the
 629          * 4K EBDA area at 0x40E, calculate and scan it here.
 630          *
 631          * NOTE! There are Linux loaders that will corrupt the EBDA
 632          * area, and as such this kind of SMP config may be less
 633          * trustworthy, simply because the SMP table may have been
 634          * stomped on during early boot. These loaders are buggy and
 635          * should be fixed.
 636          *
 637          * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
 638          */
 639
 640         address = get_bios_ebda();
 641         if (address)
 642                 smp_scan_config(address, 0x400);
 643 }
 644
 645 #ifdef CONFIG_X86_IO_APIC
 646 static u8 __initdata irq_used[MAX_IRQ_SOURCES];
 647
 648 static int  __init get_MP_intsrc_index(struct mpc_intsrc *m)
 649 {
 650         int i;
 651
 652         if (m->irqtype != mp_INT)
 653                 return 0;
 654
 655         if (m->irqflag != 0x0f)
 656                 return 0;
 657
 658         /* not legacy */
 659
 660         for (i = 0; i < mp_irq_entries; i++) {
 661                 if (mp_irqs[i].irqtype != mp_INT)
 662                         continue;
 663
 664                 if (mp_irqs[i].irqflag != 0x0f)
 665                         continue;
 666
 667                 if (mp_irqs[i].srcbus != m->srcbus)
 668                         continue;
 669                 if (mp_irqs[i].srcbusirq != m->srcbusirq)
 670                         continue;
 671                 if (irq_used[i]) {
 672                         /* already claimed */
 673                         return -2;
 674                 }
 675                 irq_used[i] = 1;
 676                 return i;
 677         }
 678
 679         /* not found */
 680         return -1;
 681 }
 682
 683 #define SPARE_SLOT_NUM 20
 684
 685 static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
 686
 687 static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare)
 688 {
 689         int i;
 690
 691         apic_printk(APIC_VERBOSE, "OLD ");
 692         print_mp_irq_info(m);
 693
 694         i = get_MP_intsrc_index(m);
 695         if (i > 0) {
 696                 memcpy(m, &mp_irqs[i], sizeof(*m));
 697                 apic_printk(APIC_VERBOSE, "NEW ");
 698                 print_mp_irq_info(&mp_irqs[i]);
 699                 return;
 700         }
 701         if (!i) {
 702                 /* legacy, do nothing */
 703                 return;
 704         }
 705         if (*nr_m_spare < SPARE_SLOT_NUM) {
 706                 /*
 707                  * not found (-1), or duplicated (-2) are invalid entries,
 708                  * we need to use the slot later
 709                  */
 710                 m_spare[*nr_m_spare] = m;
 711                 *nr_m_spare += 1;
 712         }
 713 }
 714
 715 static int __init
 716 check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count)
 717 {
 718         if (!mpc_new_phys || count <= mpc_new_length) {
 719                 WARN(1, "update_mptable: No spare slots (length: %x)\n", count);
 720                 return -1;
 721         }
 722
 723         return 0;
 724 }
 725 #else /* CONFIG_X86_IO_APIC */
 726 static
 727 inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {}
 728 #endif /* CONFIG_X86_IO_APIC */
 729
 730 static int  __init replace_intsrc_all(struct mpc_table *mpc,
 731                                         unsigned long mpc_new_phys,
 732                                         unsigned long mpc_new_length)
 733 {
 734 #ifdef CONFIG_X86_IO_APIC
 735         int i;
 736 #endif
 737         int count = sizeof(*mpc);
 738         int nr_m_spare = 0;
 739         unsigned char *mpt = ((unsigned char *)mpc) + count;
 740
 741         pr_info("mpc_length %x\n", mpc->length);
 742         while (count < mpc->length) {
 743                 switch (*mpt) {
 744                 case MP_PROCESSOR:
 745                         skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
 746                         break;
 747                 case MP_BUS:
 748                         skip_entry(&mpt, &count, sizeof(struct mpc_bus));
 749                         break;
 750                 case MP_IOAPIC:
 751                         skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
 752                         break;
 753                 case MP_INTSRC:
 754                         check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare);
 755                         skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
 756                         break;
 757                 case MP_LINTSRC:
 758                         skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
 759                         break;
 760                 default:
 761                         /* wrong mptable */
 762                         smp_dump_mptable(mpc, mpt);
 763                         goto out;
 764                 }
 765         }
 766
 767 #ifdef CONFIG_X86_IO_APIC
 768         for (i = 0; i < mp_irq_entries; i++) {
 769                 if (irq_used[i])
 770                         continue;
 771
 772                 if (mp_irqs[i].irqtype != mp_INT)
 773                         continue;
 774
 775                 if (mp_irqs[i].irqflag != 0x0f)
 776                         continue;
 777
 778                 if (nr_m_spare > 0) {
 779                         apic_printk(APIC_VERBOSE, "*NEW* found\n");
 780                         nr_m_spare--;
 781                         memcpy(m_spare[nr_m_spare], &mp_irqs[i], sizeof(mp_irqs[i]));
 782                         m_spare[nr_m_spare] = NULL;
 783                 } else {
 784                         struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
 785                         count += sizeof(struct mpc_intsrc);
 786                         if (check_slot(mpc_new_phys, mpc_new_length, count) < 0)
 787                                 goto out;
 788                         memcpy(m, &mp_irqs[i], sizeof(*m));
 789                         mpc->length = count;
 790                         mpt += sizeof(struct mpc_intsrc);
 791                 }
 792                 print_mp_irq_info(&mp_irqs[i]);
 793         }
 794 #endif
 795 out:
 796         /* update checksum */
 797         mpc->checksum = 0;
 798         mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length);
 799
 800         return 0;
 801 }
 802
 803 int enable_update_mptable;
 804
 805 static int __init update_mptable_setup(char *str)
 806 {
 807         enable_update_mptable = 1;
 808 #ifdef CONFIG_PCI
 809         pci_routeirq = 1;
 810 #endif
 811         return 0;
 812 }
 813 early_param("update_mptable", update_mptable_setup);
 814
 815 static unsigned long __initdata mpc_new_phys;
 816 static unsigned long mpc_new_length __initdata = 4096;
 817
 818 /* alloc_mptable or alloc_mptable=4k */
 819 static int __initdata alloc_mptable;
 820 static int __init parse_alloc_mptable_opt(char *p)
 821 {
 822         enable_update_mptable = 1;
 823 #ifdef CONFIG_PCI
 824         pci_routeirq = 1;
 825 #endif
 826         alloc_mptable = 1;
 827         if (!p)
 828                 return 0;
 829         mpc_new_length = memparse(p, &p);
 830         return 0;
 831 }
 832 early_param("alloc_mptable", parse_alloc_mptable_opt);
 833
 834 void __init early_reserve_e820_mpc_new(void)
 835 {
 836         if (enable_update_mptable && alloc_mptable)
 837                 mpc_new_phys = early_reserve_e820(mpc_new_length, 4);
 838 }
 839
 840 static int __init update_mp_table(void)
 841 {
 842         char str[16];
 843         char oem[10];
 844         struct mpf_intel *mpf;
 845         struct mpc_table *mpc, *mpc_new;
 846
 847         if (!enable_update_mptable)
 848                 return 0;
 849
 850         mpf = mpf_found;
 851         if (!mpf)
 852                 return 0;
 853
 854         /*
 855          * Now see if we need to go further.
 856          */
 857         if (mpf->feature1 != 0)
 858                 return 0;
 859
 860         if (!mpf->physptr)
 861                 return 0;
 862
 863         mpc = phys_to_virt(mpf->physptr);
 864
 865         if (!smp_check_mpc(mpc, oem, str))
 866                 return 0;
 867
 868         pr_info("mpf: %llx\n", (u64)virt_to_phys(mpf));
 869         pr_info("physptr: %x\n", mpf->physptr);
 870
 871         if (mpc_new_phys && mpc->length > mpc_new_length) {
 872                 mpc_new_phys = 0;
 873                 pr_info("mpc_new_length is %ld, please use alloc_mptable=8k\n",
 874                         mpc_new_length);
 875         }
 876
 877         if (!mpc_new_phys) {
 878                 unsigned char old, new;
 879                 /* check if we can change the position */
 880                 mpc->checksum = 0;
 881                 old = mpf_checksum((unsigned char *)mpc, mpc->length);
 882                 mpc->checksum = 0xff;
 883                 new = mpf_checksum((unsigned char *)mpc, mpc->length);
 884                 if (old == new) {
 885                         pr_info("mpc is readonly, please try alloc_mptable instead\n");
 886                         return 0;
 887                 }
 888                 pr_info("use in-position replacing\n");
 889         } else {
 890                 mpf->physptr = mpc_new_phys;
 891                 mpc_new = phys_to_virt(mpc_new_phys);
 892                 memcpy(mpc_new, mpc, mpc->length);
 893                 mpc = mpc_new;
 894                 /* check if we can modify that */
 895                 if (mpc_new_phys - mpf->physptr) {
 896                         struct mpf_intel *mpf_new;
 897                         /* steal 16 bytes from [0, 1k) */
 898                         pr_info("mpf new: %x\n", 0x400 - 16);
 899                         mpf_new = phys_to_virt(0x400 - 16);
 900                         memcpy(mpf_new, mpf, 16);
 901                         mpf = mpf_new;
 902                         mpf->physptr = mpc_new_phys;
 903                 }
 904                 mpf->checksum = 0;
 905                 mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16);
 906                 pr_info("physptr new: %x\n", mpf->physptr);
 907         }
 908
 909         /*
 910          * only replace the one with mp_INT and
 911          *       MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
 912          * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
 913          * may need pci=routeirq for all coverage
 914          */
 915         replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
 916
 917         return 0;
 918 }
 919
 920 late_initcall(update_mp_table);