x86: fix mpparse fallout
[deliverable/linux.git] / arch / x86 / kernel / mpparse.c
1 /*
2 * Intel Multiprocessor Specification 1.1 and 1.4
3 * compliant MP-table parsing routines.
4 *
5 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
7 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
8 */
9
10 #include <linux/mm.h>
11 #include <linux/init.h>
12 #include <linux/delay.h>
13 #include <linux/bootmem.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/mc146818rtc.h>
16 #include <linux/bitops.h>
17 #include <linux/acpi.h>
18 #include <linux/module.h>
19
20 #include <asm/smp.h>
21 #include <asm/mtrr.h>
22 #include <asm/mpspec.h>
23 #include <asm/pgalloc.h>
24 #include <asm/io_apic.h>
25 #include <asm/proto.h>
26 #include <asm/acpi.h>
27 #include <asm/bios_ebda.h>
28
29 #include <mach_apic.h>
30 #ifdef CONFIG_X86_32
31 #include <mach_apicdef.h>
32 #include <mach_mpparse.h>
33 #endif
34
35 /*
36 * Checksum an MP configuration block.
37 */
38
39 static int __init mpf_checksum(unsigned char *mp, int len)
40 {
41 int sum = 0;
42
43 while (len--)
44 sum += *mp++;
45
46 return sum & 0xFF;
47 }
48
49 #ifdef CONFIG_X86_NUMAQ
50 /*
51 * Have to match translation table entries to main table entries by counter
52 * hence the mpc_record variable .... can't see a less disgusting way of
53 * doing this ....
54 */
55
56 static int mpc_record;
57 static struct mpc_config_translation *translation_table[MAX_MPC_ENTRY]
58 __cpuinitdata;
59 #endif
60
61 static void __cpuinit MP_processor_info(struct mpc_config_processor *m)
62 {
63 int apicid;
64 char *bootup_cpu = "";
65
66 if (!(m->mpc_cpuflag & CPU_ENABLED)) {
67 disabled_cpus++;
68 return;
69 }
70 #ifdef CONFIG_X86_NUMAQ
71 apicid = mpc_apic_id(m, translation_table[mpc_record]);
72 #else
73 apicid = m->mpc_apicid;
74 #endif
75 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
76 bootup_cpu = " (Bootup-CPU)";
77 boot_cpu_physical_apicid = m->mpc_apicid;
78 }
79
80 printk(KERN_INFO "Processor #%d%s\n", m->mpc_apicid, bootup_cpu);
81 generic_processor_info(apicid, m->mpc_apicver);
82 }
83
84 #ifdef CONFIG_X86_IO_APIC
85 static void __init MP_bus_info(struct mpc_config_bus *m)
86 {
87 char str[7];
88 memcpy(str, m->mpc_bustype, 6);
89 str[6] = 0;
90
91 #ifdef CONFIG_X86_NUMAQ
92 mpc_oem_bus_info(m, str, translation_table[mpc_record]);
93 #else
94 printk(KERN_INFO "Bus #%d is %s\n", m->mpc_busid, str);
95 #endif
96
97 #if MAX_MP_BUSSES < 256
98 if (m->mpc_busid >= MAX_MP_BUSSES) {
99 printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
100 " is too large, max. supported is %d\n",
101 m->mpc_busid, str, MAX_MP_BUSSES - 1);
102 return;
103 }
104 #endif
105
106 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
107 set_bit(m->mpc_busid, mp_bus_not_pci);
108 #if defined(CONFIG_EISA) || defined (CONFIG_MCA)
109 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_ISA;
110 #endif
111 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
112 #ifdef CONFIG_X86_NUMAQ
113 mpc_oem_pci_bus(m, translation_table[mpc_record]);
114 #endif
115 clear_bit(m->mpc_busid, mp_bus_not_pci);
116 #if defined(CONFIG_EISA) || defined (CONFIG_MCA)
117 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_PCI;
118 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
119 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_EISA;
120 } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
121 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_MCA;
122 #endif
123 } else
124 printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
125 }
126 #endif
127
128 #ifdef CONFIG_X86_IO_APIC
129
130 static int bad_ioapic(unsigned long address)
131 {
132 if (nr_ioapics >= MAX_IO_APICS) {
133 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
134 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
135 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
136 }
137 if (!address) {
138 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
139 " found in table, skipping!\n");
140 return 1;
141 }
142 return 0;
143 }
144
145 static void __init MP_ioapic_info(struct mpc_config_ioapic *m)
146 {
147 if (!(m->mpc_flags & MPC_APIC_USABLE))
148 return;
149
150 printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
151 m->mpc_apicid, m->mpc_apicver, m->mpc_apicaddr);
152
153 if (bad_ioapic(m->mpc_apicaddr))
154 return;
155
156 mp_ioapics[nr_ioapics].mp_apicaddr = m->mpc_apicaddr;
157 mp_ioapics[nr_ioapics].mp_apicid = m->mpc_apicid;
158 mp_ioapics[nr_ioapics].mp_type = m->mpc_type;
159 mp_ioapics[nr_ioapics].mp_apicver = m->mpc_apicver;
160 mp_ioapics[nr_ioapics].mp_flags = m->mpc_flags;
161 nr_ioapics++;
162 }
163
164 static void __init MP_intsrc_info(struct mpc_config_intsrc *m)
165 {
166 printk(KERN_INFO "Int: type %d, pol %d, trig %d, bus %02x,"
167 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
168 m->mpc_irqtype, m->mpc_irqflag & 3,
169 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
170 m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
171 mp_irqs[mp_irq_entries].mp_dstapic = m->mpc_dstapic;
172 mp_irqs[mp_irq_entries].mp_type = m->mpc_type;
173 mp_irqs[mp_irq_entries].mp_irqtype = m->mpc_irqtype;
174 mp_irqs[mp_irq_entries].mp_irqflag = m->mpc_irqflag;
175 mp_irqs[mp_irq_entries].mp_srcbus = m->mpc_srcbus;
176 mp_irqs[mp_irq_entries].mp_srcbusirq = m->mpc_srcbusirq;
177 mp_irqs[mp_irq_entries].mp_dstirq = m->mpc_dstirq;
178 if (++mp_irq_entries == MAX_IRQ_SOURCES)
179 panic("Max # of irq sources exceeded!!\n");
180 }
181
182 #endif
183
184 static void __init MP_lintsrc_info(struct mpc_config_lintsrc *m)
185 {
186 printk(KERN_INFO "Lint: type %d, pol %d, trig %d, bus %02x,"
187 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
188 m->mpc_irqtype, m->mpc_irqflag & 3,
189 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbusid,
190 m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint);
191 }
192
193 #ifdef CONFIG_X86_NUMAQ
194 static void __init MP_translation_info(struct mpc_config_translation *m)
195 {
196 printk(KERN_INFO
197 "Translation: record %d, type %d, quad %d, global %d, local %d\n",
198 mpc_record, m->trans_type, m->trans_quad, m->trans_global,
199 m->trans_local);
200
201 if (mpc_record >= MAX_MPC_ENTRY)
202 printk(KERN_ERR "MAX_MPC_ENTRY exceeded!\n");
203 else
204 translation_table[mpc_record] = m; /* stash this for later */
205 if (m->trans_quad < MAX_NUMNODES && !node_online(m->trans_quad))
206 node_set_online(m->trans_quad);
207 }
208
209 /*
210 * Read/parse the MPC oem tables
211 */
212
213 static void __init smp_read_mpc_oem(struct mp_config_oemtable *oemtable,
214 unsigned short oemsize)
215 {
216 int count = sizeof(*oemtable); /* the header size */
217 unsigned char *oemptr = ((unsigned char *)oemtable) + count;
218
219 mpc_record = 0;
220 printk(KERN_INFO "Found an OEM MPC table at %8p - parsing it ... \n",
221 oemtable);
222 if (memcmp(oemtable->oem_signature, MPC_OEM_SIGNATURE, 4)) {
223 printk(KERN_WARNING
224 "SMP mpc oemtable: bad signature [%c%c%c%c]!\n",
225 oemtable->oem_signature[0], oemtable->oem_signature[1],
226 oemtable->oem_signature[2], oemtable->oem_signature[3]);
227 return;
228 }
229 if (mpf_checksum((unsigned char *)oemtable, oemtable->oem_length)) {
230 printk(KERN_WARNING "SMP oem mptable: checksum error!\n");
231 return;
232 }
233 while (count < oemtable->oem_length) {
234 switch (*oemptr) {
235 case MP_TRANSLATION:
236 {
237 struct mpc_config_translation *m =
238 (struct mpc_config_translation *)oemptr;
239 MP_translation_info(m);
240 oemptr += sizeof(*m);
241 count += sizeof(*m);
242 ++mpc_record;
243 break;
244 }
245 default:
246 {
247 printk(KERN_WARNING
248 "Unrecognised OEM table entry type! - %d\n",
249 (int)*oemptr);
250 return;
251 }
252 }
253 }
254 }
255
256 static inline void mps_oem_check(struct mp_config_table *mpc, char *oem,
257 char *productid)
258 {
259 if (strncmp(oem, "IBM NUMA", 8))
260 printk("Warning! May not be a NUMA-Q system!\n");
261 if (mpc->mpc_oemptr)
262 smp_read_mpc_oem((struct mp_config_oemtable *)mpc->mpc_oemptr,
263 mpc->mpc_oemsize);
264 }
265 #endif /* CONFIG_X86_NUMAQ */
266
267 /*
268 * Read/parse the MPC
269 */
270
271 static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early)
272 {
273 char str[16];
274 char oem[10];
275 int count = sizeof(*mpc);
276 unsigned char *mpt = ((unsigned char *)mpc) + count;
277
278 if (memcmp(mpc->mpc_signature, MPC_SIGNATURE, 4)) {
279 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
280 mpc->mpc_signature[0], mpc->mpc_signature[1],
281 mpc->mpc_signature[2], mpc->mpc_signature[3]);
282 return 0;
283 }
284 if (mpf_checksum((unsigned char *)mpc, mpc->mpc_length)) {
285 printk(KERN_ERR "MPTABLE: checksum error!\n");
286 return 0;
287 }
288 if (mpc->mpc_spec != 0x01 && mpc->mpc_spec != 0x04) {
289 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
290 mpc->mpc_spec);
291 return 0;
292 }
293 if (!mpc->mpc_lapic) {
294 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
295 return 0;
296 }
297 memcpy(oem, mpc->mpc_oem, 8);
298 oem[8] = 0;
299 printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
300
301 memcpy(str, mpc->mpc_productid, 12);
302 str[12] = 0;
303
304 #ifdef CONFIG_X86_32
305 mps_oem_check(mpc, oem, str);
306 #endif
307 printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
308
309 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->mpc_lapic);
310
311 /* save the local APIC address, it might be non-default */
312 if (!acpi_lapic)
313 mp_lapic_addr = mpc->mpc_lapic;
314
315 if (early)
316 return 1;
317
318 /*
319 * Now process the configuration blocks.
320 */
321 #ifdef CONFIG_X86_NUMAQ
322 mpc_record = 0;
323 #endif
324 while (count < mpc->mpc_length) {
325 switch (*mpt) {
326 case MP_PROCESSOR:
327 {
328 struct mpc_config_processor *m =
329 (struct mpc_config_processor *)mpt;
330 /* ACPI may have already provided this data */
331 if (!acpi_lapic)
332 MP_processor_info(m);
333 mpt += sizeof(*m);
334 count += sizeof(*m);
335 break;
336 }
337 case MP_BUS:
338 {
339 struct mpc_config_bus *m =
340 (struct mpc_config_bus *)mpt;
341 #ifdef CONFIG_X86_IO_APIC
342 MP_bus_info(m);
343 #endif
344 mpt += sizeof(*m);
345 count += sizeof(*m);
346 break;
347 }
348 case MP_IOAPIC:
349 {
350 #ifdef CONFIG_X86_IO_APIC
351 struct mpc_config_ioapic *m =
352 (struct mpc_config_ioapic *)mpt;
353 MP_ioapic_info(m);
354 #endif
355 mpt += sizeof(struct mpc_config_ioapic);
356 count += sizeof(struct mpc_config_ioapic);
357 break;
358 }
359 case MP_INTSRC:
360 {
361 #ifdef CONFIG_X86_IO_APIC
362 struct mpc_config_intsrc *m =
363 (struct mpc_config_intsrc *)mpt;
364
365 MP_intsrc_info(m);
366 #endif
367 mpt += sizeof(struct mpc_config_intsrc);
368 count += sizeof(struct mpc_config_intsrc);
369 break;
370 }
371 case MP_LINTSRC:
372 {
373 struct mpc_config_lintsrc *m =
374 (struct mpc_config_lintsrc *)mpt;
375 MP_lintsrc_info(m);
376 mpt += sizeof(*m);
377 count += sizeof(*m);
378 break;
379 }
380 default:
381 /* wrong mptable */
382 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
383 printk(KERN_ERR "type %x\n", *mpt);
384 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
385 1, mpc, mpc->mpc_length, 1);
386 count = mpc->mpc_length;
387 break;
388 }
389 #ifdef CONFIG_X86_NUMAQ
390 ++mpc_record;
391 #endif
392 }
393 setup_apic_routing();
394 if (!num_processors)
395 printk(KERN_ERR "MPTABLE: no processors registered!\n");
396 return num_processors;
397 }
398
399 #ifdef CONFIG_X86_IO_APIC
400
401 static int __init ELCR_trigger(unsigned int irq)
402 {
403 unsigned int port;
404
405 port = 0x4d0 + (irq >> 3);
406 return (inb(port) >> (irq & 7)) & 1;
407 }
408
409 static void __init construct_default_ioirq_mptable(int mpc_default_type)
410 {
411 struct mpc_config_intsrc intsrc;
412 int i;
413 int ELCR_fallback = 0;
414
415 intsrc.mpc_type = MP_INTSRC;
416 intsrc.mpc_irqflag = 0; /* conforming */
417 intsrc.mpc_srcbus = 0;
418 intsrc.mpc_dstapic = mp_ioapics[0].mp_apicid;
419
420 intsrc.mpc_irqtype = mp_INT;
421
422 /*
423 * If true, we have an ISA/PCI system with no IRQ entries
424 * in the MP table. To prevent the PCI interrupts from being set up
425 * incorrectly, we try to use the ELCR. The sanity check to see if
426 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
427 * never be level sensitive, so we simply see if the ELCR agrees.
428 * If it does, we assume it's valid.
429 */
430 if (mpc_default_type == 5) {
431 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
432 "falling back to ELCR\n");
433
434 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
435 ELCR_trigger(13))
436 printk(KERN_ERR "ELCR contains invalid data... "
437 "not using ELCR\n");
438 else {
439 printk(KERN_INFO
440 "Using ELCR to identify PCI interrupts\n");
441 ELCR_fallback = 1;
442 }
443 }
444
445 for (i = 0; i < 16; i++) {
446 switch (mpc_default_type) {
447 case 2:
448 if (i == 0 || i == 13)
449 continue; /* IRQ0 & IRQ13 not connected */
450 /* fall through */
451 default:
452 if (i == 2)
453 continue; /* IRQ2 is never connected */
454 }
455
456 if (ELCR_fallback) {
457 /*
458 * If the ELCR indicates a level-sensitive interrupt, we
459 * copy that information over to the MP table in the
460 * irqflag field (level sensitive, active high polarity).
461 */
462 if (ELCR_trigger(i))
463 intsrc.mpc_irqflag = 13;
464 else
465 intsrc.mpc_irqflag = 0;
466 }
467
468 intsrc.mpc_srcbusirq = i;
469 intsrc.mpc_dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
470 MP_intsrc_info(&intsrc);
471 }
472
473 intsrc.mpc_irqtype = mp_ExtINT;
474 intsrc.mpc_srcbusirq = 0;
475 intsrc.mpc_dstirq = 0; /* 8259A to INTIN0 */
476 MP_intsrc_info(&intsrc);
477 }
478
479
480 static void construct_ioapic_table(int mpc_default_type)
481 {
482 struct mpc_config_ioapic ioapic;
483 struct mpc_config_bus bus;
484
485 bus.mpc_type = MP_BUS;
486 bus.mpc_busid = 0;
487 switch (mpc_default_type) {
488 default:
489 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
490 mpc_default_type);
491 /* fall through */
492 case 1:
493 case 5:
494 memcpy(bus.mpc_bustype, "ISA ", 6);
495 break;
496 case 2:
497 case 6:
498 case 3:
499 memcpy(bus.mpc_bustype, "EISA ", 6);
500 break;
501 case 4:
502 case 7:
503 memcpy(bus.mpc_bustype, "MCA ", 6);
504 }
505 MP_bus_info(&bus);
506 if (mpc_default_type > 4) {
507 bus.mpc_busid = 1;
508 memcpy(bus.mpc_bustype, "PCI ", 6);
509 MP_bus_info(&bus);
510 }
511
512 ioapic.mpc_type = MP_IOAPIC;
513 ioapic.mpc_apicid = 2;
514 ioapic.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01;
515 ioapic.mpc_flags = MPC_APIC_USABLE;
516 ioapic.mpc_apicaddr = 0xFEC00000;
517 MP_ioapic_info(&ioapic);
518
519 /*
520 * We set up most of the low 16 IO-APIC pins according to MPS rules.
521 */
522 construct_default_ioirq_mptable(mpc_default_type);
523 }
524 #else
525 static inline void construct_ioapic_table(int mpc_default_type) { }
526 #endif
527
528 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
529 {
530 struct mpc_config_processor processor;
531 struct mpc_config_lintsrc lintsrc;
532 int linttypes[2] = { mp_ExtINT, mp_NMI };
533 int i;
534
535 /*
536 * local APIC has default address
537 */
538 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
539
540 /*
541 * 2 CPUs, numbered 0 & 1.
542 */
543 processor.mpc_type = MP_PROCESSOR;
544 /* Either an integrated APIC or a discrete 82489DX. */
545 processor.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01;
546 processor.mpc_cpuflag = CPU_ENABLED;
547 processor.mpc_cpufeature = (boot_cpu_data.x86 << 8) |
548 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
549 processor.mpc_featureflag = boot_cpu_data.x86_capability[0];
550 processor.mpc_reserved[0] = 0;
551 processor.mpc_reserved[1] = 0;
552 for (i = 0; i < 2; i++) {
553 processor.mpc_apicid = i;
554 MP_processor_info(&processor);
555 }
556
557 construct_ioapic_table(mpc_default_type);
558
559 lintsrc.mpc_type = MP_LINTSRC;
560 lintsrc.mpc_irqflag = 0; /* conforming */
561 lintsrc.mpc_srcbusid = 0;
562 lintsrc.mpc_srcbusirq = 0;
563 lintsrc.mpc_destapic = MP_APIC_ALL;
564 for (i = 0; i < 2; i++) {
565 lintsrc.mpc_irqtype = linttypes[i];
566 lintsrc.mpc_destapiclint = i;
567 MP_lintsrc_info(&lintsrc);
568 }
569 }
570
571 static struct intel_mp_floating *mpf_found;
572
573 /*
574 * Scan the memory blocks for an SMP configuration block.
575 */
576 static void __init __get_smp_config(unsigned early)
577 {
578 struct intel_mp_floating *mpf = mpf_found;
579
580 if (acpi_lapic && early)
581 return;
582 /*
583 * ACPI supports both logical (e.g. Hyper-Threading) and physical
584 * processors, where MPS only supports physical.
585 */
586 if (acpi_lapic && acpi_ioapic) {
587 printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
588 "information\n");
589 return;
590 } else if (acpi_lapic)
591 printk(KERN_INFO "Using ACPI for processor (LAPIC) "
592 "configuration information\n");
593
594 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
595 mpf->mpf_specification);
596 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
597 if (mpf->mpf_feature2 & (1 << 7)) {
598 printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
599 pic_mode = 1;
600 } else {
601 printk(KERN_INFO " Virtual Wire compatibility mode.\n");
602 pic_mode = 0;
603 }
604 #endif
605 /*
606 * Now see if we need to read further.
607 */
608 if (mpf->mpf_feature1 != 0) {
609 if (early) {
610 /*
611 * local APIC has default address
612 */
613 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
614 return;
615 }
616
617 printk(KERN_INFO "Default MP configuration #%d\n",
618 mpf->mpf_feature1);
619 construct_default_ISA_mptable(mpf->mpf_feature1);
620
621 } else if (mpf->mpf_physptr) {
622
623 /*
624 * Read the physical hardware table. Anything here will
625 * override the defaults.
626 */
627 if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) {
628 #ifdef CONFIG_X86_LOCAL_APIC
629 smp_found_config = 0;
630 #endif
631 printk(KERN_ERR
632 "BIOS bug, MP table errors detected!...\n");
633 printk(KERN_ERR "... disabling SMP support. "
634 "(tell your hw vendor)\n");
635 return;
636 }
637
638 if (early)
639 return;
640 #ifdef CONFIG_X86_IO_APIC
641 /*
642 * If there are no explicit MP IRQ entries, then we are
643 * broken. We set up most of the low 16 IO-APIC pins to
644 * ISA defaults and hope it will work.
645 */
646 if (!mp_irq_entries) {
647 struct mpc_config_bus bus;
648
649 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
650 "using default mptable. "
651 "(tell your hw vendor)\n");
652
653 bus.mpc_type = MP_BUS;
654 bus.mpc_busid = 0;
655 memcpy(bus.mpc_bustype, "ISA ", 6);
656 MP_bus_info(&bus);
657
658 construct_default_ioirq_mptable(0);
659 }
660 #endif
661 } else
662 BUG();
663
664 if (!early)
665 printk(KERN_INFO "Processors: %d\n", num_processors);
666 /*
667 * Only use the first configuration found.
668 */
669 }
670
671 void __init early_get_smp_config(void)
672 {
673 __get_smp_config(1);
674 }
675
676 void __init get_smp_config(void)
677 {
678 __get_smp_config(0);
679 }
680
681 static int __init smp_scan_config(unsigned long base, unsigned long length,
682 unsigned reserve)
683 {
684 unsigned int *bp = phys_to_virt(base);
685 struct intel_mp_floating *mpf;
686
687 printk(KERN_DEBUG "Scan SMP from %p for %ld bytes.\n", bp, length);
688 BUILD_BUG_ON(sizeof(*mpf) != 16);
689
690 while (length > 0) {
691 mpf = (struct intel_mp_floating *)bp;
692 if ((*bp == SMP_MAGIC_IDENT) &&
693 (mpf->mpf_length == 1) &&
694 !mpf_checksum((unsigned char *)bp, 16) &&
695 ((mpf->mpf_specification == 1)
696 || (mpf->mpf_specification == 4))) {
697 #ifdef CONFIG_X86_LOCAL_APIC
698 smp_found_config = 1;
699 #endif
700 mpf_found = mpf;
701 #ifdef CONFIG_X86_32
702 printk(KERN_INFO "found SMP MP-table at [%p] %08lx\n",
703 mpf, virt_to_phys(mpf));
704 reserve_bootmem(virt_to_phys(mpf), PAGE_SIZE,
705 BOOTMEM_DEFAULT);
706 if (mpf->mpf_physptr) {
707 /*
708 * We cannot access to MPC table to compute
709 * table size yet, as only few megabytes from
710 * the bottom is mapped now.
711 * PC-9800's MPC table places on the very last
712 * of physical memory; so that simply reserving
713 * PAGE_SIZE from mpg->mpf_physptr yields BUG()
714 * in reserve_bootmem.
715 */
716 unsigned long size = PAGE_SIZE;
717 unsigned long end = max_low_pfn * PAGE_SIZE;
718 if (mpf->mpf_physptr + size > end)
719 size = end - mpf->mpf_physptr;
720 reserve_bootmem(mpf->mpf_physptr, size,
721 BOOTMEM_DEFAULT);
722 }
723
724 #else
725 if (!reserve)
726 return 1;
727
728 reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE);
729 if (mpf->mpf_physptr)
730 reserve_bootmem_generic(mpf->mpf_physptr,
731 PAGE_SIZE);
732 #endif
733 return 1;
734 }
735 bp += 4;
736 length -= 16;
737 }
738 return 0;
739 }
740
741 static void __init __find_smp_config(unsigned reserve)
742 {
743 unsigned int address;
744
745 /*
746 * FIXME: Linux assumes you have 640K of base ram..
747 * this continues the error...
748 *
749 * 1) Scan the bottom 1K for a signature
750 * 2) Scan the top 1K of base RAM
751 * 3) Scan the 64K of bios
752 */
753 if (smp_scan_config(0x0, 0x400, reserve) ||
754 smp_scan_config(639 * 0x400, 0x400, reserve) ||
755 smp_scan_config(0xF0000, 0x10000, reserve))
756 return;
757 /*
758 * If it is an SMP machine we should know now, unless the
759 * configuration is in an EISA/MCA bus machine with an
760 * extended bios data area.
761 *
762 * there is a real-mode segmented pointer pointing to the
763 * 4K EBDA area at 0x40E, calculate and scan it here.
764 *
765 * NOTE! There are Linux loaders that will corrupt the EBDA
766 * area, and as such this kind of SMP config may be less
767 * trustworthy, simply because the SMP table may have been
768 * stomped on during early boot. These loaders are buggy and
769 * should be fixed.
770 *
771 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
772 */
773
774 address = get_bios_ebda();
775 if (address)
776 smp_scan_config(address, 0x400, reserve);
777 }
778
779 void __init early_find_smp_config(void)
780 {
781 __find_smp_config(0);
782 }
783
784 void __init find_smp_config(void)
785 {
786 __find_smp_config(1);
787 }
This page took 0.053558 seconds and 6 git commands to generate.