arch/x86/kernel/mpparse.c

   1 /*
   2  *      Intel Multiprocessor Specification 1.1 and 1.4
   3  *      compliant MP-table parsing routines.
   4  *
   5  *      (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
   6  *      (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
   7  *      (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
   8  */
   9
  10 #include <linux/mm.h>
  11 #include <linux/init.h>
  12 #include <linux/delay.h>
  13 #include <linux/bootmem.h>
  14 #include <linux/memblock.h>
  15 #include <linux/kernel_stat.h>
  16 #include <linux/mc146818rtc.h>
  17 #include <linux/bitops.h>
  18 #include <linux/acpi.h>
  19 #include <linux/module.h>
  20 #include <linux/smp.h>
  21 #include <linux/pci.h>
  22
  23 #include <asm/mtrr.h>
  24 #include <asm/mpspec.h>
  25 #include <asm/pgalloc.h>
  26 #include <asm/io_apic.h>
  27 #include <asm/proto.h>
  28 #include <asm/bios_ebda.h>
  29 #include <asm/e820.h>
  30 #include <asm/setup.h>
  31 #include <asm/smp.h>
  32
  33 #include <asm/apic.h>
  34 /*
  35  * Checksum an MP configuration block.
  36  */
  37
  38 static int __init mpf_checksum(unsigned char *mp, int len)
  39 {
  40         int sum = 0;
  41
  42         while (len--)
  43                 sum += *mp++;
  44
  45         return sum & 0xFF;
  46 }
  47
  48 int __init default_mpc_apic_id(struct mpc_cpu *m)
  49 {
  50         return m->apicid;
  51 }
  52
  53 static void __init MP_processor_info(struct mpc_cpu *m)
  54 {
  55         int apicid;
  56         char *bootup_cpu = "";
  57
  58         if (!(m->cpuflag & CPU_ENABLED)) {
  59                 disabled_cpus++;
  60                 return;
  61         }
  62
  63         apicid = x86_init.mpparse.mpc_apic_id(m);
  64
  65         if (m->cpuflag & CPU_BOOTPROCESSOR) {
  66                 bootup_cpu = " (Bootup-CPU)";
  67                 boot_cpu_physical_apicid = m->apicid;
  68         }
  69
  70         pr_info("Processor #%d%s\n", m->apicid, bootup_cpu);
  71         generic_processor_info(apicid, m->apicver);
  72 }
  73
  74 #ifdef CONFIG_X86_IO_APIC
  75 void __init default_mpc_oem_bus_info(struct mpc_bus *m, char *str)
  76 {
  77         memcpy(str, m->bustype, 6);
  78         str[6] = 0;
  79         apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
  80 }
  81
  82 static void __init MP_bus_info(struct mpc_bus *m)
  83 {
  84         char str[7];
  85
  86         x86_init.mpparse.mpc_oem_bus_info(m, str);
  87
  88 #if MAX_MP_BUSSES < 256
  89         if (m->busid >= MAX_MP_BUSSES) {
  90                 pr_warn("MP table busid value (%d) for bustype %s is too large, max. supported is %d\n",
  91                         m->busid, str, MAX_MP_BUSSES - 1);
  92                 return;
  93         }
  94 #endif
  95
  96         set_bit(m->busid, mp_bus_not_pci);
  97         if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
  98 #ifdef CONFIG_EISA
  99                 mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
 100 #endif
 101         } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
 102                 if (x86_init.mpparse.mpc_oem_pci_bus)
 103                         x86_init.mpparse.mpc_oem_pci_bus(m);
 104
 105                 clear_bit(m->busid, mp_bus_not_pci);
 106 #ifdef CONFIG_EISA
 107                 mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
 108         } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
 109                 mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
 110 #endif
 111         } else
 112                 pr_warn("Unknown bustype %s - ignoring\n", str);
 113 }
 114
 115 static void __init MP_ioapic_info(struct mpc_ioapic *m)
 116 {
 117         if (m->flags & MPC_APIC_USABLE)
 118                 mp_register_ioapic(m->apicid, m->apicaddr, gsi_top);
 119 }
 120
 121 static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
 122 {
 123         apic_printk(APIC_VERBOSE,
 124                 "Int: type %d, pol %d, trig %d, bus %02x, IRQ %02x, APIC ID %x, APIC INT %02x\n",
 125                 mp_irq->irqtype, mp_irq->irqflag & 3,
 126                 (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus,
 127                 mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
 128 }
 129
 130 #else /* CONFIG_X86_IO_APIC */
 131 static inline void __init MP_bus_info(struct mpc_bus *m) {}
 132 static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {}
 133 #endif /* CONFIG_X86_IO_APIC */
 134
 135 static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
 136 {
 137         apic_printk(APIC_VERBOSE,
 138                 "Lint: type %d, pol %d, trig %d, bus %02x, IRQ %02x, APIC ID %x, APIC LINT %02x\n",
 139                 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
 140                 m->srcbusirq, m->destapic, m->destapiclint);
 141 }
 142
 143 /*
 144  * Read/parse the MPC
 145  */
 146 static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
 147 {
 148
 149         if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) {
 150                 pr_err("MPTABLE: bad signature [%c%c%c%c]!\n",
 151                        mpc->signature[0], mpc->signature[1],
 152                        mpc->signature[2], mpc->signature[3]);
 153                 return 0;
 154         }
 155         if (mpf_checksum((unsigned char *)mpc, mpc->length)) {
 156                 pr_err("MPTABLE: checksum error!\n");
 157                 return 0;
 158         }
 159         if (mpc->spec != 0x01 && mpc->spec != 0x04) {
 160                 pr_err("MPTABLE: bad table version (%d)!!\n", mpc->spec);
 161                 return 0;
 162         }
 163         if (!mpc->lapic) {
 164                 pr_err("MPTABLE: null local APIC address!\n");
 165                 return 0;
 166         }
 167         memcpy(oem, mpc->oem, 8);
 168         oem[8] = 0;
 169         pr_info("MPTABLE: OEM ID: %s\n", oem);
 170
 171         memcpy(str, mpc->productid, 12);
 172         str[12] = 0;
 173
 174         pr_info("MPTABLE: Product ID: %s\n", str);
 175
 176         pr_info("MPTABLE: APIC at: 0x%X\n", mpc->lapic);
 177
 178         return 1;
 179 }
 180
 181 static void skip_entry(unsigned char **ptr, int *count, int size)
 182 {
 183         *ptr += size;
 184         *count += size;
 185 }
 186
 187 static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt)
 188 {
 189         pr_err("Your mptable is wrong, contact your HW vendor!\n");
 190         pr_cont("type %x\n", *mpt);
 191         print_hex_dump(KERN_ERR, "  ", DUMP_PREFIX_ADDRESS, 16,
 192                         1, mpc, mpc->length, 1);
 193 }
 194
 195 void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { }
 196
 197 static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
 198 {
 199         char str[16];
 200         char oem[10];
 201
 202         int count = sizeof(*mpc);
 203         unsigned char *mpt = ((unsigned char *)mpc) + count;
 204
 205         if (!smp_check_mpc(mpc, oem, str))
 206                 return 0;
 207
 208 #ifdef CONFIG_X86_32
 209         generic_mps_oem_check(mpc, oem, str);
 210 #endif
 211         /* Initialize the lapic mapping */
 212         if (!acpi_lapic)
 213                 register_lapic_address(mpc->lapic);
 214
 215         if (early)
 216                 return 1;
 217
 218         if (mpc->oemptr)
 219                 x86_init.mpparse.smp_read_mpc_oem(mpc);
 220
 221         /*
 222          *      Now process the configuration blocks.
 223          */
 224         x86_init.mpparse.mpc_record(0);
 225
 226         while (count < mpc->length) {
 227                 switch (*mpt) {
 228                 case MP_PROCESSOR:
 229                         /* ACPI may have already provided this data */
 230                         if (!acpi_lapic)
 231                                 MP_processor_info((struct mpc_cpu *)mpt);
 232                         skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
 233                         break;
 234                 case MP_BUS:
 235                         MP_bus_info((struct mpc_bus *)mpt);
 236                         skip_entry(&mpt, &count, sizeof(struct mpc_bus));
 237                         break;
 238                 case MP_IOAPIC:
 239                         MP_ioapic_info((struct mpc_ioapic *)mpt);
 240                         skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
 241                         break;
 242                 case MP_INTSRC:
 243                         mp_save_irq((struct mpc_intsrc *)mpt);
 244                         skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
 245                         break;
 246                 case MP_LINTSRC:
 247                         MP_lintsrc_info((struct mpc_lintsrc *)mpt);
 248                         skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
 249                         break;
 250                 default:
 251                         /* wrong mptable */
 252                         smp_dump_mptable(mpc, mpt);
 253                         count = mpc->length;
 254                         break;
 255                 }
 256                 x86_init.mpparse.mpc_record(1);
 257         }
 258
 259         if (!num_processors)
 260                 pr_err("MPTABLE: no processors registered!\n");
 261         return num_processors;
 262 }
 263
 264 #ifdef CONFIG_X86_IO_APIC
 265
 266 static int __init ELCR_trigger(unsigned int irq)
 267 {
 268         unsigned int port;
 269
 270         port = 0x4d0 + (irq >> 3);
 271         return (inb(port) >> (irq & 7)) & 1;
 272 }
 273
 274 static void __init construct_default_ioirq_mptable(int mpc_default_type)
 275 {
 276         struct mpc_intsrc intsrc;
 277         int i;
 278         int ELCR_fallback = 0;
 279
 280         intsrc.type = MP_INTSRC;
 281         intsrc.irqflag = 0;     /* conforming */
 282         intsrc.srcbus = 0;
 283         intsrc.dstapic = mpc_ioapic_id(0);
 284
 285         intsrc.irqtype = mp_INT;
 286
 287         /*
 288          *  If true, we have an ISA/PCI system with no IRQ entries
 289          *  in the MP table. To prevent the PCI interrupts from being set up
 290          *  incorrectly, we try to use the ELCR. The sanity check to see if
 291          *  there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
 292          *  never be level sensitive, so we simply see if the ELCR agrees.
 293          *  If it does, we assume it's valid.
 294          */
 295         if (mpc_default_type == 5) {
 296                 pr_info("ISA/PCI bus type with no IRQ information... falling back to ELCR\n");
 297
 298                 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
 299                     ELCR_trigger(13))
 300                         pr_err("ELCR contains invalid data... not using ELCR\n");
 301                 else {
 302                         pr_info("Using ELCR to identify PCI interrupts\n");
 303                         ELCR_fallback = 1;
 304                 }
 305         }
 306
 307         for (i = 0; i < 16; i++) {
 308                 switch (mpc_default_type) {
 309                 case 2:
 310                         if (i == 0 || i == 13)
 311                                 continue;       /* IRQ0 & IRQ13 not connected */
 312                         /* fall through */
 313                 default:
 314                         if (i == 2)
 315                                 continue;       /* IRQ2 is never connected */
 316                 }
 317
 318                 if (ELCR_fallback) {
 319                         /*
 320                          *  If the ELCR indicates a level-sensitive interrupt, we
 321                          *  copy that information over to the MP table in the
 322                          *  irqflag field (level sensitive, active high polarity).
 323                          */
 324                         if (ELCR_trigger(i))
 325                                 intsrc.irqflag = 13;
 326                         else
 327                                 intsrc.irqflag = 0;
 328                 }
 329
 330                 intsrc.srcbusirq = i;
 331                 intsrc.dstirq = i ? i : 2;      /* IRQ0 to INTIN2 */
 332                 mp_save_irq(&intsrc);
 333         }
 334
 335         intsrc.irqtype = mp_ExtINT;
 336         intsrc.srcbusirq = 0;
 337         intsrc.dstirq = 0;      /* 8259A to INTIN0 */
 338         mp_save_irq(&intsrc);
 339 }
 340
 341
 342 static void __init construct_ioapic_table(int mpc_default_type)
 343 {
 344         struct mpc_ioapic ioapic;
 345         struct mpc_bus bus;
 346
 347         bus.type = MP_BUS;
 348         bus.busid = 0;
 349         switch (mpc_default_type) {
 350         default:
 351                 pr_err("???\nUnknown standard configuration %d\n",
 352                        mpc_default_type);
 353                 /* fall through */
 354         case 1:
 355         case 5:
 356                 memcpy(bus.bustype, "ISA   ", 6);
 357                 break;
 358         case 2:
 359         case 6:
 360         case 3:
 361                 memcpy(bus.bustype, "EISA  ", 6);
 362                 break;
 363         }
 364         MP_bus_info(&bus);
 365         if (mpc_default_type > 4) {
 366                 bus.busid = 1;
 367                 memcpy(bus.bustype, "PCI   ", 6);
 368                 MP_bus_info(&bus);
 369         }
 370
 371         ioapic.type     = MP_IOAPIC;
 372         ioapic.apicid   = 2;
 373         ioapic.apicver  = mpc_default_type > 4 ? 0x10 : 0x01;
 374         ioapic.flags    = MPC_APIC_USABLE;
 375         ioapic.apicaddr = IO_APIC_DEFAULT_PHYS_BASE;
 376         MP_ioapic_info(&ioapic);
 377
 378         /*
 379          * We set up most of the low 16 IO-APIC pins according to MPS rules.
 380          */
 381         construct_default_ioirq_mptable(mpc_default_type);
 382 }
 383 #else
 384 static inline void __init construct_ioapic_table(int mpc_default_type) { }
 385 #endif
 386
 387 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
 388 {
 389         struct mpc_cpu processor;
 390         struct mpc_lintsrc lintsrc;
 391         int linttypes[2] = { mp_ExtINT, mp_NMI };
 392         int i;
 393
 394         /*
 395          * local APIC has default address
 396          */
 397         mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
 398
 399         /*
 400          * 2 CPUs, numbered 0 & 1.
 401          */
 402         processor.type = MP_PROCESSOR;
 403         /* Either an integrated APIC or a discrete 82489DX. */
 404         processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
 405         processor.cpuflag = CPU_ENABLED;
 406         processor.cpufeature = (boot_cpu_data.x86 << 8) |
 407             (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
 408         processor.featureflag = boot_cpu_data.x86_capability[0];
 409         processor.reserved[0] = 0;
 410         processor.reserved[1] = 0;
 411         for (i = 0; i < 2; i++) {
 412                 processor.apicid = i;
 413                 MP_processor_info(&processor);
 414         }
 415
 416         construct_ioapic_table(mpc_default_type);
 417
 418         lintsrc.type = MP_LINTSRC;
 419         lintsrc.irqflag = 0;            /* conforming */
 420         lintsrc.srcbusid = 0;
 421         lintsrc.srcbusirq = 0;
 422         lintsrc.destapic = MP_APIC_ALL;
 423         for (i = 0; i < 2; i++) {
 424                 lintsrc.irqtype = linttypes[i];
 425                 lintsrc.destapiclint = i;
 426                 MP_lintsrc_info(&lintsrc);
 427         }
 428 }
 429
 430 static struct mpf_intel *mpf_found;
 431
 432 static unsigned long __init get_mpc_size(unsigned long physptr)
 433 {
 434         struct mpc_table *mpc;
 435         unsigned long size;
 436
 437         mpc = early_ioremap(physptr, PAGE_SIZE);
 438         size = mpc->length;
 439         early_iounmap(mpc, PAGE_SIZE);
 440         apic_printk(APIC_VERBOSE, "  mpc: %lx-%lx\n", physptr, physptr + size);
 441
 442         return size;
 443 }
 444
 445 static int __init check_physptr(struct mpf_intel *mpf, unsigned int early)
 446 {
 447         struct mpc_table *mpc;
 448         unsigned long size;
 449
 450         size = get_mpc_size(mpf->physptr);
 451         mpc = early_ioremap(mpf->physptr, size);
 452         /*
 453          * Read the physical hardware table.  Anything here will
 454          * override the defaults.
 455          */
 456         if (!smp_read_mpc(mpc, early)) {
 457 #ifdef CONFIG_X86_LOCAL_APIC
 458                 smp_found_config = 0;
 459 #endif
 460                 pr_err("BIOS bug, MP table errors detected!...\n");
 461                 pr_cont("... disabling SMP support. (tell your hw vendor)\n");
 462                 early_iounmap(mpc, size);
 463                 return -1;
 464         }
 465         early_iounmap(mpc, size);
 466
 467         if (early)
 468                 return -1;
 469
 470 #ifdef CONFIG_X86_IO_APIC
 471         /*
 472          * If there are no explicit MP IRQ entries, then we are
 473          * broken.  We set up most of the low 16 IO-APIC pins to
 474          * ISA defaults and hope it will work.
 475          */
 476         if (!mp_irq_entries) {
 477                 struct mpc_bus bus;
 478
 479                 pr_err("BIOS bug, no explicit IRQ entries, using default mptable. (tell your hw vendor)\n");
 480
 481                 bus.type = MP_BUS;
 482                 bus.busid = 0;
 483                 memcpy(bus.bustype, "ISA   ", 6);
 484                 MP_bus_info(&bus);
 485
 486                 construct_default_ioirq_mptable(0);
 487         }
 488 #endif
 489
 490         return 0;
 491 }
 492
 493 /*
 494  * Scan the memory blocks for an SMP configuration block.
 495  */
 496 void __init default_get_smp_config(unsigned int early)
 497 {
 498         struct mpf_intel *mpf = mpf_found;
 499
 500         if (!mpf)
 501                 return;
 502
 503         if (acpi_lapic && early)
 504                 return;
 505
 506         /*
 507          * MPS doesn't support hyperthreading, aka only have
 508          * thread 0 apic id in MPS table
 509          */
 510         if (acpi_lapic && acpi_ioapic)
 511                 return;
 512
 513         pr_info("Intel MultiProcessor Specification v1.%d\n",
 514                 mpf->specification);
 515 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
 516         if (mpf->feature2 & (1 << 7)) {
 517                 pr_info("    IMCR and PIC compatibility mode.\n");
 518                 pic_mode = 1;
 519         } else {
 520                 pr_info("    Virtual Wire compatibility mode.\n");
 521                 pic_mode = 0;
 522         }
 523 #endif
 524         /*
 525          * Now see if we need to read further.
 526          */
 527         if (mpf->feature1 != 0) {
 528                 if (early) {
 529                         /*
 530                          * local APIC has default address
 531                          */
 532                         mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
 533                         return;
 534                 }
 535
 536                 pr_info("Default MP configuration #%d\n", mpf->feature1);
 537                 construct_default_ISA_mptable(mpf->feature1);
 538
 539         } else if (mpf->physptr) {
 540                 if (check_physptr(mpf, early))
 541                         return;
 542         } else
 543                 BUG();
 544
 545         if (!early)
 546                 pr_info("Processors: %d\n", num_processors);
 547         /*
 548          * Only use the first configuration found.
 549          */
 550 }
 551
 552 static void __init smp_reserve_memory(struct mpf_intel *mpf)
 553 {
 554         memblock_reserve(mpf->physptr, get_mpc_size(mpf->physptr));
 555 }
 556
 557 static int __init smp_scan_config(unsigned long base, unsigned long length)
 558 {
 559         unsigned int *bp = phys_to_virt(base);
 560         struct mpf_intel *mpf;
 561         unsigned long mem;
 562
 563         apic_printk(APIC_VERBOSE, "Scan for SMP in [mem %#010lx-%#010lx]\n",
 564                     base, base + length - 1);
 565         BUILD_BUG_ON(sizeof(*mpf) != 16);
 566
 567         while (length > 0) {
 568                 mpf = (struct mpf_intel *)bp;
 569                 if ((*bp == SMP_MAGIC_IDENT) &&
 570                     (mpf->length == 1) &&
 571                     !mpf_checksum((unsigned char *)bp, 16) &&
 572                     ((mpf->specification == 1)
 573                      || (mpf->specification == 4))) {
 574 #ifdef CONFIG_X86_LOCAL_APIC
 575                         smp_found_config = 1;
 576 #endif
 577                         mpf_found = mpf;
 578
 579                         pr_info("found SMP MP-table at [mem %#010llx-%#010llx] mapped at [%p]\n",
 580                                 (unsigned long long) virt_to_phys(mpf),
 581                                 (unsigned long long) virt_to_phys(mpf) +
 582                                 sizeof(*mpf) - 1, mpf);
 583
 584                         mem = virt_to_phys(mpf);
 585                         memblock_reserve(mem, sizeof(*mpf));
 586                         if (mpf->physptr)
 587                                 smp_reserve_memory(mpf);
 588
 589                         return 1;
 590                 }
 591                 bp += 4;
 592                 length -= 16;
 593         }
 594         return 0;
 595 }
 596
 597 void __init default_find_smp_config(void)
 598 {
 599         unsigned int address;
 600
 601         /*
 602          * FIXME: Linux assumes you have 640K of base ram..
 603          * this continues the error...
 604          *
 605          * 1) Scan the bottom 1K for a signature
 606          * 2) Scan the top 1K of base RAM
 607          * 3) Scan the 64K of bios
 608          */
 609         if (smp_scan_config(0x0, 0x400) ||
 610             smp_scan_config(639 * 0x400, 0x400) ||
 611             smp_scan_config(0xF0000, 0x10000))
 612                 return;
 613         /*
 614          * If it is an SMP machine we should know now, unless the
 615          * configuration is in an EISA bus machine with an
 616          * extended bios data area.
 617          *
 618          * there is a real-mode segmented pointer pointing to the
 619          * 4K EBDA area at 0x40E, calculate and scan it here.
 620          *
 621          * NOTE! There are Linux loaders that will corrupt the EBDA
 622          * area, and as such this kind of SMP config may be less
 623          * trustworthy, simply because the SMP table may have been
 624          * stomped on during early boot. These loaders are buggy and
 625          * should be fixed.
 626          *
 627          * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
 628          */
 629
 630         address = get_bios_ebda();
 631         if (address)
 632                 smp_scan_config(address, 0x400);
 633 }
 634
 635 #ifdef CONFIG_X86_IO_APIC
 636 static u8 __initdata irq_used[MAX_IRQ_SOURCES];
 637
 638 static int  __init get_MP_intsrc_index(struct mpc_intsrc *m)
 639 {
 640         int i;
 641
 642         if (m->irqtype != mp_INT)
 643                 return 0;
 644
 645         if (m->irqflag != 0x0f)
 646                 return 0;
 647
 648         /* not legacy */
 649
 650         for (i = 0; i < mp_irq_entries; i++) {
 651                 if (mp_irqs[i].irqtype != mp_INT)
 652                         continue;
 653
 654                 if (mp_irqs[i].irqflag != 0x0f)
 655                         continue;
 656
 657                 if (mp_irqs[i].srcbus != m->srcbus)
 658                         continue;
 659                 if (mp_irqs[i].srcbusirq != m->srcbusirq)
 660                         continue;
 661                 if (irq_used[i]) {
 662                         /* already claimed */
 663                         return -2;
 664                 }
 665                 irq_used[i] = 1;
 666                 return i;
 667         }
 668
 669         /* not found */
 670         return -1;
 671 }
 672
 673 #define SPARE_SLOT_NUM 20
 674
 675 static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
 676
 677 static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare)
 678 {
 679         int i;
 680
 681         apic_printk(APIC_VERBOSE, "OLD ");
 682         print_mp_irq_info(m);
 683
 684         i = get_MP_intsrc_index(m);
 685         if (i > 0) {
 686                 memcpy(m, &mp_irqs[i], sizeof(*m));
 687                 apic_printk(APIC_VERBOSE, "NEW ");
 688                 print_mp_irq_info(&mp_irqs[i]);
 689                 return;
 690         }
 691         if (!i) {
 692                 /* legacy, do nothing */
 693                 return;
 694         }
 695         if (*nr_m_spare < SPARE_SLOT_NUM) {
 696                 /*
 697                  * not found (-1), or duplicated (-2) are invalid entries,
 698                  * we need to use the slot later
 699                  */
 700                 m_spare[*nr_m_spare] = m;
 701                 *nr_m_spare += 1;
 702         }
 703 }
 704
 705 static int __init
 706 check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count)
 707 {
 708         if (!mpc_new_phys || count <= mpc_new_length) {
 709                 WARN(1, "update_mptable: No spare slots (length: %x)\n", count);
 710                 return -1;
 711         }
 712
 713         return 0;
 714 }
 715 #else /* CONFIG_X86_IO_APIC */
 716 static
 717 inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {}
 718 #endif /* CONFIG_X86_IO_APIC */
 719
 720 static int  __init replace_intsrc_all(struct mpc_table *mpc,
 721                                         unsigned long mpc_new_phys,
 722                                         unsigned long mpc_new_length)
 723 {
 724 #ifdef CONFIG_X86_IO_APIC
 725         int i;
 726 #endif
 727         int count = sizeof(*mpc);
 728         int nr_m_spare = 0;
 729         unsigned char *mpt = ((unsigned char *)mpc) + count;
 730
 731         pr_info("mpc_length %x\n", mpc->length);
 732         while (count < mpc->length) {
 733                 switch (*mpt) {
 734                 case MP_PROCESSOR:
 735                         skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
 736                         break;
 737                 case MP_BUS:
 738                         skip_entry(&mpt, &count, sizeof(struct mpc_bus));
 739                         break;
 740                 case MP_IOAPIC:
 741                         skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
 742                         break;
 743                 case MP_INTSRC:
 744                         check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare);
 745                         skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
 746                         break;
 747                 case MP_LINTSRC:
 748                         skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
 749                         break;
 750                 default:
 751                         /* wrong mptable */
 752                         smp_dump_mptable(mpc, mpt);
 753                         goto out;
 754                 }
 755         }
 756
 757 #ifdef CONFIG_X86_IO_APIC
 758         for (i = 0; i < mp_irq_entries; i++) {
 759                 if (irq_used[i])
 760                         continue;
 761
 762                 if (mp_irqs[i].irqtype != mp_INT)
 763                         continue;
 764
 765                 if (mp_irqs[i].irqflag != 0x0f)
 766                         continue;
 767
 768                 if (nr_m_spare > 0) {
 769                         apic_printk(APIC_VERBOSE, "*NEW* found\n");
 770                         nr_m_spare--;
 771                         memcpy(m_spare[nr_m_spare], &mp_irqs[i], sizeof(mp_irqs[i]));
 772                         m_spare[nr_m_spare] = NULL;
 773                 } else {
 774                         struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
 775                         count += sizeof(struct mpc_intsrc);
 776                         if (check_slot(mpc_new_phys, mpc_new_length, count) < 0)
 777                                 goto out;
 778                         memcpy(m, &mp_irqs[i], sizeof(*m));
 779                         mpc->length = count;
 780                         mpt += sizeof(struct mpc_intsrc);
 781                 }
 782                 print_mp_irq_info(&mp_irqs[i]);
 783         }
 784 #endif
 785 out:
 786         /* update checksum */
 787         mpc->checksum = 0;
 788         mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length);
 789
 790         return 0;
 791 }
 792
 793 int enable_update_mptable;
 794
 795 static int __init update_mptable_setup(char *str)
 796 {
 797         enable_update_mptable = 1;
 798 #ifdef CONFIG_PCI
 799         pci_routeirq = 1;
 800 #endif
 801         return 0;
 802 }
 803 early_param("update_mptable", update_mptable_setup);
 804
 805 static unsigned long __initdata mpc_new_phys;
 806 static unsigned long mpc_new_length __initdata = 4096;
 807
 808 /* alloc_mptable or alloc_mptable=4k */
 809 static int __initdata alloc_mptable;
 810 static int __init parse_alloc_mptable_opt(char *p)
 811 {
 812         enable_update_mptable = 1;
 813 #ifdef CONFIG_PCI
 814         pci_routeirq = 1;
 815 #endif
 816         alloc_mptable = 1;
 817         if (!p)
 818                 return 0;
 819         mpc_new_length = memparse(p, &p);
 820         return 0;
 821 }
 822 early_param("alloc_mptable", parse_alloc_mptable_opt);
 823
 824 void __init early_reserve_e820_mpc_new(void)
 825 {
 826         if (enable_update_mptable && alloc_mptable)
 827                 mpc_new_phys = early_reserve_e820(mpc_new_length, 4);
 828 }
 829
 830 static int __init update_mp_table(void)
 831 {
 832         char str[16];
 833         char oem[10];
 834         struct mpf_intel *mpf;
 835         struct mpc_table *mpc, *mpc_new;
 836
 837         if (!enable_update_mptable)
 838                 return 0;
 839
 840         mpf = mpf_found;
 841         if (!mpf)
 842                 return 0;
 843
 844         /*
 845          * Now see if we need to go further.
 846          */
 847         if (mpf->feature1 != 0)
 848                 return 0;
 849
 850         if (!mpf->physptr)
 851                 return 0;
 852
 853         mpc = phys_to_virt(mpf->physptr);
 854
 855         if (!smp_check_mpc(mpc, oem, str))
 856                 return 0;
 857
 858         pr_info("mpf: %llx\n", (u64)virt_to_phys(mpf));
 859         pr_info("physptr: %x\n", mpf->physptr);
 860
 861         if (mpc_new_phys && mpc->length > mpc_new_length) {
 862                 mpc_new_phys = 0;
 863                 pr_info("mpc_new_length is %ld, please use alloc_mptable=8k\n",
 864                         mpc_new_length);
 865         }
 866
 867         if (!mpc_new_phys) {
 868                 unsigned char old, new;
 869                 /* check if we can change the position */
 870                 mpc->checksum = 0;
 871                 old = mpf_checksum((unsigned char *)mpc, mpc->length);
 872                 mpc->checksum = 0xff;
 873                 new = mpf_checksum((unsigned char *)mpc, mpc->length);
 874                 if (old == new) {
 875                         pr_info("mpc is readonly, please try alloc_mptable instead\n");
 876                         return 0;
 877                 }
 878                 pr_info("use in-position replacing\n");
 879         } else {
 880                 mpf->physptr = mpc_new_phys;
 881                 mpc_new = phys_to_virt(mpc_new_phys);
 882                 memcpy(mpc_new, mpc, mpc->length);
 883                 mpc = mpc_new;
 884                 /* check if we can modify that */
 885                 if (mpc_new_phys - mpf->physptr) {
 886                         struct mpf_intel *mpf_new;
 887                         /* steal 16 bytes from [0, 1k) */
 888                         pr_info("mpf new: %x\n", 0x400 - 16);
 889                         mpf_new = phys_to_virt(0x400 - 16);
 890                         memcpy(mpf_new, mpf, 16);
 891                         mpf = mpf_new;
 892                         mpf->physptr = mpc_new_phys;
 893                 }
 894                 mpf->checksum = 0;
 895                 mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16);
 896                 pr_info("physptr new: %x\n", mpf->physptr);
 897         }
 898
 899         /*
 900          * only replace the one with mp_INT and
 901          *       MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
 902          * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
 903          * may need pci=routeirq for all coverage
 904          */
 905         replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
 906
 907         return 0;
 908 }
 909
 910 late_initcall(update_mp_table);