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x86: move phys_cpu_present_map to smpboot.c (64bit)
[deliverable/linux.git] / arch / x86 / kernel / mpparse_64.c
1 /*
2 * Intel Multiprocessor Specification 1.1 and 1.4
3 * compliant MP-table parsing routines.
4 *
5 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
7 *
8 * Fixes
9 * Erich Boleyn : MP v1.4 and additional changes.
10 * Alan Cox : Added EBDA scanning
11 * Ingo Molnar : various cleanups and rewrites
12 * Maciej W. Rozycki: Bits for default MP configurations
13 * Paul Diefenbaugh: Added full ACPI support
14 */
15
16 #include <linux/mm.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/bootmem.h>
20 #include <linux/kernel_stat.h>
21 #include <linux/mc146818rtc.h>
22 #include <linux/acpi.h>
23 #include <linux/module.h>
24
25 #include <asm/smp.h>
26 #include <asm/mtrr.h>
27 #include <asm/mpspec.h>
28 #include <asm/pgalloc.h>
29 #include <asm/io_apic.h>
30 #include <asm/proto.h>
31 #include <asm/acpi.h>
32 #include <asm/bios_ebda.h>
33
34 #include <mach_apic.h>
35
36 /* Have we found an MP table */
37 int smp_found_config;
38 unsigned int __cpuinitdata maxcpus = NR_CPUS;
39
40 /*
41 * Various Linux-internal data structures created from the
42 * MP-table.
43 */
44 DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
45 int mp_bus_id_to_pci_bus[MAX_MP_BUSSES] = {[0 ... MAX_MP_BUSSES - 1] = -1 };
46
47 static int mp_current_pci_id = 0;
48 /* I/O APIC entries */
49 struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS];
50
51 /* # of MP IRQ source entries */
52 struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
53
54 /* MP IRQ source entries */
55 int mp_irq_entries;
56
57 int nr_ioapics;
58
59 /* Processor that is doing the boot up */
60 unsigned int boot_cpu_physical_apicid = -1U;
61 EXPORT_SYMBOL(boot_cpu_physical_apicid);
62
63 /* Internal processor count */
64 unsigned int num_processors;
65
66 unsigned disabled_cpus __cpuinitdata;
67
68 #ifdef CONFIG_SMP
69 u16 x86_bios_cpu_apicid_init[NR_CPUS] __initdata
70 = {[0 ... NR_CPUS - 1] = BAD_APICID };
71 void *x86_bios_cpu_apicid_early_ptr;
72 #endif
73 DEFINE_PER_CPU(u16, x86_bios_cpu_apicid) = BAD_APICID;
74 EXPORT_PER_CPU_SYMBOL(x86_bios_cpu_apicid);
75
76 /*
77 * Intel MP BIOS table parsing routines:
78 */
79
80 /*
81 * Checksum an MP configuration block.
82 */
83
84 static int __init mpf_checksum(unsigned char *mp, int len)
85 {
86 int sum = 0;
87
88 while (len--)
89 sum += *mp++;
90
91 return sum & 0xFF;
92 }
93
94 void __cpuinit generic_processor_info(int apicid, int version)
95 {
96 int cpu;
97 cpumask_t tmp_map;
98
99 if (num_processors >= NR_CPUS) {
100 printk(KERN_WARNING "WARNING: NR_CPUS limit of %i reached."
101 " Processor ignored.\n", NR_CPUS);
102 return;
103 }
104
105 if (num_processors >= maxcpus) {
106 printk(KERN_WARNING "WARNING: maxcpus limit of %i reached."
107 " Processor ignored.\n", maxcpus);
108 return;
109 }
110
111 num_processors++;
112 cpus_complement(tmp_map, cpu_present_map);
113 cpu = first_cpu(tmp_map);
114
115 physid_set(apicid, phys_cpu_present_map);
116 if (apicid == boot_cpu_physical_apicid) {
117 /*
118 * x86_bios_cpu_apicid is required to have processors listed
119 * in same order as logical cpu numbers. Hence the first
120 * entry is BSP, and so on.
121 */
122 cpu = 0;
123 }
124 /* are we being called early in kernel startup? */
125 if (x86_cpu_to_apicid_early_ptr) {
126 u16 *cpu_to_apicid = x86_cpu_to_apicid_early_ptr;
127 u16 *bios_cpu_apicid = x86_bios_cpu_apicid_early_ptr;
128
129 cpu_to_apicid[cpu] = apicid;
130 bios_cpu_apicid[cpu] = apicid;
131 } else {
132 per_cpu(x86_cpu_to_apicid, cpu) = apicid;
133 per_cpu(x86_bios_cpu_apicid, cpu) = apicid;
134 }
135
136 cpu_set(cpu, cpu_possible_map);
137 cpu_set(cpu, cpu_present_map);
138 }
139
140 static void __cpuinit MP_processor_info(struct mpc_config_processor *m)
141 {
142 char *bootup_cpu = "";
143
144 if (!(m->mpc_cpuflag & CPU_ENABLED)) {
145 disabled_cpus++;
146 return;
147 }
148 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
149 bootup_cpu = " (Bootup-CPU)";
150 boot_cpu_physical_apicid = m->mpc_apicid;
151 }
152
153 printk(KERN_INFO "Processor #%d%s\n", m->mpc_apicid, bootup_cpu);
154 generic_processor_info(m->mpc_apicid, 0);
155 }
156
157 static void __init MP_bus_info(struct mpc_config_bus *m)
158 {
159 char str[7];
160
161 memcpy(str, m->mpc_bustype, 6);
162 str[6] = 0;
163 Dprintk("Bus #%d is %s\n", m->mpc_busid, str);
164
165 if (strncmp(str, "ISA", 3) == 0) {
166 set_bit(m->mpc_busid, mp_bus_not_pci);
167 } else if (strncmp(str, "PCI", 3) == 0) {
168 clear_bit(m->mpc_busid, mp_bus_not_pci);
169 mp_bus_id_to_pci_bus[m->mpc_busid] = mp_current_pci_id;
170 mp_current_pci_id++;
171 } else {
172 printk(KERN_ERR "Unknown bustype %s\n", str);
173 }
174 }
175
176 static int bad_ioapic(unsigned long address)
177 {
178 if (nr_ioapics >= MAX_IO_APICS) {
179 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
180 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
181 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
182 }
183 if (!address) {
184 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
185 " found in table, skipping!\n");
186 return 1;
187 }
188 return 0;
189 }
190
191 static void __init MP_ioapic_info(struct mpc_config_ioapic *m)
192 {
193 if (!(m->mpc_flags & MPC_APIC_USABLE))
194 return;
195
196 printk(KERN_INFO "I/O APIC #%d at 0x%X.\n", m->mpc_apicid,
197 m->mpc_apicaddr);
198
199 if (bad_ioapic(m->mpc_apicaddr))
200 return;
201
202 mp_ioapics[nr_ioapics] = *m;
203 nr_ioapics++;
204 }
205
206 static void __init MP_intsrc_info(struct mpc_config_intsrc *m)
207 {
208 mp_irqs[mp_irq_entries] = *m;
209 Dprintk("Int: type %d, pol %d, trig %d, bus %d,"
210 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
211 m->mpc_irqtype, m->mpc_irqflag & 3,
212 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
213 m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
214 if (++mp_irq_entries >= MAX_IRQ_SOURCES)
215 panic("Max # of irq sources exceeded!!\n");
216 }
217
218 static void __init MP_lintsrc_info(struct mpc_config_lintsrc *m)
219 {
220 Dprintk("Lint: type %d, pol %d, trig %d, bus %d,"
221 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
222 m->mpc_irqtype, m->mpc_irqflag & 3,
223 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbusid,
224 m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint);
225 }
226
227 /*
228 * Read/parse the MPC
229 */
230 static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early)
231 {
232 char str[16];
233 int count = sizeof(*mpc);
234 unsigned char *mpt = ((unsigned char *)mpc) + count;
235
236 if (memcmp(mpc->mpc_signature, MPC_SIGNATURE, 4)) {
237 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
238 mpc->mpc_signature[0],
239 mpc->mpc_signature[1],
240 mpc->mpc_signature[2], mpc->mpc_signature[3]);
241 return 0;
242 }
243 if (mpf_checksum((unsigned char *)mpc, mpc->mpc_length)) {
244 printk(KERN_ERR "MPTABLE: checksum error!\n");
245 return 0;
246 }
247 if (mpc->mpc_spec != 0x01 && mpc->mpc_spec != 0x04) {
248 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
249 mpc->mpc_spec);
250 return 0;
251 }
252 if (!mpc->mpc_lapic) {
253 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
254 return 0;
255 }
256 memcpy(str, mpc->mpc_oem, 8);
257 str[8] = 0;
258 printk(KERN_INFO "MPTABLE: OEM ID: %s ", str);
259
260 memcpy(str, mpc->mpc_productid, 12);
261 str[12] = 0;
262 printk(KERN_INFO "MPTABLE: Product ID: %s ", str);
263
264 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->mpc_lapic);
265
266 /* save the local APIC address, it might be non-default */
267 if (!acpi_lapic)
268 mp_lapic_addr = mpc->mpc_lapic;
269
270 if (early)
271 return 1;
272
273 /*
274 * Now process the configuration blocks.
275 */
276 while (count < mpc->mpc_length) {
277 switch (*mpt) {
278 case MP_PROCESSOR:
279 {
280 struct mpc_config_processor *m =
281 (struct mpc_config_processor *)mpt;
282 if (!acpi_lapic)
283 MP_processor_info(m);
284 mpt += sizeof(*m);
285 count += sizeof(*m);
286 break;
287 }
288 case MP_BUS:
289 {
290 struct mpc_config_bus *m =
291 (struct mpc_config_bus *)mpt;
292 MP_bus_info(m);
293 mpt += sizeof(*m);
294 count += sizeof(*m);
295 break;
296 }
297 case MP_IOAPIC:
298 {
299 struct mpc_config_ioapic *m =
300 (struct mpc_config_ioapic *)mpt;
301 MP_ioapic_info(m);
302 mpt += sizeof(*m);
303 count += sizeof(*m);
304 break;
305 }
306 case MP_INTSRC:
307 {
308 struct mpc_config_intsrc *m =
309 (struct mpc_config_intsrc *)mpt;
310
311 MP_intsrc_info(m);
312 mpt += sizeof(*m);
313 count += sizeof(*m);
314 break;
315 }
316 case MP_LINTSRC:
317 {
318 struct mpc_config_lintsrc *m =
319 (struct mpc_config_lintsrc *)mpt;
320 MP_lintsrc_info(m);
321 mpt += sizeof(*m);
322 count += sizeof(*m);
323 break;
324 }
325 }
326 }
327 setup_apic_routing();
328 if (!num_processors)
329 printk(KERN_ERR "MPTABLE: no processors registered!\n");
330 return num_processors;
331 }
332
333 static int __init ELCR_trigger(unsigned int irq)
334 {
335 unsigned int port;
336
337 port = 0x4d0 + (irq >> 3);
338 return (inb(port) >> (irq & 7)) & 1;
339 }
340
341 static void __init construct_default_ioirq_mptable(int mpc_default_type)
342 {
343 struct mpc_config_intsrc intsrc;
344 int i;
345 int ELCR_fallback = 0;
346
347 intsrc.mpc_type = MP_INTSRC;
348 intsrc.mpc_irqflag = 0; /* conforming */
349 intsrc.mpc_srcbus = 0;
350 intsrc.mpc_dstapic = mp_ioapics[0].mpc_apicid;
351
352 intsrc.mpc_irqtype = mp_INT;
353
354 /*
355 * If true, we have an ISA/PCI system with no IRQ entries
356 * in the MP table. To prevent the PCI interrupts from being set up
357 * incorrectly, we try to use the ELCR. The sanity check to see if
358 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
359 * never be level sensitive, so we simply see if the ELCR agrees.
360 * If it does, we assume it's valid.
361 */
362 if (mpc_default_type == 5) {
363 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
364 "falling back to ELCR\n");
365
366 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
367 ELCR_trigger(13))
368 printk(KERN_ERR "ELCR contains invalid data... "
369 "not using ELCR\n");
370 else {
371 printk(KERN_INFO
372 "Using ELCR to identify PCI interrupts\n");
373 ELCR_fallback = 1;
374 }
375 }
376
377 for (i = 0; i < 16; i++) {
378 switch (mpc_default_type) {
379 case 2:
380 if (i == 0 || i == 13)
381 continue; /* IRQ0 & IRQ13 not connected */
382 /* fall through */
383 default:
384 if (i == 2)
385 continue; /* IRQ2 is never connected */
386 }
387
388 if (ELCR_fallback) {
389 /*
390 * If the ELCR indicates a level-sensitive interrupt, we
391 * copy that information over to the MP table in the
392 * irqflag field (level sensitive, active high polarity).
393 */
394 if (ELCR_trigger(i))
395 intsrc.mpc_irqflag = 13;
396 else
397 intsrc.mpc_irqflag = 0;
398 }
399
400 intsrc.mpc_srcbusirq = i;
401 intsrc.mpc_dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
402 MP_intsrc_info(&intsrc);
403 }
404
405 intsrc.mpc_irqtype = mp_ExtINT;
406 intsrc.mpc_srcbusirq = 0;
407 intsrc.mpc_dstirq = 0; /* 8259A to INTIN0 */
408 MP_intsrc_info(&intsrc);
409 }
410
411 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
412 {
413 struct mpc_config_processor processor;
414 struct mpc_config_bus bus;
415 struct mpc_config_ioapic ioapic;
416 struct mpc_config_lintsrc lintsrc;
417 int linttypes[2] = { mp_ExtINT, mp_NMI };
418 int i;
419
420 /*
421 * local APIC has default address
422 */
423 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
424
425 /*
426 * 2 CPUs, numbered 0 & 1.
427 */
428 processor.mpc_type = MP_PROCESSOR;
429 processor.mpc_apicver = 0;
430 processor.mpc_cpuflag = CPU_ENABLED;
431 processor.mpc_cpufeature = 0;
432 processor.mpc_featureflag = 0;
433 processor.mpc_reserved[0] = 0;
434 processor.mpc_reserved[1] = 0;
435 for (i = 0; i < 2; i++) {
436 processor.mpc_apicid = i;
437 MP_processor_info(&processor);
438 }
439
440 bus.mpc_type = MP_BUS;
441 bus.mpc_busid = 0;
442 switch (mpc_default_type) {
443 default:
444 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
445 mpc_default_type);
446 /* fall through */
447 case 1:
448 case 5:
449 memcpy(bus.mpc_bustype, "ISA ", 6);
450 break;
451 }
452 MP_bus_info(&bus);
453 if (mpc_default_type > 4) {
454 bus.mpc_busid = 1;
455 memcpy(bus.mpc_bustype, "PCI ", 6);
456 MP_bus_info(&bus);
457 }
458
459 ioapic.mpc_type = MP_IOAPIC;
460 ioapic.mpc_apicid = 2;
461 ioapic.mpc_apicver = 0;
462 ioapic.mpc_flags = MPC_APIC_USABLE;
463 ioapic.mpc_apicaddr = 0xFEC00000;
464 MP_ioapic_info(&ioapic);
465
466 /*
467 * We set up most of the low 16 IO-APIC pins according to MPS rules.
468 */
469 construct_default_ioirq_mptable(mpc_default_type);
470
471 lintsrc.mpc_type = MP_LINTSRC;
472 lintsrc.mpc_irqflag = 0; /* conforming */
473 lintsrc.mpc_srcbusid = 0;
474 lintsrc.mpc_srcbusirq = 0;
475 lintsrc.mpc_destapic = MP_APIC_ALL;
476 for (i = 0; i < 2; i++) {
477 lintsrc.mpc_irqtype = linttypes[i];
478 lintsrc.mpc_destapiclint = i;
479 MP_lintsrc_info(&lintsrc);
480 }
481 }
482
483 static struct intel_mp_floating *mpf_found;
484
485 /*
486 * Scan the memory blocks for an SMP configuration block.
487 */
488 static void __init __get_smp_config(unsigned early)
489 {
490 struct intel_mp_floating *mpf = mpf_found;
491
492 if (acpi_lapic && early)
493 return;
494 /*
495 * ACPI supports both logical (e.g. Hyper-Threading) and physical
496 * processors, where MPS only supports physical.
497 */
498 if (acpi_lapic && acpi_ioapic) {
499 printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
500 "information\n");
501 return;
502 } else if (acpi_lapic)
503 printk(KERN_INFO "Using ACPI for processor (LAPIC) "
504 "configuration information\n");
505
506 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
507 mpf->mpf_specification);
508
509 /*
510 * Now see if we need to read further.
511 */
512 if (mpf->mpf_feature1 != 0) {
513 if (early) {
514 /*
515 * local APIC has default address
516 */
517 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
518 return;
519 }
520
521 printk(KERN_INFO "Default MP configuration #%d\n",
522 mpf->mpf_feature1);
523 construct_default_ISA_mptable(mpf->mpf_feature1);
524
525 } else if (mpf->mpf_physptr) {
526
527 /*
528 * Read the physical hardware table. Anything here will
529 * override the defaults.
530 */
531 if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) {
532 smp_found_config = 0;
533 printk(KERN_ERR
534 "BIOS bug, MP table errors detected!...\n");
535 printk(KERN_ERR "... disabling SMP support. "
536 "(tell your hw vendor)\n");
537 return;
538 }
539
540 if (early)
541 return;
542 /*
543 * If there are no explicit MP IRQ entries, then we are
544 * broken. We set up most of the low 16 IO-APIC pins to
545 * ISA defaults and hope it will work.
546 */
547 if (!mp_irq_entries) {
548 struct mpc_config_bus bus;
549
550 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
551 "using default mptable. "
552 "(tell your hw vendor)\n");
553
554 bus.mpc_type = MP_BUS;
555 bus.mpc_busid = 0;
556 memcpy(bus.mpc_bustype, "ISA ", 6);
557 MP_bus_info(&bus);
558
559 construct_default_ioirq_mptable(0);
560 }
561
562 } else
563 BUG();
564
565 if (!early)
566 printk(KERN_INFO "Processors: %d\n", num_processors);
567 /*
568 * Only use the first configuration found.
569 */
570 }
571
572 void __init early_get_smp_config(void)
573 {
574 __get_smp_config(1);
575 }
576
577 void __init get_smp_config(void)
578 {
579 __get_smp_config(0);
580 }
581
582 static int __init smp_scan_config(unsigned long base, unsigned long length,
583 unsigned reserve)
584 {
585 extern void __bad_mpf_size(void);
586 unsigned int *bp = phys_to_virt(base);
587 struct intel_mp_floating *mpf;
588
589 Dprintk("Scan SMP from %p for %ld bytes.\n", bp, length);
590 if (sizeof(*mpf) != 16)
591 __bad_mpf_size();
592
593 while (length > 0) {
594 mpf = (struct intel_mp_floating *)bp;
595 if ((*bp == SMP_MAGIC_IDENT) &&
596 (mpf->mpf_length == 1) &&
597 !mpf_checksum((unsigned char *)bp, 16) &&
598 ((mpf->mpf_specification == 1)
599 || (mpf->mpf_specification == 4))) {
600
601 smp_found_config = 1;
602 mpf_found = mpf;
603
604 if (!reserve)
605 return 1;
606
607 reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE);
608 if (mpf->mpf_physptr)
609 reserve_bootmem_generic(mpf->mpf_physptr,
610 PAGE_SIZE);
611 return 1;
612 }
613 bp += 4;
614 length -= 16;
615 }
616 return 0;
617 }
618
619 static void __init __find_smp_config(unsigned reserve)
620 {
621 unsigned int address;
622
623 /*
624 * FIXME: Linux assumes you have 640K of base ram..
625 * this continues the error...
626 *
627 * 1) Scan the bottom 1K for a signature
628 * 2) Scan the top 1K of base RAM
629 * 3) Scan the 64K of bios
630 */
631 if (smp_scan_config(0x0, 0x400, reserve) ||
632 smp_scan_config(639 * 0x400, 0x400, reserve) ||
633 smp_scan_config(0xF0000, 0x10000, reserve))
634 return;
635 /*
636 * If it is an SMP machine we should know now.
637 *
638 * there is a real-mode segmented pointer pointing to the
639 * 4K EBDA area at 0x40E, calculate and scan it here.
640 *
641 * NOTE! There are Linux loaders that will corrupt the EBDA
642 * area, and as such this kind of SMP config may be less
643 * trustworthy, simply because the SMP table may have been
644 * stomped on during early boot. These loaders are buggy and
645 * should be fixed.
646 *
647 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
648 */
649
650 address = get_bios_ebda();
651 if (address)
652 smp_scan_config(address, 0x400, reserve);
653 }
654
655 void __init early_find_smp_config(void)
656 {
657 __find_smp_config(0);
658 }
659
660 void __init find_smp_config(void)
661 {
662 __find_smp_config(1);
663 }
664
665 /* --------------------------------------------------------------------------
666 ACPI-based MP Configuration
667 -------------------------------------------------------------------------- */
668
669 #ifdef CONFIG_ACPI
670
671 void __init mp_register_lapic_address(u64 address)
672 {
673 mp_lapic_addr = (unsigned long)address;
674 set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
675 if (boot_cpu_physical_apicid == -1U)
676 boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
677 }
678
679 void __cpuinit mp_register_lapic(u8 id, u8 enabled)
680 {
681 if (!enabled) {
682 ++disabled_cpus;
683 return;
684 }
685
686 generic_processor_info(id, 0);
687 }
688
689 #define MP_ISA_BUS 0
690 #define MP_MAX_IOAPIC_PIN 127
691
692 static struct mp_ioapic_routing {
693 int apic_id;
694 int gsi_base;
695 int gsi_end;
696 u32 pin_programmed[4];
697 } mp_ioapic_routing[MAX_IO_APICS];
698
699 static int mp_find_ioapic(int gsi)
700 {
701 int i = 0;
702
703 /* Find the IOAPIC that manages this GSI. */
704 for (i = 0; i < nr_ioapics; i++) {
705 if ((gsi >= mp_ioapic_routing[i].gsi_base)
706 && (gsi <= mp_ioapic_routing[i].gsi_end))
707 return i;
708 }
709
710 printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi);
711 return -1;
712 }
713
714 static u8 uniq_ioapic_id(u8 id)
715 {
716 int i;
717 DECLARE_BITMAP(used, 256);
718 bitmap_zero(used, 256);
719 for (i = 0; i < nr_ioapics; i++) {
720 struct mpc_config_ioapic *ia = &mp_ioapics[i];
721 __set_bit(ia->mpc_apicid, used);
722 }
723 if (!test_bit(id, used))
724 return id;
725 return find_first_zero_bit(used, 256);
726 }
727
728 void __init mp_register_ioapic(u8 id, u32 address, u32 gsi_base)
729 {
730 int idx = 0;
731
732 if (bad_ioapic(address))
733 return;
734
735 idx = nr_ioapics;
736
737 mp_ioapics[idx].mpc_type = MP_IOAPIC;
738 mp_ioapics[idx].mpc_flags = MPC_APIC_USABLE;
739 mp_ioapics[idx].mpc_apicaddr = address;
740
741 set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
742 mp_ioapics[idx].mpc_apicid = uniq_ioapic_id(id);
743 mp_ioapics[idx].mpc_apicver = 0;
744
745 /*
746 * Build basic IRQ lookup table to facilitate gsi->io_apic lookups
747 * and to prevent reprogramming of IOAPIC pins (PCI IRQs).
748 */
749 mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mpc_apicid;
750 mp_ioapic_routing[idx].gsi_base = gsi_base;
751 mp_ioapic_routing[idx].gsi_end = gsi_base +
752 io_apic_get_redir_entries(idx);
753
754 printk(KERN_INFO "IOAPIC[%d]: apic_id %d, address 0x%x, "
755 "GSI %d-%d\n", idx, mp_ioapics[idx].mpc_apicid,
756 mp_ioapics[idx].mpc_apicaddr,
757 mp_ioapic_routing[idx].gsi_base,
758 mp_ioapic_routing[idx].gsi_end);
759
760 nr_ioapics++;
761 }
762
763 void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
764 {
765 struct mpc_config_intsrc intsrc;
766 int ioapic = -1;
767 int pin = -1;
768
769 /*
770 * Convert 'gsi' to 'ioapic.pin'.
771 */
772 ioapic = mp_find_ioapic(gsi);
773 if (ioapic < 0)
774 return;
775 pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
776
777 /*
778 * TBD: This check is for faulty timer entries, where the override
779 * erroneously sets the trigger to level, resulting in a HUGE
780 * increase of timer interrupts!
781 */
782 if ((bus_irq == 0) && (trigger == 3))
783 trigger = 1;
784
785 intsrc.mpc_type = MP_INTSRC;
786 intsrc.mpc_irqtype = mp_INT;
787 intsrc.mpc_irqflag = (trigger << 2) | polarity;
788 intsrc.mpc_srcbus = MP_ISA_BUS;
789 intsrc.mpc_srcbusirq = bus_irq; /* IRQ */
790 intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid; /* APIC ID */
791 intsrc.mpc_dstirq = pin; /* INTIN# */
792
793 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, %d-%d\n",
794 intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
795 (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
796 intsrc.mpc_srcbusirq, intsrc.mpc_dstapic, intsrc.mpc_dstirq);
797
798 mp_irqs[mp_irq_entries] = intsrc;
799 if (++mp_irq_entries == MAX_IRQ_SOURCES)
800 panic("Max # of irq sources exceeded!\n");
801 }
802
803 void __init mp_config_acpi_legacy_irqs(void)
804 {
805 struct mpc_config_intsrc intsrc;
806 int i = 0;
807 int ioapic = -1;
808
809 /*
810 * Fabricate the legacy ISA bus (bus #31).
811 */
812 set_bit(MP_ISA_BUS, mp_bus_not_pci);
813
814 /*
815 * Locate the IOAPIC that manages the ISA IRQs (0-15).
816 */
817 ioapic = mp_find_ioapic(0);
818 if (ioapic < 0)
819 return;
820
821 intsrc.mpc_type = MP_INTSRC;
822 intsrc.mpc_irqflag = 0; /* Conforming */
823 intsrc.mpc_srcbus = MP_ISA_BUS;
824 intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid;
825
826 /*
827 * Use the default configuration for the IRQs 0-15. Unless
828 * overridden by (MADT) interrupt source override entries.
829 */
830 for (i = 0; i < 16; i++) {
831 int idx;
832
833 for (idx = 0; idx < mp_irq_entries; idx++) {
834 struct mpc_config_intsrc *irq = mp_irqs + idx;
835
836 /* Do we already have a mapping for this ISA IRQ? */
837 if (irq->mpc_srcbus == MP_ISA_BUS
838 && irq->mpc_srcbusirq == i)
839 break;
840
841 /* Do we already have a mapping for this IOAPIC pin */
842 if ((irq->mpc_dstapic == intsrc.mpc_dstapic) &&
843 (irq->mpc_dstirq == i))
844 break;
845 }
846
847 if (idx != mp_irq_entries) {
848 printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i);
849 continue; /* IRQ already used */
850 }
851
852 intsrc.mpc_irqtype = mp_INT;
853 intsrc.mpc_srcbusirq = i; /* Identity mapped */
854 intsrc.mpc_dstirq = i;
855
856 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, "
857 "%d-%d\n", intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
858 (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
859 intsrc.mpc_srcbusirq, intsrc.mpc_dstapic,
860 intsrc.mpc_dstirq);
861
862 mp_irqs[mp_irq_entries] = intsrc;
863 if (++mp_irq_entries == MAX_IRQ_SOURCES)
864 panic("Max # of irq sources exceeded!\n");
865 }
866 }
867
868 int mp_register_gsi(u32 gsi, int triggering, int polarity)
869 {
870 int ioapic = -1;
871 int ioapic_pin = 0;
872 int idx, bit = 0;
873
874 if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
875 return gsi;
876
877 /* Don't set up the ACPI SCI because it's already set up */
878 if (acpi_gbl_FADT.sci_interrupt == gsi)
879 return gsi;
880
881 ioapic = mp_find_ioapic(gsi);
882 if (ioapic < 0) {
883 printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi);
884 return gsi;
885 }
886
887 ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
888
889 /*
890 * Avoid pin reprogramming. PRTs typically include entries
891 * with redundant pin->gsi mappings (but unique PCI devices);
892 * we only program the IOAPIC on the first.
893 */
894 bit = ioapic_pin % 32;
895 idx = (ioapic_pin < 32) ? 0 : (ioapic_pin / 32);
896 if (idx > 3) {
897 printk(KERN_ERR "Invalid reference to IOAPIC pin "
898 "%d-%d\n", mp_ioapic_routing[ioapic].apic_id,
899 ioapic_pin);
900 return gsi;
901 }
902 if ((1 << bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {
903 Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
904 mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
905 return gsi;
906 }
907
908 mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1 << bit);
909
910 io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
911 triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
912 polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
913 return gsi;
914 }
915 #endif /* CONFIG_ACPI */
Linux kernel - Deliverables
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