arch/x86/kernel/pci-dma.c

   1 #include <linux/dma-mapping.h>
   2 #include <linux/dmar.h>
   3 #include <linux/bootmem.h>
   4 #include <linux/pci.h>
   5
   6 #include <asm/proto.h>
   7 #include <asm/dma.h>
   8 #include <asm/gart.h>
   9 #include <asm/calgary.h>
  10
  11 int forbid_dac __read_mostly;
  12 EXPORT_SYMBOL(forbid_dac);
  13
  14 const struct dma_mapping_ops *dma_ops;
  15 EXPORT_SYMBOL(dma_ops);
  16
  17 int iommu_sac_force __read_mostly = 0;
  18
  19 #ifdef CONFIG_IOMMU_DEBUG
  20 int panic_on_overflow __read_mostly = 1;
  21 int force_iommu __read_mostly = 1;
  22 #else
  23 int panic_on_overflow __read_mostly = 0;
  24 int force_iommu __read_mostly = 0;
  25 #endif
  26
  27 int dma_set_mask(struct device *dev, u64 mask)
  28 {
  29         if (!dev->dma_mask || !dma_supported(dev, mask))
  30                 return -EIO;
  31
  32         *dev->dma_mask = mask;
  33
  34         return 0;
  35 }
  36 EXPORT_SYMBOL(dma_set_mask);
  37
  38 #ifdef CONFIG_X86_64
  39 static __initdata void *dma32_bootmem_ptr;
  40 static unsigned long dma32_bootmem_size __initdata = (128ULL<<20);
  41
  42 static int __init parse_dma32_size_opt(char *p)
  43 {
  44         if (!p)
  45                 return -EINVAL;
  46         dma32_bootmem_size = memparse(p, &p);
  47         return 0;
  48 }
  49 early_param("dma32_size", parse_dma32_size_opt);
  50
  51 void __init dma32_reserve_bootmem(void)
  52 {
  53         unsigned long size, align;
  54         if (end_pfn <= MAX_DMA32_PFN)
  55                 return;
  56
  57         align = 64ULL<<20;
  58         size = round_up(dma32_bootmem_size, align);
  59         dma32_bootmem_ptr = __alloc_bootmem_nopanic(size, align,
  60                                  __pa(MAX_DMA_ADDRESS));
  61         if (dma32_bootmem_ptr)
  62                 dma32_bootmem_size = size;
  63         else
  64                 dma32_bootmem_size = 0;
  65 }
  66 static void __init dma32_free_bootmem(void)
  67 {
  68         int node;
  69
  70         if (end_pfn <= MAX_DMA32_PFN)
  71                 return;
  72
  73         if (!dma32_bootmem_ptr)
  74                 return;
  75
  76         for_each_online_node(node)
  77                 free_bootmem_node(NODE_DATA(node), __pa(dma32_bootmem_ptr),
  78                                   dma32_bootmem_size);
  79
  80         dma32_bootmem_ptr = NULL;
  81         dma32_bootmem_size = 0;
  82 }
  83
  84 void __init pci_iommu_alloc(void)
  85 {
  86         /* free the range so iommu could get some range less than 4G */
  87         dma32_free_bootmem();
  88         /*
  89          * The order of these functions is important for
  90          * fall-back/fail-over reasons
  91          */
  92 #ifdef CONFIG_GART_IOMMU
  93         gart_iommu_hole_init();
  94 #endif
  95
  96 #ifdef CONFIG_CALGARY_IOMMU
  97         detect_calgary();
  98 #endif
  99
 100         detect_intel_iommu();
 101
 102 #ifdef CONFIG_SWIOTLB
 103         pci_swiotlb_init();
 104 #endif
 105 }
 106 #endif
 107
 108 int dma_supported(struct device *dev, u64 mask)
 109 {
 110 #ifdef CONFIG_PCI
 111         if (mask > 0xffffffff && forbid_dac > 0) {
 112                 printk(KERN_INFO "PCI: Disallowing DAC for device %s\n",
 113                                  dev->bus_id);
 114                 return 0;
 115         }
 116 #endif
 117
 118         if (dma_ops->dma_supported)
 119                 return dma_ops->dma_supported(dev, mask);
 120
 121         /* Copied from i386. Doesn't make much sense, because it will
 122            only work for pci_alloc_coherent.
 123            The caller just has to use GFP_DMA in this case. */
 124         if (mask < DMA_24BIT_MASK)
 125                 return 0;
 126
 127         /* Tell the device to use SAC when IOMMU force is on.  This
 128            allows the driver to use cheaper accesses in some cases.
 129
 130            Problem with this is that if we overflow the IOMMU area and
 131            return DAC as fallback address the device may not handle it
 132            correctly.
 133
 134            As a special case some controllers have a 39bit address
 135            mode that is as efficient as 32bit (aic79xx). Don't force
 136            SAC for these.  Assume all masks <= 40 bits are of this
 137            type. Normally this doesn't make any difference, but gives
 138            more gentle handling of IOMMU overflow. */
 139         if (iommu_sac_force && (mask >= DMA_40BIT_MASK)) {
 140                 printk(KERN_INFO "%s: Force SAC with mask %Lx\n",
 141                                  dev->bus_id, mask);
 142                 return 0;
 143         }
 144
 145         return 1;
 146 }
 147 EXPORT_SYMBOL(dma_supported);
 148
 149
 150 static int __init pci_iommu_init(void)
 151 {
 152 #ifdef CONFIG_CALGARY_IOMMU
 153         calgary_iommu_init();
 154 #endif
 155
 156         intel_iommu_init();
 157
 158 #ifdef CONFIG_GART_IOMMU
 159         gart_iommu_init();
 160 #endif
 161
 162         no_iommu_init();
 163         return 0;
 164 }
 165
 166 void pci_iommu_shutdown(void)
 167 {
 168         gart_iommu_shutdown();
 169 }
 170 /* Must execute after PCI subsystem */
 171 fs_initcall(pci_iommu_init);
 172
 173 #ifdef CONFIG_PCI
 174 /* Many VIA bridges seem to corrupt data for DAC. Disable it here */
 175
 176 static __devinit void via_no_dac(struct pci_dev *dev)
 177 {
 178         if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI && forbid_dac == 0) {
 179                 printk(KERN_INFO "PCI: VIA PCI bridge detected."
 180                                  "Disabling DAC.\n");
 181                 forbid_dac = 1;
 182         }
 183 }
 184 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_ANY_ID, via_no_dac);
 185 #endif