arch/x86/kernel/process.c

   1 #include <linux/errno.h>
   2 #include <linux/kernel.h>
   3 #include <linux/mm.h>
   4 #include <linux/smp.h>
   5 #include <linux/prctl.h>
   6 #include <linux/slab.h>
   7 #include <linux/sched.h>
   8 #include <linux/module.h>
   9 #include <linux/pm.h>
  10 #include <linux/clockchips.h>
  11 #include <linux/random.h>
  12 #include <linux/user-return-notifier.h>
  13 #include <linux/dmi.h>
  14 #include <linux/utsname.h>
  15 #include <trace/events/power.h>
  16 #include <linux/hw_breakpoint.h>
  17 #include <asm/cpu.h>
  18 #include <asm/system.h>
  19 #include <asm/apic.h>
  20 #include <asm/syscalls.h>
  21 #include <asm/idle.h>
  22 #include <asm/uaccess.h>
  23 #include <asm/i387.h>
  24 #include <asm/debugreg.h>
  25
  26 struct kmem_cache *task_xstate_cachep;
  27 EXPORT_SYMBOL_GPL(task_xstate_cachep);
  28
  29 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
  30 {
  31         int ret;
  32
  33         *dst = *src;
  34         if (fpu_allocated(&src->thread.fpu)) {
  35                 memset(&dst->thread.fpu, 0, sizeof(dst->thread.fpu));
  36                 ret = fpu_alloc(&dst->thread.fpu);
  37                 if (ret)
  38                         return ret;
  39                 fpu_copy(&dst->thread.fpu, &src->thread.fpu);
  40         }
  41         return 0;
  42 }
  43
  44 void free_thread_xstate(struct task_struct *tsk)
  45 {
  46         fpu_free(&tsk->thread.fpu);
  47 }
  48
  49 void free_thread_info(struct thread_info *ti)
  50 {
  51         free_thread_xstate(ti->task);
  52         free_pages((unsigned long)ti, get_order(THREAD_SIZE));
  53 }
  54
  55 void arch_task_cache_init(void)
  56 {
  57         task_xstate_cachep =
  58                 kmem_cache_create("task_xstate", xstate_size,
  59                                   __alignof__(union thread_xstate),
  60                                   SLAB_PANIC | SLAB_NOTRACK, NULL);
  61 }
  62
  63 /*
  64  * Free current thread data structures etc..
  65  */
  66 void exit_thread(void)
  67 {
  68         struct task_struct *me = current;
  69         struct thread_struct *t = &me->thread;
  70         unsigned long *bp = t->io_bitmap_ptr;
  71
  72         if (bp) {
  73                 struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
  74
  75                 t->io_bitmap_ptr = NULL;
  76                 clear_thread_flag(TIF_IO_BITMAP);
  77                 /*
  78                  * Careful, clear this in the TSS too:
  79                  */
  80                 memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
  81                 t->io_bitmap_max = 0;
  82                 put_cpu();
  83                 kfree(bp);
  84         }
  85 }
  86
  87 void show_regs(struct pt_regs *regs)
  88 {
  89         show_registers(regs);
  90         show_trace(NULL, regs, (unsigned long *)kernel_stack_pointer(regs));
  91 }
  92
  93 void show_regs_common(void)
  94 {
  95         const char *board, *product;
  96
  97         board = dmi_get_system_info(DMI_BOARD_NAME);
  98         if (!board)
  99                 board = "";
 100         product = dmi_get_system_info(DMI_PRODUCT_NAME);
 101         if (!product)
 102                 product = "";
 103
 104         printk(KERN_CONT "\n");
 105         printk(KERN_DEFAULT "Pid: %d, comm: %.20s %s %s %.*s %s/%s\n",
 106                 current->pid, current->comm, print_tainted(),
 107                 init_utsname()->release,
 108                 (int)strcspn(init_utsname()->version, " "),
 109                 init_utsname()->version, board, product);
 110 }
 111
 112 void flush_thread(void)
 113 {
 114         struct task_struct *tsk = current;
 115
 116         flush_ptrace_hw_breakpoint(tsk);
 117         memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
 118         /*
 119          * Forget coprocessor state..
 120          */
 121         tsk->fpu_counter = 0;
 122         clear_fpu(tsk);
 123         clear_used_math();
 124 }
 125
 126 static void hard_disable_TSC(void)
 127 {
 128         write_cr4(read_cr4() | X86_CR4_TSD);
 129 }
 130
 131 void disable_TSC(void)
 132 {
 133         preempt_disable();
 134         if (!test_and_set_thread_flag(TIF_NOTSC))
 135                 /*
 136                  * Must flip the CPU state synchronously with
 137                  * TIF_NOTSC in the current running context.
 138                  */
 139                 hard_disable_TSC();
 140         preempt_enable();
 141 }
 142
 143 static void hard_enable_TSC(void)
 144 {
 145         write_cr4(read_cr4() & ~X86_CR4_TSD);
 146 }
 147
 148 static void enable_TSC(void)
 149 {
 150         preempt_disable();
 151         if (test_and_clear_thread_flag(TIF_NOTSC))
 152                 /*
 153                  * Must flip the CPU state synchronously with
 154                  * TIF_NOTSC in the current running context.
 155                  */
 156                 hard_enable_TSC();
 157         preempt_enable();
 158 }
 159
 160 int get_tsc_mode(unsigned long adr)
 161 {
 162         unsigned int val;
 163
 164         if (test_thread_flag(TIF_NOTSC))
 165                 val = PR_TSC_SIGSEGV;
 166         else
 167                 val = PR_TSC_ENABLE;
 168
 169         return put_user(val, (unsigned int __user *)adr);
 170 }
 171
 172 int set_tsc_mode(unsigned int val)
 173 {
 174         if (val == PR_TSC_SIGSEGV)
 175                 disable_TSC();
 176         else if (val == PR_TSC_ENABLE)
 177                 enable_TSC();
 178         else
 179                 return -EINVAL;
 180
 181         return 0;
 182 }
 183
 184 void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
 185                       struct tss_struct *tss)
 186 {
 187         struct thread_struct *prev, *next;
 188
 189         prev = &prev_p->thread;
 190         next = &next_p->thread;
 191
 192         if (test_tsk_thread_flag(prev_p, TIF_BLOCKSTEP) ^
 193             test_tsk_thread_flag(next_p, TIF_BLOCKSTEP)) {
 194                 unsigned long debugctl = get_debugctlmsr();
 195
 196                 debugctl &= ~DEBUGCTLMSR_BTF;
 197                 if (test_tsk_thread_flag(next_p, TIF_BLOCKSTEP))
 198                         debugctl |= DEBUGCTLMSR_BTF;
 199
 200                 update_debugctlmsr(debugctl);
 201         }
 202
 203         if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
 204             test_tsk_thread_flag(next_p, TIF_NOTSC)) {
 205                 /* prev and next are different */
 206                 if (test_tsk_thread_flag(next_p, TIF_NOTSC))
 207                         hard_disable_TSC();
 208                 else
 209                         hard_enable_TSC();
 210         }
 211
 212         if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
 213                 /*
 214                  * Copy the relevant range of the IO bitmap.
 215                  * Normally this is 128 bytes or less:
 216                  */
 217                 memcpy(tss->io_bitmap, next->io_bitmap_ptr,
 218                        max(prev->io_bitmap_max, next->io_bitmap_max));
 219         } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
 220                 /*
 221                  * Clear any possible leftover bits:
 222                  */
 223                 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
 224         }
 225         propagate_user_return_notify(prev_p, next_p);
 226 }
 227
 228 int sys_fork(struct pt_regs *regs)
 229 {
 230         return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL);
 231 }
 232
 233 /*
 234  * This is trivial, and on the face of it looks like it
 235  * could equally well be done in user mode.
 236  *
 237  * Not so, for quite unobvious reasons - register pressure.
 238  * In user mode vfork() cannot have a stack frame, and if
 239  * done by calling the "clone()" system call directly, you
 240  * do not have enough call-clobbered registers to hold all
 241  * the information you need.
 242  */
 243 int sys_vfork(struct pt_regs *regs)
 244 {
 245         return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0,
 246                        NULL, NULL);
 247 }
 248
 249 long
 250 sys_clone(unsigned long clone_flags, unsigned long newsp,
 251           void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
 252 {
 253         if (!newsp)
 254                 newsp = regs->sp;
 255         return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
 256 }
 257
 258 /*
 259  * This gets run with %si containing the
 260  * function to call, and %di containing
 261  * the "args".
 262  */
 263 extern void kernel_thread_helper(void);
 264
 265 /*
 266  * Create a kernel thread
 267  */
 268 int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
 269 {
 270         struct pt_regs regs;
 271
 272         memset(&regs, 0, sizeof(regs));
 273
 274         regs.si = (unsigned long) fn;
 275         regs.di = (unsigned long) arg;
 276
 277 #ifdef CONFIG_X86_32
 278         regs.ds = __USER_DS;
 279         regs.es = __USER_DS;
 280         regs.fs = __KERNEL_PERCPU;
 281         regs.gs = __KERNEL_STACK_CANARY;
 282 #else
 283         regs.ss = __KERNEL_DS;
 284 #endif
 285
 286         regs.orig_ax = -1;
 287         regs.ip = (unsigned long) kernel_thread_helper;
 288         regs.cs = __KERNEL_CS | get_kernel_rpl();
 289         regs.flags = X86_EFLAGS_IF | 0x2;
 290
 291         /* Ok, create the new process.. */
 292         return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs, 0, NULL, NULL);
 293 }
 294 EXPORT_SYMBOL(kernel_thread);
 295
 296 /*
 297  * sys_execve() executes a new program.
 298  */
 299 long sys_execve(const char __user *name,
 300                 const char __user *const __user *argv,
 301                 const char __user *const __user *envp, struct pt_regs *regs)
 302 {
 303         long error;
 304         char *filename;
 305
 306         filename = getname(name);
 307         error = PTR_ERR(filename);
 308         if (IS_ERR(filename))
 309                 return error;
 310         error = do_execve(filename, argv, envp, regs);
 311
 312 #ifdef CONFIG_X86_32
 313         if (error == 0) {
 314                 /* Make sure we don't return using sysenter.. */
 315                 set_thread_flag(TIF_IRET);
 316         }
 317 #endif
 318
 319         putname(filename);
 320         return error;
 321 }
 322
 323 /*
 324  * Idle related variables and functions
 325  */
 326 unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;
 327 EXPORT_SYMBOL(boot_option_idle_override);
 328
 329 /*
 330  * Powermanagement idle function, if any..
 331  */
 332 void (*pm_idle)(void);
 333 EXPORT_SYMBOL(pm_idle);
 334
 335 #ifdef CONFIG_X86_32
 336 /*
 337  * This halt magic was a workaround for ancient floppy DMA
 338  * wreckage. It should be safe to remove.
 339  */
 340 static int hlt_counter;
 341 void disable_hlt(void)
 342 {
 343         hlt_counter++;
 344 }
 345 EXPORT_SYMBOL(disable_hlt);
 346
 347 void enable_hlt(void)
 348 {
 349         hlt_counter--;
 350 }
 351 EXPORT_SYMBOL(enable_hlt);
 352
 353 static inline int hlt_use_halt(void)
 354 {
 355         return (!hlt_counter && boot_cpu_data.hlt_works_ok);
 356 }
 357 #else
 358 static inline int hlt_use_halt(void)
 359 {
 360         return 1;
 361 }
 362 #endif
 363
 364 /*
 365  * We use this if we don't have any better
 366  * idle routine..
 367  */
 368 void default_idle(void)
 369 {
 370         if (hlt_use_halt()) {
 371                 trace_power_start(POWER_CSTATE, 1, smp_processor_id());
 372                 trace_cpu_idle(1, smp_processor_id());
 373                 current_thread_info()->status &= ~TS_POLLING;
 374                 /*
 375                  * TS_POLLING-cleared state must be visible before we
 376                  * test NEED_RESCHED:
 377                  */
 378                 smp_mb();
 379
 380                 if (!need_resched())
 381                         safe_halt();    /* enables interrupts racelessly */
 382                 else
 383                         local_irq_enable();
 384                 current_thread_info()->status |= TS_POLLING;
 385                 trace_power_end(smp_processor_id());
 386                 trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());
 387         } else {
 388                 local_irq_enable();
 389                 /* loop is done by the caller */
 390                 cpu_relax();
 391         }
 392 }
 393 #ifdef CONFIG_APM_MODULE
 394 EXPORT_SYMBOL(default_idle);
 395 #endif
 396
 397 void stop_this_cpu(void *dummy)
 398 {
 399         local_irq_disable();
 400         /*
 401          * Remove this CPU:
 402          */
 403         set_cpu_online(smp_processor_id(), false);
 404         disable_local_APIC();
 405
 406         for (;;) {
 407                 if (hlt_works(smp_processor_id()))
 408                         halt();
 409         }
 410 }
 411
 412 static void do_nothing(void *unused)
 413 {
 414 }
 415
 416 /*
 417  * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
 418  * pm_idle and update to new pm_idle value. Required while changing pm_idle
 419  * handler on SMP systems.
 420  *
 421  * Caller must have changed pm_idle to the new value before the call. Old
 422  * pm_idle value will not be used by any CPU after the return of this function.
 423  */
 424 void cpu_idle_wait(void)
 425 {
 426         smp_mb();
 427         /* kick all the CPUs so that they exit out of pm_idle */
 428         smp_call_function(do_nothing, NULL, 1);
 429 }
 430 EXPORT_SYMBOL_GPL(cpu_idle_wait);
 431
 432 /*
 433  * This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
 434  * which can obviate IPI to trigger checking of need_resched.
 435  * We execute MONITOR against need_resched and enter optimized wait state
 436  * through MWAIT. Whenever someone changes need_resched, we would be woken
 437  * up from MWAIT (without an IPI).
 438  *
 439  * New with Core Duo processors, MWAIT can take some hints based on CPU
 440  * capability.
 441  */
 442 void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
 443 {
 444         if (!need_resched()) {
 445                 if (cpu_has(__this_cpu_ptr(&cpu_info), X86_FEATURE_CLFLUSH_MONITOR))
 446                         clflush((void *)&current_thread_info()->flags);
 447
 448                 __monitor((void *)&current_thread_info()->flags, 0, 0);
 449                 smp_mb();
 450                 if (!need_resched())
 451                         __mwait(ax, cx);
 452         }
 453 }
 454
 455 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
 456 static void mwait_idle(void)
 457 {
 458         if (!need_resched()) {
 459                 trace_power_start(POWER_CSTATE, 1, smp_processor_id());
 460                 trace_cpu_idle(1, smp_processor_id());
 461                 if (cpu_has(__this_cpu_ptr(&cpu_info), X86_FEATURE_CLFLUSH_MONITOR))
 462                         clflush((void *)&current_thread_info()->flags);
 463
 464                 __monitor((void *)&current_thread_info()->flags, 0, 0);
 465                 smp_mb();
 466                 if (!need_resched())
 467                         __sti_mwait(0, 0);
 468                 else
 469                         local_irq_enable();
 470                 trace_power_end(smp_processor_id());
 471                 trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());
 472         } else
 473                 local_irq_enable();
 474 }
 475
 476 /*
 477  * On SMP it's slightly faster (but much more power-consuming!)
 478  * to poll the ->work.need_resched flag instead of waiting for the
 479  * cross-CPU IPI to arrive. Use this option with caution.
 480  */
 481 static void poll_idle(void)
 482 {
 483         trace_power_start(POWER_CSTATE, 0, smp_processor_id());
 484         trace_cpu_idle(0, smp_processor_id());
 485         local_irq_enable();
 486         while (!need_resched())
 487                 cpu_relax();
 488         trace_power_end(smp_processor_id());
 489         trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());
 490 }
 491
 492 /*
 493  * mwait selection logic:
 494  *
 495  * It depends on the CPU. For AMD CPUs that support MWAIT this is
 496  * wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings
 497  * then depend on a clock divisor and current Pstate of the core. If
 498  * all cores of a processor are in halt state (C1) the processor can
 499  * enter the C1E (C1 enhanced) state. If mwait is used this will never
 500  * happen.
 501  *
 502  * idle=mwait overrides this decision and forces the usage of mwait.
 503  */
 504
 505 #define MWAIT_INFO                      0x05
 506 #define MWAIT_ECX_EXTENDED_INFO         0x01
 507 #define MWAIT_EDX_C1                    0xf0
 508
 509 int __cpuinit mwait_usable(const struct cpuinfo_x86 *c)
 510 {
 511         u32 eax, ebx, ecx, edx;
 512
 513         if (boot_option_idle_override == IDLE_FORCE_MWAIT)
 514                 return 1;
 515
 516         if (c->cpuid_level < MWAIT_INFO)
 517                 return 0;
 518
 519         cpuid(MWAIT_INFO, &eax, &ebx, &ecx, &edx);
 520         /* Check, whether EDX has extended info about MWAIT */
 521         if (!(ecx & MWAIT_ECX_EXTENDED_INFO))
 522                 return 1;
 523
 524         /*
 525          * edx enumeratios MONITOR/MWAIT extensions. Check, whether
 526          * C1  supports MWAIT
 527          */
 528         return (edx & MWAIT_EDX_C1);
 529 }
 530
 531 bool c1e_detected;
 532 EXPORT_SYMBOL(c1e_detected);
 533
 534 static cpumask_var_t c1e_mask;
 535
 536 void c1e_remove_cpu(int cpu)
 537 {
 538         if (c1e_mask != NULL)
 539                 cpumask_clear_cpu(cpu, c1e_mask);
 540 }
 541
 542 /*
 543  * C1E aware idle routine. We check for C1E active in the interrupt
 544  * pending message MSR. If we detect C1E, then we handle it the same
 545  * way as C3 power states (local apic timer and TSC stop)
 546  */
 547 static void c1e_idle(void)
 548 {
 549         if (need_resched())
 550                 return;
 551
 552         if (!c1e_detected) {
 553                 u32 lo, hi;
 554
 555                 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
 556
 557                 if (lo & K8_INTP_C1E_ACTIVE_MASK) {
 558                         c1e_detected = true;
 559                         if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
 560                                 mark_tsc_unstable("TSC halt in AMD C1E");
 561                         printk(KERN_INFO "System has AMD C1E enabled\n");
 562                 }
 563         }
 564
 565         if (c1e_detected) {
 566                 int cpu = smp_processor_id();
 567
 568                 if (!cpumask_test_cpu(cpu, c1e_mask)) {
 569                         cpumask_set_cpu(cpu, c1e_mask);
 570                         /*
 571                          * Force broadcast so ACPI can not interfere.
 572                          */
 573                         clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
 574                                            &cpu);
 575                         printk(KERN_INFO "Switch to broadcast mode on CPU%d\n",
 576                                cpu);
 577                 }
 578                 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
 579
 580                 default_idle();
 581
 582                 /*
 583                  * The switch back from broadcast mode needs to be
 584                  * called with interrupts disabled.
 585                  */
 586                  local_irq_disable();
 587                  clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
 588                  local_irq_enable();
 589         } else
 590                 default_idle();
 591 }
 592
 593 void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
 594 {
 595 #ifdef CONFIG_SMP
 596         if (pm_idle == poll_idle && smp_num_siblings > 1) {
 597                 printk_once(KERN_WARNING "WARNING: polling idle and HT enabled,"
 598                         " performance may degrade.\n");
 599         }
 600 #endif
 601         if (pm_idle)
 602                 return;
 603
 604         if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
 605                 /*
 606                  * One CPU supports mwait => All CPUs supports mwait
 607                  */
 608                 printk(KERN_INFO "using mwait in idle threads.\n");
 609                 pm_idle = mwait_idle;
 610         } else if (cpu_has_amd_erratum(amd_erratum_400)) {
 611                 /* E400: APIC timer interrupt does not wake up CPU from C1e */
 612                 printk(KERN_INFO "using C1E aware idle routine\n");
 613                 pm_idle = c1e_idle;
 614         } else
 615                 pm_idle = default_idle;
 616 }
 617
 618 void __init init_c1e_mask(void)
 619 {
 620         /* If we're using c1e_idle, we need to allocate c1e_mask. */
 621         if (pm_idle == c1e_idle)
 622                 zalloc_cpumask_var(&c1e_mask, GFP_KERNEL);
 623 }
 624
 625 static int __init idle_setup(char *str)
 626 {
 627         if (!str)
 628                 return -EINVAL;
 629
 630         if (!strcmp(str, "poll")) {
 631                 printk("using polling idle threads.\n");
 632                 pm_idle = poll_idle;
 633                 boot_option_idle_override = IDLE_POLL;
 634         } else if (!strcmp(str, "mwait")) {
 635                 boot_option_idle_override = IDLE_FORCE_MWAIT;
 636         } else if (!strcmp(str, "halt")) {
 637                 /*
 638                  * When the boot option of idle=halt is added, halt is
 639                  * forced to be used for CPU idle. In such case CPU C2/C3
 640                  * won't be used again.
 641                  * To continue to load the CPU idle driver, don't touch
 642                  * the boot_option_idle_override.
 643                  */
 644                 pm_idle = default_idle;
 645                 boot_option_idle_override = IDLE_HALT;
 646         } else if (!strcmp(str, "nomwait")) {
 647                 /*
 648                  * If the boot option of "idle=nomwait" is added,
 649                  * it means that mwait will be disabled for CPU C2/C3
 650                  * states. In such case it won't touch the variable
 651                  * of boot_option_idle_override.
 652                  */
 653                 boot_option_idle_override = IDLE_NOMWAIT;
 654         } else
 655                 return -1;
 656
 657         return 0;
 658 }
 659 early_param("idle", idle_setup);
 660
 661 unsigned long arch_align_stack(unsigned long sp)
 662 {
 663         if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
 664                 sp -= get_random_int() % 8192;
 665         return sp & ~0xf;
 666 }
 667
 668 unsigned long arch_randomize_brk(struct mm_struct *mm)
 669 {
 670         unsigned long range_end = mm->brk + 0x02000000;
 671         return randomize_range(mm->brk, range_end, 0) ? : mm->brk;
 672 }
 673