arch/x86/kernel/process.c

   1 #include <linux/errno.h>
   2 #include <linux/kernel.h>
   3 #include <linux/mm.h>
   4 #include <linux/smp.h>
   5 #include <linux/prctl.h>
   6 #include <linux/slab.h>
   7 #include <linux/sched.h>
   8 #include <linux/module.h>
   9 #include <linux/pm.h>
  10 #include <linux/clockchips.h>
  11 #include <linux/random.h>
  12 #include <linux/user-return-notifier.h>
  13 #include <linux/dmi.h>
  14 #include <linux/utsname.h>
  15 #include <trace/events/power.h>
  16 #include <linux/hw_breakpoint.h>
  17 #include <asm/cpu.h>
  18 #include <asm/system.h>
  19 #include <asm/apic.h>
  20 #include <asm/syscalls.h>
  21 #include <asm/idle.h>
  22 #include <asm/uaccess.h>
  23 #include <asm/i387.h>
  24 #include <asm/debugreg.h>
  25
  26 struct kmem_cache *task_xstate_cachep;
  27 EXPORT_SYMBOL_GPL(task_xstate_cachep);
  28
  29 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
  30 {
  31         int ret;
  32
  33         *dst = *src;
  34         if (fpu_allocated(&src->thread.fpu)) {
  35                 memset(&dst->thread.fpu, 0, sizeof(dst->thread.fpu));
  36                 ret = fpu_alloc(&dst->thread.fpu);
  37                 if (ret)
  38                         return ret;
  39                 fpu_copy(&dst->thread.fpu, &src->thread.fpu);
  40         }
  41         return 0;
  42 }
  43
  44 void free_thread_xstate(struct task_struct *tsk)
  45 {
  46         fpu_free(&tsk->thread.fpu);
  47 }
  48
  49 void free_thread_info(struct thread_info *ti)
  50 {
  51         free_thread_xstate(ti->task);
  52         free_pages((unsigned long)ti, get_order(THREAD_SIZE));
  53 }
  54
  55 void arch_task_cache_init(void)
  56 {
  57         task_xstate_cachep =
  58                 kmem_cache_create("task_xstate", xstate_size,
  59                                   __alignof__(union thread_xstate),
  60                                   SLAB_PANIC | SLAB_NOTRACK, NULL);
  61 }
  62
  63 /*
  64  * Free current thread data structures etc..
  65  */
  66 void exit_thread(void)
  67 {
  68         struct task_struct *me = current;
  69         struct thread_struct *t = &me->thread;
  70         unsigned long *bp = t->io_bitmap_ptr;
  71
  72         if (bp) {
  73                 struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
  74
  75                 t->io_bitmap_ptr = NULL;
  76                 clear_thread_flag(TIF_IO_BITMAP);
  77                 /*
  78                  * Careful, clear this in the TSS too:
  79                  */
  80                 memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
  81                 t->io_bitmap_max = 0;
  82                 put_cpu();
  83                 kfree(bp);
  84         }
  85 }
  86
  87 void show_regs(struct pt_regs *regs)
  88 {
  89         show_registers(regs);
  90         show_trace(NULL, regs, (unsigned long *)kernel_stack_pointer(regs));
  91 }
  92
  93 void show_regs_common(void)
  94 {
  95         const char *vendor, *product, *board;
  96
  97         vendor = dmi_get_system_info(DMI_SYS_VENDOR);
  98         if (!vendor)
  99                 vendor = "";
 100         product = dmi_get_system_info(DMI_PRODUCT_NAME);
 101         if (!product)
 102                 product = "";
 103
 104         /* Board Name is optional */
 105         board = dmi_get_system_info(DMI_BOARD_NAME);
 106
 107         printk(KERN_CONT "\n");
 108         printk(KERN_DEFAULT "Pid: %d, comm: %.20s %s %s %.*s",
 109                 current->pid, current->comm, print_tainted(),
 110                 init_utsname()->release,
 111                 (int)strcspn(init_utsname()->version, " "),
 112                 init_utsname()->version);
 113         printk(KERN_CONT " ");
 114         printk(KERN_CONT "%s %s", vendor, product);
 115         if (board) {
 116                 printk(KERN_CONT "/");
 117                 printk(KERN_CONT "%s", board);
 118         }
 119         printk(KERN_CONT "\n");
 120 }
 121
 122 void flush_thread(void)
 123 {
 124         struct task_struct *tsk = current;
 125
 126         flush_ptrace_hw_breakpoint(tsk);
 127         memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
 128         /*
 129          * Forget coprocessor state..
 130          */
 131         tsk->fpu_counter = 0;
 132         clear_fpu(tsk);
 133         clear_used_math();
 134 }
 135
 136 static void hard_disable_TSC(void)
 137 {
 138         write_cr4(read_cr4() | X86_CR4_TSD);
 139 }
 140
 141 void disable_TSC(void)
 142 {
 143         preempt_disable();
 144         if (!test_and_set_thread_flag(TIF_NOTSC))
 145                 /*
 146                  * Must flip the CPU state synchronously with
 147                  * TIF_NOTSC in the current running context.
 148                  */
 149                 hard_disable_TSC();
 150         preempt_enable();
 151 }
 152
 153 static void hard_enable_TSC(void)
 154 {
 155         write_cr4(read_cr4() & ~X86_CR4_TSD);
 156 }
 157
 158 static void enable_TSC(void)
 159 {
 160         preempt_disable();
 161         if (test_and_clear_thread_flag(TIF_NOTSC))
 162                 /*
 163                  * Must flip the CPU state synchronously with
 164                  * TIF_NOTSC in the current running context.
 165                  */
 166                 hard_enable_TSC();
 167         preempt_enable();
 168 }
 169
 170 int get_tsc_mode(unsigned long adr)
 171 {
 172         unsigned int val;
 173
 174         if (test_thread_flag(TIF_NOTSC))
 175                 val = PR_TSC_SIGSEGV;
 176         else
 177                 val = PR_TSC_ENABLE;
 178
 179         return put_user(val, (unsigned int __user *)adr);
 180 }
 181
 182 int set_tsc_mode(unsigned int val)
 183 {
 184         if (val == PR_TSC_SIGSEGV)
 185                 disable_TSC();
 186         else if (val == PR_TSC_ENABLE)
 187                 enable_TSC();
 188         else
 189                 return -EINVAL;
 190
 191         return 0;
 192 }
 193
 194 void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
 195                       struct tss_struct *tss)
 196 {
 197         struct thread_struct *prev, *next;
 198
 199         prev = &prev_p->thread;
 200         next = &next_p->thread;
 201
 202         if (test_tsk_thread_flag(prev_p, TIF_BLOCKSTEP) ^
 203             test_tsk_thread_flag(next_p, TIF_BLOCKSTEP)) {
 204                 unsigned long debugctl = get_debugctlmsr();
 205
 206                 debugctl &= ~DEBUGCTLMSR_BTF;
 207                 if (test_tsk_thread_flag(next_p, TIF_BLOCKSTEP))
 208                         debugctl |= DEBUGCTLMSR_BTF;
 209
 210                 update_debugctlmsr(debugctl);
 211         }
 212
 213         if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
 214             test_tsk_thread_flag(next_p, TIF_NOTSC)) {
 215                 /* prev and next are different */
 216                 if (test_tsk_thread_flag(next_p, TIF_NOTSC))
 217                         hard_disable_TSC();
 218                 else
 219                         hard_enable_TSC();
 220         }
 221
 222         if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
 223                 /*
 224                  * Copy the relevant range of the IO bitmap.
 225                  * Normally this is 128 bytes or less:
 226                  */
 227                 memcpy(tss->io_bitmap, next->io_bitmap_ptr,
 228                        max(prev->io_bitmap_max, next->io_bitmap_max));
 229         } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
 230                 /*
 231                  * Clear any possible leftover bits:
 232                  */
 233                 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
 234         }
 235         propagate_user_return_notify(prev_p, next_p);
 236 }
 237
 238 int sys_fork(struct pt_regs *regs)
 239 {
 240         return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL);
 241 }
 242
 243 /*
 244  * This is trivial, and on the face of it looks like it
 245  * could equally well be done in user mode.
 246  *
 247  * Not so, for quite unobvious reasons - register pressure.
 248  * In user mode vfork() cannot have a stack frame, and if
 249  * done by calling the "clone()" system call directly, you
 250  * do not have enough call-clobbered registers to hold all
 251  * the information you need.
 252  */
 253 int sys_vfork(struct pt_regs *regs)
 254 {
 255         return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0,
 256                        NULL, NULL);
 257 }
 258
 259 long
 260 sys_clone(unsigned long clone_flags, unsigned long newsp,
 261           void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
 262 {
 263         if (!newsp)
 264                 newsp = regs->sp;
 265         return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
 266 }
 267
 268 /*
 269  * This gets run with %si containing the
 270  * function to call, and %di containing
 271  * the "args".
 272  */
 273 extern void kernel_thread_helper(void);
 274
 275 /*
 276  * Create a kernel thread
 277  */
 278 int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
 279 {
 280         struct pt_regs regs;
 281
 282         memset(&regs, 0, sizeof(regs));
 283
 284         regs.si = (unsigned long) fn;
 285         regs.di = (unsigned long) arg;
 286
 287 #ifdef CONFIG_X86_32
 288         regs.ds = __USER_DS;
 289         regs.es = __USER_DS;
 290         regs.fs = __KERNEL_PERCPU;
 291         regs.gs = __KERNEL_STACK_CANARY;
 292 #else
 293         regs.ss = __KERNEL_DS;
 294 #endif
 295
 296         regs.orig_ax = -1;
 297         regs.ip = (unsigned long) kernel_thread_helper;
 298         regs.cs = __KERNEL_CS | get_kernel_rpl();
 299         regs.flags = X86_EFLAGS_IF | 0x2;
 300
 301         /* Ok, create the new process.. */
 302         return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs, 0, NULL, NULL);
 303 }
 304 EXPORT_SYMBOL(kernel_thread);
 305
 306 /*
 307  * sys_execve() executes a new program.
 308  */
 309 long sys_execve(const char __user *name,
 310                 const char __user *const __user *argv,
 311                 const char __user *const __user *envp, struct pt_regs *regs)
 312 {
 313         long error;
 314         char *filename;
 315
 316         filename = getname(name);
 317         error = PTR_ERR(filename);
 318         if (IS_ERR(filename))
 319                 return error;
 320         error = do_execve(filename, argv, envp, regs);
 321
 322 #ifdef CONFIG_X86_32
 323         if (error == 0) {
 324                 /* Make sure we don't return using sysenter.. */
 325                 set_thread_flag(TIF_IRET);
 326         }
 327 #endif
 328
 329         putname(filename);
 330         return error;
 331 }
 332
 333 /*
 334  * Idle related variables and functions
 335  */
 336 unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;
 337 EXPORT_SYMBOL(boot_option_idle_override);
 338
 339 /*
 340  * Powermanagement idle function, if any..
 341  */
 342 void (*pm_idle)(void);
 343 EXPORT_SYMBOL(pm_idle);
 344
 345 #ifdef CONFIG_X86_32
 346 /*
 347  * This halt magic was a workaround for ancient floppy DMA
 348  * wreckage. It should be safe to remove.
 349  */
 350 static int hlt_counter;
 351 void disable_hlt(void)
 352 {
 353         hlt_counter++;
 354 }
 355 EXPORT_SYMBOL(disable_hlt);
 356
 357 void enable_hlt(void)
 358 {
 359         hlt_counter--;
 360 }
 361 EXPORT_SYMBOL(enable_hlt);
 362
 363 static inline int hlt_use_halt(void)
 364 {
 365         return (!hlt_counter && boot_cpu_data.hlt_works_ok);
 366 }
 367 #else
 368 static inline int hlt_use_halt(void)
 369 {
 370         return 1;
 371 }
 372 #endif
 373
 374 /*
 375  * We use this if we don't have any better
 376  * idle routine..
 377  */
 378 void default_idle(void)
 379 {
 380         if (hlt_use_halt()) {
 381                 trace_power_start(POWER_CSTATE, 1, smp_processor_id());
 382                 trace_cpu_idle(1, smp_processor_id());
 383                 current_thread_info()->status &= ~TS_POLLING;
 384                 /*
 385                  * TS_POLLING-cleared state must be visible before we
 386                  * test NEED_RESCHED:
 387                  */
 388                 smp_mb();
 389
 390                 if (!need_resched())
 391                         safe_halt();    /* enables interrupts racelessly */
 392                 else
 393                         local_irq_enable();
 394                 current_thread_info()->status |= TS_POLLING;
 395                 trace_power_end(smp_processor_id());
 396                 trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());
 397         } else {
 398                 local_irq_enable();
 399                 /* loop is done by the caller */
 400                 cpu_relax();
 401         }
 402 }
 403 #ifdef CONFIG_APM_MODULE
 404 EXPORT_SYMBOL(default_idle);
 405 #endif
 406
 407 void stop_this_cpu(void *dummy)
 408 {
 409         local_irq_disable();
 410         /*
 411          * Remove this CPU:
 412          */
 413         set_cpu_online(smp_processor_id(), false);
 414         disable_local_APIC();
 415
 416         for (;;) {
 417                 if (hlt_works(smp_processor_id()))
 418                         halt();
 419         }
 420 }
 421
 422 static void do_nothing(void *unused)
 423 {
 424 }
 425
 426 /*
 427  * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
 428  * pm_idle and update to new pm_idle value. Required while changing pm_idle
 429  * handler on SMP systems.
 430  *
 431  * Caller must have changed pm_idle to the new value before the call. Old
 432  * pm_idle value will not be used by any CPU after the return of this function.
 433  */
 434 void cpu_idle_wait(void)
 435 {
 436         smp_mb();
 437         /* kick all the CPUs so that they exit out of pm_idle */
 438         smp_call_function(do_nothing, NULL, 1);
 439 }
 440 EXPORT_SYMBOL_GPL(cpu_idle_wait);
 441
 442 /*
 443  * This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
 444  * which can obviate IPI to trigger checking of need_resched.
 445  * We execute MONITOR against need_resched and enter optimized wait state
 446  * through MWAIT. Whenever someone changes need_resched, we would be woken
 447  * up from MWAIT (without an IPI).
 448  *
 449  * New with Core Duo processors, MWAIT can take some hints based on CPU
 450  * capability.
 451  */
 452 void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
 453 {
 454         if (!need_resched()) {
 455                 if (cpu_has(__this_cpu_ptr(&cpu_info), X86_FEATURE_CLFLUSH_MONITOR))
 456                         clflush((void *)&current_thread_info()->flags);
 457
 458                 __monitor((void *)&current_thread_info()->flags, 0, 0);
 459                 smp_mb();
 460                 if (!need_resched())
 461                         __mwait(ax, cx);
 462         }
 463 }
 464
 465 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
 466 static void mwait_idle(void)
 467 {
 468         if (!need_resched()) {
 469                 trace_power_start(POWER_CSTATE, 1, smp_processor_id());
 470                 trace_cpu_idle(1, smp_processor_id());
 471                 if (cpu_has(__this_cpu_ptr(&cpu_info), X86_FEATURE_CLFLUSH_MONITOR))
 472                         clflush((void *)&current_thread_info()->flags);
 473
 474                 __monitor((void *)&current_thread_info()->flags, 0, 0);
 475                 smp_mb();
 476                 if (!need_resched())
 477                         __sti_mwait(0, 0);
 478                 else
 479                         local_irq_enable();
 480                 trace_power_end(smp_processor_id());
 481                 trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());
 482         } else
 483                 local_irq_enable();
 484 }
 485
 486 /*
 487  * On SMP it's slightly faster (but much more power-consuming!)
 488  * to poll the ->work.need_resched flag instead of waiting for the
 489  * cross-CPU IPI to arrive. Use this option with caution.
 490  */
 491 static void poll_idle(void)
 492 {
 493         trace_power_start(POWER_CSTATE, 0, smp_processor_id());
 494         trace_cpu_idle(0, smp_processor_id());
 495         local_irq_enable();
 496         while (!need_resched())
 497                 cpu_relax();
 498         trace_power_end(smp_processor_id());
 499         trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());
 500 }
 501
 502 /*
 503  * mwait selection logic:
 504  *
 505  * It depends on the CPU. For AMD CPUs that support MWAIT this is
 506  * wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings
 507  * then depend on a clock divisor and current Pstate of the core. If
 508  * all cores of a processor are in halt state (C1) the processor can
 509  * enter the C1E (C1 enhanced) state. If mwait is used this will never
 510  * happen.
 511  *
 512  * idle=mwait overrides this decision and forces the usage of mwait.
 513  */
 514
 515 #define MWAIT_INFO                      0x05
 516 #define MWAIT_ECX_EXTENDED_INFO         0x01
 517 #define MWAIT_EDX_C1                    0xf0
 518
 519 int mwait_usable(const struct cpuinfo_x86 *c)
 520 {
 521         u32 eax, ebx, ecx, edx;
 522
 523         if (boot_option_idle_override == IDLE_FORCE_MWAIT)
 524                 return 1;
 525
 526         if (c->cpuid_level < MWAIT_INFO)
 527                 return 0;
 528
 529         cpuid(MWAIT_INFO, &eax, &ebx, &ecx, &edx);
 530         /* Check, whether EDX has extended info about MWAIT */
 531         if (!(ecx & MWAIT_ECX_EXTENDED_INFO))
 532                 return 1;
 533
 534         /*
 535          * edx enumeratios MONITOR/MWAIT extensions. Check, whether
 536          * C1  supports MWAIT
 537          */
 538         return (edx & MWAIT_EDX_C1);
 539 }
 540
 541 bool c1e_detected;
 542 EXPORT_SYMBOL(c1e_detected);
 543
 544 static cpumask_var_t c1e_mask;
 545
 546 void c1e_remove_cpu(int cpu)
 547 {
 548         if (c1e_mask != NULL)
 549                 cpumask_clear_cpu(cpu, c1e_mask);
 550 }
 551
 552 /*
 553  * C1E aware idle routine. We check for C1E active in the interrupt
 554  * pending message MSR. If we detect C1E, then we handle it the same
 555  * way as C3 power states (local apic timer and TSC stop)
 556  */
 557 static void c1e_idle(void)
 558 {
 559         if (need_resched())
 560                 return;
 561
 562         if (!c1e_detected) {
 563                 u32 lo, hi;
 564
 565                 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
 566
 567                 if (lo & K8_INTP_C1E_ACTIVE_MASK) {
 568                         c1e_detected = true;
 569                         if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
 570                                 mark_tsc_unstable("TSC halt in AMD C1E");
 571                         printk(KERN_INFO "System has AMD C1E enabled\n");
 572                 }
 573         }
 574
 575         if (c1e_detected) {
 576                 int cpu = smp_processor_id();
 577
 578                 if (!cpumask_test_cpu(cpu, c1e_mask)) {
 579                         cpumask_set_cpu(cpu, c1e_mask);
 580                         /*
 581                          * Force broadcast so ACPI can not interfere.
 582                          */
 583                         clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
 584                                            &cpu);
 585                         printk(KERN_INFO "Switch to broadcast mode on CPU%d\n",
 586                                cpu);
 587                 }
 588                 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
 589
 590                 default_idle();
 591
 592                 /*
 593                  * The switch back from broadcast mode needs to be
 594                  * called with interrupts disabled.
 595                  */
 596                  local_irq_disable();
 597                  clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
 598                  local_irq_enable();
 599         } else
 600                 default_idle();
 601 }
 602
 603 void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
 604 {
 605 #ifdef CONFIG_SMP
 606         if (pm_idle == poll_idle && smp_num_siblings > 1) {
 607                 printk_once(KERN_WARNING "WARNING: polling idle and HT enabled,"
 608                         " performance may degrade.\n");
 609         }
 610 #endif
 611         if (pm_idle)
 612                 return;
 613
 614         if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
 615                 /*
 616                  * One CPU supports mwait => All CPUs supports mwait
 617                  */
 618                 printk(KERN_INFO "using mwait in idle threads.\n");
 619                 pm_idle = mwait_idle;
 620         } else if (cpu_has_amd_erratum(amd_erratum_400)) {
 621                 /* E400: APIC timer interrupt does not wake up CPU from C1e */
 622                 printk(KERN_INFO "using C1E aware idle routine\n");
 623                 pm_idle = c1e_idle;
 624         } else
 625                 pm_idle = default_idle;
 626 }
 627
 628 void __init init_c1e_mask(void)
 629 {
 630         /* If we're using c1e_idle, we need to allocate c1e_mask. */
 631         if (pm_idle == c1e_idle)
 632                 zalloc_cpumask_var(&c1e_mask, GFP_KERNEL);
 633 }
 634
 635 static int __init idle_setup(char *str)
 636 {
 637         if (!str)
 638                 return -EINVAL;
 639
 640         if (!strcmp(str, "poll")) {
 641                 printk("using polling idle threads.\n");
 642                 pm_idle = poll_idle;
 643                 boot_option_idle_override = IDLE_POLL;
 644         } else if (!strcmp(str, "mwait")) {
 645                 boot_option_idle_override = IDLE_FORCE_MWAIT;
 646         } else if (!strcmp(str, "halt")) {
 647                 /*
 648                  * When the boot option of idle=halt is added, halt is
 649                  * forced to be used for CPU idle. In such case CPU C2/C3
 650                  * won't be used again.
 651                  * To continue to load the CPU idle driver, don't touch
 652                  * the boot_option_idle_override.
 653                  */
 654                 pm_idle = default_idle;
 655                 boot_option_idle_override = IDLE_HALT;
 656         } else if (!strcmp(str, "nomwait")) {
 657                 /*
 658                  * If the boot option of "idle=nomwait" is added,
 659                  * it means that mwait will be disabled for CPU C2/C3
 660                  * states. In such case it won't touch the variable
 661                  * of boot_option_idle_override.
 662                  */
 663                 boot_option_idle_override = IDLE_NOMWAIT;
 664         } else
 665                 return -1;
 666
 667         return 0;
 668 }
 669 early_param("idle", idle_setup);
 670
 671 unsigned long arch_align_stack(unsigned long sp)
 672 {
 673         if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
 674                 sp -= get_random_int() % 8192;
 675         return sp & ~0xf;
 676 }
 677
 678 unsigned long arch_randomize_brk(struct mm_struct *mm)
 679 {
 680         unsigned long range_end = mm->brk + 0x02000000;
 681         return randomize_range(mm->brk, range_end, 0) ? : mm->brk;
 682 }
 683