arch/x86/kernel/process.c

   1 #include <linux/errno.h>
   2 #include <linux/kernel.h>
   3 #include <linux/mm.h>
   4 #include <linux/smp.h>
   5 #include <linux/prctl.h>
   6 #include <linux/slab.h>
   7 #include <linux/sched.h>
   8 #include <linux/module.h>
   9 #include <linux/pm.h>
  10 #include <linux/clockchips.h>
  11 #include <linux/random.h>
  12 #include <linux/user-return-notifier.h>
  13 #include <linux/dmi.h>
  14 #include <linux/utsname.h>
  15 #include <linux/stackprotector.h>
  16 #include <linux/tick.h>
  17 #include <linux/cpuidle.h>
  18 #include <trace/events/power.h>
  19 #include <linux/hw_breakpoint.h>
  20 #include <asm/cpu.h>
  21 #include <asm/apic.h>
  22 #include <asm/syscalls.h>
  23 #include <asm/idle.h>
  24 #include <asm/uaccess.h>
  25 #include <asm/i387.h>
  26 #include <asm/fpu-internal.h>
  27 #include <asm/debugreg.h>
  28 #include <asm/nmi.h>
  29
  30 #ifdef CONFIG_X86_64
  31 static DEFINE_PER_CPU(unsigned char, is_idle);
  32 static ATOMIC_NOTIFIER_HEAD(idle_notifier);
  33
  34 void idle_notifier_register(struct notifier_block *n)
  35 {
  36         atomic_notifier_chain_register(&idle_notifier, n);
  37 }
  38 EXPORT_SYMBOL_GPL(idle_notifier_register);
  39
  40 void idle_notifier_unregister(struct notifier_block *n)
  41 {
  42         atomic_notifier_chain_unregister(&idle_notifier, n);
  43 }
  44 EXPORT_SYMBOL_GPL(idle_notifier_unregister);
  45 #endif
  46
  47 struct kmem_cache *task_xstate_cachep;
  48 EXPORT_SYMBOL_GPL(task_xstate_cachep);
  49
  50 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
  51 {
  52         int ret;
  53
  54         *dst = *src;
  55         if (fpu_allocated(&src->thread.fpu)) {
  56                 memset(&dst->thread.fpu, 0, sizeof(dst->thread.fpu));
  57                 ret = fpu_alloc(&dst->thread.fpu);
  58                 if (ret)
  59                         return ret;
  60                 fpu_copy(&dst->thread.fpu, &src->thread.fpu);
  61         }
  62         return 0;
  63 }
  64
  65 void free_thread_xstate(struct task_struct *tsk)
  66 {
  67         fpu_free(&tsk->thread.fpu);
  68 }
  69
  70 void free_thread_info(struct thread_info *ti)
  71 {
  72         free_thread_xstate(ti->task);
  73         free_pages((unsigned long)ti, THREAD_ORDER);
  74 }
  75
  76 void arch_task_cache_init(void)
  77 {
  78         task_xstate_cachep =
  79                 kmem_cache_create("task_xstate", xstate_size,
  80                                   __alignof__(union thread_xstate),
  81                                   SLAB_PANIC | SLAB_NOTRACK, NULL);
  82 }
  83
  84 /*
  85  * Free current thread data structures etc..
  86  */
  87 void exit_thread(void)
  88 {
  89         struct task_struct *me = current;
  90         struct thread_struct *t = &me->thread;
  91         unsigned long *bp = t->io_bitmap_ptr;
  92
  93         if (bp) {
  94                 struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
  95
  96                 t->io_bitmap_ptr = NULL;
  97                 clear_thread_flag(TIF_IO_BITMAP);
  98                 /*
  99                  * Careful, clear this in the TSS too:
 100                  */
 101                 memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
 102                 t->io_bitmap_max = 0;
 103                 put_cpu();
 104                 kfree(bp);
 105         }
 106 }
 107
 108 void show_regs(struct pt_regs *regs)
 109 {
 110         show_registers(regs);
 111         show_trace(NULL, regs, (unsigned long *)kernel_stack_pointer(regs), 0);
 112 }
 113
 114 void show_regs_common(void)
 115 {
 116         const char *vendor, *product, *board;
 117
 118         vendor = dmi_get_system_info(DMI_SYS_VENDOR);
 119         if (!vendor)
 120                 vendor = "";
 121         product = dmi_get_system_info(DMI_PRODUCT_NAME);
 122         if (!product)
 123                 product = "";
 124
 125         /* Board Name is optional */
 126         board = dmi_get_system_info(DMI_BOARD_NAME);
 127
 128         printk(KERN_CONT "\n");
 129         printk(KERN_DEFAULT "Pid: %d, comm: %.20s %s %s %.*s",
 130                 current->pid, current->comm, print_tainted(),
 131                 init_utsname()->release,
 132                 (int)strcspn(init_utsname()->version, " "),
 133                 init_utsname()->version);
 134         printk(KERN_CONT " %s %s", vendor, product);
 135         if (board)
 136                 printk(KERN_CONT "/%s", board);
 137         printk(KERN_CONT "\n");
 138 }
 139
 140 void flush_thread(void)
 141 {
 142         struct task_struct *tsk = current;
 143
 144         flush_ptrace_hw_breakpoint(tsk);
 145         memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
 146         /*
 147          * Forget coprocessor state..
 148          */
 149         tsk->fpu_counter = 0;
 150         clear_fpu(tsk);
 151         clear_used_math();
 152 }
 153
 154 static void hard_disable_TSC(void)
 155 {
 156         write_cr4(read_cr4() | X86_CR4_TSD);
 157 }
 158
 159 void disable_TSC(void)
 160 {
 161         preempt_disable();
 162         if (!test_and_set_thread_flag(TIF_NOTSC))
 163                 /*
 164                  * Must flip the CPU state synchronously with
 165                  * TIF_NOTSC in the current running context.
 166                  */
 167                 hard_disable_TSC();
 168         preempt_enable();
 169 }
 170
 171 static void hard_enable_TSC(void)
 172 {
 173         write_cr4(read_cr4() & ~X86_CR4_TSD);
 174 }
 175
 176 static void enable_TSC(void)
 177 {
 178         preempt_disable();
 179         if (test_and_clear_thread_flag(TIF_NOTSC))
 180                 /*
 181                  * Must flip the CPU state synchronously with
 182                  * TIF_NOTSC in the current running context.
 183                  */
 184                 hard_enable_TSC();
 185         preempt_enable();
 186 }
 187
 188 int get_tsc_mode(unsigned long adr)
 189 {
 190         unsigned int val;
 191
 192         if (test_thread_flag(TIF_NOTSC))
 193                 val = PR_TSC_SIGSEGV;
 194         else
 195                 val = PR_TSC_ENABLE;
 196
 197         return put_user(val, (unsigned int __user *)adr);
 198 }
 199
 200 int set_tsc_mode(unsigned int val)
 201 {
 202         if (val == PR_TSC_SIGSEGV)
 203                 disable_TSC();
 204         else if (val == PR_TSC_ENABLE)
 205                 enable_TSC();
 206         else
 207                 return -EINVAL;
 208
 209         return 0;
 210 }
 211
 212 void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
 213                       struct tss_struct *tss)
 214 {
 215         struct thread_struct *prev, *next;
 216
 217         prev = &prev_p->thread;
 218         next = &next_p->thread;
 219
 220         if (test_tsk_thread_flag(prev_p, TIF_BLOCKSTEP) ^
 221             test_tsk_thread_flag(next_p, TIF_BLOCKSTEP)) {
 222                 unsigned long debugctl = get_debugctlmsr();
 223
 224                 debugctl &= ~DEBUGCTLMSR_BTF;
 225                 if (test_tsk_thread_flag(next_p, TIF_BLOCKSTEP))
 226                         debugctl |= DEBUGCTLMSR_BTF;
 227
 228                 update_debugctlmsr(debugctl);
 229         }
 230
 231         if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
 232             test_tsk_thread_flag(next_p, TIF_NOTSC)) {
 233                 /* prev and next are different */
 234                 if (test_tsk_thread_flag(next_p, TIF_NOTSC))
 235                         hard_disable_TSC();
 236                 else
 237                         hard_enable_TSC();
 238         }
 239
 240         if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
 241                 /*
 242                  * Copy the relevant range of the IO bitmap.
 243                  * Normally this is 128 bytes or less:
 244                  */
 245                 memcpy(tss->io_bitmap, next->io_bitmap_ptr,
 246                        max(prev->io_bitmap_max, next->io_bitmap_max));
 247         } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
 248                 /*
 249                  * Clear any possible leftover bits:
 250                  */
 251                 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
 252         }
 253         propagate_user_return_notify(prev_p, next_p);
 254 }
 255
 256 int sys_fork(struct pt_regs *regs)
 257 {
 258         return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL);
 259 }
 260
 261 /*
 262  * This is trivial, and on the face of it looks like it
 263  * could equally well be done in user mode.
 264  *
 265  * Not so, for quite unobvious reasons - register pressure.
 266  * In user mode vfork() cannot have a stack frame, and if
 267  * done by calling the "clone()" system call directly, you
 268  * do not have enough call-clobbered registers to hold all
 269  * the information you need.
 270  */
 271 int sys_vfork(struct pt_regs *regs)
 272 {
 273         return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0,
 274                        NULL, NULL);
 275 }
 276
 277 long
 278 sys_clone(unsigned long clone_flags, unsigned long newsp,
 279           void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
 280 {
 281         if (!newsp)
 282                 newsp = regs->sp;
 283         return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
 284 }
 285
 286 /*
 287  * This gets run with %si containing the
 288  * function to call, and %di containing
 289  * the "args".
 290  */
 291 extern void kernel_thread_helper(void);
 292
 293 /*
 294  * Create a kernel thread
 295  */
 296 int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
 297 {
 298         struct pt_regs regs;
 299
 300         memset(&regs, 0, sizeof(regs));
 301
 302         regs.si = (unsigned long) fn;
 303         regs.di = (unsigned long) arg;
 304
 305 #ifdef CONFIG_X86_32
 306         regs.ds = __USER_DS;
 307         regs.es = __USER_DS;
 308         regs.fs = __KERNEL_PERCPU;
 309         regs.gs = __KERNEL_STACK_CANARY;
 310 #else
 311         regs.ss = __KERNEL_DS;
 312 #endif
 313
 314         regs.orig_ax = -1;
 315         regs.ip = (unsigned long) kernel_thread_helper;
 316         regs.cs = __KERNEL_CS | get_kernel_rpl();
 317         regs.flags = X86_EFLAGS_IF | X86_EFLAGS_BIT1;
 318
 319         /* Ok, create the new process.. */
 320         return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs, 0, NULL, NULL);
 321 }
 322 EXPORT_SYMBOL(kernel_thread);
 323
 324 /*
 325  * sys_execve() executes a new program.
 326  */
 327 long sys_execve(const char __user *name,
 328                 const char __user *const __user *argv,
 329                 const char __user *const __user *envp, struct pt_regs *regs)
 330 {
 331         long error;
 332         char *filename;
 333
 334         filename = getname(name);
 335         error = PTR_ERR(filename);
 336         if (IS_ERR(filename))
 337                 return error;
 338         error = do_execve(filename, argv, envp, regs);
 339
 340 #ifdef CONFIG_X86_32
 341         if (error == 0) {
 342                 /* Make sure we don't return using sysenter.. */
 343                 set_thread_flag(TIF_IRET);
 344         }
 345 #endif
 346
 347         putname(filename);
 348         return error;
 349 }
 350
 351 /*
 352  * Idle related variables and functions
 353  */
 354 unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;
 355 EXPORT_SYMBOL(boot_option_idle_override);
 356
 357 /*
 358  * Powermanagement idle function, if any..
 359  */
 360 void (*pm_idle)(void);
 361 #ifdef CONFIG_APM_MODULE
 362 EXPORT_SYMBOL(pm_idle);
 363 #endif
 364
 365 static inline int hlt_use_halt(void)
 366 {
 367         return 1;
 368 }
 369
 370 #ifndef CONFIG_SMP
 371 static inline void play_dead(void)
 372 {
 373         BUG();
 374 }
 375 #endif
 376
 377 #ifdef CONFIG_X86_64
 378 void enter_idle(void)
 379 {
 380         percpu_write(is_idle, 1);
 381         atomic_notifier_call_chain(&idle_notifier, IDLE_START, NULL);
 382 }
 383
 384 static void __exit_idle(void)
 385 {
 386         if (x86_test_and_clear_bit_percpu(0, is_idle) == 0)
 387                 return;
 388         atomic_notifier_call_chain(&idle_notifier, IDLE_END, NULL);
 389 }
 390
 391 /* Called from interrupts to signify idle end */
 392 void exit_idle(void)
 393 {
 394         /* idle loop has pid 0 */
 395         if (current->pid)
 396                 return;
 397         __exit_idle();
 398 }
 399 #endif
 400
 401 /*
 402  * The idle thread. There's no useful work to be
 403  * done, so just try to conserve power and have a
 404  * low exit latency (ie sit in a loop waiting for
 405  * somebody to say that they'd like to reschedule)
 406  */
 407 void cpu_idle(void)
 408 {
 409         /*
 410          * If we're the non-boot CPU, nothing set the stack canary up
 411          * for us.  CPU0 already has it initialized but no harm in
 412          * doing it again.  This is a good place for updating it, as
 413          * we wont ever return from this function (so the invalid
 414          * canaries already on the stack wont ever trigger).
 415          */
 416         boot_init_stack_canary();
 417         current_thread_info()->status |= TS_POLLING;
 418
 419         while (1) {
 420                 tick_nohz_idle_enter();
 421
 422                 while (!need_resched()) {
 423                         rmb();
 424
 425                         if (cpu_is_offline(smp_processor_id()))
 426                                 play_dead();
 427
 428                         /*
 429                          * Idle routines should keep interrupts disabled
 430                          * from here on, until they go to idle.
 431                          * Otherwise, idle callbacks can misfire.
 432                          */
 433                         local_touch_nmi();
 434                         local_irq_disable();
 435
 436                         enter_idle();
 437
 438                         /* Don't trace irqs off for idle */
 439                         stop_critical_timings();
 440
 441                         /* enter_idle() needs rcu for notifiers */
 442                         rcu_idle_enter();
 443
 444                         if (cpuidle_idle_call())
 445                                 pm_idle();
 446
 447                         rcu_idle_exit();
 448                         start_critical_timings();
 449
 450                         /* In many cases the interrupt that ended idle
 451                            has already called exit_idle. But some idle
 452                            loops can be woken up without interrupt. */
 453                         __exit_idle();
 454                 }
 455
 456                 tick_nohz_idle_exit();
 457                 preempt_enable_no_resched();
 458                 schedule();
 459                 preempt_disable();
 460         }
 461 }
 462
 463 /*
 464  * We use this if we don't have any better
 465  * idle routine..
 466  */
 467 void default_idle(void)
 468 {
 469         if (hlt_use_halt()) {
 470                 trace_power_start_rcuidle(POWER_CSTATE, 1, smp_processor_id());
 471                 trace_cpu_idle_rcuidle(1, smp_processor_id());
 472                 current_thread_info()->status &= ~TS_POLLING;
 473                 /*
 474                  * TS_POLLING-cleared state must be visible before we
 475                  * test NEED_RESCHED:
 476                  */
 477                 smp_mb();
 478
 479                 if (!need_resched())
 480                         safe_halt();    /* enables interrupts racelessly */
 481                 else
 482                         local_irq_enable();
 483                 current_thread_info()->status |= TS_POLLING;
 484                 trace_power_end_rcuidle(smp_processor_id());
 485                 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
 486         } else {
 487                 local_irq_enable();
 488                 /* loop is done by the caller */
 489                 cpu_relax();
 490         }
 491 }
 492 #ifdef CONFIG_APM_MODULE
 493 EXPORT_SYMBOL(default_idle);
 494 #endif
 495
 496 bool set_pm_idle_to_default(void)
 497 {
 498         bool ret = !!pm_idle;
 499
 500         pm_idle = default_idle;
 501
 502         return ret;
 503 }
 504 void stop_this_cpu(void *dummy)
 505 {
 506         local_irq_disable();
 507         /*
 508          * Remove this CPU:
 509          */
 510         set_cpu_online(smp_processor_id(), false);
 511         disable_local_APIC();
 512
 513         for (;;) {
 514                 if (hlt_works(smp_processor_id()))
 515                         halt();
 516         }
 517 }
 518
 519 static void do_nothing(void *unused)
 520 {
 521 }
 522
 523 /*
 524  * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
 525  * pm_idle and update to new pm_idle value. Required while changing pm_idle
 526  * handler on SMP systems.
 527  *
 528  * Caller must have changed pm_idle to the new value before the call. Old
 529  * pm_idle value will not be used by any CPU after the return of this function.
 530  */
 531 void cpu_idle_wait(void)
 532 {
 533         smp_mb();
 534         /* kick all the CPUs so that they exit out of pm_idle */
 535         smp_call_function(do_nothing, NULL, 1);
 536 }
 537 EXPORT_SYMBOL_GPL(cpu_idle_wait);
 538
 539 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
 540 static void mwait_idle(void)
 541 {
 542         if (!need_resched()) {
 543                 trace_power_start_rcuidle(POWER_CSTATE, 1, smp_processor_id());
 544                 trace_cpu_idle_rcuidle(1, smp_processor_id());
 545                 if (this_cpu_has(X86_FEATURE_CLFLUSH_MONITOR))
 546                         clflush((void *)&current_thread_info()->flags);
 547
 548                 __monitor((void *)&current_thread_info()->flags, 0, 0);
 549                 smp_mb();
 550                 if (!need_resched())
 551                         __sti_mwait(0, 0);
 552                 else
 553                         local_irq_enable();
 554                 trace_power_end_rcuidle(smp_processor_id());
 555                 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
 556         } else
 557                 local_irq_enable();
 558 }
 559
 560 /*
 561  * On SMP it's slightly faster (but much more power-consuming!)
 562  * to poll the ->work.need_resched flag instead of waiting for the
 563  * cross-CPU IPI to arrive. Use this option with caution.
 564  */
 565 static void poll_idle(void)
 566 {
 567         trace_power_start_rcuidle(POWER_CSTATE, 0, smp_processor_id());
 568         trace_cpu_idle_rcuidle(0, smp_processor_id());
 569         local_irq_enable();
 570         while (!need_resched())
 571                 cpu_relax();
 572         trace_power_end_rcuidle(smp_processor_id());
 573         trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
 574 }
 575
 576 /*
 577  * mwait selection logic:
 578  *
 579  * It depends on the CPU. For AMD CPUs that support MWAIT this is
 580  * wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings
 581  * then depend on a clock divisor and current Pstate of the core. If
 582  * all cores of a processor are in halt state (C1) the processor can
 583  * enter the C1E (C1 enhanced) state. If mwait is used this will never
 584  * happen.
 585  *
 586  * idle=mwait overrides this decision and forces the usage of mwait.
 587  */
 588
 589 #define MWAIT_INFO                      0x05
 590 #define MWAIT_ECX_EXTENDED_INFO         0x01
 591 #define MWAIT_EDX_C1                    0xf0
 592
 593 int mwait_usable(const struct cpuinfo_x86 *c)
 594 {
 595         u32 eax, ebx, ecx, edx;
 596
 597         if (boot_option_idle_override == IDLE_FORCE_MWAIT)
 598                 return 1;
 599
 600         if (c->cpuid_level < MWAIT_INFO)
 601                 return 0;
 602
 603         cpuid(MWAIT_INFO, &eax, &ebx, &ecx, &edx);
 604         /* Check, whether EDX has extended info about MWAIT */
 605         if (!(ecx & MWAIT_ECX_EXTENDED_INFO))
 606                 return 1;
 607
 608         /*
 609          * edx enumeratios MONITOR/MWAIT extensions. Check, whether
 610          * C1  supports MWAIT
 611          */
 612         return (edx & MWAIT_EDX_C1);
 613 }
 614
 615 bool amd_e400_c1e_detected;
 616 EXPORT_SYMBOL(amd_e400_c1e_detected);
 617
 618 static cpumask_var_t amd_e400_c1e_mask;
 619
 620 void amd_e400_remove_cpu(int cpu)
 621 {
 622         if (amd_e400_c1e_mask != NULL)
 623                 cpumask_clear_cpu(cpu, amd_e400_c1e_mask);
 624 }
 625
 626 /*
 627  * AMD Erratum 400 aware idle routine. We check for C1E active in the interrupt
 628  * pending message MSR. If we detect C1E, then we handle it the same
 629  * way as C3 power states (local apic timer and TSC stop)
 630  */
 631 static void amd_e400_idle(void)
 632 {
 633         if (need_resched())
 634                 return;
 635
 636         if (!amd_e400_c1e_detected) {
 637                 u32 lo, hi;
 638
 639                 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
 640
 641                 if (lo & K8_INTP_C1E_ACTIVE_MASK) {
 642                         amd_e400_c1e_detected = true;
 643                         if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
 644                                 mark_tsc_unstable("TSC halt in AMD C1E");
 645                         printk(KERN_INFO "System has AMD C1E enabled\n");
 646                 }
 647         }
 648
 649         if (amd_e400_c1e_detected) {
 650                 int cpu = smp_processor_id();
 651
 652                 if (!cpumask_test_cpu(cpu, amd_e400_c1e_mask)) {
 653                         cpumask_set_cpu(cpu, amd_e400_c1e_mask);
 654                         /*
 655                          * Force broadcast so ACPI can not interfere.
 656                          */
 657                         clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
 658                                            &cpu);
 659                         printk(KERN_INFO "Switch to broadcast mode on CPU%d\n",
 660                                cpu);
 661                 }
 662                 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
 663
 664                 default_idle();
 665
 666                 /*
 667                  * The switch back from broadcast mode needs to be
 668                  * called with interrupts disabled.
 669                  */
 670                  local_irq_disable();
 671                  clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
 672                  local_irq_enable();
 673         } else
 674                 default_idle();
 675 }
 676
 677 void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
 678 {
 679 #ifdef CONFIG_SMP
 680         if (pm_idle == poll_idle && smp_num_siblings > 1) {
 681                 printk_once(KERN_WARNING "WARNING: polling idle and HT enabled,"
 682                         " performance may degrade.\n");
 683         }
 684 #endif
 685         if (pm_idle)
 686                 return;
 687
 688         if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
 689                 /*
 690                  * One CPU supports mwait => All CPUs supports mwait
 691                  */
 692                 printk(KERN_INFO "using mwait in idle threads.\n");
 693                 pm_idle = mwait_idle;
 694         } else if (cpu_has_amd_erratum(amd_erratum_400)) {
 695                 /* E400: APIC timer interrupt does not wake up CPU from C1e */
 696                 printk(KERN_INFO "using AMD E400 aware idle routine\n");
 697                 pm_idle = amd_e400_idle;
 698         } else
 699                 pm_idle = default_idle;
 700 }
 701
 702 void __init init_amd_e400_c1e_mask(void)
 703 {
 704         /* If we're using amd_e400_idle, we need to allocate amd_e400_c1e_mask. */
 705         if (pm_idle == amd_e400_idle)
 706                 zalloc_cpumask_var(&amd_e400_c1e_mask, GFP_KERNEL);
 707 }
 708
 709 static int __init idle_setup(char *str)
 710 {
 711         if (!str)
 712                 return -EINVAL;
 713
 714         if (!strcmp(str, "poll")) {
 715                 printk("using polling idle threads.\n");
 716                 pm_idle = poll_idle;
 717                 boot_option_idle_override = IDLE_POLL;
 718         } else if (!strcmp(str, "mwait")) {
 719                 boot_option_idle_override = IDLE_FORCE_MWAIT;
 720                 WARN_ONCE(1, "\"idle=mwait\" will be removed in 2012\n");
 721         } else if (!strcmp(str, "halt")) {
 722                 /*
 723                  * When the boot option of idle=halt is added, halt is
 724                  * forced to be used for CPU idle. In such case CPU C2/C3
 725                  * won't be used again.
 726                  * To continue to load the CPU idle driver, don't touch
 727                  * the boot_option_idle_override.
 728                  */
 729                 pm_idle = default_idle;
 730                 boot_option_idle_override = IDLE_HALT;
 731         } else if (!strcmp(str, "nomwait")) {
 732                 /*
 733                  * If the boot option of "idle=nomwait" is added,
 734                  * it means that mwait will be disabled for CPU C2/C3
 735                  * states. In such case it won't touch the variable
 736                  * of boot_option_idle_override.
 737                  */
 738                 boot_option_idle_override = IDLE_NOMWAIT;
 739         } else
 740                 return -1;
 741
 742         return 0;
 743 }
 744 early_param("idle", idle_setup);
 745
 746 unsigned long arch_align_stack(unsigned long sp)
 747 {
 748         if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
 749                 sp -= get_random_int() % 8192;
 750         return sp & ~0xf;
 751 }
 752
 753 unsigned long arch_randomize_brk(struct mm_struct *mm)
 754 {
 755         unsigned long range_end = mm->brk + 0x02000000;
 756         return randomize_range(mm->brk, range_end, 0) ? : mm->brk;
 757 }
 758