x86: fix the stackprotector canary of the boot CPU
[deliverable/linux.git] / arch / x86 / kernel / process_64.c
1 /*
2 * Copyright (C) 1995 Linus Torvalds
3 *
4 * Pentium III FXSR, SSE support
5 * Gareth Hughes <gareth@valinux.com>, May 2000
6 *
7 * X86-64 port
8 * Andi Kleen.
9 *
10 * CPU hotplug support - ashok.raj@intel.com
11 */
12
13 /*
14 * This file handles the architecture-dependent parts of process handling..
15 */
16
17 #include <stdarg.h>
18
19 #include <linux/stackprotector.h>
20 #include <linux/cpu.h>
21 #include <linux/errno.h>
22 #include <linux/sched.h>
23 #include <linux/fs.h>
24 #include <linux/kernel.h>
25 #include <linux/mm.h>
26 #include <linux/elfcore.h>
27 #include <linux/smp.h>
28 #include <linux/slab.h>
29 #include <linux/user.h>
30 #include <linux/interrupt.h>
31 #include <linux/utsname.h>
32 #include <linux/delay.h>
33 #include <linux/module.h>
34 #include <linux/ptrace.h>
35 #include <linux/random.h>
36 #include <linux/notifier.h>
37 #include <linux/kprobes.h>
38 #include <linux/kdebug.h>
39 #include <linux/tick.h>
40 #include <linux/prctl.h>
41
42 #include <asm/uaccess.h>
43 #include <asm/pgtable.h>
44 #include <asm/system.h>
45 #include <asm/io.h>
46 #include <asm/processor.h>
47 #include <asm/i387.h>
48 #include <asm/mmu_context.h>
49 #include <asm/pda.h>
50 #include <asm/prctl.h>
51 #include <asm/desc.h>
52 #include <asm/proto.h>
53 #include <asm/ia32.h>
54 #include <asm/idle.h>
55
56 asmlinkage extern void ret_from_fork(void);
57
58 unsigned long kernel_thread_flags = CLONE_VM | CLONE_UNTRACED;
59
60 unsigned long boot_option_idle_override = 0;
61 EXPORT_SYMBOL(boot_option_idle_override);
62
63 /*
64 * Powermanagement idle function, if any..
65 */
66 void (*pm_idle)(void);
67 EXPORT_SYMBOL(pm_idle);
68
69 static ATOMIC_NOTIFIER_HEAD(idle_notifier);
70
71 void idle_notifier_register(struct notifier_block *n)
72 {
73 atomic_notifier_chain_register(&idle_notifier, n);
74 }
75
76 void enter_idle(void)
77 {
78 write_pda(isidle, 1);
79 atomic_notifier_call_chain(&idle_notifier, IDLE_START, NULL);
80 }
81
82 static void __exit_idle(void)
83 {
84 if (test_and_clear_bit_pda(0, isidle) == 0)
85 return;
86 atomic_notifier_call_chain(&idle_notifier, IDLE_END, NULL);
87 }
88
89 /* Called from interrupts to signify idle end */
90 void exit_idle(void)
91 {
92 /* idle loop has pid 0 */
93 if (current->pid)
94 return;
95 __exit_idle();
96 }
97
98 /*
99 * We use this if we don't have any better
100 * idle routine..
101 */
102 void default_idle(void)
103 {
104 current_thread_info()->status &= ~TS_POLLING;
105 /*
106 * TS_POLLING-cleared state must be visible before we
107 * test NEED_RESCHED:
108 */
109 smp_mb();
110 if (!need_resched())
111 safe_halt(); /* enables interrupts racelessly */
112 else
113 local_irq_enable();
114 current_thread_info()->status |= TS_POLLING;
115 }
116
117 #ifdef CONFIG_HOTPLUG_CPU
118 DECLARE_PER_CPU(int, cpu_state);
119
120 #include <asm/nmi.h>
121 /* We halt the CPU with physical CPU hotplug */
122 static inline void play_dead(void)
123 {
124 idle_task_exit();
125 wbinvd();
126 mb();
127 /* Ack it */
128 __get_cpu_var(cpu_state) = CPU_DEAD;
129
130 local_irq_disable();
131 while (1)
132 halt();
133 }
134 #else
135 static inline void play_dead(void)
136 {
137 BUG();
138 }
139 #endif /* CONFIG_HOTPLUG_CPU */
140
141 /*
142 * The idle thread. There's no useful work to be
143 * done, so just try to conserve power and have a
144 * low exit latency (ie sit in a loop waiting for
145 * somebody to say that they'd like to reschedule)
146 */
147 void cpu_idle(void)
148 {
149 current_thread_info()->status |= TS_POLLING;
150
151 /*
152 * If we're the non-boot CPU, nothing set the PDA stack
153 * canary up for us - and if we are the boot CPU we have
154 * a 0 stack canary. This is a good place for updating
155 * it, as we wont ever return from this function (so the
156 * invalid canaries already on the stack wont ever
157 * trigger):
158 */
159 boot_init_stack_canary();
160
161 /* endless idle loop with no priority at all */
162 while (1) {
163 tick_nohz_stop_sched_tick();
164 while (!need_resched()) {
165 void (*idle)(void);
166
167 rmb();
168 idle = pm_idle;
169 if (!idle)
170 idle = default_idle;
171 if (cpu_is_offline(smp_processor_id()))
172 play_dead();
173 /*
174 * Idle routines should keep interrupts disabled
175 * from here on, until they go to idle.
176 * Otherwise, idle callbacks can misfire.
177 */
178 local_irq_disable();
179 enter_idle();
180 idle();
181 /* In many cases the interrupt that ended idle
182 has already called exit_idle. But some idle
183 loops can be woken up without interrupt. */
184 __exit_idle();
185 }
186
187 tick_nohz_restart_sched_tick();
188 preempt_enable_no_resched();
189 schedule();
190 preempt_disable();
191 }
192 }
193
194 /* Prints also some state that isn't saved in the pt_regs */
195 void __show_regs(struct pt_regs * regs)
196 {
197 unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L, fs, gs, shadowgs;
198 unsigned long d0, d1, d2, d3, d6, d7;
199 unsigned int fsindex, gsindex;
200 unsigned int ds, cs, es;
201
202 printk("\n");
203 print_modules();
204 printk("Pid: %d, comm: %.20s %s %s %.*s\n",
205 current->pid, current->comm, print_tainted(),
206 init_utsname()->release,
207 (int)strcspn(init_utsname()->version, " "),
208 init_utsname()->version);
209 printk("RIP: %04lx:[<%016lx>] ", regs->cs & 0xffff, regs->ip);
210 printk_address(regs->ip, 1);
211 printk("RSP: %04lx:%016lx EFLAGS: %08lx\n", regs->ss, regs->sp,
212 regs->flags);
213 printk("RAX: %016lx RBX: %016lx RCX: %016lx\n",
214 regs->ax, regs->bx, regs->cx);
215 printk("RDX: %016lx RSI: %016lx RDI: %016lx\n",
216 regs->dx, regs->si, regs->di);
217 printk("RBP: %016lx R08: %016lx R09: %016lx\n",
218 regs->bp, regs->r8, regs->r9);
219 printk("R10: %016lx R11: %016lx R12: %016lx\n",
220 regs->r10, regs->r11, regs->r12);
221 printk("R13: %016lx R14: %016lx R15: %016lx\n",
222 regs->r13, regs->r14, regs->r15);
223
224 asm("movl %%ds,%0" : "=r" (ds));
225 asm("movl %%cs,%0" : "=r" (cs));
226 asm("movl %%es,%0" : "=r" (es));
227 asm("movl %%fs,%0" : "=r" (fsindex));
228 asm("movl %%gs,%0" : "=r" (gsindex));
229
230 rdmsrl(MSR_FS_BASE, fs);
231 rdmsrl(MSR_GS_BASE, gs);
232 rdmsrl(MSR_KERNEL_GS_BASE, shadowgs);
233
234 cr0 = read_cr0();
235 cr2 = read_cr2();
236 cr3 = read_cr3();
237 cr4 = read_cr4();
238
239 printk("FS: %016lx(%04x) GS:%016lx(%04x) knlGS:%016lx\n",
240 fs,fsindex,gs,gsindex,shadowgs);
241 printk("CS: %04x DS: %04x ES: %04x CR0: %016lx\n", cs, ds, es, cr0);
242 printk("CR2: %016lx CR3: %016lx CR4: %016lx\n", cr2, cr3, cr4);
243
244 get_debugreg(d0, 0);
245 get_debugreg(d1, 1);
246 get_debugreg(d2, 2);
247 printk("DR0: %016lx DR1: %016lx DR2: %016lx\n", d0, d1, d2);
248 get_debugreg(d3, 3);
249 get_debugreg(d6, 6);
250 get_debugreg(d7, 7);
251 printk("DR3: %016lx DR6: %016lx DR7: %016lx\n", d3, d6, d7);
252 }
253
254 void show_regs(struct pt_regs *regs)
255 {
256 printk("CPU %d:", smp_processor_id());
257 __show_regs(regs);
258 show_trace(NULL, regs, (void *)(regs + 1), regs->bp);
259 }
260
261 /*
262 * Free current thread data structures etc..
263 */
264 void exit_thread(void)
265 {
266 struct task_struct *me = current;
267 struct thread_struct *t = &me->thread;
268
269 if (me->thread.io_bitmap_ptr) {
270 struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
271
272 kfree(t->io_bitmap_ptr);
273 t->io_bitmap_ptr = NULL;
274 clear_thread_flag(TIF_IO_BITMAP);
275 /*
276 * Careful, clear this in the TSS too:
277 */
278 memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
279 t->io_bitmap_max = 0;
280 put_cpu();
281 }
282 }
283
284 void flush_thread(void)
285 {
286 struct task_struct *tsk = current;
287
288 if (test_tsk_thread_flag(tsk, TIF_ABI_PENDING)) {
289 clear_tsk_thread_flag(tsk, TIF_ABI_PENDING);
290 if (test_tsk_thread_flag(tsk, TIF_IA32)) {
291 clear_tsk_thread_flag(tsk, TIF_IA32);
292 } else {
293 set_tsk_thread_flag(tsk, TIF_IA32);
294 current_thread_info()->status |= TS_COMPAT;
295 }
296 }
297 clear_tsk_thread_flag(tsk, TIF_DEBUG);
298
299 tsk->thread.debugreg0 = 0;
300 tsk->thread.debugreg1 = 0;
301 tsk->thread.debugreg2 = 0;
302 tsk->thread.debugreg3 = 0;
303 tsk->thread.debugreg6 = 0;
304 tsk->thread.debugreg7 = 0;
305 memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
306 /*
307 * Forget coprocessor state..
308 */
309 clear_fpu(tsk);
310 clear_used_math();
311 }
312
313 void release_thread(struct task_struct *dead_task)
314 {
315 if (dead_task->mm) {
316 if (dead_task->mm->context.size) {
317 printk("WARNING: dead process %8s still has LDT? <%p/%d>\n",
318 dead_task->comm,
319 dead_task->mm->context.ldt,
320 dead_task->mm->context.size);
321 BUG();
322 }
323 }
324 }
325
326 static inline void set_32bit_tls(struct task_struct *t, int tls, u32 addr)
327 {
328 struct user_desc ud = {
329 .base_addr = addr,
330 .limit = 0xfffff,
331 .seg_32bit = 1,
332 .limit_in_pages = 1,
333 .useable = 1,
334 };
335 struct desc_struct *desc = t->thread.tls_array;
336 desc += tls;
337 fill_ldt(desc, &ud);
338 }
339
340 static inline u32 read_32bit_tls(struct task_struct *t, int tls)
341 {
342 return get_desc_base(&t->thread.tls_array[tls]);
343 }
344
345 /*
346 * This gets called before we allocate a new thread and copy
347 * the current task into it.
348 */
349 void prepare_to_copy(struct task_struct *tsk)
350 {
351 unlazy_fpu(tsk);
352 }
353
354 int copy_thread(int nr, unsigned long clone_flags, unsigned long sp,
355 unsigned long unused,
356 struct task_struct * p, struct pt_regs * regs)
357 {
358 int err;
359 struct pt_regs * childregs;
360 struct task_struct *me = current;
361
362 childregs = ((struct pt_regs *)
363 (THREAD_SIZE + task_stack_page(p))) - 1;
364 *childregs = *regs;
365
366 childregs->ax = 0;
367 childregs->sp = sp;
368 if (sp == ~0UL)
369 childregs->sp = (unsigned long)childregs;
370
371 p->thread.sp = (unsigned long) childregs;
372 p->thread.sp0 = (unsigned long) (childregs+1);
373 p->thread.usersp = me->thread.usersp;
374
375 set_tsk_thread_flag(p, TIF_FORK);
376
377 p->thread.fs = me->thread.fs;
378 p->thread.gs = me->thread.gs;
379
380 asm("mov %%gs,%0" : "=m" (p->thread.gsindex));
381 asm("mov %%fs,%0" : "=m" (p->thread.fsindex));
382 asm("mov %%es,%0" : "=m" (p->thread.es));
383 asm("mov %%ds,%0" : "=m" (p->thread.ds));
384
385 if (unlikely(test_tsk_thread_flag(me, TIF_IO_BITMAP))) {
386 p->thread.io_bitmap_ptr = kmalloc(IO_BITMAP_BYTES, GFP_KERNEL);
387 if (!p->thread.io_bitmap_ptr) {
388 p->thread.io_bitmap_max = 0;
389 return -ENOMEM;
390 }
391 memcpy(p->thread.io_bitmap_ptr, me->thread.io_bitmap_ptr,
392 IO_BITMAP_BYTES);
393 set_tsk_thread_flag(p, TIF_IO_BITMAP);
394 }
395
396 /*
397 * Set a new TLS for the child thread?
398 */
399 if (clone_flags & CLONE_SETTLS) {
400 #ifdef CONFIG_IA32_EMULATION
401 if (test_thread_flag(TIF_IA32))
402 err = do_set_thread_area(p, -1,
403 (struct user_desc __user *)childregs->si, 0);
404 else
405 #endif
406 err = do_arch_prctl(p, ARCH_SET_FS, childregs->r8);
407 if (err)
408 goto out;
409 }
410 err = 0;
411 out:
412 if (err && p->thread.io_bitmap_ptr) {
413 kfree(p->thread.io_bitmap_ptr);
414 p->thread.io_bitmap_max = 0;
415 }
416 return err;
417 }
418
419 void
420 start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
421 {
422 asm volatile("movl %0, %%fs; movl %0, %%es; movl %0, %%ds" :: "r"(0));
423 load_gs_index(0);
424 regs->ip = new_ip;
425 regs->sp = new_sp;
426 write_pda(oldrsp, new_sp);
427 regs->cs = __USER_CS;
428 regs->ss = __USER_DS;
429 regs->flags = 0x200;
430 set_fs(USER_DS);
431 /*
432 * Free the old FP and other extended state
433 */
434 free_thread_xstate(current);
435 }
436 EXPORT_SYMBOL_GPL(start_thread);
437
438 static void hard_disable_TSC(void)
439 {
440 write_cr4(read_cr4() | X86_CR4_TSD);
441 }
442
443 void disable_TSC(void)
444 {
445 preempt_disable();
446 if (!test_and_set_thread_flag(TIF_NOTSC))
447 /*
448 * Must flip the CPU state synchronously with
449 * TIF_NOTSC in the current running context.
450 */
451 hard_disable_TSC();
452 preempt_enable();
453 }
454
455 static void hard_enable_TSC(void)
456 {
457 write_cr4(read_cr4() & ~X86_CR4_TSD);
458 }
459
460 static void enable_TSC(void)
461 {
462 preempt_disable();
463 if (test_and_clear_thread_flag(TIF_NOTSC))
464 /*
465 * Must flip the CPU state synchronously with
466 * TIF_NOTSC in the current running context.
467 */
468 hard_enable_TSC();
469 preempt_enable();
470 }
471
472 int get_tsc_mode(unsigned long adr)
473 {
474 unsigned int val;
475
476 if (test_thread_flag(TIF_NOTSC))
477 val = PR_TSC_SIGSEGV;
478 else
479 val = PR_TSC_ENABLE;
480
481 return put_user(val, (unsigned int __user *)adr);
482 }
483
484 int set_tsc_mode(unsigned int val)
485 {
486 if (val == PR_TSC_SIGSEGV)
487 disable_TSC();
488 else if (val == PR_TSC_ENABLE)
489 enable_TSC();
490 else
491 return -EINVAL;
492
493 return 0;
494 }
495
496 /*
497 * This special macro can be used to load a debugging register
498 */
499 #define loaddebug(thread, r) set_debugreg(thread->debugreg ## r, r)
500
501 static inline void __switch_to_xtra(struct task_struct *prev_p,
502 struct task_struct *next_p,
503 struct tss_struct *tss)
504 {
505 struct thread_struct *prev, *next;
506 unsigned long debugctl;
507
508 prev = &prev_p->thread,
509 next = &next_p->thread;
510
511 debugctl = prev->debugctlmsr;
512 if (next->ds_area_msr != prev->ds_area_msr) {
513 /* we clear debugctl to make sure DS
514 * is not in use when we change it */
515 debugctl = 0;
516 update_debugctlmsr(0);
517 wrmsrl(MSR_IA32_DS_AREA, next->ds_area_msr);
518 }
519
520 if (next->debugctlmsr != debugctl)
521 update_debugctlmsr(next->debugctlmsr);
522
523 if (test_tsk_thread_flag(next_p, TIF_DEBUG)) {
524 loaddebug(next, 0);
525 loaddebug(next, 1);
526 loaddebug(next, 2);
527 loaddebug(next, 3);
528 /* no 4 and 5 */
529 loaddebug(next, 6);
530 loaddebug(next, 7);
531 }
532
533 if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
534 test_tsk_thread_flag(next_p, TIF_NOTSC)) {
535 /* prev and next are different */
536 if (test_tsk_thread_flag(next_p, TIF_NOTSC))
537 hard_disable_TSC();
538 else
539 hard_enable_TSC();
540 }
541
542 if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
543 /*
544 * Copy the relevant range of the IO bitmap.
545 * Normally this is 128 bytes or less:
546 */
547 memcpy(tss->io_bitmap, next->io_bitmap_ptr,
548 max(prev->io_bitmap_max, next->io_bitmap_max));
549 } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
550 /*
551 * Clear any possible leftover bits:
552 */
553 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
554 }
555
556 #ifdef X86_BTS
557 if (test_tsk_thread_flag(prev_p, TIF_BTS_TRACE_TS))
558 ptrace_bts_take_timestamp(prev_p, BTS_TASK_DEPARTS);
559
560 if (test_tsk_thread_flag(next_p, TIF_BTS_TRACE_TS))
561 ptrace_bts_take_timestamp(next_p, BTS_TASK_ARRIVES);
562 #endif
563 }
564
565 /*
566 * switch_to(x,y) should switch tasks from x to y.
567 *
568 * This could still be optimized:
569 * - fold all the options into a flag word and test it with a single test.
570 * - could test fs/gs bitsliced
571 *
572 * Kprobes not supported here. Set the probe on schedule instead.
573 */
574 struct task_struct *
575 __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
576 {
577 struct thread_struct *prev = &prev_p->thread,
578 *next = &next_p->thread;
579 int cpu = smp_processor_id();
580 struct tss_struct *tss = &per_cpu(init_tss, cpu);
581
582 /* we're going to use this soon, after a few expensive things */
583 if (next_p->fpu_counter>5)
584 prefetch(next->xstate);
585
586 /*
587 * Reload esp0, LDT and the page table pointer:
588 */
589 load_sp0(tss, next);
590
591 /*
592 * Switch DS and ES.
593 * This won't pick up thread selector changes, but I guess that is ok.
594 */
595 asm volatile("mov %%es,%0" : "=m" (prev->es));
596 if (unlikely(next->es | prev->es))
597 loadsegment(es, next->es);
598
599 asm volatile ("mov %%ds,%0" : "=m" (prev->ds));
600 if (unlikely(next->ds | prev->ds))
601 loadsegment(ds, next->ds);
602
603 load_TLS(next, cpu);
604
605 /*
606 * Switch FS and GS.
607 */
608 {
609 unsigned fsindex;
610 asm volatile("movl %%fs,%0" : "=r" (fsindex));
611 /* segment register != 0 always requires a reload.
612 also reload when it has changed.
613 when prev process used 64bit base always reload
614 to avoid an information leak. */
615 if (unlikely(fsindex | next->fsindex | prev->fs)) {
616 loadsegment(fs, next->fsindex);
617 /* check if the user used a selector != 0
618 * if yes clear 64bit base, since overloaded base
619 * is always mapped to the Null selector
620 */
621 if (fsindex)
622 prev->fs = 0;
623 }
624 /* when next process has a 64bit base use it */
625 if (next->fs)
626 wrmsrl(MSR_FS_BASE, next->fs);
627 prev->fsindex = fsindex;
628 }
629 {
630 unsigned gsindex;
631 asm volatile("movl %%gs,%0" : "=r" (gsindex));
632 if (unlikely(gsindex | next->gsindex | prev->gs)) {
633 load_gs_index(next->gsindex);
634 if (gsindex)
635 prev->gs = 0;
636 }
637 if (next->gs)
638 wrmsrl(MSR_KERNEL_GS_BASE, next->gs);
639 prev->gsindex = gsindex;
640 }
641
642 /* Must be after DS reload */
643 unlazy_fpu(prev_p);
644
645 /*
646 * Switch the PDA and FPU contexts.
647 */
648 prev->usersp = read_pda(oldrsp);
649 write_pda(oldrsp, next->usersp);
650 write_pda(pcurrent, next_p);
651
652 write_pda(kernelstack,
653 (unsigned long)task_stack_page(next_p) + THREAD_SIZE - PDA_STACKOFFSET);
654 #ifdef CONFIG_CC_STACKPROTECTOR
655 /*
656 * Build time only check to make sure the stack_canary is at
657 * offset 40 in the pda; this is a gcc ABI requirement
658 */
659 BUILD_BUG_ON(offsetof(struct x8664_pda, stack_canary) != 40);
660 #endif
661
662 /*
663 * Now maybe reload the debug registers and handle I/O bitmaps
664 */
665 if (unlikely(task_thread_info(next_p)->flags & _TIF_WORK_CTXSW_NEXT ||
666 task_thread_info(prev_p)->flags & _TIF_WORK_CTXSW_PREV))
667 __switch_to_xtra(prev_p, next_p, tss);
668
669 /* If the task has used fpu the last 5 timeslices, just do a full
670 * restore of the math state immediately to avoid the trap; the
671 * chances of needing FPU soon are obviously high now
672 */
673 if (next_p->fpu_counter>5)
674 math_state_restore();
675 return prev_p;
676 }
677
678 /*
679 * sys_execve() executes a new program.
680 */
681 asmlinkage
682 long sys_execve(char __user *name, char __user * __user *argv,
683 char __user * __user *envp, struct pt_regs *regs)
684 {
685 long error;
686 char * filename;
687
688 filename = getname(name);
689 error = PTR_ERR(filename);
690 if (IS_ERR(filename))
691 return error;
692 error = do_execve(filename, argv, envp, regs);
693 putname(filename);
694 return error;
695 }
696
697 void set_personality_64bit(void)
698 {
699 /* inherit personality from parent */
700
701 /* Make sure to be in 64bit mode */
702 clear_thread_flag(TIF_IA32);
703
704 /* TBD: overwrites user setup. Should have two bits.
705 But 64bit processes have always behaved this way,
706 so it's not too bad. The main problem is just that
707 32bit childs are affected again. */
708 current->personality &= ~READ_IMPLIES_EXEC;
709 }
710
711 asmlinkage long sys_fork(struct pt_regs *regs)
712 {
713 return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL);
714 }
715
716 asmlinkage long
717 sys_clone(unsigned long clone_flags, unsigned long newsp,
718 void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
719 {
720 if (!newsp)
721 newsp = regs->sp;
722 return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
723 }
724
725 /*
726 * This is trivial, and on the face of it looks like it
727 * could equally well be done in user mode.
728 *
729 * Not so, for quite unobvious reasons - register pressure.
730 * In user mode vfork() cannot have a stack frame, and if
731 * done by calling the "clone()" system call directly, you
732 * do not have enough call-clobbered registers to hold all
733 * the information you need.
734 */
735 asmlinkage long sys_vfork(struct pt_regs *regs)
736 {
737 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0,
738 NULL, NULL);
739 }
740
741 unsigned long get_wchan(struct task_struct *p)
742 {
743 unsigned long stack;
744 u64 fp,ip;
745 int count = 0;
746
747 if (!p || p == current || p->state==TASK_RUNNING)
748 return 0;
749 stack = (unsigned long)task_stack_page(p);
750 if (p->thread.sp < stack || p->thread.sp > stack+THREAD_SIZE)
751 return 0;
752 fp = *(u64 *)(p->thread.sp);
753 do {
754 if (fp < (unsigned long)stack ||
755 fp > (unsigned long)stack+THREAD_SIZE)
756 return 0;
757 ip = *(u64 *)(fp+8);
758 if (!in_sched_functions(ip))
759 return ip;
760 fp = *(u64 *)fp;
761 } while (count++ < 16);
762 return 0;
763 }
764
765 long do_arch_prctl(struct task_struct *task, int code, unsigned long addr)
766 {
767 int ret = 0;
768 int doit = task == current;
769 int cpu;
770
771 switch (code) {
772 case ARCH_SET_GS:
773 if (addr >= TASK_SIZE_OF(task))
774 return -EPERM;
775 cpu = get_cpu();
776 /* handle small bases via the GDT because that's faster to
777 switch. */
778 if (addr <= 0xffffffff) {
779 set_32bit_tls(task, GS_TLS, addr);
780 if (doit) {
781 load_TLS(&task->thread, cpu);
782 load_gs_index(GS_TLS_SEL);
783 }
784 task->thread.gsindex = GS_TLS_SEL;
785 task->thread.gs = 0;
786 } else {
787 task->thread.gsindex = 0;
788 task->thread.gs = addr;
789 if (doit) {
790 load_gs_index(0);
791 ret = checking_wrmsrl(MSR_KERNEL_GS_BASE, addr);
792 }
793 }
794 put_cpu();
795 break;
796 case ARCH_SET_FS:
797 /* Not strictly needed for fs, but do it for symmetry
798 with gs */
799 if (addr >= TASK_SIZE_OF(task))
800 return -EPERM;
801 cpu = get_cpu();
802 /* handle small bases via the GDT because that's faster to
803 switch. */
804 if (addr <= 0xffffffff) {
805 set_32bit_tls(task, FS_TLS, addr);
806 if (doit) {
807 load_TLS(&task->thread, cpu);
808 asm volatile("movl %0,%%fs" :: "r"(FS_TLS_SEL));
809 }
810 task->thread.fsindex = FS_TLS_SEL;
811 task->thread.fs = 0;
812 } else {
813 task->thread.fsindex = 0;
814 task->thread.fs = addr;
815 if (doit) {
816 /* set the selector to 0 to not confuse
817 __switch_to */
818 asm volatile("movl %0,%%fs" :: "r" (0));
819 ret = checking_wrmsrl(MSR_FS_BASE, addr);
820 }
821 }
822 put_cpu();
823 break;
824 case ARCH_GET_FS: {
825 unsigned long base;
826 if (task->thread.fsindex == FS_TLS_SEL)
827 base = read_32bit_tls(task, FS_TLS);
828 else if (doit)
829 rdmsrl(MSR_FS_BASE, base);
830 else
831 base = task->thread.fs;
832 ret = put_user(base, (unsigned long __user *)addr);
833 break;
834 }
835 case ARCH_GET_GS: {
836 unsigned long base;
837 unsigned gsindex;
838 if (task->thread.gsindex == GS_TLS_SEL)
839 base = read_32bit_tls(task, GS_TLS);
840 else if (doit) {
841 asm("movl %%gs,%0" : "=r" (gsindex));
842 if (gsindex)
843 rdmsrl(MSR_KERNEL_GS_BASE, base);
844 else
845 base = task->thread.gs;
846 }
847 else
848 base = task->thread.gs;
849 ret = put_user(base, (unsigned long __user *)addr);
850 break;
851 }
852
853 default:
854 ret = -EINVAL;
855 break;
856 }
857
858 return ret;
859 }
860
861 long sys_arch_prctl(int code, unsigned long addr)
862 {
863 return do_arch_prctl(current, code, addr);
864 }
865
866 unsigned long arch_align_stack(unsigned long sp)
867 {
868 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
869 sp -= get_random_int() % 8192;
870 return sp & ~0xf;
871 }
872
873 unsigned long arch_randomize_brk(struct mm_struct *mm)
874 {
875 unsigned long range_end = mm->brk + 0x02000000;
876 return randomize_range(mm->brk, range_end, 0) ? : mm->brk;
877 }
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