arch/x86/kernel/quirks.c

   1 /*
   2  * This file contains work-arounds for x86 and x86_64 platform bugs.
   3  */
   4 #include <linux/pci.h>
   5 #include <linux/irq.h>
   6
   7 #if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_SMP) && defined(CONFIG_PCI)
   8
   9 static void __devinit quirk_intel_irqbalance(struct pci_dev *dev)
  10 {
  11         u8 config, rev;
  12         u32 word;
  13
  14         /* BIOS may enable hardware IRQ balancing for
  15          * E7520/E7320/E7525(revision ID 0x9 and below)
  16          * based platforms.
  17          * Disable SW irqbalance/affinity on those platforms.
  18          */
  19         pci_read_config_byte(dev, PCI_CLASS_REVISION, &rev);
  20         if (rev > 0x9)
  21                 return;
  22
  23         /* enable access to config space*/
  24         pci_read_config_byte(dev, 0xf4, &config);
  25         pci_write_config_byte(dev, 0xf4, config|0x2);
  26
  27         /* read xTPR register */
  28         raw_pci_ops->read(0, 0, 0x40, 0x4c, 2, &word);
  29
  30         if (!(word & (1 << 13))) {
  31                 printk(KERN_INFO "Intel E7520/7320/7525 detected. "
  32                         "Disabling irq balancing and affinity\n");
  33 #ifdef CONFIG_IRQBALANCE
  34                 irqbalance_disable("");
  35 #endif
  36                 noirqdebug_setup("");
  37 #ifdef CONFIG_PROC_FS
  38                 no_irq_affinity = 1;
  39 #endif
  40         }
  41
  42         /* put back the original value for config space*/
  43         if (!(config & 0x2))
  44                 pci_write_config_byte(dev, 0xf4, config);
  45 }
  46 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,    PCI_DEVICE_ID_INTEL_E7320_MCH,  quirk_intel_irqbalance);
  47 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,    PCI_DEVICE_ID_INTEL_E7525_MCH,  quirk_intel_irqbalance);
  48 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,    PCI_DEVICE_ID_INTEL_E7520_MCH,  quirk_intel_irqbalance);
  49 #endif