x86: cleanup some remaining usages of NR_CPUS where s/b nr_cpu_ids
[deliverable/linux.git] / arch / x86 / kernel / reboot.c
1 #include <linux/module.h>
2 #include <linux/reboot.h>
3 #include <linux/init.h>
4 #include <linux/pm.h>
5 #include <linux/efi.h>
6 #include <acpi/reboot.h>
7 #include <asm/io.h>
8 #include <asm/apic.h>
9 #include <asm/desc.h>
10 #include <asm/hpet.h>
11 #include <asm/pgtable.h>
12 #include <asm/proto.h>
13 #include <asm/reboot_fixups.h>
14 #include <asm/reboot.h>
15
16 #ifdef CONFIG_X86_32
17 # include <linux/dmi.h>
18 # include <linux/ctype.h>
19 # include <linux/mc146818rtc.h>
20 #else
21 # include <asm/iommu.h>
22 #endif
23
24 #include <mach_ipi.h>
25
26
27 /*
28 * Power off function, if any
29 */
30 void (*pm_power_off)(void);
31 EXPORT_SYMBOL(pm_power_off);
32
33 static const struct desc_ptr no_idt = {};
34 static int reboot_mode;
35 enum reboot_type reboot_type = BOOT_KBD;
36 int reboot_force;
37
38 #if defined(CONFIG_X86_32) && defined(CONFIG_SMP)
39 static int reboot_cpu = -1;
40 #endif
41
42 /* This is set by the PCI code if either type 1 or type 2 PCI is detected */
43 bool port_cf9_safe = false;
44
45 /* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci]
46 warm Don't set the cold reboot flag
47 cold Set the cold reboot flag
48 bios Reboot by jumping through the BIOS (only for X86_32)
49 smp Reboot by executing reset on BSP or other CPU (only for X86_32)
50 triple Force a triple fault (init)
51 kbd Use the keyboard controller. cold reset (default)
52 acpi Use the RESET_REG in the FADT
53 efi Use efi reset_system runtime service
54 pci Use the so-called "PCI reset register", CF9
55 force Avoid anything that could hang.
56 */
57 static int __init reboot_setup(char *str)
58 {
59 for (;;) {
60 switch (*str) {
61 case 'w':
62 reboot_mode = 0x1234;
63 break;
64
65 case 'c':
66 reboot_mode = 0;
67 break;
68
69 #ifdef CONFIG_X86_32
70 #ifdef CONFIG_SMP
71 case 's':
72 if (isdigit(*(str+1))) {
73 reboot_cpu = (int) (*(str+1) - '0');
74 if (isdigit(*(str+2)))
75 reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0');
76 }
77 /* we will leave sorting out the final value
78 when we are ready to reboot, since we might not
79 have set up boot_cpu_id or smp_num_cpu */
80 break;
81 #endif /* CONFIG_SMP */
82
83 case 'b':
84 #endif
85 case 'a':
86 case 'k':
87 case 't':
88 case 'e':
89 case 'p':
90 reboot_type = *str;
91 break;
92
93 case 'f':
94 reboot_force = 1;
95 break;
96 }
97
98 str = strchr(str, ',');
99 if (str)
100 str++;
101 else
102 break;
103 }
104 return 1;
105 }
106
107 __setup("reboot=", reboot_setup);
108
109
110 #ifdef CONFIG_X86_32
111 /*
112 * Reboot options and system auto-detection code provided by
113 * Dell Inc. so their systems "just work". :-)
114 */
115
116 /*
117 * Some machines require the "reboot=b" commandline option,
118 * this quirk makes that automatic.
119 */
120 static int __init set_bios_reboot(const struct dmi_system_id *d)
121 {
122 if (reboot_type != BOOT_BIOS) {
123 reboot_type = BOOT_BIOS;
124 printk(KERN_INFO "%s series board detected. Selecting BIOS-method for reboots.\n", d->ident);
125 }
126 return 0;
127 }
128
129 static struct dmi_system_id __initdata reboot_dmi_table[] = {
130 { /* Handle problems with rebooting on Dell E520's */
131 .callback = set_bios_reboot,
132 .ident = "Dell E520",
133 .matches = {
134 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
135 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"),
136 },
137 },
138 { /* Handle problems with rebooting on Dell 1300's */
139 .callback = set_bios_reboot,
140 .ident = "Dell PowerEdge 1300",
141 .matches = {
142 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
143 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"),
144 },
145 },
146 { /* Handle problems with rebooting on Dell 300's */
147 .callback = set_bios_reboot,
148 .ident = "Dell PowerEdge 300",
149 .matches = {
150 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
151 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"),
152 },
153 },
154 { /* Handle problems with rebooting on Dell Optiplex 745's SFF*/
155 .callback = set_bios_reboot,
156 .ident = "Dell OptiPlex 745",
157 .matches = {
158 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
159 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
160 },
161 },
162 { /* Handle problems with rebooting on Dell Optiplex 745's DFF*/
163 .callback = set_bios_reboot,
164 .ident = "Dell OptiPlex 745",
165 .matches = {
166 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
167 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
168 DMI_MATCH(DMI_BOARD_NAME, "0MM599"),
169 },
170 },
171 { /* Handle problems with rebooting on Dell Optiplex 745 with 0KW626 */
172 .callback = set_bios_reboot,
173 .ident = "Dell OptiPlex 745",
174 .matches = {
175 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
176 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
177 DMI_MATCH(DMI_BOARD_NAME, "0KW626"),
178 },
179 },
180 { /* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */
181 .callback = set_bios_reboot,
182 .ident = "Dell OptiPlex 330",
183 .matches = {
184 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
185 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 330"),
186 DMI_MATCH(DMI_BOARD_NAME, "0KP561"),
187 },
188 },
189 { /* Handle problems with rebooting on Dell 2400's */
190 .callback = set_bios_reboot,
191 .ident = "Dell PowerEdge 2400",
192 .matches = {
193 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
194 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"),
195 },
196 },
197 { /* Handle problems with rebooting on Dell T5400's */
198 .callback = set_bios_reboot,
199 .ident = "Dell Precision T5400",
200 .matches = {
201 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
202 DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"),
203 },
204 },
205 { /* Handle problems with rebooting on HP laptops */
206 .callback = set_bios_reboot,
207 .ident = "HP Compaq Laptop",
208 .matches = {
209 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
210 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"),
211 },
212 },
213 { }
214 };
215
216 static int __init reboot_init(void)
217 {
218 dmi_check_system(reboot_dmi_table);
219 return 0;
220 }
221 core_initcall(reboot_init);
222
223 /* The following code and data reboots the machine by switching to real
224 mode and jumping to the BIOS reset entry point, as if the CPU has
225 really been reset. The previous version asked the keyboard
226 controller to pulse the CPU reset line, which is more thorough, but
227 doesn't work with at least one type of 486 motherboard. It is easy
228 to stop this code working; hence the copious comments. */
229 static const unsigned long long
230 real_mode_gdt_entries [3] =
231 {
232 0x0000000000000000ULL, /* Null descriptor */
233 0x00009b000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */
234 0x000093000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */
235 };
236
237 static const struct desc_ptr
238 real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries },
239 real_mode_idt = { 0x3ff, 0 };
240
241 /* This is 16-bit protected mode code to disable paging and the cache,
242 switch to real mode and jump to the BIOS reset code.
243
244 The instruction that switches to real mode by writing to CR0 must be
245 followed immediately by a far jump instruction, which set CS to a
246 valid value for real mode, and flushes the prefetch queue to avoid
247 running instructions that have already been decoded in protected
248 mode.
249
250 Clears all the flags except ET, especially PG (paging), PE
251 (protected-mode enable) and TS (task switch for coprocessor state
252 save). Flushes the TLB after paging has been disabled. Sets CD and
253 NW, to disable the cache on a 486, and invalidates the cache. This
254 is more like the state of a 486 after reset. I don't know if
255 something else should be done for other chips.
256
257 More could be done here to set up the registers as if a CPU reset had
258 occurred; hopefully real BIOSs don't assume much. */
259 static const unsigned char real_mode_switch [] =
260 {
261 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */
262 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */
263 0x66, 0x0d, 0x00, 0x00, 0x00, 0x60, /* orl $0x60000000,%eax */
264 0x66, 0x0f, 0x22, 0xc0, /* movl %eax,%cr0 */
265 0x66, 0x0f, 0x22, 0xd8, /* movl %eax,%cr3 */
266 0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */
267 0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */
268 0x74, 0x02, /* jz f */
269 0x0f, 0x09, /* wbinvd */
270 0x24, 0x10, /* f: andb $0x10,al */
271 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */
272 };
273 static const unsigned char jump_to_bios [] =
274 {
275 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */
276 };
277
278 /*
279 * Switch to real mode and then execute the code
280 * specified by the code and length parameters.
281 * We assume that length will aways be less that 100!
282 */
283 void machine_real_restart(const unsigned char *code, int length)
284 {
285 local_irq_disable();
286
287 /* Write zero to CMOS register number 0x0f, which the BIOS POST
288 routine will recognize as telling it to do a proper reboot. (Well
289 that's what this book in front of me says -- it may only apply to
290 the Phoenix BIOS though, it's not clear). At the same time,
291 disable NMIs by setting the top bit in the CMOS address register,
292 as we're about to do peculiar things to the CPU. I'm not sure if
293 `outb_p' is needed instead of just `outb'. Use it to be on the
294 safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.)
295 */
296 spin_lock(&rtc_lock);
297 CMOS_WRITE(0x00, 0x8f);
298 spin_unlock(&rtc_lock);
299
300 /* Remap the kernel at virtual address zero, as well as offset zero
301 from the kernel segment. This assumes the kernel segment starts at
302 virtual address PAGE_OFFSET. */
303 memcpy(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
304 sizeof(swapper_pg_dir [0]) * KERNEL_PGD_PTRS);
305
306 /*
307 * Use `swapper_pg_dir' as our page directory.
308 */
309 load_cr3(swapper_pg_dir);
310
311 /* Write 0x1234 to absolute memory location 0x472. The BIOS reads
312 this on booting to tell it to "Bypass memory test (also warm
313 boot)". This seems like a fairly standard thing that gets set by
314 REBOOT.COM programs, and the previous reset routine did this
315 too. */
316 *((unsigned short *)0x472) = reboot_mode;
317
318 /* For the switch to real mode, copy some code to low memory. It has
319 to be in the first 64k because it is running in 16-bit mode, and it
320 has to have the same physical and virtual address, because it turns
321 off paging. Copy it near the end of the first page, out of the way
322 of BIOS variables. */
323 memcpy((void *)(0x1000 - sizeof(real_mode_switch) - 100),
324 real_mode_switch, sizeof (real_mode_switch));
325 memcpy((void *)(0x1000 - 100), code, length);
326
327 /* Set up the IDT for real mode. */
328 load_idt(&real_mode_idt);
329
330 /* Set up a GDT from which we can load segment descriptors for real
331 mode. The GDT is not used in real mode; it is just needed here to
332 prepare the descriptors. */
333 load_gdt(&real_mode_gdt);
334
335 /* Load the data segment registers, and thus the descriptors ready for
336 real mode. The base address of each segment is 0x100, 16 times the
337 selector value being loaded here. This is so that the segment
338 registers don't have to be reloaded after switching to real mode:
339 the values are consistent for real mode operation already. */
340 __asm__ __volatile__ ("movl $0x0010,%%eax\n"
341 "\tmovl %%eax,%%ds\n"
342 "\tmovl %%eax,%%es\n"
343 "\tmovl %%eax,%%fs\n"
344 "\tmovl %%eax,%%gs\n"
345 "\tmovl %%eax,%%ss" : : : "eax");
346
347 /* Jump to the 16-bit code that we copied earlier. It disables paging
348 and the cache, switches to real mode, and jumps to the BIOS reset
349 entry point. */
350 __asm__ __volatile__ ("ljmp $0x0008,%0"
351 :
352 : "i" ((void *)(0x1000 - sizeof (real_mode_switch) - 100)));
353 }
354 #ifdef CONFIG_APM_MODULE
355 EXPORT_SYMBOL(machine_real_restart);
356 #endif
357
358 #endif /* CONFIG_X86_32 */
359
360 static inline void kb_wait(void)
361 {
362 int i;
363
364 for (i = 0; i < 0x10000; i++) {
365 if ((inb(0x64) & 0x02) == 0)
366 break;
367 udelay(2);
368 }
369 }
370
371 void __attribute__((weak)) mach_reboot_fixups(void)
372 {
373 }
374
375 static void native_machine_emergency_restart(void)
376 {
377 int i;
378
379 /* Tell the BIOS if we want cold or warm reboot */
380 *((unsigned short *)__va(0x472)) = reboot_mode;
381
382 for (;;) {
383 /* Could also try the reset bit in the Hammer NB */
384 switch (reboot_type) {
385 case BOOT_KBD:
386 mach_reboot_fixups(); /* for board specific fixups */
387
388 for (i = 0; i < 10; i++) {
389 kb_wait();
390 udelay(50);
391 outb(0xfe, 0x64); /* pulse reset low */
392 udelay(50);
393 }
394
395 case BOOT_TRIPLE:
396 load_idt(&no_idt);
397 __asm__ __volatile__("int3");
398
399 reboot_type = BOOT_KBD;
400 break;
401
402 #ifdef CONFIG_X86_32
403 case BOOT_BIOS:
404 machine_real_restart(jump_to_bios, sizeof(jump_to_bios));
405
406 reboot_type = BOOT_KBD;
407 break;
408 #endif
409
410 case BOOT_ACPI:
411 acpi_reboot();
412 reboot_type = BOOT_KBD;
413 break;
414
415 case BOOT_EFI:
416 if (efi_enabled)
417 efi.reset_system(reboot_mode ?
418 EFI_RESET_WARM :
419 EFI_RESET_COLD,
420 EFI_SUCCESS, 0, NULL);
421 reboot_type = BOOT_KBD;
422 break;
423
424 case BOOT_CF9:
425 port_cf9_safe = true;
426 /* fall through */
427
428 case BOOT_CF9_COND:
429 if (port_cf9_safe) {
430 u8 cf9 = inb(0xcf9) & ~6;
431 outb(cf9|2, 0xcf9); /* Request hard reset */
432 udelay(50);
433 outb(cf9|6, 0xcf9); /* Actually do the reset */
434 udelay(50);
435 }
436 reboot_type = BOOT_KBD;
437 break;
438 }
439 }
440 }
441
442 void native_machine_shutdown(void)
443 {
444 /* Stop the cpus and apics */
445 #ifdef CONFIG_SMP
446
447 /* The boot cpu is always logical cpu 0 */
448 int reboot_cpu_id = 0;
449
450 #ifdef CONFIG_X86_32
451 /* See if there has been given a command line override */
452 if ((reboot_cpu != -1) && (reboot_cpu < nr_cpu_ids) &&
453 cpu_online(reboot_cpu))
454 reboot_cpu_id = reboot_cpu;
455 #endif
456
457 /* Make certain the cpu I'm about to reboot on is online */
458 if (!cpu_online(reboot_cpu_id))
459 reboot_cpu_id = smp_processor_id();
460
461 /* Make certain I only run on the appropriate processor */
462 set_cpus_allowed_ptr(current, cpumask_of(reboot_cpu_id));
463
464 /* O.K Now that I'm on the appropriate processor,
465 * stop all of the others.
466 */
467 smp_send_stop();
468 #endif
469
470 lapic_shutdown();
471
472 #ifdef CONFIG_X86_IO_APIC
473 disable_IO_APIC();
474 #endif
475
476 #ifdef CONFIG_HPET_TIMER
477 hpet_disable();
478 #endif
479
480 #ifdef CONFIG_X86_64
481 pci_iommu_shutdown();
482 #endif
483 }
484
485 static void native_machine_restart(char *__unused)
486 {
487 printk("machine restart\n");
488
489 if (!reboot_force)
490 machine_shutdown();
491 machine_emergency_restart();
492 }
493
494 static void native_machine_halt(void)
495 {
496 /* stop other cpus and apics */
497 machine_shutdown();
498
499 /* stop this cpu */
500 stop_this_cpu(NULL);
501 }
502
503 static void native_machine_power_off(void)
504 {
505 if (pm_power_off) {
506 if (!reboot_force)
507 machine_shutdown();
508 pm_power_off();
509 }
510 }
511
512 struct machine_ops machine_ops = {
513 .power_off = native_machine_power_off,
514 .shutdown = native_machine_shutdown,
515 .emergency_restart = native_machine_emergency_restart,
516 .restart = native_machine_restart,
517 .halt = native_machine_halt,
518 #ifdef CONFIG_KEXEC
519 .crash_shutdown = native_machine_crash_shutdown,
520 #endif
521 };
522
523 void machine_power_off(void)
524 {
525 machine_ops.power_off();
526 }
527
528 void machine_shutdown(void)
529 {
530 machine_ops.shutdown();
531 }
532
533 void machine_emergency_restart(void)
534 {
535 machine_ops.emergency_restart();
536 }
537
538 void machine_restart(char *cmd)
539 {
540 machine_ops.restart(cmd);
541 }
542
543 void machine_halt(void)
544 {
545 machine_ops.halt();
546 }
547
548 #ifdef CONFIG_KEXEC
549 void machine_crash_shutdown(struct pt_regs *regs)
550 {
551 machine_ops.crash_shutdown(regs);
552 }
553 #endif
554
555
556 #if defined(CONFIG_SMP)
557
558 /* This keeps a track of which one is crashing cpu. */
559 static int crashing_cpu;
560 static nmi_shootdown_cb shootdown_callback;
561
562 static atomic_t waiting_for_crash_ipi;
563
564 static int crash_nmi_callback(struct notifier_block *self,
565 unsigned long val, void *data)
566 {
567 int cpu;
568
569 if (val != DIE_NMI_IPI)
570 return NOTIFY_OK;
571
572 cpu = raw_smp_processor_id();
573
574 /* Don't do anything if this handler is invoked on crashing cpu.
575 * Otherwise, system will completely hang. Crashing cpu can get
576 * an NMI if system was initially booted with nmi_watchdog parameter.
577 */
578 if (cpu == crashing_cpu)
579 return NOTIFY_STOP;
580 local_irq_disable();
581
582 shootdown_callback(cpu, (struct die_args *)data);
583
584 atomic_dec(&waiting_for_crash_ipi);
585 /* Assume hlt works */
586 halt();
587 for (;;)
588 cpu_relax();
589
590 return 1;
591 }
592
593 static void smp_send_nmi_allbutself(void)
594 {
595 send_IPI_allbutself(NMI_VECTOR);
596 }
597
598 static struct notifier_block crash_nmi_nb = {
599 .notifier_call = crash_nmi_callback,
600 };
601
602 /* Halt all other CPUs, calling the specified function on each of them
603 *
604 * This function can be used to halt all other CPUs on crash
605 * or emergency reboot time. The function passed as parameter
606 * will be called inside a NMI handler on all CPUs.
607 */
608 void nmi_shootdown_cpus(nmi_shootdown_cb callback)
609 {
610 unsigned long msecs;
611 local_irq_disable();
612
613 /* Make a note of crashing cpu. Will be used in NMI callback.*/
614 crashing_cpu = safe_smp_processor_id();
615
616 shootdown_callback = callback;
617
618 atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1);
619 /* Would it be better to replace the trap vector here? */
620 if (register_die_notifier(&crash_nmi_nb))
621 return; /* return what? */
622 /* Ensure the new callback function is set before sending
623 * out the NMI
624 */
625 wmb();
626
627 smp_send_nmi_allbutself();
628
629 msecs = 1000; /* Wait at most a second for the other cpus to stop */
630 while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) {
631 mdelay(1);
632 msecs--;
633 }
634
635 /* Leave the nmi callback set */
636 }
637 #else /* !CONFIG_SMP */
638 void nmi_shootdown_cpus(nmi_shootdown_cb callback)
639 {
640 /* No other CPUs to shoot down */
641 }
642 #endif
This page took 0.051715 seconds and 5 git commands to generate.