arch/x86/kernel/setup64.c

   1 /*
   2  * X86-64 specific CPU setup.
   3  * Copyright (C) 1995  Linus Torvalds
   4  * Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
   5  * See setup.c for older changelog.
   6  */
   7 #include <linux/init.h>
   8 #include <linux/kernel.h>
   9 #include <linux/sched.h>
  10 #include <linux/string.h>
  11 #include <linux/bootmem.h>
  12 #include <linux/bitops.h>
  13 #include <linux/module.h>
  14 #include <asm/pda.h>
  15 #include <asm/pgtable.h>
  16 #include <asm/processor.h>
  17 #include <asm/desc.h>
  18 #include <asm/atomic.h>
  19 #include <asm/mmu_context.h>
  20 #include <asm/smp.h>
  21 #include <asm/i387.h>
  22 #include <asm/percpu.h>
  23 #include <asm/proto.h>
  24 #include <asm/sections.h>
  25 #include <asm/setup.h>
  26 #include <asm/genapic.h>
  27
  28 #ifndef CONFIG_DEBUG_BOOT_PARAMS
  29 struct boot_params __initdata boot_params;
  30 #else
  31 struct boot_params boot_params;
  32 #endif
  33
  34 cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE;
  35
  36 struct x8664_pda *_cpu_pda[NR_CPUS] __read_mostly;
  37 EXPORT_SYMBOL(_cpu_pda);
  38 struct x8664_pda boot_cpu_pda[NR_CPUS] __cacheline_aligned;
  39
  40 struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };
  41
  42 char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));
  43
  44 unsigned long __supported_pte_mask __read_mostly = ~0UL;
  45 EXPORT_SYMBOL_GPL(__supported_pte_mask);
  46
  47 static int do_not_nx __cpuinitdata = 0;
  48
  49 /* noexec=on|off
  50 Control non executable mappings for 64bit processes.
  51
  52 on      Enable(default)
  53 off     Disable
  54 */
  55 static int __init nonx_setup(char *str)
  56 {
  57         if (!str)
  58                 return -EINVAL;
  59         if (!strncmp(str, "on", 2)) {
  60                 __supported_pte_mask |= _PAGE_NX;
  61                 do_not_nx = 0;
  62         } else if (!strncmp(str, "off", 3)) {
  63                 do_not_nx = 1;
  64                 __supported_pte_mask &= ~_PAGE_NX;
  65         }
  66         return 0;
  67 }
  68 early_param("noexec", nonx_setup);
  69
  70 int force_personality32 = 0;
  71
  72 /* noexec32=on|off
  73 Control non executable heap for 32bit processes.
  74 To control the stack too use noexec=off
  75
  76 on      PROT_READ does not imply PROT_EXEC for 32bit processes
  77 off     PROT_READ implies PROT_EXEC (default)
  78 */
  79 static int __init nonx32_setup(char *str)
  80 {
  81         if (!strcmp(str, "on"))
  82                 force_personality32 &= ~READ_IMPLIES_EXEC;
  83         else if (!strcmp(str, "off"))
  84                 force_personality32 |= READ_IMPLIES_EXEC;
  85         return 1;
  86 }
  87 __setup("noexec32=", nonx32_setup);
  88
  89 void pda_init(int cpu)
  90 {
  91         struct x8664_pda *pda = cpu_pda(cpu);
  92
  93         /* Setup up data that may be needed in __get_free_pages early */
  94         asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
  95         /* Memory clobbers used to order PDA accessed */
  96         mb();
  97         wrmsrl(MSR_GS_BASE, pda);
  98         mb();
  99
 100         pda->cpunumber = cpu;
 101         pda->irqcount = -1;
 102         pda->kernelstack =
 103                 (unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
 104         pda->active_mm = &init_mm;
 105         pda->mmu_state = 0;
 106
 107         if (cpu == 0) {
 108                 /* others are initialized in smpboot.c */
 109                 pda->pcurrent = &init_task;
 110                 pda->irqstackptr = boot_cpu_stack;
 111         } else {
 112                 pda->irqstackptr = (char *)
 113                         __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
 114                 if (!pda->irqstackptr)
 115                         panic("cannot allocate irqstack for cpu %d", cpu);
 116         }
 117
 118
 119         pda->irqstackptr += IRQSTACKSIZE-64;
 120 }
 121
 122 char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]
 123 __attribute__((section(".bss.page_aligned")));
 124
 125 extern asmlinkage void ignore_sysret(void);
 126
 127 /* May not be marked __init: used by software suspend */
 128 void syscall_init(void)
 129 {
 130         /*
 131          * LSTAR and STAR live in a bit strange symbiosis.
 132          * They both write to the same internal register. STAR allows to set CS/DS
 133          * but only a 32bit target. LSTAR sets the 64bit rip.
 134          */
 135         wrmsrl(MSR_STAR,  ((u64)__USER32_CS)<<48  | ((u64)__KERNEL_CS)<<32);
 136         wrmsrl(MSR_LSTAR, system_call);
 137         wrmsrl(MSR_CSTAR, ignore_sysret);
 138
 139 #ifdef CONFIG_IA32_EMULATION
 140         syscall32_cpu_init ();
 141 #endif
 142
 143         /* Flags to clear on syscall */
 144         wrmsrl(MSR_SYSCALL_MASK,
 145                X86_EFLAGS_TF|X86_EFLAGS_DF|X86_EFLAGS_IF|X86_EFLAGS_IOPL);
 146 }
 147
 148 void __cpuinit check_efer(void)
 149 {
 150         unsigned long efer;
 151
 152         rdmsrl(MSR_EFER, efer);
 153         if (!(efer & EFER_NX) || do_not_nx) {
 154                 __supported_pte_mask &= ~_PAGE_NX;
 155         }
 156 }
 157
 158 unsigned long kernel_eflags;
 159
 160 /*
 161  * Copies of the original ist values from the tss are only accessed during
 162  * debugging, no special alignment required.
 163  */
 164 DEFINE_PER_CPU(struct orig_ist, orig_ist);
 165
 166 /*
 167  * cpu_init() initializes state that is per-CPU. Some data is already
 168  * initialized (naturally) in the bootstrap process, such as the GDT
 169  * and IDT. We reload them nevertheless, this function acts as a
 170  * 'CPU state barrier', nothing should get across.
 171  * A lot of state is already set up in PDA init.
 172  */
 173 void __cpuinit cpu_init (void)
 174 {
 175         int cpu = stack_smp_processor_id();
 176         struct tss_struct *t = &per_cpu(init_tss, cpu);
 177         struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu);
 178         unsigned long v;
 179         char *estacks = NULL;
 180         struct task_struct *me;
 181         int i;
 182
 183         /* CPU 0 is initialised in head64.c */
 184         if (cpu != 0) {
 185                 pda_init(cpu);
 186         } else
 187                 estacks = boot_exception_stacks;
 188
 189         me = current;
 190
 191         if (cpu_test_and_set(cpu, cpu_initialized))
 192                 panic("CPU#%d already initialized!\n", cpu);
 193
 194         printk("Initializing CPU#%d\n", cpu);
 195
 196         clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
 197
 198         /*
 199          * Initialize the per-CPU GDT with the boot GDT,
 200          * and set up the GDT descriptor:
 201          */
 202         if (cpu)
 203                 memcpy(get_cpu_gdt_table(cpu), cpu_gdt_table, GDT_SIZE);
 204
 205         cpu_gdt_descr[cpu].size = GDT_SIZE;
 206         load_gdt((const struct desc_ptr *)&cpu_gdt_descr[cpu]);
 207         load_idt((const struct desc_ptr *)&idt_descr);
 208
 209         memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);
 210         syscall_init();
 211
 212         wrmsrl(MSR_FS_BASE, 0);
 213         wrmsrl(MSR_KERNEL_GS_BASE, 0);
 214         barrier();
 215
 216         check_efer();
 217
 218         /*
 219          * set up and load the per-CPU TSS
 220          */
 221         for (v = 0; v < N_EXCEPTION_STACKS; v++) {
 222                 static const unsigned int order[N_EXCEPTION_STACKS] = {
 223                         [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
 224                         [DEBUG_STACK - 1] = DEBUG_STACK_ORDER
 225                 };
 226                 if (cpu) {
 227                         estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
 228                         if (!estacks)
 229                                 panic("Cannot allocate exception stack %ld %d\n",
 230                                       v, cpu);
 231                 }
 232                 estacks += PAGE_SIZE << order[v];
 233                 orig_ist->ist[v] = t->x86_tss.ist[v] = (unsigned long)estacks;
 234         }
 235
 236         t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
 237         /*
 238          * <= is required because the CPU will access up to
 239          * 8 bits beyond the end of the IO permission bitmap.
 240          */
 241         for (i = 0; i <= IO_BITMAP_LONGS; i++)
 242                 t->io_bitmap[i] = ~0UL;
 243
 244         atomic_inc(&init_mm.mm_count);
 245         me->active_mm = &init_mm;
 246         if (me->mm)
 247                 BUG();
 248         enter_lazy_tlb(&init_mm, me);
 249
 250         set_tss_desc(cpu, t);
 251         load_TR_desc();
 252         load_LDT(&init_mm.context);
 253
 254         /*
 255          * Clear all 6 debug registers:
 256          */
 257
 258         set_debugreg(0UL, 0);
 259         set_debugreg(0UL, 1);
 260         set_debugreg(0UL, 2);
 261         set_debugreg(0UL, 3);
 262         set_debugreg(0UL, 6);
 263         set_debugreg(0UL, 7);
 264
 265         fpu_init();
 266
 267         raw_local_save_flags(kernel_eflags);
 268
 269         if (is_uv_system())
 270                 uv_cpu_init();
 271 }