Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
[deliverable/linux.git] / arch / x86 / kernel / smpboot_64.c
1 /*
2 * x86 SMP booting functions
3 *
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
7 *
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
10 *
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
14 *
15 * This code is released under the GNU General Public License version 2
16 *
17 * Fixes
18 * Felix Koop : NR_CPUS used properly
19 * Jose Renau : Handle single CPU case.
20 * Alan Cox : By repeated request 8) - Total BogoMIP report.
21 * Greg Wright : Fix for kernel stacks panic.
22 * Erich Boleyn : MP v1.4 and additional changes.
23 * Matthias Sattler : Changes for 2.1 kernel map.
24 * Michel Lespinasse : Changes for 2.1 kernel map.
25 * Michael Chastain : Change trampoline.S to gnu as.
26 * Alan Cox : Dumb bug: 'B' step PPro's are fine
27 * Ingo Molnar : Added APIC timers, based on code
28 * from Jose Renau
29 * Ingo Molnar : various cleanups and rewrites
30 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
31 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
32 * Andi Kleen : Changed for SMP boot into long mode.
33 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
34 * Andi Kleen : Converted to new state machine.
35 * Various cleanups.
36 * Probably mostly hotplug CPU ready now.
37 * Ashok Raj : CPU hotplug support
38 */
39
40
41 #include <linux/init.h>
42
43 #include <linux/mm.h>
44 #include <linux/kernel_stat.h>
45 #include <linux/bootmem.h>
46 #include <linux/thread_info.h>
47 #include <linux/module.h>
48 #include <linux/delay.h>
49 #include <linux/mc146818rtc.h>
50 #include <linux/smp.h>
51 #include <linux/kdebug.h>
52
53 #include <asm/mtrr.h>
54 #include <asm/pgalloc.h>
55 #include <asm/desc.h>
56 #include <asm/tlbflush.h>
57 #include <asm/proto.h>
58 #include <asm/nmi.h>
59 #include <asm/irq.h>
60 #include <asm/hw_irq.h>
61 #include <asm/numa.h>
62
63 /* Number of siblings per CPU package */
64 int smp_num_siblings = 1;
65 EXPORT_SYMBOL(smp_num_siblings);
66
67 /* Last level cache ID of each logical CPU */
68 u8 cpu_llc_id[NR_CPUS] __cpuinitdata = {[0 ... NR_CPUS-1] = BAD_APICID};
69
70 /* Bitmask of currently online CPUs */
71 cpumask_t cpu_online_map __read_mostly;
72
73 EXPORT_SYMBOL(cpu_online_map);
74
75 /*
76 * Private maps to synchronize booting between AP and BP.
77 * Probably not needed anymore, but it makes for easier debugging. -AK
78 */
79 cpumask_t cpu_callin_map;
80 cpumask_t cpu_callout_map;
81 EXPORT_SYMBOL(cpu_callout_map);
82
83 cpumask_t cpu_possible_map;
84 EXPORT_SYMBOL(cpu_possible_map);
85
86 /* Per CPU bogomips and other parameters */
87 struct cpuinfo_x86 cpu_data[NR_CPUS] __cacheline_aligned;
88 EXPORT_SYMBOL(cpu_data);
89
90 /* Set when the idlers are all forked */
91 int smp_threads_ready;
92
93 /* representing HT siblings of each logical CPU */
94 cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
95 EXPORT_SYMBOL(cpu_sibling_map);
96
97 /* representing HT and core siblings of each logical CPU */
98 cpumask_t cpu_core_map[NR_CPUS] __read_mostly;
99 EXPORT_SYMBOL(cpu_core_map);
100
101 /*
102 * Trampoline 80x86 program as an array.
103 */
104
105 extern unsigned char trampoline_data[];
106 extern unsigned char trampoline_end[];
107
108 /* State of each CPU */
109 DEFINE_PER_CPU(int, cpu_state) = { 0 };
110
111 /*
112 * Store all idle threads, this can be reused instead of creating
113 * a new thread. Also avoids complicated thread destroy functionality
114 * for idle threads.
115 */
116 struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
117
118 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
119 #define set_idle_for_cpu(x,p) (idle_thread_array[(x)] = (p))
120
121 /*
122 * Currently trivial. Write the real->protected mode
123 * bootstrap into the page concerned. The caller
124 * has made sure it's suitably aligned.
125 */
126
127 static unsigned long __cpuinit setup_trampoline(void)
128 {
129 void *tramp = __va(SMP_TRAMPOLINE_BASE);
130 memcpy(tramp, trampoline_data, trampoline_end - trampoline_data);
131 return virt_to_phys(tramp);
132 }
133
134 /*
135 * The bootstrap kernel entry code has set these up. Save them for
136 * a given CPU
137 */
138
139 static void __cpuinit smp_store_cpu_info(int id)
140 {
141 struct cpuinfo_x86 *c = cpu_data + id;
142
143 *c = boot_cpu_data;
144 identify_cpu(c);
145 print_cpu_info(c);
146 }
147
148 static atomic_t init_deasserted __cpuinitdata;
149
150 /*
151 * Report back to the Boot Processor.
152 * Running on AP.
153 */
154 void __cpuinit smp_callin(void)
155 {
156 int cpuid, phys_id;
157 unsigned long timeout;
158
159 /*
160 * If waken up by an INIT in an 82489DX configuration
161 * we may get here before an INIT-deassert IPI reaches
162 * our local APIC. We have to wait for the IPI or we'll
163 * lock up on an APIC access.
164 */
165 while (!atomic_read(&init_deasserted))
166 cpu_relax();
167
168 /*
169 * (This works even if the APIC is not enabled.)
170 */
171 phys_id = GET_APIC_ID(apic_read(APIC_ID));
172 cpuid = smp_processor_id();
173 if (cpu_isset(cpuid, cpu_callin_map)) {
174 panic("smp_callin: phys CPU#%d, CPU#%d already present??\n",
175 phys_id, cpuid);
176 }
177 Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
178
179 /*
180 * STARTUP IPIs are fragile beasts as they might sometimes
181 * trigger some glue motherboard logic. Complete APIC bus
182 * silence for 1 second, this overestimates the time the
183 * boot CPU is spending to send the up to 2 STARTUP IPIs
184 * by a factor of two. This should be enough.
185 */
186
187 /*
188 * Waiting 2s total for startup (udelay is not yet working)
189 */
190 timeout = jiffies + 2*HZ;
191 while (time_before(jiffies, timeout)) {
192 /*
193 * Has the boot CPU finished it's STARTUP sequence?
194 */
195 if (cpu_isset(cpuid, cpu_callout_map))
196 break;
197 cpu_relax();
198 }
199
200 if (!time_before(jiffies, timeout)) {
201 panic("smp_callin: CPU%d started up but did not get a callout!\n",
202 cpuid);
203 }
204
205 /*
206 * the boot CPU has finished the init stage and is spinning
207 * on callin_map until we finish. We are free to set up this
208 * CPU, first the APIC. (this is probably redundant on most
209 * boards)
210 */
211
212 Dprintk("CALLIN, before setup_local_APIC().\n");
213 setup_local_APIC();
214
215 /*
216 * Get our bogomips.
217 *
218 * Need to enable IRQs because it can take longer and then
219 * the NMI watchdog might kill us.
220 */
221 local_irq_enable();
222 calibrate_delay();
223 local_irq_disable();
224 Dprintk("Stack at about %p\n",&cpuid);
225
226 /*
227 * Save our processor parameters
228 */
229 smp_store_cpu_info(cpuid);
230
231 /*
232 * Allow the master to continue.
233 */
234 cpu_set(cpuid, cpu_callin_map);
235 }
236
237 /* maps the cpu to the sched domain representing multi-core */
238 cpumask_t cpu_coregroup_map(int cpu)
239 {
240 struct cpuinfo_x86 *c = cpu_data + cpu;
241 /*
242 * For perf, we return last level cache shared map.
243 * And for power savings, we return cpu_core_map
244 */
245 if (sched_mc_power_savings || sched_smt_power_savings)
246 return cpu_core_map[cpu];
247 else
248 return c->llc_shared_map;
249 }
250
251 /* representing cpus for which sibling maps can be computed */
252 static cpumask_t cpu_sibling_setup_map;
253
254 static inline void set_cpu_sibling_map(int cpu)
255 {
256 int i;
257 struct cpuinfo_x86 *c = cpu_data;
258
259 cpu_set(cpu, cpu_sibling_setup_map);
260
261 if (smp_num_siblings > 1) {
262 for_each_cpu_mask(i, cpu_sibling_setup_map) {
263 if (c[cpu].phys_proc_id == c[i].phys_proc_id &&
264 c[cpu].cpu_core_id == c[i].cpu_core_id) {
265 cpu_set(i, cpu_sibling_map[cpu]);
266 cpu_set(cpu, cpu_sibling_map[i]);
267 cpu_set(i, cpu_core_map[cpu]);
268 cpu_set(cpu, cpu_core_map[i]);
269 cpu_set(i, c[cpu].llc_shared_map);
270 cpu_set(cpu, c[i].llc_shared_map);
271 }
272 }
273 } else {
274 cpu_set(cpu, cpu_sibling_map[cpu]);
275 }
276
277 cpu_set(cpu, c[cpu].llc_shared_map);
278
279 if (current_cpu_data.x86_max_cores == 1) {
280 cpu_core_map[cpu] = cpu_sibling_map[cpu];
281 c[cpu].booted_cores = 1;
282 return;
283 }
284
285 for_each_cpu_mask(i, cpu_sibling_setup_map) {
286 if (cpu_llc_id[cpu] != BAD_APICID &&
287 cpu_llc_id[cpu] == cpu_llc_id[i]) {
288 cpu_set(i, c[cpu].llc_shared_map);
289 cpu_set(cpu, c[i].llc_shared_map);
290 }
291 if (c[cpu].phys_proc_id == c[i].phys_proc_id) {
292 cpu_set(i, cpu_core_map[cpu]);
293 cpu_set(cpu, cpu_core_map[i]);
294 /*
295 * Does this new cpu bringup a new core?
296 */
297 if (cpus_weight(cpu_sibling_map[cpu]) == 1) {
298 /*
299 * for each core in package, increment
300 * the booted_cores for this new cpu
301 */
302 if (first_cpu(cpu_sibling_map[i]) == i)
303 c[cpu].booted_cores++;
304 /*
305 * increment the core count for all
306 * the other cpus in this package
307 */
308 if (i != cpu)
309 c[i].booted_cores++;
310 } else if (i != cpu && !c[cpu].booted_cores)
311 c[cpu].booted_cores = c[i].booted_cores;
312 }
313 }
314 }
315
316 /*
317 * Setup code on secondary processor (after comming out of the trampoline)
318 */
319 void __cpuinit start_secondary(void)
320 {
321 /*
322 * Dont put anything before smp_callin(), SMP
323 * booting is too fragile that we want to limit the
324 * things done here to the most necessary things.
325 */
326 cpu_init();
327 preempt_disable();
328 smp_callin();
329
330 /* otherwise gcc will move up the smp_processor_id before the cpu_init */
331 barrier();
332
333 /*
334 * Check TSC sync first:
335 */
336 check_tsc_sync_target();
337
338 if (nmi_watchdog == NMI_IO_APIC) {
339 disable_8259A_irq(0);
340 enable_NMI_through_LVT0(NULL);
341 enable_8259A_irq(0);
342 }
343
344 /*
345 * The sibling maps must be set before turing the online map on for
346 * this cpu
347 */
348 set_cpu_sibling_map(smp_processor_id());
349
350 /*
351 * We need to hold call_lock, so there is no inconsistency
352 * between the time smp_call_function() determines number of
353 * IPI receipients, and the time when the determination is made
354 * for which cpus receive the IPI in genapic_flat.c. Holding this
355 * lock helps us to not include this cpu in a currently in progress
356 * smp_call_function().
357 */
358 lock_ipi_call_lock();
359 spin_lock(&vector_lock);
360
361 /* Setup the per cpu irq handling data structures */
362 __setup_vector_irq(smp_processor_id());
363 /*
364 * Allow the master to continue.
365 */
366 cpu_set(smp_processor_id(), cpu_online_map);
367 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
368 spin_unlock(&vector_lock);
369
370 unlock_ipi_call_lock();
371
372 setup_secondary_APIC_clock();
373
374 cpu_idle();
375 }
376
377 extern volatile unsigned long init_rsp;
378 extern void (*initial_code)(void);
379
380 #ifdef APIC_DEBUG
381 static void inquire_remote_apic(int apicid)
382 {
383 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
384 char *names[] = { "ID", "VERSION", "SPIV" };
385 int timeout;
386 unsigned int status;
387
388 printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
389
390 for (i = 0; i < sizeof(regs) / sizeof(*regs); i++) {
391 printk("... APIC #%d %s: ", apicid, names[i]);
392
393 /*
394 * Wait for idle.
395 */
396 status = safe_apic_wait_icr_idle();
397 if (status)
398 printk("a previous APIC delivery may have failed\n");
399
400 apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
401 apic_write(APIC_ICR, APIC_DM_REMRD | regs[i]);
402
403 timeout = 0;
404 do {
405 udelay(100);
406 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
407 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
408
409 switch (status) {
410 case APIC_ICR_RR_VALID:
411 status = apic_read(APIC_RRR);
412 printk("%08x\n", status);
413 break;
414 default:
415 printk("failed\n");
416 }
417 }
418 }
419 #endif
420
421 /*
422 * Kick the secondary to wake up.
423 */
424 static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int start_rip)
425 {
426 unsigned long send_status, accept_status = 0;
427 int maxlvt, num_starts, j;
428
429 Dprintk("Asserting INIT.\n");
430
431 /*
432 * Turn INIT on target chip
433 */
434 apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
435
436 /*
437 * Send IPI
438 */
439 apic_write(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
440 | APIC_DM_INIT);
441
442 Dprintk("Waiting for send to finish...\n");
443 send_status = safe_apic_wait_icr_idle();
444
445 mdelay(10);
446
447 Dprintk("Deasserting INIT.\n");
448
449 /* Target chip */
450 apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
451
452 /* Send IPI */
453 apic_write(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
454
455 Dprintk("Waiting for send to finish...\n");
456 send_status = safe_apic_wait_icr_idle();
457
458 mb();
459 atomic_set(&init_deasserted, 1);
460
461 num_starts = 2;
462
463 /*
464 * Run STARTUP IPI loop.
465 */
466 Dprintk("#startup loops: %d.\n", num_starts);
467
468 maxlvt = get_maxlvt();
469
470 for (j = 1; j <= num_starts; j++) {
471 Dprintk("Sending STARTUP #%d.\n",j);
472 apic_write(APIC_ESR, 0);
473 apic_read(APIC_ESR);
474 Dprintk("After apic_write.\n");
475
476 /*
477 * STARTUP IPI
478 */
479
480 /* Target chip */
481 apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
482
483 /* Boot on the stack */
484 /* Kick the second */
485 apic_write(APIC_ICR, APIC_DM_STARTUP | (start_rip >> 12));
486
487 /*
488 * Give the other CPU some time to accept the IPI.
489 */
490 udelay(300);
491
492 Dprintk("Startup point 1.\n");
493
494 Dprintk("Waiting for send to finish...\n");
495 send_status = safe_apic_wait_icr_idle();
496
497 /*
498 * Give the other CPU some time to accept the IPI.
499 */
500 udelay(200);
501 /*
502 * Due to the Pentium erratum 3AP.
503 */
504 if (maxlvt > 3) {
505 apic_write(APIC_ESR, 0);
506 }
507 accept_status = (apic_read(APIC_ESR) & 0xEF);
508 if (send_status || accept_status)
509 break;
510 }
511 Dprintk("After Startup.\n");
512
513 if (send_status)
514 printk(KERN_ERR "APIC never delivered???\n");
515 if (accept_status)
516 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
517
518 return (send_status | accept_status);
519 }
520
521 struct create_idle {
522 struct work_struct work;
523 struct task_struct *idle;
524 struct completion done;
525 int cpu;
526 };
527
528 void do_fork_idle(struct work_struct *work)
529 {
530 struct create_idle *c_idle =
531 container_of(work, struct create_idle, work);
532
533 c_idle->idle = fork_idle(c_idle->cpu);
534 complete(&c_idle->done);
535 }
536
537 /*
538 * Boot one CPU.
539 */
540 static int __cpuinit do_boot_cpu(int cpu, int apicid)
541 {
542 unsigned long boot_error;
543 int timeout;
544 unsigned long start_rip;
545 struct create_idle c_idle = {
546 .work = __WORK_INITIALIZER(c_idle.work, do_fork_idle),
547 .cpu = cpu,
548 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
549 };
550
551 /* allocate memory for gdts of secondary cpus. Hotplug is considered */
552 if (!cpu_gdt_descr[cpu].address &&
553 !(cpu_gdt_descr[cpu].address = get_zeroed_page(GFP_KERNEL))) {
554 printk(KERN_ERR "Failed to allocate GDT for CPU %d\n", cpu);
555 return -1;
556 }
557
558 /* Allocate node local memory for AP pdas */
559 if (cpu_pda(cpu) == &boot_cpu_pda[cpu]) {
560 struct x8664_pda *newpda, *pda;
561 int node = cpu_to_node(cpu);
562 pda = cpu_pda(cpu);
563 newpda = kmalloc_node(sizeof (struct x8664_pda), GFP_ATOMIC,
564 node);
565 if (newpda) {
566 memcpy(newpda, pda, sizeof (struct x8664_pda));
567 cpu_pda(cpu) = newpda;
568 } else
569 printk(KERN_ERR
570 "Could not allocate node local PDA for CPU %d on node %d\n",
571 cpu, node);
572 }
573
574 alternatives_smp_switch(1);
575
576 c_idle.idle = get_idle_for_cpu(cpu);
577
578 if (c_idle.idle) {
579 c_idle.idle->thread.rsp = (unsigned long) (((struct pt_regs *)
580 (THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
581 init_idle(c_idle.idle, cpu);
582 goto do_rest;
583 }
584
585 /*
586 * During cold boot process, keventd thread is not spun up yet.
587 * When we do cpu hot-add, we create idle threads on the fly, we should
588 * not acquire any attributes from the calling context. Hence the clean
589 * way to create kernel_threads() is to do that from keventd().
590 * We do the current_is_keventd() due to the fact that ACPI notifier
591 * was also queuing to keventd() and when the caller is already running
592 * in context of keventd(), we would end up with locking up the keventd
593 * thread.
594 */
595 if (!keventd_up() || current_is_keventd())
596 c_idle.work.func(&c_idle.work);
597 else {
598 schedule_work(&c_idle.work);
599 wait_for_completion(&c_idle.done);
600 }
601
602 if (IS_ERR(c_idle.idle)) {
603 printk("failed fork for CPU %d\n", cpu);
604 return PTR_ERR(c_idle.idle);
605 }
606
607 set_idle_for_cpu(cpu, c_idle.idle);
608
609 do_rest:
610
611 cpu_pda(cpu)->pcurrent = c_idle.idle;
612
613 start_rip = setup_trampoline();
614
615 init_rsp = c_idle.idle->thread.rsp;
616 per_cpu(init_tss,cpu).rsp0 = init_rsp;
617 initial_code = start_secondary;
618 clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
619
620 printk(KERN_INFO "Booting processor %d/%d APIC 0x%x\n", cpu,
621 cpus_weight(cpu_present_map),
622 apicid);
623
624 /*
625 * This grunge runs the startup process for
626 * the targeted processor.
627 */
628
629 atomic_set(&init_deasserted, 0);
630
631 Dprintk("Setting warm reset code and vector.\n");
632
633 CMOS_WRITE(0xa, 0xf);
634 local_flush_tlb();
635 Dprintk("1.\n");
636 *((volatile unsigned short *) phys_to_virt(0x469)) = start_rip >> 4;
637 Dprintk("2.\n");
638 *((volatile unsigned short *) phys_to_virt(0x467)) = start_rip & 0xf;
639 Dprintk("3.\n");
640
641 /*
642 * Be paranoid about clearing APIC errors.
643 */
644 apic_write(APIC_ESR, 0);
645 apic_read(APIC_ESR);
646
647 /*
648 * Status is now clean
649 */
650 boot_error = 0;
651
652 /*
653 * Starting actual IPI sequence...
654 */
655 boot_error = wakeup_secondary_via_INIT(apicid, start_rip);
656
657 if (!boot_error) {
658 /*
659 * allow APs to start initializing.
660 */
661 Dprintk("Before Callout %d.\n", cpu);
662 cpu_set(cpu, cpu_callout_map);
663 Dprintk("After Callout %d.\n", cpu);
664
665 /*
666 * Wait 5s total for a response
667 */
668 for (timeout = 0; timeout < 50000; timeout++) {
669 if (cpu_isset(cpu, cpu_callin_map))
670 break; /* It has booted */
671 udelay(100);
672 }
673
674 if (cpu_isset(cpu, cpu_callin_map)) {
675 /* number CPUs logically, starting from 1 (BSP is 0) */
676 Dprintk("CPU has booted.\n");
677 } else {
678 boot_error = 1;
679 if (*((volatile unsigned char *)phys_to_virt(SMP_TRAMPOLINE_BASE))
680 == 0xA5)
681 /* trampoline started but...? */
682 printk("Stuck ??\n");
683 else
684 /* trampoline code not run */
685 printk("Not responding.\n");
686 #ifdef APIC_DEBUG
687 inquire_remote_apic(apicid);
688 #endif
689 }
690 }
691 if (boot_error) {
692 cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */
693 clear_bit(cpu, &cpu_initialized); /* was set by cpu_init() */
694 clear_node_cpumask(cpu); /* was set by numa_add_cpu */
695 cpu_clear(cpu, cpu_present_map);
696 cpu_clear(cpu, cpu_possible_map);
697 x86_cpu_to_apicid[cpu] = BAD_APICID;
698 x86_cpu_to_log_apicid[cpu] = BAD_APICID;
699 return -EIO;
700 }
701
702 return 0;
703 }
704
705 cycles_t cacheflush_time;
706 unsigned long cache_decay_ticks;
707
708 /*
709 * Cleanup possible dangling ends...
710 */
711 static __cpuinit void smp_cleanup_boot(void)
712 {
713 /*
714 * Paranoid: Set warm reset code and vector here back
715 * to default values.
716 */
717 CMOS_WRITE(0, 0xf);
718
719 /*
720 * Reset trampoline flag
721 */
722 *((volatile int *) phys_to_virt(0x467)) = 0;
723 }
724
725 /*
726 * Fall back to non SMP mode after errors.
727 *
728 * RED-PEN audit/test this more. I bet there is more state messed up here.
729 */
730 static __init void disable_smp(void)
731 {
732 cpu_present_map = cpumask_of_cpu(0);
733 cpu_possible_map = cpumask_of_cpu(0);
734 if (smp_found_config)
735 phys_cpu_present_map = physid_mask_of_physid(boot_cpu_id);
736 else
737 phys_cpu_present_map = physid_mask_of_physid(0);
738 cpu_set(0, cpu_sibling_map[0]);
739 cpu_set(0, cpu_core_map[0]);
740 }
741
742 #ifdef CONFIG_HOTPLUG_CPU
743
744 int additional_cpus __initdata = -1;
745
746 /*
747 * cpu_possible_map should be static, it cannot change as cpu's
748 * are onlined, or offlined. The reason is per-cpu data-structures
749 * are allocated by some modules at init time, and dont expect to
750 * do this dynamically on cpu arrival/departure.
751 * cpu_present_map on the other hand can change dynamically.
752 * In case when cpu_hotplug is not compiled, then we resort to current
753 * behaviour, which is cpu_possible == cpu_present.
754 * - Ashok Raj
755 *
756 * Three ways to find out the number of additional hotplug CPUs:
757 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
758 * - The user can overwrite it with additional_cpus=NUM
759 * - Otherwise don't reserve additional CPUs.
760 * We do this because additional CPUs waste a lot of memory.
761 * -AK
762 */
763 __init void prefill_possible_map(void)
764 {
765 int i;
766 int possible;
767
768 if (additional_cpus == -1) {
769 if (disabled_cpus > 0)
770 additional_cpus = disabled_cpus;
771 else
772 additional_cpus = 0;
773 }
774 possible = num_processors + additional_cpus;
775 if (possible > NR_CPUS)
776 possible = NR_CPUS;
777
778 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n",
779 possible,
780 max_t(int, possible - num_processors, 0));
781
782 for (i = 0; i < possible; i++)
783 cpu_set(i, cpu_possible_map);
784 }
785 #endif
786
787 /*
788 * Various sanity checks.
789 */
790 static int __init smp_sanity_check(unsigned max_cpus)
791 {
792 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
793 printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
794 hard_smp_processor_id());
795 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
796 }
797
798 /*
799 * If we couldn't find an SMP configuration at boot time,
800 * get out of here now!
801 */
802 if (!smp_found_config) {
803 printk(KERN_NOTICE "SMP motherboard not detected.\n");
804 disable_smp();
805 if (APIC_init_uniprocessor())
806 printk(KERN_NOTICE "Local APIC not detected."
807 " Using dummy APIC emulation.\n");
808 return -1;
809 }
810
811 /*
812 * Should not be necessary because the MP table should list the boot
813 * CPU too, but we do it for the sake of robustness anyway.
814 */
815 if (!physid_isset(boot_cpu_id, phys_cpu_present_map)) {
816 printk(KERN_NOTICE "weird, boot CPU (#%d) not listed by the BIOS.\n",
817 boot_cpu_id);
818 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
819 }
820
821 /*
822 * If we couldn't find a local APIC, then get out of here now!
823 */
824 if (!cpu_has_apic) {
825 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
826 boot_cpu_id);
827 printk(KERN_ERR "... forcing use of dummy APIC emulation. (tell your hw vendor)\n");
828 nr_ioapics = 0;
829 return -1;
830 }
831
832 /*
833 * If SMP should be disabled, then really disable it!
834 */
835 if (!max_cpus) {
836 printk(KERN_INFO "SMP mode deactivated, forcing use of dummy APIC emulation.\n");
837 nr_ioapics = 0;
838 return -1;
839 }
840
841 return 0;
842 }
843
844 /*
845 * Prepare for SMP bootup. The MP table or ACPI has been read
846 * earlier. Just do some sanity checking here and enable APIC mode.
847 */
848 void __init smp_prepare_cpus(unsigned int max_cpus)
849 {
850 nmi_watchdog_default();
851 current_cpu_data = boot_cpu_data;
852 current_thread_info()->cpu = 0; /* needed? */
853 set_cpu_sibling_map(0);
854
855 if (smp_sanity_check(max_cpus) < 0) {
856 printk(KERN_INFO "SMP disabled\n");
857 disable_smp();
858 return;
859 }
860
861
862 /*
863 * Switch from PIC to APIC mode.
864 */
865 setup_local_APIC();
866
867 if (GET_APIC_ID(apic_read(APIC_ID)) != boot_cpu_id) {
868 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
869 GET_APIC_ID(apic_read(APIC_ID)), boot_cpu_id);
870 /* Or can we switch back to PIC here? */
871 }
872
873 /*
874 * Now start the IO-APICs
875 */
876 if (!skip_ioapic_setup && nr_ioapics)
877 setup_IO_APIC();
878 else
879 nr_ioapics = 0;
880
881 /*
882 * Set up local APIC timer on boot CPU.
883 */
884
885 setup_boot_APIC_clock();
886 }
887
888 /*
889 * Early setup to make printk work.
890 */
891 void __init smp_prepare_boot_cpu(void)
892 {
893 int me = smp_processor_id();
894 cpu_set(me, cpu_online_map);
895 cpu_set(me, cpu_callout_map);
896 per_cpu(cpu_state, me) = CPU_ONLINE;
897 }
898
899 /*
900 * Entry point to boot a CPU.
901 */
902 int __cpuinit __cpu_up(unsigned int cpu)
903 {
904 int apicid = cpu_present_to_apicid(cpu);
905 unsigned long flags;
906 int err;
907
908 WARN_ON(irqs_disabled());
909
910 Dprintk("++++++++++++++++++++=_---CPU UP %u\n", cpu);
911
912 if (apicid == BAD_APICID || apicid == boot_cpu_id ||
913 !physid_isset(apicid, phys_cpu_present_map)) {
914 printk("__cpu_up: bad cpu %d\n", cpu);
915 return -EINVAL;
916 }
917
918 /*
919 * Already booted CPU?
920 */
921 if (cpu_isset(cpu, cpu_callin_map)) {
922 Dprintk("do_boot_cpu %d Already started\n", cpu);
923 return -ENOSYS;
924 }
925
926 /*
927 * Save current MTRR state in case it was changed since early boot
928 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
929 */
930 mtrr_save_state();
931
932 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
933 /* Boot it! */
934 err = do_boot_cpu(cpu, apicid);
935 if (err < 0) {
936 Dprintk("do_boot_cpu failed %d\n", err);
937 return err;
938 }
939
940 /* Unleash the CPU! */
941 Dprintk("waiting for cpu %d\n", cpu);
942
943 /*
944 * Make sure and check TSC sync:
945 */
946 local_irq_save(flags);
947 check_tsc_sync_source(cpu);
948 local_irq_restore(flags);
949
950 while (!cpu_isset(cpu, cpu_online_map))
951 cpu_relax();
952 err = 0;
953
954 return err;
955 }
956
957 /*
958 * Finish the SMP boot.
959 */
960 void __init smp_cpus_done(unsigned int max_cpus)
961 {
962 smp_cleanup_boot();
963 setup_ioapic_dest();
964 check_nmi_watchdog();
965 }
966
967 #ifdef CONFIG_HOTPLUG_CPU
968
969 static void remove_siblinginfo(int cpu)
970 {
971 int sibling;
972 struct cpuinfo_x86 *c = cpu_data;
973
974 for_each_cpu_mask(sibling, cpu_core_map[cpu]) {
975 cpu_clear(cpu, cpu_core_map[sibling]);
976 /*
977 * last thread sibling in this cpu core going down
978 */
979 if (cpus_weight(cpu_sibling_map[cpu]) == 1)
980 c[sibling].booted_cores--;
981 }
982
983 for_each_cpu_mask(sibling, cpu_sibling_map[cpu])
984 cpu_clear(cpu, cpu_sibling_map[sibling]);
985 cpus_clear(cpu_sibling_map[cpu]);
986 cpus_clear(cpu_core_map[cpu]);
987 c[cpu].phys_proc_id = 0;
988 c[cpu].cpu_core_id = 0;
989 cpu_clear(cpu, cpu_sibling_setup_map);
990 }
991
992 void remove_cpu_from_maps(void)
993 {
994 int cpu = smp_processor_id();
995
996 cpu_clear(cpu, cpu_callout_map);
997 cpu_clear(cpu, cpu_callin_map);
998 clear_bit(cpu, &cpu_initialized); /* was set by cpu_init() */
999 clear_node_cpumask(cpu);
1000 }
1001
1002 int __cpu_disable(void)
1003 {
1004 int cpu = smp_processor_id();
1005
1006 /*
1007 * Perhaps use cpufreq to drop frequency, but that could go
1008 * into generic code.
1009 *
1010 * We won't take down the boot processor on i386 due to some
1011 * interrupts only being able to be serviced by the BSP.
1012 * Especially so if we're not using an IOAPIC -zwane
1013 */
1014 if (cpu == 0)
1015 return -EBUSY;
1016
1017 if (nmi_watchdog == NMI_LOCAL_APIC)
1018 stop_apic_nmi_watchdog(NULL);
1019 clear_local_APIC();
1020
1021 /*
1022 * HACK:
1023 * Allow any queued timer interrupts to get serviced
1024 * This is only a temporary solution until we cleanup
1025 * fixup_irqs as we do for IA64.
1026 */
1027 local_irq_enable();
1028 mdelay(1);
1029
1030 local_irq_disable();
1031 remove_siblinginfo(cpu);
1032
1033 spin_lock(&vector_lock);
1034 /* It's now safe to remove this processor from the online map */
1035 cpu_clear(cpu, cpu_online_map);
1036 spin_unlock(&vector_lock);
1037 remove_cpu_from_maps();
1038 fixup_irqs(cpu_online_map);
1039 return 0;
1040 }
1041
1042 void __cpu_die(unsigned int cpu)
1043 {
1044 /* We don't do anything here: idle task is faking death itself. */
1045 unsigned int i;
1046
1047 for (i = 0; i < 10; i++) {
1048 /* They ack this in play_dead by setting CPU_DEAD */
1049 if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
1050 printk ("CPU %d is now offline\n", cpu);
1051 if (1 == num_online_cpus())
1052 alternatives_smp_switch(0);
1053 return;
1054 }
1055 msleep(100);
1056 }
1057 printk(KERN_ERR "CPU %u didn't die...\n", cpu);
1058 }
1059
1060 static __init int setup_additional_cpus(char *s)
1061 {
1062 return s && get_option(&s, &additional_cpus) ? 0 : -EINVAL;
1063 }
1064 early_param("additional_cpus", setup_additional_cpus);
1065
1066 #else /* ... !CONFIG_HOTPLUG_CPU */
1067
1068 int __cpu_disable(void)
1069 {
1070 return -ENOSYS;
1071 }
1072
1073 void __cpu_die(unsigned int cpu)
1074 {
1075 /* We said "no" in __cpu_disable */
1076 BUG();
1077 }
1078 #endif /* CONFIG_HOTPLUG_CPU */
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