arch/x86/kernel/time_64.c

   1 /*
   2  *  "High Precision Event Timer" based timekeeping.
   3  *
   4  *  Copyright (c) 1991,1992,1995  Linus Torvalds
   5  *  Copyright (c) 1994  Alan Modra
   6  *  Copyright (c) 1995  Markus Kuhn
   7  *  Copyright (c) 1996  Ingo Molnar
   8  *  Copyright (c) 1998  Andrea Arcangeli
   9  *  Copyright (c) 2002,2006  Vojtech Pavlik
  10  *  Copyright (c) 2003  Andi Kleen
  11  *  RTC support code taken from arch/i386/kernel/timers/time_hpet.c
  12  */
  13
  14 #include <linux/clockchips.h>
  15 #include <linux/init.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/module.h>
  18 #include <linux/time.h>
  19 #include <linux/mca.h>
  20
  21 #include <asm/i8253.h>
  22 #include <asm/hpet.h>
  23 #include <asm/nmi.h>
  24 #include <asm/vgtod.h>
  25 #include <asm/time.h>
  26 #include <asm/timer.h>
  27
  28 volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
  29
  30 unsigned long profile_pc(struct pt_regs *regs)
  31 {
  32         unsigned long pc = instruction_pointer(regs);
  33
  34         /* Assume the lock function has either no stack frame or a copy
  35            of flags from PUSHF
  36            Eflags always has bits 22 and up cleared unlike kernel addresses. */
  37         if (!user_mode_vm(regs) && in_lock_functions(pc)) {
  38 #ifdef CONFIG_FRAME_POINTER
  39                 return *(unsigned long *)(regs->bp + sizeof(long));
  40 #else
  41                 unsigned long *sp = (unsigned long *)regs->sp;
  42                 if (sp[0] >> 22)
  43                         return sp[0];
  44                 if (sp[1] >> 22)
  45                         return sp[1];
  46 #endif
  47         }
  48         return pc;
  49 }
  50 EXPORT_SYMBOL(profile_pc);
  51
  52 irqreturn_t timer_interrupt(int irq, void *dev_id)
  53 {
  54         add_pda(irq0_irqs, 1);
  55
  56         global_clock_event->event_handler(global_clock_event);
  57
  58 #ifdef CONFIG_MCA
  59         if (MCA_bus) {
  60                 u8 irq_v = inb_p(0x61);       /* read the current state */
  61                 outb_p(irq_v|0x80, 0x61);     /* reset the IRQ */
  62         }
  63 #endif
  64
  65         return IRQ_HANDLED;
  66 }
  67
  68 /* calibrate_cpu is used on systems with fixed rate TSCs to determine
  69  * processor frequency */
  70 #define TICK_COUNT 100000000
  71 unsigned long __init calibrate_cpu(void)
  72 {
  73         int tsc_start, tsc_now;
  74         int i, no_ctr_free;
  75         unsigned long evntsel3 = 0, pmc3 = 0, pmc_now = 0;
  76         unsigned long flags;
  77
  78         for (i = 0; i < 4; i++)
  79                 if (avail_to_resrv_perfctr_nmi_bit(i))
  80                         break;
  81         no_ctr_free = (i == 4);
  82         if (no_ctr_free) {
  83                 i = 3;
  84                 rdmsrl(MSR_K7_EVNTSEL3, evntsel3);
  85                 wrmsrl(MSR_K7_EVNTSEL3, 0);
  86                 rdmsrl(MSR_K7_PERFCTR3, pmc3);
  87         } else {
  88                 reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i);
  89                 reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
  90         }
  91         local_irq_save(flags);
  92         /* start measuring cycles, incrementing from 0 */
  93         wrmsrl(MSR_K7_PERFCTR0 + i, 0);
  94         wrmsrl(MSR_K7_EVNTSEL0 + i, 1 << 22 | 3 << 16 | 0x76);
  95         rdtscl(tsc_start);
  96         do {
  97                 rdmsrl(MSR_K7_PERFCTR0 + i, pmc_now);
  98                 tsc_now = get_cycles();
  99         } while ((tsc_now - tsc_start) < TICK_COUNT);
 100
 101         local_irq_restore(flags);
 102         if (no_ctr_free) {
 103                 wrmsrl(MSR_K7_EVNTSEL3, 0);
 104                 wrmsrl(MSR_K7_PERFCTR3, pmc3);
 105                 wrmsrl(MSR_K7_EVNTSEL3, evntsel3);
 106         } else {
 107                 release_perfctr_nmi(MSR_K7_PERFCTR0 + i);
 108                 release_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
 109         }
 110
 111         return pmc_now * tsc_khz / (tsc_now - tsc_start);
 112 }
 113
 114 static struct irqaction irq0 = {
 115         .handler        = timer_interrupt,
 116         .flags          = IRQF_DISABLED | IRQF_IRQPOLL | IRQF_NOBALANCING,
 117         .mask           = CPU_MASK_NONE,
 118         .name           = "timer"
 119 };
 120
 121 void __init hpet_time_init(void)
 122 {
 123         if (!hpet_enable())
 124                 setup_pit_timer();
 125
 126         irq0.mask = cpumask_of_cpu(0);
 127         setup_irq(0, &irq0);
 128 }
 129
 130 void __init time_init(void)
 131 {
 132         tsc_init();
 133         if (cpu_has(&boot_cpu_data, X86_FEATURE_RDTSCP))
 134                 vgetcpu_mode = VGETCPU_RDTSCP;
 135         else
 136                 vgetcpu_mode = VGETCPU_LSL;
 137
 138         late_time_init = choose_time_init();
 139 }