076739863d24bd664f2dad06f96e839651a2f863
[deliverable/linux.git] / arch / x86 / kernel / traps_32.c
1 /*
2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
4 *
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
8
9 /*
10 * Handle hardware traps and faults.
11 */
12 #include <linux/interrupt.h>
13 #include <linux/kallsyms.h>
14 #include <linux/spinlock.h>
15 #include <linux/kprobes.h>
16 #include <linux/uaccess.h>
17 #include <linux/utsname.h>
18 #include <linux/kdebug.h>
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/ptrace.h>
22 #include <linux/string.h>
23 #include <linux/unwind.h>
24 #include <linux/delay.h>
25 #include <linux/errno.h>
26 #include <linux/kexec.h>
27 #include <linux/sched.h>
28 #include <linux/timer.h>
29 #include <linux/init.h>
30 #include <linux/bug.h>
31 #include <linux/nmi.h>
32 #include <linux/mm.h>
33 #include <linux/smp.h>
34 #include <linux/io.h>
35
36 #ifdef CONFIG_EISA
37 #include <linux/ioport.h>
38 #include <linux/eisa.h>
39 #endif
40
41 #ifdef CONFIG_MCA
42 #include <linux/mca.h>
43 #endif
44
45 #if defined(CONFIG_EDAC)
46 #include <linux/edac.h>
47 #endif
48
49 #include <asm/stacktrace.h>
50 #include <asm/processor.h>
51 #include <asm/kmemcheck.h>
52 #include <asm/debugreg.h>
53 #include <asm/atomic.h>
54 #include <asm/system.h>
55 #include <asm/unwind.h>
56 #include <asm/traps.h>
57 #include <asm/desc.h>
58 #include <asm/i387.h>
59
60 #include <mach_traps.h>
61
62 #include <asm/processor-flags.h>
63 #include <asm/arch_hooks.h>
64 #include <asm/nmi.h>
65 #include <asm/smp.h>
66 #include <asm/io.h>
67 #include <asm/traps.h>
68
69 #include "cpu/mcheck/mce.h"
70
71 DECLARE_BITMAP(used_vectors, NR_VECTORS);
72 EXPORT_SYMBOL_GPL(used_vectors);
73
74 asmlinkage int system_call(void);
75
76 /* Do we ignore FPU interrupts ? */
77 char ignore_fpu_irq;
78
79 /*
80 * The IDT has to be page-aligned to simplify the Pentium
81 * F0 0F bug workaround.. We have a special link segment
82 * for this.
83 */
84 gate_desc idt_table[256]
85 __attribute__((__section__(".data.idt"))) = { { { { 0, 0 } } }, };
86
87 static int ignore_nmis;
88
89 static inline void conditional_sti(struct pt_regs *regs)
90 {
91 if (regs->flags & X86_EFLAGS_IF)
92 local_irq_enable();
93 }
94
95 static inline void preempt_conditional_sti(struct pt_regs *regs)
96 {
97 inc_preempt_count();
98 if (regs->flags & X86_EFLAGS_IF)
99 local_irq_enable();
100 }
101
102 static inline void preempt_conditional_cli(struct pt_regs *regs)
103 {
104 if (regs->flags & X86_EFLAGS_IF)
105 local_irq_disable();
106 dec_preempt_count();
107 }
108
109 static inline void
110 die_if_kernel(const char *str, struct pt_regs *regs, long err)
111 {
112 if (!user_mode_vm(regs))
113 die(str, regs, err);
114 }
115
116 /*
117 * Perform the lazy TSS's I/O bitmap copy. If the TSS has an
118 * invalid offset set (the LAZY one) and the faulting thread has
119 * a valid I/O bitmap pointer, we copy the I/O bitmap in the TSS,
120 * we set the offset field correctly and return 1.
121 */
122 static int lazy_iobitmap_copy(void)
123 {
124 struct thread_struct *thread;
125 struct tss_struct *tss;
126 int cpu;
127
128 cpu = get_cpu();
129 tss = &per_cpu(init_tss, cpu);
130 thread = &current->thread;
131
132 if (tss->x86_tss.io_bitmap_base == INVALID_IO_BITMAP_OFFSET_LAZY &&
133 thread->io_bitmap_ptr) {
134 memcpy(tss->io_bitmap, thread->io_bitmap_ptr,
135 thread->io_bitmap_max);
136 /*
137 * If the previously set map was extending to higher ports
138 * than the current one, pad extra space with 0xff (no access).
139 */
140 if (thread->io_bitmap_max < tss->io_bitmap_max) {
141 memset((char *) tss->io_bitmap +
142 thread->io_bitmap_max, 0xff,
143 tss->io_bitmap_max - thread->io_bitmap_max);
144 }
145 tss->io_bitmap_max = thread->io_bitmap_max;
146 tss->x86_tss.io_bitmap_base = IO_BITMAP_OFFSET;
147 tss->io_bitmap_owner = thread;
148 put_cpu();
149
150 return 1;
151 }
152 put_cpu();
153
154 return 0;
155 }
156
157 static void __kprobes
158 do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
159 long error_code, siginfo_t *info)
160 {
161 struct task_struct *tsk = current;
162
163 if (regs->flags & X86_VM_MASK) {
164 /*
165 * traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
166 * On nmi (interrupt 2), do_trap should not be called.
167 */
168 if (trapnr < 6)
169 goto vm86_trap;
170 goto trap_signal;
171 }
172
173 if (!user_mode(regs))
174 goto kernel_trap;
175
176 trap_signal:
177 /*
178 * We want error_code and trap_no set for userspace faults and
179 * kernelspace faults which result in die(), but not
180 * kernelspace faults which are fixed up. die() gives the
181 * process no chance to handle the signal and notice the
182 * kernel fault information, so that won't result in polluting
183 * the information about previously queued, but not yet
184 * delivered, faults. See also do_general_protection below.
185 */
186 tsk->thread.error_code = error_code;
187 tsk->thread.trap_no = trapnr;
188
189 if (info)
190 force_sig_info(signr, info, tsk);
191 else
192 force_sig(signr, tsk);
193 return;
194
195 kernel_trap:
196 if (!fixup_exception(regs)) {
197 tsk->thread.error_code = error_code;
198 tsk->thread.trap_no = trapnr;
199 die(str, regs, error_code);
200 }
201 return;
202
203 vm86_trap:
204 if (handle_vm86_trap((struct kernel_vm86_regs *) regs,
205 error_code, trapnr))
206 goto trap_signal;
207 return;
208 }
209
210 #define DO_ERROR(trapnr, signr, str, name) \
211 dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
212 { \
213 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
214 == NOTIFY_STOP) \
215 return; \
216 conditional_sti(regs); \
217 do_trap(trapnr, signr, str, regs, error_code, NULL); \
218 }
219
220 #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
221 dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
222 { \
223 siginfo_t info; \
224 info.si_signo = signr; \
225 info.si_errno = 0; \
226 info.si_code = sicode; \
227 info.si_addr = (void __user *)siaddr; \
228 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
229 == NOTIFY_STOP) \
230 return; \
231 conditional_sti(regs); \
232 do_trap(trapnr, signr, str, regs, error_code, &info); \
233 }
234
235 DO_ERROR_INFO(0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->ip)
236 DO_ERROR(4, SIGSEGV, "overflow", overflow)
237 DO_ERROR(5, SIGSEGV, "bounds", bounds)
238 DO_ERROR_INFO(6, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, regs->ip)
239 DO_ERROR(9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
240 DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
241 DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
242 DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
243 DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
244
245 dotraplinkage void __kprobes
246 do_general_protection(struct pt_regs *regs, long error_code)
247 {
248 struct task_struct *tsk;
249
250 conditional_sti(regs);
251
252 if (lazy_iobitmap_copy()) {
253 /* restart the faulting instruction */
254 return;
255 }
256
257 if (regs->flags & X86_VM_MASK)
258 goto gp_in_vm86;
259
260 tsk = current;
261 if (!user_mode(regs))
262 goto gp_in_kernel;
263
264 tsk->thread.error_code = error_code;
265 tsk->thread.trap_no = 13;
266
267 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
268 printk_ratelimit()) {
269 printk(KERN_INFO
270 "%s[%d] general protection ip:%lx sp:%lx error:%lx",
271 tsk->comm, task_pid_nr(tsk),
272 regs->ip, regs->sp, error_code);
273 print_vma_addr(" in ", regs->ip);
274 printk("\n");
275 }
276
277 force_sig(SIGSEGV, tsk);
278 return;
279
280 gp_in_vm86:
281 local_irq_enable();
282 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
283 return;
284
285 gp_in_kernel:
286 if (fixup_exception(regs))
287 return;
288
289 tsk->thread.error_code = error_code;
290 tsk->thread.trap_no = 13;
291 if (notify_die(DIE_GPF, "general protection fault", regs,
292 error_code, 13, SIGSEGV) == NOTIFY_STOP)
293 return;
294 die("general protection fault", regs, error_code);
295 }
296
297 static notrace __kprobes void
298 mem_parity_error(unsigned char reason, struct pt_regs *regs)
299 {
300 printk(KERN_EMERG
301 "Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
302 reason, smp_processor_id());
303
304 printk(KERN_EMERG
305 "You have some hardware problem, likely on the PCI bus.\n");
306
307 #if defined(CONFIG_EDAC)
308 if (edac_handler_set()) {
309 edac_atomic_assert_error();
310 return;
311 }
312 #endif
313
314 if (panic_on_unrecovered_nmi)
315 panic("NMI: Not continuing");
316
317 printk(KERN_EMERG "Dazed and confused, but trying to continue\n");
318
319 /* Clear and disable the memory parity error line. */
320 reason = (reason & 0xf) | 4;
321 outb(reason, 0x61);
322 }
323
324 static notrace __kprobes void
325 io_check_error(unsigned char reason, struct pt_regs *regs)
326 {
327 unsigned long i;
328
329 printk(KERN_EMERG "NMI: IOCK error (debug interrupt?)\n");
330 show_registers(regs);
331
332 /* Re-enable the IOCK line, wait for a few seconds */
333 reason = (reason & 0xf) | 8;
334 outb(reason, 0x61);
335
336 i = 2000;
337 while (--i)
338 udelay(1000);
339
340 reason &= ~8;
341 outb(reason, 0x61);
342 }
343
344 static notrace __kprobes void
345 unknown_nmi_error(unsigned char reason, struct pt_regs *regs)
346 {
347 if (notify_die(DIE_NMIUNKNOWN, "nmi", regs, reason, 2, SIGINT) ==
348 NOTIFY_STOP)
349 return;
350 #ifdef CONFIG_MCA
351 /*
352 * Might actually be able to figure out what the guilty party
353 * is:
354 */
355 if (MCA_bus) {
356 mca_handle_nmi();
357 return;
358 }
359 #endif
360 printk(KERN_EMERG
361 "Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
362 reason, smp_processor_id());
363
364 printk(KERN_EMERG "Do you have a strange power saving mode enabled?\n");
365 if (panic_on_unrecovered_nmi)
366 panic("NMI: Not continuing");
367
368 printk(KERN_EMERG "Dazed and confused, but trying to continue\n");
369 }
370
371 static DEFINE_SPINLOCK(nmi_print_lock);
372
373 void notrace __kprobes die_nmi(char *str, struct pt_regs *regs, int do_panic)
374 {
375 if (notify_die(DIE_NMIWATCHDOG, str, regs, 0, 2, SIGINT) == NOTIFY_STOP)
376 return;
377
378 spin_lock(&nmi_print_lock);
379 /*
380 * We are in trouble anyway, lets at least try
381 * to get a message out:
382 */
383 bust_spinlocks(1);
384 printk(KERN_EMERG "%s", str);
385 printk(" on CPU%d, ip %08lx, registers:\n",
386 smp_processor_id(), regs->ip);
387 show_registers(regs);
388 if (do_panic)
389 panic("Non maskable interrupt");
390 console_silent();
391 spin_unlock(&nmi_print_lock);
392 bust_spinlocks(0);
393
394 /*
395 * If we are in kernel we are probably nested up pretty bad
396 * and might aswell get out now while we still can:
397 */
398 if (!user_mode_vm(regs)) {
399 current->thread.trap_no = 2;
400 crash_kexec(regs);
401 }
402
403 do_exit(SIGSEGV);
404 }
405
406 static notrace __kprobes void default_do_nmi(struct pt_regs *regs)
407 {
408 unsigned char reason = 0;
409 int cpu;
410
411 cpu = smp_processor_id();
412
413 /* Only the BSP gets external NMIs from the system. */
414 if (!cpu)
415 reason = get_nmi_reason();
416
417 if (!(reason & 0xc0)) {
418 if (notify_die(DIE_NMI_IPI, "nmi_ipi", regs, reason, 2, SIGINT)
419 == NOTIFY_STOP)
420 return;
421 #ifdef CONFIG_X86_LOCAL_APIC
422 /*
423 * Ok, so this is none of the documented NMI sources,
424 * so it must be the NMI watchdog.
425 */
426 if (nmi_watchdog_tick(regs, reason))
427 return;
428 if (!do_nmi_callback(regs, cpu))
429 unknown_nmi_error(reason, regs);
430 #else
431 unknown_nmi_error(reason, regs);
432 #endif
433
434 return;
435 }
436 if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT) == NOTIFY_STOP)
437 return;
438
439 /* AK: following checks seem to be broken on modern chipsets. FIXME */
440 if (reason & 0x80)
441 mem_parity_error(reason, regs);
442 if (reason & 0x40)
443 io_check_error(reason, regs);
444 /*
445 * Reassert NMI in case it became active meanwhile
446 * as it's edge-triggered:
447 */
448 reassert_nmi();
449 }
450
451 dotraplinkage notrace __kprobes void
452 do_nmi(struct pt_regs *regs, long error_code)
453 {
454 nmi_enter();
455
456 { int cpu; cpu = smp_processor_id(); ++nmi_count(cpu); }
457
458 if (!ignore_nmis)
459 default_do_nmi(regs);
460
461 nmi_exit();
462 }
463
464 void stop_nmi(void)
465 {
466 acpi_nmi_disable();
467 ignore_nmis++;
468 }
469
470 void restart_nmi(void)
471 {
472 ignore_nmis--;
473 acpi_nmi_enable();
474 }
475
476 /* May run on IST stack. */
477 dotraplinkage void __kprobes do_int3(struct pt_regs *regs, long error_code)
478 {
479 #ifdef CONFIG_KPROBES
480 if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
481 == NOTIFY_STOP)
482 return;
483 #else
484 if (notify_die(DIE_TRAP, "int3", regs, error_code, 3, SIGTRAP)
485 == NOTIFY_STOP)
486 return;
487 #endif
488
489 preempt_conditional_sti(regs);
490 do_trap(3, SIGTRAP, "int3", regs, error_code, NULL);
491 preempt_conditional_cli(regs);
492 }
493
494 /*
495 * Our handling of the processor debug registers is non-trivial.
496 * We do not clear them on entry and exit from the kernel. Therefore
497 * it is possible to get a watchpoint trap here from inside the kernel.
498 * However, the code in ./ptrace.c has ensured that the user can
499 * only set watchpoints on userspace addresses. Therefore the in-kernel
500 * watchpoint trap can only occur in code which is reading/writing
501 * from user space. Such code must not hold kernel locks (since it
502 * can equally take a page fault), therefore it is safe to call
503 * force_sig_info even though that claims and releases locks.
504 *
505 * Code in ./signal.c ensures that the debug control register
506 * is restored before we deliver any signal, and therefore that
507 * user code runs with the correct debug control register even though
508 * we clear it here.
509 *
510 * Being careful here means that we don't have to be as careful in a
511 * lot of more complicated places (task switching can be a bit lazy
512 * about restoring all the debug state, and ptrace doesn't have to
513 * find every occurrence of the TF bit that could be saved away even
514 * by user code)
515 *
516 * May run on IST stack.
517 */
518 dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
519 {
520 struct task_struct *tsk = current;
521 unsigned long condition;
522 int si_code;
523
524 get_debugreg(condition, 6);
525
526 /*
527 * The processor cleared BTF, so don't mark that we need it set.
528 */
529 clear_tsk_thread_flag(tsk, TIF_DEBUGCTLMSR);
530 tsk->thread.debugctlmsr = 0;
531
532 if (notify_die(DIE_DEBUG, "debug", regs, condition, error_code,
533 SIGTRAP) == NOTIFY_STOP)
534 return;
535
536 /* It's safe to allow irq's after DR6 has been saved */
537 preempt_conditional_sti(regs);
538
539 /* Mask out spurious debug traps due to lazy DR7 setting */
540 if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) {
541 if (!tsk->thread.debugreg7)
542 goto clear_dr7;
543 }
544
545 if (regs->flags & X86_VM_MASK)
546 goto debug_vm86;
547
548 /* Save debug status register where ptrace can see it */
549 tsk->thread.debugreg6 = condition;
550
551 /*
552 * Single-stepping through TF: make sure we ignore any events in
553 * kernel space (but re-enable TF when returning to user mode).
554 */
555 if (condition & DR_STEP) {
556 if (!user_mode(regs))
557 goto clear_TF_reenable;
558 }
559
560 si_code = get_si_code(condition);
561 /* Ok, finally something we can handle */
562 send_sigtrap(tsk, regs, error_code, si_code);
563
564 /*
565 * Disable additional traps. They'll be re-enabled when
566 * the signal is delivered.
567 */
568 clear_dr7:
569 set_debugreg(0, 7);
570 preempt_conditional_cli(regs);
571 return;
572
573 debug_vm86:
574 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1);
575 preempt_conditional_cli(regs);
576 return;
577
578 clear_TF_reenable:
579 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
580 regs->flags &= ~X86_EFLAGS_TF;
581 preempt_conditional_cli(regs);
582 return;
583 }
584
585 /*
586 * Note that we play around with the 'TS' bit in an attempt to get
587 * the correct behaviour even in the presence of the asynchronous
588 * IRQ13 behaviour
589 */
590 void math_error(void __user *ip)
591 {
592 struct task_struct *task;
593 siginfo_t info;
594 unsigned short cwd, swd;
595
596 /*
597 * Save the info for the exception handler and clear the error.
598 */
599 task = current;
600 save_init_fpu(task);
601 task->thread.trap_no = 16;
602 task->thread.error_code = 0;
603 info.si_signo = SIGFPE;
604 info.si_errno = 0;
605 info.si_code = __SI_FAULT;
606 info.si_addr = ip;
607 /*
608 * (~cwd & swd) will mask out exceptions that are not set to unmasked
609 * status. 0x3f is the exception bits in these regs, 0x200 is the
610 * C1 reg you need in case of a stack fault, 0x040 is the stack
611 * fault bit. We should only be taking one exception at a time,
612 * so if this combination doesn't produce any single exception,
613 * then we have a bad program that isn't synchronizing its FPU usage
614 * and it will suffer the consequences since we won't be able to
615 * fully reproduce the context of the exception
616 */
617 cwd = get_fpu_cwd(task);
618 swd = get_fpu_swd(task);
619 switch (swd & ~cwd & 0x3f) {
620 case 0x000: /* No unmasked exception */
621 return;
622 default: /* Multiple exceptions */
623 break;
624 case 0x001: /* Invalid Op */
625 /*
626 * swd & 0x240 == 0x040: Stack Underflow
627 * swd & 0x240 == 0x240: Stack Overflow
628 * User must clear the SF bit (0x40) if set
629 */
630 info.si_code = FPE_FLTINV;
631 break;
632 case 0x002: /* Denormalize */
633 case 0x010: /* Underflow */
634 info.si_code = FPE_FLTUND;
635 break;
636 case 0x004: /* Zero Divide */
637 info.si_code = FPE_FLTDIV;
638 break;
639 case 0x008: /* Overflow */
640 info.si_code = FPE_FLTOVF;
641 break;
642 case 0x020: /* Precision */
643 info.si_code = FPE_FLTRES;
644 break;
645 }
646 force_sig_info(SIGFPE, &info, task);
647 }
648
649 dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
650 {
651 conditional_sti(regs);
652 ignore_fpu_irq = 1;
653 math_error((void __user *)regs->ip);
654 }
655
656 static void simd_math_error(void __user *ip)
657 {
658 struct task_struct *task;
659 siginfo_t info;
660 unsigned short mxcsr;
661
662 /*
663 * Save the info for the exception handler and clear the error.
664 */
665 task = current;
666 save_init_fpu(task);
667 task->thread.trap_no = 19;
668 task->thread.error_code = 0;
669 info.si_signo = SIGFPE;
670 info.si_errno = 0;
671 info.si_code = __SI_FAULT;
672 info.si_addr = ip;
673 /*
674 * The SIMD FPU exceptions are handled a little differently, as there
675 * is only a single status/control register. Thus, to determine which
676 * unmasked exception was caught we must mask the exception mask bits
677 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
678 */
679 mxcsr = get_fpu_mxcsr(task);
680 switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) {
681 case 0x000:
682 default:
683 break;
684 case 0x001: /* Invalid Op */
685 info.si_code = FPE_FLTINV;
686 break;
687 case 0x002: /* Denormalize */
688 case 0x010: /* Underflow */
689 info.si_code = FPE_FLTUND;
690 break;
691 case 0x004: /* Zero Divide */
692 info.si_code = FPE_FLTDIV;
693 break;
694 case 0x008: /* Overflow */
695 info.si_code = FPE_FLTOVF;
696 break;
697 case 0x020: /* Precision */
698 info.si_code = FPE_FLTRES;
699 break;
700 }
701 force_sig_info(SIGFPE, &info, task);
702 }
703
704 dotraplinkage void
705 do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
706 {
707 conditional_sti(regs);
708
709 if (cpu_has_xmm) {
710 /* Handle SIMD FPU exceptions on PIII+ processors. */
711 ignore_fpu_irq = 1;
712 simd_math_error((void __user *)regs->ip);
713 return;
714 }
715 /*
716 * Handle strange cache flush from user space exception
717 * in all other cases. This is undocumented behaviour.
718 */
719 if (regs->flags & X86_VM_MASK) {
720 handle_vm86_fault((struct kernel_vm86_regs *)regs, error_code);
721 return;
722 }
723 current->thread.trap_no = 19;
724 current->thread.error_code = error_code;
725 die_if_kernel("cache flush denied", regs, error_code);
726 force_sig(SIGSEGV, current);
727 }
728
729 dotraplinkage void
730 do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
731 {
732 conditional_sti(regs);
733 #if 0
734 /* No need to warn about this any longer. */
735 printk(KERN_INFO "Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
736 #endif
737 }
738
739 unsigned long patch_espfix_desc(unsigned long uesp, unsigned long kesp)
740 {
741 struct desc_struct *gdt = get_cpu_gdt_table(smp_processor_id());
742 unsigned long base = (kesp - uesp) & -THREAD_SIZE;
743 unsigned long new_kesp = kesp - base;
744 unsigned long lim_pages = (new_kesp | (THREAD_SIZE - 1)) >> PAGE_SHIFT;
745 __u64 desc = *(__u64 *)&gdt[GDT_ENTRY_ESPFIX_SS];
746
747 /* Set up base for espfix segment */
748 desc &= 0x00f0ff0000000000ULL;
749 desc |= ((((__u64)base) << 16) & 0x000000ffffff0000ULL) |
750 ((((__u64)base) << 32) & 0xff00000000000000ULL) |
751 ((((__u64)lim_pages) << 32) & 0x000f000000000000ULL) |
752 (lim_pages & 0xffff);
753 *(__u64 *)&gdt[GDT_ENTRY_ESPFIX_SS] = desc;
754
755 return new_kesp;
756 }
757
758 /*
759 * 'math_state_restore()' saves the current math information in the
760 * old math state array, and gets the new ones from the current task
761 *
762 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
763 * Don't touch unless you *really* know how it works.
764 *
765 * Must be called with kernel preemption disabled (in this case,
766 * local interrupts are disabled at the call-site in entry.S).
767 */
768 asmlinkage void math_state_restore(void)
769 {
770 struct thread_info *thread = current_thread_info();
771 struct task_struct *tsk = thread->task;
772
773 if (!tsk_used_math(tsk)) {
774 local_irq_enable();
775 /*
776 * does a slab alloc which can sleep
777 */
778 if (init_fpu(tsk)) {
779 /*
780 * ran out of memory!
781 */
782 do_group_exit(SIGKILL);
783 return;
784 }
785 local_irq_disable();
786 }
787
788 clts(); /* Allow maths ops (or we recurse) */
789 restore_fpu(tsk);
790 thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
791 tsk->fpu_counter++;
792 }
793 EXPORT_SYMBOL_GPL(math_state_restore);
794
795 #ifndef CONFIG_MATH_EMULATION
796
797 asmlinkage void math_emulate(long arg)
798 {
799 printk(KERN_EMERG
800 "math-emulation not enabled and no coprocessor found.\n");
801 printk(KERN_EMERG "killing %s.\n", current->comm);
802 force_sig(SIGFPE, current);
803 schedule();
804 }
805
806 #endif /* CONFIG_MATH_EMULATION */
807
808 dotraplinkage void __kprobes
809 do_device_not_available(struct pt_regs *regs, long error)
810 {
811 if (read_cr0() & X86_CR0_EM) {
812 conditional_sti(regs);
813 math_emulate(0);
814 } else {
815 math_state_restore(); /* interrupts still off */
816 conditional_sti(regs);
817 }
818 }
819
820 #ifdef CONFIG_X86_MCE
821 dotraplinkage void __kprobes do_machine_check(struct pt_regs *regs, long error)
822 {
823 conditional_sti(regs);
824 machine_check_vector(regs, error);
825 }
826 #endif
827
828 dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
829 {
830 siginfo_t info;
831 local_irq_enable();
832
833 info.si_signo = SIGILL;
834 info.si_errno = 0;
835 info.si_code = ILL_BADSTK;
836 info.si_addr = 0;
837 if (notify_die(DIE_TRAP, "iret exception",
838 regs, error_code, 32, SIGILL) == NOTIFY_STOP)
839 return;
840 do_trap(32, SIGILL, "iret exception", regs, error_code, &info);
841 }
842
843 void __init trap_init(void)
844 {
845 int i;
846
847 #ifdef CONFIG_EISA
848 void __iomem *p = early_ioremap(0x0FFFD9, 4);
849
850 if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
851 EISA_bus = 1;
852 early_iounmap(p, 4);
853 #endif
854
855 set_intr_gate(0, &divide_error);
856 set_intr_gate_ist(1, &debug, DEBUG_STACK);
857 set_intr_gate_ist(2, &nmi, NMI_STACK);
858 /* int3 can be called from all */
859 set_system_intr_gate_ist(3, &int3, DEBUG_STACK);
860 /* int4 can be called from all */
861 set_system_intr_gate(4, &overflow);
862 set_intr_gate(5, &bounds);
863 set_intr_gate(6, &invalid_op);
864 set_intr_gate(7, &device_not_available);
865 set_task_gate(8, GDT_ENTRY_DOUBLEFAULT_TSS);
866 set_intr_gate(9, &coprocessor_segment_overrun);
867 set_intr_gate(10, &invalid_TSS);
868 set_intr_gate(11, &segment_not_present);
869 set_intr_gate_ist(12, &stack_segment, STACKFAULT_STACK);
870 set_intr_gate(13, &general_protection);
871 set_intr_gate(14, &page_fault);
872 set_intr_gate(15, &spurious_interrupt_bug);
873 set_intr_gate(16, &coprocessor_error);
874 set_intr_gate(17, &alignment_check);
875 #ifdef CONFIG_X86_MCE
876 set_intr_gate_ist(18, &machine_check, MCE_STACK);
877 #endif
878 set_intr_gate(19, &simd_coprocessor_error);
879
880 if (cpu_has_fxsr) {
881 printk(KERN_INFO "Enabling fast FPU save and restore... ");
882 set_in_cr4(X86_CR4_OSFXSR);
883 printk("done.\n");
884 }
885 if (cpu_has_xmm) {
886 printk(KERN_INFO
887 "Enabling unmasked SIMD FPU exception support... ");
888 set_in_cr4(X86_CR4_OSXMMEXCPT);
889 printk("done.\n");
890 }
891
892 set_system_trap_gate(SYSCALL_VECTOR, &system_call);
893
894 /* Reserve all the builtin and the syscall vector: */
895 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
896 set_bit(i, used_vectors);
897
898 set_bit(SYSCALL_VECTOR, used_vectors);
899
900 /*
901 * Should be a barrier for any external CPU state:
902 */
903 cpu_init();
904
905 trap_init_hook();
906 }
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