traps: i386: use preempt_conditional_sti/cli in do_int3
[deliverable/linux.git] / arch / x86 / kernel / traps_32.c
1 /*
2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
4 *
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
8
9 /*
10 * 'Traps.c' handles hardware traps and faults after we have saved some
11 * state in 'asm.s'.
12 */
13 #include <linux/interrupt.h>
14 #include <linux/kallsyms.h>
15 #include <linux/spinlock.h>
16 #include <linux/highmem.h>
17 #include <linux/kprobes.h>
18 #include <linux/uaccess.h>
19 #include <linux/utsname.h>
20 #include <linux/kdebug.h>
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/ptrace.h>
24 #include <linux/string.h>
25 #include <linux/unwind.h>
26 #include <linux/delay.h>
27 #include <linux/errno.h>
28 #include <linux/kexec.h>
29 #include <linux/sched.h>
30 #include <linux/timer.h>
31 #include <linux/init.h>
32 #include <linux/bug.h>
33 #include <linux/nmi.h>
34 #include <linux/mm.h>
35
36 #ifdef CONFIG_EISA
37 #include <linux/ioport.h>
38 #include <linux/eisa.h>
39 #endif
40
41 #ifdef CONFIG_MCA
42 #include <linux/mca.h>
43 #endif
44
45 #if defined(CONFIG_EDAC)
46 #include <linux/edac.h>
47 #endif
48
49 #include <asm/processor-flags.h>
50 #include <asm/arch_hooks.h>
51 #include <asm/stacktrace.h>
52 #include <asm/processor.h>
53 #include <asm/debugreg.h>
54 #include <asm/atomic.h>
55 #include <asm/system.h>
56 #include <asm/unwind.h>
57 #include <asm/desc.h>
58 #include <asm/i387.h>
59 #include <asm/nmi.h>
60 #include <asm/smp.h>
61 #include <asm/io.h>
62 #include <asm/traps.h>
63
64 #include "mach_traps.h"
65 #include "cpu/mcheck/mce.h"
66
67 DECLARE_BITMAP(used_vectors, NR_VECTORS);
68 EXPORT_SYMBOL_GPL(used_vectors);
69
70 asmlinkage int system_call(void);
71
72 /* Do we ignore FPU interrupts ? */
73 char ignore_fpu_irq;
74
75 /*
76 * The IDT has to be page-aligned to simplify the Pentium
77 * F0 0F bug workaround.. We have a special link segment
78 * for this.
79 */
80 gate_desc idt_table[256]
81 __attribute__((__section__(".data.idt"))) = { { { { 0, 0 } } }, };
82
83 static int ignore_nmis;
84
85 static inline void conditional_sti(struct pt_regs *regs)
86 {
87 if (regs->flags & X86_EFLAGS_IF)
88 local_irq_enable();
89 }
90
91 static inline void preempt_conditional_sti(struct pt_regs *regs)
92 {
93 inc_preempt_count();
94 if (regs->flags & X86_EFLAGS_IF)
95 local_irq_enable();
96 }
97
98 static inline void preempt_conditional_cli(struct pt_regs *regs)
99 {
100 if (regs->flags & X86_EFLAGS_IF)
101 local_irq_disable();
102 dec_preempt_count();
103 }
104
105 static inline void
106 die_if_kernel(const char *str, struct pt_regs *regs, long err)
107 {
108 if (!user_mode_vm(regs))
109 die(str, regs, err);
110 }
111
112 /*
113 * Perform the lazy TSS's I/O bitmap copy. If the TSS has an
114 * invalid offset set (the LAZY one) and the faulting thread has
115 * a valid I/O bitmap pointer, we copy the I/O bitmap in the TSS,
116 * we set the offset field correctly and return 1.
117 */
118 static int lazy_iobitmap_copy(void)
119 {
120 struct thread_struct *thread;
121 struct tss_struct *tss;
122 int cpu;
123
124 cpu = get_cpu();
125 tss = &per_cpu(init_tss, cpu);
126 thread = &current->thread;
127
128 if (tss->x86_tss.io_bitmap_base == INVALID_IO_BITMAP_OFFSET_LAZY &&
129 thread->io_bitmap_ptr) {
130 memcpy(tss->io_bitmap, thread->io_bitmap_ptr,
131 thread->io_bitmap_max);
132 /*
133 * If the previously set map was extending to higher ports
134 * than the current one, pad extra space with 0xff (no access).
135 */
136 if (thread->io_bitmap_max < tss->io_bitmap_max) {
137 memset((char *) tss->io_bitmap +
138 thread->io_bitmap_max, 0xff,
139 tss->io_bitmap_max - thread->io_bitmap_max);
140 }
141 tss->io_bitmap_max = thread->io_bitmap_max;
142 tss->x86_tss.io_bitmap_base = IO_BITMAP_OFFSET;
143 tss->io_bitmap_owner = thread;
144 put_cpu();
145
146 return 1;
147 }
148 put_cpu();
149
150 return 0;
151 }
152
153 static void __kprobes
154 do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
155 long error_code, siginfo_t *info)
156 {
157 struct task_struct *tsk = current;
158
159 if (regs->flags & X86_VM_MASK) {
160 /*
161 * traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
162 * On nmi (interrupt 2), do_trap should not be called.
163 */
164 if (trapnr < 6)
165 goto vm86_trap;
166 goto trap_signal;
167 }
168
169 if (!user_mode(regs))
170 goto kernel_trap;
171
172 trap_signal:
173 /*
174 * We want error_code and trap_no set for userspace faults and
175 * kernelspace faults which result in die(), but not
176 * kernelspace faults which are fixed up. die() gives the
177 * process no chance to handle the signal and notice the
178 * kernel fault information, so that won't result in polluting
179 * the information about previously queued, but not yet
180 * delivered, faults. See also do_general_protection below.
181 */
182 tsk->thread.error_code = error_code;
183 tsk->thread.trap_no = trapnr;
184
185 if (info)
186 force_sig_info(signr, info, tsk);
187 else
188 force_sig(signr, tsk);
189 return;
190
191 kernel_trap:
192 if (!fixup_exception(regs)) {
193 tsk->thread.error_code = error_code;
194 tsk->thread.trap_no = trapnr;
195 die(str, regs, error_code);
196 }
197 return;
198
199 vm86_trap:
200 if (handle_vm86_trap((struct kernel_vm86_regs *) regs,
201 error_code, trapnr))
202 goto trap_signal;
203 return;
204 }
205
206 #define DO_ERROR(trapnr, signr, str, name) \
207 dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
208 { \
209 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
210 == NOTIFY_STOP) \
211 return; \
212 conditional_sti(regs); \
213 do_trap(trapnr, signr, str, regs, error_code, NULL); \
214 }
215
216 #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
217 dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
218 { \
219 siginfo_t info; \
220 info.si_signo = signr; \
221 info.si_errno = 0; \
222 info.si_code = sicode; \
223 info.si_addr = (void __user *)siaddr; \
224 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
225 == NOTIFY_STOP) \
226 return; \
227 conditional_sti(regs); \
228 do_trap(trapnr, signr, str, regs, error_code, &info); \
229 }
230
231 DO_ERROR_INFO(0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->ip)
232 DO_ERROR(4, SIGSEGV, "overflow", overflow)
233 DO_ERROR(5, SIGSEGV, "bounds", bounds)
234 DO_ERROR_INFO(6, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, regs->ip)
235 DO_ERROR(9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
236 DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
237 DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
238 DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
239 DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
240
241 dotraplinkage void __kprobes
242 do_general_protection(struct pt_regs *regs, long error_code)
243 {
244 struct task_struct *tsk;
245
246 conditional_sti(regs);
247
248 if (lazy_iobitmap_copy()) {
249 /* restart the faulting instruction */
250 return;
251 }
252
253 if (regs->flags & X86_VM_MASK)
254 goto gp_in_vm86;
255
256 tsk = current;
257 if (!user_mode(regs))
258 goto gp_in_kernel;
259
260 tsk->thread.error_code = error_code;
261 tsk->thread.trap_no = 13;
262
263 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
264 printk_ratelimit()) {
265 printk(KERN_INFO
266 "%s[%d] general protection ip:%lx sp:%lx error:%lx",
267 tsk->comm, task_pid_nr(tsk),
268 regs->ip, regs->sp, error_code);
269 print_vma_addr(" in ", regs->ip);
270 printk("\n");
271 }
272
273 force_sig(SIGSEGV, tsk);
274 return;
275
276 gp_in_vm86:
277 local_irq_enable();
278 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
279 return;
280
281 gp_in_kernel:
282 if (fixup_exception(regs))
283 return;
284
285 tsk->thread.error_code = error_code;
286 tsk->thread.trap_no = 13;
287 if (notify_die(DIE_GPF, "general protection fault", regs,
288 error_code, 13, SIGSEGV) == NOTIFY_STOP)
289 return;
290 die("general protection fault", regs, error_code);
291 }
292
293 static notrace __kprobes void
294 mem_parity_error(unsigned char reason, struct pt_regs *regs)
295 {
296 printk(KERN_EMERG
297 "Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
298 reason, smp_processor_id());
299
300 printk(KERN_EMERG
301 "You have some hardware problem, likely on the PCI bus.\n");
302
303 #if defined(CONFIG_EDAC)
304 if (edac_handler_set()) {
305 edac_atomic_assert_error();
306 return;
307 }
308 #endif
309
310 if (panic_on_unrecovered_nmi)
311 panic("NMI: Not continuing");
312
313 printk(KERN_EMERG "Dazed and confused, but trying to continue\n");
314
315 /* Clear and disable the memory parity error line. */
316 clear_mem_error(reason);
317 }
318
319 static notrace __kprobes void
320 io_check_error(unsigned char reason, struct pt_regs *regs)
321 {
322 unsigned long i;
323
324 printk(KERN_EMERG "NMI: IOCK error (debug interrupt?)\n");
325 show_registers(regs);
326
327 /* Re-enable the IOCK line, wait for a few seconds */
328 reason = (reason & 0xf) | 8;
329 outb(reason, 0x61);
330
331 i = 2000;
332 while (--i)
333 udelay(1000);
334
335 reason &= ~8;
336 outb(reason, 0x61);
337 }
338
339 static notrace __kprobes void
340 unknown_nmi_error(unsigned char reason, struct pt_regs *regs)
341 {
342 if (notify_die(DIE_NMIUNKNOWN, "nmi", regs, reason, 2, SIGINT) == NOTIFY_STOP)
343 return;
344 #ifdef CONFIG_MCA
345 /*
346 * Might actually be able to figure out what the guilty party
347 * is:
348 */
349 if (MCA_bus) {
350 mca_handle_nmi();
351 return;
352 }
353 #endif
354 printk(KERN_EMERG
355 "Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
356 reason, smp_processor_id());
357
358 printk(KERN_EMERG "Do you have a strange power saving mode enabled?\n");
359 if (panic_on_unrecovered_nmi)
360 panic("NMI: Not continuing");
361
362 printk(KERN_EMERG "Dazed and confused, but trying to continue\n");
363 }
364
365 static DEFINE_SPINLOCK(nmi_print_lock);
366
367 void notrace __kprobes die_nmi(char *str, struct pt_regs *regs, int do_panic)
368 {
369 if (notify_die(DIE_NMIWATCHDOG, str, regs, 0, 2, SIGINT) == NOTIFY_STOP)
370 return;
371
372 spin_lock(&nmi_print_lock);
373 /*
374 * We are in trouble anyway, lets at least try
375 * to get a message out:
376 */
377 bust_spinlocks(1);
378 printk(KERN_EMERG "%s", str);
379 printk(" on CPU%d, ip %08lx, registers:\n",
380 smp_processor_id(), regs->ip);
381 show_registers(regs);
382 if (do_panic)
383 panic("Non maskable interrupt");
384 console_silent();
385 spin_unlock(&nmi_print_lock);
386 bust_spinlocks(0);
387
388 /*
389 * If we are in kernel we are probably nested up pretty bad
390 * and might aswell get out now while we still can:
391 */
392 if (!user_mode_vm(regs)) {
393 current->thread.trap_no = 2;
394 crash_kexec(regs);
395 }
396
397 do_exit(SIGSEGV);
398 }
399
400 static notrace __kprobes void default_do_nmi(struct pt_regs *regs)
401 {
402 unsigned char reason = 0;
403 int cpu;
404
405 cpu = smp_processor_id();
406
407 /* Only the BSP gets external NMIs from the system. */
408 if (!cpu)
409 reason = get_nmi_reason();
410
411 if (!(reason & 0xc0)) {
412 if (notify_die(DIE_NMI_IPI, "nmi_ipi", regs, reason, 2, SIGINT)
413 == NOTIFY_STOP)
414 return;
415 #ifdef CONFIG_X86_LOCAL_APIC
416 /*
417 * Ok, so this is none of the documented NMI sources,
418 * so it must be the NMI watchdog.
419 */
420 if (nmi_watchdog_tick(regs, reason))
421 return;
422 if (!do_nmi_callback(regs, cpu))
423 unknown_nmi_error(reason, regs);
424 #else
425 unknown_nmi_error(reason, regs);
426 #endif
427
428 return;
429 }
430 if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT) == NOTIFY_STOP)
431 return;
432
433 /* AK: following checks seem to be broken on modern chipsets. FIXME */
434 if (reason & 0x80)
435 mem_parity_error(reason, regs);
436 if (reason & 0x40)
437 io_check_error(reason, regs);
438 /*
439 * Reassert NMI in case it became active meanwhile
440 * as it's edge-triggered:
441 */
442 reassert_nmi();
443 }
444
445 dotraplinkage notrace __kprobes void
446 do_nmi(struct pt_regs *regs, long error_code)
447 {
448 int cpu;
449
450 nmi_enter();
451
452 cpu = smp_processor_id();
453
454 ++nmi_count(cpu);
455
456 if (!ignore_nmis)
457 default_do_nmi(regs);
458
459 nmi_exit();
460 }
461
462 void stop_nmi(void)
463 {
464 acpi_nmi_disable();
465 ignore_nmis++;
466 }
467
468 void restart_nmi(void)
469 {
470 ignore_nmis--;
471 acpi_nmi_enable();
472 }
473
474 dotraplinkage void __kprobes do_int3(struct pt_regs *regs, long error_code)
475 {
476 #ifdef CONFIG_KPROBES
477 if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
478 == NOTIFY_STOP)
479 return;
480 #else
481 if (notify_die(DIE_TRAP, "int3", regs, error_code, 3, SIGTRAP)
482 == NOTIFY_STOP)
483 return;
484 #endif
485
486 preempt_conditional_sti(regs);
487 do_trap(3, SIGTRAP, "int3", regs, error_code, NULL);
488 preempt_conditional_cli(regs);
489 }
490
491 /*
492 * Our handling of the processor debug registers is non-trivial.
493 * We do not clear them on entry and exit from the kernel. Therefore
494 * it is possible to get a watchpoint trap here from inside the kernel.
495 * However, the code in ./ptrace.c has ensured that the user can
496 * only set watchpoints on userspace addresses. Therefore the in-kernel
497 * watchpoint trap can only occur in code which is reading/writing
498 * from user space. Such code must not hold kernel locks (since it
499 * can equally take a page fault), therefore it is safe to call
500 * force_sig_info even though that claims and releases locks.
501 *
502 * Code in ./signal.c ensures that the debug control register
503 * is restored before we deliver any signal, and therefore that
504 * user code runs with the correct debug control register even though
505 * we clear it here.
506 *
507 * Being careful here means that we don't have to be as careful in a
508 * lot of more complicated places (task switching can be a bit lazy
509 * about restoring all the debug state, and ptrace doesn't have to
510 * find every occurrence of the TF bit that could be saved away even
511 * by user code)
512 */
513 dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
514 {
515 struct task_struct *tsk = current;
516 unsigned long condition;
517 int si_code;
518
519 get_debugreg(condition, 6);
520
521 /*
522 * The processor cleared BTF, so don't mark that we need it set.
523 */
524 clear_tsk_thread_flag(tsk, TIF_DEBUGCTLMSR);
525 tsk->thread.debugctlmsr = 0;
526
527 if (notify_die(DIE_DEBUG, "debug", regs, condition, error_code,
528 SIGTRAP) == NOTIFY_STOP)
529 return;
530
531 /* It's safe to allow irq's after DR6 has been saved */
532 preempt_conditional_sti(regs);
533
534 /* Mask out spurious debug traps due to lazy DR7 setting */
535 if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) {
536 if (!tsk->thread.debugreg7)
537 goto clear_dr7;
538 }
539
540 if (regs->flags & X86_VM_MASK)
541 goto debug_vm86;
542
543 /* Save debug status register where ptrace can see it */
544 tsk->thread.debugreg6 = condition;
545
546 /*
547 * Single-stepping through TF: make sure we ignore any events in
548 * kernel space (but re-enable TF when returning to user mode).
549 */
550 if (condition & DR_STEP) {
551 if (!user_mode(regs))
552 goto clear_TF_reenable;
553 }
554
555 si_code = get_si_code(condition);
556 /* Ok, finally something we can handle */
557 send_sigtrap(tsk, regs, error_code, si_code);
558
559 /*
560 * Disable additional traps. They'll be re-enabled when
561 * the signal is delivered.
562 */
563 clear_dr7:
564 set_debugreg(0, 7);
565 preempt_conditional_cli(regs);
566 return;
567
568 debug_vm86:
569 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1);
570 preempt_conditional_cli(regs);
571 return;
572
573 clear_TF_reenable:
574 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
575 regs->flags &= ~X86_EFLAGS_TF;
576 preempt_conditional_cli(regs);
577 return;
578 }
579
580 /*
581 * Note that we play around with the 'TS' bit in an attempt to get
582 * the correct behaviour even in the presence of the asynchronous
583 * IRQ13 behaviour
584 */
585 void math_error(void __user *ip)
586 {
587 struct task_struct *task;
588 siginfo_t info;
589 unsigned short cwd, swd;
590
591 /*
592 * Save the info for the exception handler and clear the error.
593 */
594 task = current;
595 save_init_fpu(task);
596 task->thread.trap_no = 16;
597 task->thread.error_code = 0;
598 info.si_signo = SIGFPE;
599 info.si_errno = 0;
600 info.si_code = __SI_FAULT;
601 info.si_addr = ip;
602 /*
603 * (~cwd & swd) will mask out exceptions that are not set to unmasked
604 * status. 0x3f is the exception bits in these regs, 0x200 is the
605 * C1 reg you need in case of a stack fault, 0x040 is the stack
606 * fault bit. We should only be taking one exception at a time,
607 * so if this combination doesn't produce any single exception,
608 * then we have a bad program that isn't synchronizing its FPU usage
609 * and it will suffer the consequences since we won't be able to
610 * fully reproduce the context of the exception
611 */
612 cwd = get_fpu_cwd(task);
613 swd = get_fpu_swd(task);
614 switch (swd & ~cwd & 0x3f) {
615 case 0x000: /* No unmasked exception */
616 return;
617 default: /* Multiple exceptions */
618 break;
619 case 0x001: /* Invalid Op */
620 /*
621 * swd & 0x240 == 0x040: Stack Underflow
622 * swd & 0x240 == 0x240: Stack Overflow
623 * User must clear the SF bit (0x40) if set
624 */
625 info.si_code = FPE_FLTINV;
626 break;
627 case 0x002: /* Denormalize */
628 case 0x010: /* Underflow */
629 info.si_code = FPE_FLTUND;
630 break;
631 case 0x004: /* Zero Divide */
632 info.si_code = FPE_FLTDIV;
633 break;
634 case 0x008: /* Overflow */
635 info.si_code = FPE_FLTOVF;
636 break;
637 case 0x020: /* Precision */
638 info.si_code = FPE_FLTRES;
639 break;
640 }
641 force_sig_info(SIGFPE, &info, task);
642 }
643
644 dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
645 {
646 conditional_sti(regs);
647 ignore_fpu_irq = 1;
648 math_error((void __user *)regs->ip);
649 }
650
651 static void simd_math_error(void __user *ip)
652 {
653 struct task_struct *task;
654 siginfo_t info;
655 unsigned short mxcsr;
656
657 /*
658 * Save the info for the exception handler and clear the error.
659 */
660 task = current;
661 save_init_fpu(task);
662 task->thread.trap_no = 19;
663 task->thread.error_code = 0;
664 info.si_signo = SIGFPE;
665 info.si_errno = 0;
666 info.si_code = __SI_FAULT;
667 info.si_addr = ip;
668 /*
669 * The SIMD FPU exceptions are handled a little differently, as there
670 * is only a single status/control register. Thus, to determine which
671 * unmasked exception was caught we must mask the exception mask bits
672 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
673 */
674 mxcsr = get_fpu_mxcsr(task);
675 switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) {
676 case 0x000:
677 default:
678 break;
679 case 0x001: /* Invalid Op */
680 info.si_code = FPE_FLTINV;
681 break;
682 case 0x002: /* Denormalize */
683 case 0x010: /* Underflow */
684 info.si_code = FPE_FLTUND;
685 break;
686 case 0x004: /* Zero Divide */
687 info.si_code = FPE_FLTDIV;
688 break;
689 case 0x008: /* Overflow */
690 info.si_code = FPE_FLTOVF;
691 break;
692 case 0x020: /* Precision */
693 info.si_code = FPE_FLTRES;
694 break;
695 }
696 force_sig_info(SIGFPE, &info, task);
697 }
698
699 dotraplinkage void
700 do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
701 {
702 conditional_sti(regs);
703
704 if (cpu_has_xmm) {
705 /* Handle SIMD FPU exceptions on PIII+ processors. */
706 ignore_fpu_irq = 1;
707 simd_math_error((void __user *)regs->ip);
708 return;
709 }
710 /*
711 * Handle strange cache flush from user space exception
712 * in all other cases. This is undocumented behaviour.
713 */
714 if (regs->flags & X86_VM_MASK) {
715 handle_vm86_fault((struct kernel_vm86_regs *)regs, error_code);
716 return;
717 }
718 current->thread.trap_no = 19;
719 current->thread.error_code = error_code;
720 die_if_kernel("cache flush denied", regs, error_code);
721 force_sig(SIGSEGV, current);
722 }
723
724 dotraplinkage void
725 do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
726 {
727 conditional_sti(regs);
728 #if 0
729 /* No need to warn about this any longer. */
730 printk(KERN_INFO "Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
731 #endif
732 }
733
734 unsigned long patch_espfix_desc(unsigned long uesp, unsigned long kesp)
735 {
736 struct desc_struct *gdt = get_cpu_gdt_table(smp_processor_id());
737 unsigned long base = (kesp - uesp) & -THREAD_SIZE;
738 unsigned long new_kesp = kesp - base;
739 unsigned long lim_pages = (new_kesp | (THREAD_SIZE - 1)) >> PAGE_SHIFT;
740 __u64 desc = *(__u64 *)&gdt[GDT_ENTRY_ESPFIX_SS];
741
742 /* Set up base for espfix segment */
743 desc &= 0x00f0ff0000000000ULL;
744 desc |= ((((__u64)base) << 16) & 0x000000ffffff0000ULL) |
745 ((((__u64)base) << 32) & 0xff00000000000000ULL) |
746 ((((__u64)lim_pages) << 32) & 0x000f000000000000ULL) |
747 (lim_pages & 0xffff);
748 *(__u64 *)&gdt[GDT_ENTRY_ESPFIX_SS] = desc;
749
750 return new_kesp;
751 }
752
753 /*
754 * 'math_state_restore()' saves the current math information in the
755 * old math state array, and gets the new ones from the current task
756 *
757 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
758 * Don't touch unless you *really* know how it works.
759 *
760 * Must be called with kernel preemption disabled (in this case,
761 * local interrupts are disabled at the call-site in entry.S).
762 */
763 asmlinkage void math_state_restore(void)
764 {
765 struct thread_info *thread = current_thread_info();
766 struct task_struct *tsk = thread->task;
767
768 if (!tsk_used_math(tsk)) {
769 local_irq_enable();
770 /*
771 * does a slab alloc which can sleep
772 */
773 if (init_fpu(tsk)) {
774 /*
775 * ran out of memory!
776 */
777 do_group_exit(SIGKILL);
778 return;
779 }
780 local_irq_disable();
781 }
782
783 clts(); /* Allow maths ops (or we recurse) */
784 restore_fpu(tsk);
785 thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
786 tsk->fpu_counter++;
787 }
788 EXPORT_SYMBOL_GPL(math_state_restore);
789
790 #ifndef CONFIG_MATH_EMULATION
791
792 asmlinkage void math_emulate(long arg)
793 {
794 printk(KERN_EMERG
795 "math-emulation not enabled and no coprocessor found.\n");
796 printk(KERN_EMERG "killing %s.\n", current->comm);
797 force_sig(SIGFPE, current);
798 schedule();
799 }
800
801 #endif /* CONFIG_MATH_EMULATION */
802
803 dotraplinkage void __kprobes
804 do_device_not_available(struct pt_regs *regs, long error)
805 {
806 if (read_cr0() & X86_CR0_EM) {
807 conditional_sti(regs);
808 math_emulate(0);
809 } else {
810 math_state_restore(); /* interrupts still off */
811 conditional_sti(regs);
812 }
813 }
814
815 #ifdef CONFIG_X86_MCE
816 dotraplinkage void __kprobes do_machine_check(struct pt_regs *regs, long error)
817 {
818 conditional_sti(regs);
819 machine_check_vector(regs, error);
820 }
821 #endif
822
823 dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
824 {
825 siginfo_t info;
826 local_irq_enable();
827
828 info.si_signo = SIGILL;
829 info.si_errno = 0;
830 info.si_code = ILL_BADSTK;
831 info.si_addr = 0;
832 if (notify_die(DIE_TRAP, "iret exception",
833 regs, error_code, 32, SIGILL) == NOTIFY_STOP)
834 return;
835 do_trap(32, SIGILL, "iret exception", regs, error_code, &info);
836 }
837
838 void __init trap_init(void)
839 {
840 int i;
841
842 #ifdef CONFIG_EISA
843 void __iomem *p = early_ioremap(0x0FFFD9, 4);
844
845 if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
846 EISA_bus = 1;
847 early_iounmap(p, 4);
848 #endif
849
850 set_intr_gate(0, &divide_error);
851 set_intr_gate_ist(1, &debug, DEBUG_STACK);
852 set_intr_gate_ist(2, &nmi, NMI_STACK);
853 /* int3 can be called from all */
854 set_system_intr_gate_ist(3, &int3, DEBUG_STACK);
855 /* int4 can be called from all */
856 set_system_intr_gate(4, &overflow);
857 set_intr_gate(5, &bounds);
858 set_intr_gate(6, &invalid_op);
859 set_intr_gate(7, &device_not_available);
860 set_task_gate(8, GDT_ENTRY_DOUBLEFAULT_TSS);
861 set_intr_gate(9, &coprocessor_segment_overrun);
862 set_intr_gate(10, &invalid_TSS);
863 set_intr_gate(11, &segment_not_present);
864 set_intr_gate_ist(12, &stack_segment, STACKFAULT_STACK);
865 set_intr_gate(13, &general_protection);
866 set_intr_gate(14, &page_fault);
867 set_intr_gate(15, &spurious_interrupt_bug);
868 set_intr_gate(16, &coprocessor_error);
869 set_intr_gate(17, &alignment_check);
870 #ifdef CONFIG_X86_MCE
871 set_intr_gate_ist(18, &machine_check, MCE_STACK);
872 #endif
873 set_intr_gate(19, &simd_coprocessor_error);
874
875 if (cpu_has_fxsr) {
876 printk(KERN_INFO "Enabling fast FPU save and restore... ");
877 set_in_cr4(X86_CR4_OSFXSR);
878 printk("done.\n");
879 }
880 if (cpu_has_xmm) {
881 printk(KERN_INFO
882 "Enabling unmasked SIMD FPU exception support... ");
883 set_in_cr4(X86_CR4_OSXMMEXCPT);
884 printk("done.\n");
885 }
886
887 set_system_trap_gate(SYSCALL_VECTOR, &system_call);
888
889 /* Reserve all the builtin and the syscall vector: */
890 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
891 set_bit(i, used_vectors);
892
893 set_bit(SYSCALL_VECTOR, used_vectors);
894
895 /*
896 * Should be a barrier for any external CPU state:
897 */
898 cpu_init();
899
900 trap_init_hook();
901 }
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