arch/x86/kvm/irq_comm.c

   1 /*
   2  * irq_comm.c: Common API for in kernel interrupt controller
   3  * Copyright (c) 2007, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
  16  * Place - Suite 330, Boston, MA 02111-1307 USA.
  17  * Authors:
  18  *   Yaozu (Eddie) Dong <Eddie.dong@intel.com>
  19  *
  20  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  21  */
  22
  23 #include <linux/kvm_host.h>
  24 #include <linux/slab.h>
  25 #include <linux/export.h>
  26 #include <trace/events/kvm.h>
  27
  28 #include <asm/msidef.h>
  29
  30 #include "irq.h"
  31
  32 #include "ioapic.h"
  33
  34 #include "lapic.h"
  35
  36 static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
  37                            struct kvm *kvm, int irq_source_id, int level,
  38                            bool line_status)
  39 {
  40         struct kvm_pic *pic = pic_irqchip(kvm);
  41         return kvm_pic_set_irq(pic, e->irqchip.pin, irq_source_id, level);
  42 }
  43
  44 static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
  45                               struct kvm *kvm, int irq_source_id, int level,
  46                               bool line_status)
  47 {
  48         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
  49         return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, irq_source_id, level,
  50                                 line_status);
  51 }
  52
  53 int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
  54                 struct kvm_lapic_irq *irq, unsigned long *dest_map)
  55 {
  56         int i, r = -1;
  57         struct kvm_vcpu *vcpu, *lowest = NULL;
  58
  59         if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
  60                         kvm_lowest_prio_delivery(irq)) {
  61                 printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
  62                 irq->delivery_mode = APIC_DM_FIXED;
  63         }
  64
  65         if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map))
  66                 return r;
  67
  68         kvm_for_each_vcpu(i, vcpu, kvm) {
  69                 if (!kvm_apic_present(vcpu))
  70                         continue;
  71
  72                 if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
  73                                         irq->dest_id, irq->dest_mode))
  74                         continue;
  75
  76                 if (!kvm_lowest_prio_delivery(irq)) {
  77                         if (r < 0)
  78                                 r = 0;
  79                         r += kvm_apic_set_irq(vcpu, irq, dest_map);
  80                 } else if (kvm_lapic_enabled(vcpu)) {
  81                         if (!lowest)
  82                                 lowest = vcpu;
  83                         else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
  84                                 lowest = vcpu;
  85                 }
  86         }
  87
  88         if (lowest)
  89                 r = kvm_apic_set_irq(lowest, irq, dest_map);
  90
  91         return r;
  92 }
  93
  94 static inline void kvm_set_msi_irq(struct kvm_kernel_irq_routing_entry *e,
  95                                    struct kvm_lapic_irq *irq)
  96 {
  97         trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data);
  98
  99         irq->dest_id = (e->msi.address_lo &
 100                         MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
 101         irq->vector = (e->msi.data &
 102                         MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
 103         irq->dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
 104         irq->trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
 105         irq->delivery_mode = e->msi.data & 0x700;
 106         irq->msi_redir_hint = ((e->msi.address_lo
 107                 & MSI_ADDR_REDIRECTION_LOWPRI) > 0);
 108         irq->level = 1;
 109         irq->shorthand = 0;
 110 }
 111
 112 int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
 113                 struct kvm *kvm, int irq_source_id, int level, bool line_status)
 114 {
 115         struct kvm_lapic_irq irq;
 116
 117         if (!level)
 118                 return -1;
 119
 120         kvm_set_msi_irq(e, &irq);
 121
 122         return kvm_irq_delivery_to_apic(kvm, NULL, &irq, NULL);
 123 }
 124
 125
 126 static int kvm_set_msi_inatomic(struct kvm_kernel_irq_routing_entry *e,
 127                          struct kvm *kvm)
 128 {
 129         struct kvm_lapic_irq irq;
 130         int r;
 131
 132         kvm_set_msi_irq(e, &irq);
 133
 134         if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL))
 135                 return r;
 136         else
 137                 return -EWOULDBLOCK;
 138 }
 139
 140 /*
 141  * Deliver an IRQ in an atomic context if we can, or return a failure,
 142  * user can retry in a process context.
 143  * Return value:
 144  *  -EWOULDBLOCK - Can't deliver in atomic context: retry in a process context.
 145  *  Other values - No need to retry.
 146  */
 147 int kvm_set_irq_inatomic(struct kvm *kvm, int irq_source_id, u32 irq, int level)
 148 {
 149         struct kvm_kernel_irq_routing_entry entries[KVM_NR_IRQCHIPS];
 150         struct kvm_kernel_irq_routing_entry *e;
 151         int ret = -EINVAL;
 152         int idx;
 153
 154         trace_kvm_set_irq(irq, level, irq_source_id);
 155
 156         /*
 157          * Injection into either PIC or IOAPIC might need to scan all CPUs,
 158          * which would need to be retried from thread context;  when same GSI
 159          * is connected to both PIC and IOAPIC, we'd have to report a
 160          * partial failure here.
 161          * Since there's no easy way to do this, we only support injecting MSI
 162          * which is limited to 1:1 GSI mapping.
 163          */
 164         idx = srcu_read_lock(&kvm->irq_srcu);
 165         if (kvm_irq_map_gsi(kvm, entries, irq) > 0) {
 166                 e = &entries[0];
 167                 if (likely(e->type == KVM_IRQ_ROUTING_MSI))
 168                         ret = kvm_set_msi_inatomic(e, kvm);
 169                 else
 170                         ret = -EWOULDBLOCK;
 171         }
 172         srcu_read_unlock(&kvm->irq_srcu, idx);
 173         return ret;
 174 }
 175
 176 int kvm_request_irq_source_id(struct kvm *kvm)
 177 {
 178         unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
 179         int irq_source_id;
 180
 181         mutex_lock(&kvm->irq_lock);
 182         irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);
 183
 184         if (irq_source_id >= BITS_PER_LONG) {
 185                 printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
 186                 irq_source_id = -EFAULT;
 187                 goto unlock;
 188         }
 189
 190         ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
 191         ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
 192         set_bit(irq_source_id, bitmap);
 193 unlock:
 194         mutex_unlock(&kvm->irq_lock);
 195
 196         return irq_source_id;
 197 }
 198
 199 void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
 200 {
 201         ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
 202         ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
 203
 204         mutex_lock(&kvm->irq_lock);
 205         if (irq_source_id < 0 ||
 206             irq_source_id >= BITS_PER_LONG) {
 207                 printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
 208                 goto unlock;
 209         }
 210         clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
 211         if (!irqchip_in_kernel(kvm))
 212                 goto unlock;
 213
 214         kvm_ioapic_clear_all(kvm->arch.vioapic, irq_source_id);
 215         kvm_pic_clear_all(pic_irqchip(kvm), irq_source_id);
 216 unlock:
 217         mutex_unlock(&kvm->irq_lock);
 218 }
 219
 220 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
 221                                     struct kvm_irq_mask_notifier *kimn)
 222 {
 223         mutex_lock(&kvm->irq_lock);
 224         kimn->irq = irq;
 225         hlist_add_head_rcu(&kimn->link, &kvm->arch.mask_notifier_list);
 226         mutex_unlock(&kvm->irq_lock);
 227 }
 228
 229 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
 230                                       struct kvm_irq_mask_notifier *kimn)
 231 {
 232         mutex_lock(&kvm->irq_lock);
 233         hlist_del_rcu(&kimn->link);
 234         mutex_unlock(&kvm->irq_lock);
 235         synchronize_srcu(&kvm->irq_srcu);
 236 }
 237
 238 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
 239                              bool mask)
 240 {
 241         struct kvm_irq_mask_notifier *kimn;
 242         int idx, gsi;
 243
 244         idx = srcu_read_lock(&kvm->irq_srcu);
 245         gsi = kvm_irq_map_chip_pin(kvm, irqchip, pin);
 246         if (gsi != -1)
 247                 hlist_for_each_entry_rcu(kimn, &kvm->arch.mask_notifier_list, link)
 248                         if (kimn->irq == gsi)
 249                                 kimn->func(kimn, mask);
 250         srcu_read_unlock(&kvm->irq_srcu, idx);
 251 }
 252
 253 int kvm_set_routing_entry(struct kvm_kernel_irq_routing_entry *e,
 254                           const struct kvm_irq_routing_entry *ue)
 255 {
 256         int r = -EINVAL;
 257         int delta;
 258         unsigned max_pin;
 259
 260         switch (ue->type) {
 261         case KVM_IRQ_ROUTING_IRQCHIP:
 262                 delta = 0;
 263                 switch (ue->u.irqchip.irqchip) {
 264                 case KVM_IRQCHIP_PIC_MASTER:
 265                         e->set = kvm_set_pic_irq;
 266                         max_pin = PIC_NUM_PINS;
 267                         break;
 268                 case KVM_IRQCHIP_PIC_SLAVE:
 269                         e->set = kvm_set_pic_irq;
 270                         max_pin = PIC_NUM_PINS;
 271                         delta = 8;
 272                         break;
 273                 case KVM_IRQCHIP_IOAPIC:
 274                         max_pin = KVM_IOAPIC_NUM_PINS;
 275                         e->set = kvm_set_ioapic_irq;
 276                         break;
 277                 default:
 278                         goto out;
 279                 }
 280                 e->irqchip.irqchip = ue->u.irqchip.irqchip;
 281                 e->irqchip.pin = ue->u.irqchip.pin + delta;
 282                 if (e->irqchip.pin >= max_pin)
 283                         goto out;
 284                 break;
 285         case KVM_IRQ_ROUTING_MSI:
 286                 e->set = kvm_set_msi;
 287                 e->msi.address_lo = ue->u.msi.address_lo;
 288                 e->msi.address_hi = ue->u.msi.address_hi;
 289                 e->msi.data = ue->u.msi.data;
 290                 break;
 291         default:
 292                 goto out;
 293         }
 294
 295         r = 0;
 296 out:
 297         return r;
 298 }
 299
 300 #define IOAPIC_ROUTING_ENTRY(irq) \
 301         { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,  \
 302           .u.irqchip = { .irqchip = KVM_IRQCHIP_IOAPIC, .pin = (irq) } }
 303 #define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
 304
 305 #define PIC_ROUTING_ENTRY(irq) \
 306         { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,  \
 307           .u.irqchip = { .irqchip = SELECT_PIC(irq), .pin = (irq) % 8 } }
 308 #define ROUTING_ENTRY2(irq) \
 309         IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
 310
 311 static const struct kvm_irq_routing_entry default_routing[] = {
 312         ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
 313         ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
 314         ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
 315         ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
 316         ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
 317         ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
 318         ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
 319         ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
 320         ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
 321         ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
 322         ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
 323         ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
 324 };
 325
 326 int kvm_setup_default_irq_routing(struct kvm *kvm)
 327 {
 328         return kvm_set_irq_routing(kvm, default_routing,
 329                                    ARRAY_SIZE(default_routing), 0);
 330 }