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KVM: use the correct RCU API for PROVE_RCU=y
[deliverable/linux.git] / arch / x86 / kvm / mmu.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
19
20 #include "mmu.h"
21 #include "x86.h"
22 #include "kvm_cache_regs.h"
23
24 #include <linux/kvm_host.h>
25 #include <linux/types.h>
26 #include <linux/string.h>
27 #include <linux/mm.h>
28 #include <linux/highmem.h>
29 #include <linux/module.h>
30 #include <linux/swap.h>
31 #include <linux/hugetlb.h>
32 #include <linux/compiler.h>
33 #include <linux/srcu.h>
34 #include <linux/slab.h>
35
36 #include <asm/page.h>
37 #include <asm/cmpxchg.h>
38 #include <asm/io.h>
39 #include <asm/vmx.h>
40
41 /*
42 * When setting this variable to true it enables Two-Dimensional-Paging
43 * where the hardware walks 2 page tables:
44 * 1. the guest-virtual to guest-physical
45 * 2. while doing 1. it walks guest-physical to host-physical
46 * If the hardware supports that we don't need to do shadow paging.
47 */
48 bool tdp_enabled = false;
49
50 #undef MMU_DEBUG
51
52 #undef AUDIT
53
54 #ifdef AUDIT
55 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
56 #else
57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
58 #endif
59
60 #ifdef MMU_DEBUG
61
62 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
63 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
64
65 #else
66
67 #define pgprintk(x...) do { } while (0)
68 #define rmap_printk(x...) do { } while (0)
69
70 #endif
71
72 #if defined(MMU_DEBUG) || defined(AUDIT)
73 static int dbg = 0;
74 module_param(dbg, bool, 0644);
75 #endif
76
77 static int oos_shadow = 1;
78 module_param(oos_shadow, bool, 0644);
79
80 #ifndef MMU_DEBUG
81 #define ASSERT(x) do { } while (0)
82 #else
83 #define ASSERT(x) \
84 if (!(x)) { \
85 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
86 __FILE__, __LINE__, #x); \
87 }
88 #endif
89
90 #define PT_FIRST_AVAIL_BITS_SHIFT 9
91 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
92
93 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
94
95 #define PT64_LEVEL_BITS 9
96
97 #define PT64_LEVEL_SHIFT(level) \
98 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
99
100 #define PT64_LEVEL_MASK(level) \
101 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
102
103 #define PT64_INDEX(address, level)\
104 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
105
106
107 #define PT32_LEVEL_BITS 10
108
109 #define PT32_LEVEL_SHIFT(level) \
110 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
111
112 #define PT32_LEVEL_MASK(level) \
113 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
114 #define PT32_LVL_OFFSET_MASK(level) \
115 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
116 * PT32_LEVEL_BITS))) - 1))
117
118 #define PT32_INDEX(address, level)\
119 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
120
121
122 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
123 #define PT64_DIR_BASE_ADDR_MASK \
124 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
125 #define PT64_LVL_ADDR_MASK(level) \
126 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
127 * PT64_LEVEL_BITS))) - 1))
128 #define PT64_LVL_OFFSET_MASK(level) \
129 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
130 * PT64_LEVEL_BITS))) - 1))
131
132 #define PT32_BASE_ADDR_MASK PAGE_MASK
133 #define PT32_DIR_BASE_ADDR_MASK \
134 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
135 #define PT32_LVL_ADDR_MASK(level) \
136 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
137 * PT32_LEVEL_BITS))) - 1))
138
139 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
140 | PT64_NX_MASK)
141
142 #define RMAP_EXT 4
143
144 #define ACC_EXEC_MASK 1
145 #define ACC_WRITE_MASK PT_WRITABLE_MASK
146 #define ACC_USER_MASK PT_USER_MASK
147 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
148
149 #include <trace/events/kvm.h>
150
151 #define CREATE_TRACE_POINTS
152 #include "mmutrace.h"
153
154 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
155
156 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
157
158 struct kvm_rmap_desc {
159 u64 *sptes[RMAP_EXT];
160 struct kvm_rmap_desc *more;
161 };
162
163 struct kvm_shadow_walk_iterator {
164 u64 addr;
165 hpa_t shadow_addr;
166 int level;
167 u64 *sptep;
168 unsigned index;
169 };
170
171 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
172 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
173 shadow_walk_okay(&(_walker)); \
174 shadow_walk_next(&(_walker)))
175
176 typedef int (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp);
177
178 static struct kmem_cache *pte_chain_cache;
179 static struct kmem_cache *rmap_desc_cache;
180 static struct kmem_cache *mmu_page_header_cache;
181
182 static u64 __read_mostly shadow_trap_nonpresent_pte;
183 static u64 __read_mostly shadow_notrap_nonpresent_pte;
184 static u64 __read_mostly shadow_base_present_pte;
185 static u64 __read_mostly shadow_nx_mask;
186 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
187 static u64 __read_mostly shadow_user_mask;
188 static u64 __read_mostly shadow_accessed_mask;
189 static u64 __read_mostly shadow_dirty_mask;
190
191 static inline u64 rsvd_bits(int s, int e)
192 {
193 return ((1ULL << (e - s + 1)) - 1) << s;
194 }
195
196 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
197 {
198 shadow_trap_nonpresent_pte = trap_pte;
199 shadow_notrap_nonpresent_pte = notrap_pte;
200 }
201 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
202
203 void kvm_mmu_set_base_ptes(u64 base_pte)
204 {
205 shadow_base_present_pte = base_pte;
206 }
207 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
208
209 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
210 u64 dirty_mask, u64 nx_mask, u64 x_mask)
211 {
212 shadow_user_mask = user_mask;
213 shadow_accessed_mask = accessed_mask;
214 shadow_dirty_mask = dirty_mask;
215 shadow_nx_mask = nx_mask;
216 shadow_x_mask = x_mask;
217 }
218 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
219
220 static int is_write_protection(struct kvm_vcpu *vcpu)
221 {
222 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
223 }
224
225 static int is_cpuid_PSE36(void)
226 {
227 return 1;
228 }
229
230 static int is_nx(struct kvm_vcpu *vcpu)
231 {
232 return vcpu->arch.efer & EFER_NX;
233 }
234
235 static int is_shadow_present_pte(u64 pte)
236 {
237 return pte != shadow_trap_nonpresent_pte
238 && pte != shadow_notrap_nonpresent_pte;
239 }
240
241 static int is_large_pte(u64 pte)
242 {
243 return pte & PT_PAGE_SIZE_MASK;
244 }
245
246 static int is_writable_pte(unsigned long pte)
247 {
248 return pte & PT_WRITABLE_MASK;
249 }
250
251 static int is_dirty_gpte(unsigned long pte)
252 {
253 return pte & PT_DIRTY_MASK;
254 }
255
256 static int is_rmap_spte(u64 pte)
257 {
258 return is_shadow_present_pte(pte);
259 }
260
261 static int is_last_spte(u64 pte, int level)
262 {
263 if (level == PT_PAGE_TABLE_LEVEL)
264 return 1;
265 if (is_large_pte(pte))
266 return 1;
267 return 0;
268 }
269
270 static pfn_t spte_to_pfn(u64 pte)
271 {
272 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
273 }
274
275 static gfn_t pse36_gfn_delta(u32 gpte)
276 {
277 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
278
279 return (gpte & PT32_DIR_PSE36_MASK) << shift;
280 }
281
282 static void __set_spte(u64 *sptep, u64 spte)
283 {
284 #ifdef CONFIG_X86_64
285 set_64bit((unsigned long *)sptep, spte);
286 #else
287 set_64bit((unsigned long long *)sptep, spte);
288 #endif
289 }
290
291 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
292 struct kmem_cache *base_cache, int min)
293 {
294 void *obj;
295
296 if (cache->nobjs >= min)
297 return 0;
298 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
299 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
300 if (!obj)
301 return -ENOMEM;
302 cache->objects[cache->nobjs++] = obj;
303 }
304 return 0;
305 }
306
307 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
308 {
309 while (mc->nobjs)
310 kfree(mc->objects[--mc->nobjs]);
311 }
312
313 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
314 int min)
315 {
316 struct page *page;
317
318 if (cache->nobjs >= min)
319 return 0;
320 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
321 page = alloc_page(GFP_KERNEL);
322 if (!page)
323 return -ENOMEM;
324 cache->objects[cache->nobjs++] = page_address(page);
325 }
326 return 0;
327 }
328
329 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
330 {
331 while (mc->nobjs)
332 free_page((unsigned long)mc->objects[--mc->nobjs]);
333 }
334
335 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
336 {
337 int r;
338
339 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
340 pte_chain_cache, 4);
341 if (r)
342 goto out;
343 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
344 rmap_desc_cache, 4);
345 if (r)
346 goto out;
347 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
348 if (r)
349 goto out;
350 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
351 mmu_page_header_cache, 4);
352 out:
353 return r;
354 }
355
356 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
357 {
358 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
359 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
360 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
361 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
362 }
363
364 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
365 size_t size)
366 {
367 void *p;
368
369 BUG_ON(!mc->nobjs);
370 p = mc->objects[--mc->nobjs];
371 return p;
372 }
373
374 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
375 {
376 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
377 sizeof(struct kvm_pte_chain));
378 }
379
380 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
381 {
382 kfree(pc);
383 }
384
385 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
386 {
387 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
388 sizeof(struct kvm_rmap_desc));
389 }
390
391 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
392 {
393 kfree(rd);
394 }
395
396 /*
397 * Return the pointer to the largepage write count for a given
398 * gfn, handling slots that are not large page aligned.
399 */
400 static int *slot_largepage_idx(gfn_t gfn,
401 struct kvm_memory_slot *slot,
402 int level)
403 {
404 unsigned long idx;
405
406 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
407 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
408 return &slot->lpage_info[level - 2][idx].write_count;
409 }
410
411 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
412 {
413 struct kvm_memory_slot *slot;
414 int *write_count;
415 int i;
416
417 gfn = unalias_gfn(kvm, gfn);
418
419 slot = gfn_to_memslot_unaliased(kvm, gfn);
420 for (i = PT_DIRECTORY_LEVEL;
421 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
422 write_count = slot_largepage_idx(gfn, slot, i);
423 *write_count += 1;
424 }
425 }
426
427 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
428 {
429 struct kvm_memory_slot *slot;
430 int *write_count;
431 int i;
432
433 gfn = unalias_gfn(kvm, gfn);
434 for (i = PT_DIRECTORY_LEVEL;
435 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
436 slot = gfn_to_memslot_unaliased(kvm, gfn);
437 write_count = slot_largepage_idx(gfn, slot, i);
438 *write_count -= 1;
439 WARN_ON(*write_count < 0);
440 }
441 }
442
443 static int has_wrprotected_page(struct kvm *kvm,
444 gfn_t gfn,
445 int level)
446 {
447 struct kvm_memory_slot *slot;
448 int *largepage_idx;
449
450 gfn = unalias_gfn(kvm, gfn);
451 slot = gfn_to_memslot_unaliased(kvm, gfn);
452 if (slot) {
453 largepage_idx = slot_largepage_idx(gfn, slot, level);
454 return *largepage_idx;
455 }
456
457 return 1;
458 }
459
460 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
461 {
462 unsigned long page_size;
463 int i, ret = 0;
464
465 page_size = kvm_host_page_size(kvm, gfn);
466
467 for (i = PT_PAGE_TABLE_LEVEL;
468 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
469 if (page_size >= KVM_HPAGE_SIZE(i))
470 ret = i;
471 else
472 break;
473 }
474
475 return ret;
476 }
477
478 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
479 {
480 struct kvm_memory_slot *slot;
481 int host_level, level, max_level;
482
483 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
484 if (slot && slot->dirty_bitmap)
485 return PT_PAGE_TABLE_LEVEL;
486
487 host_level = host_mapping_level(vcpu->kvm, large_gfn);
488
489 if (host_level == PT_PAGE_TABLE_LEVEL)
490 return host_level;
491
492 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
493 kvm_x86_ops->get_lpage_level() : host_level;
494
495 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
496 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
497 break;
498
499 return level - 1;
500 }
501
502 /*
503 * Take gfn and return the reverse mapping to it.
504 * Note: gfn must be unaliased before this function get called
505 */
506
507 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
508 {
509 struct kvm_memory_slot *slot;
510 unsigned long idx;
511
512 slot = gfn_to_memslot(kvm, gfn);
513 if (likely(level == PT_PAGE_TABLE_LEVEL))
514 return &slot->rmap[gfn - slot->base_gfn];
515
516 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
517 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
518
519 return &slot->lpage_info[level - 2][idx].rmap_pde;
520 }
521
522 /*
523 * Reverse mapping data structures:
524 *
525 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
526 * that points to page_address(page).
527 *
528 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
529 * containing more mappings.
530 *
531 * Returns the number of rmap entries before the spte was added or zero if
532 * the spte was not added.
533 *
534 */
535 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
536 {
537 struct kvm_mmu_page *sp;
538 struct kvm_rmap_desc *desc;
539 unsigned long *rmapp;
540 int i, count = 0;
541
542 if (!is_rmap_spte(*spte))
543 return count;
544 gfn = unalias_gfn(vcpu->kvm, gfn);
545 sp = page_header(__pa(spte));
546 sp->gfns[spte - sp->spt] = gfn;
547 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
548 if (!*rmapp) {
549 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
550 *rmapp = (unsigned long)spte;
551 } else if (!(*rmapp & 1)) {
552 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
553 desc = mmu_alloc_rmap_desc(vcpu);
554 desc->sptes[0] = (u64 *)*rmapp;
555 desc->sptes[1] = spte;
556 *rmapp = (unsigned long)desc | 1;
557 } else {
558 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
559 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
560 while (desc->sptes[RMAP_EXT-1] && desc->more) {
561 desc = desc->more;
562 count += RMAP_EXT;
563 }
564 if (desc->sptes[RMAP_EXT-1]) {
565 desc->more = mmu_alloc_rmap_desc(vcpu);
566 desc = desc->more;
567 }
568 for (i = 0; desc->sptes[i]; ++i)
569 ;
570 desc->sptes[i] = spte;
571 }
572 return count;
573 }
574
575 static void rmap_desc_remove_entry(unsigned long *rmapp,
576 struct kvm_rmap_desc *desc,
577 int i,
578 struct kvm_rmap_desc *prev_desc)
579 {
580 int j;
581
582 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
583 ;
584 desc->sptes[i] = desc->sptes[j];
585 desc->sptes[j] = NULL;
586 if (j != 0)
587 return;
588 if (!prev_desc && !desc->more)
589 *rmapp = (unsigned long)desc->sptes[0];
590 else
591 if (prev_desc)
592 prev_desc->more = desc->more;
593 else
594 *rmapp = (unsigned long)desc->more | 1;
595 mmu_free_rmap_desc(desc);
596 }
597
598 static void rmap_remove(struct kvm *kvm, u64 *spte)
599 {
600 struct kvm_rmap_desc *desc;
601 struct kvm_rmap_desc *prev_desc;
602 struct kvm_mmu_page *sp;
603 pfn_t pfn;
604 unsigned long *rmapp;
605 int i;
606
607 if (!is_rmap_spte(*spte))
608 return;
609 sp = page_header(__pa(spte));
610 pfn = spte_to_pfn(*spte);
611 if (*spte & shadow_accessed_mask)
612 kvm_set_pfn_accessed(pfn);
613 if (is_writable_pte(*spte))
614 kvm_set_pfn_dirty(pfn);
615 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
616 if (!*rmapp) {
617 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
618 BUG();
619 } else if (!(*rmapp & 1)) {
620 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
621 if ((u64 *)*rmapp != spte) {
622 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
623 spte, *spte);
624 BUG();
625 }
626 *rmapp = 0;
627 } else {
628 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
629 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
630 prev_desc = NULL;
631 while (desc) {
632 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
633 if (desc->sptes[i] == spte) {
634 rmap_desc_remove_entry(rmapp,
635 desc, i,
636 prev_desc);
637 return;
638 }
639 prev_desc = desc;
640 desc = desc->more;
641 }
642 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
643 BUG();
644 }
645 }
646
647 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
648 {
649 struct kvm_rmap_desc *desc;
650 struct kvm_rmap_desc *prev_desc;
651 u64 *prev_spte;
652 int i;
653
654 if (!*rmapp)
655 return NULL;
656 else if (!(*rmapp & 1)) {
657 if (!spte)
658 return (u64 *)*rmapp;
659 return NULL;
660 }
661 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
662 prev_desc = NULL;
663 prev_spte = NULL;
664 while (desc) {
665 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
666 if (prev_spte == spte)
667 return desc->sptes[i];
668 prev_spte = desc->sptes[i];
669 }
670 desc = desc->more;
671 }
672 return NULL;
673 }
674
675 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
676 {
677 unsigned long *rmapp;
678 u64 *spte;
679 int i, write_protected = 0;
680
681 gfn = unalias_gfn(kvm, gfn);
682 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
683
684 spte = rmap_next(kvm, rmapp, NULL);
685 while (spte) {
686 BUG_ON(!spte);
687 BUG_ON(!(*spte & PT_PRESENT_MASK));
688 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
689 if (is_writable_pte(*spte)) {
690 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
691 write_protected = 1;
692 }
693 spte = rmap_next(kvm, rmapp, spte);
694 }
695 if (write_protected) {
696 pfn_t pfn;
697
698 spte = rmap_next(kvm, rmapp, NULL);
699 pfn = spte_to_pfn(*spte);
700 kvm_set_pfn_dirty(pfn);
701 }
702
703 /* check for huge page mappings */
704 for (i = PT_DIRECTORY_LEVEL;
705 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
706 rmapp = gfn_to_rmap(kvm, gfn, i);
707 spte = rmap_next(kvm, rmapp, NULL);
708 while (spte) {
709 BUG_ON(!spte);
710 BUG_ON(!(*spte & PT_PRESENT_MASK));
711 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
712 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
713 if (is_writable_pte(*spte)) {
714 rmap_remove(kvm, spte);
715 --kvm->stat.lpages;
716 __set_spte(spte, shadow_trap_nonpresent_pte);
717 spte = NULL;
718 write_protected = 1;
719 }
720 spte = rmap_next(kvm, rmapp, spte);
721 }
722 }
723
724 return write_protected;
725 }
726
727 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
728 unsigned long data)
729 {
730 u64 *spte;
731 int need_tlb_flush = 0;
732
733 while ((spte = rmap_next(kvm, rmapp, NULL))) {
734 BUG_ON(!(*spte & PT_PRESENT_MASK));
735 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
736 rmap_remove(kvm, spte);
737 __set_spte(spte, shadow_trap_nonpresent_pte);
738 need_tlb_flush = 1;
739 }
740 return need_tlb_flush;
741 }
742
743 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
744 unsigned long data)
745 {
746 int need_flush = 0;
747 u64 *spte, new_spte;
748 pte_t *ptep = (pte_t *)data;
749 pfn_t new_pfn;
750
751 WARN_ON(pte_huge(*ptep));
752 new_pfn = pte_pfn(*ptep);
753 spte = rmap_next(kvm, rmapp, NULL);
754 while (spte) {
755 BUG_ON(!is_shadow_present_pte(*spte));
756 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
757 need_flush = 1;
758 if (pte_write(*ptep)) {
759 rmap_remove(kvm, spte);
760 __set_spte(spte, shadow_trap_nonpresent_pte);
761 spte = rmap_next(kvm, rmapp, NULL);
762 } else {
763 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
764 new_spte |= (u64)new_pfn << PAGE_SHIFT;
765
766 new_spte &= ~PT_WRITABLE_MASK;
767 new_spte &= ~SPTE_HOST_WRITEABLE;
768 if (is_writable_pte(*spte))
769 kvm_set_pfn_dirty(spte_to_pfn(*spte));
770 __set_spte(spte, new_spte);
771 spte = rmap_next(kvm, rmapp, spte);
772 }
773 }
774 if (need_flush)
775 kvm_flush_remote_tlbs(kvm);
776
777 return 0;
778 }
779
780 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
781 unsigned long data,
782 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
783 unsigned long data))
784 {
785 int i, j;
786 int ret;
787 int retval = 0;
788 struct kvm_memslots *slots;
789
790 slots = kvm_memslots(kvm);
791
792 for (i = 0; i < slots->nmemslots; i++) {
793 struct kvm_memory_slot *memslot = &slots->memslots[i];
794 unsigned long start = memslot->userspace_addr;
795 unsigned long end;
796
797 end = start + (memslot->npages << PAGE_SHIFT);
798 if (hva >= start && hva < end) {
799 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
800
801 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
802
803 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
804 int idx = gfn_offset;
805 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
806 ret |= handler(kvm,
807 &memslot->lpage_info[j][idx].rmap_pde,
808 data);
809 }
810 trace_kvm_age_page(hva, memslot, ret);
811 retval |= ret;
812 }
813 }
814
815 return retval;
816 }
817
818 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
819 {
820 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
821 }
822
823 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
824 {
825 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
826 }
827
828 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
829 unsigned long data)
830 {
831 u64 *spte;
832 int young = 0;
833
834 /*
835 * Emulate the accessed bit for EPT, by checking if this page has
836 * an EPT mapping, and clearing it if it does. On the next access,
837 * a new EPT mapping will be established.
838 * This has some overhead, but not as much as the cost of swapping
839 * out actively used pages or breaking up actively used hugepages.
840 */
841 if (!shadow_accessed_mask)
842 return kvm_unmap_rmapp(kvm, rmapp, data);
843
844 spte = rmap_next(kvm, rmapp, NULL);
845 while (spte) {
846 int _young;
847 u64 _spte = *spte;
848 BUG_ON(!(_spte & PT_PRESENT_MASK));
849 _young = _spte & PT_ACCESSED_MASK;
850 if (_young) {
851 young = 1;
852 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
853 }
854 spte = rmap_next(kvm, rmapp, spte);
855 }
856 return young;
857 }
858
859 #define RMAP_RECYCLE_THRESHOLD 1000
860
861 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
862 {
863 unsigned long *rmapp;
864 struct kvm_mmu_page *sp;
865
866 sp = page_header(__pa(spte));
867
868 gfn = unalias_gfn(vcpu->kvm, gfn);
869 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
870
871 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
872 kvm_flush_remote_tlbs(vcpu->kvm);
873 }
874
875 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
876 {
877 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
878 }
879
880 #ifdef MMU_DEBUG
881 static int is_empty_shadow_page(u64 *spt)
882 {
883 u64 *pos;
884 u64 *end;
885
886 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
887 if (is_shadow_present_pte(*pos)) {
888 printk(KERN_ERR "%s: %p %llx\n", __func__,
889 pos, *pos);
890 return 0;
891 }
892 return 1;
893 }
894 #endif
895
896 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
897 {
898 ASSERT(is_empty_shadow_page(sp->spt));
899 list_del(&sp->link);
900 __free_page(virt_to_page(sp->spt));
901 __free_page(virt_to_page(sp->gfns));
902 kfree(sp);
903 ++kvm->arch.n_free_mmu_pages;
904 }
905
906 static unsigned kvm_page_table_hashfn(gfn_t gfn)
907 {
908 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
909 }
910
911 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
912 u64 *parent_pte)
913 {
914 struct kvm_mmu_page *sp;
915
916 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
917 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
918 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
919 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
920 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
921 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
922 sp->multimapped = 0;
923 sp->parent_pte = parent_pte;
924 --vcpu->kvm->arch.n_free_mmu_pages;
925 return sp;
926 }
927
928 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
929 struct kvm_mmu_page *sp, u64 *parent_pte)
930 {
931 struct kvm_pte_chain *pte_chain;
932 struct hlist_node *node;
933 int i;
934
935 if (!parent_pte)
936 return;
937 if (!sp->multimapped) {
938 u64 *old = sp->parent_pte;
939
940 if (!old) {
941 sp->parent_pte = parent_pte;
942 return;
943 }
944 sp->multimapped = 1;
945 pte_chain = mmu_alloc_pte_chain(vcpu);
946 INIT_HLIST_HEAD(&sp->parent_ptes);
947 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
948 pte_chain->parent_ptes[0] = old;
949 }
950 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
951 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
952 continue;
953 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
954 if (!pte_chain->parent_ptes[i]) {
955 pte_chain->parent_ptes[i] = parent_pte;
956 return;
957 }
958 }
959 pte_chain = mmu_alloc_pte_chain(vcpu);
960 BUG_ON(!pte_chain);
961 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
962 pte_chain->parent_ptes[0] = parent_pte;
963 }
964
965 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
966 u64 *parent_pte)
967 {
968 struct kvm_pte_chain *pte_chain;
969 struct hlist_node *node;
970 int i;
971
972 if (!sp->multimapped) {
973 BUG_ON(sp->parent_pte != parent_pte);
974 sp->parent_pte = NULL;
975 return;
976 }
977 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
978 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
979 if (!pte_chain->parent_ptes[i])
980 break;
981 if (pte_chain->parent_ptes[i] != parent_pte)
982 continue;
983 while (i + 1 < NR_PTE_CHAIN_ENTRIES
984 && pte_chain->parent_ptes[i + 1]) {
985 pte_chain->parent_ptes[i]
986 = pte_chain->parent_ptes[i + 1];
987 ++i;
988 }
989 pte_chain->parent_ptes[i] = NULL;
990 if (i == 0) {
991 hlist_del(&pte_chain->link);
992 mmu_free_pte_chain(pte_chain);
993 if (hlist_empty(&sp->parent_ptes)) {
994 sp->multimapped = 0;
995 sp->parent_pte = NULL;
996 }
997 }
998 return;
999 }
1000 BUG();
1001 }
1002
1003
1004 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1005 {
1006 struct kvm_pte_chain *pte_chain;
1007 struct hlist_node *node;
1008 struct kvm_mmu_page *parent_sp;
1009 int i;
1010
1011 if (!sp->multimapped && sp->parent_pte) {
1012 parent_sp = page_header(__pa(sp->parent_pte));
1013 fn(parent_sp);
1014 mmu_parent_walk(parent_sp, fn);
1015 return;
1016 }
1017 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1018 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1019 if (!pte_chain->parent_ptes[i])
1020 break;
1021 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1022 fn(parent_sp);
1023 mmu_parent_walk(parent_sp, fn);
1024 }
1025 }
1026
1027 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1028 {
1029 unsigned int index;
1030 struct kvm_mmu_page *sp = page_header(__pa(spte));
1031
1032 index = spte - sp->spt;
1033 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1034 sp->unsync_children++;
1035 WARN_ON(!sp->unsync_children);
1036 }
1037
1038 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1039 {
1040 struct kvm_pte_chain *pte_chain;
1041 struct hlist_node *node;
1042 int i;
1043
1044 if (!sp->parent_pte)
1045 return;
1046
1047 if (!sp->multimapped) {
1048 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1049 return;
1050 }
1051
1052 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1053 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1054 if (!pte_chain->parent_ptes[i])
1055 break;
1056 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1057 }
1058 }
1059
1060 static int unsync_walk_fn(struct kvm_mmu_page *sp)
1061 {
1062 kvm_mmu_update_parents_unsync(sp);
1063 return 1;
1064 }
1065
1066 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1067 {
1068 mmu_parent_walk(sp, unsync_walk_fn);
1069 kvm_mmu_update_parents_unsync(sp);
1070 }
1071
1072 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1073 struct kvm_mmu_page *sp)
1074 {
1075 int i;
1076
1077 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1078 sp->spt[i] = shadow_trap_nonpresent_pte;
1079 }
1080
1081 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1082 struct kvm_mmu_page *sp)
1083 {
1084 return 1;
1085 }
1086
1087 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1088 {
1089 }
1090
1091 #define KVM_PAGE_ARRAY_NR 16
1092
1093 struct kvm_mmu_pages {
1094 struct mmu_page_and_offset {
1095 struct kvm_mmu_page *sp;
1096 unsigned int idx;
1097 } page[KVM_PAGE_ARRAY_NR];
1098 unsigned int nr;
1099 };
1100
1101 #define for_each_unsync_children(bitmap, idx) \
1102 for (idx = find_first_bit(bitmap, 512); \
1103 idx < 512; \
1104 idx = find_next_bit(bitmap, 512, idx+1))
1105
1106 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1107 int idx)
1108 {
1109 int i;
1110
1111 if (sp->unsync)
1112 for (i=0; i < pvec->nr; i++)
1113 if (pvec->page[i].sp == sp)
1114 return 0;
1115
1116 pvec->page[pvec->nr].sp = sp;
1117 pvec->page[pvec->nr].idx = idx;
1118 pvec->nr++;
1119 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1120 }
1121
1122 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1123 struct kvm_mmu_pages *pvec)
1124 {
1125 int i, ret, nr_unsync_leaf = 0;
1126
1127 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1128 u64 ent = sp->spt[i];
1129
1130 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1131 struct kvm_mmu_page *child;
1132 child = page_header(ent & PT64_BASE_ADDR_MASK);
1133
1134 if (child->unsync_children) {
1135 if (mmu_pages_add(pvec, child, i))
1136 return -ENOSPC;
1137
1138 ret = __mmu_unsync_walk(child, pvec);
1139 if (!ret)
1140 __clear_bit(i, sp->unsync_child_bitmap);
1141 else if (ret > 0)
1142 nr_unsync_leaf += ret;
1143 else
1144 return ret;
1145 }
1146
1147 if (child->unsync) {
1148 nr_unsync_leaf++;
1149 if (mmu_pages_add(pvec, child, i))
1150 return -ENOSPC;
1151 }
1152 }
1153 }
1154
1155 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1156 sp->unsync_children = 0;
1157
1158 return nr_unsync_leaf;
1159 }
1160
1161 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1162 struct kvm_mmu_pages *pvec)
1163 {
1164 if (!sp->unsync_children)
1165 return 0;
1166
1167 mmu_pages_add(pvec, sp, 0);
1168 return __mmu_unsync_walk(sp, pvec);
1169 }
1170
1171 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1172 {
1173 unsigned index;
1174 struct hlist_head *bucket;
1175 struct kvm_mmu_page *sp;
1176 struct hlist_node *node;
1177
1178 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1179 index = kvm_page_table_hashfn(gfn);
1180 bucket = &kvm->arch.mmu_page_hash[index];
1181 hlist_for_each_entry(sp, node, bucket, hash_link)
1182 if (sp->gfn == gfn && !sp->role.direct
1183 && !sp->role.invalid) {
1184 pgprintk("%s: found role %x\n",
1185 __func__, sp->role.word);
1186 return sp;
1187 }
1188 return NULL;
1189 }
1190
1191 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1192 {
1193 WARN_ON(!sp->unsync);
1194 sp->unsync = 0;
1195 --kvm->stat.mmu_unsync;
1196 }
1197
1198 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1199
1200 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1201 {
1202 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1203 kvm_mmu_zap_page(vcpu->kvm, sp);
1204 return 1;
1205 }
1206
1207 trace_kvm_mmu_sync_page(sp);
1208 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1209 kvm_flush_remote_tlbs(vcpu->kvm);
1210 kvm_unlink_unsync_page(vcpu->kvm, sp);
1211 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1212 kvm_mmu_zap_page(vcpu->kvm, sp);
1213 return 1;
1214 }
1215
1216 kvm_mmu_flush_tlb(vcpu);
1217 return 0;
1218 }
1219
1220 struct mmu_page_path {
1221 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1222 unsigned int idx[PT64_ROOT_LEVEL-1];
1223 };
1224
1225 #define for_each_sp(pvec, sp, parents, i) \
1226 for (i = mmu_pages_next(&pvec, &parents, -1), \
1227 sp = pvec.page[i].sp; \
1228 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1229 i = mmu_pages_next(&pvec, &parents, i))
1230
1231 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1232 struct mmu_page_path *parents,
1233 int i)
1234 {
1235 int n;
1236
1237 for (n = i+1; n < pvec->nr; n++) {
1238 struct kvm_mmu_page *sp = pvec->page[n].sp;
1239
1240 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1241 parents->idx[0] = pvec->page[n].idx;
1242 return n;
1243 }
1244
1245 parents->parent[sp->role.level-2] = sp;
1246 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1247 }
1248
1249 return n;
1250 }
1251
1252 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1253 {
1254 struct kvm_mmu_page *sp;
1255 unsigned int level = 0;
1256
1257 do {
1258 unsigned int idx = parents->idx[level];
1259
1260 sp = parents->parent[level];
1261 if (!sp)
1262 return;
1263
1264 --sp->unsync_children;
1265 WARN_ON((int)sp->unsync_children < 0);
1266 __clear_bit(idx, sp->unsync_child_bitmap);
1267 level++;
1268 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1269 }
1270
1271 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1272 struct mmu_page_path *parents,
1273 struct kvm_mmu_pages *pvec)
1274 {
1275 parents->parent[parent->role.level-1] = NULL;
1276 pvec->nr = 0;
1277 }
1278
1279 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1280 struct kvm_mmu_page *parent)
1281 {
1282 int i;
1283 struct kvm_mmu_page *sp;
1284 struct mmu_page_path parents;
1285 struct kvm_mmu_pages pages;
1286
1287 kvm_mmu_pages_init(parent, &parents, &pages);
1288 while (mmu_unsync_walk(parent, &pages)) {
1289 int protected = 0;
1290
1291 for_each_sp(pages, sp, parents, i)
1292 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1293
1294 if (protected)
1295 kvm_flush_remote_tlbs(vcpu->kvm);
1296
1297 for_each_sp(pages, sp, parents, i) {
1298 kvm_sync_page(vcpu, sp);
1299 mmu_pages_clear_parents(&parents);
1300 }
1301 cond_resched_lock(&vcpu->kvm->mmu_lock);
1302 kvm_mmu_pages_init(parent, &parents, &pages);
1303 }
1304 }
1305
1306 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1307 gfn_t gfn,
1308 gva_t gaddr,
1309 unsigned level,
1310 int direct,
1311 unsigned access,
1312 u64 *parent_pte)
1313 {
1314 union kvm_mmu_page_role role;
1315 unsigned index;
1316 unsigned quadrant;
1317 struct hlist_head *bucket;
1318 struct kvm_mmu_page *sp;
1319 struct hlist_node *node, *tmp;
1320
1321 role = vcpu->arch.mmu.base_role;
1322 role.level = level;
1323 role.direct = direct;
1324 if (role.direct)
1325 role.cr4_pae = 0;
1326 role.access = access;
1327 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1328 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1329 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1330 role.quadrant = quadrant;
1331 }
1332 index = kvm_page_table_hashfn(gfn);
1333 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1334 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1335 if (sp->gfn == gfn) {
1336 if (sp->unsync)
1337 if (kvm_sync_page(vcpu, sp))
1338 continue;
1339
1340 if (sp->role.word != role.word)
1341 continue;
1342
1343 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1344 if (sp->unsync_children) {
1345 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1346 kvm_mmu_mark_parents_unsync(sp);
1347 }
1348 trace_kvm_mmu_get_page(sp, false);
1349 return sp;
1350 }
1351 ++vcpu->kvm->stat.mmu_cache_miss;
1352 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1353 if (!sp)
1354 return sp;
1355 sp->gfn = gfn;
1356 sp->role = role;
1357 hlist_add_head(&sp->hash_link, bucket);
1358 if (!direct) {
1359 if (rmap_write_protect(vcpu->kvm, gfn))
1360 kvm_flush_remote_tlbs(vcpu->kvm);
1361 account_shadowed(vcpu->kvm, gfn);
1362 }
1363 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1364 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1365 else
1366 nonpaging_prefetch_page(vcpu, sp);
1367 trace_kvm_mmu_get_page(sp, true);
1368 return sp;
1369 }
1370
1371 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1372 struct kvm_vcpu *vcpu, u64 addr)
1373 {
1374 iterator->addr = addr;
1375 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1376 iterator->level = vcpu->arch.mmu.shadow_root_level;
1377 if (iterator->level == PT32E_ROOT_LEVEL) {
1378 iterator->shadow_addr
1379 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1380 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1381 --iterator->level;
1382 if (!iterator->shadow_addr)
1383 iterator->level = 0;
1384 }
1385 }
1386
1387 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1388 {
1389 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1390 return false;
1391
1392 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1393 if (is_large_pte(*iterator->sptep))
1394 return false;
1395
1396 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1397 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1398 return true;
1399 }
1400
1401 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1402 {
1403 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1404 --iterator->level;
1405 }
1406
1407 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1408 struct kvm_mmu_page *sp)
1409 {
1410 unsigned i;
1411 u64 *pt;
1412 u64 ent;
1413
1414 pt = sp->spt;
1415
1416 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1417 ent = pt[i];
1418
1419 if (is_shadow_present_pte(ent)) {
1420 if (!is_last_spte(ent, sp->role.level)) {
1421 ent &= PT64_BASE_ADDR_MASK;
1422 mmu_page_remove_parent_pte(page_header(ent),
1423 &pt[i]);
1424 } else {
1425 if (is_large_pte(ent))
1426 --kvm->stat.lpages;
1427 rmap_remove(kvm, &pt[i]);
1428 }
1429 }
1430 pt[i] = shadow_trap_nonpresent_pte;
1431 }
1432 }
1433
1434 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1435 {
1436 mmu_page_remove_parent_pte(sp, parent_pte);
1437 }
1438
1439 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1440 {
1441 int i;
1442 struct kvm_vcpu *vcpu;
1443
1444 kvm_for_each_vcpu(i, vcpu, kvm)
1445 vcpu->arch.last_pte_updated = NULL;
1446 }
1447
1448 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1449 {
1450 u64 *parent_pte;
1451
1452 while (sp->multimapped || sp->parent_pte) {
1453 if (!sp->multimapped)
1454 parent_pte = sp->parent_pte;
1455 else {
1456 struct kvm_pte_chain *chain;
1457
1458 chain = container_of(sp->parent_ptes.first,
1459 struct kvm_pte_chain, link);
1460 parent_pte = chain->parent_ptes[0];
1461 }
1462 BUG_ON(!parent_pte);
1463 kvm_mmu_put_page(sp, parent_pte);
1464 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1465 }
1466 }
1467
1468 static int mmu_zap_unsync_children(struct kvm *kvm,
1469 struct kvm_mmu_page *parent)
1470 {
1471 int i, zapped = 0;
1472 struct mmu_page_path parents;
1473 struct kvm_mmu_pages pages;
1474
1475 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1476 return 0;
1477
1478 kvm_mmu_pages_init(parent, &parents, &pages);
1479 while (mmu_unsync_walk(parent, &pages)) {
1480 struct kvm_mmu_page *sp;
1481
1482 for_each_sp(pages, sp, parents, i) {
1483 kvm_mmu_zap_page(kvm, sp);
1484 mmu_pages_clear_parents(&parents);
1485 zapped++;
1486 }
1487 kvm_mmu_pages_init(parent, &parents, &pages);
1488 }
1489
1490 return zapped;
1491 }
1492
1493 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1494 {
1495 int ret;
1496
1497 trace_kvm_mmu_zap_page(sp);
1498 ++kvm->stat.mmu_shadow_zapped;
1499 ret = mmu_zap_unsync_children(kvm, sp);
1500 kvm_mmu_page_unlink_children(kvm, sp);
1501 kvm_mmu_unlink_parents(kvm, sp);
1502 kvm_flush_remote_tlbs(kvm);
1503 if (!sp->role.invalid && !sp->role.direct)
1504 unaccount_shadowed(kvm, sp->gfn);
1505 if (sp->unsync)
1506 kvm_unlink_unsync_page(kvm, sp);
1507 if (!sp->root_count) {
1508 hlist_del(&sp->hash_link);
1509 kvm_mmu_free_page(kvm, sp);
1510 } else {
1511 sp->role.invalid = 1;
1512 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1513 kvm_reload_remote_mmus(kvm);
1514 }
1515 kvm_mmu_reset_last_pte_updated(kvm);
1516 return ret;
1517 }
1518
1519 /*
1520 * Changing the number of mmu pages allocated to the vm
1521 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1522 */
1523 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1524 {
1525 int used_pages;
1526
1527 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1528 used_pages = max(0, used_pages);
1529
1530 /*
1531 * If we set the number of mmu pages to be smaller be than the
1532 * number of actived pages , we must to free some mmu pages before we
1533 * change the value
1534 */
1535
1536 if (used_pages > kvm_nr_mmu_pages) {
1537 while (used_pages > kvm_nr_mmu_pages &&
1538 !list_empty(&kvm->arch.active_mmu_pages)) {
1539 struct kvm_mmu_page *page;
1540
1541 page = container_of(kvm->arch.active_mmu_pages.prev,
1542 struct kvm_mmu_page, link);
1543 used_pages -= kvm_mmu_zap_page(kvm, page);
1544 used_pages--;
1545 }
1546 kvm_nr_mmu_pages = used_pages;
1547 kvm->arch.n_free_mmu_pages = 0;
1548 }
1549 else
1550 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1551 - kvm->arch.n_alloc_mmu_pages;
1552
1553 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1554 }
1555
1556 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1557 {
1558 unsigned index;
1559 struct hlist_head *bucket;
1560 struct kvm_mmu_page *sp;
1561 struct hlist_node *node, *n;
1562 int r;
1563
1564 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1565 r = 0;
1566 index = kvm_page_table_hashfn(gfn);
1567 bucket = &kvm->arch.mmu_page_hash[index];
1568 restart:
1569 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1570 if (sp->gfn == gfn && !sp->role.direct) {
1571 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1572 sp->role.word);
1573 r = 1;
1574 if (kvm_mmu_zap_page(kvm, sp))
1575 goto restart;
1576 }
1577 return r;
1578 }
1579
1580 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1581 {
1582 unsigned index;
1583 struct hlist_head *bucket;
1584 struct kvm_mmu_page *sp;
1585 struct hlist_node *node, *nn;
1586
1587 index = kvm_page_table_hashfn(gfn);
1588 bucket = &kvm->arch.mmu_page_hash[index];
1589 restart:
1590 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1591 if (sp->gfn == gfn && !sp->role.direct
1592 && !sp->role.invalid) {
1593 pgprintk("%s: zap %lx %x\n",
1594 __func__, gfn, sp->role.word);
1595 if (kvm_mmu_zap_page(kvm, sp))
1596 goto restart;
1597 }
1598 }
1599 }
1600
1601 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1602 {
1603 int slot = memslot_id(kvm, gfn);
1604 struct kvm_mmu_page *sp = page_header(__pa(pte));
1605
1606 __set_bit(slot, sp->slot_bitmap);
1607 }
1608
1609 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1610 {
1611 int i;
1612 u64 *pt = sp->spt;
1613
1614 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1615 return;
1616
1617 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1618 if (pt[i] == shadow_notrap_nonpresent_pte)
1619 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1620 }
1621 }
1622
1623 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1624 {
1625 struct page *page;
1626
1627 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
1628
1629 if (gpa == UNMAPPED_GVA)
1630 return NULL;
1631
1632 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1633
1634 return page;
1635 }
1636
1637 /*
1638 * The function is based on mtrr_type_lookup() in
1639 * arch/x86/kernel/cpu/mtrr/generic.c
1640 */
1641 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1642 u64 start, u64 end)
1643 {
1644 int i;
1645 u64 base, mask;
1646 u8 prev_match, curr_match;
1647 int num_var_ranges = KVM_NR_VAR_MTRR;
1648
1649 if (!mtrr_state->enabled)
1650 return 0xFF;
1651
1652 /* Make end inclusive end, instead of exclusive */
1653 end--;
1654
1655 /* Look in fixed ranges. Just return the type as per start */
1656 if (mtrr_state->have_fixed && (start < 0x100000)) {
1657 int idx;
1658
1659 if (start < 0x80000) {
1660 idx = 0;
1661 idx += (start >> 16);
1662 return mtrr_state->fixed_ranges[idx];
1663 } else if (start < 0xC0000) {
1664 idx = 1 * 8;
1665 idx += ((start - 0x80000) >> 14);
1666 return mtrr_state->fixed_ranges[idx];
1667 } else if (start < 0x1000000) {
1668 idx = 3 * 8;
1669 idx += ((start - 0xC0000) >> 12);
1670 return mtrr_state->fixed_ranges[idx];
1671 }
1672 }
1673
1674 /*
1675 * Look in variable ranges
1676 * Look of multiple ranges matching this address and pick type
1677 * as per MTRR precedence
1678 */
1679 if (!(mtrr_state->enabled & 2))
1680 return mtrr_state->def_type;
1681
1682 prev_match = 0xFF;
1683 for (i = 0; i < num_var_ranges; ++i) {
1684 unsigned short start_state, end_state;
1685
1686 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1687 continue;
1688
1689 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1690 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1691 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1692 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1693
1694 start_state = ((start & mask) == (base & mask));
1695 end_state = ((end & mask) == (base & mask));
1696 if (start_state != end_state)
1697 return 0xFE;
1698
1699 if ((start & mask) != (base & mask))
1700 continue;
1701
1702 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1703 if (prev_match == 0xFF) {
1704 prev_match = curr_match;
1705 continue;
1706 }
1707
1708 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1709 curr_match == MTRR_TYPE_UNCACHABLE)
1710 return MTRR_TYPE_UNCACHABLE;
1711
1712 if ((prev_match == MTRR_TYPE_WRBACK &&
1713 curr_match == MTRR_TYPE_WRTHROUGH) ||
1714 (prev_match == MTRR_TYPE_WRTHROUGH &&
1715 curr_match == MTRR_TYPE_WRBACK)) {
1716 prev_match = MTRR_TYPE_WRTHROUGH;
1717 curr_match = MTRR_TYPE_WRTHROUGH;
1718 }
1719
1720 if (prev_match != curr_match)
1721 return MTRR_TYPE_UNCACHABLE;
1722 }
1723
1724 if (prev_match != 0xFF)
1725 return prev_match;
1726
1727 return mtrr_state->def_type;
1728 }
1729
1730 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1731 {
1732 u8 mtrr;
1733
1734 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1735 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1736 if (mtrr == 0xfe || mtrr == 0xff)
1737 mtrr = MTRR_TYPE_WRBACK;
1738 return mtrr;
1739 }
1740 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1741
1742 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1743 {
1744 unsigned index;
1745 struct hlist_head *bucket;
1746 struct kvm_mmu_page *s;
1747 struct hlist_node *node, *n;
1748
1749 trace_kvm_mmu_unsync_page(sp);
1750 index = kvm_page_table_hashfn(sp->gfn);
1751 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1752 /* don't unsync if pagetable is shadowed with multiple roles */
1753 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1754 if (s->gfn != sp->gfn || s->role.direct)
1755 continue;
1756 if (s->role.word != sp->role.word)
1757 return 1;
1758 }
1759 ++vcpu->kvm->stat.mmu_unsync;
1760 sp->unsync = 1;
1761
1762 kvm_mmu_mark_parents_unsync(sp);
1763
1764 mmu_convert_notrap(sp);
1765 return 0;
1766 }
1767
1768 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1769 bool can_unsync)
1770 {
1771 struct kvm_mmu_page *shadow;
1772
1773 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1774 if (shadow) {
1775 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1776 return 1;
1777 if (shadow->unsync)
1778 return 0;
1779 if (can_unsync && oos_shadow)
1780 return kvm_unsync_page(vcpu, shadow);
1781 return 1;
1782 }
1783 return 0;
1784 }
1785
1786 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1787 unsigned pte_access, int user_fault,
1788 int write_fault, int dirty, int level,
1789 gfn_t gfn, pfn_t pfn, bool speculative,
1790 bool can_unsync, bool reset_host_protection)
1791 {
1792 u64 spte;
1793 int ret = 0;
1794
1795 /*
1796 * We don't set the accessed bit, since we sometimes want to see
1797 * whether the guest actually used the pte (in order to detect
1798 * demand paging).
1799 */
1800 spte = shadow_base_present_pte | shadow_dirty_mask;
1801 if (!speculative)
1802 spte |= shadow_accessed_mask;
1803 if (!dirty)
1804 pte_access &= ~ACC_WRITE_MASK;
1805 if (pte_access & ACC_EXEC_MASK)
1806 spte |= shadow_x_mask;
1807 else
1808 spte |= shadow_nx_mask;
1809 if (pte_access & ACC_USER_MASK)
1810 spte |= shadow_user_mask;
1811 if (level > PT_PAGE_TABLE_LEVEL)
1812 spte |= PT_PAGE_SIZE_MASK;
1813 if (tdp_enabled)
1814 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1815 kvm_is_mmio_pfn(pfn));
1816
1817 if (reset_host_protection)
1818 spte |= SPTE_HOST_WRITEABLE;
1819
1820 spte |= (u64)pfn << PAGE_SHIFT;
1821
1822 if ((pte_access & ACC_WRITE_MASK)
1823 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1824
1825 if (level > PT_PAGE_TABLE_LEVEL &&
1826 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1827 ret = 1;
1828 spte = shadow_trap_nonpresent_pte;
1829 goto set_pte;
1830 }
1831
1832 spte |= PT_WRITABLE_MASK;
1833
1834 /*
1835 * Optimization: for pte sync, if spte was writable the hash
1836 * lookup is unnecessary (and expensive). Write protection
1837 * is responsibility of mmu_get_page / kvm_sync_page.
1838 * Same reasoning can be applied to dirty page accounting.
1839 */
1840 if (!can_unsync && is_writable_pte(*sptep))
1841 goto set_pte;
1842
1843 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1844 pgprintk("%s: found shadow page for %lx, marking ro\n",
1845 __func__, gfn);
1846 ret = 1;
1847 pte_access &= ~ACC_WRITE_MASK;
1848 if (is_writable_pte(spte))
1849 spte &= ~PT_WRITABLE_MASK;
1850 }
1851 }
1852
1853 if (pte_access & ACC_WRITE_MASK)
1854 mark_page_dirty(vcpu->kvm, gfn);
1855
1856 set_pte:
1857 __set_spte(sptep, spte);
1858 return ret;
1859 }
1860
1861 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1862 unsigned pt_access, unsigned pte_access,
1863 int user_fault, int write_fault, int dirty,
1864 int *ptwrite, int level, gfn_t gfn,
1865 pfn_t pfn, bool speculative,
1866 bool reset_host_protection)
1867 {
1868 int was_rmapped = 0;
1869 int was_writable = is_writable_pte(*sptep);
1870 int rmap_count;
1871
1872 pgprintk("%s: spte %llx access %x write_fault %d"
1873 " user_fault %d gfn %lx\n",
1874 __func__, *sptep, pt_access,
1875 write_fault, user_fault, gfn);
1876
1877 if (is_rmap_spte(*sptep)) {
1878 /*
1879 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1880 * the parent of the now unreachable PTE.
1881 */
1882 if (level > PT_PAGE_TABLE_LEVEL &&
1883 !is_large_pte(*sptep)) {
1884 struct kvm_mmu_page *child;
1885 u64 pte = *sptep;
1886
1887 child = page_header(pte & PT64_BASE_ADDR_MASK);
1888 mmu_page_remove_parent_pte(child, sptep);
1889 } else if (pfn != spte_to_pfn(*sptep)) {
1890 pgprintk("hfn old %lx new %lx\n",
1891 spte_to_pfn(*sptep), pfn);
1892 rmap_remove(vcpu->kvm, sptep);
1893 } else
1894 was_rmapped = 1;
1895 }
1896
1897 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1898 dirty, level, gfn, pfn, speculative, true,
1899 reset_host_protection)) {
1900 if (write_fault)
1901 *ptwrite = 1;
1902 kvm_x86_ops->tlb_flush(vcpu);
1903 }
1904
1905 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1906 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1907 is_large_pte(*sptep)? "2MB" : "4kB",
1908 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1909 *sptep, sptep);
1910 if (!was_rmapped && is_large_pte(*sptep))
1911 ++vcpu->kvm->stat.lpages;
1912
1913 page_header_update_slot(vcpu->kvm, sptep, gfn);
1914 if (!was_rmapped) {
1915 rmap_count = rmap_add(vcpu, sptep, gfn);
1916 kvm_release_pfn_clean(pfn);
1917 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1918 rmap_recycle(vcpu, sptep, gfn);
1919 } else {
1920 if (was_writable)
1921 kvm_release_pfn_dirty(pfn);
1922 else
1923 kvm_release_pfn_clean(pfn);
1924 }
1925 if (speculative) {
1926 vcpu->arch.last_pte_updated = sptep;
1927 vcpu->arch.last_pte_gfn = gfn;
1928 }
1929 }
1930
1931 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1932 {
1933 }
1934
1935 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1936 int level, gfn_t gfn, pfn_t pfn)
1937 {
1938 struct kvm_shadow_walk_iterator iterator;
1939 struct kvm_mmu_page *sp;
1940 int pt_write = 0;
1941 gfn_t pseudo_gfn;
1942
1943 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1944 if (iterator.level == level) {
1945 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1946 0, write, 1, &pt_write,
1947 level, gfn, pfn, false, true);
1948 ++vcpu->stat.pf_fixed;
1949 break;
1950 }
1951
1952 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1953 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1954 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1955 iterator.level - 1,
1956 1, ACC_ALL, iterator.sptep);
1957 if (!sp) {
1958 pgprintk("nonpaging_map: ENOMEM\n");
1959 kvm_release_pfn_clean(pfn);
1960 return -ENOMEM;
1961 }
1962
1963 __set_spte(iterator.sptep,
1964 __pa(sp->spt)
1965 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1966 | shadow_user_mask | shadow_x_mask);
1967 }
1968 }
1969 return pt_write;
1970 }
1971
1972 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1973 {
1974 int r;
1975 int level;
1976 pfn_t pfn;
1977 unsigned long mmu_seq;
1978
1979 level = mapping_level(vcpu, gfn);
1980
1981 /*
1982 * This path builds a PAE pagetable - so we can map 2mb pages at
1983 * maximum. Therefore check if the level is larger than that.
1984 */
1985 if (level > PT_DIRECTORY_LEVEL)
1986 level = PT_DIRECTORY_LEVEL;
1987
1988 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
1989
1990 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1991 smp_rmb();
1992 pfn = gfn_to_pfn(vcpu->kvm, gfn);
1993
1994 /* mmio */
1995 if (is_error_pfn(pfn)) {
1996 kvm_release_pfn_clean(pfn);
1997 return 1;
1998 }
1999
2000 spin_lock(&vcpu->kvm->mmu_lock);
2001 if (mmu_notifier_retry(vcpu, mmu_seq))
2002 goto out_unlock;
2003 kvm_mmu_free_some_pages(vcpu);
2004 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2005 spin_unlock(&vcpu->kvm->mmu_lock);
2006
2007
2008 return r;
2009
2010 out_unlock:
2011 spin_unlock(&vcpu->kvm->mmu_lock);
2012 kvm_release_pfn_clean(pfn);
2013 return 0;
2014 }
2015
2016
2017 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2018 {
2019 int i;
2020 struct kvm_mmu_page *sp;
2021
2022 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2023 return;
2024 spin_lock(&vcpu->kvm->mmu_lock);
2025 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2026 hpa_t root = vcpu->arch.mmu.root_hpa;
2027
2028 sp = page_header(root);
2029 --sp->root_count;
2030 if (!sp->root_count && sp->role.invalid)
2031 kvm_mmu_zap_page(vcpu->kvm, sp);
2032 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2033 spin_unlock(&vcpu->kvm->mmu_lock);
2034 return;
2035 }
2036 for (i = 0; i < 4; ++i) {
2037 hpa_t root = vcpu->arch.mmu.pae_root[i];
2038
2039 if (root) {
2040 root &= PT64_BASE_ADDR_MASK;
2041 sp = page_header(root);
2042 --sp->root_count;
2043 if (!sp->root_count && sp->role.invalid)
2044 kvm_mmu_zap_page(vcpu->kvm, sp);
2045 }
2046 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2047 }
2048 spin_unlock(&vcpu->kvm->mmu_lock);
2049 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2050 }
2051
2052 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2053 {
2054 int ret = 0;
2055
2056 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2057 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2058 ret = 1;
2059 }
2060
2061 return ret;
2062 }
2063
2064 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2065 {
2066 int i;
2067 gfn_t root_gfn;
2068 struct kvm_mmu_page *sp;
2069 int direct = 0;
2070 u64 pdptr;
2071
2072 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2073
2074 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2075 hpa_t root = vcpu->arch.mmu.root_hpa;
2076
2077 ASSERT(!VALID_PAGE(root));
2078 if (tdp_enabled)
2079 direct = 1;
2080 if (mmu_check_root(vcpu, root_gfn))
2081 return 1;
2082 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2083 PT64_ROOT_LEVEL, direct,
2084 ACC_ALL, NULL);
2085 root = __pa(sp->spt);
2086 ++sp->root_count;
2087 vcpu->arch.mmu.root_hpa = root;
2088 return 0;
2089 }
2090 direct = !is_paging(vcpu);
2091 if (tdp_enabled)
2092 direct = 1;
2093 for (i = 0; i < 4; ++i) {
2094 hpa_t root = vcpu->arch.mmu.pae_root[i];
2095
2096 ASSERT(!VALID_PAGE(root));
2097 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2098 pdptr = kvm_pdptr_read(vcpu, i);
2099 if (!is_present_gpte(pdptr)) {
2100 vcpu->arch.mmu.pae_root[i] = 0;
2101 continue;
2102 }
2103 root_gfn = pdptr >> PAGE_SHIFT;
2104 } else if (vcpu->arch.mmu.root_level == 0)
2105 root_gfn = 0;
2106 if (mmu_check_root(vcpu, root_gfn))
2107 return 1;
2108 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2109 PT32_ROOT_LEVEL, direct,
2110 ACC_ALL, NULL);
2111 root = __pa(sp->spt);
2112 ++sp->root_count;
2113 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2114 }
2115 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2116 return 0;
2117 }
2118
2119 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2120 {
2121 int i;
2122 struct kvm_mmu_page *sp;
2123
2124 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2125 return;
2126 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2127 hpa_t root = vcpu->arch.mmu.root_hpa;
2128 sp = page_header(root);
2129 mmu_sync_children(vcpu, sp);
2130 return;
2131 }
2132 for (i = 0; i < 4; ++i) {
2133 hpa_t root = vcpu->arch.mmu.pae_root[i];
2134
2135 if (root && VALID_PAGE(root)) {
2136 root &= PT64_BASE_ADDR_MASK;
2137 sp = page_header(root);
2138 mmu_sync_children(vcpu, sp);
2139 }
2140 }
2141 }
2142
2143 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2144 {
2145 spin_lock(&vcpu->kvm->mmu_lock);
2146 mmu_sync_roots(vcpu);
2147 spin_unlock(&vcpu->kvm->mmu_lock);
2148 }
2149
2150 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2151 u32 access, u32 *error)
2152 {
2153 if (error)
2154 *error = 0;
2155 return vaddr;
2156 }
2157
2158 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2159 u32 error_code)
2160 {
2161 gfn_t gfn;
2162 int r;
2163
2164 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2165 r = mmu_topup_memory_caches(vcpu);
2166 if (r)
2167 return r;
2168
2169 ASSERT(vcpu);
2170 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2171
2172 gfn = gva >> PAGE_SHIFT;
2173
2174 return nonpaging_map(vcpu, gva & PAGE_MASK,
2175 error_code & PFERR_WRITE_MASK, gfn);
2176 }
2177
2178 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2179 u32 error_code)
2180 {
2181 pfn_t pfn;
2182 int r;
2183 int level;
2184 gfn_t gfn = gpa >> PAGE_SHIFT;
2185 unsigned long mmu_seq;
2186
2187 ASSERT(vcpu);
2188 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2189
2190 r = mmu_topup_memory_caches(vcpu);
2191 if (r)
2192 return r;
2193
2194 level = mapping_level(vcpu, gfn);
2195
2196 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2197
2198 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2199 smp_rmb();
2200 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2201 if (is_error_pfn(pfn)) {
2202 kvm_release_pfn_clean(pfn);
2203 return 1;
2204 }
2205 spin_lock(&vcpu->kvm->mmu_lock);
2206 if (mmu_notifier_retry(vcpu, mmu_seq))
2207 goto out_unlock;
2208 kvm_mmu_free_some_pages(vcpu);
2209 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2210 level, gfn, pfn);
2211 spin_unlock(&vcpu->kvm->mmu_lock);
2212
2213 return r;
2214
2215 out_unlock:
2216 spin_unlock(&vcpu->kvm->mmu_lock);
2217 kvm_release_pfn_clean(pfn);
2218 return 0;
2219 }
2220
2221 static void nonpaging_free(struct kvm_vcpu *vcpu)
2222 {
2223 mmu_free_roots(vcpu);
2224 }
2225
2226 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2227 {
2228 struct kvm_mmu *context = &vcpu->arch.mmu;
2229
2230 context->new_cr3 = nonpaging_new_cr3;
2231 context->page_fault = nonpaging_page_fault;
2232 context->gva_to_gpa = nonpaging_gva_to_gpa;
2233 context->free = nonpaging_free;
2234 context->prefetch_page = nonpaging_prefetch_page;
2235 context->sync_page = nonpaging_sync_page;
2236 context->invlpg = nonpaging_invlpg;
2237 context->root_level = 0;
2238 context->shadow_root_level = PT32E_ROOT_LEVEL;
2239 context->root_hpa = INVALID_PAGE;
2240 return 0;
2241 }
2242
2243 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2244 {
2245 ++vcpu->stat.tlb_flush;
2246 kvm_x86_ops->tlb_flush(vcpu);
2247 }
2248
2249 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2250 {
2251 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2252 mmu_free_roots(vcpu);
2253 }
2254
2255 static void inject_page_fault(struct kvm_vcpu *vcpu,
2256 u64 addr,
2257 u32 err_code)
2258 {
2259 kvm_inject_page_fault(vcpu, addr, err_code);
2260 }
2261
2262 static void paging_free(struct kvm_vcpu *vcpu)
2263 {
2264 nonpaging_free(vcpu);
2265 }
2266
2267 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2268 {
2269 int bit7;
2270
2271 bit7 = (gpte >> 7) & 1;
2272 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2273 }
2274
2275 #define PTTYPE 64
2276 #include "paging_tmpl.h"
2277 #undef PTTYPE
2278
2279 #define PTTYPE 32
2280 #include "paging_tmpl.h"
2281 #undef PTTYPE
2282
2283 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2284 {
2285 struct kvm_mmu *context = &vcpu->arch.mmu;
2286 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2287 u64 exb_bit_rsvd = 0;
2288
2289 if (!is_nx(vcpu))
2290 exb_bit_rsvd = rsvd_bits(63, 63);
2291 switch (level) {
2292 case PT32_ROOT_LEVEL:
2293 /* no rsvd bits for 2 level 4K page table entries */
2294 context->rsvd_bits_mask[0][1] = 0;
2295 context->rsvd_bits_mask[0][0] = 0;
2296 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2297
2298 if (!is_pse(vcpu)) {
2299 context->rsvd_bits_mask[1][1] = 0;
2300 break;
2301 }
2302
2303 if (is_cpuid_PSE36())
2304 /* 36bits PSE 4MB page */
2305 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2306 else
2307 /* 32 bits PSE 4MB page */
2308 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2309 break;
2310 case PT32E_ROOT_LEVEL:
2311 context->rsvd_bits_mask[0][2] =
2312 rsvd_bits(maxphyaddr, 63) |
2313 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2314 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2315 rsvd_bits(maxphyaddr, 62); /* PDE */
2316 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2317 rsvd_bits(maxphyaddr, 62); /* PTE */
2318 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2319 rsvd_bits(maxphyaddr, 62) |
2320 rsvd_bits(13, 20); /* large page */
2321 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2322 break;
2323 case PT64_ROOT_LEVEL:
2324 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2325 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2326 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2327 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2328 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2329 rsvd_bits(maxphyaddr, 51);
2330 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2331 rsvd_bits(maxphyaddr, 51);
2332 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2333 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2334 rsvd_bits(maxphyaddr, 51) |
2335 rsvd_bits(13, 29);
2336 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2337 rsvd_bits(maxphyaddr, 51) |
2338 rsvd_bits(13, 20); /* large page */
2339 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2340 break;
2341 }
2342 }
2343
2344 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2345 {
2346 struct kvm_mmu *context = &vcpu->arch.mmu;
2347
2348 ASSERT(is_pae(vcpu));
2349 context->new_cr3 = paging_new_cr3;
2350 context->page_fault = paging64_page_fault;
2351 context->gva_to_gpa = paging64_gva_to_gpa;
2352 context->prefetch_page = paging64_prefetch_page;
2353 context->sync_page = paging64_sync_page;
2354 context->invlpg = paging64_invlpg;
2355 context->free = paging_free;
2356 context->root_level = level;
2357 context->shadow_root_level = level;
2358 context->root_hpa = INVALID_PAGE;
2359 return 0;
2360 }
2361
2362 static int paging64_init_context(struct kvm_vcpu *vcpu)
2363 {
2364 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2365 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2366 }
2367
2368 static int paging32_init_context(struct kvm_vcpu *vcpu)
2369 {
2370 struct kvm_mmu *context = &vcpu->arch.mmu;
2371
2372 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2373 context->new_cr3 = paging_new_cr3;
2374 context->page_fault = paging32_page_fault;
2375 context->gva_to_gpa = paging32_gva_to_gpa;
2376 context->free = paging_free;
2377 context->prefetch_page = paging32_prefetch_page;
2378 context->sync_page = paging32_sync_page;
2379 context->invlpg = paging32_invlpg;
2380 context->root_level = PT32_ROOT_LEVEL;
2381 context->shadow_root_level = PT32E_ROOT_LEVEL;
2382 context->root_hpa = INVALID_PAGE;
2383 return 0;
2384 }
2385
2386 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2387 {
2388 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2389 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2390 }
2391
2392 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2393 {
2394 struct kvm_mmu *context = &vcpu->arch.mmu;
2395
2396 context->new_cr3 = nonpaging_new_cr3;
2397 context->page_fault = tdp_page_fault;
2398 context->free = nonpaging_free;
2399 context->prefetch_page = nonpaging_prefetch_page;
2400 context->sync_page = nonpaging_sync_page;
2401 context->invlpg = nonpaging_invlpg;
2402 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2403 context->root_hpa = INVALID_PAGE;
2404
2405 if (!is_paging(vcpu)) {
2406 context->gva_to_gpa = nonpaging_gva_to_gpa;
2407 context->root_level = 0;
2408 } else if (is_long_mode(vcpu)) {
2409 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2410 context->gva_to_gpa = paging64_gva_to_gpa;
2411 context->root_level = PT64_ROOT_LEVEL;
2412 } else if (is_pae(vcpu)) {
2413 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2414 context->gva_to_gpa = paging64_gva_to_gpa;
2415 context->root_level = PT32E_ROOT_LEVEL;
2416 } else {
2417 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2418 context->gva_to_gpa = paging32_gva_to_gpa;
2419 context->root_level = PT32_ROOT_LEVEL;
2420 }
2421
2422 return 0;
2423 }
2424
2425 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2426 {
2427 int r;
2428
2429 ASSERT(vcpu);
2430 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2431
2432 if (!is_paging(vcpu))
2433 r = nonpaging_init_context(vcpu);
2434 else if (is_long_mode(vcpu))
2435 r = paging64_init_context(vcpu);
2436 else if (is_pae(vcpu))
2437 r = paging32E_init_context(vcpu);
2438 else
2439 r = paging32_init_context(vcpu);
2440
2441 vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2442
2443 return r;
2444 }
2445
2446 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2447 {
2448 vcpu->arch.update_pte.pfn = bad_pfn;
2449
2450 if (tdp_enabled)
2451 return init_kvm_tdp_mmu(vcpu);
2452 else
2453 return init_kvm_softmmu(vcpu);
2454 }
2455
2456 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2457 {
2458 ASSERT(vcpu);
2459 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2460 vcpu->arch.mmu.free(vcpu);
2461 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2462 }
2463 }
2464
2465 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2466 {
2467 destroy_kvm_mmu(vcpu);
2468 return init_kvm_mmu(vcpu);
2469 }
2470 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2471
2472 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2473 {
2474 int r;
2475
2476 r = mmu_topup_memory_caches(vcpu);
2477 if (r)
2478 goto out;
2479 spin_lock(&vcpu->kvm->mmu_lock);
2480 kvm_mmu_free_some_pages(vcpu);
2481 r = mmu_alloc_roots(vcpu);
2482 mmu_sync_roots(vcpu);
2483 spin_unlock(&vcpu->kvm->mmu_lock);
2484 if (r)
2485 goto out;
2486 /* set_cr3() should ensure TLB has been flushed */
2487 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2488 out:
2489 return r;
2490 }
2491 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2492
2493 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2494 {
2495 mmu_free_roots(vcpu);
2496 }
2497
2498 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2499 struct kvm_mmu_page *sp,
2500 u64 *spte)
2501 {
2502 u64 pte;
2503 struct kvm_mmu_page *child;
2504
2505 pte = *spte;
2506 if (is_shadow_present_pte(pte)) {
2507 if (is_last_spte(pte, sp->role.level))
2508 rmap_remove(vcpu->kvm, spte);
2509 else {
2510 child = page_header(pte & PT64_BASE_ADDR_MASK);
2511 mmu_page_remove_parent_pte(child, spte);
2512 }
2513 }
2514 __set_spte(spte, shadow_trap_nonpresent_pte);
2515 if (is_large_pte(pte))
2516 --vcpu->kvm->stat.lpages;
2517 }
2518
2519 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2520 struct kvm_mmu_page *sp,
2521 u64 *spte,
2522 const void *new)
2523 {
2524 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2525 ++vcpu->kvm->stat.mmu_pde_zapped;
2526 return;
2527 }
2528
2529 ++vcpu->kvm->stat.mmu_pte_updated;
2530 if (!sp->role.cr4_pae)
2531 paging32_update_pte(vcpu, sp, spte, new);
2532 else
2533 paging64_update_pte(vcpu, sp, spte, new);
2534 }
2535
2536 static bool need_remote_flush(u64 old, u64 new)
2537 {
2538 if (!is_shadow_present_pte(old))
2539 return false;
2540 if (!is_shadow_present_pte(new))
2541 return true;
2542 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2543 return true;
2544 old ^= PT64_NX_MASK;
2545 new ^= PT64_NX_MASK;
2546 return (old & ~new & PT64_PERM_MASK) != 0;
2547 }
2548
2549 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2550 {
2551 if (need_remote_flush(old, new))
2552 kvm_flush_remote_tlbs(vcpu->kvm);
2553 else
2554 kvm_mmu_flush_tlb(vcpu);
2555 }
2556
2557 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2558 {
2559 u64 *spte = vcpu->arch.last_pte_updated;
2560
2561 return !!(spte && (*spte & shadow_accessed_mask));
2562 }
2563
2564 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2565 u64 gpte)
2566 {
2567 gfn_t gfn;
2568 pfn_t pfn;
2569
2570 if (!is_present_gpte(gpte))
2571 return;
2572 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2573
2574 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2575 smp_rmb();
2576 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2577
2578 if (is_error_pfn(pfn)) {
2579 kvm_release_pfn_clean(pfn);
2580 return;
2581 }
2582 vcpu->arch.update_pte.gfn = gfn;
2583 vcpu->arch.update_pte.pfn = pfn;
2584 }
2585
2586 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2587 {
2588 u64 *spte = vcpu->arch.last_pte_updated;
2589
2590 if (spte
2591 && vcpu->arch.last_pte_gfn == gfn
2592 && shadow_accessed_mask
2593 && !(*spte & shadow_accessed_mask)
2594 && is_shadow_present_pte(*spte))
2595 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2596 }
2597
2598 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2599 const u8 *new, int bytes,
2600 bool guest_initiated)
2601 {
2602 gfn_t gfn = gpa >> PAGE_SHIFT;
2603 struct kvm_mmu_page *sp;
2604 struct hlist_node *node, *n;
2605 struct hlist_head *bucket;
2606 unsigned index;
2607 u64 entry, gentry;
2608 u64 *spte;
2609 unsigned offset = offset_in_page(gpa);
2610 unsigned pte_size;
2611 unsigned page_offset;
2612 unsigned misaligned;
2613 unsigned quadrant;
2614 int level;
2615 int flooded = 0;
2616 int npte;
2617 int r;
2618 int invlpg_counter;
2619
2620 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2621
2622 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2623
2624 /*
2625 * Assume that the pte write on a page table of the same type
2626 * as the current vcpu paging mode. This is nearly always true
2627 * (might be false while changing modes). Note it is verified later
2628 * by update_pte().
2629 */
2630 if ((is_pae(vcpu) && bytes == 4) || !new) {
2631 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2632 if (is_pae(vcpu)) {
2633 gpa &= ~(gpa_t)7;
2634 bytes = 8;
2635 }
2636 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2637 if (r)
2638 gentry = 0;
2639 new = (const u8 *)&gentry;
2640 }
2641
2642 switch (bytes) {
2643 case 4:
2644 gentry = *(const u32 *)new;
2645 break;
2646 case 8:
2647 gentry = *(const u64 *)new;
2648 break;
2649 default:
2650 gentry = 0;
2651 break;
2652 }
2653
2654 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2655 spin_lock(&vcpu->kvm->mmu_lock);
2656 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2657 gentry = 0;
2658 kvm_mmu_access_page(vcpu, gfn);
2659 kvm_mmu_free_some_pages(vcpu);
2660 ++vcpu->kvm->stat.mmu_pte_write;
2661 kvm_mmu_audit(vcpu, "pre pte write");
2662 if (guest_initiated) {
2663 if (gfn == vcpu->arch.last_pt_write_gfn
2664 && !last_updated_pte_accessed(vcpu)) {
2665 ++vcpu->arch.last_pt_write_count;
2666 if (vcpu->arch.last_pt_write_count >= 3)
2667 flooded = 1;
2668 } else {
2669 vcpu->arch.last_pt_write_gfn = gfn;
2670 vcpu->arch.last_pt_write_count = 1;
2671 vcpu->arch.last_pte_updated = NULL;
2672 }
2673 }
2674 index = kvm_page_table_hashfn(gfn);
2675 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2676
2677 restart:
2678 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2679 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2680 continue;
2681 pte_size = sp->role.cr4_pae ? 8 : 4;
2682 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2683 misaligned |= bytes < 4;
2684 if (misaligned || flooded) {
2685 /*
2686 * Misaligned accesses are too much trouble to fix
2687 * up; also, they usually indicate a page is not used
2688 * as a page table.
2689 *
2690 * If we're seeing too many writes to a page,
2691 * it may no longer be a page table, or we may be
2692 * forking, in which case it is better to unmap the
2693 * page.
2694 */
2695 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2696 gpa, bytes, sp->role.word);
2697 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2698 goto restart;
2699 ++vcpu->kvm->stat.mmu_flooded;
2700 continue;
2701 }
2702 page_offset = offset;
2703 level = sp->role.level;
2704 npte = 1;
2705 if (!sp->role.cr4_pae) {
2706 page_offset <<= 1; /* 32->64 */
2707 /*
2708 * A 32-bit pde maps 4MB while the shadow pdes map
2709 * only 2MB. So we need to double the offset again
2710 * and zap two pdes instead of one.
2711 */
2712 if (level == PT32_ROOT_LEVEL) {
2713 page_offset &= ~7; /* kill rounding error */
2714 page_offset <<= 1;
2715 npte = 2;
2716 }
2717 quadrant = page_offset >> PAGE_SHIFT;
2718 page_offset &= ~PAGE_MASK;
2719 if (quadrant != sp->role.quadrant)
2720 continue;
2721 }
2722 spte = &sp->spt[page_offset / sizeof(*spte)];
2723 while (npte--) {
2724 entry = *spte;
2725 mmu_pte_write_zap_pte(vcpu, sp, spte);
2726 if (gentry)
2727 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2728 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2729 ++spte;
2730 }
2731 }
2732 kvm_mmu_audit(vcpu, "post pte write");
2733 spin_unlock(&vcpu->kvm->mmu_lock);
2734 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2735 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2736 vcpu->arch.update_pte.pfn = bad_pfn;
2737 }
2738 }
2739
2740 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2741 {
2742 gpa_t gpa;
2743 int r;
2744
2745 if (tdp_enabled)
2746 return 0;
2747
2748 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2749
2750 spin_lock(&vcpu->kvm->mmu_lock);
2751 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2752 spin_unlock(&vcpu->kvm->mmu_lock);
2753 return r;
2754 }
2755 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2756
2757 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2758 {
2759 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2760 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2761 struct kvm_mmu_page *sp;
2762
2763 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2764 struct kvm_mmu_page, link);
2765 kvm_mmu_zap_page(vcpu->kvm, sp);
2766 ++vcpu->kvm->stat.mmu_recycled;
2767 }
2768 }
2769
2770 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2771 {
2772 int r;
2773 enum emulation_result er;
2774
2775 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2776 if (r < 0)
2777 goto out;
2778
2779 if (!r) {
2780 r = 1;
2781 goto out;
2782 }
2783
2784 r = mmu_topup_memory_caches(vcpu);
2785 if (r)
2786 goto out;
2787
2788 er = emulate_instruction(vcpu, cr2, error_code, 0);
2789
2790 switch (er) {
2791 case EMULATE_DONE:
2792 return 1;
2793 case EMULATE_DO_MMIO:
2794 ++vcpu->stat.mmio_exits;
2795 return 0;
2796 case EMULATE_FAIL:
2797 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2798 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2799 vcpu->run->internal.ndata = 0;
2800 return 0;
2801 default:
2802 BUG();
2803 }
2804 out:
2805 return r;
2806 }
2807 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2808
2809 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2810 {
2811 vcpu->arch.mmu.invlpg(vcpu, gva);
2812 kvm_mmu_flush_tlb(vcpu);
2813 ++vcpu->stat.invlpg;
2814 }
2815 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2816
2817 void kvm_enable_tdp(void)
2818 {
2819 tdp_enabled = true;
2820 }
2821 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2822
2823 void kvm_disable_tdp(void)
2824 {
2825 tdp_enabled = false;
2826 }
2827 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2828
2829 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2830 {
2831 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2832 }
2833
2834 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2835 {
2836 struct page *page;
2837 int i;
2838
2839 ASSERT(vcpu);
2840
2841 /*
2842 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2843 * Therefore we need to allocate shadow page tables in the first
2844 * 4GB of memory, which happens to fit the DMA32 zone.
2845 */
2846 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2847 if (!page)
2848 return -ENOMEM;
2849
2850 vcpu->arch.mmu.pae_root = page_address(page);
2851 for (i = 0; i < 4; ++i)
2852 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2853
2854 return 0;
2855 }
2856
2857 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2858 {
2859 ASSERT(vcpu);
2860 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2861
2862 return alloc_mmu_pages(vcpu);
2863 }
2864
2865 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2866 {
2867 ASSERT(vcpu);
2868 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2869
2870 return init_kvm_mmu(vcpu);
2871 }
2872
2873 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2874 {
2875 ASSERT(vcpu);
2876
2877 destroy_kvm_mmu(vcpu);
2878 free_mmu_pages(vcpu);
2879 mmu_free_memory_caches(vcpu);
2880 }
2881
2882 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2883 {
2884 struct kvm_mmu_page *sp;
2885
2886 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2887 int i;
2888 u64 *pt;
2889
2890 if (!test_bit(slot, sp->slot_bitmap))
2891 continue;
2892
2893 pt = sp->spt;
2894 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2895 /* avoid RMW */
2896 if (pt[i] & PT_WRITABLE_MASK)
2897 pt[i] &= ~PT_WRITABLE_MASK;
2898 }
2899 kvm_flush_remote_tlbs(kvm);
2900 }
2901
2902 void kvm_mmu_zap_all(struct kvm *kvm)
2903 {
2904 struct kvm_mmu_page *sp, *node;
2905
2906 spin_lock(&kvm->mmu_lock);
2907 restart:
2908 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2909 if (kvm_mmu_zap_page(kvm, sp))
2910 goto restart;
2911
2912 spin_unlock(&kvm->mmu_lock);
2913
2914 kvm_flush_remote_tlbs(kvm);
2915 }
2916
2917 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2918 {
2919 struct kvm_mmu_page *page;
2920
2921 page = container_of(kvm->arch.active_mmu_pages.prev,
2922 struct kvm_mmu_page, link);
2923 kvm_mmu_zap_page(kvm, page);
2924 }
2925
2926 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2927 {
2928 struct kvm *kvm;
2929 struct kvm *kvm_freed = NULL;
2930 int cache_count = 0;
2931
2932 spin_lock(&kvm_lock);
2933
2934 list_for_each_entry(kvm, &vm_list, vm_list) {
2935 int npages, idx;
2936
2937 idx = srcu_read_lock(&kvm->srcu);
2938 spin_lock(&kvm->mmu_lock);
2939 npages = kvm->arch.n_alloc_mmu_pages -
2940 kvm->arch.n_free_mmu_pages;
2941 cache_count += npages;
2942 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2943 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2944 cache_count--;
2945 kvm_freed = kvm;
2946 }
2947 nr_to_scan--;
2948
2949 spin_unlock(&kvm->mmu_lock);
2950 srcu_read_unlock(&kvm->srcu, idx);
2951 }
2952 if (kvm_freed)
2953 list_move_tail(&kvm_freed->vm_list, &vm_list);
2954
2955 spin_unlock(&kvm_lock);
2956
2957 return cache_count;
2958 }
2959
2960 static struct shrinker mmu_shrinker = {
2961 .shrink = mmu_shrink,
2962 .seeks = DEFAULT_SEEKS * 10,
2963 };
2964
2965 static void mmu_destroy_caches(void)
2966 {
2967 if (pte_chain_cache)
2968 kmem_cache_destroy(pte_chain_cache);
2969 if (rmap_desc_cache)
2970 kmem_cache_destroy(rmap_desc_cache);
2971 if (mmu_page_header_cache)
2972 kmem_cache_destroy(mmu_page_header_cache);
2973 }
2974
2975 void kvm_mmu_module_exit(void)
2976 {
2977 mmu_destroy_caches();
2978 unregister_shrinker(&mmu_shrinker);
2979 }
2980
2981 int kvm_mmu_module_init(void)
2982 {
2983 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2984 sizeof(struct kvm_pte_chain),
2985 0, 0, NULL);
2986 if (!pte_chain_cache)
2987 goto nomem;
2988 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2989 sizeof(struct kvm_rmap_desc),
2990 0, 0, NULL);
2991 if (!rmap_desc_cache)
2992 goto nomem;
2993
2994 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2995 sizeof(struct kvm_mmu_page),
2996 0, 0, NULL);
2997 if (!mmu_page_header_cache)
2998 goto nomem;
2999
3000 register_shrinker(&mmu_shrinker);
3001
3002 return 0;
3003
3004 nomem:
3005 mmu_destroy_caches();
3006 return -ENOMEM;
3007 }
3008
3009 /*
3010 * Caculate mmu pages needed for kvm.
3011 */
3012 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3013 {
3014 int i;
3015 unsigned int nr_mmu_pages;
3016 unsigned int nr_pages = 0;
3017 struct kvm_memslots *slots;
3018
3019 slots = kvm_memslots(kvm);
3020
3021 for (i = 0; i < slots->nmemslots; i++)
3022 nr_pages += slots->memslots[i].npages;
3023
3024 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3025 nr_mmu_pages = max(nr_mmu_pages,
3026 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3027
3028 return nr_mmu_pages;
3029 }
3030
3031 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3032 unsigned len)
3033 {
3034 if (len > buffer->len)
3035 return NULL;
3036 return buffer->ptr;
3037 }
3038
3039 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3040 unsigned len)
3041 {
3042 void *ret;
3043
3044 ret = pv_mmu_peek_buffer(buffer, len);
3045 if (!ret)
3046 return ret;
3047 buffer->ptr += len;
3048 buffer->len -= len;
3049 buffer->processed += len;
3050 return ret;
3051 }
3052
3053 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3054 gpa_t addr, gpa_t value)
3055 {
3056 int bytes = 8;
3057 int r;
3058
3059 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3060 bytes = 4;
3061
3062 r = mmu_topup_memory_caches(vcpu);
3063 if (r)
3064 return r;
3065
3066 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3067 return -EFAULT;
3068
3069 return 1;
3070 }
3071
3072 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3073 {
3074 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3075 return 1;
3076 }
3077
3078 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3079 {
3080 spin_lock(&vcpu->kvm->mmu_lock);
3081 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3082 spin_unlock(&vcpu->kvm->mmu_lock);
3083 return 1;
3084 }
3085
3086 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3087 struct kvm_pv_mmu_op_buffer *buffer)
3088 {
3089 struct kvm_mmu_op_header *header;
3090
3091 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3092 if (!header)
3093 return 0;
3094 switch (header->op) {
3095 case KVM_MMU_OP_WRITE_PTE: {
3096 struct kvm_mmu_op_write_pte *wpte;
3097
3098 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3099 if (!wpte)
3100 return 0;
3101 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3102 wpte->pte_val);
3103 }
3104 case KVM_MMU_OP_FLUSH_TLB: {
3105 struct kvm_mmu_op_flush_tlb *ftlb;
3106
3107 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3108 if (!ftlb)
3109 return 0;
3110 return kvm_pv_mmu_flush_tlb(vcpu);
3111 }
3112 case KVM_MMU_OP_RELEASE_PT: {
3113 struct kvm_mmu_op_release_pt *rpt;
3114
3115 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3116 if (!rpt)
3117 return 0;
3118 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3119 }
3120 default: return 0;
3121 }
3122 }
3123
3124 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3125 gpa_t addr, unsigned long *ret)
3126 {
3127 int r;
3128 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3129
3130 buffer->ptr = buffer->buf;
3131 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3132 buffer->processed = 0;
3133
3134 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3135 if (r)
3136 goto out;
3137
3138 while (buffer->len) {
3139 r = kvm_pv_mmu_op_one(vcpu, buffer);
3140 if (r < 0)
3141 goto out;
3142 if (r == 0)
3143 break;
3144 }
3145
3146 r = 1;
3147 out:
3148 *ret = buffer->processed;
3149 return r;
3150 }
3151
3152 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3153 {
3154 struct kvm_shadow_walk_iterator iterator;
3155 int nr_sptes = 0;
3156
3157 spin_lock(&vcpu->kvm->mmu_lock);
3158 for_each_shadow_entry(vcpu, addr, iterator) {
3159 sptes[iterator.level-1] = *iterator.sptep;
3160 nr_sptes++;
3161 if (!is_shadow_present_pte(*iterator.sptep))
3162 break;
3163 }
3164 spin_unlock(&vcpu->kvm->mmu_lock);
3165
3166 return nr_sptes;
3167 }
3168 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3169
3170 #ifdef AUDIT
3171
3172 static const char *audit_msg;
3173
3174 static gva_t canonicalize(gva_t gva)
3175 {
3176 #ifdef CONFIG_X86_64
3177 gva = (long long)(gva << 16) >> 16;
3178 #endif
3179 return gva;
3180 }
3181
3182
3183 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3184
3185 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3186 inspect_spte_fn fn)
3187 {
3188 int i;
3189
3190 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3191 u64 ent = sp->spt[i];
3192
3193 if (is_shadow_present_pte(ent)) {
3194 if (!is_last_spte(ent, sp->role.level)) {
3195 struct kvm_mmu_page *child;
3196 child = page_header(ent & PT64_BASE_ADDR_MASK);
3197 __mmu_spte_walk(kvm, child, fn);
3198 } else
3199 fn(kvm, &sp->spt[i]);
3200 }
3201 }
3202 }
3203
3204 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3205 {
3206 int i;
3207 struct kvm_mmu_page *sp;
3208
3209 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3210 return;
3211 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3212 hpa_t root = vcpu->arch.mmu.root_hpa;
3213 sp = page_header(root);
3214 __mmu_spte_walk(vcpu->kvm, sp, fn);
3215 return;
3216 }
3217 for (i = 0; i < 4; ++i) {
3218 hpa_t root = vcpu->arch.mmu.pae_root[i];
3219
3220 if (root && VALID_PAGE(root)) {
3221 root &= PT64_BASE_ADDR_MASK;
3222 sp = page_header(root);
3223 __mmu_spte_walk(vcpu->kvm, sp, fn);
3224 }
3225 }
3226 return;
3227 }
3228
3229 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3230 gva_t va, int level)
3231 {
3232 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3233 int i;
3234 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3235
3236 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3237 u64 ent = pt[i];
3238
3239 if (ent == shadow_trap_nonpresent_pte)
3240 continue;
3241
3242 va = canonicalize(va);
3243 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3244 audit_mappings_page(vcpu, ent, va, level - 1);
3245 else {
3246 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3247 gfn_t gfn = gpa >> PAGE_SHIFT;
3248 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3249 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3250
3251 if (is_error_pfn(pfn)) {
3252 kvm_release_pfn_clean(pfn);
3253 continue;
3254 }
3255
3256 if (is_shadow_present_pte(ent)
3257 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3258 printk(KERN_ERR "xx audit error: (%s) levels %d"
3259 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3260 audit_msg, vcpu->arch.mmu.root_level,
3261 va, gpa, hpa, ent,
3262 is_shadow_present_pte(ent));
3263 else if (ent == shadow_notrap_nonpresent_pte
3264 && !is_error_hpa(hpa))
3265 printk(KERN_ERR "audit: (%s) notrap shadow,"
3266 " valid guest gva %lx\n", audit_msg, va);
3267 kvm_release_pfn_clean(pfn);
3268
3269 }
3270 }
3271 }
3272
3273 static void audit_mappings(struct kvm_vcpu *vcpu)
3274 {
3275 unsigned i;
3276
3277 if (vcpu->arch.mmu.root_level == 4)
3278 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3279 else
3280 for (i = 0; i < 4; ++i)
3281 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3282 audit_mappings_page(vcpu,
3283 vcpu->arch.mmu.pae_root[i],
3284 i << 30,
3285 2);
3286 }
3287
3288 static int count_rmaps(struct kvm_vcpu *vcpu)
3289 {
3290 struct kvm *kvm = vcpu->kvm;
3291 struct kvm_memslots *slots;
3292 int nmaps = 0;
3293 int i, j, k, idx;
3294
3295 idx = srcu_read_lock(&kvm->srcu);
3296 slots = kvm_memslots(kvm);
3297 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3298 struct kvm_memory_slot *m = &slots->memslots[i];
3299 struct kvm_rmap_desc *d;
3300
3301 for (j = 0; j < m->npages; ++j) {
3302 unsigned long *rmapp = &m->rmap[j];
3303
3304 if (!*rmapp)
3305 continue;
3306 if (!(*rmapp & 1)) {
3307 ++nmaps;
3308 continue;
3309 }
3310 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3311 while (d) {
3312 for (k = 0; k < RMAP_EXT; ++k)
3313 if (d->sptes[k])
3314 ++nmaps;
3315 else
3316 break;
3317 d = d->more;
3318 }
3319 }
3320 }
3321 srcu_read_unlock(&kvm->srcu, idx);
3322 return nmaps;
3323 }
3324
3325 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3326 {
3327 unsigned long *rmapp;
3328 struct kvm_mmu_page *rev_sp;
3329 gfn_t gfn;
3330
3331 if (*sptep & PT_WRITABLE_MASK) {
3332 rev_sp = page_header(__pa(sptep));
3333 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3334
3335 if (!gfn_to_memslot(kvm, gfn)) {
3336 if (!printk_ratelimit())
3337 return;
3338 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3339 audit_msg, gfn);
3340 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3341 audit_msg, (long int)(sptep - rev_sp->spt),
3342 rev_sp->gfn);
3343 dump_stack();
3344 return;
3345 }
3346
3347 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3348 rev_sp->role.level);
3349 if (!*rmapp) {
3350 if (!printk_ratelimit())
3351 return;
3352 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3353 audit_msg, *sptep);
3354 dump_stack();
3355 }
3356 }
3357
3358 }
3359
3360 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3361 {
3362 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3363 }
3364
3365 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3366 {
3367 struct kvm_mmu_page *sp;
3368 int i;
3369
3370 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3371 u64 *pt = sp->spt;
3372
3373 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3374 continue;
3375
3376 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3377 u64 ent = pt[i];
3378
3379 if (!(ent & PT_PRESENT_MASK))
3380 continue;
3381 if (!(ent & PT_WRITABLE_MASK))
3382 continue;
3383 inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3384 }
3385 }
3386 return;
3387 }
3388
3389 static void audit_rmap(struct kvm_vcpu *vcpu)
3390 {
3391 check_writable_mappings_rmap(vcpu);
3392 count_rmaps(vcpu);
3393 }
3394
3395 static void audit_write_protection(struct kvm_vcpu *vcpu)
3396 {
3397 struct kvm_mmu_page *sp;
3398 struct kvm_memory_slot *slot;
3399 unsigned long *rmapp;
3400 u64 *spte;
3401 gfn_t gfn;
3402
3403 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3404 if (sp->role.direct)
3405 continue;
3406 if (sp->unsync)
3407 continue;
3408
3409 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3410 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3411 rmapp = &slot->rmap[gfn - slot->base_gfn];
3412
3413 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3414 while (spte) {
3415 if (*spte & PT_WRITABLE_MASK)
3416 printk(KERN_ERR "%s: (%s) shadow page has "
3417 "writable mappings: gfn %lx role %x\n",
3418 __func__, audit_msg, sp->gfn,
3419 sp->role.word);
3420 spte = rmap_next(vcpu->kvm, rmapp, spte);
3421 }
3422 }
3423 }
3424
3425 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3426 {
3427 int olddbg = dbg;
3428
3429 dbg = 0;
3430 audit_msg = msg;
3431 audit_rmap(vcpu);
3432 audit_write_protection(vcpu);
3433 if (strcmp("pre pte write", audit_msg) != 0)
3434 audit_mappings(vcpu);
3435 audit_writable_sptes_have_rmaps(vcpu);
3436 dbg = olddbg;
3437 }
3438
3439 #endif
Linux kernel - Deliverables
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