2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
24 #include "kvm_cache_regs.h"
27 #include <linux/kvm_host.h>
28 #include <linux/types.h>
29 #include <linux/string.h>
31 #include <linux/highmem.h>
32 #include <linux/module.h>
33 #include <linux/swap.h>
34 #include <linux/hugetlb.h>
35 #include <linux/compiler.h>
36 #include <linux/srcu.h>
37 #include <linux/slab.h>
38 #include <linux/uaccess.h>
41 #include <asm/cmpxchg.h>
46 * When setting this variable to true it enables Two-Dimensional-Paging
47 * where the hardware walks 2 page tables:
48 * 1. the guest-virtual to guest-physical
49 * 2. while doing 1. it walks guest-physical to host-physical
50 * If the hardware supports that we don't need to do shadow paging.
52 bool tdp_enabled
= false;
56 AUDIT_POST_PAGE_FAULT
,
67 module_param(dbg
, bool, 0644);
69 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
70 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
71 #define MMU_WARN_ON(x) WARN_ON(x)
73 #define pgprintk(x...) do { } while (0)
74 #define rmap_printk(x...) do { } while (0)
75 #define MMU_WARN_ON(x) do { } while (0)
78 #define PTE_PREFETCH_NUM 8
80 #define PT_FIRST_AVAIL_BITS_SHIFT 10
81 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
83 #define PT64_LEVEL_BITS 9
85 #define PT64_LEVEL_SHIFT(level) \
86 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
88 #define PT64_INDEX(address, level)\
89 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
92 #define PT32_LEVEL_BITS 10
94 #define PT32_LEVEL_SHIFT(level) \
95 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
97 #define PT32_LVL_OFFSET_MASK(level) \
98 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
99 * PT32_LEVEL_BITS))) - 1))
101 #define PT32_INDEX(address, level)\
102 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
105 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
106 #define PT64_DIR_BASE_ADDR_MASK \
107 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
108 #define PT64_LVL_ADDR_MASK(level) \
109 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
110 * PT64_LEVEL_BITS))) - 1))
111 #define PT64_LVL_OFFSET_MASK(level) \
112 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
113 * PT64_LEVEL_BITS))) - 1))
115 #define PT32_BASE_ADDR_MASK PAGE_MASK
116 #define PT32_DIR_BASE_ADDR_MASK \
117 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
118 #define PT32_LVL_ADDR_MASK(level) \
119 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
120 * PT32_LEVEL_BITS))) - 1))
122 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | shadow_user_mask \
123 | shadow_x_mask | shadow_nx_mask)
125 #define ACC_EXEC_MASK 1
126 #define ACC_WRITE_MASK PT_WRITABLE_MASK
127 #define ACC_USER_MASK PT_USER_MASK
128 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
130 #include <trace/events/kvm.h>
132 #define CREATE_TRACE_POINTS
133 #include "mmutrace.h"
135 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
136 #define SPTE_MMU_WRITEABLE (1ULL << (PT_FIRST_AVAIL_BITS_SHIFT + 1))
138 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
140 /* make pte_list_desc fit well in cache line */
141 #define PTE_LIST_EXT 3
143 struct pte_list_desc
{
144 u64
*sptes
[PTE_LIST_EXT
];
145 struct pte_list_desc
*more
;
148 struct kvm_shadow_walk_iterator
{
156 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
157 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
158 shadow_walk_okay(&(_walker)); \
159 shadow_walk_next(&(_walker)))
161 #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \
162 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
163 shadow_walk_okay(&(_walker)) && \
164 ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \
165 __shadow_walk_next(&(_walker), spte))
167 static struct kmem_cache
*pte_list_desc_cache
;
168 static struct kmem_cache
*mmu_page_header_cache
;
169 static struct percpu_counter kvm_total_used_mmu_pages
;
171 static u64 __read_mostly shadow_nx_mask
;
172 static u64 __read_mostly shadow_x_mask
; /* mutual exclusive with nx_mask */
173 static u64 __read_mostly shadow_user_mask
;
174 static u64 __read_mostly shadow_accessed_mask
;
175 static u64 __read_mostly shadow_dirty_mask
;
176 static u64 __read_mostly shadow_mmio_mask
;
178 static void mmu_spte_set(u64
*sptep
, u64 spte
);
179 static void mmu_free_roots(struct kvm_vcpu
*vcpu
);
181 void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask
)
183 shadow_mmio_mask
= mmio_mask
;
185 EXPORT_SYMBOL_GPL(kvm_mmu_set_mmio_spte_mask
);
188 * the low bit of the generation number is always presumed to be zero.
189 * This disables mmio caching during memslot updates. The concept is
190 * similar to a seqcount but instead of retrying the access we just punt
191 * and ignore the cache.
193 * spte bits 3-11 are used as bits 1-9 of the generation number,
194 * the bits 52-61 are used as bits 10-19 of the generation number.
196 #define MMIO_SPTE_GEN_LOW_SHIFT 2
197 #define MMIO_SPTE_GEN_HIGH_SHIFT 52
199 #define MMIO_GEN_SHIFT 20
200 #define MMIO_GEN_LOW_SHIFT 10
201 #define MMIO_GEN_LOW_MASK ((1 << MMIO_GEN_LOW_SHIFT) - 2)
202 #define MMIO_GEN_MASK ((1 << MMIO_GEN_SHIFT) - 1)
204 static u64
generation_mmio_spte_mask(unsigned int gen
)
208 WARN_ON(gen
& ~MMIO_GEN_MASK
);
210 mask
= (gen
& MMIO_GEN_LOW_MASK
) << MMIO_SPTE_GEN_LOW_SHIFT
;
211 mask
|= ((u64
)gen
>> MMIO_GEN_LOW_SHIFT
) << MMIO_SPTE_GEN_HIGH_SHIFT
;
215 static unsigned int get_mmio_spte_generation(u64 spte
)
219 spte
&= ~shadow_mmio_mask
;
221 gen
= (spte
>> MMIO_SPTE_GEN_LOW_SHIFT
) & MMIO_GEN_LOW_MASK
;
222 gen
|= (spte
>> MMIO_SPTE_GEN_HIGH_SHIFT
) << MMIO_GEN_LOW_SHIFT
;
226 static unsigned int kvm_current_mmio_generation(struct kvm
*kvm
)
228 return kvm_memslots(kvm
)->generation
& MMIO_GEN_MASK
;
231 static void mark_mmio_spte(struct kvm
*kvm
, u64
*sptep
, u64 gfn
,
234 unsigned int gen
= kvm_current_mmio_generation(kvm
);
235 u64 mask
= generation_mmio_spte_mask(gen
);
237 access
&= ACC_WRITE_MASK
| ACC_USER_MASK
;
238 mask
|= shadow_mmio_mask
| access
| gfn
<< PAGE_SHIFT
;
240 trace_mark_mmio_spte(sptep
, gfn
, access
, gen
);
241 mmu_spte_set(sptep
, mask
);
244 static bool is_mmio_spte(u64 spte
)
246 return (spte
& shadow_mmio_mask
) == shadow_mmio_mask
;
249 static gfn_t
get_mmio_spte_gfn(u64 spte
)
251 u64 mask
= generation_mmio_spte_mask(MMIO_GEN_MASK
) | shadow_mmio_mask
;
252 return (spte
& ~mask
) >> PAGE_SHIFT
;
255 static unsigned get_mmio_spte_access(u64 spte
)
257 u64 mask
= generation_mmio_spte_mask(MMIO_GEN_MASK
) | shadow_mmio_mask
;
258 return (spte
& ~mask
) & ~PAGE_MASK
;
261 static bool set_mmio_spte(struct kvm
*kvm
, u64
*sptep
, gfn_t gfn
,
262 pfn_t pfn
, unsigned access
)
264 if (unlikely(is_noslot_pfn(pfn
))) {
265 mark_mmio_spte(kvm
, sptep
, gfn
, access
);
272 static bool check_mmio_spte(struct kvm
*kvm
, u64 spte
)
274 unsigned int kvm_gen
, spte_gen
;
276 kvm_gen
= kvm_current_mmio_generation(kvm
);
277 spte_gen
= get_mmio_spte_generation(spte
);
279 trace_check_mmio_spte(spte
, kvm_gen
, spte_gen
);
280 return likely(kvm_gen
== spte_gen
);
283 void kvm_mmu_set_mask_ptes(u64 user_mask
, u64 accessed_mask
,
284 u64 dirty_mask
, u64 nx_mask
, u64 x_mask
)
286 shadow_user_mask
= user_mask
;
287 shadow_accessed_mask
= accessed_mask
;
288 shadow_dirty_mask
= dirty_mask
;
289 shadow_nx_mask
= nx_mask
;
290 shadow_x_mask
= x_mask
;
292 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes
);
294 static int is_cpuid_PSE36(void)
299 static int is_nx(struct kvm_vcpu
*vcpu
)
301 return vcpu
->arch
.efer
& EFER_NX
;
304 static int is_shadow_present_pte(u64 pte
)
306 return pte
& PT_PRESENT_MASK
&& !is_mmio_spte(pte
);
309 static int is_large_pte(u64 pte
)
311 return pte
& PT_PAGE_SIZE_MASK
;
314 static int is_rmap_spte(u64 pte
)
316 return is_shadow_present_pte(pte
);
319 static int is_last_spte(u64 pte
, int level
)
321 if (level
== PT_PAGE_TABLE_LEVEL
)
323 if (is_large_pte(pte
))
328 static pfn_t
spte_to_pfn(u64 pte
)
330 return (pte
& PT64_BASE_ADDR_MASK
) >> PAGE_SHIFT
;
333 static gfn_t
pse36_gfn_delta(u32 gpte
)
335 int shift
= 32 - PT32_DIR_PSE36_SHIFT
- PAGE_SHIFT
;
337 return (gpte
& PT32_DIR_PSE36_MASK
) << shift
;
341 static void __set_spte(u64
*sptep
, u64 spte
)
346 static void __update_clear_spte_fast(u64
*sptep
, u64 spte
)
351 static u64
__update_clear_spte_slow(u64
*sptep
, u64 spte
)
353 return xchg(sptep
, spte
);
356 static u64
__get_spte_lockless(u64
*sptep
)
358 return ACCESS_ONCE(*sptep
);
361 static bool __check_direct_spte_mmio_pf(u64 spte
)
363 /* It is valid if the spte is zapped. */
375 static void count_spte_clear(u64
*sptep
, u64 spte
)
377 struct kvm_mmu_page
*sp
= page_header(__pa(sptep
));
379 if (is_shadow_present_pte(spte
))
382 /* Ensure the spte is completely set before we increase the count */
384 sp
->clear_spte_count
++;
387 static void __set_spte(u64
*sptep
, u64 spte
)
389 union split_spte
*ssptep
, sspte
;
391 ssptep
= (union split_spte
*)sptep
;
392 sspte
= (union split_spte
)spte
;
394 ssptep
->spte_high
= sspte
.spte_high
;
397 * If we map the spte from nonpresent to present, We should store
398 * the high bits firstly, then set present bit, so cpu can not
399 * fetch this spte while we are setting the spte.
403 ssptep
->spte_low
= sspte
.spte_low
;
406 static void __update_clear_spte_fast(u64
*sptep
, u64 spte
)
408 union split_spte
*ssptep
, sspte
;
410 ssptep
= (union split_spte
*)sptep
;
411 sspte
= (union split_spte
)spte
;
413 ssptep
->spte_low
= sspte
.spte_low
;
416 * If we map the spte from present to nonpresent, we should clear
417 * present bit firstly to avoid vcpu fetch the old high bits.
421 ssptep
->spte_high
= sspte
.spte_high
;
422 count_spte_clear(sptep
, spte
);
425 static u64
__update_clear_spte_slow(u64
*sptep
, u64 spte
)
427 union split_spte
*ssptep
, sspte
, orig
;
429 ssptep
= (union split_spte
*)sptep
;
430 sspte
= (union split_spte
)spte
;
432 /* xchg acts as a barrier before the setting of the high bits */
433 orig
.spte_low
= xchg(&ssptep
->spte_low
, sspte
.spte_low
);
434 orig
.spte_high
= ssptep
->spte_high
;
435 ssptep
->spte_high
= sspte
.spte_high
;
436 count_spte_clear(sptep
, spte
);
442 * The idea using the light way get the spte on x86_32 guest is from
443 * gup_get_pte(arch/x86/mm/gup.c).
445 * An spte tlb flush may be pending, because kvm_set_pte_rmapp
446 * coalesces them and we are running out of the MMU lock. Therefore
447 * we need to protect against in-progress updates of the spte.
449 * Reading the spte while an update is in progress may get the old value
450 * for the high part of the spte. The race is fine for a present->non-present
451 * change (because the high part of the spte is ignored for non-present spte),
452 * but for a present->present change we must reread the spte.
454 * All such changes are done in two steps (present->non-present and
455 * non-present->present), hence it is enough to count the number of
456 * present->non-present updates: if it changed while reading the spte,
457 * we might have hit the race. This is done using clear_spte_count.
459 static u64
__get_spte_lockless(u64
*sptep
)
461 struct kvm_mmu_page
*sp
= page_header(__pa(sptep
));
462 union split_spte spte
, *orig
= (union split_spte
*)sptep
;
466 count
= sp
->clear_spte_count
;
469 spte
.spte_low
= orig
->spte_low
;
472 spte
.spte_high
= orig
->spte_high
;
475 if (unlikely(spte
.spte_low
!= orig
->spte_low
||
476 count
!= sp
->clear_spte_count
))
482 static bool __check_direct_spte_mmio_pf(u64 spte
)
484 union split_spte sspte
= (union split_spte
)spte
;
485 u32 high_mmio_mask
= shadow_mmio_mask
>> 32;
487 /* It is valid if the spte is zapped. */
491 /* It is valid if the spte is being zapped. */
492 if (sspte
.spte_low
== 0ull &&
493 (sspte
.spte_high
& high_mmio_mask
) == high_mmio_mask
)
500 static bool spte_is_locklessly_modifiable(u64 spte
)
502 return (spte
& (SPTE_HOST_WRITEABLE
| SPTE_MMU_WRITEABLE
)) ==
503 (SPTE_HOST_WRITEABLE
| SPTE_MMU_WRITEABLE
);
506 static bool spte_has_volatile_bits(u64 spte
)
509 * Always atomicly update spte if it can be updated
510 * out of mmu-lock, it can ensure dirty bit is not lost,
511 * also, it can help us to get a stable is_writable_pte()
512 * to ensure tlb flush is not missed.
514 if (spte_is_locklessly_modifiable(spte
))
517 if (!shadow_accessed_mask
)
520 if (!is_shadow_present_pte(spte
))
523 if ((spte
& shadow_accessed_mask
) &&
524 (!is_writable_pte(spte
) || (spte
& shadow_dirty_mask
)))
530 static bool spte_is_bit_cleared(u64 old_spte
, u64 new_spte
, u64 bit_mask
)
532 return (old_spte
& bit_mask
) && !(new_spte
& bit_mask
);
535 static bool spte_is_bit_changed(u64 old_spte
, u64 new_spte
, u64 bit_mask
)
537 return (old_spte
& bit_mask
) != (new_spte
& bit_mask
);
540 /* Rules for using mmu_spte_set:
541 * Set the sptep from nonpresent to present.
542 * Note: the sptep being assigned *must* be either not present
543 * or in a state where the hardware will not attempt to update
546 static void mmu_spte_set(u64
*sptep
, u64 new_spte
)
548 WARN_ON(is_shadow_present_pte(*sptep
));
549 __set_spte(sptep
, new_spte
);
552 /* Rules for using mmu_spte_update:
553 * Update the state bits, it means the mapped pfn is not changged.
555 * Whenever we overwrite a writable spte with a read-only one we
556 * should flush remote TLBs. Otherwise rmap_write_protect
557 * will find a read-only spte, even though the writable spte
558 * might be cached on a CPU's TLB, the return value indicates this
561 static bool mmu_spte_update(u64
*sptep
, u64 new_spte
)
563 u64 old_spte
= *sptep
;
566 WARN_ON(!is_rmap_spte(new_spte
));
568 if (!is_shadow_present_pte(old_spte
)) {
569 mmu_spte_set(sptep
, new_spte
);
573 if (!spte_has_volatile_bits(old_spte
))
574 __update_clear_spte_fast(sptep
, new_spte
);
576 old_spte
= __update_clear_spte_slow(sptep
, new_spte
);
579 * For the spte updated out of mmu-lock is safe, since
580 * we always atomicly update it, see the comments in
581 * spte_has_volatile_bits().
583 if (spte_is_locklessly_modifiable(old_spte
) &&
584 !is_writable_pte(new_spte
))
587 if (!shadow_accessed_mask
)
591 * Flush TLB when accessed/dirty bits are changed in the page tables,
592 * to guarantee consistency between TLB and page tables.
594 if (spte_is_bit_changed(old_spte
, new_spte
,
595 shadow_accessed_mask
| shadow_dirty_mask
))
598 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_accessed_mask
))
599 kvm_set_pfn_accessed(spte_to_pfn(old_spte
));
600 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_dirty_mask
))
601 kvm_set_pfn_dirty(spte_to_pfn(old_spte
));
607 * Rules for using mmu_spte_clear_track_bits:
608 * It sets the sptep from present to nonpresent, and track the
609 * state bits, it is used to clear the last level sptep.
611 static int mmu_spte_clear_track_bits(u64
*sptep
)
614 u64 old_spte
= *sptep
;
616 if (!spte_has_volatile_bits(old_spte
))
617 __update_clear_spte_fast(sptep
, 0ull);
619 old_spte
= __update_clear_spte_slow(sptep
, 0ull);
621 if (!is_rmap_spte(old_spte
))
624 pfn
= spte_to_pfn(old_spte
);
627 * KVM does not hold the refcount of the page used by
628 * kvm mmu, before reclaiming the page, we should
629 * unmap it from mmu first.
631 WARN_ON(!kvm_is_reserved_pfn(pfn
) && !page_count(pfn_to_page(pfn
)));
633 if (!shadow_accessed_mask
|| old_spte
& shadow_accessed_mask
)
634 kvm_set_pfn_accessed(pfn
);
635 if (!shadow_dirty_mask
|| (old_spte
& shadow_dirty_mask
))
636 kvm_set_pfn_dirty(pfn
);
641 * Rules for using mmu_spte_clear_no_track:
642 * Directly clear spte without caring the state bits of sptep,
643 * it is used to set the upper level spte.
645 static void mmu_spte_clear_no_track(u64
*sptep
)
647 __update_clear_spte_fast(sptep
, 0ull);
650 static u64
mmu_spte_get_lockless(u64
*sptep
)
652 return __get_spte_lockless(sptep
);
655 static void walk_shadow_page_lockless_begin(struct kvm_vcpu
*vcpu
)
658 * Prevent page table teardown by making any free-er wait during
659 * kvm_flush_remote_tlbs() IPI to all active vcpus.
662 vcpu
->mode
= READING_SHADOW_PAGE_TABLES
;
664 * Make sure a following spte read is not reordered ahead of the write
670 static void walk_shadow_page_lockless_end(struct kvm_vcpu
*vcpu
)
673 * Make sure the write to vcpu->mode is not reordered in front of
674 * reads to sptes. If it does, kvm_commit_zap_page() can see us
675 * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
678 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
682 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache
*cache
,
683 struct kmem_cache
*base_cache
, int min
)
687 if (cache
->nobjs
>= min
)
689 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
690 obj
= kmem_cache_zalloc(base_cache
, GFP_KERNEL
);
693 cache
->objects
[cache
->nobjs
++] = obj
;
698 static int mmu_memory_cache_free_objects(struct kvm_mmu_memory_cache
*cache
)
703 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache
*mc
,
704 struct kmem_cache
*cache
)
707 kmem_cache_free(cache
, mc
->objects
[--mc
->nobjs
]);
710 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache
*cache
,
715 if (cache
->nobjs
>= min
)
717 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
718 page
= (void *)__get_free_page(GFP_KERNEL
);
721 cache
->objects
[cache
->nobjs
++] = page
;
726 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache
*mc
)
729 free_page((unsigned long)mc
->objects
[--mc
->nobjs
]);
732 static int mmu_topup_memory_caches(struct kvm_vcpu
*vcpu
)
736 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_pte_list_desc_cache
,
737 pte_list_desc_cache
, 8 + PTE_PREFETCH_NUM
);
740 r
= mmu_topup_memory_cache_page(&vcpu
->arch
.mmu_page_cache
, 8);
743 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
744 mmu_page_header_cache
, 4);
749 static void mmu_free_memory_caches(struct kvm_vcpu
*vcpu
)
751 mmu_free_memory_cache(&vcpu
->arch
.mmu_pte_list_desc_cache
,
752 pte_list_desc_cache
);
753 mmu_free_memory_cache_page(&vcpu
->arch
.mmu_page_cache
);
754 mmu_free_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
755 mmu_page_header_cache
);
758 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache
*mc
)
763 p
= mc
->objects
[--mc
->nobjs
];
767 static struct pte_list_desc
*mmu_alloc_pte_list_desc(struct kvm_vcpu
*vcpu
)
769 return mmu_memory_cache_alloc(&vcpu
->arch
.mmu_pte_list_desc_cache
);
772 static void mmu_free_pte_list_desc(struct pte_list_desc
*pte_list_desc
)
774 kmem_cache_free(pte_list_desc_cache
, pte_list_desc
);
777 static gfn_t
kvm_mmu_page_get_gfn(struct kvm_mmu_page
*sp
, int index
)
779 if (!sp
->role
.direct
)
780 return sp
->gfns
[index
];
782 return sp
->gfn
+ (index
<< ((sp
->role
.level
- 1) * PT64_LEVEL_BITS
));
785 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page
*sp
, int index
, gfn_t gfn
)
788 BUG_ON(gfn
!= kvm_mmu_page_get_gfn(sp
, index
));
790 sp
->gfns
[index
] = gfn
;
794 * Return the pointer to the large page information for a given gfn,
795 * handling slots that are not large page aligned.
797 static struct kvm_lpage_info
*lpage_info_slot(gfn_t gfn
,
798 struct kvm_memory_slot
*slot
,
803 idx
= gfn_to_index(gfn
, slot
->base_gfn
, level
);
804 return &slot
->arch
.lpage_info
[level
- 2][idx
];
807 static void account_shadowed(struct kvm
*kvm
, gfn_t gfn
)
809 struct kvm_memory_slot
*slot
;
810 struct kvm_lpage_info
*linfo
;
813 slot
= gfn_to_memslot(kvm
, gfn
);
814 for (i
= PT_DIRECTORY_LEVEL
;
815 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
816 linfo
= lpage_info_slot(gfn
, slot
, i
);
817 linfo
->write_count
+= 1;
819 kvm
->arch
.indirect_shadow_pages
++;
822 static void unaccount_shadowed(struct kvm
*kvm
, gfn_t gfn
)
824 struct kvm_memory_slot
*slot
;
825 struct kvm_lpage_info
*linfo
;
828 slot
= gfn_to_memslot(kvm
, gfn
);
829 for (i
= PT_DIRECTORY_LEVEL
;
830 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
831 linfo
= lpage_info_slot(gfn
, slot
, i
);
832 linfo
->write_count
-= 1;
833 WARN_ON(linfo
->write_count
< 0);
835 kvm
->arch
.indirect_shadow_pages
--;
838 static int has_wrprotected_page(struct kvm
*kvm
,
842 struct kvm_memory_slot
*slot
;
843 struct kvm_lpage_info
*linfo
;
845 slot
= gfn_to_memslot(kvm
, gfn
);
847 linfo
= lpage_info_slot(gfn
, slot
, level
);
848 return linfo
->write_count
;
854 static int host_mapping_level(struct kvm
*kvm
, gfn_t gfn
)
856 unsigned long page_size
;
859 page_size
= kvm_host_page_size(kvm
, gfn
);
861 for (i
= PT_PAGE_TABLE_LEVEL
;
862 i
< (PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
); ++i
) {
863 if (page_size
>= KVM_HPAGE_SIZE(i
))
872 static struct kvm_memory_slot
*
873 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
876 struct kvm_memory_slot
*slot
;
878 slot
= gfn_to_memslot(vcpu
->kvm
, gfn
);
879 if (!slot
|| slot
->flags
& KVM_MEMSLOT_INVALID
||
880 (no_dirty_log
&& slot
->dirty_bitmap
))
886 static bool mapping_level_dirty_bitmap(struct kvm_vcpu
*vcpu
, gfn_t large_gfn
)
888 return !gfn_to_memslot_dirty_bitmap(vcpu
, large_gfn
, true);
891 static int mapping_level(struct kvm_vcpu
*vcpu
, gfn_t large_gfn
)
893 int host_level
, level
, max_level
;
895 host_level
= host_mapping_level(vcpu
->kvm
, large_gfn
);
897 if (host_level
== PT_PAGE_TABLE_LEVEL
)
900 max_level
= min(kvm_x86_ops
->get_lpage_level(), host_level
);
902 for (level
= PT_DIRECTORY_LEVEL
; level
<= max_level
; ++level
)
903 if (has_wrprotected_page(vcpu
->kvm
, large_gfn
, level
))
910 * Pte mapping structures:
912 * If pte_list bit zero is zero, then pte_list point to the spte.
914 * If pte_list bit zero is one, (then pte_list & ~1) points to a struct
915 * pte_list_desc containing more mappings.
917 * Returns the number of pte entries before the spte was added or zero if
918 * the spte was not added.
921 static int pte_list_add(struct kvm_vcpu
*vcpu
, u64
*spte
,
922 unsigned long *pte_list
)
924 struct pte_list_desc
*desc
;
928 rmap_printk("pte_list_add: %p %llx 0->1\n", spte
, *spte
);
929 *pte_list
= (unsigned long)spte
;
930 } else if (!(*pte_list
& 1)) {
931 rmap_printk("pte_list_add: %p %llx 1->many\n", spte
, *spte
);
932 desc
= mmu_alloc_pte_list_desc(vcpu
);
933 desc
->sptes
[0] = (u64
*)*pte_list
;
934 desc
->sptes
[1] = spte
;
935 *pte_list
= (unsigned long)desc
| 1;
938 rmap_printk("pte_list_add: %p %llx many->many\n", spte
, *spte
);
939 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
940 while (desc
->sptes
[PTE_LIST_EXT
-1] && desc
->more
) {
942 count
+= PTE_LIST_EXT
;
944 if (desc
->sptes
[PTE_LIST_EXT
-1]) {
945 desc
->more
= mmu_alloc_pte_list_desc(vcpu
);
948 for (i
= 0; desc
->sptes
[i
]; ++i
)
950 desc
->sptes
[i
] = spte
;
956 pte_list_desc_remove_entry(unsigned long *pte_list
, struct pte_list_desc
*desc
,
957 int i
, struct pte_list_desc
*prev_desc
)
961 for (j
= PTE_LIST_EXT
- 1; !desc
->sptes
[j
] && j
> i
; --j
)
963 desc
->sptes
[i
] = desc
->sptes
[j
];
964 desc
->sptes
[j
] = NULL
;
967 if (!prev_desc
&& !desc
->more
)
968 *pte_list
= (unsigned long)desc
->sptes
[0];
971 prev_desc
->more
= desc
->more
;
973 *pte_list
= (unsigned long)desc
->more
| 1;
974 mmu_free_pte_list_desc(desc
);
977 static void pte_list_remove(u64
*spte
, unsigned long *pte_list
)
979 struct pte_list_desc
*desc
;
980 struct pte_list_desc
*prev_desc
;
984 printk(KERN_ERR
"pte_list_remove: %p 0->BUG\n", spte
);
986 } else if (!(*pte_list
& 1)) {
987 rmap_printk("pte_list_remove: %p 1->0\n", spte
);
988 if ((u64
*)*pte_list
!= spte
) {
989 printk(KERN_ERR
"pte_list_remove: %p 1->BUG\n", spte
);
994 rmap_printk("pte_list_remove: %p many->many\n", spte
);
995 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
998 for (i
= 0; i
< PTE_LIST_EXT
&& desc
->sptes
[i
]; ++i
)
999 if (desc
->sptes
[i
] == spte
) {
1000 pte_list_desc_remove_entry(pte_list
,
1008 pr_err("pte_list_remove: %p many->many\n", spte
);
1013 typedef void (*pte_list_walk_fn
) (u64
*spte
);
1014 static void pte_list_walk(unsigned long *pte_list
, pte_list_walk_fn fn
)
1016 struct pte_list_desc
*desc
;
1022 if (!(*pte_list
& 1))
1023 return fn((u64
*)*pte_list
);
1025 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
1027 for (i
= 0; i
< PTE_LIST_EXT
&& desc
->sptes
[i
]; ++i
)
1033 static unsigned long *__gfn_to_rmap(gfn_t gfn
, int level
,
1034 struct kvm_memory_slot
*slot
)
1038 idx
= gfn_to_index(gfn
, slot
->base_gfn
, level
);
1039 return &slot
->arch
.rmap
[level
- PT_PAGE_TABLE_LEVEL
][idx
];
1043 * Take gfn and return the reverse mapping to it.
1045 static unsigned long *gfn_to_rmap(struct kvm
*kvm
, gfn_t gfn
, int level
)
1047 struct kvm_memory_slot
*slot
;
1049 slot
= gfn_to_memslot(kvm
, gfn
);
1050 return __gfn_to_rmap(gfn
, level
, slot
);
1053 static bool rmap_can_add(struct kvm_vcpu
*vcpu
)
1055 struct kvm_mmu_memory_cache
*cache
;
1057 cache
= &vcpu
->arch
.mmu_pte_list_desc_cache
;
1058 return mmu_memory_cache_free_objects(cache
);
1061 static int rmap_add(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
1063 struct kvm_mmu_page
*sp
;
1064 unsigned long *rmapp
;
1066 sp
= page_header(__pa(spte
));
1067 kvm_mmu_page_set_gfn(sp
, spte
- sp
->spt
, gfn
);
1068 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
->role
.level
);
1069 return pte_list_add(vcpu
, spte
, rmapp
);
1072 static void rmap_remove(struct kvm
*kvm
, u64
*spte
)
1074 struct kvm_mmu_page
*sp
;
1076 unsigned long *rmapp
;
1078 sp
= page_header(__pa(spte
));
1079 gfn
= kvm_mmu_page_get_gfn(sp
, spte
- sp
->spt
);
1080 rmapp
= gfn_to_rmap(kvm
, gfn
, sp
->role
.level
);
1081 pte_list_remove(spte
, rmapp
);
1085 * Used by the following functions to iterate through the sptes linked by a
1086 * rmap. All fields are private and not assumed to be used outside.
1088 struct rmap_iterator
{
1089 /* private fields */
1090 struct pte_list_desc
*desc
; /* holds the sptep if not NULL */
1091 int pos
; /* index of the sptep */
1095 * Iteration must be started by this function. This should also be used after
1096 * removing/dropping sptes from the rmap link because in such cases the
1097 * information in the itererator may not be valid.
1099 * Returns sptep if found, NULL otherwise.
1101 static u64
*rmap_get_first(unsigned long rmap
, struct rmap_iterator
*iter
)
1111 iter
->desc
= (struct pte_list_desc
*)(rmap
& ~1ul);
1113 return iter
->desc
->sptes
[iter
->pos
];
1117 * Must be used with a valid iterator: e.g. after rmap_get_first().
1119 * Returns sptep if found, NULL otherwise.
1121 static u64
*rmap_get_next(struct rmap_iterator
*iter
)
1124 if (iter
->pos
< PTE_LIST_EXT
- 1) {
1128 sptep
= iter
->desc
->sptes
[iter
->pos
];
1133 iter
->desc
= iter
->desc
->more
;
1137 /* desc->sptes[0] cannot be NULL */
1138 return iter
->desc
->sptes
[iter
->pos
];
1145 static void drop_spte(struct kvm
*kvm
, u64
*sptep
)
1147 if (mmu_spte_clear_track_bits(sptep
))
1148 rmap_remove(kvm
, sptep
);
1152 static bool __drop_large_spte(struct kvm
*kvm
, u64
*sptep
)
1154 if (is_large_pte(*sptep
)) {
1155 WARN_ON(page_header(__pa(sptep
))->role
.level
==
1156 PT_PAGE_TABLE_LEVEL
);
1157 drop_spte(kvm
, sptep
);
1165 static void drop_large_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
)
1167 if (__drop_large_spte(vcpu
->kvm
, sptep
))
1168 kvm_flush_remote_tlbs(vcpu
->kvm
);
1172 * Write-protect on the specified @sptep, @pt_protect indicates whether
1173 * spte write-protection is caused by protecting shadow page table.
1175 * Note: write protection is difference between dirty logging and spte
1177 * - for dirty logging, the spte can be set to writable at anytime if
1178 * its dirty bitmap is properly set.
1179 * - for spte protection, the spte can be writable only after unsync-ing
1182 * Return true if tlb need be flushed.
1184 static bool spte_write_protect(struct kvm
*kvm
, u64
*sptep
, bool pt_protect
)
1188 if (!is_writable_pte(spte
) &&
1189 !(pt_protect
&& spte_is_locklessly_modifiable(spte
)))
1192 rmap_printk("rmap_write_protect: spte %p %llx\n", sptep
, *sptep
);
1195 spte
&= ~SPTE_MMU_WRITEABLE
;
1196 spte
= spte
& ~PT_WRITABLE_MASK
;
1198 return mmu_spte_update(sptep
, spte
);
1201 static bool __rmap_write_protect(struct kvm
*kvm
, unsigned long *rmapp
,
1205 struct rmap_iterator iter
;
1208 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;) {
1209 BUG_ON(!(*sptep
& PT_PRESENT_MASK
));
1211 flush
|= spte_write_protect(kvm
, sptep
, pt_protect
);
1212 sptep
= rmap_get_next(&iter
);
1218 static bool spte_clear_dirty(struct kvm
*kvm
, u64
*sptep
)
1222 rmap_printk("rmap_clear_dirty: spte %p %llx\n", sptep
, *sptep
);
1224 spte
&= ~shadow_dirty_mask
;
1226 return mmu_spte_update(sptep
, spte
);
1229 static bool __rmap_clear_dirty(struct kvm
*kvm
, unsigned long *rmapp
)
1232 struct rmap_iterator iter
;
1235 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;) {
1236 BUG_ON(!(*sptep
& PT_PRESENT_MASK
));
1238 flush
|= spte_clear_dirty(kvm
, sptep
);
1239 sptep
= rmap_get_next(&iter
);
1245 static bool spte_set_dirty(struct kvm
*kvm
, u64
*sptep
)
1249 rmap_printk("rmap_set_dirty: spte %p %llx\n", sptep
, *sptep
);
1251 spte
|= shadow_dirty_mask
;
1253 return mmu_spte_update(sptep
, spte
);
1256 static bool __rmap_set_dirty(struct kvm
*kvm
, unsigned long *rmapp
)
1259 struct rmap_iterator iter
;
1262 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;) {
1263 BUG_ON(!(*sptep
& PT_PRESENT_MASK
));
1265 flush
|= spte_set_dirty(kvm
, sptep
);
1266 sptep
= rmap_get_next(&iter
);
1273 * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1274 * @kvm: kvm instance
1275 * @slot: slot to protect
1276 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1277 * @mask: indicates which pages we should protect
1279 * Used when we do not need to care about huge page mappings: e.g. during dirty
1280 * logging we do not have any such mappings.
1282 static void kvm_mmu_write_protect_pt_masked(struct kvm
*kvm
,
1283 struct kvm_memory_slot
*slot
,
1284 gfn_t gfn_offset
, unsigned long mask
)
1286 unsigned long *rmapp
;
1289 rmapp
= __gfn_to_rmap(slot
->base_gfn
+ gfn_offset
+ __ffs(mask
),
1290 PT_PAGE_TABLE_LEVEL
, slot
);
1291 __rmap_write_protect(kvm
, rmapp
, false);
1293 /* clear the first set bit */
1299 * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages
1300 * @kvm: kvm instance
1301 * @slot: slot to clear D-bit
1302 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1303 * @mask: indicates which pages we should clear D-bit
1305 * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap.
1307 void kvm_mmu_clear_dirty_pt_masked(struct kvm
*kvm
,
1308 struct kvm_memory_slot
*slot
,
1309 gfn_t gfn_offset
, unsigned long mask
)
1311 unsigned long *rmapp
;
1314 rmapp
= __gfn_to_rmap(slot
->base_gfn
+ gfn_offset
+ __ffs(mask
),
1315 PT_PAGE_TABLE_LEVEL
, slot
);
1316 __rmap_clear_dirty(kvm
, rmapp
);
1318 /* clear the first set bit */
1322 EXPORT_SYMBOL_GPL(kvm_mmu_clear_dirty_pt_masked
);
1325 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1328 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1329 * enable dirty logging for them.
1331 * Used when we do not need to care about huge page mappings: e.g. during dirty
1332 * logging we do not have any such mappings.
1334 void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm
*kvm
,
1335 struct kvm_memory_slot
*slot
,
1336 gfn_t gfn_offset
, unsigned long mask
)
1338 if (kvm_x86_ops
->enable_log_dirty_pt_masked
)
1339 kvm_x86_ops
->enable_log_dirty_pt_masked(kvm
, slot
, gfn_offset
,
1342 kvm_mmu_write_protect_pt_masked(kvm
, slot
, gfn_offset
, mask
);
1345 static bool rmap_write_protect(struct kvm
*kvm
, u64 gfn
)
1347 struct kvm_memory_slot
*slot
;
1348 unsigned long *rmapp
;
1350 bool write_protected
= false;
1352 slot
= gfn_to_memslot(kvm
, gfn
);
1354 for (i
= PT_PAGE_TABLE_LEVEL
;
1355 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
1356 rmapp
= __gfn_to_rmap(gfn
, i
, slot
);
1357 write_protected
|= __rmap_write_protect(kvm
, rmapp
, true);
1360 return write_protected
;
1363 static int kvm_unmap_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1364 struct kvm_memory_slot
*slot
, gfn_t gfn
, int level
,
1368 struct rmap_iterator iter
;
1369 int need_tlb_flush
= 0;
1371 while ((sptep
= rmap_get_first(*rmapp
, &iter
))) {
1372 BUG_ON(!(*sptep
& PT_PRESENT_MASK
));
1373 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx gfn %llx (%d)\n",
1374 sptep
, *sptep
, gfn
, level
);
1376 drop_spte(kvm
, sptep
);
1380 return need_tlb_flush
;
1383 static int kvm_set_pte_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1384 struct kvm_memory_slot
*slot
, gfn_t gfn
, int level
,
1388 struct rmap_iterator iter
;
1391 pte_t
*ptep
= (pte_t
*)data
;
1394 WARN_ON(pte_huge(*ptep
));
1395 new_pfn
= pte_pfn(*ptep
);
1397 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;) {
1398 BUG_ON(!is_shadow_present_pte(*sptep
));
1399 rmap_printk("kvm_set_pte_rmapp: spte %p %llx gfn %llx (%d)\n",
1400 sptep
, *sptep
, gfn
, level
);
1404 if (pte_write(*ptep
)) {
1405 drop_spte(kvm
, sptep
);
1406 sptep
= rmap_get_first(*rmapp
, &iter
);
1408 new_spte
= *sptep
& ~PT64_BASE_ADDR_MASK
;
1409 new_spte
|= (u64
)new_pfn
<< PAGE_SHIFT
;
1411 new_spte
&= ~PT_WRITABLE_MASK
;
1412 new_spte
&= ~SPTE_HOST_WRITEABLE
;
1413 new_spte
&= ~shadow_accessed_mask
;
1415 mmu_spte_clear_track_bits(sptep
);
1416 mmu_spte_set(sptep
, new_spte
);
1417 sptep
= rmap_get_next(&iter
);
1422 kvm_flush_remote_tlbs(kvm
);
1427 static int kvm_handle_hva_range(struct kvm
*kvm
,
1428 unsigned long start
,
1431 int (*handler
)(struct kvm
*kvm
,
1432 unsigned long *rmapp
,
1433 struct kvm_memory_slot
*slot
,
1436 unsigned long data
))
1440 struct kvm_memslots
*slots
;
1441 struct kvm_memory_slot
*memslot
;
1443 slots
= kvm_memslots(kvm
);
1445 kvm_for_each_memslot(memslot
, slots
) {
1446 unsigned long hva_start
, hva_end
;
1447 gfn_t gfn_start
, gfn_end
;
1449 hva_start
= max(start
, memslot
->userspace_addr
);
1450 hva_end
= min(end
, memslot
->userspace_addr
+
1451 (memslot
->npages
<< PAGE_SHIFT
));
1452 if (hva_start
>= hva_end
)
1455 * {gfn(page) | page intersects with [hva_start, hva_end)} =
1456 * {gfn_start, gfn_start+1, ..., gfn_end-1}.
1458 gfn_start
= hva_to_gfn_memslot(hva_start
, memslot
);
1459 gfn_end
= hva_to_gfn_memslot(hva_end
+ PAGE_SIZE
- 1, memslot
);
1461 for (j
= PT_PAGE_TABLE_LEVEL
;
1462 j
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++j
) {
1463 unsigned long idx
, idx_end
;
1464 unsigned long *rmapp
;
1465 gfn_t gfn
= gfn_start
;
1468 * {idx(page_j) | page_j intersects with
1469 * [hva_start, hva_end)} = {idx, idx+1, ..., idx_end}.
1471 idx
= gfn_to_index(gfn_start
, memslot
->base_gfn
, j
);
1472 idx_end
= gfn_to_index(gfn_end
- 1, memslot
->base_gfn
, j
);
1474 rmapp
= __gfn_to_rmap(gfn_start
, j
, memslot
);
1476 for (; idx
<= idx_end
;
1477 ++idx
, gfn
+= (1UL << KVM_HPAGE_GFN_SHIFT(j
)))
1478 ret
|= handler(kvm
, rmapp
++, memslot
,
1486 static int kvm_handle_hva(struct kvm
*kvm
, unsigned long hva
,
1488 int (*handler
)(struct kvm
*kvm
, unsigned long *rmapp
,
1489 struct kvm_memory_slot
*slot
,
1490 gfn_t gfn
, int level
,
1491 unsigned long data
))
1493 return kvm_handle_hva_range(kvm
, hva
, hva
+ 1, data
, handler
);
1496 int kvm_unmap_hva(struct kvm
*kvm
, unsigned long hva
)
1498 return kvm_handle_hva(kvm
, hva
, 0, kvm_unmap_rmapp
);
1501 int kvm_unmap_hva_range(struct kvm
*kvm
, unsigned long start
, unsigned long end
)
1503 return kvm_handle_hva_range(kvm
, start
, end
, 0, kvm_unmap_rmapp
);
1506 void kvm_set_spte_hva(struct kvm
*kvm
, unsigned long hva
, pte_t pte
)
1508 kvm_handle_hva(kvm
, hva
, (unsigned long)&pte
, kvm_set_pte_rmapp
);
1511 static int kvm_age_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1512 struct kvm_memory_slot
*slot
, gfn_t gfn
, int level
,
1516 struct rmap_iterator
uninitialized_var(iter
);
1519 BUG_ON(!shadow_accessed_mask
);
1521 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;
1522 sptep
= rmap_get_next(&iter
)) {
1523 BUG_ON(!is_shadow_present_pte(*sptep
));
1525 if (*sptep
& shadow_accessed_mask
) {
1527 clear_bit((ffs(shadow_accessed_mask
) - 1),
1528 (unsigned long *)sptep
);
1531 trace_kvm_age_page(gfn
, level
, slot
, young
);
1535 static int kvm_test_age_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1536 struct kvm_memory_slot
*slot
, gfn_t gfn
,
1537 int level
, unsigned long data
)
1540 struct rmap_iterator iter
;
1544 * If there's no access bit in the secondary pte set by the
1545 * hardware it's up to gup-fast/gup to set the access bit in
1546 * the primary pte or in the page structure.
1548 if (!shadow_accessed_mask
)
1551 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;
1552 sptep
= rmap_get_next(&iter
)) {
1553 BUG_ON(!is_shadow_present_pte(*sptep
));
1555 if (*sptep
& shadow_accessed_mask
) {
1564 #define RMAP_RECYCLE_THRESHOLD 1000
1566 static void rmap_recycle(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
1568 unsigned long *rmapp
;
1569 struct kvm_mmu_page
*sp
;
1571 sp
= page_header(__pa(spte
));
1573 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
->role
.level
);
1575 kvm_unmap_rmapp(vcpu
->kvm
, rmapp
, NULL
, gfn
, sp
->role
.level
, 0);
1576 kvm_flush_remote_tlbs(vcpu
->kvm
);
1579 int kvm_age_hva(struct kvm
*kvm
, unsigned long start
, unsigned long end
)
1582 * In case of absence of EPT Access and Dirty Bits supports,
1583 * emulate the accessed bit for EPT, by checking if this page has
1584 * an EPT mapping, and clearing it if it does. On the next access,
1585 * a new EPT mapping will be established.
1586 * This has some overhead, but not as much as the cost of swapping
1587 * out actively used pages or breaking up actively used hugepages.
1589 if (!shadow_accessed_mask
) {
1591 * We are holding the kvm->mmu_lock, and we are blowing up
1592 * shadow PTEs. MMU notifier consumers need to be kept at bay.
1593 * This is correct as long as we don't decouple the mmu_lock
1594 * protected regions (like invalidate_range_start|end does).
1596 kvm
->mmu_notifier_seq
++;
1597 return kvm_handle_hva_range(kvm
, start
, end
, 0,
1601 return kvm_handle_hva_range(kvm
, start
, end
, 0, kvm_age_rmapp
);
1604 int kvm_test_age_hva(struct kvm
*kvm
, unsigned long hva
)
1606 return kvm_handle_hva(kvm
, hva
, 0, kvm_test_age_rmapp
);
1610 static int is_empty_shadow_page(u64
*spt
)
1615 for (pos
= spt
, end
= pos
+ PAGE_SIZE
/ sizeof(u64
); pos
!= end
; pos
++)
1616 if (is_shadow_present_pte(*pos
)) {
1617 printk(KERN_ERR
"%s: %p %llx\n", __func__
,
1626 * This value is the sum of all of the kvm instances's
1627 * kvm->arch.n_used_mmu_pages values. We need a global,
1628 * aggregate version in order to make the slab shrinker
1631 static inline void kvm_mod_used_mmu_pages(struct kvm
*kvm
, int nr
)
1633 kvm
->arch
.n_used_mmu_pages
+= nr
;
1634 percpu_counter_add(&kvm_total_used_mmu_pages
, nr
);
1637 static void kvm_mmu_free_page(struct kvm_mmu_page
*sp
)
1639 MMU_WARN_ON(!is_empty_shadow_page(sp
->spt
));
1640 hlist_del(&sp
->hash_link
);
1641 list_del(&sp
->link
);
1642 free_page((unsigned long)sp
->spt
);
1643 if (!sp
->role
.direct
)
1644 free_page((unsigned long)sp
->gfns
);
1645 kmem_cache_free(mmu_page_header_cache
, sp
);
1648 static unsigned kvm_page_table_hashfn(gfn_t gfn
)
1650 return gfn
& ((1 << KVM_MMU_HASH_SHIFT
) - 1);
1653 static void mmu_page_add_parent_pte(struct kvm_vcpu
*vcpu
,
1654 struct kvm_mmu_page
*sp
, u64
*parent_pte
)
1659 pte_list_add(vcpu
, parent_pte
, &sp
->parent_ptes
);
1662 static void mmu_page_remove_parent_pte(struct kvm_mmu_page
*sp
,
1665 pte_list_remove(parent_pte
, &sp
->parent_ptes
);
1668 static void drop_parent_pte(struct kvm_mmu_page
*sp
,
1671 mmu_page_remove_parent_pte(sp
, parent_pte
);
1672 mmu_spte_clear_no_track(parent_pte
);
1675 static struct kvm_mmu_page
*kvm_mmu_alloc_page(struct kvm_vcpu
*vcpu
,
1676 u64
*parent_pte
, int direct
)
1678 struct kvm_mmu_page
*sp
;
1680 sp
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_header_cache
);
1681 sp
->spt
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
);
1683 sp
->gfns
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
);
1684 set_page_private(virt_to_page(sp
->spt
), (unsigned long)sp
);
1687 * The active_mmu_pages list is the FIFO list, do not move the
1688 * page until it is zapped. kvm_zap_obsolete_pages depends on
1689 * this feature. See the comments in kvm_zap_obsolete_pages().
1691 list_add(&sp
->link
, &vcpu
->kvm
->arch
.active_mmu_pages
);
1692 sp
->parent_ptes
= 0;
1693 mmu_page_add_parent_pte(vcpu
, sp
, parent_pte
);
1694 kvm_mod_used_mmu_pages(vcpu
->kvm
, +1);
1698 static void mark_unsync(u64
*spte
);
1699 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page
*sp
)
1701 pte_list_walk(&sp
->parent_ptes
, mark_unsync
);
1704 static void mark_unsync(u64
*spte
)
1706 struct kvm_mmu_page
*sp
;
1709 sp
= page_header(__pa(spte
));
1710 index
= spte
- sp
->spt
;
1711 if (__test_and_set_bit(index
, sp
->unsync_child_bitmap
))
1713 if (sp
->unsync_children
++)
1715 kvm_mmu_mark_parents_unsync(sp
);
1718 static int nonpaging_sync_page(struct kvm_vcpu
*vcpu
,
1719 struct kvm_mmu_page
*sp
)
1724 static void nonpaging_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
1728 static void nonpaging_update_pte(struct kvm_vcpu
*vcpu
,
1729 struct kvm_mmu_page
*sp
, u64
*spte
,
1735 #define KVM_PAGE_ARRAY_NR 16
1737 struct kvm_mmu_pages
{
1738 struct mmu_page_and_offset
{
1739 struct kvm_mmu_page
*sp
;
1741 } page
[KVM_PAGE_ARRAY_NR
];
1745 static int mmu_pages_add(struct kvm_mmu_pages
*pvec
, struct kvm_mmu_page
*sp
,
1751 for (i
=0; i
< pvec
->nr
; i
++)
1752 if (pvec
->page
[i
].sp
== sp
)
1755 pvec
->page
[pvec
->nr
].sp
= sp
;
1756 pvec
->page
[pvec
->nr
].idx
= idx
;
1758 return (pvec
->nr
== KVM_PAGE_ARRAY_NR
);
1761 static int __mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1762 struct kvm_mmu_pages
*pvec
)
1764 int i
, ret
, nr_unsync_leaf
= 0;
1766 for_each_set_bit(i
, sp
->unsync_child_bitmap
, 512) {
1767 struct kvm_mmu_page
*child
;
1768 u64 ent
= sp
->spt
[i
];
1770 if (!is_shadow_present_pte(ent
) || is_large_pte(ent
))
1771 goto clear_child_bitmap
;
1773 child
= page_header(ent
& PT64_BASE_ADDR_MASK
);
1775 if (child
->unsync_children
) {
1776 if (mmu_pages_add(pvec
, child
, i
))
1779 ret
= __mmu_unsync_walk(child
, pvec
);
1781 goto clear_child_bitmap
;
1783 nr_unsync_leaf
+= ret
;
1786 } else if (child
->unsync
) {
1788 if (mmu_pages_add(pvec
, child
, i
))
1791 goto clear_child_bitmap
;
1796 __clear_bit(i
, sp
->unsync_child_bitmap
);
1797 sp
->unsync_children
--;
1798 WARN_ON((int)sp
->unsync_children
< 0);
1802 return nr_unsync_leaf
;
1805 static int mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1806 struct kvm_mmu_pages
*pvec
)
1808 if (!sp
->unsync_children
)
1811 mmu_pages_add(pvec
, sp
, 0);
1812 return __mmu_unsync_walk(sp
, pvec
);
1815 static void kvm_unlink_unsync_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1817 WARN_ON(!sp
->unsync
);
1818 trace_kvm_mmu_sync_page(sp
);
1820 --kvm
->stat
.mmu_unsync
;
1823 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
1824 struct list_head
*invalid_list
);
1825 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
1826 struct list_head
*invalid_list
);
1829 * NOTE: we should pay more attention on the zapped-obsolete page
1830 * (is_obsolete_sp(sp) && sp->role.invalid) when you do hash list walk
1831 * since it has been deleted from active_mmu_pages but still can be found
1834 * for_each_gfn_indirect_valid_sp has skipped that kind of page and
1835 * kvm_mmu_get_page(), the only user of for_each_gfn_sp(), has skipped
1836 * all the obsolete pages.
1838 #define for_each_gfn_sp(_kvm, _sp, _gfn) \
1839 hlist_for_each_entry(_sp, \
1840 &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)], hash_link) \
1841 if ((_sp)->gfn != (_gfn)) {} else
1843 #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \
1844 for_each_gfn_sp(_kvm, _sp, _gfn) \
1845 if ((_sp)->role.direct || (_sp)->role.invalid) {} else
1847 /* @sp->gfn should be write-protected at the call site */
1848 static int __kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1849 struct list_head
*invalid_list
, bool clear_unsync
)
1851 if (sp
->role
.cr4_pae
!= !!is_pae(vcpu
)) {
1852 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1857 kvm_unlink_unsync_page(vcpu
->kvm
, sp
);
1859 if (vcpu
->arch
.mmu
.sync_page(vcpu
, sp
)) {
1860 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1864 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
1868 static int kvm_sync_page_transient(struct kvm_vcpu
*vcpu
,
1869 struct kvm_mmu_page
*sp
)
1871 LIST_HEAD(invalid_list
);
1874 ret
= __kvm_sync_page(vcpu
, sp
, &invalid_list
, false);
1876 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1881 #ifdef CONFIG_KVM_MMU_AUDIT
1882 #include "mmu_audit.c"
1884 static void kvm_mmu_audit(struct kvm_vcpu
*vcpu
, int point
) { }
1885 static void mmu_audit_disable(void) { }
1888 static int kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1889 struct list_head
*invalid_list
)
1891 return __kvm_sync_page(vcpu
, sp
, invalid_list
, true);
1894 /* @gfn should be write-protected at the call site */
1895 static void kvm_sync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
1897 struct kvm_mmu_page
*s
;
1898 LIST_HEAD(invalid_list
);
1901 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
) {
1905 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
1906 kvm_unlink_unsync_page(vcpu
->kvm
, s
);
1907 if ((s
->role
.cr4_pae
!= !!is_pae(vcpu
)) ||
1908 (vcpu
->arch
.mmu
.sync_page(vcpu
, s
))) {
1909 kvm_mmu_prepare_zap_page(vcpu
->kvm
, s
, &invalid_list
);
1915 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1917 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
1920 struct mmu_page_path
{
1921 struct kvm_mmu_page
*parent
[PT64_ROOT_LEVEL
-1];
1922 unsigned int idx
[PT64_ROOT_LEVEL
-1];
1925 #define for_each_sp(pvec, sp, parents, i) \
1926 for (i = mmu_pages_next(&pvec, &parents, -1), \
1927 sp = pvec.page[i].sp; \
1928 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1929 i = mmu_pages_next(&pvec, &parents, i))
1931 static int mmu_pages_next(struct kvm_mmu_pages
*pvec
,
1932 struct mmu_page_path
*parents
,
1937 for (n
= i
+1; n
< pvec
->nr
; n
++) {
1938 struct kvm_mmu_page
*sp
= pvec
->page
[n
].sp
;
1940 if (sp
->role
.level
== PT_PAGE_TABLE_LEVEL
) {
1941 parents
->idx
[0] = pvec
->page
[n
].idx
;
1945 parents
->parent
[sp
->role
.level
-2] = sp
;
1946 parents
->idx
[sp
->role
.level
-1] = pvec
->page
[n
].idx
;
1952 static void mmu_pages_clear_parents(struct mmu_page_path
*parents
)
1954 struct kvm_mmu_page
*sp
;
1955 unsigned int level
= 0;
1958 unsigned int idx
= parents
->idx
[level
];
1960 sp
= parents
->parent
[level
];
1964 --sp
->unsync_children
;
1965 WARN_ON((int)sp
->unsync_children
< 0);
1966 __clear_bit(idx
, sp
->unsync_child_bitmap
);
1968 } while (level
< PT64_ROOT_LEVEL
-1 && !sp
->unsync_children
);
1971 static void kvm_mmu_pages_init(struct kvm_mmu_page
*parent
,
1972 struct mmu_page_path
*parents
,
1973 struct kvm_mmu_pages
*pvec
)
1975 parents
->parent
[parent
->role
.level
-1] = NULL
;
1979 static void mmu_sync_children(struct kvm_vcpu
*vcpu
,
1980 struct kvm_mmu_page
*parent
)
1983 struct kvm_mmu_page
*sp
;
1984 struct mmu_page_path parents
;
1985 struct kvm_mmu_pages pages
;
1986 LIST_HEAD(invalid_list
);
1988 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1989 while (mmu_unsync_walk(parent
, &pages
)) {
1990 bool protected = false;
1992 for_each_sp(pages
, sp
, parents
, i
)
1993 protected |= rmap_write_protect(vcpu
->kvm
, sp
->gfn
);
1996 kvm_flush_remote_tlbs(vcpu
->kvm
);
1998 for_each_sp(pages
, sp
, parents
, i
) {
1999 kvm_sync_page(vcpu
, sp
, &invalid_list
);
2000 mmu_pages_clear_parents(&parents
);
2002 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
2003 cond_resched_lock(&vcpu
->kvm
->mmu_lock
);
2004 kvm_mmu_pages_init(parent
, &parents
, &pages
);
2008 static void init_shadow_page_table(struct kvm_mmu_page
*sp
)
2012 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
2016 static void __clear_sp_write_flooding_count(struct kvm_mmu_page
*sp
)
2018 sp
->write_flooding_count
= 0;
2021 static void clear_sp_write_flooding_count(u64
*spte
)
2023 struct kvm_mmu_page
*sp
= page_header(__pa(spte
));
2025 __clear_sp_write_flooding_count(sp
);
2028 static bool is_obsolete_sp(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
2030 return unlikely(sp
->mmu_valid_gen
!= kvm
->arch
.mmu_valid_gen
);
2033 static struct kvm_mmu_page
*kvm_mmu_get_page(struct kvm_vcpu
*vcpu
,
2041 union kvm_mmu_page_role role
;
2043 struct kvm_mmu_page
*sp
;
2044 bool need_sync
= false;
2046 role
= vcpu
->arch
.mmu
.base_role
;
2048 role
.direct
= direct
;
2051 role
.access
= access
;
2052 if (!vcpu
->arch
.mmu
.direct_map
2053 && vcpu
->arch
.mmu
.root_level
<= PT32_ROOT_LEVEL
) {
2054 quadrant
= gaddr
>> (PAGE_SHIFT
+ (PT64_PT_BITS
* level
));
2055 quadrant
&= (1 << ((PT32_PT_BITS
- PT64_PT_BITS
) * level
)) - 1;
2056 role
.quadrant
= quadrant
;
2058 for_each_gfn_sp(vcpu
->kvm
, sp
, gfn
) {
2059 if (is_obsolete_sp(vcpu
->kvm
, sp
))
2062 if (!need_sync
&& sp
->unsync
)
2065 if (sp
->role
.word
!= role
.word
)
2068 if (sp
->unsync
&& kvm_sync_page_transient(vcpu
, sp
))
2071 mmu_page_add_parent_pte(vcpu
, sp
, parent_pte
);
2072 if (sp
->unsync_children
) {
2073 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
2074 kvm_mmu_mark_parents_unsync(sp
);
2075 } else if (sp
->unsync
)
2076 kvm_mmu_mark_parents_unsync(sp
);
2078 __clear_sp_write_flooding_count(sp
);
2079 trace_kvm_mmu_get_page(sp
, false);
2082 ++vcpu
->kvm
->stat
.mmu_cache_miss
;
2083 sp
= kvm_mmu_alloc_page(vcpu
, parent_pte
, direct
);
2088 hlist_add_head(&sp
->hash_link
,
2089 &vcpu
->kvm
->arch
.mmu_page_hash
[kvm_page_table_hashfn(gfn
)]);
2091 if (rmap_write_protect(vcpu
->kvm
, gfn
))
2092 kvm_flush_remote_tlbs(vcpu
->kvm
);
2093 if (level
> PT_PAGE_TABLE_LEVEL
&& need_sync
)
2094 kvm_sync_pages(vcpu
, gfn
);
2096 account_shadowed(vcpu
->kvm
, gfn
);
2098 sp
->mmu_valid_gen
= vcpu
->kvm
->arch
.mmu_valid_gen
;
2099 init_shadow_page_table(sp
);
2100 trace_kvm_mmu_get_page(sp
, true);
2104 static void shadow_walk_init(struct kvm_shadow_walk_iterator
*iterator
,
2105 struct kvm_vcpu
*vcpu
, u64 addr
)
2107 iterator
->addr
= addr
;
2108 iterator
->shadow_addr
= vcpu
->arch
.mmu
.root_hpa
;
2109 iterator
->level
= vcpu
->arch
.mmu
.shadow_root_level
;
2111 if (iterator
->level
== PT64_ROOT_LEVEL
&&
2112 vcpu
->arch
.mmu
.root_level
< PT64_ROOT_LEVEL
&&
2113 !vcpu
->arch
.mmu
.direct_map
)
2116 if (iterator
->level
== PT32E_ROOT_LEVEL
) {
2117 iterator
->shadow_addr
2118 = vcpu
->arch
.mmu
.pae_root
[(addr
>> 30) & 3];
2119 iterator
->shadow_addr
&= PT64_BASE_ADDR_MASK
;
2121 if (!iterator
->shadow_addr
)
2122 iterator
->level
= 0;
2126 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator
*iterator
)
2128 if (iterator
->level
< PT_PAGE_TABLE_LEVEL
)
2131 iterator
->index
= SHADOW_PT_INDEX(iterator
->addr
, iterator
->level
);
2132 iterator
->sptep
= ((u64
*)__va(iterator
->shadow_addr
)) + iterator
->index
;
2136 static void __shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
,
2139 if (is_last_spte(spte
, iterator
->level
)) {
2140 iterator
->level
= 0;
2144 iterator
->shadow_addr
= spte
& PT64_BASE_ADDR_MASK
;
2148 static void shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
)
2150 return __shadow_walk_next(iterator
, *iterator
->sptep
);
2153 static void link_shadow_page(u64
*sptep
, struct kvm_mmu_page
*sp
, bool accessed
)
2157 BUILD_BUG_ON(VMX_EPT_READABLE_MASK
!= PT_PRESENT_MASK
||
2158 VMX_EPT_WRITABLE_MASK
!= PT_WRITABLE_MASK
);
2160 spte
= __pa(sp
->spt
) | PT_PRESENT_MASK
| PT_WRITABLE_MASK
|
2161 shadow_user_mask
| shadow_x_mask
;
2164 spte
|= shadow_accessed_mask
;
2166 mmu_spte_set(sptep
, spte
);
2169 static void validate_direct_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2170 unsigned direct_access
)
2172 if (is_shadow_present_pte(*sptep
) && !is_large_pte(*sptep
)) {
2173 struct kvm_mmu_page
*child
;
2176 * For the direct sp, if the guest pte's dirty bit
2177 * changed form clean to dirty, it will corrupt the
2178 * sp's access: allow writable in the read-only sp,
2179 * so we should update the spte at this point to get
2180 * a new sp with the correct access.
2182 child
= page_header(*sptep
& PT64_BASE_ADDR_MASK
);
2183 if (child
->role
.access
== direct_access
)
2186 drop_parent_pte(child
, sptep
);
2187 kvm_flush_remote_tlbs(vcpu
->kvm
);
2191 static bool mmu_page_zap_pte(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
2195 struct kvm_mmu_page
*child
;
2198 if (is_shadow_present_pte(pte
)) {
2199 if (is_last_spte(pte
, sp
->role
.level
)) {
2200 drop_spte(kvm
, spte
);
2201 if (is_large_pte(pte
))
2204 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
2205 drop_parent_pte(child
, spte
);
2210 if (is_mmio_spte(pte
))
2211 mmu_spte_clear_no_track(spte
);
2216 static void kvm_mmu_page_unlink_children(struct kvm
*kvm
,
2217 struct kvm_mmu_page
*sp
)
2221 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
2222 mmu_page_zap_pte(kvm
, sp
, sp
->spt
+ i
);
2225 static void kvm_mmu_put_page(struct kvm_mmu_page
*sp
, u64
*parent_pte
)
2227 mmu_page_remove_parent_pte(sp
, parent_pte
);
2230 static void kvm_mmu_unlink_parents(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
2233 struct rmap_iterator iter
;
2235 while ((sptep
= rmap_get_first(sp
->parent_ptes
, &iter
)))
2236 drop_parent_pte(sp
, sptep
);
2239 static int mmu_zap_unsync_children(struct kvm
*kvm
,
2240 struct kvm_mmu_page
*parent
,
2241 struct list_head
*invalid_list
)
2244 struct mmu_page_path parents
;
2245 struct kvm_mmu_pages pages
;
2247 if (parent
->role
.level
== PT_PAGE_TABLE_LEVEL
)
2250 kvm_mmu_pages_init(parent
, &parents
, &pages
);
2251 while (mmu_unsync_walk(parent
, &pages
)) {
2252 struct kvm_mmu_page
*sp
;
2254 for_each_sp(pages
, sp
, parents
, i
) {
2255 kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
);
2256 mmu_pages_clear_parents(&parents
);
2259 kvm_mmu_pages_init(parent
, &parents
, &pages
);
2265 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
2266 struct list_head
*invalid_list
)
2270 trace_kvm_mmu_prepare_zap_page(sp
);
2271 ++kvm
->stat
.mmu_shadow_zapped
;
2272 ret
= mmu_zap_unsync_children(kvm
, sp
, invalid_list
);
2273 kvm_mmu_page_unlink_children(kvm
, sp
);
2274 kvm_mmu_unlink_parents(kvm
, sp
);
2276 if (!sp
->role
.invalid
&& !sp
->role
.direct
)
2277 unaccount_shadowed(kvm
, sp
->gfn
);
2280 kvm_unlink_unsync_page(kvm
, sp
);
2281 if (!sp
->root_count
) {
2284 list_move(&sp
->link
, invalid_list
);
2285 kvm_mod_used_mmu_pages(kvm
, -1);
2287 list_move(&sp
->link
, &kvm
->arch
.active_mmu_pages
);
2290 * The obsolete pages can not be used on any vcpus.
2291 * See the comments in kvm_mmu_invalidate_zap_all_pages().
2293 if (!sp
->role
.invalid
&& !is_obsolete_sp(kvm
, sp
))
2294 kvm_reload_remote_mmus(kvm
);
2297 sp
->role
.invalid
= 1;
2301 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
2302 struct list_head
*invalid_list
)
2304 struct kvm_mmu_page
*sp
, *nsp
;
2306 if (list_empty(invalid_list
))
2310 * wmb: make sure everyone sees our modifications to the page tables
2311 * rmb: make sure we see changes to vcpu->mode
2316 * Wait for all vcpus to exit guest mode and/or lockless shadow
2319 kvm_flush_remote_tlbs(kvm
);
2321 list_for_each_entry_safe(sp
, nsp
, invalid_list
, link
) {
2322 WARN_ON(!sp
->role
.invalid
|| sp
->root_count
);
2323 kvm_mmu_free_page(sp
);
2327 static bool prepare_zap_oldest_mmu_page(struct kvm
*kvm
,
2328 struct list_head
*invalid_list
)
2330 struct kvm_mmu_page
*sp
;
2332 if (list_empty(&kvm
->arch
.active_mmu_pages
))
2335 sp
= list_entry(kvm
->arch
.active_mmu_pages
.prev
,
2336 struct kvm_mmu_page
, link
);
2337 kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
);
2343 * Changing the number of mmu pages allocated to the vm
2344 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
2346 void kvm_mmu_change_mmu_pages(struct kvm
*kvm
, unsigned int goal_nr_mmu_pages
)
2348 LIST_HEAD(invalid_list
);
2350 spin_lock(&kvm
->mmu_lock
);
2352 if (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
) {
2353 /* Need to free some mmu pages to achieve the goal. */
2354 while (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
)
2355 if (!prepare_zap_oldest_mmu_page(kvm
, &invalid_list
))
2358 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
2359 goal_nr_mmu_pages
= kvm
->arch
.n_used_mmu_pages
;
2362 kvm
->arch
.n_max_mmu_pages
= goal_nr_mmu_pages
;
2364 spin_unlock(&kvm
->mmu_lock
);
2367 int kvm_mmu_unprotect_page(struct kvm
*kvm
, gfn_t gfn
)
2369 struct kvm_mmu_page
*sp
;
2370 LIST_HEAD(invalid_list
);
2373 pgprintk("%s: looking for gfn %llx\n", __func__
, gfn
);
2375 spin_lock(&kvm
->mmu_lock
);
2376 for_each_gfn_indirect_valid_sp(kvm
, sp
, gfn
) {
2377 pgprintk("%s: gfn %llx role %x\n", __func__
, gfn
,
2380 kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
);
2382 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
2383 spin_unlock(&kvm
->mmu_lock
);
2387 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page
);
2390 * The function is based on mtrr_type_lookup() in
2391 * arch/x86/kernel/cpu/mtrr/generic.c
2393 static int get_mtrr_type(struct mtrr_state_type
*mtrr_state
,
2398 u8 prev_match
, curr_match
;
2399 int num_var_ranges
= KVM_NR_VAR_MTRR
;
2401 if (!mtrr_state
->enabled
)
2404 /* Make end inclusive end, instead of exclusive */
2407 /* Look in fixed ranges. Just return the type as per start */
2408 if (mtrr_state
->have_fixed
&& (start
< 0x100000)) {
2411 if (start
< 0x80000) {
2413 idx
+= (start
>> 16);
2414 return mtrr_state
->fixed_ranges
[idx
];
2415 } else if (start
< 0xC0000) {
2417 idx
+= ((start
- 0x80000) >> 14);
2418 return mtrr_state
->fixed_ranges
[idx
];
2419 } else if (start
< 0x1000000) {
2421 idx
+= ((start
- 0xC0000) >> 12);
2422 return mtrr_state
->fixed_ranges
[idx
];
2427 * Look in variable ranges
2428 * Look of multiple ranges matching this address and pick type
2429 * as per MTRR precedence
2431 if (!(mtrr_state
->enabled
& 2))
2432 return mtrr_state
->def_type
;
2435 for (i
= 0; i
< num_var_ranges
; ++i
) {
2436 unsigned short start_state
, end_state
;
2438 if (!(mtrr_state
->var_ranges
[i
].mask_lo
& (1 << 11)))
2441 base
= (((u64
)mtrr_state
->var_ranges
[i
].base_hi
) << 32) +
2442 (mtrr_state
->var_ranges
[i
].base_lo
& PAGE_MASK
);
2443 mask
= (((u64
)mtrr_state
->var_ranges
[i
].mask_hi
) << 32) +
2444 (mtrr_state
->var_ranges
[i
].mask_lo
& PAGE_MASK
);
2446 start_state
= ((start
& mask
) == (base
& mask
));
2447 end_state
= ((end
& mask
) == (base
& mask
));
2448 if (start_state
!= end_state
)
2451 if ((start
& mask
) != (base
& mask
))
2454 curr_match
= mtrr_state
->var_ranges
[i
].base_lo
& 0xff;
2455 if (prev_match
== 0xFF) {
2456 prev_match
= curr_match
;
2460 if (prev_match
== MTRR_TYPE_UNCACHABLE
||
2461 curr_match
== MTRR_TYPE_UNCACHABLE
)
2462 return MTRR_TYPE_UNCACHABLE
;
2464 if ((prev_match
== MTRR_TYPE_WRBACK
&&
2465 curr_match
== MTRR_TYPE_WRTHROUGH
) ||
2466 (prev_match
== MTRR_TYPE_WRTHROUGH
&&
2467 curr_match
== MTRR_TYPE_WRBACK
)) {
2468 prev_match
= MTRR_TYPE_WRTHROUGH
;
2469 curr_match
= MTRR_TYPE_WRTHROUGH
;
2472 if (prev_match
!= curr_match
)
2473 return MTRR_TYPE_UNCACHABLE
;
2476 if (prev_match
!= 0xFF)
2479 return mtrr_state
->def_type
;
2482 u8
kvm_get_guest_memory_type(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
2486 mtrr
= get_mtrr_type(&vcpu
->arch
.mtrr_state
, gfn
<< PAGE_SHIFT
,
2487 (gfn
<< PAGE_SHIFT
) + PAGE_SIZE
);
2488 if (mtrr
== 0xfe || mtrr
== 0xff)
2489 mtrr
= MTRR_TYPE_WRBACK
;
2492 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type
);
2494 static void __kvm_unsync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
)
2496 trace_kvm_mmu_unsync_page(sp
);
2497 ++vcpu
->kvm
->stat
.mmu_unsync
;
2500 kvm_mmu_mark_parents_unsync(sp
);
2503 static void kvm_unsync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
2505 struct kvm_mmu_page
*s
;
2507 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
) {
2510 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
2511 __kvm_unsync_page(vcpu
, s
);
2515 static int mmu_need_write_protect(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2518 struct kvm_mmu_page
*s
;
2519 bool need_unsync
= false;
2521 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
) {
2525 if (s
->role
.level
!= PT_PAGE_TABLE_LEVEL
)
2532 kvm_unsync_pages(vcpu
, gfn
);
2536 static int set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2537 unsigned pte_access
, int level
,
2538 gfn_t gfn
, pfn_t pfn
, bool speculative
,
2539 bool can_unsync
, bool host_writable
)
2544 if (set_mmio_spte(vcpu
->kvm
, sptep
, gfn
, pfn
, pte_access
))
2547 spte
= PT_PRESENT_MASK
;
2549 spte
|= shadow_accessed_mask
;
2551 if (pte_access
& ACC_EXEC_MASK
)
2552 spte
|= shadow_x_mask
;
2554 spte
|= shadow_nx_mask
;
2556 if (pte_access
& ACC_USER_MASK
)
2557 spte
|= shadow_user_mask
;
2559 if (level
> PT_PAGE_TABLE_LEVEL
)
2560 spte
|= PT_PAGE_SIZE_MASK
;
2562 spte
|= kvm_x86_ops
->get_mt_mask(vcpu
, gfn
,
2563 kvm_is_reserved_pfn(pfn
));
2566 spte
|= SPTE_HOST_WRITEABLE
;
2568 pte_access
&= ~ACC_WRITE_MASK
;
2570 spte
|= (u64
)pfn
<< PAGE_SHIFT
;
2572 if (pte_access
& ACC_WRITE_MASK
) {
2575 * Other vcpu creates new sp in the window between
2576 * mapping_level() and acquiring mmu-lock. We can
2577 * allow guest to retry the access, the mapping can
2578 * be fixed if guest refault.
2580 if (level
> PT_PAGE_TABLE_LEVEL
&&
2581 has_wrprotected_page(vcpu
->kvm
, gfn
, level
))
2584 spte
|= PT_WRITABLE_MASK
| SPTE_MMU_WRITEABLE
;
2587 * Optimization: for pte sync, if spte was writable the hash
2588 * lookup is unnecessary (and expensive). Write protection
2589 * is responsibility of mmu_get_page / kvm_sync_page.
2590 * Same reasoning can be applied to dirty page accounting.
2592 if (!can_unsync
&& is_writable_pte(*sptep
))
2595 if (mmu_need_write_protect(vcpu
, gfn
, can_unsync
)) {
2596 pgprintk("%s: found shadow page for %llx, marking ro\n",
2599 pte_access
&= ~ACC_WRITE_MASK
;
2600 spte
&= ~(PT_WRITABLE_MASK
| SPTE_MMU_WRITEABLE
);
2604 if (pte_access
& ACC_WRITE_MASK
) {
2605 mark_page_dirty(vcpu
->kvm
, gfn
);
2606 spte
|= shadow_dirty_mask
;
2610 if (mmu_spte_update(sptep
, spte
))
2611 kvm_flush_remote_tlbs(vcpu
->kvm
);
2616 static void mmu_set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2617 unsigned pte_access
, int write_fault
, int *emulate
,
2618 int level
, gfn_t gfn
, pfn_t pfn
, bool speculative
,
2621 int was_rmapped
= 0;
2624 pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__
,
2625 *sptep
, write_fault
, gfn
);
2627 if (is_rmap_spte(*sptep
)) {
2629 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2630 * the parent of the now unreachable PTE.
2632 if (level
> PT_PAGE_TABLE_LEVEL
&&
2633 !is_large_pte(*sptep
)) {
2634 struct kvm_mmu_page
*child
;
2637 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
2638 drop_parent_pte(child
, sptep
);
2639 kvm_flush_remote_tlbs(vcpu
->kvm
);
2640 } else if (pfn
!= spte_to_pfn(*sptep
)) {
2641 pgprintk("hfn old %llx new %llx\n",
2642 spte_to_pfn(*sptep
), pfn
);
2643 drop_spte(vcpu
->kvm
, sptep
);
2644 kvm_flush_remote_tlbs(vcpu
->kvm
);
2649 if (set_spte(vcpu
, sptep
, pte_access
, level
, gfn
, pfn
, speculative
,
2650 true, host_writable
)) {
2653 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
2656 if (unlikely(is_mmio_spte(*sptep
) && emulate
))
2659 pgprintk("%s: setting spte %llx\n", __func__
, *sptep
);
2660 pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2661 is_large_pte(*sptep
)? "2MB" : "4kB",
2662 *sptep
& PT_PRESENT_MASK
?"RW":"R", gfn
,
2664 if (!was_rmapped
&& is_large_pte(*sptep
))
2665 ++vcpu
->kvm
->stat
.lpages
;
2667 if (is_shadow_present_pte(*sptep
)) {
2669 rmap_count
= rmap_add(vcpu
, sptep
, gfn
);
2670 if (rmap_count
> RMAP_RECYCLE_THRESHOLD
)
2671 rmap_recycle(vcpu
, sptep
, gfn
);
2675 kvm_release_pfn_clean(pfn
);
2678 static pfn_t
pte_prefetch_gfn_to_pfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2681 struct kvm_memory_slot
*slot
;
2683 slot
= gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, no_dirty_log
);
2685 return KVM_PFN_ERR_FAULT
;
2687 return gfn_to_pfn_memslot_atomic(slot
, gfn
);
2690 static int direct_pte_prefetch_many(struct kvm_vcpu
*vcpu
,
2691 struct kvm_mmu_page
*sp
,
2692 u64
*start
, u64
*end
)
2694 struct page
*pages
[PTE_PREFETCH_NUM
];
2695 unsigned access
= sp
->role
.access
;
2699 gfn
= kvm_mmu_page_get_gfn(sp
, start
- sp
->spt
);
2700 if (!gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, access
& ACC_WRITE_MASK
))
2703 ret
= gfn_to_page_many_atomic(vcpu
->kvm
, gfn
, pages
, end
- start
);
2707 for (i
= 0; i
< ret
; i
++, gfn
++, start
++)
2708 mmu_set_spte(vcpu
, start
, access
, 0, NULL
,
2709 sp
->role
.level
, gfn
, page_to_pfn(pages
[i
]),
2715 static void __direct_pte_prefetch(struct kvm_vcpu
*vcpu
,
2716 struct kvm_mmu_page
*sp
, u64
*sptep
)
2718 u64
*spte
, *start
= NULL
;
2721 WARN_ON(!sp
->role
.direct
);
2723 i
= (sptep
- sp
->spt
) & ~(PTE_PREFETCH_NUM
- 1);
2726 for (i
= 0; i
< PTE_PREFETCH_NUM
; i
++, spte
++) {
2727 if (is_shadow_present_pte(*spte
) || spte
== sptep
) {
2730 if (direct_pte_prefetch_many(vcpu
, sp
, start
, spte
) < 0)
2738 static void direct_pte_prefetch(struct kvm_vcpu
*vcpu
, u64
*sptep
)
2740 struct kvm_mmu_page
*sp
;
2743 * Since it's no accessed bit on EPT, it's no way to
2744 * distinguish between actually accessed translations
2745 * and prefetched, so disable pte prefetch if EPT is
2748 if (!shadow_accessed_mask
)
2751 sp
= page_header(__pa(sptep
));
2752 if (sp
->role
.level
> PT_PAGE_TABLE_LEVEL
)
2755 __direct_pte_prefetch(vcpu
, sp
, sptep
);
2758 static int __direct_map(struct kvm_vcpu
*vcpu
, gpa_t v
, int write
,
2759 int map_writable
, int level
, gfn_t gfn
, pfn_t pfn
,
2762 struct kvm_shadow_walk_iterator iterator
;
2763 struct kvm_mmu_page
*sp
;
2767 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2770 for_each_shadow_entry(vcpu
, (u64
)gfn
<< PAGE_SHIFT
, iterator
) {
2771 if (iterator
.level
== level
) {
2772 mmu_set_spte(vcpu
, iterator
.sptep
, ACC_ALL
,
2773 write
, &emulate
, level
, gfn
, pfn
,
2774 prefault
, map_writable
);
2775 direct_pte_prefetch(vcpu
, iterator
.sptep
);
2776 ++vcpu
->stat
.pf_fixed
;
2780 drop_large_spte(vcpu
, iterator
.sptep
);
2781 if (!is_shadow_present_pte(*iterator
.sptep
)) {
2782 u64 base_addr
= iterator
.addr
;
2784 base_addr
&= PT64_LVL_ADDR_MASK(iterator
.level
);
2785 pseudo_gfn
= base_addr
>> PAGE_SHIFT
;
2786 sp
= kvm_mmu_get_page(vcpu
, pseudo_gfn
, iterator
.addr
,
2788 1, ACC_ALL
, iterator
.sptep
);
2790 link_shadow_page(iterator
.sptep
, sp
, true);
2796 static void kvm_send_hwpoison_signal(unsigned long address
, struct task_struct
*tsk
)
2800 info
.si_signo
= SIGBUS
;
2802 info
.si_code
= BUS_MCEERR_AR
;
2803 info
.si_addr
= (void __user
*)address
;
2804 info
.si_addr_lsb
= PAGE_SHIFT
;
2806 send_sig_info(SIGBUS
, &info
, tsk
);
2809 static int kvm_handle_bad_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
, pfn_t pfn
)
2812 * Do not cache the mmio info caused by writing the readonly gfn
2813 * into the spte otherwise read access on readonly gfn also can
2814 * caused mmio page fault and treat it as mmio access.
2815 * Return 1 to tell kvm to emulate it.
2817 if (pfn
== KVM_PFN_ERR_RO_FAULT
)
2820 if (pfn
== KVM_PFN_ERR_HWPOISON
) {
2821 kvm_send_hwpoison_signal(gfn_to_hva(vcpu
->kvm
, gfn
), current
);
2828 static void transparent_hugepage_adjust(struct kvm_vcpu
*vcpu
,
2829 gfn_t
*gfnp
, pfn_t
*pfnp
, int *levelp
)
2833 int level
= *levelp
;
2836 * Check if it's a transparent hugepage. If this would be an
2837 * hugetlbfs page, level wouldn't be set to
2838 * PT_PAGE_TABLE_LEVEL and there would be no adjustment done
2841 if (!is_error_noslot_pfn(pfn
) && !kvm_is_reserved_pfn(pfn
) &&
2842 level
== PT_PAGE_TABLE_LEVEL
&&
2843 PageTransCompound(pfn_to_page(pfn
)) &&
2844 !has_wrprotected_page(vcpu
->kvm
, gfn
, PT_DIRECTORY_LEVEL
)) {
2847 * mmu_notifier_retry was successful and we hold the
2848 * mmu_lock here, so the pmd can't become splitting
2849 * from under us, and in turn
2850 * __split_huge_page_refcount() can't run from under
2851 * us and we can safely transfer the refcount from
2852 * PG_tail to PG_head as we switch the pfn to tail to
2855 *levelp
= level
= PT_DIRECTORY_LEVEL
;
2856 mask
= KVM_PAGES_PER_HPAGE(level
) - 1;
2857 VM_BUG_ON((gfn
& mask
) != (pfn
& mask
));
2861 kvm_release_pfn_clean(pfn
);
2869 static bool handle_abnormal_pfn(struct kvm_vcpu
*vcpu
, gva_t gva
, gfn_t gfn
,
2870 pfn_t pfn
, unsigned access
, int *ret_val
)
2874 /* The pfn is invalid, report the error! */
2875 if (unlikely(is_error_pfn(pfn
))) {
2876 *ret_val
= kvm_handle_bad_page(vcpu
, gfn
, pfn
);
2880 if (unlikely(is_noslot_pfn(pfn
)))
2881 vcpu_cache_mmio_info(vcpu
, gva
, gfn
, access
);
2888 static bool page_fault_can_be_fast(u32 error_code
)
2891 * Do not fix the mmio spte with invalid generation number which
2892 * need to be updated by slow page fault path.
2894 if (unlikely(error_code
& PFERR_RSVD_MASK
))
2898 * #PF can be fast only if the shadow page table is present and it
2899 * is caused by write-protect, that means we just need change the
2900 * W bit of the spte which can be done out of mmu-lock.
2902 if (!(error_code
& PFERR_PRESENT_MASK
) ||
2903 !(error_code
& PFERR_WRITE_MASK
))
2910 fast_pf_fix_direct_spte(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
2911 u64
*sptep
, u64 spte
)
2915 WARN_ON(!sp
->role
.direct
);
2918 * The gfn of direct spte is stable since it is calculated
2921 gfn
= kvm_mmu_page_get_gfn(sp
, sptep
- sp
->spt
);
2924 * Theoretically we could also set dirty bit (and flush TLB) here in
2925 * order to eliminate unnecessary PML logging. See comments in
2926 * set_spte. But fast_page_fault is very unlikely to happen with PML
2927 * enabled, so we do not do this. This might result in the same GPA
2928 * to be logged in PML buffer again when the write really happens, and
2929 * eventually to be called by mark_page_dirty twice. But it's also no
2930 * harm. This also avoids the TLB flush needed after setting dirty bit
2931 * so non-PML cases won't be impacted.
2933 * Compare with set_spte where instead shadow_dirty_mask is set.
2935 if (cmpxchg64(sptep
, spte
, spte
| PT_WRITABLE_MASK
) == spte
)
2936 mark_page_dirty(vcpu
->kvm
, gfn
);
2943 * - true: let the vcpu to access on the same address again.
2944 * - false: let the real page fault path to fix it.
2946 static bool fast_page_fault(struct kvm_vcpu
*vcpu
, gva_t gva
, int level
,
2949 struct kvm_shadow_walk_iterator iterator
;
2950 struct kvm_mmu_page
*sp
;
2954 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2957 if (!page_fault_can_be_fast(error_code
))
2960 walk_shadow_page_lockless_begin(vcpu
);
2961 for_each_shadow_entry_lockless(vcpu
, gva
, iterator
, spte
)
2962 if (!is_shadow_present_pte(spte
) || iterator
.level
< level
)
2966 * If the mapping has been changed, let the vcpu fault on the
2967 * same address again.
2969 if (!is_rmap_spte(spte
)) {
2974 sp
= page_header(__pa(iterator
.sptep
));
2975 if (!is_last_spte(spte
, sp
->role
.level
))
2979 * Check if it is a spurious fault caused by TLB lazily flushed.
2981 * Need not check the access of upper level table entries since
2982 * they are always ACC_ALL.
2984 if (is_writable_pte(spte
)) {
2990 * Currently, to simplify the code, only the spte write-protected
2991 * by dirty-log can be fast fixed.
2993 if (!spte_is_locklessly_modifiable(spte
))
2997 * Do not fix write-permission on the large spte since we only dirty
2998 * the first page into the dirty-bitmap in fast_pf_fix_direct_spte()
2999 * that means other pages are missed if its slot is dirty-logged.
3001 * Instead, we let the slow page fault path create a normal spte to
3004 * See the comments in kvm_arch_commit_memory_region().
3006 if (sp
->role
.level
> PT_PAGE_TABLE_LEVEL
)
3010 * Currently, fast page fault only works for direct mapping since
3011 * the gfn is not stable for indirect shadow page.
3012 * See Documentation/virtual/kvm/locking.txt to get more detail.
3014 ret
= fast_pf_fix_direct_spte(vcpu
, sp
, iterator
.sptep
, spte
);
3016 trace_fast_page_fault(vcpu
, gva
, error_code
, iterator
.sptep
,
3018 walk_shadow_page_lockless_end(vcpu
);
3023 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
3024 gva_t gva
, pfn_t
*pfn
, bool write
, bool *writable
);
3025 static void make_mmu_pages_available(struct kvm_vcpu
*vcpu
);
3027 static int nonpaging_map(struct kvm_vcpu
*vcpu
, gva_t v
, u32 error_code
,
3028 gfn_t gfn
, bool prefault
)
3034 unsigned long mmu_seq
;
3035 bool map_writable
, write
= error_code
& PFERR_WRITE_MASK
;
3037 force_pt_level
= mapping_level_dirty_bitmap(vcpu
, gfn
);
3038 if (likely(!force_pt_level
)) {
3039 level
= mapping_level(vcpu
, gfn
);
3041 * This path builds a PAE pagetable - so we can map
3042 * 2mb pages at maximum. Therefore check if the level
3043 * is larger than that.
3045 if (level
> PT_DIRECTORY_LEVEL
)
3046 level
= PT_DIRECTORY_LEVEL
;
3048 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
3050 level
= PT_PAGE_TABLE_LEVEL
;
3052 if (fast_page_fault(vcpu
, v
, level
, error_code
))
3055 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
3058 if (try_async_pf(vcpu
, prefault
, gfn
, v
, &pfn
, write
, &map_writable
))
3061 if (handle_abnormal_pfn(vcpu
, v
, gfn
, pfn
, ACC_ALL
, &r
))
3064 spin_lock(&vcpu
->kvm
->mmu_lock
);
3065 if (mmu_notifier_retry(vcpu
->kvm
, mmu_seq
))
3067 make_mmu_pages_available(vcpu
);
3068 if (likely(!force_pt_level
))
3069 transparent_hugepage_adjust(vcpu
, &gfn
, &pfn
, &level
);
3070 r
= __direct_map(vcpu
, v
, write
, map_writable
, level
, gfn
, pfn
,
3072 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3078 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3079 kvm_release_pfn_clean(pfn
);
3084 static void mmu_free_roots(struct kvm_vcpu
*vcpu
)
3087 struct kvm_mmu_page
*sp
;
3088 LIST_HEAD(invalid_list
);
3090 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
3093 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
&&
3094 (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
||
3095 vcpu
->arch
.mmu
.direct_map
)) {
3096 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
3098 spin_lock(&vcpu
->kvm
->mmu_lock
);
3099 sp
= page_header(root
);
3101 if (!sp
->root_count
&& sp
->role
.invalid
) {
3102 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, &invalid_list
);
3103 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
3105 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3106 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
3110 spin_lock(&vcpu
->kvm
->mmu_lock
);
3111 for (i
= 0; i
< 4; ++i
) {
3112 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
3115 root
&= PT64_BASE_ADDR_MASK
;
3116 sp
= page_header(root
);
3118 if (!sp
->root_count
&& sp
->role
.invalid
)
3119 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
3122 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
3124 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
3125 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3126 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
3129 static int mmu_check_root(struct kvm_vcpu
*vcpu
, gfn_t root_gfn
)
3133 if (!kvm_is_visible_gfn(vcpu
->kvm
, root_gfn
)) {
3134 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3141 static int mmu_alloc_direct_roots(struct kvm_vcpu
*vcpu
)
3143 struct kvm_mmu_page
*sp
;
3146 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
3147 spin_lock(&vcpu
->kvm
->mmu_lock
);
3148 make_mmu_pages_available(vcpu
);
3149 sp
= kvm_mmu_get_page(vcpu
, 0, 0, PT64_ROOT_LEVEL
,
3152 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3153 vcpu
->arch
.mmu
.root_hpa
= __pa(sp
->spt
);
3154 } else if (vcpu
->arch
.mmu
.shadow_root_level
== PT32E_ROOT_LEVEL
) {
3155 for (i
= 0; i
< 4; ++i
) {
3156 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
3158 MMU_WARN_ON(VALID_PAGE(root
));
3159 spin_lock(&vcpu
->kvm
->mmu_lock
);
3160 make_mmu_pages_available(vcpu
);
3161 sp
= kvm_mmu_get_page(vcpu
, i
<< (30 - PAGE_SHIFT
),
3163 PT32_ROOT_LEVEL
, 1, ACC_ALL
,
3165 root
= __pa(sp
->spt
);
3167 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3168 vcpu
->arch
.mmu
.pae_root
[i
] = root
| PT_PRESENT_MASK
;
3170 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
3177 static int mmu_alloc_shadow_roots(struct kvm_vcpu
*vcpu
)
3179 struct kvm_mmu_page
*sp
;
3184 root_gfn
= vcpu
->arch
.mmu
.get_cr3(vcpu
) >> PAGE_SHIFT
;
3186 if (mmu_check_root(vcpu
, root_gfn
))
3190 * Do we shadow a long mode page table? If so we need to
3191 * write-protect the guests page table root.
3193 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
3194 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
3196 MMU_WARN_ON(VALID_PAGE(root
));
3198 spin_lock(&vcpu
->kvm
->mmu_lock
);
3199 make_mmu_pages_available(vcpu
);
3200 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, 0, PT64_ROOT_LEVEL
,
3202 root
= __pa(sp
->spt
);
3204 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3205 vcpu
->arch
.mmu
.root_hpa
= root
;
3210 * We shadow a 32 bit page table. This may be a legacy 2-level
3211 * or a PAE 3-level page table. In either case we need to be aware that
3212 * the shadow page table may be a PAE or a long mode page table.
3214 pm_mask
= PT_PRESENT_MASK
;
3215 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
)
3216 pm_mask
|= PT_ACCESSED_MASK
| PT_WRITABLE_MASK
| PT_USER_MASK
;
3218 for (i
= 0; i
< 4; ++i
) {
3219 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
3221 MMU_WARN_ON(VALID_PAGE(root
));
3222 if (vcpu
->arch
.mmu
.root_level
== PT32E_ROOT_LEVEL
) {
3223 pdptr
= vcpu
->arch
.mmu
.get_pdptr(vcpu
, i
);
3224 if (!is_present_gpte(pdptr
)) {
3225 vcpu
->arch
.mmu
.pae_root
[i
] = 0;
3228 root_gfn
= pdptr
>> PAGE_SHIFT
;
3229 if (mmu_check_root(vcpu
, root_gfn
))
3232 spin_lock(&vcpu
->kvm
->mmu_lock
);
3233 make_mmu_pages_available(vcpu
);
3234 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, i
<< 30,
3237 root
= __pa(sp
->spt
);
3239 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3241 vcpu
->arch
.mmu
.pae_root
[i
] = root
| pm_mask
;
3243 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
3246 * If we shadow a 32 bit page table with a long mode page
3247 * table we enter this path.
3249 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
3250 if (vcpu
->arch
.mmu
.lm_root
== NULL
) {
3252 * The additional page necessary for this is only
3253 * allocated on demand.
3258 lm_root
= (void*)get_zeroed_page(GFP_KERNEL
);
3259 if (lm_root
== NULL
)
3262 lm_root
[0] = __pa(vcpu
->arch
.mmu
.pae_root
) | pm_mask
;
3264 vcpu
->arch
.mmu
.lm_root
= lm_root
;
3267 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.lm_root
);
3273 static int mmu_alloc_roots(struct kvm_vcpu
*vcpu
)
3275 if (vcpu
->arch
.mmu
.direct_map
)
3276 return mmu_alloc_direct_roots(vcpu
);
3278 return mmu_alloc_shadow_roots(vcpu
);
3281 static void mmu_sync_roots(struct kvm_vcpu
*vcpu
)
3284 struct kvm_mmu_page
*sp
;
3286 if (vcpu
->arch
.mmu
.direct_map
)
3289 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
3292 vcpu_clear_mmio_info(vcpu
, MMIO_GVA_ANY
);
3293 kvm_mmu_audit(vcpu
, AUDIT_PRE_SYNC
);
3294 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
3295 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
3296 sp
= page_header(root
);
3297 mmu_sync_children(vcpu
, sp
);
3298 kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
3301 for (i
= 0; i
< 4; ++i
) {
3302 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
3304 if (root
&& VALID_PAGE(root
)) {
3305 root
&= PT64_BASE_ADDR_MASK
;
3306 sp
= page_header(root
);
3307 mmu_sync_children(vcpu
, sp
);
3310 kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
3313 void kvm_mmu_sync_roots(struct kvm_vcpu
*vcpu
)
3315 spin_lock(&vcpu
->kvm
->mmu_lock
);
3316 mmu_sync_roots(vcpu
);
3317 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3319 EXPORT_SYMBOL_GPL(kvm_mmu_sync_roots
);
3321 static gpa_t
nonpaging_gva_to_gpa(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
3322 u32 access
, struct x86_exception
*exception
)
3325 exception
->error_code
= 0;
3329 static gpa_t
nonpaging_gva_to_gpa_nested(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
3331 struct x86_exception
*exception
)
3334 exception
->error_code
= 0;
3335 return vcpu
->arch
.nested_mmu
.translate_gpa(vcpu
, vaddr
, access
, exception
);
3338 static bool quickly_check_mmio_pf(struct kvm_vcpu
*vcpu
, u64 addr
, bool direct
)
3341 return vcpu_match_mmio_gpa(vcpu
, addr
);
3343 return vcpu_match_mmio_gva(vcpu
, addr
);
3348 * On direct hosts, the last spte is only allows two states
3349 * for mmio page fault:
3350 * - It is the mmio spte
3351 * - It is zapped or it is being zapped.
3353 * This function completely checks the spte when the last spte
3354 * is not the mmio spte.
3356 static bool check_direct_spte_mmio_pf(u64 spte
)
3358 return __check_direct_spte_mmio_pf(spte
);
3361 static u64
walk_shadow_page_get_mmio_spte(struct kvm_vcpu
*vcpu
, u64 addr
)
3363 struct kvm_shadow_walk_iterator iterator
;
3366 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
3369 walk_shadow_page_lockless_begin(vcpu
);
3370 for_each_shadow_entry_lockless(vcpu
, addr
, iterator
, spte
)
3371 if (!is_shadow_present_pte(spte
))
3373 walk_shadow_page_lockless_end(vcpu
);
3378 int handle_mmio_page_fault_common(struct kvm_vcpu
*vcpu
, u64 addr
, bool direct
)
3382 if (quickly_check_mmio_pf(vcpu
, addr
, direct
))
3383 return RET_MMIO_PF_EMULATE
;
3385 spte
= walk_shadow_page_get_mmio_spte(vcpu
, addr
);
3387 if (is_mmio_spte(spte
)) {
3388 gfn_t gfn
= get_mmio_spte_gfn(spte
);
3389 unsigned access
= get_mmio_spte_access(spte
);
3391 if (!check_mmio_spte(vcpu
->kvm
, spte
))
3392 return RET_MMIO_PF_INVALID
;
3397 trace_handle_mmio_page_fault(addr
, gfn
, access
);
3398 vcpu_cache_mmio_info(vcpu
, addr
, gfn
, access
);
3399 return RET_MMIO_PF_EMULATE
;
3403 * It's ok if the gva is remapped by other cpus on shadow guest,
3404 * it's a BUG if the gfn is not a mmio page.
3406 if (direct
&& !check_direct_spte_mmio_pf(spte
))
3407 return RET_MMIO_PF_BUG
;
3410 * If the page table is zapped by other cpus, let CPU fault again on
3413 return RET_MMIO_PF_RETRY
;
3415 EXPORT_SYMBOL_GPL(handle_mmio_page_fault_common
);
3417 static int handle_mmio_page_fault(struct kvm_vcpu
*vcpu
, u64 addr
,
3418 u32 error_code
, bool direct
)
3422 ret
= handle_mmio_page_fault_common(vcpu
, addr
, direct
);
3423 WARN_ON(ret
== RET_MMIO_PF_BUG
);
3427 static int nonpaging_page_fault(struct kvm_vcpu
*vcpu
, gva_t gva
,
3428 u32 error_code
, bool prefault
)
3433 pgprintk("%s: gva %lx error %x\n", __func__
, gva
, error_code
);
3435 if (unlikely(error_code
& PFERR_RSVD_MASK
)) {
3436 r
= handle_mmio_page_fault(vcpu
, gva
, error_code
, true);
3438 if (likely(r
!= RET_MMIO_PF_INVALID
))
3442 r
= mmu_topup_memory_caches(vcpu
);
3446 MMU_WARN_ON(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3448 gfn
= gva
>> PAGE_SHIFT
;
3450 return nonpaging_map(vcpu
, gva
& PAGE_MASK
,
3451 error_code
, gfn
, prefault
);
3454 static int kvm_arch_setup_async_pf(struct kvm_vcpu
*vcpu
, gva_t gva
, gfn_t gfn
)
3456 struct kvm_arch_async_pf arch
;
3458 arch
.token
= (vcpu
->arch
.apf
.id
++ << 12) | vcpu
->vcpu_id
;
3460 arch
.direct_map
= vcpu
->arch
.mmu
.direct_map
;
3461 arch
.cr3
= vcpu
->arch
.mmu
.get_cr3(vcpu
);
3463 return kvm_setup_async_pf(vcpu
, gva
, gfn_to_hva(vcpu
->kvm
, gfn
), &arch
);
3466 static bool can_do_async_pf(struct kvm_vcpu
*vcpu
)
3468 if (unlikely(!irqchip_in_kernel(vcpu
->kvm
) ||
3469 kvm_event_needs_reinjection(vcpu
)))
3472 return kvm_x86_ops
->interrupt_allowed(vcpu
);
3475 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
3476 gva_t gva
, pfn_t
*pfn
, bool write
, bool *writable
)
3480 *pfn
= gfn_to_pfn_async(vcpu
->kvm
, gfn
, &async
, write
, writable
);
3483 return false; /* *pfn has correct page already */
3485 if (!prefault
&& can_do_async_pf(vcpu
)) {
3486 trace_kvm_try_async_get_page(gva
, gfn
);
3487 if (kvm_find_async_pf_gfn(vcpu
, gfn
)) {
3488 trace_kvm_async_pf_doublefault(gva
, gfn
);
3489 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
3491 } else if (kvm_arch_setup_async_pf(vcpu
, gva
, gfn
))
3495 *pfn
= gfn_to_pfn_prot(vcpu
->kvm
, gfn
, write
, writable
);
3500 static int tdp_page_fault(struct kvm_vcpu
*vcpu
, gva_t gpa
, u32 error_code
,
3507 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
3508 unsigned long mmu_seq
;
3509 int write
= error_code
& PFERR_WRITE_MASK
;
3512 MMU_WARN_ON(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3514 if (unlikely(error_code
& PFERR_RSVD_MASK
)) {
3515 r
= handle_mmio_page_fault(vcpu
, gpa
, error_code
, true);
3517 if (likely(r
!= RET_MMIO_PF_INVALID
))
3521 r
= mmu_topup_memory_caches(vcpu
);
3525 force_pt_level
= mapping_level_dirty_bitmap(vcpu
, gfn
);
3526 if (likely(!force_pt_level
)) {
3527 level
= mapping_level(vcpu
, gfn
);
3528 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
3530 level
= PT_PAGE_TABLE_LEVEL
;
3532 if (fast_page_fault(vcpu
, gpa
, level
, error_code
))
3535 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
3538 if (try_async_pf(vcpu
, prefault
, gfn
, gpa
, &pfn
, write
, &map_writable
))
3541 if (handle_abnormal_pfn(vcpu
, 0, gfn
, pfn
, ACC_ALL
, &r
))
3544 spin_lock(&vcpu
->kvm
->mmu_lock
);
3545 if (mmu_notifier_retry(vcpu
->kvm
, mmu_seq
))
3547 make_mmu_pages_available(vcpu
);
3548 if (likely(!force_pt_level
))
3549 transparent_hugepage_adjust(vcpu
, &gfn
, &pfn
, &level
);
3550 r
= __direct_map(vcpu
, gpa
, write
, map_writable
,
3551 level
, gfn
, pfn
, prefault
);
3552 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3557 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3558 kvm_release_pfn_clean(pfn
);
3562 static void nonpaging_init_context(struct kvm_vcpu
*vcpu
,
3563 struct kvm_mmu
*context
)
3565 context
->page_fault
= nonpaging_page_fault
;
3566 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
3567 context
->sync_page
= nonpaging_sync_page
;
3568 context
->invlpg
= nonpaging_invlpg
;
3569 context
->update_pte
= nonpaging_update_pte
;
3570 context
->root_level
= 0;
3571 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
3572 context
->root_hpa
= INVALID_PAGE
;
3573 context
->direct_map
= true;
3574 context
->nx
= false;
3577 void kvm_mmu_new_cr3(struct kvm_vcpu
*vcpu
)
3579 mmu_free_roots(vcpu
);
3582 static unsigned long get_cr3(struct kvm_vcpu
*vcpu
)
3584 return kvm_read_cr3(vcpu
);
3587 static void inject_page_fault(struct kvm_vcpu
*vcpu
,
3588 struct x86_exception
*fault
)
3590 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
3593 static bool sync_mmio_spte(struct kvm
*kvm
, u64
*sptep
, gfn_t gfn
,
3594 unsigned access
, int *nr_present
)
3596 if (unlikely(is_mmio_spte(*sptep
))) {
3597 if (gfn
!= get_mmio_spte_gfn(*sptep
)) {
3598 mmu_spte_clear_no_track(sptep
);
3603 mark_mmio_spte(kvm
, sptep
, gfn
, access
);
3610 static inline bool is_last_gpte(struct kvm_mmu
*mmu
, unsigned level
, unsigned gpte
)
3615 index
|= (gpte
& PT_PAGE_SIZE_MASK
) >> (PT_PAGE_SIZE_SHIFT
- 2);
3616 return mmu
->last_pte_bitmap
& (1 << index
);
3619 #define PTTYPE_EPT 18 /* arbitrary */
3620 #define PTTYPE PTTYPE_EPT
3621 #include "paging_tmpl.h"
3625 #include "paging_tmpl.h"
3629 #include "paging_tmpl.h"
3632 static void reset_rsvds_bits_mask(struct kvm_vcpu
*vcpu
,
3633 struct kvm_mmu
*context
)
3635 int maxphyaddr
= cpuid_maxphyaddr(vcpu
);
3636 u64 exb_bit_rsvd
= 0;
3637 u64 gbpages_bit_rsvd
= 0;
3638 u64 nonleaf_bit8_rsvd
= 0;
3640 context
->bad_mt_xwr
= 0;
3643 exb_bit_rsvd
= rsvd_bits(63, 63);
3644 if (!guest_cpuid_has_gbpages(vcpu
))
3645 gbpages_bit_rsvd
= rsvd_bits(7, 7);
3648 * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for
3649 * leaf entries) on AMD CPUs only.
3651 if (guest_cpuid_is_amd(vcpu
))
3652 nonleaf_bit8_rsvd
= rsvd_bits(8, 8);
3654 switch (context
->root_level
) {
3655 case PT32_ROOT_LEVEL
:
3656 /* no rsvd bits for 2 level 4K page table entries */
3657 context
->rsvd_bits_mask
[0][1] = 0;
3658 context
->rsvd_bits_mask
[0][0] = 0;
3659 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
3661 if (!is_pse(vcpu
)) {
3662 context
->rsvd_bits_mask
[1][1] = 0;
3666 if (is_cpuid_PSE36())
3667 /* 36bits PSE 4MB page */
3668 context
->rsvd_bits_mask
[1][1] = rsvd_bits(17, 21);
3670 /* 32 bits PSE 4MB page */
3671 context
->rsvd_bits_mask
[1][1] = rsvd_bits(13, 21);
3673 case PT32E_ROOT_LEVEL
:
3674 context
->rsvd_bits_mask
[0][2] =
3675 rsvd_bits(maxphyaddr
, 63) |
3676 rsvd_bits(5, 8) | rsvd_bits(1, 2); /* PDPTE */
3677 context
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
3678 rsvd_bits(maxphyaddr
, 62); /* PDE */
3679 context
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
3680 rsvd_bits(maxphyaddr
, 62); /* PTE */
3681 context
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
3682 rsvd_bits(maxphyaddr
, 62) |
3683 rsvd_bits(13, 20); /* large page */
3684 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
3686 case PT64_ROOT_LEVEL
:
3687 context
->rsvd_bits_mask
[0][3] = exb_bit_rsvd
|
3688 nonleaf_bit8_rsvd
| rsvd_bits(7, 7) | rsvd_bits(maxphyaddr
, 51);
3689 context
->rsvd_bits_mask
[0][2] = exb_bit_rsvd
|
3690 nonleaf_bit8_rsvd
| gbpages_bit_rsvd
| rsvd_bits(maxphyaddr
, 51);
3691 context
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
3692 rsvd_bits(maxphyaddr
, 51);
3693 context
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
3694 rsvd_bits(maxphyaddr
, 51);
3695 context
->rsvd_bits_mask
[1][3] = context
->rsvd_bits_mask
[0][3];
3696 context
->rsvd_bits_mask
[1][2] = exb_bit_rsvd
|
3697 gbpages_bit_rsvd
| rsvd_bits(maxphyaddr
, 51) |
3699 context
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
3700 rsvd_bits(maxphyaddr
, 51) |
3701 rsvd_bits(13, 20); /* large page */
3702 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
3707 static void reset_rsvds_bits_mask_ept(struct kvm_vcpu
*vcpu
,
3708 struct kvm_mmu
*context
, bool execonly
)
3710 int maxphyaddr
= cpuid_maxphyaddr(vcpu
);
3713 context
->rsvd_bits_mask
[0][3] =
3714 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(3, 7);
3715 context
->rsvd_bits_mask
[0][2] =
3716 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(3, 6);
3717 context
->rsvd_bits_mask
[0][1] =
3718 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(3, 6);
3719 context
->rsvd_bits_mask
[0][0] = rsvd_bits(maxphyaddr
, 51);
3722 context
->rsvd_bits_mask
[1][3] = context
->rsvd_bits_mask
[0][3];
3723 context
->rsvd_bits_mask
[1][2] =
3724 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(12, 29);
3725 context
->rsvd_bits_mask
[1][1] =
3726 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(12, 20);
3727 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
3729 for (pte
= 0; pte
< 64; pte
++) {
3730 int rwx_bits
= pte
& 7;
3732 if (mt
== 0x2 || mt
== 0x3 || mt
== 0x7 ||
3733 rwx_bits
== 0x2 || rwx_bits
== 0x6 ||
3734 (rwx_bits
== 0x4 && !execonly
))
3735 context
->bad_mt_xwr
|= (1ull << pte
);
3739 static void update_permission_bitmask(struct kvm_vcpu
*vcpu
,
3740 struct kvm_mmu
*mmu
, bool ept
)
3742 unsigned bit
, byte
, pfec
;
3744 bool fault
, x
, w
, u
, wf
, uf
, ff
, smapf
, cr4_smap
, cr4_smep
, smap
= 0;
3746 cr4_smep
= kvm_read_cr4_bits(vcpu
, X86_CR4_SMEP
);
3747 cr4_smap
= kvm_read_cr4_bits(vcpu
, X86_CR4_SMAP
);
3748 for (byte
= 0; byte
< ARRAY_SIZE(mmu
->permissions
); ++byte
) {
3751 wf
= pfec
& PFERR_WRITE_MASK
;
3752 uf
= pfec
& PFERR_USER_MASK
;
3753 ff
= pfec
& PFERR_FETCH_MASK
;
3755 * PFERR_RSVD_MASK bit is set in PFEC if the access is not
3756 * subject to SMAP restrictions, and cleared otherwise. The
3757 * bit is only meaningful if the SMAP bit is set in CR4.
3759 smapf
= !(pfec
& PFERR_RSVD_MASK
);
3760 for (bit
= 0; bit
< 8; ++bit
) {
3761 x
= bit
& ACC_EXEC_MASK
;
3762 w
= bit
& ACC_WRITE_MASK
;
3763 u
= bit
& ACC_USER_MASK
;
3766 /* Not really needed: !nx will cause pte.nx to fault */
3768 /* Allow supervisor writes if !cr0.wp */
3769 w
|= !is_write_protection(vcpu
) && !uf
;
3770 /* Disallow supervisor fetches of user code if cr4.smep */
3771 x
&= !(cr4_smep
&& u
&& !uf
);
3774 * SMAP:kernel-mode data accesses from user-mode
3775 * mappings should fault. A fault is considered
3776 * as a SMAP violation if all of the following
3777 * conditions are ture:
3778 * - X86_CR4_SMAP is set in CR4
3779 * - An user page is accessed
3780 * - Page fault in kernel mode
3781 * - if CPL = 3 or X86_EFLAGS_AC is clear
3783 * Here, we cover the first three conditions.
3784 * The fourth is computed dynamically in
3785 * permission_fault() and is in smapf.
3787 * Also, SMAP does not affect instruction
3788 * fetches, add the !ff check here to make it
3791 smap
= cr4_smap
&& u
&& !uf
&& !ff
;
3793 /* Not really needed: no U/S accesses on ept */
3796 fault
= (ff
&& !x
) || (uf
&& !u
) || (wf
&& !w
) ||
3798 map
|= fault
<< bit
;
3800 mmu
->permissions
[byte
] = map
;
3804 static void update_last_pte_bitmap(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
)
3807 unsigned level
, root_level
= mmu
->root_level
;
3808 const unsigned ps_set_index
= 1 << 2; /* bit 2 of index: ps */
3810 if (root_level
== PT32E_ROOT_LEVEL
)
3812 /* PT_PAGE_TABLE_LEVEL always terminates */
3813 map
= 1 | (1 << ps_set_index
);
3814 for (level
= PT_DIRECTORY_LEVEL
; level
<= root_level
; ++level
) {
3815 if (level
<= PT_PDPE_LEVEL
3816 && (mmu
->root_level
>= PT32E_ROOT_LEVEL
|| is_pse(vcpu
)))
3817 map
|= 1 << (ps_set_index
| (level
- 1));
3819 mmu
->last_pte_bitmap
= map
;
3822 static void paging64_init_context_common(struct kvm_vcpu
*vcpu
,
3823 struct kvm_mmu
*context
,
3826 context
->nx
= is_nx(vcpu
);
3827 context
->root_level
= level
;
3829 reset_rsvds_bits_mask(vcpu
, context
);
3830 update_permission_bitmask(vcpu
, context
, false);
3831 update_last_pte_bitmap(vcpu
, context
);
3833 MMU_WARN_ON(!is_pae(vcpu
));
3834 context
->page_fault
= paging64_page_fault
;
3835 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3836 context
->sync_page
= paging64_sync_page
;
3837 context
->invlpg
= paging64_invlpg
;
3838 context
->update_pte
= paging64_update_pte
;
3839 context
->shadow_root_level
= level
;
3840 context
->root_hpa
= INVALID_PAGE
;
3841 context
->direct_map
= false;
3844 static void paging64_init_context(struct kvm_vcpu
*vcpu
,
3845 struct kvm_mmu
*context
)
3847 paging64_init_context_common(vcpu
, context
, PT64_ROOT_LEVEL
);
3850 static void paging32_init_context(struct kvm_vcpu
*vcpu
,
3851 struct kvm_mmu
*context
)
3853 context
->nx
= false;
3854 context
->root_level
= PT32_ROOT_LEVEL
;
3856 reset_rsvds_bits_mask(vcpu
, context
);
3857 update_permission_bitmask(vcpu
, context
, false);
3858 update_last_pte_bitmap(vcpu
, context
);
3860 context
->page_fault
= paging32_page_fault
;
3861 context
->gva_to_gpa
= paging32_gva_to_gpa
;
3862 context
->sync_page
= paging32_sync_page
;
3863 context
->invlpg
= paging32_invlpg
;
3864 context
->update_pte
= paging32_update_pte
;
3865 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
3866 context
->root_hpa
= INVALID_PAGE
;
3867 context
->direct_map
= false;
3870 static void paging32E_init_context(struct kvm_vcpu
*vcpu
,
3871 struct kvm_mmu
*context
)
3873 paging64_init_context_common(vcpu
, context
, PT32E_ROOT_LEVEL
);
3876 static void init_kvm_tdp_mmu(struct kvm_vcpu
*vcpu
)
3878 struct kvm_mmu
*context
= &vcpu
->arch
.mmu
;
3880 context
->base_role
.word
= 0;
3881 context
->page_fault
= tdp_page_fault
;
3882 context
->sync_page
= nonpaging_sync_page
;
3883 context
->invlpg
= nonpaging_invlpg
;
3884 context
->update_pte
= nonpaging_update_pte
;
3885 context
->shadow_root_level
= kvm_x86_ops
->get_tdp_level();
3886 context
->root_hpa
= INVALID_PAGE
;
3887 context
->direct_map
= true;
3888 context
->set_cr3
= kvm_x86_ops
->set_tdp_cr3
;
3889 context
->get_cr3
= get_cr3
;
3890 context
->get_pdptr
= kvm_pdptr_read
;
3891 context
->inject_page_fault
= kvm_inject_page_fault
;
3893 if (!is_paging(vcpu
)) {
3894 context
->nx
= false;
3895 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
3896 context
->root_level
= 0;
3897 } else if (is_long_mode(vcpu
)) {
3898 context
->nx
= is_nx(vcpu
);
3899 context
->root_level
= PT64_ROOT_LEVEL
;
3900 reset_rsvds_bits_mask(vcpu
, context
);
3901 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3902 } else if (is_pae(vcpu
)) {
3903 context
->nx
= is_nx(vcpu
);
3904 context
->root_level
= PT32E_ROOT_LEVEL
;
3905 reset_rsvds_bits_mask(vcpu
, context
);
3906 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3908 context
->nx
= false;
3909 context
->root_level
= PT32_ROOT_LEVEL
;
3910 reset_rsvds_bits_mask(vcpu
, context
);
3911 context
->gva_to_gpa
= paging32_gva_to_gpa
;
3914 update_permission_bitmask(vcpu
, context
, false);
3915 update_last_pte_bitmap(vcpu
, context
);
3918 void kvm_init_shadow_mmu(struct kvm_vcpu
*vcpu
)
3920 bool smep
= kvm_read_cr4_bits(vcpu
, X86_CR4_SMEP
);
3921 bool smap
= kvm_read_cr4_bits(vcpu
, X86_CR4_SMAP
);
3922 struct kvm_mmu
*context
= &vcpu
->arch
.mmu
;
3924 MMU_WARN_ON(VALID_PAGE(context
->root_hpa
));
3926 if (!is_paging(vcpu
))
3927 nonpaging_init_context(vcpu
, context
);
3928 else if (is_long_mode(vcpu
))
3929 paging64_init_context(vcpu
, context
);
3930 else if (is_pae(vcpu
))
3931 paging32E_init_context(vcpu
, context
);
3933 paging32_init_context(vcpu
, context
);
3935 context
->base_role
.nxe
= is_nx(vcpu
);
3936 context
->base_role
.cr4_pae
= !!is_pae(vcpu
);
3937 context
->base_role
.cr0_wp
= is_write_protection(vcpu
);
3938 context
->base_role
.smep_andnot_wp
3939 = smep
&& !is_write_protection(vcpu
);
3940 context
->base_role
.smap_andnot_wp
3941 = smap
&& !is_write_protection(vcpu
);
3943 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu
);
3945 void kvm_init_shadow_ept_mmu(struct kvm_vcpu
*vcpu
, bool execonly
)
3947 struct kvm_mmu
*context
= &vcpu
->arch
.mmu
;
3949 MMU_WARN_ON(VALID_PAGE(context
->root_hpa
));
3951 context
->shadow_root_level
= kvm_x86_ops
->get_tdp_level();
3954 context
->page_fault
= ept_page_fault
;
3955 context
->gva_to_gpa
= ept_gva_to_gpa
;
3956 context
->sync_page
= ept_sync_page
;
3957 context
->invlpg
= ept_invlpg
;
3958 context
->update_pte
= ept_update_pte
;
3959 context
->root_level
= context
->shadow_root_level
;
3960 context
->root_hpa
= INVALID_PAGE
;
3961 context
->direct_map
= false;
3963 update_permission_bitmask(vcpu
, context
, true);
3964 reset_rsvds_bits_mask_ept(vcpu
, context
, execonly
);
3966 EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu
);
3968 static void init_kvm_softmmu(struct kvm_vcpu
*vcpu
)
3970 struct kvm_mmu
*context
= &vcpu
->arch
.mmu
;
3972 kvm_init_shadow_mmu(vcpu
);
3973 context
->set_cr3
= kvm_x86_ops
->set_cr3
;
3974 context
->get_cr3
= get_cr3
;
3975 context
->get_pdptr
= kvm_pdptr_read
;
3976 context
->inject_page_fault
= kvm_inject_page_fault
;
3979 static void init_kvm_nested_mmu(struct kvm_vcpu
*vcpu
)
3981 struct kvm_mmu
*g_context
= &vcpu
->arch
.nested_mmu
;
3983 g_context
->get_cr3
= get_cr3
;
3984 g_context
->get_pdptr
= kvm_pdptr_read
;
3985 g_context
->inject_page_fault
= kvm_inject_page_fault
;
3988 * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
3989 * translation of l2_gpa to l1_gpa addresses is done using the
3990 * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
3991 * functions between mmu and nested_mmu are swapped.
3993 if (!is_paging(vcpu
)) {
3994 g_context
->nx
= false;
3995 g_context
->root_level
= 0;
3996 g_context
->gva_to_gpa
= nonpaging_gva_to_gpa_nested
;
3997 } else if (is_long_mode(vcpu
)) {
3998 g_context
->nx
= is_nx(vcpu
);
3999 g_context
->root_level
= PT64_ROOT_LEVEL
;
4000 reset_rsvds_bits_mask(vcpu
, g_context
);
4001 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
4002 } else if (is_pae(vcpu
)) {
4003 g_context
->nx
= is_nx(vcpu
);
4004 g_context
->root_level
= PT32E_ROOT_LEVEL
;
4005 reset_rsvds_bits_mask(vcpu
, g_context
);
4006 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
4008 g_context
->nx
= false;
4009 g_context
->root_level
= PT32_ROOT_LEVEL
;
4010 reset_rsvds_bits_mask(vcpu
, g_context
);
4011 g_context
->gva_to_gpa
= paging32_gva_to_gpa_nested
;
4014 update_permission_bitmask(vcpu
, g_context
, false);
4015 update_last_pte_bitmap(vcpu
, g_context
);
4018 static void init_kvm_mmu(struct kvm_vcpu
*vcpu
)
4020 if (mmu_is_nested(vcpu
))
4021 init_kvm_nested_mmu(vcpu
);
4022 else if (tdp_enabled
)
4023 init_kvm_tdp_mmu(vcpu
);
4025 init_kvm_softmmu(vcpu
);
4028 void kvm_mmu_reset_context(struct kvm_vcpu
*vcpu
)
4030 kvm_mmu_unload(vcpu
);
4033 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context
);
4035 int kvm_mmu_load(struct kvm_vcpu
*vcpu
)
4039 r
= mmu_topup_memory_caches(vcpu
);
4042 r
= mmu_alloc_roots(vcpu
);
4043 kvm_mmu_sync_roots(vcpu
);
4046 /* set_cr3() should ensure TLB has been flushed */
4047 vcpu
->arch
.mmu
.set_cr3(vcpu
, vcpu
->arch
.mmu
.root_hpa
);
4051 EXPORT_SYMBOL_GPL(kvm_mmu_load
);
4053 void kvm_mmu_unload(struct kvm_vcpu
*vcpu
)
4055 mmu_free_roots(vcpu
);
4056 WARN_ON(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
4058 EXPORT_SYMBOL_GPL(kvm_mmu_unload
);
4060 static void mmu_pte_write_new_pte(struct kvm_vcpu
*vcpu
,
4061 struct kvm_mmu_page
*sp
, u64
*spte
,
4064 if (sp
->role
.level
!= PT_PAGE_TABLE_LEVEL
) {
4065 ++vcpu
->kvm
->stat
.mmu_pde_zapped
;
4069 ++vcpu
->kvm
->stat
.mmu_pte_updated
;
4070 vcpu
->arch
.mmu
.update_pte(vcpu
, sp
, spte
, new);
4073 static bool need_remote_flush(u64 old
, u64
new)
4075 if (!is_shadow_present_pte(old
))
4077 if (!is_shadow_present_pte(new))
4079 if ((old
^ new) & PT64_BASE_ADDR_MASK
)
4081 old
^= shadow_nx_mask
;
4082 new ^= shadow_nx_mask
;
4083 return (old
& ~new & PT64_PERM_MASK
) != 0;
4086 static void mmu_pte_write_flush_tlb(struct kvm_vcpu
*vcpu
, bool zap_page
,
4087 bool remote_flush
, bool local_flush
)
4093 kvm_flush_remote_tlbs(vcpu
->kvm
);
4094 else if (local_flush
)
4095 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
4098 static u64
mmu_pte_write_fetch_gpte(struct kvm_vcpu
*vcpu
, gpa_t
*gpa
,
4099 const u8
*new, int *bytes
)
4105 * Assume that the pte write on a page table of the same type
4106 * as the current vcpu paging mode since we update the sptes only
4107 * when they have the same mode.
4109 if (is_pae(vcpu
) && *bytes
== 4) {
4110 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
4113 r
= kvm_read_guest(vcpu
->kvm
, *gpa
, &gentry
, 8);
4116 new = (const u8
*)&gentry
;
4121 gentry
= *(const u32
*)new;
4124 gentry
= *(const u64
*)new;
4135 * If we're seeing too many writes to a page, it may no longer be a page table,
4136 * or we may be forking, in which case it is better to unmap the page.
4138 static bool detect_write_flooding(struct kvm_mmu_page
*sp
)
4141 * Skip write-flooding detected for the sp whose level is 1, because
4142 * it can become unsync, then the guest page is not write-protected.
4144 if (sp
->role
.level
== PT_PAGE_TABLE_LEVEL
)
4147 return ++sp
->write_flooding_count
>= 3;
4151 * Misaligned accesses are too much trouble to fix up; also, they usually
4152 * indicate a page is not used as a page table.
4154 static bool detect_write_misaligned(struct kvm_mmu_page
*sp
, gpa_t gpa
,
4157 unsigned offset
, pte_size
, misaligned
;
4159 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4160 gpa
, bytes
, sp
->role
.word
);
4162 offset
= offset_in_page(gpa
);
4163 pte_size
= sp
->role
.cr4_pae
? 8 : 4;
4166 * Sometimes, the OS only writes the last one bytes to update status
4167 * bits, for example, in linux, andb instruction is used in clear_bit().
4169 if (!(offset
& (pte_size
- 1)) && bytes
== 1)
4172 misaligned
= (offset
^ (offset
+ bytes
- 1)) & ~(pte_size
- 1);
4173 misaligned
|= bytes
< 4;
4178 static u64
*get_written_sptes(struct kvm_mmu_page
*sp
, gpa_t gpa
, int *nspte
)
4180 unsigned page_offset
, quadrant
;
4184 page_offset
= offset_in_page(gpa
);
4185 level
= sp
->role
.level
;
4187 if (!sp
->role
.cr4_pae
) {
4188 page_offset
<<= 1; /* 32->64 */
4190 * A 32-bit pde maps 4MB while the shadow pdes map
4191 * only 2MB. So we need to double the offset again
4192 * and zap two pdes instead of one.
4194 if (level
== PT32_ROOT_LEVEL
) {
4195 page_offset
&= ~7; /* kill rounding error */
4199 quadrant
= page_offset
>> PAGE_SHIFT
;
4200 page_offset
&= ~PAGE_MASK
;
4201 if (quadrant
!= sp
->role
.quadrant
)
4205 spte
= &sp
->spt
[page_offset
/ sizeof(*spte
)];
4209 void kvm_mmu_pte_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4210 const u8
*new, int bytes
)
4212 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
4213 struct kvm_mmu_page
*sp
;
4214 LIST_HEAD(invalid_list
);
4215 u64 entry
, gentry
, *spte
;
4217 bool remote_flush
, local_flush
, zap_page
;
4218 union kvm_mmu_page_role mask
= (union kvm_mmu_page_role
) {
4222 .smep_andnot_wp
= 1,
4223 .smap_andnot_wp
= 1,
4227 * If we don't have indirect shadow pages, it means no page is
4228 * write-protected, so we can exit simply.
4230 if (!ACCESS_ONCE(vcpu
->kvm
->arch
.indirect_shadow_pages
))
4233 zap_page
= remote_flush
= local_flush
= false;
4235 pgprintk("%s: gpa %llx bytes %d\n", __func__
, gpa
, bytes
);
4237 gentry
= mmu_pte_write_fetch_gpte(vcpu
, &gpa
, new, &bytes
);
4240 * No need to care whether allocation memory is successful
4241 * or not since pte prefetch is skiped if it does not have
4242 * enough objects in the cache.
4244 mmu_topup_memory_caches(vcpu
);
4246 spin_lock(&vcpu
->kvm
->mmu_lock
);
4247 ++vcpu
->kvm
->stat
.mmu_pte_write
;
4248 kvm_mmu_audit(vcpu
, AUDIT_PRE_PTE_WRITE
);
4250 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, sp
, gfn
) {
4251 if (detect_write_misaligned(sp
, gpa
, bytes
) ||
4252 detect_write_flooding(sp
)) {
4253 zap_page
|= !!kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
4255 ++vcpu
->kvm
->stat
.mmu_flooded
;
4259 spte
= get_written_sptes(sp
, gpa
, &npte
);
4266 mmu_page_zap_pte(vcpu
->kvm
, sp
, spte
);
4268 !((sp
->role
.word
^ vcpu
->arch
.mmu
.base_role
.word
)
4269 & mask
.word
) && rmap_can_add(vcpu
))
4270 mmu_pte_write_new_pte(vcpu
, sp
, spte
, &gentry
);
4271 if (need_remote_flush(entry
, *spte
))
4272 remote_flush
= true;
4276 mmu_pte_write_flush_tlb(vcpu
, zap_page
, remote_flush
, local_flush
);
4277 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
4278 kvm_mmu_audit(vcpu
, AUDIT_POST_PTE_WRITE
);
4279 spin_unlock(&vcpu
->kvm
->mmu_lock
);
4282 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu
*vcpu
, gva_t gva
)
4287 if (vcpu
->arch
.mmu
.direct_map
)
4290 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, gva
, NULL
);
4292 r
= kvm_mmu_unprotect_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4296 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt
);
4298 static void make_mmu_pages_available(struct kvm_vcpu
*vcpu
)
4300 LIST_HEAD(invalid_list
);
4302 if (likely(kvm_mmu_available_pages(vcpu
->kvm
) >= KVM_MIN_FREE_MMU_PAGES
))
4305 while (kvm_mmu_available_pages(vcpu
->kvm
) < KVM_REFILL_PAGES
) {
4306 if (!prepare_zap_oldest_mmu_page(vcpu
->kvm
, &invalid_list
))
4309 ++vcpu
->kvm
->stat
.mmu_recycled
;
4311 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
4314 static bool is_mmio_page_fault(struct kvm_vcpu
*vcpu
, gva_t addr
)
4316 if (vcpu
->arch
.mmu
.direct_map
|| mmu_is_nested(vcpu
))
4317 return vcpu_match_mmio_gpa(vcpu
, addr
);
4319 return vcpu_match_mmio_gva(vcpu
, addr
);
4322 int kvm_mmu_page_fault(struct kvm_vcpu
*vcpu
, gva_t cr2
, u32 error_code
,
4323 void *insn
, int insn_len
)
4325 int r
, emulation_type
= EMULTYPE_RETRY
;
4326 enum emulation_result er
;
4328 r
= vcpu
->arch
.mmu
.page_fault(vcpu
, cr2
, error_code
, false);
4337 if (is_mmio_page_fault(vcpu
, cr2
))
4340 er
= x86_emulate_instruction(vcpu
, cr2
, emulation_type
, insn
, insn_len
);
4345 case EMULATE_USER_EXIT
:
4346 ++vcpu
->stat
.mmio_exits
;
4356 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault
);
4358 void kvm_mmu_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
4360 vcpu
->arch
.mmu
.invlpg(vcpu
, gva
);
4361 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
4362 ++vcpu
->stat
.invlpg
;
4364 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg
);
4366 void kvm_enable_tdp(void)
4370 EXPORT_SYMBOL_GPL(kvm_enable_tdp
);
4372 void kvm_disable_tdp(void)
4374 tdp_enabled
= false;
4376 EXPORT_SYMBOL_GPL(kvm_disable_tdp
);
4378 static void free_mmu_pages(struct kvm_vcpu
*vcpu
)
4380 free_page((unsigned long)vcpu
->arch
.mmu
.pae_root
);
4381 if (vcpu
->arch
.mmu
.lm_root
!= NULL
)
4382 free_page((unsigned long)vcpu
->arch
.mmu
.lm_root
);
4385 static int alloc_mmu_pages(struct kvm_vcpu
*vcpu
)
4391 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
4392 * Therefore we need to allocate shadow page tables in the first
4393 * 4GB of memory, which happens to fit the DMA32 zone.
4395 page
= alloc_page(GFP_KERNEL
| __GFP_DMA32
);
4399 vcpu
->arch
.mmu
.pae_root
= page_address(page
);
4400 for (i
= 0; i
< 4; ++i
)
4401 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
4406 int kvm_mmu_create(struct kvm_vcpu
*vcpu
)
4408 vcpu
->arch
.walk_mmu
= &vcpu
->arch
.mmu
;
4409 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
4410 vcpu
->arch
.mmu
.translate_gpa
= translate_gpa
;
4411 vcpu
->arch
.nested_mmu
.translate_gpa
= translate_nested_gpa
;
4413 return alloc_mmu_pages(vcpu
);
4416 void kvm_mmu_setup(struct kvm_vcpu
*vcpu
)
4418 MMU_WARN_ON(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
4423 void kvm_mmu_slot_remove_write_access(struct kvm
*kvm
,
4424 struct kvm_memory_slot
*memslot
)
4430 last_gfn
= memslot
->base_gfn
+ memslot
->npages
- 1;
4432 spin_lock(&kvm
->mmu_lock
);
4434 for (i
= PT_PAGE_TABLE_LEVEL
;
4435 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
4436 unsigned long *rmapp
;
4437 unsigned long last_index
, index
;
4439 rmapp
= memslot
->arch
.rmap
[i
- PT_PAGE_TABLE_LEVEL
];
4440 last_index
= gfn_to_index(last_gfn
, memslot
->base_gfn
, i
);
4442 for (index
= 0; index
<= last_index
; ++index
, ++rmapp
) {
4444 flush
|= __rmap_write_protect(kvm
, rmapp
,
4447 if (need_resched() || spin_needbreak(&kvm
->mmu_lock
))
4448 cond_resched_lock(&kvm
->mmu_lock
);
4452 spin_unlock(&kvm
->mmu_lock
);
4455 * kvm_mmu_slot_remove_write_access() and kvm_vm_ioctl_get_dirty_log()
4456 * which do tlb flush out of mmu-lock should be serialized by
4457 * kvm->slots_lock otherwise tlb flush would be missed.
4459 lockdep_assert_held(&kvm
->slots_lock
);
4462 * We can flush all the TLBs out of the mmu lock without TLB
4463 * corruption since we just change the spte from writable to
4464 * readonly so that we only need to care the case of changing
4465 * spte from present to present (changing the spte from present
4466 * to nonpresent will flush all the TLBs immediately), in other
4467 * words, the only case we care is mmu_spte_update() where we
4468 * haved checked SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE
4469 * instead of PT_WRITABLE_MASK, that means it does not depend
4470 * on PT_WRITABLE_MASK anymore.
4473 kvm_flush_remote_tlbs(kvm
);
4476 static bool kvm_mmu_zap_collapsible_spte(struct kvm
*kvm
,
4477 unsigned long *rmapp
)
4480 struct rmap_iterator iter
;
4481 int need_tlb_flush
= 0;
4483 struct kvm_mmu_page
*sp
;
4485 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;) {
4486 BUG_ON(!(*sptep
& PT_PRESENT_MASK
));
4488 sp
= page_header(__pa(sptep
));
4489 pfn
= spte_to_pfn(*sptep
);
4492 * We cannot do huge page mapping for indirect shadow pages,
4493 * which are found on the last rmap (level = 1) when not using
4494 * tdp; such shadow pages are synced with the page table in
4495 * the guest, and the guest page table is using 4K page size
4496 * mapping if the indirect sp has level = 1.
4498 if (sp
->role
.direct
&&
4499 !kvm_is_reserved_pfn(pfn
) &&
4500 PageTransCompound(pfn_to_page(pfn
))) {
4501 drop_spte(kvm
, sptep
);
4502 sptep
= rmap_get_first(*rmapp
, &iter
);
4505 sptep
= rmap_get_next(&iter
);
4508 return need_tlb_flush
;
4511 void kvm_mmu_zap_collapsible_sptes(struct kvm
*kvm
,
4512 struct kvm_memory_slot
*memslot
)
4515 unsigned long *rmapp
;
4516 unsigned long last_index
, index
;
4518 spin_lock(&kvm
->mmu_lock
);
4520 rmapp
= memslot
->arch
.rmap
[0];
4521 last_index
= gfn_to_index(memslot
->base_gfn
+ memslot
->npages
- 1,
4522 memslot
->base_gfn
, PT_PAGE_TABLE_LEVEL
);
4524 for (index
= 0; index
<= last_index
; ++index
, ++rmapp
) {
4526 flush
|= kvm_mmu_zap_collapsible_spte(kvm
, rmapp
);
4528 if (need_resched() || spin_needbreak(&kvm
->mmu_lock
)) {
4530 kvm_flush_remote_tlbs(kvm
);
4533 cond_resched_lock(&kvm
->mmu_lock
);
4538 kvm_flush_remote_tlbs(kvm
);
4540 spin_unlock(&kvm
->mmu_lock
);
4543 void kvm_mmu_slot_leaf_clear_dirty(struct kvm
*kvm
,
4544 struct kvm_memory_slot
*memslot
)
4547 unsigned long *rmapp
;
4548 unsigned long last_index
, index
;
4551 last_gfn
= memslot
->base_gfn
+ memslot
->npages
- 1;
4553 spin_lock(&kvm
->mmu_lock
);
4555 rmapp
= memslot
->arch
.rmap
[PT_PAGE_TABLE_LEVEL
- 1];
4556 last_index
= gfn_to_index(last_gfn
, memslot
->base_gfn
,
4557 PT_PAGE_TABLE_LEVEL
);
4559 for (index
= 0; index
<= last_index
; ++index
, ++rmapp
) {
4561 flush
|= __rmap_clear_dirty(kvm
, rmapp
);
4563 if (need_resched() || spin_needbreak(&kvm
->mmu_lock
))
4564 cond_resched_lock(&kvm
->mmu_lock
);
4567 spin_unlock(&kvm
->mmu_lock
);
4569 lockdep_assert_held(&kvm
->slots_lock
);
4572 * It's also safe to flush TLBs out of mmu lock here as currently this
4573 * function is only used for dirty logging, in which case flushing TLB
4574 * out of mmu lock also guarantees no dirty pages will be lost in
4578 kvm_flush_remote_tlbs(kvm
);
4580 EXPORT_SYMBOL_GPL(kvm_mmu_slot_leaf_clear_dirty
);
4582 void kvm_mmu_slot_largepage_remove_write_access(struct kvm
*kvm
,
4583 struct kvm_memory_slot
*memslot
)
4589 last_gfn
= memslot
->base_gfn
+ memslot
->npages
- 1;
4591 spin_lock(&kvm
->mmu_lock
);
4593 for (i
= PT_PAGE_TABLE_LEVEL
+ 1; /* skip rmap for 4K page */
4594 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
4595 unsigned long *rmapp
;
4596 unsigned long last_index
, index
;
4598 rmapp
= memslot
->arch
.rmap
[i
- PT_PAGE_TABLE_LEVEL
];
4599 last_index
= gfn_to_index(last_gfn
, memslot
->base_gfn
, i
);
4601 for (index
= 0; index
<= last_index
; ++index
, ++rmapp
) {
4603 flush
|= __rmap_write_protect(kvm
, rmapp
,
4606 if (need_resched() || spin_needbreak(&kvm
->mmu_lock
))
4607 cond_resched_lock(&kvm
->mmu_lock
);
4610 spin_unlock(&kvm
->mmu_lock
);
4612 /* see kvm_mmu_slot_remove_write_access */
4613 lockdep_assert_held(&kvm
->slots_lock
);
4616 kvm_flush_remote_tlbs(kvm
);
4618 EXPORT_SYMBOL_GPL(kvm_mmu_slot_largepage_remove_write_access
);
4620 void kvm_mmu_slot_set_dirty(struct kvm
*kvm
,
4621 struct kvm_memory_slot
*memslot
)
4627 last_gfn
= memslot
->base_gfn
+ memslot
->npages
- 1;
4629 spin_lock(&kvm
->mmu_lock
);
4631 for (i
= PT_PAGE_TABLE_LEVEL
;
4632 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
4633 unsigned long *rmapp
;
4634 unsigned long last_index
, index
;
4636 rmapp
= memslot
->arch
.rmap
[i
- PT_PAGE_TABLE_LEVEL
];
4637 last_index
= gfn_to_index(last_gfn
, memslot
->base_gfn
, i
);
4639 for (index
= 0; index
<= last_index
; ++index
, ++rmapp
) {
4641 flush
|= __rmap_set_dirty(kvm
, rmapp
);
4643 if (need_resched() || spin_needbreak(&kvm
->mmu_lock
))
4644 cond_resched_lock(&kvm
->mmu_lock
);
4648 spin_unlock(&kvm
->mmu_lock
);
4650 lockdep_assert_held(&kvm
->slots_lock
);
4652 /* see kvm_mmu_slot_leaf_clear_dirty */
4654 kvm_flush_remote_tlbs(kvm
);
4656 EXPORT_SYMBOL_GPL(kvm_mmu_slot_set_dirty
);
4658 #define BATCH_ZAP_PAGES 10
4659 static void kvm_zap_obsolete_pages(struct kvm
*kvm
)
4661 struct kvm_mmu_page
*sp
, *node
;
4665 list_for_each_entry_safe_reverse(sp
, node
,
4666 &kvm
->arch
.active_mmu_pages
, link
) {
4670 * No obsolete page exists before new created page since
4671 * active_mmu_pages is the FIFO list.
4673 if (!is_obsolete_sp(kvm
, sp
))
4677 * Since we are reversely walking the list and the invalid
4678 * list will be moved to the head, skip the invalid page
4679 * can help us to avoid the infinity list walking.
4681 if (sp
->role
.invalid
)
4685 * Need not flush tlb since we only zap the sp with invalid
4686 * generation number.
4688 if (batch
>= BATCH_ZAP_PAGES
&&
4689 cond_resched_lock(&kvm
->mmu_lock
)) {
4694 ret
= kvm_mmu_prepare_zap_page(kvm
, sp
,
4695 &kvm
->arch
.zapped_obsolete_pages
);
4703 * Should flush tlb before free page tables since lockless-walking
4704 * may use the pages.
4706 kvm_mmu_commit_zap_page(kvm
, &kvm
->arch
.zapped_obsolete_pages
);
4710 * Fast invalidate all shadow pages and use lock-break technique
4711 * to zap obsolete pages.
4713 * It's required when memslot is being deleted or VM is being
4714 * destroyed, in these cases, we should ensure that KVM MMU does
4715 * not use any resource of the being-deleted slot or all slots
4716 * after calling the function.
4718 void kvm_mmu_invalidate_zap_all_pages(struct kvm
*kvm
)
4720 spin_lock(&kvm
->mmu_lock
);
4721 trace_kvm_mmu_invalidate_zap_all_pages(kvm
);
4722 kvm
->arch
.mmu_valid_gen
++;
4725 * Notify all vcpus to reload its shadow page table
4726 * and flush TLB. Then all vcpus will switch to new
4727 * shadow page table with the new mmu_valid_gen.
4729 * Note: we should do this under the protection of
4730 * mmu-lock, otherwise, vcpu would purge shadow page
4731 * but miss tlb flush.
4733 kvm_reload_remote_mmus(kvm
);
4735 kvm_zap_obsolete_pages(kvm
);
4736 spin_unlock(&kvm
->mmu_lock
);
4739 static bool kvm_has_zapped_obsolete_pages(struct kvm
*kvm
)
4741 return unlikely(!list_empty_careful(&kvm
->arch
.zapped_obsolete_pages
));
4744 void kvm_mmu_invalidate_mmio_sptes(struct kvm
*kvm
)
4747 * The very rare case: if the generation-number is round,
4748 * zap all shadow pages.
4750 if (unlikely(kvm_current_mmio_generation(kvm
) == 0)) {
4751 printk_ratelimited(KERN_DEBUG
"kvm: zapping shadow pages for mmio generation wraparound\n");
4752 kvm_mmu_invalidate_zap_all_pages(kvm
);
4756 static unsigned long
4757 mmu_shrink_scan(struct shrinker
*shrink
, struct shrink_control
*sc
)
4760 int nr_to_scan
= sc
->nr_to_scan
;
4761 unsigned long freed
= 0;
4763 spin_lock(&kvm_lock
);
4765 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
4767 LIST_HEAD(invalid_list
);
4770 * Never scan more than sc->nr_to_scan VM instances.
4771 * Will not hit this condition practically since we do not try
4772 * to shrink more than one VM and it is very unlikely to see
4773 * !n_used_mmu_pages so many times.
4778 * n_used_mmu_pages is accessed without holding kvm->mmu_lock
4779 * here. We may skip a VM instance errorneosly, but we do not
4780 * want to shrink a VM that only started to populate its MMU
4783 if (!kvm
->arch
.n_used_mmu_pages
&&
4784 !kvm_has_zapped_obsolete_pages(kvm
))
4787 idx
= srcu_read_lock(&kvm
->srcu
);
4788 spin_lock(&kvm
->mmu_lock
);
4790 if (kvm_has_zapped_obsolete_pages(kvm
)) {
4791 kvm_mmu_commit_zap_page(kvm
,
4792 &kvm
->arch
.zapped_obsolete_pages
);
4796 if (prepare_zap_oldest_mmu_page(kvm
, &invalid_list
))
4798 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
4801 spin_unlock(&kvm
->mmu_lock
);
4802 srcu_read_unlock(&kvm
->srcu
, idx
);
4805 * unfair on small ones
4806 * per-vm shrinkers cry out
4807 * sadness comes quickly
4809 list_move_tail(&kvm
->vm_list
, &vm_list
);
4813 spin_unlock(&kvm_lock
);
4817 static unsigned long
4818 mmu_shrink_count(struct shrinker
*shrink
, struct shrink_control
*sc
)
4820 return percpu_counter_read_positive(&kvm_total_used_mmu_pages
);
4823 static struct shrinker mmu_shrinker
= {
4824 .count_objects
= mmu_shrink_count
,
4825 .scan_objects
= mmu_shrink_scan
,
4826 .seeks
= DEFAULT_SEEKS
* 10,
4829 static void mmu_destroy_caches(void)
4831 if (pte_list_desc_cache
)
4832 kmem_cache_destroy(pte_list_desc_cache
);
4833 if (mmu_page_header_cache
)
4834 kmem_cache_destroy(mmu_page_header_cache
);
4837 int kvm_mmu_module_init(void)
4839 pte_list_desc_cache
= kmem_cache_create("pte_list_desc",
4840 sizeof(struct pte_list_desc
),
4842 if (!pte_list_desc_cache
)
4845 mmu_page_header_cache
= kmem_cache_create("kvm_mmu_page_header",
4846 sizeof(struct kvm_mmu_page
),
4848 if (!mmu_page_header_cache
)
4851 if (percpu_counter_init(&kvm_total_used_mmu_pages
, 0, GFP_KERNEL
))
4854 register_shrinker(&mmu_shrinker
);
4859 mmu_destroy_caches();
4864 * Caculate mmu pages needed for kvm.
4866 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm
*kvm
)
4868 unsigned int nr_mmu_pages
;
4869 unsigned int nr_pages
= 0;
4870 struct kvm_memslots
*slots
;
4871 struct kvm_memory_slot
*memslot
;
4873 slots
= kvm_memslots(kvm
);
4875 kvm_for_each_memslot(memslot
, slots
)
4876 nr_pages
+= memslot
->npages
;
4878 nr_mmu_pages
= nr_pages
* KVM_PERMILLE_MMU_PAGES
/ 1000;
4879 nr_mmu_pages
= max(nr_mmu_pages
,
4880 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES
);
4882 return nr_mmu_pages
;
4885 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu
*vcpu
, u64 addr
, u64 sptes
[4])
4887 struct kvm_shadow_walk_iterator iterator
;
4891 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
4894 walk_shadow_page_lockless_begin(vcpu
);
4895 for_each_shadow_entry_lockless(vcpu
, addr
, iterator
, spte
) {
4896 sptes
[iterator
.level
-1] = spte
;
4898 if (!is_shadow_present_pte(spte
))
4901 walk_shadow_page_lockless_end(vcpu
);
4905 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy
);
4907 void kvm_mmu_destroy(struct kvm_vcpu
*vcpu
)
4909 kvm_mmu_unload(vcpu
);
4910 free_mmu_pages(vcpu
);
4911 mmu_free_memory_caches(vcpu
);
4914 void kvm_mmu_module_exit(void)
4916 mmu_destroy_caches();
4917 percpu_counter_destroy(&kvm_total_used_mmu_pages
);
4918 unregister_shrinker(&mmu_shrinker
);
4919 mmu_audit_disable();