2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
24 #include "kvm_cache_regs.h"
27 #include <linux/kvm_host.h>
28 #include <linux/types.h>
29 #include <linux/string.h>
31 #include <linux/highmem.h>
32 #include <linux/module.h>
33 #include <linux/swap.h>
34 #include <linux/hugetlb.h>
35 #include <linux/compiler.h>
36 #include <linux/srcu.h>
37 #include <linux/slab.h>
38 #include <linux/uaccess.h>
41 #include <asm/cmpxchg.h>
46 * When setting this variable to true it enables Two-Dimensional-Paging
47 * where the hardware walks 2 page tables:
48 * 1. the guest-virtual to guest-physical
49 * 2. while doing 1. it walks guest-physical to host-physical
50 * If the hardware supports that we don't need to do shadow paging.
52 bool tdp_enabled
= false;
56 AUDIT_POST_PAGE_FAULT
,
63 char *audit_point_name
[] = {
76 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
77 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
81 #define pgprintk(x...) do { } while (0)
82 #define rmap_printk(x...) do { } while (0)
88 module_param(dbg
, bool, 0644);
91 static int oos_shadow
= 1;
92 module_param(oos_shadow
, bool, 0644);
95 #define ASSERT(x) do { } while (0)
99 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
100 __FILE__, __LINE__, #x); \
104 #define PTE_PREFETCH_NUM 8
106 #define PT_FIRST_AVAIL_BITS_SHIFT 9
107 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
109 #define PT64_LEVEL_BITS 9
111 #define PT64_LEVEL_SHIFT(level) \
112 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
114 #define PT64_LEVEL_MASK(level) \
115 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
117 #define PT64_INDEX(address, level)\
118 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
121 #define PT32_LEVEL_BITS 10
123 #define PT32_LEVEL_SHIFT(level) \
124 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
126 #define PT32_LEVEL_MASK(level) \
127 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
128 #define PT32_LVL_OFFSET_MASK(level) \
129 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
130 * PT32_LEVEL_BITS))) - 1))
132 #define PT32_INDEX(address, level)\
133 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
136 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
137 #define PT64_DIR_BASE_ADDR_MASK \
138 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
139 #define PT64_LVL_ADDR_MASK(level) \
140 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
141 * PT64_LEVEL_BITS))) - 1))
142 #define PT64_LVL_OFFSET_MASK(level) \
143 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
144 * PT64_LEVEL_BITS))) - 1))
146 #define PT32_BASE_ADDR_MASK PAGE_MASK
147 #define PT32_DIR_BASE_ADDR_MASK \
148 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
149 #define PT32_LVL_ADDR_MASK(level) \
150 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
151 * PT32_LEVEL_BITS))) - 1))
153 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
158 #define ACC_EXEC_MASK 1
159 #define ACC_WRITE_MASK PT_WRITABLE_MASK
160 #define ACC_USER_MASK PT_USER_MASK
161 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
163 #include <trace/events/kvm.h>
165 #define CREATE_TRACE_POINTS
166 #include "mmutrace.h"
168 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
170 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
172 struct kvm_rmap_desc
{
173 u64
*sptes
[RMAP_EXT
];
174 struct kvm_rmap_desc
*more
;
177 struct kvm_shadow_walk_iterator
{
185 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
186 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
187 shadow_walk_okay(&(_walker)); \
188 shadow_walk_next(&(_walker)))
190 typedef void (*mmu_parent_walk_fn
) (struct kvm_mmu_page
*sp
, u64
*spte
);
192 static struct kmem_cache
*pte_chain_cache
;
193 static struct kmem_cache
*rmap_desc_cache
;
194 static struct kmem_cache
*mmu_page_header_cache
;
195 static struct percpu_counter kvm_total_used_mmu_pages
;
197 static u64 __read_mostly shadow_trap_nonpresent_pte
;
198 static u64 __read_mostly shadow_notrap_nonpresent_pte
;
199 static u64 __read_mostly shadow_nx_mask
;
200 static u64 __read_mostly shadow_x_mask
; /* mutual exclusive with nx_mask */
201 static u64 __read_mostly shadow_user_mask
;
202 static u64 __read_mostly shadow_accessed_mask
;
203 static u64 __read_mostly shadow_dirty_mask
;
205 static inline u64
rsvd_bits(int s
, int e
)
207 return ((1ULL << (e
- s
+ 1)) - 1) << s
;
210 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte
, u64 notrap_pte
)
212 shadow_trap_nonpresent_pte
= trap_pte
;
213 shadow_notrap_nonpresent_pte
= notrap_pte
;
215 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes
);
217 void kvm_mmu_set_mask_ptes(u64 user_mask
, u64 accessed_mask
,
218 u64 dirty_mask
, u64 nx_mask
, u64 x_mask
)
220 shadow_user_mask
= user_mask
;
221 shadow_accessed_mask
= accessed_mask
;
222 shadow_dirty_mask
= dirty_mask
;
223 shadow_nx_mask
= nx_mask
;
224 shadow_x_mask
= x_mask
;
226 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes
);
228 static bool is_write_protection(struct kvm_vcpu
*vcpu
)
230 return kvm_read_cr0_bits(vcpu
, X86_CR0_WP
);
233 static int is_cpuid_PSE36(void)
238 static int is_nx(struct kvm_vcpu
*vcpu
)
240 return vcpu
->arch
.efer
& EFER_NX
;
243 static int is_shadow_present_pte(u64 pte
)
245 return pte
!= shadow_trap_nonpresent_pte
246 && pte
!= shadow_notrap_nonpresent_pte
;
249 static int is_large_pte(u64 pte
)
251 return pte
& PT_PAGE_SIZE_MASK
;
254 static int is_writable_pte(unsigned long pte
)
256 return pte
& PT_WRITABLE_MASK
;
259 static int is_dirty_gpte(unsigned long pte
)
261 return pte
& PT_DIRTY_MASK
;
264 static int is_rmap_spte(u64 pte
)
266 return is_shadow_present_pte(pte
);
269 static int is_last_spte(u64 pte
, int level
)
271 if (level
== PT_PAGE_TABLE_LEVEL
)
273 if (is_large_pte(pte
))
278 static pfn_t
spte_to_pfn(u64 pte
)
280 return (pte
& PT64_BASE_ADDR_MASK
) >> PAGE_SHIFT
;
283 static gfn_t
pse36_gfn_delta(u32 gpte
)
285 int shift
= 32 - PT32_DIR_PSE36_SHIFT
- PAGE_SHIFT
;
287 return (gpte
& PT32_DIR_PSE36_MASK
) << shift
;
290 static void __set_spte(u64
*sptep
, u64 spte
)
292 set_64bit(sptep
, spte
);
295 static u64
__xchg_spte(u64
*sptep
, u64 new_spte
)
298 return xchg(sptep
, new_spte
);
304 } while (cmpxchg64(sptep
, old_spte
, new_spte
) != old_spte
);
310 static bool spte_has_volatile_bits(u64 spte
)
312 if (!shadow_accessed_mask
)
315 if (!is_shadow_present_pte(spte
))
318 if ((spte
& shadow_accessed_mask
) &&
319 (!is_writable_pte(spte
) || (spte
& shadow_dirty_mask
)))
325 static bool spte_is_bit_cleared(u64 old_spte
, u64 new_spte
, u64 bit_mask
)
327 return (old_spte
& bit_mask
) && !(new_spte
& bit_mask
);
330 static void update_spte(u64
*sptep
, u64 new_spte
)
332 u64 mask
, old_spte
= *sptep
;
334 WARN_ON(!is_rmap_spte(new_spte
));
336 new_spte
|= old_spte
& shadow_dirty_mask
;
338 mask
= shadow_accessed_mask
;
339 if (is_writable_pte(old_spte
))
340 mask
|= shadow_dirty_mask
;
342 if (!spte_has_volatile_bits(old_spte
) || (new_spte
& mask
) == mask
)
343 __set_spte(sptep
, new_spte
);
345 old_spte
= __xchg_spte(sptep
, new_spte
);
347 if (!shadow_accessed_mask
)
350 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_accessed_mask
))
351 kvm_set_pfn_accessed(spte_to_pfn(old_spte
));
352 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_dirty_mask
))
353 kvm_set_pfn_dirty(spte_to_pfn(old_spte
));
356 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache
*cache
,
357 struct kmem_cache
*base_cache
, int min
)
361 if (cache
->nobjs
>= min
)
363 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
364 obj
= kmem_cache_zalloc(base_cache
, GFP_KERNEL
);
367 cache
->objects
[cache
->nobjs
++] = obj
;
372 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache
*mc
,
373 struct kmem_cache
*cache
)
376 kmem_cache_free(cache
, mc
->objects
[--mc
->nobjs
]);
379 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache
*cache
,
384 if (cache
->nobjs
>= min
)
386 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
387 page
= alloc_page(GFP_KERNEL
);
390 cache
->objects
[cache
->nobjs
++] = page_address(page
);
395 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache
*mc
)
398 free_page((unsigned long)mc
->objects
[--mc
->nobjs
]);
401 static int mmu_topup_memory_caches(struct kvm_vcpu
*vcpu
)
405 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_pte_chain_cache
,
409 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_rmap_desc_cache
,
410 rmap_desc_cache
, 4 + PTE_PREFETCH_NUM
);
413 r
= mmu_topup_memory_cache_page(&vcpu
->arch
.mmu_page_cache
, 8);
416 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
417 mmu_page_header_cache
, 4);
422 static void mmu_free_memory_caches(struct kvm_vcpu
*vcpu
)
424 mmu_free_memory_cache(&vcpu
->arch
.mmu_pte_chain_cache
, pte_chain_cache
);
425 mmu_free_memory_cache(&vcpu
->arch
.mmu_rmap_desc_cache
, rmap_desc_cache
);
426 mmu_free_memory_cache_page(&vcpu
->arch
.mmu_page_cache
);
427 mmu_free_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
428 mmu_page_header_cache
);
431 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache
*mc
,
437 p
= mc
->objects
[--mc
->nobjs
];
441 static struct kvm_pte_chain
*mmu_alloc_pte_chain(struct kvm_vcpu
*vcpu
)
443 return mmu_memory_cache_alloc(&vcpu
->arch
.mmu_pte_chain_cache
,
444 sizeof(struct kvm_pte_chain
));
447 static void mmu_free_pte_chain(struct kvm_pte_chain
*pc
)
449 kmem_cache_free(pte_chain_cache
, pc
);
452 static struct kvm_rmap_desc
*mmu_alloc_rmap_desc(struct kvm_vcpu
*vcpu
)
454 return mmu_memory_cache_alloc(&vcpu
->arch
.mmu_rmap_desc_cache
,
455 sizeof(struct kvm_rmap_desc
));
458 static void mmu_free_rmap_desc(struct kvm_rmap_desc
*rd
)
460 kmem_cache_free(rmap_desc_cache
, rd
);
463 static gfn_t
kvm_mmu_page_get_gfn(struct kvm_mmu_page
*sp
, int index
)
465 if (!sp
->role
.direct
)
466 return sp
->gfns
[index
];
468 return sp
->gfn
+ (index
<< ((sp
->role
.level
- 1) * PT64_LEVEL_BITS
));
471 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page
*sp
, int index
, gfn_t gfn
)
474 BUG_ON(gfn
!= kvm_mmu_page_get_gfn(sp
, index
));
476 sp
->gfns
[index
] = gfn
;
480 * Return the pointer to the large page information for a given gfn,
481 * handling slots that are not large page aligned.
483 static struct kvm_lpage_info
*lpage_info_slot(gfn_t gfn
,
484 struct kvm_memory_slot
*slot
,
489 idx
= (gfn
>> KVM_HPAGE_GFN_SHIFT(level
)) -
490 (slot
->base_gfn
>> KVM_HPAGE_GFN_SHIFT(level
));
491 return &slot
->lpage_info
[level
- 2][idx
];
494 static void account_shadowed(struct kvm
*kvm
, gfn_t gfn
)
496 struct kvm_memory_slot
*slot
;
497 struct kvm_lpage_info
*linfo
;
500 slot
= gfn_to_memslot(kvm
, gfn
);
501 for (i
= PT_DIRECTORY_LEVEL
;
502 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
503 linfo
= lpage_info_slot(gfn
, slot
, i
);
504 linfo
->write_count
+= 1;
508 static void unaccount_shadowed(struct kvm
*kvm
, gfn_t gfn
)
510 struct kvm_memory_slot
*slot
;
511 struct kvm_lpage_info
*linfo
;
514 slot
= gfn_to_memslot(kvm
, gfn
);
515 for (i
= PT_DIRECTORY_LEVEL
;
516 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
517 linfo
= lpage_info_slot(gfn
, slot
, i
);
518 linfo
->write_count
-= 1;
519 WARN_ON(linfo
->write_count
< 0);
523 static int has_wrprotected_page(struct kvm
*kvm
,
527 struct kvm_memory_slot
*slot
;
528 struct kvm_lpage_info
*linfo
;
530 slot
= gfn_to_memslot(kvm
, gfn
);
532 linfo
= lpage_info_slot(gfn
, slot
, level
);
533 return linfo
->write_count
;
539 static int host_mapping_level(struct kvm
*kvm
, gfn_t gfn
)
541 unsigned long page_size
;
544 page_size
= kvm_host_page_size(kvm
, gfn
);
546 for (i
= PT_PAGE_TABLE_LEVEL
;
547 i
< (PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
); ++i
) {
548 if (page_size
>= KVM_HPAGE_SIZE(i
))
557 static bool mapping_level_dirty_bitmap(struct kvm_vcpu
*vcpu
, gfn_t large_gfn
)
559 struct kvm_memory_slot
*slot
;
560 slot
= gfn_to_memslot(vcpu
->kvm
, large_gfn
);
561 if (slot
&& slot
->dirty_bitmap
)
566 static int mapping_level(struct kvm_vcpu
*vcpu
, gfn_t large_gfn
)
568 int host_level
, level
, max_level
;
570 host_level
= host_mapping_level(vcpu
->kvm
, large_gfn
);
572 if (host_level
== PT_PAGE_TABLE_LEVEL
)
575 max_level
= kvm_x86_ops
->get_lpage_level() < host_level
?
576 kvm_x86_ops
->get_lpage_level() : host_level
;
578 for (level
= PT_DIRECTORY_LEVEL
; level
<= max_level
; ++level
)
579 if (has_wrprotected_page(vcpu
->kvm
, large_gfn
, level
))
586 * Take gfn and return the reverse mapping to it.
589 static unsigned long *gfn_to_rmap(struct kvm
*kvm
, gfn_t gfn
, int level
)
591 struct kvm_memory_slot
*slot
;
592 struct kvm_lpage_info
*linfo
;
594 slot
= gfn_to_memslot(kvm
, gfn
);
595 if (likely(level
== PT_PAGE_TABLE_LEVEL
))
596 return &slot
->rmap
[gfn
- slot
->base_gfn
];
598 linfo
= lpage_info_slot(gfn
, slot
, level
);
600 return &linfo
->rmap_pde
;
604 * Reverse mapping data structures:
606 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
607 * that points to page_address(page).
609 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
610 * containing more mappings.
612 * Returns the number of rmap entries before the spte was added or zero if
613 * the spte was not added.
616 static int rmap_add(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
618 struct kvm_mmu_page
*sp
;
619 struct kvm_rmap_desc
*desc
;
620 unsigned long *rmapp
;
623 if (!is_rmap_spte(*spte
))
625 sp
= page_header(__pa(spte
));
626 kvm_mmu_page_set_gfn(sp
, spte
- sp
->spt
, gfn
);
627 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
->role
.level
);
629 rmap_printk("rmap_add: %p %llx 0->1\n", spte
, *spte
);
630 *rmapp
= (unsigned long)spte
;
631 } else if (!(*rmapp
& 1)) {
632 rmap_printk("rmap_add: %p %llx 1->many\n", spte
, *spte
);
633 desc
= mmu_alloc_rmap_desc(vcpu
);
634 desc
->sptes
[0] = (u64
*)*rmapp
;
635 desc
->sptes
[1] = spte
;
636 *rmapp
= (unsigned long)desc
| 1;
639 rmap_printk("rmap_add: %p %llx many->many\n", spte
, *spte
);
640 desc
= (struct kvm_rmap_desc
*)(*rmapp
& ~1ul);
641 while (desc
->sptes
[RMAP_EXT
-1] && desc
->more
) {
645 if (desc
->sptes
[RMAP_EXT
-1]) {
646 desc
->more
= mmu_alloc_rmap_desc(vcpu
);
649 for (i
= 0; desc
->sptes
[i
]; ++i
)
651 desc
->sptes
[i
] = spte
;
656 static void rmap_desc_remove_entry(unsigned long *rmapp
,
657 struct kvm_rmap_desc
*desc
,
659 struct kvm_rmap_desc
*prev_desc
)
663 for (j
= RMAP_EXT
- 1; !desc
->sptes
[j
] && j
> i
; --j
)
665 desc
->sptes
[i
] = desc
->sptes
[j
];
666 desc
->sptes
[j
] = NULL
;
669 if (!prev_desc
&& !desc
->more
)
670 *rmapp
= (unsigned long)desc
->sptes
[0];
673 prev_desc
->more
= desc
->more
;
675 *rmapp
= (unsigned long)desc
->more
| 1;
676 mmu_free_rmap_desc(desc
);
679 static void rmap_remove(struct kvm
*kvm
, u64
*spte
)
681 struct kvm_rmap_desc
*desc
;
682 struct kvm_rmap_desc
*prev_desc
;
683 struct kvm_mmu_page
*sp
;
685 unsigned long *rmapp
;
688 sp
= page_header(__pa(spte
));
689 gfn
= kvm_mmu_page_get_gfn(sp
, spte
- sp
->spt
);
690 rmapp
= gfn_to_rmap(kvm
, gfn
, sp
->role
.level
);
692 printk(KERN_ERR
"rmap_remove: %p 0->BUG\n", spte
);
694 } else if (!(*rmapp
& 1)) {
695 rmap_printk("rmap_remove: %p 1->0\n", spte
);
696 if ((u64
*)*rmapp
!= spte
) {
697 printk(KERN_ERR
"rmap_remove: %p 1->BUG\n", spte
);
702 rmap_printk("rmap_remove: %p many->many\n", spte
);
703 desc
= (struct kvm_rmap_desc
*)(*rmapp
& ~1ul);
706 for (i
= 0; i
< RMAP_EXT
&& desc
->sptes
[i
]; ++i
)
707 if (desc
->sptes
[i
] == spte
) {
708 rmap_desc_remove_entry(rmapp
,
716 pr_err("rmap_remove: %p many->many\n", spte
);
721 static int set_spte_track_bits(u64
*sptep
, u64 new_spte
)
724 u64 old_spte
= *sptep
;
726 if (!spte_has_volatile_bits(old_spte
))
727 __set_spte(sptep
, new_spte
);
729 old_spte
= __xchg_spte(sptep
, new_spte
);
731 if (!is_rmap_spte(old_spte
))
734 pfn
= spte_to_pfn(old_spte
);
735 if (!shadow_accessed_mask
|| old_spte
& shadow_accessed_mask
)
736 kvm_set_pfn_accessed(pfn
);
737 if (!shadow_dirty_mask
|| (old_spte
& shadow_dirty_mask
))
738 kvm_set_pfn_dirty(pfn
);
742 static void drop_spte(struct kvm
*kvm
, u64
*sptep
, u64 new_spte
)
744 if (set_spte_track_bits(sptep
, new_spte
))
745 rmap_remove(kvm
, sptep
);
748 static u64
*rmap_next(struct kvm
*kvm
, unsigned long *rmapp
, u64
*spte
)
750 struct kvm_rmap_desc
*desc
;
756 else if (!(*rmapp
& 1)) {
758 return (u64
*)*rmapp
;
761 desc
= (struct kvm_rmap_desc
*)(*rmapp
& ~1ul);
764 for (i
= 0; i
< RMAP_EXT
&& desc
->sptes
[i
]; ++i
) {
765 if (prev_spte
== spte
)
766 return desc
->sptes
[i
];
767 prev_spte
= desc
->sptes
[i
];
774 static int rmap_write_protect(struct kvm
*kvm
, u64 gfn
)
776 unsigned long *rmapp
;
778 int i
, write_protected
= 0;
780 rmapp
= gfn_to_rmap(kvm
, gfn
, PT_PAGE_TABLE_LEVEL
);
782 spte
= rmap_next(kvm
, rmapp
, NULL
);
785 BUG_ON(!(*spte
& PT_PRESENT_MASK
));
786 rmap_printk("rmap_write_protect: spte %p %llx\n", spte
, *spte
);
787 if (is_writable_pte(*spte
)) {
788 update_spte(spte
, *spte
& ~PT_WRITABLE_MASK
);
791 spte
= rmap_next(kvm
, rmapp
, spte
);
794 /* check for huge page mappings */
795 for (i
= PT_DIRECTORY_LEVEL
;
796 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
797 rmapp
= gfn_to_rmap(kvm
, gfn
, i
);
798 spte
= rmap_next(kvm
, rmapp
, NULL
);
801 BUG_ON(!(*spte
& PT_PRESENT_MASK
));
802 BUG_ON((*spte
& (PT_PAGE_SIZE_MASK
|PT_PRESENT_MASK
)) != (PT_PAGE_SIZE_MASK
|PT_PRESENT_MASK
));
803 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte
, *spte
, gfn
);
804 if (is_writable_pte(*spte
)) {
806 shadow_trap_nonpresent_pte
);
811 spte
= rmap_next(kvm
, rmapp
, spte
);
815 return write_protected
;
818 static int kvm_unmap_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
822 int need_tlb_flush
= 0;
824 while ((spte
= rmap_next(kvm
, rmapp
, NULL
))) {
825 BUG_ON(!(*spte
& PT_PRESENT_MASK
));
826 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte
, *spte
);
827 drop_spte(kvm
, spte
, shadow_trap_nonpresent_pte
);
830 return need_tlb_flush
;
833 static int kvm_set_pte_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
838 pte_t
*ptep
= (pte_t
*)data
;
841 WARN_ON(pte_huge(*ptep
));
842 new_pfn
= pte_pfn(*ptep
);
843 spte
= rmap_next(kvm
, rmapp
, NULL
);
845 BUG_ON(!is_shadow_present_pte(*spte
));
846 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte
, *spte
);
848 if (pte_write(*ptep
)) {
849 drop_spte(kvm
, spte
, shadow_trap_nonpresent_pte
);
850 spte
= rmap_next(kvm
, rmapp
, NULL
);
852 new_spte
= *spte
&~ (PT64_BASE_ADDR_MASK
);
853 new_spte
|= (u64
)new_pfn
<< PAGE_SHIFT
;
855 new_spte
&= ~PT_WRITABLE_MASK
;
856 new_spte
&= ~SPTE_HOST_WRITEABLE
;
857 new_spte
&= ~shadow_accessed_mask
;
858 set_spte_track_bits(spte
, new_spte
);
859 spte
= rmap_next(kvm
, rmapp
, spte
);
863 kvm_flush_remote_tlbs(kvm
);
868 static int kvm_handle_hva(struct kvm
*kvm
, unsigned long hva
,
870 int (*handler
)(struct kvm
*kvm
, unsigned long *rmapp
,
876 struct kvm_memslots
*slots
;
878 slots
= kvm_memslots(kvm
);
880 for (i
= 0; i
< slots
->nmemslots
; i
++) {
881 struct kvm_memory_slot
*memslot
= &slots
->memslots
[i
];
882 unsigned long start
= memslot
->userspace_addr
;
885 end
= start
+ (memslot
->npages
<< PAGE_SHIFT
);
886 if (hva
>= start
&& hva
< end
) {
887 gfn_t gfn_offset
= (hva
- start
) >> PAGE_SHIFT
;
888 gfn_t gfn
= memslot
->base_gfn
+ gfn_offset
;
890 ret
= handler(kvm
, &memslot
->rmap
[gfn_offset
], data
);
892 for (j
= 0; j
< KVM_NR_PAGE_SIZES
- 1; ++j
) {
893 struct kvm_lpage_info
*linfo
;
895 linfo
= lpage_info_slot(gfn
, memslot
,
896 PT_DIRECTORY_LEVEL
+ j
);
897 ret
|= handler(kvm
, &linfo
->rmap_pde
, data
);
899 trace_kvm_age_page(hva
, memslot
, ret
);
907 int kvm_unmap_hva(struct kvm
*kvm
, unsigned long hva
)
909 return kvm_handle_hva(kvm
, hva
, 0, kvm_unmap_rmapp
);
912 void kvm_set_spte_hva(struct kvm
*kvm
, unsigned long hva
, pte_t pte
)
914 kvm_handle_hva(kvm
, hva
, (unsigned long)&pte
, kvm_set_pte_rmapp
);
917 static int kvm_age_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
924 * Emulate the accessed bit for EPT, by checking if this page has
925 * an EPT mapping, and clearing it if it does. On the next access,
926 * a new EPT mapping will be established.
927 * This has some overhead, but not as much as the cost of swapping
928 * out actively used pages or breaking up actively used hugepages.
930 if (!shadow_accessed_mask
)
931 return kvm_unmap_rmapp(kvm
, rmapp
, data
);
933 spte
= rmap_next(kvm
, rmapp
, NULL
);
937 BUG_ON(!(_spte
& PT_PRESENT_MASK
));
938 _young
= _spte
& PT_ACCESSED_MASK
;
941 clear_bit(PT_ACCESSED_SHIFT
, (unsigned long *)spte
);
943 spte
= rmap_next(kvm
, rmapp
, spte
);
948 #define RMAP_RECYCLE_THRESHOLD 1000
950 static void rmap_recycle(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
952 unsigned long *rmapp
;
953 struct kvm_mmu_page
*sp
;
955 sp
= page_header(__pa(spte
));
957 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
->role
.level
);
959 kvm_unmap_rmapp(vcpu
->kvm
, rmapp
, 0);
960 kvm_flush_remote_tlbs(vcpu
->kvm
);
963 int kvm_age_hva(struct kvm
*kvm
, unsigned long hva
)
965 return kvm_handle_hva(kvm
, hva
, 0, kvm_age_rmapp
);
969 static int is_empty_shadow_page(u64
*spt
)
974 for (pos
= spt
, end
= pos
+ PAGE_SIZE
/ sizeof(u64
); pos
!= end
; pos
++)
975 if (is_shadow_present_pte(*pos
)) {
976 printk(KERN_ERR
"%s: %p %llx\n", __func__
,
985 * This value is the sum of all of the kvm instances's
986 * kvm->arch.n_used_mmu_pages values. We need a global,
987 * aggregate version in order to make the slab shrinker
990 static inline void kvm_mod_used_mmu_pages(struct kvm
*kvm
, int nr
)
992 kvm
->arch
.n_used_mmu_pages
+= nr
;
993 percpu_counter_add(&kvm_total_used_mmu_pages
, nr
);
996 static void kvm_mmu_free_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
998 ASSERT(is_empty_shadow_page(sp
->spt
));
999 hlist_del(&sp
->hash_link
);
1000 list_del(&sp
->link
);
1001 __free_page(virt_to_page(sp
->spt
));
1002 if (!sp
->role
.direct
)
1003 __free_page(virt_to_page(sp
->gfns
));
1004 kmem_cache_free(mmu_page_header_cache
, sp
);
1005 kvm_mod_used_mmu_pages(kvm
, -1);
1008 static unsigned kvm_page_table_hashfn(gfn_t gfn
)
1010 return gfn
& ((1 << KVM_MMU_HASH_SHIFT
) - 1);
1013 static struct kvm_mmu_page
*kvm_mmu_alloc_page(struct kvm_vcpu
*vcpu
,
1014 u64
*parent_pte
, int direct
)
1016 struct kvm_mmu_page
*sp
;
1018 sp
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_header_cache
, sizeof *sp
);
1019 sp
->spt
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
, PAGE_SIZE
);
1021 sp
->gfns
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
,
1023 set_page_private(virt_to_page(sp
->spt
), (unsigned long)sp
);
1024 list_add(&sp
->link
, &vcpu
->kvm
->arch
.active_mmu_pages
);
1025 bitmap_zero(sp
->slot_bitmap
, KVM_MEMORY_SLOTS
+ KVM_PRIVATE_MEM_SLOTS
);
1026 sp
->multimapped
= 0;
1027 sp
->parent_pte
= parent_pte
;
1028 kvm_mod_used_mmu_pages(vcpu
->kvm
, +1);
1032 static void mmu_page_add_parent_pte(struct kvm_vcpu
*vcpu
,
1033 struct kvm_mmu_page
*sp
, u64
*parent_pte
)
1035 struct kvm_pte_chain
*pte_chain
;
1036 struct hlist_node
*node
;
1041 if (!sp
->multimapped
) {
1042 u64
*old
= sp
->parent_pte
;
1045 sp
->parent_pte
= parent_pte
;
1048 sp
->multimapped
= 1;
1049 pte_chain
= mmu_alloc_pte_chain(vcpu
);
1050 INIT_HLIST_HEAD(&sp
->parent_ptes
);
1051 hlist_add_head(&pte_chain
->link
, &sp
->parent_ptes
);
1052 pte_chain
->parent_ptes
[0] = old
;
1054 hlist_for_each_entry(pte_chain
, node
, &sp
->parent_ptes
, link
) {
1055 if (pte_chain
->parent_ptes
[NR_PTE_CHAIN_ENTRIES
-1])
1057 for (i
= 0; i
< NR_PTE_CHAIN_ENTRIES
; ++i
)
1058 if (!pte_chain
->parent_ptes
[i
]) {
1059 pte_chain
->parent_ptes
[i
] = parent_pte
;
1063 pte_chain
= mmu_alloc_pte_chain(vcpu
);
1065 hlist_add_head(&pte_chain
->link
, &sp
->parent_ptes
);
1066 pte_chain
->parent_ptes
[0] = parent_pte
;
1069 static void mmu_page_remove_parent_pte(struct kvm_mmu_page
*sp
,
1072 struct kvm_pte_chain
*pte_chain
;
1073 struct hlist_node
*node
;
1076 if (!sp
->multimapped
) {
1077 BUG_ON(sp
->parent_pte
!= parent_pte
);
1078 sp
->parent_pte
= NULL
;
1081 hlist_for_each_entry(pte_chain
, node
, &sp
->parent_ptes
, link
)
1082 for (i
= 0; i
< NR_PTE_CHAIN_ENTRIES
; ++i
) {
1083 if (!pte_chain
->parent_ptes
[i
])
1085 if (pte_chain
->parent_ptes
[i
] != parent_pte
)
1087 while (i
+ 1 < NR_PTE_CHAIN_ENTRIES
1088 && pte_chain
->parent_ptes
[i
+ 1]) {
1089 pte_chain
->parent_ptes
[i
]
1090 = pte_chain
->parent_ptes
[i
+ 1];
1093 pte_chain
->parent_ptes
[i
] = NULL
;
1095 hlist_del(&pte_chain
->link
);
1096 mmu_free_pte_chain(pte_chain
);
1097 if (hlist_empty(&sp
->parent_ptes
)) {
1098 sp
->multimapped
= 0;
1099 sp
->parent_pte
= NULL
;
1107 static void mmu_parent_walk(struct kvm_mmu_page
*sp
, mmu_parent_walk_fn fn
)
1109 struct kvm_pte_chain
*pte_chain
;
1110 struct hlist_node
*node
;
1111 struct kvm_mmu_page
*parent_sp
;
1114 if (!sp
->multimapped
&& sp
->parent_pte
) {
1115 parent_sp
= page_header(__pa(sp
->parent_pte
));
1116 fn(parent_sp
, sp
->parent_pte
);
1120 hlist_for_each_entry(pte_chain
, node
, &sp
->parent_ptes
, link
)
1121 for (i
= 0; i
< NR_PTE_CHAIN_ENTRIES
; ++i
) {
1122 u64
*spte
= pte_chain
->parent_ptes
[i
];
1126 parent_sp
= page_header(__pa(spte
));
1127 fn(parent_sp
, spte
);
1131 static void mark_unsync(struct kvm_mmu_page
*sp
, u64
*spte
);
1132 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page
*sp
)
1134 mmu_parent_walk(sp
, mark_unsync
);
1137 static void mark_unsync(struct kvm_mmu_page
*sp
, u64
*spte
)
1141 index
= spte
- sp
->spt
;
1142 if (__test_and_set_bit(index
, sp
->unsync_child_bitmap
))
1144 if (sp
->unsync_children
++)
1146 kvm_mmu_mark_parents_unsync(sp
);
1149 static void nonpaging_prefetch_page(struct kvm_vcpu
*vcpu
,
1150 struct kvm_mmu_page
*sp
)
1154 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
1155 sp
->spt
[i
] = shadow_trap_nonpresent_pte
;
1158 static int nonpaging_sync_page(struct kvm_vcpu
*vcpu
,
1159 struct kvm_mmu_page
*sp
)
1164 static void nonpaging_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
1168 #define KVM_PAGE_ARRAY_NR 16
1170 struct kvm_mmu_pages
{
1171 struct mmu_page_and_offset
{
1172 struct kvm_mmu_page
*sp
;
1174 } page
[KVM_PAGE_ARRAY_NR
];
1178 #define for_each_unsync_children(bitmap, idx) \
1179 for (idx = find_first_bit(bitmap, 512); \
1181 idx = find_next_bit(bitmap, 512, idx+1))
1183 static int mmu_pages_add(struct kvm_mmu_pages
*pvec
, struct kvm_mmu_page
*sp
,
1189 for (i
=0; i
< pvec
->nr
; i
++)
1190 if (pvec
->page
[i
].sp
== sp
)
1193 pvec
->page
[pvec
->nr
].sp
= sp
;
1194 pvec
->page
[pvec
->nr
].idx
= idx
;
1196 return (pvec
->nr
== KVM_PAGE_ARRAY_NR
);
1199 static int __mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1200 struct kvm_mmu_pages
*pvec
)
1202 int i
, ret
, nr_unsync_leaf
= 0;
1204 for_each_unsync_children(sp
->unsync_child_bitmap
, i
) {
1205 struct kvm_mmu_page
*child
;
1206 u64 ent
= sp
->spt
[i
];
1208 if (!is_shadow_present_pte(ent
) || is_large_pte(ent
))
1209 goto clear_child_bitmap
;
1211 child
= page_header(ent
& PT64_BASE_ADDR_MASK
);
1213 if (child
->unsync_children
) {
1214 if (mmu_pages_add(pvec
, child
, i
))
1217 ret
= __mmu_unsync_walk(child
, pvec
);
1219 goto clear_child_bitmap
;
1221 nr_unsync_leaf
+= ret
;
1224 } else if (child
->unsync
) {
1226 if (mmu_pages_add(pvec
, child
, i
))
1229 goto clear_child_bitmap
;
1234 __clear_bit(i
, sp
->unsync_child_bitmap
);
1235 sp
->unsync_children
--;
1236 WARN_ON((int)sp
->unsync_children
< 0);
1240 return nr_unsync_leaf
;
1243 static int mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1244 struct kvm_mmu_pages
*pvec
)
1246 if (!sp
->unsync_children
)
1249 mmu_pages_add(pvec
, sp
, 0);
1250 return __mmu_unsync_walk(sp
, pvec
);
1253 static void kvm_unlink_unsync_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1255 WARN_ON(!sp
->unsync
);
1256 trace_kvm_mmu_sync_page(sp
);
1258 --kvm
->stat
.mmu_unsync
;
1261 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
1262 struct list_head
*invalid_list
);
1263 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
1264 struct list_head
*invalid_list
);
1266 #define for_each_gfn_sp(kvm, sp, gfn, pos) \
1267 hlist_for_each_entry(sp, pos, \
1268 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1269 if ((sp)->gfn != (gfn)) {} else
1271 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos) \
1272 hlist_for_each_entry(sp, pos, \
1273 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1274 if ((sp)->gfn != (gfn) || (sp)->role.direct || \
1275 (sp)->role.invalid) {} else
1277 /* @sp->gfn should be write-protected at the call site */
1278 static int __kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1279 struct list_head
*invalid_list
, bool clear_unsync
)
1281 if (sp
->role
.cr4_pae
!= !!is_pae(vcpu
)) {
1282 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1287 kvm_unlink_unsync_page(vcpu
->kvm
, sp
);
1289 if (vcpu
->arch
.mmu
.sync_page(vcpu
, sp
)) {
1290 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1294 kvm_mmu_flush_tlb(vcpu
);
1298 static int kvm_sync_page_transient(struct kvm_vcpu
*vcpu
,
1299 struct kvm_mmu_page
*sp
)
1301 LIST_HEAD(invalid_list
);
1304 ret
= __kvm_sync_page(vcpu
, sp
, &invalid_list
, false);
1306 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1311 static int kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1312 struct list_head
*invalid_list
)
1314 return __kvm_sync_page(vcpu
, sp
, invalid_list
, true);
1317 /* @gfn should be write-protected at the call site */
1318 static void kvm_sync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
1320 struct kvm_mmu_page
*s
;
1321 struct hlist_node
*node
;
1322 LIST_HEAD(invalid_list
);
1325 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
, node
) {
1329 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
1330 kvm_unlink_unsync_page(vcpu
->kvm
, s
);
1331 if ((s
->role
.cr4_pae
!= !!is_pae(vcpu
)) ||
1332 (vcpu
->arch
.mmu
.sync_page(vcpu
, s
))) {
1333 kvm_mmu_prepare_zap_page(vcpu
->kvm
, s
, &invalid_list
);
1339 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1341 kvm_mmu_flush_tlb(vcpu
);
1344 struct mmu_page_path
{
1345 struct kvm_mmu_page
*parent
[PT64_ROOT_LEVEL
-1];
1346 unsigned int idx
[PT64_ROOT_LEVEL
-1];
1349 #define for_each_sp(pvec, sp, parents, i) \
1350 for (i = mmu_pages_next(&pvec, &parents, -1), \
1351 sp = pvec.page[i].sp; \
1352 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1353 i = mmu_pages_next(&pvec, &parents, i))
1355 static int mmu_pages_next(struct kvm_mmu_pages
*pvec
,
1356 struct mmu_page_path
*parents
,
1361 for (n
= i
+1; n
< pvec
->nr
; n
++) {
1362 struct kvm_mmu_page
*sp
= pvec
->page
[n
].sp
;
1364 if (sp
->role
.level
== PT_PAGE_TABLE_LEVEL
) {
1365 parents
->idx
[0] = pvec
->page
[n
].idx
;
1369 parents
->parent
[sp
->role
.level
-2] = sp
;
1370 parents
->idx
[sp
->role
.level
-1] = pvec
->page
[n
].idx
;
1376 static void mmu_pages_clear_parents(struct mmu_page_path
*parents
)
1378 struct kvm_mmu_page
*sp
;
1379 unsigned int level
= 0;
1382 unsigned int idx
= parents
->idx
[level
];
1384 sp
= parents
->parent
[level
];
1388 --sp
->unsync_children
;
1389 WARN_ON((int)sp
->unsync_children
< 0);
1390 __clear_bit(idx
, sp
->unsync_child_bitmap
);
1392 } while (level
< PT64_ROOT_LEVEL
-1 && !sp
->unsync_children
);
1395 static void kvm_mmu_pages_init(struct kvm_mmu_page
*parent
,
1396 struct mmu_page_path
*parents
,
1397 struct kvm_mmu_pages
*pvec
)
1399 parents
->parent
[parent
->role
.level
-1] = NULL
;
1403 static void mmu_sync_children(struct kvm_vcpu
*vcpu
,
1404 struct kvm_mmu_page
*parent
)
1407 struct kvm_mmu_page
*sp
;
1408 struct mmu_page_path parents
;
1409 struct kvm_mmu_pages pages
;
1410 LIST_HEAD(invalid_list
);
1412 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1413 while (mmu_unsync_walk(parent
, &pages
)) {
1416 for_each_sp(pages
, sp
, parents
, i
)
1417 protected |= rmap_write_protect(vcpu
->kvm
, sp
->gfn
);
1420 kvm_flush_remote_tlbs(vcpu
->kvm
);
1422 for_each_sp(pages
, sp
, parents
, i
) {
1423 kvm_sync_page(vcpu
, sp
, &invalid_list
);
1424 mmu_pages_clear_parents(&parents
);
1426 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1427 cond_resched_lock(&vcpu
->kvm
->mmu_lock
);
1428 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1432 static struct kvm_mmu_page
*kvm_mmu_get_page(struct kvm_vcpu
*vcpu
,
1440 union kvm_mmu_page_role role
;
1442 struct kvm_mmu_page
*sp
;
1443 struct hlist_node
*node
;
1444 bool need_sync
= false;
1446 role
= vcpu
->arch
.mmu
.base_role
;
1448 role
.direct
= direct
;
1451 role
.access
= access
;
1452 if (!vcpu
->arch
.mmu
.direct_map
1453 && vcpu
->arch
.mmu
.root_level
<= PT32_ROOT_LEVEL
) {
1454 quadrant
= gaddr
>> (PAGE_SHIFT
+ (PT64_PT_BITS
* level
));
1455 quadrant
&= (1 << ((PT32_PT_BITS
- PT64_PT_BITS
) * level
)) - 1;
1456 role
.quadrant
= quadrant
;
1458 for_each_gfn_sp(vcpu
->kvm
, sp
, gfn
, node
) {
1459 if (!need_sync
&& sp
->unsync
)
1462 if (sp
->role
.word
!= role
.word
)
1465 if (sp
->unsync
&& kvm_sync_page_transient(vcpu
, sp
))
1468 mmu_page_add_parent_pte(vcpu
, sp
, parent_pte
);
1469 if (sp
->unsync_children
) {
1470 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
1471 kvm_mmu_mark_parents_unsync(sp
);
1472 } else if (sp
->unsync
)
1473 kvm_mmu_mark_parents_unsync(sp
);
1475 trace_kvm_mmu_get_page(sp
, false);
1478 ++vcpu
->kvm
->stat
.mmu_cache_miss
;
1479 sp
= kvm_mmu_alloc_page(vcpu
, parent_pte
, direct
);
1484 hlist_add_head(&sp
->hash_link
,
1485 &vcpu
->kvm
->arch
.mmu_page_hash
[kvm_page_table_hashfn(gfn
)]);
1487 if (rmap_write_protect(vcpu
->kvm
, gfn
))
1488 kvm_flush_remote_tlbs(vcpu
->kvm
);
1489 if (level
> PT_PAGE_TABLE_LEVEL
&& need_sync
)
1490 kvm_sync_pages(vcpu
, gfn
);
1492 account_shadowed(vcpu
->kvm
, gfn
);
1494 if (shadow_trap_nonpresent_pte
!= shadow_notrap_nonpresent_pte
)
1495 vcpu
->arch
.mmu
.prefetch_page(vcpu
, sp
);
1497 nonpaging_prefetch_page(vcpu
, sp
);
1498 trace_kvm_mmu_get_page(sp
, true);
1502 static void shadow_walk_init(struct kvm_shadow_walk_iterator
*iterator
,
1503 struct kvm_vcpu
*vcpu
, u64 addr
)
1505 iterator
->addr
= addr
;
1506 iterator
->shadow_addr
= vcpu
->arch
.mmu
.root_hpa
;
1507 iterator
->level
= vcpu
->arch
.mmu
.shadow_root_level
;
1509 if (iterator
->level
== PT64_ROOT_LEVEL
&&
1510 vcpu
->arch
.mmu
.root_level
< PT64_ROOT_LEVEL
&&
1511 !vcpu
->arch
.mmu
.direct_map
)
1514 if (iterator
->level
== PT32E_ROOT_LEVEL
) {
1515 iterator
->shadow_addr
1516 = vcpu
->arch
.mmu
.pae_root
[(addr
>> 30) & 3];
1517 iterator
->shadow_addr
&= PT64_BASE_ADDR_MASK
;
1519 if (!iterator
->shadow_addr
)
1520 iterator
->level
= 0;
1524 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator
*iterator
)
1526 if (iterator
->level
< PT_PAGE_TABLE_LEVEL
)
1529 if (iterator
->level
== PT_PAGE_TABLE_LEVEL
)
1530 if (is_large_pte(*iterator
->sptep
))
1533 iterator
->index
= SHADOW_PT_INDEX(iterator
->addr
, iterator
->level
);
1534 iterator
->sptep
= ((u64
*)__va(iterator
->shadow_addr
)) + iterator
->index
;
1538 static void shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
)
1540 iterator
->shadow_addr
= *iterator
->sptep
& PT64_BASE_ADDR_MASK
;
1544 static void link_shadow_page(u64
*sptep
, struct kvm_mmu_page
*sp
)
1548 spte
= __pa(sp
->spt
)
1549 | PT_PRESENT_MASK
| PT_ACCESSED_MASK
1550 | PT_WRITABLE_MASK
| PT_USER_MASK
;
1551 __set_spte(sptep
, spte
);
1554 static void drop_large_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
)
1556 if (is_large_pte(*sptep
)) {
1557 drop_spte(vcpu
->kvm
, sptep
, shadow_trap_nonpresent_pte
);
1558 kvm_flush_remote_tlbs(vcpu
->kvm
);
1562 static void validate_direct_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
1563 unsigned direct_access
)
1565 if (is_shadow_present_pte(*sptep
) && !is_large_pte(*sptep
)) {
1566 struct kvm_mmu_page
*child
;
1569 * For the direct sp, if the guest pte's dirty bit
1570 * changed form clean to dirty, it will corrupt the
1571 * sp's access: allow writable in the read-only sp,
1572 * so we should update the spte at this point to get
1573 * a new sp with the correct access.
1575 child
= page_header(*sptep
& PT64_BASE_ADDR_MASK
);
1576 if (child
->role
.access
== direct_access
)
1579 mmu_page_remove_parent_pte(child
, sptep
);
1580 __set_spte(sptep
, shadow_trap_nonpresent_pte
);
1581 kvm_flush_remote_tlbs(vcpu
->kvm
);
1585 static void kvm_mmu_page_unlink_children(struct kvm
*kvm
,
1586 struct kvm_mmu_page
*sp
)
1594 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
) {
1597 if (is_shadow_present_pte(ent
)) {
1598 if (!is_last_spte(ent
, sp
->role
.level
)) {
1599 ent
&= PT64_BASE_ADDR_MASK
;
1600 mmu_page_remove_parent_pte(page_header(ent
),
1603 if (is_large_pte(ent
))
1605 drop_spte(kvm
, &pt
[i
],
1606 shadow_trap_nonpresent_pte
);
1609 pt
[i
] = shadow_trap_nonpresent_pte
;
1613 static void kvm_mmu_put_page(struct kvm_mmu_page
*sp
, u64
*parent_pte
)
1615 mmu_page_remove_parent_pte(sp
, parent_pte
);
1618 static void kvm_mmu_reset_last_pte_updated(struct kvm
*kvm
)
1621 struct kvm_vcpu
*vcpu
;
1623 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1624 vcpu
->arch
.last_pte_updated
= NULL
;
1627 static void kvm_mmu_unlink_parents(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1631 while (sp
->multimapped
|| sp
->parent_pte
) {
1632 if (!sp
->multimapped
)
1633 parent_pte
= sp
->parent_pte
;
1635 struct kvm_pte_chain
*chain
;
1637 chain
= container_of(sp
->parent_ptes
.first
,
1638 struct kvm_pte_chain
, link
);
1639 parent_pte
= chain
->parent_ptes
[0];
1641 BUG_ON(!parent_pte
);
1642 kvm_mmu_put_page(sp
, parent_pte
);
1643 __set_spte(parent_pte
, shadow_trap_nonpresent_pte
);
1647 static int mmu_zap_unsync_children(struct kvm
*kvm
,
1648 struct kvm_mmu_page
*parent
,
1649 struct list_head
*invalid_list
)
1652 struct mmu_page_path parents
;
1653 struct kvm_mmu_pages pages
;
1655 if (parent
->role
.level
== PT_PAGE_TABLE_LEVEL
)
1658 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1659 while (mmu_unsync_walk(parent
, &pages
)) {
1660 struct kvm_mmu_page
*sp
;
1662 for_each_sp(pages
, sp
, parents
, i
) {
1663 kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
);
1664 mmu_pages_clear_parents(&parents
);
1667 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1673 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
1674 struct list_head
*invalid_list
)
1678 trace_kvm_mmu_prepare_zap_page(sp
);
1679 ++kvm
->stat
.mmu_shadow_zapped
;
1680 ret
= mmu_zap_unsync_children(kvm
, sp
, invalid_list
);
1681 kvm_mmu_page_unlink_children(kvm
, sp
);
1682 kvm_mmu_unlink_parents(kvm
, sp
);
1683 if (!sp
->role
.invalid
&& !sp
->role
.direct
)
1684 unaccount_shadowed(kvm
, sp
->gfn
);
1686 kvm_unlink_unsync_page(kvm
, sp
);
1687 if (!sp
->root_count
) {
1690 list_move(&sp
->link
, invalid_list
);
1692 list_move(&sp
->link
, &kvm
->arch
.active_mmu_pages
);
1693 kvm_reload_remote_mmus(kvm
);
1696 sp
->role
.invalid
= 1;
1697 kvm_mmu_reset_last_pte_updated(kvm
);
1701 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
1702 struct list_head
*invalid_list
)
1704 struct kvm_mmu_page
*sp
;
1706 if (list_empty(invalid_list
))
1709 kvm_flush_remote_tlbs(kvm
);
1712 sp
= list_first_entry(invalid_list
, struct kvm_mmu_page
, link
);
1713 WARN_ON(!sp
->role
.invalid
|| sp
->root_count
);
1714 kvm_mmu_free_page(kvm
, sp
);
1715 } while (!list_empty(invalid_list
));
1720 * Changing the number of mmu pages allocated to the vm
1721 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
1723 void kvm_mmu_change_mmu_pages(struct kvm
*kvm
, unsigned int goal_nr_mmu_pages
)
1725 LIST_HEAD(invalid_list
);
1727 * If we set the number of mmu pages to be smaller be than the
1728 * number of actived pages , we must to free some mmu pages before we
1732 if (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
) {
1733 while (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
&&
1734 !list_empty(&kvm
->arch
.active_mmu_pages
)) {
1735 struct kvm_mmu_page
*page
;
1737 page
= container_of(kvm
->arch
.active_mmu_pages
.prev
,
1738 struct kvm_mmu_page
, link
);
1739 kvm_mmu_prepare_zap_page(kvm
, page
, &invalid_list
);
1740 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
1742 goal_nr_mmu_pages
= kvm
->arch
.n_used_mmu_pages
;
1745 kvm
->arch
.n_max_mmu_pages
= goal_nr_mmu_pages
;
1748 static int kvm_mmu_unprotect_page(struct kvm
*kvm
, gfn_t gfn
)
1750 struct kvm_mmu_page
*sp
;
1751 struct hlist_node
*node
;
1752 LIST_HEAD(invalid_list
);
1755 pgprintk("%s: looking for gfn %llx\n", __func__
, gfn
);
1758 for_each_gfn_indirect_valid_sp(kvm
, sp
, gfn
, node
) {
1759 pgprintk("%s: gfn %llx role %x\n", __func__
, gfn
,
1762 kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
);
1764 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
1768 static void mmu_unshadow(struct kvm
*kvm
, gfn_t gfn
)
1770 struct kvm_mmu_page
*sp
;
1771 struct hlist_node
*node
;
1772 LIST_HEAD(invalid_list
);
1774 for_each_gfn_indirect_valid_sp(kvm
, sp
, gfn
, node
) {
1775 pgprintk("%s: zap %llx %x\n",
1776 __func__
, gfn
, sp
->role
.word
);
1777 kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
);
1779 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
1782 static void page_header_update_slot(struct kvm
*kvm
, void *pte
, gfn_t gfn
)
1784 int slot
= memslot_id(kvm
, gfn
);
1785 struct kvm_mmu_page
*sp
= page_header(__pa(pte
));
1787 __set_bit(slot
, sp
->slot_bitmap
);
1790 static void mmu_convert_notrap(struct kvm_mmu_page
*sp
)
1795 if (shadow_trap_nonpresent_pte
== shadow_notrap_nonpresent_pte
)
1798 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
) {
1799 if (pt
[i
] == shadow_notrap_nonpresent_pte
)
1800 __set_spte(&pt
[i
], shadow_trap_nonpresent_pte
);
1805 * The function is based on mtrr_type_lookup() in
1806 * arch/x86/kernel/cpu/mtrr/generic.c
1808 static int get_mtrr_type(struct mtrr_state_type
*mtrr_state
,
1813 u8 prev_match
, curr_match
;
1814 int num_var_ranges
= KVM_NR_VAR_MTRR
;
1816 if (!mtrr_state
->enabled
)
1819 /* Make end inclusive end, instead of exclusive */
1822 /* Look in fixed ranges. Just return the type as per start */
1823 if (mtrr_state
->have_fixed
&& (start
< 0x100000)) {
1826 if (start
< 0x80000) {
1828 idx
+= (start
>> 16);
1829 return mtrr_state
->fixed_ranges
[idx
];
1830 } else if (start
< 0xC0000) {
1832 idx
+= ((start
- 0x80000) >> 14);
1833 return mtrr_state
->fixed_ranges
[idx
];
1834 } else if (start
< 0x1000000) {
1836 idx
+= ((start
- 0xC0000) >> 12);
1837 return mtrr_state
->fixed_ranges
[idx
];
1842 * Look in variable ranges
1843 * Look of multiple ranges matching this address and pick type
1844 * as per MTRR precedence
1846 if (!(mtrr_state
->enabled
& 2))
1847 return mtrr_state
->def_type
;
1850 for (i
= 0; i
< num_var_ranges
; ++i
) {
1851 unsigned short start_state
, end_state
;
1853 if (!(mtrr_state
->var_ranges
[i
].mask_lo
& (1 << 11)))
1856 base
= (((u64
)mtrr_state
->var_ranges
[i
].base_hi
) << 32) +
1857 (mtrr_state
->var_ranges
[i
].base_lo
& PAGE_MASK
);
1858 mask
= (((u64
)mtrr_state
->var_ranges
[i
].mask_hi
) << 32) +
1859 (mtrr_state
->var_ranges
[i
].mask_lo
& PAGE_MASK
);
1861 start_state
= ((start
& mask
) == (base
& mask
));
1862 end_state
= ((end
& mask
) == (base
& mask
));
1863 if (start_state
!= end_state
)
1866 if ((start
& mask
) != (base
& mask
))
1869 curr_match
= mtrr_state
->var_ranges
[i
].base_lo
& 0xff;
1870 if (prev_match
== 0xFF) {
1871 prev_match
= curr_match
;
1875 if (prev_match
== MTRR_TYPE_UNCACHABLE
||
1876 curr_match
== MTRR_TYPE_UNCACHABLE
)
1877 return MTRR_TYPE_UNCACHABLE
;
1879 if ((prev_match
== MTRR_TYPE_WRBACK
&&
1880 curr_match
== MTRR_TYPE_WRTHROUGH
) ||
1881 (prev_match
== MTRR_TYPE_WRTHROUGH
&&
1882 curr_match
== MTRR_TYPE_WRBACK
)) {
1883 prev_match
= MTRR_TYPE_WRTHROUGH
;
1884 curr_match
= MTRR_TYPE_WRTHROUGH
;
1887 if (prev_match
!= curr_match
)
1888 return MTRR_TYPE_UNCACHABLE
;
1891 if (prev_match
!= 0xFF)
1894 return mtrr_state
->def_type
;
1897 u8
kvm_get_guest_memory_type(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
1901 mtrr
= get_mtrr_type(&vcpu
->arch
.mtrr_state
, gfn
<< PAGE_SHIFT
,
1902 (gfn
<< PAGE_SHIFT
) + PAGE_SIZE
);
1903 if (mtrr
== 0xfe || mtrr
== 0xff)
1904 mtrr
= MTRR_TYPE_WRBACK
;
1907 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type
);
1909 static void __kvm_unsync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
)
1911 trace_kvm_mmu_unsync_page(sp
);
1912 ++vcpu
->kvm
->stat
.mmu_unsync
;
1915 kvm_mmu_mark_parents_unsync(sp
);
1916 mmu_convert_notrap(sp
);
1919 static void kvm_unsync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
1921 struct kvm_mmu_page
*s
;
1922 struct hlist_node
*node
;
1924 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
, node
) {
1927 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
1928 __kvm_unsync_page(vcpu
, s
);
1932 static int mmu_need_write_protect(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
1935 struct kvm_mmu_page
*s
;
1936 struct hlist_node
*node
;
1937 bool need_unsync
= false;
1939 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
, node
) {
1943 if (s
->role
.level
!= PT_PAGE_TABLE_LEVEL
)
1946 if (!need_unsync
&& !s
->unsync
) {
1953 kvm_unsync_pages(vcpu
, gfn
);
1957 static int set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
1958 unsigned pte_access
, int user_fault
,
1959 int write_fault
, int dirty
, int level
,
1960 gfn_t gfn
, pfn_t pfn
, bool speculative
,
1961 bool can_unsync
, bool host_writable
)
1963 u64 spte
, entry
= *sptep
;
1967 * We don't set the accessed bit, since we sometimes want to see
1968 * whether the guest actually used the pte (in order to detect
1971 spte
= PT_PRESENT_MASK
;
1973 spte
|= shadow_accessed_mask
;
1975 pte_access
&= ~ACC_WRITE_MASK
;
1976 if (pte_access
& ACC_EXEC_MASK
)
1977 spte
|= shadow_x_mask
;
1979 spte
|= shadow_nx_mask
;
1980 if (pte_access
& ACC_USER_MASK
)
1981 spte
|= shadow_user_mask
;
1982 if (level
> PT_PAGE_TABLE_LEVEL
)
1983 spte
|= PT_PAGE_SIZE_MASK
;
1985 spte
|= kvm_x86_ops
->get_mt_mask(vcpu
, gfn
,
1986 kvm_is_mmio_pfn(pfn
));
1989 spte
|= SPTE_HOST_WRITEABLE
;
1991 pte_access
&= ~ACC_WRITE_MASK
;
1993 spte
|= (u64
)pfn
<< PAGE_SHIFT
;
1995 if ((pte_access
& ACC_WRITE_MASK
)
1996 || (!vcpu
->arch
.mmu
.direct_map
&& write_fault
1997 && !is_write_protection(vcpu
) && !user_fault
)) {
1999 if (level
> PT_PAGE_TABLE_LEVEL
&&
2000 has_wrprotected_page(vcpu
->kvm
, gfn
, level
)) {
2002 drop_spte(vcpu
->kvm
, sptep
, shadow_trap_nonpresent_pte
);
2006 spte
|= PT_WRITABLE_MASK
;
2008 if (!vcpu
->arch
.mmu
.direct_map
2009 && !(pte_access
& ACC_WRITE_MASK
))
2010 spte
&= ~PT_USER_MASK
;
2013 * Optimization: for pte sync, if spte was writable the hash
2014 * lookup is unnecessary (and expensive). Write protection
2015 * is responsibility of mmu_get_page / kvm_sync_page.
2016 * Same reasoning can be applied to dirty page accounting.
2018 if (!can_unsync
&& is_writable_pte(*sptep
))
2021 if (mmu_need_write_protect(vcpu
, gfn
, can_unsync
)) {
2022 pgprintk("%s: found shadow page for %llx, marking ro\n",
2025 pte_access
&= ~ACC_WRITE_MASK
;
2026 if (is_writable_pte(spte
))
2027 spte
&= ~PT_WRITABLE_MASK
;
2031 if (pte_access
& ACC_WRITE_MASK
)
2032 mark_page_dirty(vcpu
->kvm
, gfn
);
2035 update_spte(sptep
, spte
);
2037 * If we overwrite a writable spte with a read-only one we
2038 * should flush remote TLBs. Otherwise rmap_write_protect
2039 * will find a read-only spte, even though the writable spte
2040 * might be cached on a CPU's TLB.
2042 if (is_writable_pte(entry
) && !is_writable_pte(*sptep
))
2043 kvm_flush_remote_tlbs(vcpu
->kvm
);
2048 static void mmu_set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2049 unsigned pt_access
, unsigned pte_access
,
2050 int user_fault
, int write_fault
, int dirty
,
2051 int *ptwrite
, int level
, gfn_t gfn
,
2052 pfn_t pfn
, bool speculative
,
2055 int was_rmapped
= 0;
2058 pgprintk("%s: spte %llx access %x write_fault %d"
2059 " user_fault %d gfn %llx\n",
2060 __func__
, *sptep
, pt_access
,
2061 write_fault
, user_fault
, gfn
);
2063 if (is_rmap_spte(*sptep
)) {
2065 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2066 * the parent of the now unreachable PTE.
2068 if (level
> PT_PAGE_TABLE_LEVEL
&&
2069 !is_large_pte(*sptep
)) {
2070 struct kvm_mmu_page
*child
;
2073 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
2074 mmu_page_remove_parent_pte(child
, sptep
);
2075 __set_spte(sptep
, shadow_trap_nonpresent_pte
);
2076 kvm_flush_remote_tlbs(vcpu
->kvm
);
2077 } else if (pfn
!= spte_to_pfn(*sptep
)) {
2078 pgprintk("hfn old %llx new %llx\n",
2079 spte_to_pfn(*sptep
), pfn
);
2080 drop_spte(vcpu
->kvm
, sptep
, shadow_trap_nonpresent_pte
);
2081 kvm_flush_remote_tlbs(vcpu
->kvm
);
2086 if (set_spte(vcpu
, sptep
, pte_access
, user_fault
, write_fault
,
2087 dirty
, level
, gfn
, pfn
, speculative
, true,
2091 kvm_mmu_flush_tlb(vcpu
);
2094 pgprintk("%s: setting spte %llx\n", __func__
, *sptep
);
2095 pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2096 is_large_pte(*sptep
)? "2MB" : "4kB",
2097 *sptep
& PT_PRESENT_MASK
?"RW":"R", gfn
,
2099 if (!was_rmapped
&& is_large_pte(*sptep
))
2100 ++vcpu
->kvm
->stat
.lpages
;
2102 page_header_update_slot(vcpu
->kvm
, sptep
, gfn
);
2104 rmap_count
= rmap_add(vcpu
, sptep
, gfn
);
2105 if (rmap_count
> RMAP_RECYCLE_THRESHOLD
)
2106 rmap_recycle(vcpu
, sptep
, gfn
);
2108 kvm_release_pfn_clean(pfn
);
2110 vcpu
->arch
.last_pte_updated
= sptep
;
2111 vcpu
->arch
.last_pte_gfn
= gfn
;
2115 static void nonpaging_new_cr3(struct kvm_vcpu
*vcpu
)
2119 static struct kvm_memory_slot
*
2120 pte_prefetch_gfn_to_memslot(struct kvm_vcpu
*vcpu
, gfn_t gfn
, bool no_dirty_log
)
2122 struct kvm_memory_slot
*slot
;
2124 slot
= gfn_to_memslot(vcpu
->kvm
, gfn
);
2125 if (!slot
|| slot
->flags
& KVM_MEMSLOT_INVALID
||
2126 (no_dirty_log
&& slot
->dirty_bitmap
))
2132 static pfn_t
pte_prefetch_gfn_to_pfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2135 struct kvm_memory_slot
*slot
;
2138 slot
= pte_prefetch_gfn_to_memslot(vcpu
, gfn
, no_dirty_log
);
2141 return page_to_pfn(bad_page
);
2144 hva
= gfn_to_hva_memslot(slot
, gfn
);
2146 return hva_to_pfn_atomic(vcpu
->kvm
, hva
);
2149 static int direct_pte_prefetch_many(struct kvm_vcpu
*vcpu
,
2150 struct kvm_mmu_page
*sp
,
2151 u64
*start
, u64
*end
)
2153 struct page
*pages
[PTE_PREFETCH_NUM
];
2154 unsigned access
= sp
->role
.access
;
2158 gfn
= kvm_mmu_page_get_gfn(sp
, start
- sp
->spt
);
2159 if (!pte_prefetch_gfn_to_memslot(vcpu
, gfn
, access
& ACC_WRITE_MASK
))
2162 ret
= gfn_to_page_many_atomic(vcpu
->kvm
, gfn
, pages
, end
- start
);
2166 for (i
= 0; i
< ret
; i
++, gfn
++, start
++)
2167 mmu_set_spte(vcpu
, start
, ACC_ALL
,
2168 access
, 0, 0, 1, NULL
,
2169 sp
->role
.level
, gfn
,
2170 page_to_pfn(pages
[i
]), true, true);
2175 static void __direct_pte_prefetch(struct kvm_vcpu
*vcpu
,
2176 struct kvm_mmu_page
*sp
, u64
*sptep
)
2178 u64
*spte
, *start
= NULL
;
2181 WARN_ON(!sp
->role
.direct
);
2183 i
= (sptep
- sp
->spt
) & ~(PTE_PREFETCH_NUM
- 1);
2186 for (i
= 0; i
< PTE_PREFETCH_NUM
; i
++, spte
++) {
2187 if (*spte
!= shadow_trap_nonpresent_pte
|| spte
== sptep
) {
2190 if (direct_pte_prefetch_many(vcpu
, sp
, start
, spte
) < 0)
2198 static void direct_pte_prefetch(struct kvm_vcpu
*vcpu
, u64
*sptep
)
2200 struct kvm_mmu_page
*sp
;
2203 * Since it's no accessed bit on EPT, it's no way to
2204 * distinguish between actually accessed translations
2205 * and prefetched, so disable pte prefetch if EPT is
2208 if (!shadow_accessed_mask
)
2211 sp
= page_header(__pa(sptep
));
2212 if (sp
->role
.level
> PT_PAGE_TABLE_LEVEL
)
2215 __direct_pte_prefetch(vcpu
, sp
, sptep
);
2218 static int __direct_map(struct kvm_vcpu
*vcpu
, gpa_t v
, int write
,
2219 int map_writable
, int level
, gfn_t gfn
, pfn_t pfn
,
2222 struct kvm_shadow_walk_iterator iterator
;
2223 struct kvm_mmu_page
*sp
;
2227 for_each_shadow_entry(vcpu
, (u64
)gfn
<< PAGE_SHIFT
, iterator
) {
2228 if (iterator
.level
== level
) {
2229 unsigned pte_access
= ACC_ALL
;
2231 mmu_set_spte(vcpu
, iterator
.sptep
, ACC_ALL
, pte_access
,
2232 0, write
, 1, &pt_write
,
2233 level
, gfn
, pfn
, prefault
, map_writable
);
2234 direct_pte_prefetch(vcpu
, iterator
.sptep
);
2235 ++vcpu
->stat
.pf_fixed
;
2239 if (*iterator
.sptep
== shadow_trap_nonpresent_pte
) {
2240 u64 base_addr
= iterator
.addr
;
2242 base_addr
&= PT64_LVL_ADDR_MASK(iterator
.level
);
2243 pseudo_gfn
= base_addr
>> PAGE_SHIFT
;
2244 sp
= kvm_mmu_get_page(vcpu
, pseudo_gfn
, iterator
.addr
,
2246 1, ACC_ALL
, iterator
.sptep
);
2248 pgprintk("nonpaging_map: ENOMEM\n");
2249 kvm_release_pfn_clean(pfn
);
2253 __set_spte(iterator
.sptep
,
2255 | PT_PRESENT_MASK
| PT_WRITABLE_MASK
2256 | shadow_user_mask
| shadow_x_mask
2257 | shadow_accessed_mask
);
2263 static void kvm_send_hwpoison_signal(unsigned long address
, struct task_struct
*tsk
)
2267 info
.si_signo
= SIGBUS
;
2269 info
.si_code
= BUS_MCEERR_AR
;
2270 info
.si_addr
= (void __user
*)address
;
2271 info
.si_addr_lsb
= PAGE_SHIFT
;
2273 send_sig_info(SIGBUS
, &info
, tsk
);
2276 static int kvm_handle_bad_page(struct kvm
*kvm
, gfn_t gfn
, pfn_t pfn
)
2278 kvm_release_pfn_clean(pfn
);
2279 if (is_hwpoison_pfn(pfn
)) {
2280 kvm_send_hwpoison_signal(gfn_to_hva(kvm
, gfn
), current
);
2282 } else if (is_fault_pfn(pfn
))
2288 static void transparent_hugepage_adjust(struct kvm_vcpu
*vcpu
,
2289 gfn_t
*gfnp
, pfn_t
*pfnp
, int *levelp
)
2293 int level
= *levelp
;
2296 * Check if it's a transparent hugepage. If this would be an
2297 * hugetlbfs page, level wouldn't be set to
2298 * PT_PAGE_TABLE_LEVEL and there would be no adjustment done
2301 if (!is_error_pfn(pfn
) && !kvm_is_mmio_pfn(pfn
) &&
2302 level
== PT_PAGE_TABLE_LEVEL
&&
2303 PageTransCompound(pfn_to_page(pfn
)) &&
2304 !has_wrprotected_page(vcpu
->kvm
, gfn
, PT_DIRECTORY_LEVEL
)) {
2307 * mmu_notifier_retry was successful and we hold the
2308 * mmu_lock here, so the pmd can't become splitting
2309 * from under us, and in turn
2310 * __split_huge_page_refcount() can't run from under
2311 * us and we can safely transfer the refcount from
2312 * PG_tail to PG_head as we switch the pfn to tail to
2315 *levelp
= level
= PT_DIRECTORY_LEVEL
;
2316 mask
= KVM_PAGES_PER_HPAGE(level
) - 1;
2317 VM_BUG_ON((gfn
& mask
) != (pfn
& mask
));
2321 kvm_release_pfn_clean(pfn
);
2323 if (!get_page_unless_zero(pfn_to_page(pfn
)))
2330 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
2331 gva_t gva
, pfn_t
*pfn
, bool write
, bool *writable
);
2333 static int nonpaging_map(struct kvm_vcpu
*vcpu
, gva_t v
, int write
, gfn_t gfn
,
2340 unsigned long mmu_seq
;
2343 force_pt_level
= mapping_level_dirty_bitmap(vcpu
, gfn
);
2344 if (likely(!force_pt_level
)) {
2345 level
= mapping_level(vcpu
, gfn
);
2347 * This path builds a PAE pagetable - so we can map
2348 * 2mb pages at maximum. Therefore check if the level
2349 * is larger than that.
2351 if (level
> PT_DIRECTORY_LEVEL
)
2352 level
= PT_DIRECTORY_LEVEL
;
2354 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
2356 level
= PT_PAGE_TABLE_LEVEL
;
2358 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
2361 if (try_async_pf(vcpu
, prefault
, gfn
, v
, &pfn
, write
, &map_writable
))
2365 if (is_error_pfn(pfn
))
2366 return kvm_handle_bad_page(vcpu
->kvm
, gfn
, pfn
);
2368 spin_lock(&vcpu
->kvm
->mmu_lock
);
2369 if (mmu_notifier_retry(vcpu
, mmu_seq
))
2371 kvm_mmu_free_some_pages(vcpu
);
2372 if (likely(!force_pt_level
))
2373 transparent_hugepage_adjust(vcpu
, &gfn
, &pfn
, &level
);
2374 r
= __direct_map(vcpu
, v
, write
, map_writable
, level
, gfn
, pfn
,
2376 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2382 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2383 kvm_release_pfn_clean(pfn
);
2388 static void mmu_free_roots(struct kvm_vcpu
*vcpu
)
2391 struct kvm_mmu_page
*sp
;
2392 LIST_HEAD(invalid_list
);
2394 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2396 spin_lock(&vcpu
->kvm
->mmu_lock
);
2397 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
&&
2398 (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
||
2399 vcpu
->arch
.mmu
.direct_map
)) {
2400 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
2402 sp
= page_header(root
);
2404 if (!sp
->root_count
&& sp
->role
.invalid
) {
2405 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, &invalid_list
);
2406 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
2408 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
2409 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2412 for (i
= 0; i
< 4; ++i
) {
2413 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2416 root
&= PT64_BASE_ADDR_MASK
;
2417 sp
= page_header(root
);
2419 if (!sp
->root_count
&& sp
->role
.invalid
)
2420 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
2423 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
2425 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
2426 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2427 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
2430 static int mmu_check_root(struct kvm_vcpu
*vcpu
, gfn_t root_gfn
)
2434 if (!kvm_is_visible_gfn(vcpu
->kvm
, root_gfn
)) {
2435 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2442 static int mmu_alloc_direct_roots(struct kvm_vcpu
*vcpu
)
2444 struct kvm_mmu_page
*sp
;
2447 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
2448 spin_lock(&vcpu
->kvm
->mmu_lock
);
2449 kvm_mmu_free_some_pages(vcpu
);
2450 sp
= kvm_mmu_get_page(vcpu
, 0, 0, PT64_ROOT_LEVEL
,
2453 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2454 vcpu
->arch
.mmu
.root_hpa
= __pa(sp
->spt
);
2455 } else if (vcpu
->arch
.mmu
.shadow_root_level
== PT32E_ROOT_LEVEL
) {
2456 for (i
= 0; i
< 4; ++i
) {
2457 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2459 ASSERT(!VALID_PAGE(root
));
2460 spin_lock(&vcpu
->kvm
->mmu_lock
);
2461 kvm_mmu_free_some_pages(vcpu
);
2462 sp
= kvm_mmu_get_page(vcpu
, i
<< (30 - PAGE_SHIFT
),
2464 PT32_ROOT_LEVEL
, 1, ACC_ALL
,
2466 root
= __pa(sp
->spt
);
2468 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2469 vcpu
->arch
.mmu
.pae_root
[i
] = root
| PT_PRESENT_MASK
;
2471 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
2478 static int mmu_alloc_shadow_roots(struct kvm_vcpu
*vcpu
)
2480 struct kvm_mmu_page
*sp
;
2485 root_gfn
= vcpu
->arch
.mmu
.get_cr3(vcpu
) >> PAGE_SHIFT
;
2487 if (mmu_check_root(vcpu
, root_gfn
))
2491 * Do we shadow a long mode page table? If so we need to
2492 * write-protect the guests page table root.
2494 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
2495 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
2497 ASSERT(!VALID_PAGE(root
));
2499 spin_lock(&vcpu
->kvm
->mmu_lock
);
2500 kvm_mmu_free_some_pages(vcpu
);
2501 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, 0, PT64_ROOT_LEVEL
,
2503 root
= __pa(sp
->spt
);
2505 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2506 vcpu
->arch
.mmu
.root_hpa
= root
;
2511 * We shadow a 32 bit page table. This may be a legacy 2-level
2512 * or a PAE 3-level page table. In either case we need to be aware that
2513 * the shadow page table may be a PAE or a long mode page table.
2515 pm_mask
= PT_PRESENT_MASK
;
2516 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
)
2517 pm_mask
|= PT_ACCESSED_MASK
| PT_WRITABLE_MASK
| PT_USER_MASK
;
2519 for (i
= 0; i
< 4; ++i
) {
2520 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2522 ASSERT(!VALID_PAGE(root
));
2523 if (vcpu
->arch
.mmu
.root_level
== PT32E_ROOT_LEVEL
) {
2524 pdptr
= kvm_pdptr_read_mmu(vcpu
, &vcpu
->arch
.mmu
, i
);
2525 if (!is_present_gpte(pdptr
)) {
2526 vcpu
->arch
.mmu
.pae_root
[i
] = 0;
2529 root_gfn
= pdptr
>> PAGE_SHIFT
;
2530 if (mmu_check_root(vcpu
, root_gfn
))
2533 spin_lock(&vcpu
->kvm
->mmu_lock
);
2534 kvm_mmu_free_some_pages(vcpu
);
2535 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, i
<< 30,
2538 root
= __pa(sp
->spt
);
2540 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2542 vcpu
->arch
.mmu
.pae_root
[i
] = root
| pm_mask
;
2544 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
2547 * If we shadow a 32 bit page table with a long mode page
2548 * table we enter this path.
2550 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
2551 if (vcpu
->arch
.mmu
.lm_root
== NULL
) {
2553 * The additional page necessary for this is only
2554 * allocated on demand.
2559 lm_root
= (void*)get_zeroed_page(GFP_KERNEL
);
2560 if (lm_root
== NULL
)
2563 lm_root
[0] = __pa(vcpu
->arch
.mmu
.pae_root
) | pm_mask
;
2565 vcpu
->arch
.mmu
.lm_root
= lm_root
;
2568 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.lm_root
);
2574 static int mmu_alloc_roots(struct kvm_vcpu
*vcpu
)
2576 if (vcpu
->arch
.mmu
.direct_map
)
2577 return mmu_alloc_direct_roots(vcpu
);
2579 return mmu_alloc_shadow_roots(vcpu
);
2582 static void mmu_sync_roots(struct kvm_vcpu
*vcpu
)
2585 struct kvm_mmu_page
*sp
;
2587 if (vcpu
->arch
.mmu
.direct_map
)
2590 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2593 trace_kvm_mmu_audit(vcpu
, AUDIT_PRE_SYNC
);
2594 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
2595 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
2596 sp
= page_header(root
);
2597 mmu_sync_children(vcpu
, sp
);
2598 trace_kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
2601 for (i
= 0; i
< 4; ++i
) {
2602 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2604 if (root
&& VALID_PAGE(root
)) {
2605 root
&= PT64_BASE_ADDR_MASK
;
2606 sp
= page_header(root
);
2607 mmu_sync_children(vcpu
, sp
);
2610 trace_kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
2613 void kvm_mmu_sync_roots(struct kvm_vcpu
*vcpu
)
2615 spin_lock(&vcpu
->kvm
->mmu_lock
);
2616 mmu_sync_roots(vcpu
);
2617 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2620 static gpa_t
nonpaging_gva_to_gpa(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
2621 u32 access
, struct x86_exception
*exception
)
2624 exception
->error_code
= 0;
2628 static gpa_t
nonpaging_gva_to_gpa_nested(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
2630 struct x86_exception
*exception
)
2633 exception
->error_code
= 0;
2634 return vcpu
->arch
.nested_mmu
.translate_gpa(vcpu
, vaddr
, access
);
2637 static int nonpaging_page_fault(struct kvm_vcpu
*vcpu
, gva_t gva
,
2638 u32 error_code
, bool prefault
)
2643 pgprintk("%s: gva %lx error %x\n", __func__
, gva
, error_code
);
2644 r
= mmu_topup_memory_caches(vcpu
);
2649 ASSERT(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
2651 gfn
= gva
>> PAGE_SHIFT
;
2653 return nonpaging_map(vcpu
, gva
& PAGE_MASK
,
2654 error_code
& PFERR_WRITE_MASK
, gfn
, prefault
);
2657 static int kvm_arch_setup_async_pf(struct kvm_vcpu
*vcpu
, gva_t gva
, gfn_t gfn
)
2659 struct kvm_arch_async_pf arch
;
2661 arch
.token
= (vcpu
->arch
.apf
.id
++ << 12) | vcpu
->vcpu_id
;
2663 arch
.direct_map
= vcpu
->arch
.mmu
.direct_map
;
2664 arch
.cr3
= vcpu
->arch
.mmu
.get_cr3(vcpu
);
2666 return kvm_setup_async_pf(vcpu
, gva
, gfn
, &arch
);
2669 static bool can_do_async_pf(struct kvm_vcpu
*vcpu
)
2671 if (unlikely(!irqchip_in_kernel(vcpu
->kvm
) ||
2672 kvm_event_needs_reinjection(vcpu
)))
2675 return kvm_x86_ops
->interrupt_allowed(vcpu
);
2678 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
2679 gva_t gva
, pfn_t
*pfn
, bool write
, bool *writable
)
2683 *pfn
= gfn_to_pfn_async(vcpu
->kvm
, gfn
, &async
, write
, writable
);
2686 return false; /* *pfn has correct page already */
2688 put_page(pfn_to_page(*pfn
));
2690 if (!prefault
&& can_do_async_pf(vcpu
)) {
2691 trace_kvm_try_async_get_page(gva
, gfn
);
2692 if (kvm_find_async_pf_gfn(vcpu
, gfn
)) {
2693 trace_kvm_async_pf_doublefault(gva
, gfn
);
2694 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
2696 } else if (kvm_arch_setup_async_pf(vcpu
, gva
, gfn
))
2700 *pfn
= gfn_to_pfn_prot(vcpu
->kvm
, gfn
, write
, writable
);
2705 static int tdp_page_fault(struct kvm_vcpu
*vcpu
, gva_t gpa
, u32 error_code
,
2712 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
2713 unsigned long mmu_seq
;
2714 int write
= error_code
& PFERR_WRITE_MASK
;
2718 ASSERT(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
2720 r
= mmu_topup_memory_caches(vcpu
);
2724 force_pt_level
= mapping_level_dirty_bitmap(vcpu
, gfn
);
2725 if (likely(!force_pt_level
)) {
2726 level
= mapping_level(vcpu
, gfn
);
2727 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
2729 level
= PT_PAGE_TABLE_LEVEL
;
2731 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
2734 if (try_async_pf(vcpu
, prefault
, gfn
, gpa
, &pfn
, write
, &map_writable
))
2738 if (is_error_pfn(pfn
))
2739 return kvm_handle_bad_page(vcpu
->kvm
, gfn
, pfn
);
2740 spin_lock(&vcpu
->kvm
->mmu_lock
);
2741 if (mmu_notifier_retry(vcpu
, mmu_seq
))
2743 kvm_mmu_free_some_pages(vcpu
);
2744 if (likely(!force_pt_level
))
2745 transparent_hugepage_adjust(vcpu
, &gfn
, &pfn
, &level
);
2746 r
= __direct_map(vcpu
, gpa
, write
, map_writable
,
2747 level
, gfn
, pfn
, prefault
);
2748 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2753 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2754 kvm_release_pfn_clean(pfn
);
2758 static void nonpaging_free(struct kvm_vcpu
*vcpu
)
2760 mmu_free_roots(vcpu
);
2763 static int nonpaging_init_context(struct kvm_vcpu
*vcpu
,
2764 struct kvm_mmu
*context
)
2766 context
->new_cr3
= nonpaging_new_cr3
;
2767 context
->page_fault
= nonpaging_page_fault
;
2768 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
2769 context
->free
= nonpaging_free
;
2770 context
->prefetch_page
= nonpaging_prefetch_page
;
2771 context
->sync_page
= nonpaging_sync_page
;
2772 context
->invlpg
= nonpaging_invlpg
;
2773 context
->root_level
= 0;
2774 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
2775 context
->root_hpa
= INVALID_PAGE
;
2776 context
->direct_map
= true;
2777 context
->nx
= false;
2781 void kvm_mmu_flush_tlb(struct kvm_vcpu
*vcpu
)
2783 ++vcpu
->stat
.tlb_flush
;
2784 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
2787 static void paging_new_cr3(struct kvm_vcpu
*vcpu
)
2789 pgprintk("%s: cr3 %lx\n", __func__
, kvm_read_cr3(vcpu
));
2790 mmu_free_roots(vcpu
);
2793 static unsigned long get_cr3(struct kvm_vcpu
*vcpu
)
2795 return kvm_read_cr3(vcpu
);
2798 static void inject_page_fault(struct kvm_vcpu
*vcpu
,
2799 struct x86_exception
*fault
)
2801 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
2804 static void paging_free(struct kvm_vcpu
*vcpu
)
2806 nonpaging_free(vcpu
);
2809 static bool is_rsvd_bits_set(struct kvm_mmu
*mmu
, u64 gpte
, int level
)
2813 bit7
= (gpte
>> 7) & 1;
2814 return (gpte
& mmu
->rsvd_bits_mask
[bit7
][level
-1]) != 0;
2818 #include "paging_tmpl.h"
2822 #include "paging_tmpl.h"
2825 static void reset_rsvds_bits_mask(struct kvm_vcpu
*vcpu
,
2826 struct kvm_mmu
*context
,
2829 int maxphyaddr
= cpuid_maxphyaddr(vcpu
);
2830 u64 exb_bit_rsvd
= 0;
2833 exb_bit_rsvd
= rsvd_bits(63, 63);
2835 case PT32_ROOT_LEVEL
:
2836 /* no rsvd bits for 2 level 4K page table entries */
2837 context
->rsvd_bits_mask
[0][1] = 0;
2838 context
->rsvd_bits_mask
[0][0] = 0;
2839 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
2841 if (!is_pse(vcpu
)) {
2842 context
->rsvd_bits_mask
[1][1] = 0;
2846 if (is_cpuid_PSE36())
2847 /* 36bits PSE 4MB page */
2848 context
->rsvd_bits_mask
[1][1] = rsvd_bits(17, 21);
2850 /* 32 bits PSE 4MB page */
2851 context
->rsvd_bits_mask
[1][1] = rsvd_bits(13, 21);
2853 case PT32E_ROOT_LEVEL
:
2854 context
->rsvd_bits_mask
[0][2] =
2855 rsvd_bits(maxphyaddr
, 63) |
2856 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2857 context
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
2858 rsvd_bits(maxphyaddr
, 62); /* PDE */
2859 context
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
2860 rsvd_bits(maxphyaddr
, 62); /* PTE */
2861 context
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
2862 rsvd_bits(maxphyaddr
, 62) |
2863 rsvd_bits(13, 20); /* large page */
2864 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
2866 case PT64_ROOT_LEVEL
:
2867 context
->rsvd_bits_mask
[0][3] = exb_bit_rsvd
|
2868 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(7, 8);
2869 context
->rsvd_bits_mask
[0][2] = exb_bit_rsvd
|
2870 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(7, 8);
2871 context
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
2872 rsvd_bits(maxphyaddr
, 51);
2873 context
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
2874 rsvd_bits(maxphyaddr
, 51);
2875 context
->rsvd_bits_mask
[1][3] = context
->rsvd_bits_mask
[0][3];
2876 context
->rsvd_bits_mask
[1][2] = exb_bit_rsvd
|
2877 rsvd_bits(maxphyaddr
, 51) |
2879 context
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
2880 rsvd_bits(maxphyaddr
, 51) |
2881 rsvd_bits(13, 20); /* large page */
2882 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
2887 static int paging64_init_context_common(struct kvm_vcpu
*vcpu
,
2888 struct kvm_mmu
*context
,
2891 context
->nx
= is_nx(vcpu
);
2893 reset_rsvds_bits_mask(vcpu
, context
, level
);
2895 ASSERT(is_pae(vcpu
));
2896 context
->new_cr3
= paging_new_cr3
;
2897 context
->page_fault
= paging64_page_fault
;
2898 context
->gva_to_gpa
= paging64_gva_to_gpa
;
2899 context
->prefetch_page
= paging64_prefetch_page
;
2900 context
->sync_page
= paging64_sync_page
;
2901 context
->invlpg
= paging64_invlpg
;
2902 context
->free
= paging_free
;
2903 context
->root_level
= level
;
2904 context
->shadow_root_level
= level
;
2905 context
->root_hpa
= INVALID_PAGE
;
2906 context
->direct_map
= false;
2910 static int paging64_init_context(struct kvm_vcpu
*vcpu
,
2911 struct kvm_mmu
*context
)
2913 return paging64_init_context_common(vcpu
, context
, PT64_ROOT_LEVEL
);
2916 static int paging32_init_context(struct kvm_vcpu
*vcpu
,
2917 struct kvm_mmu
*context
)
2919 context
->nx
= false;
2921 reset_rsvds_bits_mask(vcpu
, context
, PT32_ROOT_LEVEL
);
2923 context
->new_cr3
= paging_new_cr3
;
2924 context
->page_fault
= paging32_page_fault
;
2925 context
->gva_to_gpa
= paging32_gva_to_gpa
;
2926 context
->free
= paging_free
;
2927 context
->prefetch_page
= paging32_prefetch_page
;
2928 context
->sync_page
= paging32_sync_page
;
2929 context
->invlpg
= paging32_invlpg
;
2930 context
->root_level
= PT32_ROOT_LEVEL
;
2931 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
2932 context
->root_hpa
= INVALID_PAGE
;
2933 context
->direct_map
= false;
2937 static int paging32E_init_context(struct kvm_vcpu
*vcpu
,
2938 struct kvm_mmu
*context
)
2940 return paging64_init_context_common(vcpu
, context
, PT32E_ROOT_LEVEL
);
2943 static int init_kvm_tdp_mmu(struct kvm_vcpu
*vcpu
)
2945 struct kvm_mmu
*context
= vcpu
->arch
.walk_mmu
;
2947 context
->base_role
.word
= 0;
2948 context
->new_cr3
= nonpaging_new_cr3
;
2949 context
->page_fault
= tdp_page_fault
;
2950 context
->free
= nonpaging_free
;
2951 context
->prefetch_page
= nonpaging_prefetch_page
;
2952 context
->sync_page
= nonpaging_sync_page
;
2953 context
->invlpg
= nonpaging_invlpg
;
2954 context
->shadow_root_level
= kvm_x86_ops
->get_tdp_level();
2955 context
->root_hpa
= INVALID_PAGE
;
2956 context
->direct_map
= true;
2957 context
->set_cr3
= kvm_x86_ops
->set_tdp_cr3
;
2958 context
->get_cr3
= get_cr3
;
2959 context
->inject_page_fault
= kvm_inject_page_fault
;
2960 context
->nx
= is_nx(vcpu
);
2962 if (!is_paging(vcpu
)) {
2963 context
->nx
= false;
2964 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
2965 context
->root_level
= 0;
2966 } else if (is_long_mode(vcpu
)) {
2967 context
->nx
= is_nx(vcpu
);
2968 reset_rsvds_bits_mask(vcpu
, context
, PT64_ROOT_LEVEL
);
2969 context
->gva_to_gpa
= paging64_gva_to_gpa
;
2970 context
->root_level
= PT64_ROOT_LEVEL
;
2971 } else if (is_pae(vcpu
)) {
2972 context
->nx
= is_nx(vcpu
);
2973 reset_rsvds_bits_mask(vcpu
, context
, PT32E_ROOT_LEVEL
);
2974 context
->gva_to_gpa
= paging64_gva_to_gpa
;
2975 context
->root_level
= PT32E_ROOT_LEVEL
;
2977 context
->nx
= false;
2978 reset_rsvds_bits_mask(vcpu
, context
, PT32_ROOT_LEVEL
);
2979 context
->gva_to_gpa
= paging32_gva_to_gpa
;
2980 context
->root_level
= PT32_ROOT_LEVEL
;
2986 int kvm_init_shadow_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*context
)
2990 ASSERT(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
2992 if (!is_paging(vcpu
))
2993 r
= nonpaging_init_context(vcpu
, context
);
2994 else if (is_long_mode(vcpu
))
2995 r
= paging64_init_context(vcpu
, context
);
2996 else if (is_pae(vcpu
))
2997 r
= paging32E_init_context(vcpu
, context
);
2999 r
= paging32_init_context(vcpu
, context
);
3001 vcpu
->arch
.mmu
.base_role
.cr4_pae
= !!is_pae(vcpu
);
3002 vcpu
->arch
.mmu
.base_role
.cr0_wp
= is_write_protection(vcpu
);
3006 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu
);
3008 static int init_kvm_softmmu(struct kvm_vcpu
*vcpu
)
3010 int r
= kvm_init_shadow_mmu(vcpu
, vcpu
->arch
.walk_mmu
);
3012 vcpu
->arch
.walk_mmu
->set_cr3
= kvm_x86_ops
->set_cr3
;
3013 vcpu
->arch
.walk_mmu
->get_cr3
= get_cr3
;
3014 vcpu
->arch
.walk_mmu
->inject_page_fault
= kvm_inject_page_fault
;
3019 static int init_kvm_nested_mmu(struct kvm_vcpu
*vcpu
)
3021 struct kvm_mmu
*g_context
= &vcpu
->arch
.nested_mmu
;
3023 g_context
->get_cr3
= get_cr3
;
3024 g_context
->inject_page_fault
= kvm_inject_page_fault
;
3027 * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
3028 * translation of l2_gpa to l1_gpa addresses is done using the
3029 * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
3030 * functions between mmu and nested_mmu are swapped.
3032 if (!is_paging(vcpu
)) {
3033 g_context
->nx
= false;
3034 g_context
->root_level
= 0;
3035 g_context
->gva_to_gpa
= nonpaging_gva_to_gpa_nested
;
3036 } else if (is_long_mode(vcpu
)) {
3037 g_context
->nx
= is_nx(vcpu
);
3038 reset_rsvds_bits_mask(vcpu
, g_context
, PT64_ROOT_LEVEL
);
3039 g_context
->root_level
= PT64_ROOT_LEVEL
;
3040 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
3041 } else if (is_pae(vcpu
)) {
3042 g_context
->nx
= is_nx(vcpu
);
3043 reset_rsvds_bits_mask(vcpu
, g_context
, PT32E_ROOT_LEVEL
);
3044 g_context
->root_level
= PT32E_ROOT_LEVEL
;
3045 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
3047 g_context
->nx
= false;
3048 reset_rsvds_bits_mask(vcpu
, g_context
, PT32_ROOT_LEVEL
);
3049 g_context
->root_level
= PT32_ROOT_LEVEL
;
3050 g_context
->gva_to_gpa
= paging32_gva_to_gpa_nested
;
3056 static int init_kvm_mmu(struct kvm_vcpu
*vcpu
)
3058 vcpu
->arch
.update_pte
.pfn
= bad_pfn
;
3060 if (mmu_is_nested(vcpu
))
3061 return init_kvm_nested_mmu(vcpu
);
3062 else if (tdp_enabled
)
3063 return init_kvm_tdp_mmu(vcpu
);
3065 return init_kvm_softmmu(vcpu
);
3068 static void destroy_kvm_mmu(struct kvm_vcpu
*vcpu
)
3071 if (VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
3072 /* mmu.free() should set root_hpa = INVALID_PAGE */
3073 vcpu
->arch
.mmu
.free(vcpu
);
3076 int kvm_mmu_reset_context(struct kvm_vcpu
*vcpu
)
3078 destroy_kvm_mmu(vcpu
);
3079 return init_kvm_mmu(vcpu
);
3081 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context
);
3083 int kvm_mmu_load(struct kvm_vcpu
*vcpu
)
3087 r
= mmu_topup_memory_caches(vcpu
);
3090 r
= mmu_alloc_roots(vcpu
);
3091 spin_lock(&vcpu
->kvm
->mmu_lock
);
3092 mmu_sync_roots(vcpu
);
3093 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3096 /* set_cr3() should ensure TLB has been flushed */
3097 vcpu
->arch
.mmu
.set_cr3(vcpu
, vcpu
->arch
.mmu
.root_hpa
);
3101 EXPORT_SYMBOL_GPL(kvm_mmu_load
);
3103 void kvm_mmu_unload(struct kvm_vcpu
*vcpu
)
3105 mmu_free_roots(vcpu
);
3107 EXPORT_SYMBOL_GPL(kvm_mmu_unload
);
3109 static void mmu_pte_write_zap_pte(struct kvm_vcpu
*vcpu
,
3110 struct kvm_mmu_page
*sp
,
3114 struct kvm_mmu_page
*child
;
3117 if (is_shadow_present_pte(pte
)) {
3118 if (is_last_spte(pte
, sp
->role
.level
))
3119 drop_spte(vcpu
->kvm
, spte
, shadow_trap_nonpresent_pte
);
3121 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
3122 mmu_page_remove_parent_pte(child
, spte
);
3125 __set_spte(spte
, shadow_trap_nonpresent_pte
);
3126 if (is_large_pte(pte
))
3127 --vcpu
->kvm
->stat
.lpages
;
3130 static void mmu_pte_write_new_pte(struct kvm_vcpu
*vcpu
,
3131 struct kvm_mmu_page
*sp
,
3135 if (sp
->role
.level
!= PT_PAGE_TABLE_LEVEL
) {
3136 ++vcpu
->kvm
->stat
.mmu_pde_zapped
;
3140 ++vcpu
->kvm
->stat
.mmu_pte_updated
;
3141 if (!sp
->role
.cr4_pae
)
3142 paging32_update_pte(vcpu
, sp
, spte
, new);
3144 paging64_update_pte(vcpu
, sp
, spte
, new);
3147 static bool need_remote_flush(u64 old
, u64
new)
3149 if (!is_shadow_present_pte(old
))
3151 if (!is_shadow_present_pte(new))
3153 if ((old
^ new) & PT64_BASE_ADDR_MASK
)
3155 old
^= PT64_NX_MASK
;
3156 new ^= PT64_NX_MASK
;
3157 return (old
& ~new & PT64_PERM_MASK
) != 0;
3160 static void mmu_pte_write_flush_tlb(struct kvm_vcpu
*vcpu
, bool zap_page
,
3161 bool remote_flush
, bool local_flush
)
3167 kvm_flush_remote_tlbs(vcpu
->kvm
);
3168 else if (local_flush
)
3169 kvm_mmu_flush_tlb(vcpu
);
3172 static bool last_updated_pte_accessed(struct kvm_vcpu
*vcpu
)
3174 u64
*spte
= vcpu
->arch
.last_pte_updated
;
3176 return !!(spte
&& (*spte
& shadow_accessed_mask
));
3179 static void mmu_guess_page_from_pte_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3185 if (!is_present_gpte(gpte
))
3187 gfn
= (gpte
& PT64_BASE_ADDR_MASK
) >> PAGE_SHIFT
;
3189 vcpu
->arch
.update_pte
.mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
3191 pfn
= gfn_to_pfn(vcpu
->kvm
, gfn
);
3193 if (is_error_pfn(pfn
)) {
3194 kvm_release_pfn_clean(pfn
);
3197 vcpu
->arch
.update_pte
.gfn
= gfn
;
3198 vcpu
->arch
.update_pte
.pfn
= pfn
;
3201 static void kvm_mmu_access_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
3203 u64
*spte
= vcpu
->arch
.last_pte_updated
;
3206 && vcpu
->arch
.last_pte_gfn
== gfn
3207 && shadow_accessed_mask
3208 && !(*spte
& shadow_accessed_mask
)
3209 && is_shadow_present_pte(*spte
))
3210 set_bit(PT_ACCESSED_SHIFT
, (unsigned long *)spte
);
3213 void kvm_mmu_pte_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3214 const u8
*new, int bytes
,
3215 bool guest_initiated
)
3217 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
3218 union kvm_mmu_page_role mask
= { .word
= 0 };
3219 struct kvm_mmu_page
*sp
;
3220 struct hlist_node
*node
;
3221 LIST_HEAD(invalid_list
);
3224 unsigned offset
= offset_in_page(gpa
);
3226 unsigned page_offset
;
3227 unsigned misaligned
;
3234 bool remote_flush
, local_flush
, zap_page
;
3236 zap_page
= remote_flush
= local_flush
= false;
3238 pgprintk("%s: gpa %llx bytes %d\n", __func__
, gpa
, bytes
);
3240 invlpg_counter
= atomic_read(&vcpu
->kvm
->arch
.invlpg_counter
);
3243 * Assume that the pte write on a page table of the same type
3244 * as the current vcpu paging mode. This is nearly always true
3245 * (might be false while changing modes). Note it is verified later
3248 if ((is_pae(vcpu
) && bytes
== 4) || !new) {
3249 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
3254 r
= kvm_read_guest(vcpu
->kvm
, gpa
, &gentry
, min(bytes
, 8));
3257 new = (const u8
*)&gentry
;
3262 gentry
= *(const u32
*)new;
3265 gentry
= *(const u64
*)new;
3272 mmu_guess_page_from_pte_write(vcpu
, gpa
, gentry
);
3273 spin_lock(&vcpu
->kvm
->mmu_lock
);
3274 if (atomic_read(&vcpu
->kvm
->arch
.invlpg_counter
) != invlpg_counter
)
3276 kvm_mmu_access_page(vcpu
, gfn
);
3277 kvm_mmu_free_some_pages(vcpu
);
3278 ++vcpu
->kvm
->stat
.mmu_pte_write
;
3279 trace_kvm_mmu_audit(vcpu
, AUDIT_PRE_PTE_WRITE
);
3280 if (guest_initiated
) {
3281 if (gfn
== vcpu
->arch
.last_pt_write_gfn
3282 && !last_updated_pte_accessed(vcpu
)) {
3283 ++vcpu
->arch
.last_pt_write_count
;
3284 if (vcpu
->arch
.last_pt_write_count
>= 3)
3287 vcpu
->arch
.last_pt_write_gfn
= gfn
;
3288 vcpu
->arch
.last_pt_write_count
= 1;
3289 vcpu
->arch
.last_pte_updated
= NULL
;
3293 mask
.cr0_wp
= mask
.cr4_pae
= mask
.nxe
= 1;
3294 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, sp
, gfn
, node
) {
3295 pte_size
= sp
->role
.cr4_pae
? 8 : 4;
3296 misaligned
= (offset
^ (offset
+ bytes
- 1)) & ~(pte_size
- 1);
3297 misaligned
|= bytes
< 4;
3298 if (misaligned
|| flooded
) {
3300 * Misaligned accesses are too much trouble to fix
3301 * up; also, they usually indicate a page is not used
3304 * If we're seeing too many writes to a page,
3305 * it may no longer be a page table, or we may be
3306 * forking, in which case it is better to unmap the
3309 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
3310 gpa
, bytes
, sp
->role
.word
);
3311 zap_page
|= !!kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
3313 ++vcpu
->kvm
->stat
.mmu_flooded
;
3316 page_offset
= offset
;
3317 level
= sp
->role
.level
;
3319 if (!sp
->role
.cr4_pae
) {
3320 page_offset
<<= 1; /* 32->64 */
3322 * A 32-bit pde maps 4MB while the shadow pdes map
3323 * only 2MB. So we need to double the offset again
3324 * and zap two pdes instead of one.
3326 if (level
== PT32_ROOT_LEVEL
) {
3327 page_offset
&= ~7; /* kill rounding error */
3331 quadrant
= page_offset
>> PAGE_SHIFT
;
3332 page_offset
&= ~PAGE_MASK
;
3333 if (quadrant
!= sp
->role
.quadrant
)
3337 spte
= &sp
->spt
[page_offset
/ sizeof(*spte
)];
3340 mmu_pte_write_zap_pte(vcpu
, sp
, spte
);
3342 !((sp
->role
.word
^ vcpu
->arch
.mmu
.base_role
.word
)
3344 mmu_pte_write_new_pte(vcpu
, sp
, spte
, &gentry
);
3345 if (!remote_flush
&& need_remote_flush(entry
, *spte
))
3346 remote_flush
= true;
3350 mmu_pte_write_flush_tlb(vcpu
, zap_page
, remote_flush
, local_flush
);
3351 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
3352 trace_kvm_mmu_audit(vcpu
, AUDIT_POST_PTE_WRITE
);
3353 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3354 if (!is_error_pfn(vcpu
->arch
.update_pte
.pfn
)) {
3355 kvm_release_pfn_clean(vcpu
->arch
.update_pte
.pfn
);
3356 vcpu
->arch
.update_pte
.pfn
= bad_pfn
;
3360 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu
*vcpu
, gva_t gva
)
3365 if (vcpu
->arch
.mmu
.direct_map
)
3368 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, gva
, NULL
);
3370 spin_lock(&vcpu
->kvm
->mmu_lock
);
3371 r
= kvm_mmu_unprotect_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
3372 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3375 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt
);
3377 void __kvm_mmu_free_some_pages(struct kvm_vcpu
*vcpu
)
3379 LIST_HEAD(invalid_list
);
3381 while (kvm_mmu_available_pages(vcpu
->kvm
) < KVM_REFILL_PAGES
&&
3382 !list_empty(&vcpu
->kvm
->arch
.active_mmu_pages
)) {
3383 struct kvm_mmu_page
*sp
;
3385 sp
= container_of(vcpu
->kvm
->arch
.active_mmu_pages
.prev
,
3386 struct kvm_mmu_page
, link
);
3387 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, &invalid_list
);
3388 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
3389 ++vcpu
->kvm
->stat
.mmu_recycled
;
3393 int kvm_mmu_page_fault(struct kvm_vcpu
*vcpu
, gva_t cr2
, u32 error_code
,
3394 void *insn
, int insn_len
)
3397 enum emulation_result er
;
3399 r
= vcpu
->arch
.mmu
.page_fault(vcpu
, cr2
, error_code
, false);
3408 r
= mmu_topup_memory_caches(vcpu
);
3412 er
= x86_emulate_instruction(vcpu
, cr2
, 0, insn
, insn_len
);
3417 case EMULATE_DO_MMIO
:
3418 ++vcpu
->stat
.mmio_exits
;
3428 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault
);
3430 void kvm_mmu_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
3432 vcpu
->arch
.mmu
.invlpg(vcpu
, gva
);
3433 kvm_mmu_flush_tlb(vcpu
);
3434 ++vcpu
->stat
.invlpg
;
3436 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg
);
3438 void kvm_enable_tdp(void)
3442 EXPORT_SYMBOL_GPL(kvm_enable_tdp
);
3444 void kvm_disable_tdp(void)
3446 tdp_enabled
= false;
3448 EXPORT_SYMBOL_GPL(kvm_disable_tdp
);
3450 static void free_mmu_pages(struct kvm_vcpu
*vcpu
)
3452 free_page((unsigned long)vcpu
->arch
.mmu
.pae_root
);
3453 if (vcpu
->arch
.mmu
.lm_root
!= NULL
)
3454 free_page((unsigned long)vcpu
->arch
.mmu
.lm_root
);
3457 static int alloc_mmu_pages(struct kvm_vcpu
*vcpu
)
3465 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
3466 * Therefore we need to allocate shadow page tables in the first
3467 * 4GB of memory, which happens to fit the DMA32 zone.
3469 page
= alloc_page(GFP_KERNEL
| __GFP_DMA32
);
3473 vcpu
->arch
.mmu
.pae_root
= page_address(page
);
3474 for (i
= 0; i
< 4; ++i
)
3475 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
3480 int kvm_mmu_create(struct kvm_vcpu
*vcpu
)
3483 ASSERT(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3485 return alloc_mmu_pages(vcpu
);
3488 int kvm_mmu_setup(struct kvm_vcpu
*vcpu
)
3491 ASSERT(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3493 return init_kvm_mmu(vcpu
);
3496 void kvm_mmu_slot_remove_write_access(struct kvm
*kvm
, int slot
)
3498 struct kvm_mmu_page
*sp
;
3500 list_for_each_entry(sp
, &kvm
->arch
.active_mmu_pages
, link
) {
3504 if (!test_bit(slot
, sp
->slot_bitmap
))
3507 if (sp
->role
.level
!= PT_PAGE_TABLE_LEVEL
)
3511 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
3513 if (is_writable_pte(pt
[i
]))
3514 update_spte(&pt
[i
], pt
[i
] & ~PT_WRITABLE_MASK
);
3516 kvm_flush_remote_tlbs(kvm
);
3519 void kvm_mmu_zap_all(struct kvm
*kvm
)
3521 struct kvm_mmu_page
*sp
, *node
;
3522 LIST_HEAD(invalid_list
);
3524 spin_lock(&kvm
->mmu_lock
);
3526 list_for_each_entry_safe(sp
, node
, &kvm
->arch
.active_mmu_pages
, link
)
3527 if (kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
))
3530 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
3531 spin_unlock(&kvm
->mmu_lock
);
3534 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm
*kvm
,
3535 struct list_head
*invalid_list
)
3537 struct kvm_mmu_page
*page
;
3539 page
= container_of(kvm
->arch
.active_mmu_pages
.prev
,
3540 struct kvm_mmu_page
, link
);
3541 return kvm_mmu_prepare_zap_page(kvm
, page
, invalid_list
);
3544 static int mmu_shrink(struct shrinker
*shrink
, int nr_to_scan
, gfp_t gfp_mask
)
3547 struct kvm
*kvm_freed
= NULL
;
3549 if (nr_to_scan
== 0)
3552 spin_lock(&kvm_lock
);
3554 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
3555 int idx
, freed_pages
;
3556 LIST_HEAD(invalid_list
);
3558 idx
= srcu_read_lock(&kvm
->srcu
);
3559 spin_lock(&kvm
->mmu_lock
);
3560 if (!kvm_freed
&& nr_to_scan
> 0 &&
3561 kvm
->arch
.n_used_mmu_pages
> 0) {
3562 freed_pages
= kvm_mmu_remove_some_alloc_mmu_pages(kvm
,
3568 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
3569 spin_unlock(&kvm
->mmu_lock
);
3570 srcu_read_unlock(&kvm
->srcu
, idx
);
3573 list_move_tail(&kvm_freed
->vm_list
, &vm_list
);
3575 spin_unlock(&kvm_lock
);
3578 return percpu_counter_read_positive(&kvm_total_used_mmu_pages
);
3581 static struct shrinker mmu_shrinker
= {
3582 .shrink
= mmu_shrink
,
3583 .seeks
= DEFAULT_SEEKS
* 10,
3586 static void mmu_destroy_caches(void)
3588 if (pte_chain_cache
)
3589 kmem_cache_destroy(pte_chain_cache
);
3590 if (rmap_desc_cache
)
3591 kmem_cache_destroy(rmap_desc_cache
);
3592 if (mmu_page_header_cache
)
3593 kmem_cache_destroy(mmu_page_header_cache
);
3596 int kvm_mmu_module_init(void)
3598 pte_chain_cache
= kmem_cache_create("kvm_pte_chain",
3599 sizeof(struct kvm_pte_chain
),
3601 if (!pte_chain_cache
)
3603 rmap_desc_cache
= kmem_cache_create("kvm_rmap_desc",
3604 sizeof(struct kvm_rmap_desc
),
3606 if (!rmap_desc_cache
)
3609 mmu_page_header_cache
= kmem_cache_create("kvm_mmu_page_header",
3610 sizeof(struct kvm_mmu_page
),
3612 if (!mmu_page_header_cache
)
3615 if (percpu_counter_init(&kvm_total_used_mmu_pages
, 0))
3618 register_shrinker(&mmu_shrinker
);
3623 mmu_destroy_caches();
3628 * Caculate mmu pages needed for kvm.
3630 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm
*kvm
)
3633 unsigned int nr_mmu_pages
;
3634 unsigned int nr_pages
= 0;
3635 struct kvm_memslots
*slots
;
3637 slots
= kvm_memslots(kvm
);
3639 for (i
= 0; i
< slots
->nmemslots
; i
++)
3640 nr_pages
+= slots
->memslots
[i
].npages
;
3642 nr_mmu_pages
= nr_pages
* KVM_PERMILLE_MMU_PAGES
/ 1000;
3643 nr_mmu_pages
= max(nr_mmu_pages
,
3644 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES
);
3646 return nr_mmu_pages
;
3649 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer
*buffer
,
3652 if (len
> buffer
->len
)
3657 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer
*buffer
,
3662 ret
= pv_mmu_peek_buffer(buffer
, len
);
3667 buffer
->processed
+= len
;
3671 static int kvm_pv_mmu_write(struct kvm_vcpu
*vcpu
,
3672 gpa_t addr
, gpa_t value
)
3677 if (!is_long_mode(vcpu
) && !is_pae(vcpu
))
3680 r
= mmu_topup_memory_caches(vcpu
);
3684 if (!emulator_write_phys(vcpu
, addr
, &value
, bytes
))
3690 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu
*vcpu
)
3692 (void)kvm_set_cr3(vcpu
, kvm_read_cr3(vcpu
));
3696 static int kvm_pv_mmu_release_pt(struct kvm_vcpu
*vcpu
, gpa_t addr
)
3698 spin_lock(&vcpu
->kvm
->mmu_lock
);
3699 mmu_unshadow(vcpu
->kvm
, addr
>> PAGE_SHIFT
);
3700 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3704 static int kvm_pv_mmu_op_one(struct kvm_vcpu
*vcpu
,
3705 struct kvm_pv_mmu_op_buffer
*buffer
)
3707 struct kvm_mmu_op_header
*header
;
3709 header
= pv_mmu_peek_buffer(buffer
, sizeof *header
);
3712 switch (header
->op
) {
3713 case KVM_MMU_OP_WRITE_PTE
: {
3714 struct kvm_mmu_op_write_pte
*wpte
;
3716 wpte
= pv_mmu_read_buffer(buffer
, sizeof *wpte
);
3719 return kvm_pv_mmu_write(vcpu
, wpte
->pte_phys
,
3722 case KVM_MMU_OP_FLUSH_TLB
: {
3723 struct kvm_mmu_op_flush_tlb
*ftlb
;
3725 ftlb
= pv_mmu_read_buffer(buffer
, sizeof *ftlb
);
3728 return kvm_pv_mmu_flush_tlb(vcpu
);
3730 case KVM_MMU_OP_RELEASE_PT
: {
3731 struct kvm_mmu_op_release_pt
*rpt
;
3733 rpt
= pv_mmu_read_buffer(buffer
, sizeof *rpt
);
3736 return kvm_pv_mmu_release_pt(vcpu
, rpt
->pt_phys
);
3742 int kvm_pv_mmu_op(struct kvm_vcpu
*vcpu
, unsigned long bytes
,
3743 gpa_t addr
, unsigned long *ret
)
3746 struct kvm_pv_mmu_op_buffer
*buffer
= &vcpu
->arch
.mmu_op_buffer
;
3748 buffer
->ptr
= buffer
->buf
;
3749 buffer
->len
= min_t(unsigned long, bytes
, sizeof buffer
->buf
);
3750 buffer
->processed
= 0;
3752 r
= kvm_read_guest(vcpu
->kvm
, addr
, buffer
->buf
, buffer
->len
);
3756 while (buffer
->len
) {
3757 r
= kvm_pv_mmu_op_one(vcpu
, buffer
);
3766 *ret
= buffer
->processed
;
3770 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu
*vcpu
, u64 addr
, u64 sptes
[4])
3772 struct kvm_shadow_walk_iterator iterator
;
3775 spin_lock(&vcpu
->kvm
->mmu_lock
);
3776 for_each_shadow_entry(vcpu
, addr
, iterator
) {
3777 sptes
[iterator
.level
-1] = *iterator
.sptep
;
3779 if (!is_shadow_present_pte(*iterator
.sptep
))
3782 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3786 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy
);
3788 void kvm_mmu_destroy(struct kvm_vcpu
*vcpu
)
3792 destroy_kvm_mmu(vcpu
);
3793 free_mmu_pages(vcpu
);
3794 mmu_free_memory_caches(vcpu
);
3797 #ifdef CONFIG_KVM_MMU_AUDIT
3798 #include "mmu_audit.c"
3800 static void mmu_audit_disable(void) { }
3803 void kvm_mmu_module_exit(void)
3805 mmu_destroy_caches();
3806 percpu_counter_destroy(&kvm_total_used_mmu_pages
);
3807 unregister_shrinker(&mmu_shrinker
);
3808 mmu_audit_disable();