2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
24 #include "kvm_cache_regs.h"
27 #include <linux/kvm_host.h>
28 #include <linux/types.h>
29 #include <linux/string.h>
31 #include <linux/highmem.h>
32 #include <linux/module.h>
33 #include <linux/swap.h>
34 #include <linux/hugetlb.h>
35 #include <linux/compiler.h>
36 #include <linux/srcu.h>
37 #include <linux/slab.h>
38 #include <linux/uaccess.h>
41 #include <asm/cmpxchg.h>
46 * When setting this variable to true it enables Two-Dimensional-Paging
47 * where the hardware walks 2 page tables:
48 * 1. the guest-virtual to guest-physical
49 * 2. while doing 1. it walks guest-physical to host-physical
50 * If the hardware supports that we don't need to do shadow paging.
52 bool tdp_enabled
= false;
56 AUDIT_POST_PAGE_FAULT
,
67 module_param(dbg
, bool, 0644);
69 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
70 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
71 #define MMU_WARN_ON(x) WARN_ON(x)
73 #define pgprintk(x...) do { } while (0)
74 #define rmap_printk(x...) do { } while (0)
75 #define MMU_WARN_ON(x) do { } while (0)
78 #define PTE_PREFETCH_NUM 8
80 #define PT_FIRST_AVAIL_BITS_SHIFT 10
81 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
83 #define PT64_LEVEL_BITS 9
85 #define PT64_LEVEL_SHIFT(level) \
86 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
88 #define PT64_INDEX(address, level)\
89 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
92 #define PT32_LEVEL_BITS 10
94 #define PT32_LEVEL_SHIFT(level) \
95 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
97 #define PT32_LVL_OFFSET_MASK(level) \
98 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
99 * PT32_LEVEL_BITS))) - 1))
101 #define PT32_INDEX(address, level)\
102 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
105 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
106 #define PT64_DIR_BASE_ADDR_MASK \
107 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
108 #define PT64_LVL_ADDR_MASK(level) \
109 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
110 * PT64_LEVEL_BITS))) - 1))
111 #define PT64_LVL_OFFSET_MASK(level) \
112 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
113 * PT64_LEVEL_BITS))) - 1))
115 #define PT32_BASE_ADDR_MASK PAGE_MASK
116 #define PT32_DIR_BASE_ADDR_MASK \
117 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
118 #define PT32_LVL_ADDR_MASK(level) \
119 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
120 * PT32_LEVEL_BITS))) - 1))
122 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | shadow_user_mask \
123 | shadow_x_mask | shadow_nx_mask)
125 #define ACC_EXEC_MASK 1
126 #define ACC_WRITE_MASK PT_WRITABLE_MASK
127 #define ACC_USER_MASK PT_USER_MASK
128 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
130 #include <trace/events/kvm.h>
132 #define CREATE_TRACE_POINTS
133 #include "mmutrace.h"
135 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
136 #define SPTE_MMU_WRITEABLE (1ULL << (PT_FIRST_AVAIL_BITS_SHIFT + 1))
138 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
140 /* make pte_list_desc fit well in cache line */
141 #define PTE_LIST_EXT 3
143 struct pte_list_desc
{
144 u64
*sptes
[PTE_LIST_EXT
];
145 struct pte_list_desc
*more
;
148 struct kvm_shadow_walk_iterator
{
156 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
157 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
158 shadow_walk_okay(&(_walker)); \
159 shadow_walk_next(&(_walker)))
161 #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \
162 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
163 shadow_walk_okay(&(_walker)) && \
164 ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \
165 __shadow_walk_next(&(_walker), spte))
167 static struct kmem_cache
*pte_list_desc_cache
;
168 static struct kmem_cache
*mmu_page_header_cache
;
169 static struct percpu_counter kvm_total_used_mmu_pages
;
171 static u64 __read_mostly shadow_nx_mask
;
172 static u64 __read_mostly shadow_x_mask
; /* mutual exclusive with nx_mask */
173 static u64 __read_mostly shadow_user_mask
;
174 static u64 __read_mostly shadow_accessed_mask
;
175 static u64 __read_mostly shadow_dirty_mask
;
176 static u64 __read_mostly shadow_mmio_mask
;
178 static void mmu_spte_set(u64
*sptep
, u64 spte
);
179 static void mmu_free_roots(struct kvm_vcpu
*vcpu
);
181 void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask
)
183 shadow_mmio_mask
= mmio_mask
;
185 EXPORT_SYMBOL_GPL(kvm_mmu_set_mmio_spte_mask
);
188 * the low bit of the generation number is always presumed to be zero.
189 * This disables mmio caching during memslot updates. The concept is
190 * similar to a seqcount but instead of retrying the access we just punt
191 * and ignore the cache.
193 * spte bits 3-11 are used as bits 1-9 of the generation number,
194 * the bits 52-61 are used as bits 10-19 of the generation number.
196 #define MMIO_SPTE_GEN_LOW_SHIFT 2
197 #define MMIO_SPTE_GEN_HIGH_SHIFT 52
199 #define MMIO_GEN_SHIFT 20
200 #define MMIO_GEN_LOW_SHIFT 10
201 #define MMIO_GEN_LOW_MASK ((1 << MMIO_GEN_LOW_SHIFT) - 2)
202 #define MMIO_GEN_MASK ((1 << MMIO_GEN_SHIFT) - 1)
204 static u64
generation_mmio_spte_mask(unsigned int gen
)
208 WARN_ON(gen
& ~MMIO_GEN_MASK
);
210 mask
= (gen
& MMIO_GEN_LOW_MASK
) << MMIO_SPTE_GEN_LOW_SHIFT
;
211 mask
|= ((u64
)gen
>> MMIO_GEN_LOW_SHIFT
) << MMIO_SPTE_GEN_HIGH_SHIFT
;
215 static unsigned int get_mmio_spte_generation(u64 spte
)
219 spte
&= ~shadow_mmio_mask
;
221 gen
= (spte
>> MMIO_SPTE_GEN_LOW_SHIFT
) & MMIO_GEN_LOW_MASK
;
222 gen
|= (spte
>> MMIO_SPTE_GEN_HIGH_SHIFT
) << MMIO_GEN_LOW_SHIFT
;
226 static unsigned int kvm_current_mmio_generation(struct kvm_vcpu
*vcpu
)
228 return kvm_vcpu_memslots(vcpu
)->generation
& MMIO_GEN_MASK
;
231 static void mark_mmio_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
, u64 gfn
,
234 unsigned int gen
= kvm_current_mmio_generation(vcpu
);
235 u64 mask
= generation_mmio_spte_mask(gen
);
237 access
&= ACC_WRITE_MASK
| ACC_USER_MASK
;
238 mask
|= shadow_mmio_mask
| access
| gfn
<< PAGE_SHIFT
;
240 trace_mark_mmio_spte(sptep
, gfn
, access
, gen
);
241 mmu_spte_set(sptep
, mask
);
244 static bool is_mmio_spte(u64 spte
)
246 return (spte
& shadow_mmio_mask
) == shadow_mmio_mask
;
249 static gfn_t
get_mmio_spte_gfn(u64 spte
)
251 u64 mask
= generation_mmio_spte_mask(MMIO_GEN_MASK
) | shadow_mmio_mask
;
252 return (spte
& ~mask
) >> PAGE_SHIFT
;
255 static unsigned get_mmio_spte_access(u64 spte
)
257 u64 mask
= generation_mmio_spte_mask(MMIO_GEN_MASK
) | shadow_mmio_mask
;
258 return (spte
& ~mask
) & ~PAGE_MASK
;
261 static bool set_mmio_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
, gfn_t gfn
,
262 pfn_t pfn
, unsigned access
)
264 if (unlikely(is_noslot_pfn(pfn
))) {
265 mark_mmio_spte(vcpu
, sptep
, gfn
, access
);
272 static bool check_mmio_spte(struct kvm_vcpu
*vcpu
, u64 spte
)
274 unsigned int kvm_gen
, spte_gen
;
276 kvm_gen
= kvm_current_mmio_generation(vcpu
);
277 spte_gen
= get_mmio_spte_generation(spte
);
279 trace_check_mmio_spte(spte
, kvm_gen
, spte_gen
);
280 return likely(kvm_gen
== spte_gen
);
283 void kvm_mmu_set_mask_ptes(u64 user_mask
, u64 accessed_mask
,
284 u64 dirty_mask
, u64 nx_mask
, u64 x_mask
)
286 shadow_user_mask
= user_mask
;
287 shadow_accessed_mask
= accessed_mask
;
288 shadow_dirty_mask
= dirty_mask
;
289 shadow_nx_mask
= nx_mask
;
290 shadow_x_mask
= x_mask
;
292 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes
);
294 static int is_cpuid_PSE36(void)
299 static int is_nx(struct kvm_vcpu
*vcpu
)
301 return vcpu
->arch
.efer
& EFER_NX
;
304 static int is_shadow_present_pte(u64 pte
)
306 return pte
& PT_PRESENT_MASK
&& !is_mmio_spte(pte
);
309 static int is_large_pte(u64 pte
)
311 return pte
& PT_PAGE_SIZE_MASK
;
314 static int is_rmap_spte(u64 pte
)
316 return is_shadow_present_pte(pte
);
319 static int is_last_spte(u64 pte
, int level
)
321 if (level
== PT_PAGE_TABLE_LEVEL
)
323 if (is_large_pte(pte
))
328 static pfn_t
spte_to_pfn(u64 pte
)
330 return (pte
& PT64_BASE_ADDR_MASK
) >> PAGE_SHIFT
;
333 static gfn_t
pse36_gfn_delta(u32 gpte
)
335 int shift
= 32 - PT32_DIR_PSE36_SHIFT
- PAGE_SHIFT
;
337 return (gpte
& PT32_DIR_PSE36_MASK
) << shift
;
341 static void __set_spte(u64
*sptep
, u64 spte
)
346 static void __update_clear_spte_fast(u64
*sptep
, u64 spte
)
351 static u64
__update_clear_spte_slow(u64
*sptep
, u64 spte
)
353 return xchg(sptep
, spte
);
356 static u64
__get_spte_lockless(u64
*sptep
)
358 return ACCESS_ONCE(*sptep
);
361 static bool __check_direct_spte_mmio_pf(u64 spte
)
363 /* It is valid if the spte is zapped. */
375 static void count_spte_clear(u64
*sptep
, u64 spte
)
377 struct kvm_mmu_page
*sp
= page_header(__pa(sptep
));
379 if (is_shadow_present_pte(spte
))
382 /* Ensure the spte is completely set before we increase the count */
384 sp
->clear_spte_count
++;
387 static void __set_spte(u64
*sptep
, u64 spte
)
389 union split_spte
*ssptep
, sspte
;
391 ssptep
= (union split_spte
*)sptep
;
392 sspte
= (union split_spte
)spte
;
394 ssptep
->spte_high
= sspte
.spte_high
;
397 * If we map the spte from nonpresent to present, We should store
398 * the high bits firstly, then set present bit, so cpu can not
399 * fetch this spte while we are setting the spte.
403 ssptep
->spte_low
= sspte
.spte_low
;
406 static void __update_clear_spte_fast(u64
*sptep
, u64 spte
)
408 union split_spte
*ssptep
, sspte
;
410 ssptep
= (union split_spte
*)sptep
;
411 sspte
= (union split_spte
)spte
;
413 ssptep
->spte_low
= sspte
.spte_low
;
416 * If we map the spte from present to nonpresent, we should clear
417 * present bit firstly to avoid vcpu fetch the old high bits.
421 ssptep
->spte_high
= sspte
.spte_high
;
422 count_spte_clear(sptep
, spte
);
425 static u64
__update_clear_spte_slow(u64
*sptep
, u64 spte
)
427 union split_spte
*ssptep
, sspte
, orig
;
429 ssptep
= (union split_spte
*)sptep
;
430 sspte
= (union split_spte
)spte
;
432 /* xchg acts as a barrier before the setting of the high bits */
433 orig
.spte_low
= xchg(&ssptep
->spte_low
, sspte
.spte_low
);
434 orig
.spte_high
= ssptep
->spte_high
;
435 ssptep
->spte_high
= sspte
.spte_high
;
436 count_spte_clear(sptep
, spte
);
442 * The idea using the light way get the spte on x86_32 guest is from
443 * gup_get_pte(arch/x86/mm/gup.c).
445 * An spte tlb flush may be pending, because kvm_set_pte_rmapp
446 * coalesces them and we are running out of the MMU lock. Therefore
447 * we need to protect against in-progress updates of the spte.
449 * Reading the spte while an update is in progress may get the old value
450 * for the high part of the spte. The race is fine for a present->non-present
451 * change (because the high part of the spte is ignored for non-present spte),
452 * but for a present->present change we must reread the spte.
454 * All such changes are done in two steps (present->non-present and
455 * non-present->present), hence it is enough to count the number of
456 * present->non-present updates: if it changed while reading the spte,
457 * we might have hit the race. This is done using clear_spte_count.
459 static u64
__get_spte_lockless(u64
*sptep
)
461 struct kvm_mmu_page
*sp
= page_header(__pa(sptep
));
462 union split_spte spte
, *orig
= (union split_spte
*)sptep
;
466 count
= sp
->clear_spte_count
;
469 spte
.spte_low
= orig
->spte_low
;
472 spte
.spte_high
= orig
->spte_high
;
475 if (unlikely(spte
.spte_low
!= orig
->spte_low
||
476 count
!= sp
->clear_spte_count
))
482 static bool __check_direct_spte_mmio_pf(u64 spte
)
484 union split_spte sspte
= (union split_spte
)spte
;
485 u32 high_mmio_mask
= shadow_mmio_mask
>> 32;
487 /* It is valid if the spte is zapped. */
491 /* It is valid if the spte is being zapped. */
492 if (sspte
.spte_low
== 0ull &&
493 (sspte
.spte_high
& high_mmio_mask
) == high_mmio_mask
)
500 static bool spte_is_locklessly_modifiable(u64 spte
)
502 return (spte
& (SPTE_HOST_WRITEABLE
| SPTE_MMU_WRITEABLE
)) ==
503 (SPTE_HOST_WRITEABLE
| SPTE_MMU_WRITEABLE
);
506 static bool spte_has_volatile_bits(u64 spte
)
509 * Always atomicly update spte if it can be updated
510 * out of mmu-lock, it can ensure dirty bit is not lost,
511 * also, it can help us to get a stable is_writable_pte()
512 * to ensure tlb flush is not missed.
514 if (spte_is_locklessly_modifiable(spte
))
517 if (!shadow_accessed_mask
)
520 if (!is_shadow_present_pte(spte
))
523 if ((spte
& shadow_accessed_mask
) &&
524 (!is_writable_pte(spte
) || (spte
& shadow_dirty_mask
)))
530 static bool spte_is_bit_cleared(u64 old_spte
, u64 new_spte
, u64 bit_mask
)
532 return (old_spte
& bit_mask
) && !(new_spte
& bit_mask
);
535 static bool spte_is_bit_changed(u64 old_spte
, u64 new_spte
, u64 bit_mask
)
537 return (old_spte
& bit_mask
) != (new_spte
& bit_mask
);
540 /* Rules for using mmu_spte_set:
541 * Set the sptep from nonpresent to present.
542 * Note: the sptep being assigned *must* be either not present
543 * or in a state where the hardware will not attempt to update
546 static void mmu_spte_set(u64
*sptep
, u64 new_spte
)
548 WARN_ON(is_shadow_present_pte(*sptep
));
549 __set_spte(sptep
, new_spte
);
552 /* Rules for using mmu_spte_update:
553 * Update the state bits, it means the mapped pfn is not changged.
555 * Whenever we overwrite a writable spte with a read-only one we
556 * should flush remote TLBs. Otherwise rmap_write_protect
557 * will find a read-only spte, even though the writable spte
558 * might be cached on a CPU's TLB, the return value indicates this
561 static bool mmu_spte_update(u64
*sptep
, u64 new_spte
)
563 u64 old_spte
= *sptep
;
566 WARN_ON(!is_rmap_spte(new_spte
));
568 if (!is_shadow_present_pte(old_spte
)) {
569 mmu_spte_set(sptep
, new_spte
);
573 if (!spte_has_volatile_bits(old_spte
))
574 __update_clear_spte_fast(sptep
, new_spte
);
576 old_spte
= __update_clear_spte_slow(sptep
, new_spte
);
579 * For the spte updated out of mmu-lock is safe, since
580 * we always atomicly update it, see the comments in
581 * spte_has_volatile_bits().
583 if (spte_is_locklessly_modifiable(old_spte
) &&
584 !is_writable_pte(new_spte
))
587 if (!shadow_accessed_mask
)
591 * Flush TLB when accessed/dirty bits are changed in the page tables,
592 * to guarantee consistency between TLB and page tables.
594 if (spte_is_bit_changed(old_spte
, new_spte
,
595 shadow_accessed_mask
| shadow_dirty_mask
))
598 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_accessed_mask
))
599 kvm_set_pfn_accessed(spte_to_pfn(old_spte
));
600 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_dirty_mask
))
601 kvm_set_pfn_dirty(spte_to_pfn(old_spte
));
607 * Rules for using mmu_spte_clear_track_bits:
608 * It sets the sptep from present to nonpresent, and track the
609 * state bits, it is used to clear the last level sptep.
611 static int mmu_spte_clear_track_bits(u64
*sptep
)
614 u64 old_spte
= *sptep
;
616 if (!spte_has_volatile_bits(old_spte
))
617 __update_clear_spte_fast(sptep
, 0ull);
619 old_spte
= __update_clear_spte_slow(sptep
, 0ull);
621 if (!is_rmap_spte(old_spte
))
624 pfn
= spte_to_pfn(old_spte
);
627 * KVM does not hold the refcount of the page used by
628 * kvm mmu, before reclaiming the page, we should
629 * unmap it from mmu first.
631 WARN_ON(!kvm_is_reserved_pfn(pfn
) && !page_count(pfn_to_page(pfn
)));
633 if (!shadow_accessed_mask
|| old_spte
& shadow_accessed_mask
)
634 kvm_set_pfn_accessed(pfn
);
635 if (!shadow_dirty_mask
|| (old_spte
& shadow_dirty_mask
))
636 kvm_set_pfn_dirty(pfn
);
641 * Rules for using mmu_spte_clear_no_track:
642 * Directly clear spte without caring the state bits of sptep,
643 * it is used to set the upper level spte.
645 static void mmu_spte_clear_no_track(u64
*sptep
)
647 __update_clear_spte_fast(sptep
, 0ull);
650 static u64
mmu_spte_get_lockless(u64
*sptep
)
652 return __get_spte_lockless(sptep
);
655 static void walk_shadow_page_lockless_begin(struct kvm_vcpu
*vcpu
)
658 * Prevent page table teardown by making any free-er wait during
659 * kvm_flush_remote_tlbs() IPI to all active vcpus.
662 vcpu
->mode
= READING_SHADOW_PAGE_TABLES
;
664 * Make sure a following spte read is not reordered ahead of the write
670 static void walk_shadow_page_lockless_end(struct kvm_vcpu
*vcpu
)
673 * Make sure the write to vcpu->mode is not reordered in front of
674 * reads to sptes. If it does, kvm_commit_zap_page() can see us
675 * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
678 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
682 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache
*cache
,
683 struct kmem_cache
*base_cache
, int min
)
687 if (cache
->nobjs
>= min
)
689 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
690 obj
= kmem_cache_zalloc(base_cache
, GFP_KERNEL
);
693 cache
->objects
[cache
->nobjs
++] = obj
;
698 static int mmu_memory_cache_free_objects(struct kvm_mmu_memory_cache
*cache
)
703 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache
*mc
,
704 struct kmem_cache
*cache
)
707 kmem_cache_free(cache
, mc
->objects
[--mc
->nobjs
]);
710 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache
*cache
,
715 if (cache
->nobjs
>= min
)
717 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
718 page
= (void *)__get_free_page(GFP_KERNEL
);
721 cache
->objects
[cache
->nobjs
++] = page
;
726 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache
*mc
)
729 free_page((unsigned long)mc
->objects
[--mc
->nobjs
]);
732 static int mmu_topup_memory_caches(struct kvm_vcpu
*vcpu
)
736 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_pte_list_desc_cache
,
737 pte_list_desc_cache
, 8 + PTE_PREFETCH_NUM
);
740 r
= mmu_topup_memory_cache_page(&vcpu
->arch
.mmu_page_cache
, 8);
743 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
744 mmu_page_header_cache
, 4);
749 static void mmu_free_memory_caches(struct kvm_vcpu
*vcpu
)
751 mmu_free_memory_cache(&vcpu
->arch
.mmu_pte_list_desc_cache
,
752 pte_list_desc_cache
);
753 mmu_free_memory_cache_page(&vcpu
->arch
.mmu_page_cache
);
754 mmu_free_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
755 mmu_page_header_cache
);
758 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache
*mc
)
763 p
= mc
->objects
[--mc
->nobjs
];
767 static struct pte_list_desc
*mmu_alloc_pte_list_desc(struct kvm_vcpu
*vcpu
)
769 return mmu_memory_cache_alloc(&vcpu
->arch
.mmu_pte_list_desc_cache
);
772 static void mmu_free_pte_list_desc(struct pte_list_desc
*pte_list_desc
)
774 kmem_cache_free(pte_list_desc_cache
, pte_list_desc
);
777 static gfn_t
kvm_mmu_page_get_gfn(struct kvm_mmu_page
*sp
, int index
)
779 if (!sp
->role
.direct
)
780 return sp
->gfns
[index
];
782 return sp
->gfn
+ (index
<< ((sp
->role
.level
- 1) * PT64_LEVEL_BITS
));
785 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page
*sp
, int index
, gfn_t gfn
)
788 BUG_ON(gfn
!= kvm_mmu_page_get_gfn(sp
, index
));
790 sp
->gfns
[index
] = gfn
;
794 * Return the pointer to the large page information for a given gfn,
795 * handling slots that are not large page aligned.
797 static struct kvm_lpage_info
*lpage_info_slot(gfn_t gfn
,
798 struct kvm_memory_slot
*slot
,
803 idx
= gfn_to_index(gfn
, slot
->base_gfn
, level
);
804 return &slot
->arch
.lpage_info
[level
- 2][idx
];
807 static void account_shadowed(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
809 struct kvm_memslots
*slots
;
810 struct kvm_memory_slot
*slot
;
811 struct kvm_lpage_info
*linfo
;
816 slots
= kvm_memslots_for_spte_role(kvm
, sp
->role
);
817 slot
= __gfn_to_memslot(slots
, gfn
);
818 for (i
= PT_DIRECTORY_LEVEL
; i
<= PT_MAX_HUGEPAGE_LEVEL
; ++i
) {
819 linfo
= lpage_info_slot(gfn
, slot
, i
);
820 linfo
->write_count
+= 1;
822 kvm
->arch
.indirect_shadow_pages
++;
825 static void unaccount_shadowed(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
827 struct kvm_memslots
*slots
;
828 struct kvm_memory_slot
*slot
;
829 struct kvm_lpage_info
*linfo
;
834 slots
= kvm_memslots_for_spte_role(kvm
, sp
->role
);
835 slot
= __gfn_to_memslot(slots
, gfn
);
836 for (i
= PT_DIRECTORY_LEVEL
; i
<= PT_MAX_HUGEPAGE_LEVEL
; ++i
) {
837 linfo
= lpage_info_slot(gfn
, slot
, i
);
838 linfo
->write_count
-= 1;
839 WARN_ON(linfo
->write_count
< 0);
841 kvm
->arch
.indirect_shadow_pages
--;
844 static int has_wrprotected_page(struct kvm_vcpu
*vcpu
,
848 struct kvm_memory_slot
*slot
;
849 struct kvm_lpage_info
*linfo
;
851 slot
= kvm_vcpu_gfn_to_memslot(vcpu
, gfn
);
853 linfo
= lpage_info_slot(gfn
, slot
, level
);
854 return linfo
->write_count
;
860 static int host_mapping_level(struct kvm
*kvm
, gfn_t gfn
)
862 unsigned long page_size
;
865 page_size
= kvm_host_page_size(kvm
, gfn
);
867 for (i
= PT_PAGE_TABLE_LEVEL
; i
<= PT_MAX_HUGEPAGE_LEVEL
; ++i
) {
868 if (page_size
>= KVM_HPAGE_SIZE(i
))
877 static struct kvm_memory_slot
*
878 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
881 struct kvm_memory_slot
*slot
;
883 slot
= kvm_vcpu_gfn_to_memslot(vcpu
, gfn
);
884 if (!slot
|| slot
->flags
& KVM_MEMSLOT_INVALID
||
885 (no_dirty_log
&& slot
->dirty_bitmap
))
891 static bool mapping_level_dirty_bitmap(struct kvm_vcpu
*vcpu
, gfn_t large_gfn
)
893 return !gfn_to_memslot_dirty_bitmap(vcpu
, large_gfn
, true);
896 static int mapping_level(struct kvm_vcpu
*vcpu
, gfn_t large_gfn
)
898 int host_level
, level
, max_level
;
900 host_level
= host_mapping_level(vcpu
->kvm
, large_gfn
);
902 if (host_level
== PT_PAGE_TABLE_LEVEL
)
905 max_level
= min(kvm_x86_ops
->get_lpage_level(), host_level
);
907 for (level
= PT_DIRECTORY_LEVEL
; level
<= max_level
; ++level
)
908 if (has_wrprotected_page(vcpu
, large_gfn
, level
))
915 * Pte mapping structures:
917 * If pte_list bit zero is zero, then pte_list point to the spte.
919 * If pte_list bit zero is one, (then pte_list & ~1) points to a struct
920 * pte_list_desc containing more mappings.
922 * Returns the number of pte entries before the spte was added or zero if
923 * the spte was not added.
926 static int pte_list_add(struct kvm_vcpu
*vcpu
, u64
*spte
,
927 unsigned long *pte_list
)
929 struct pte_list_desc
*desc
;
933 rmap_printk("pte_list_add: %p %llx 0->1\n", spte
, *spte
);
934 *pte_list
= (unsigned long)spte
;
935 } else if (!(*pte_list
& 1)) {
936 rmap_printk("pte_list_add: %p %llx 1->many\n", spte
, *spte
);
937 desc
= mmu_alloc_pte_list_desc(vcpu
);
938 desc
->sptes
[0] = (u64
*)*pte_list
;
939 desc
->sptes
[1] = spte
;
940 *pte_list
= (unsigned long)desc
| 1;
943 rmap_printk("pte_list_add: %p %llx many->many\n", spte
, *spte
);
944 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
945 while (desc
->sptes
[PTE_LIST_EXT
-1] && desc
->more
) {
947 count
+= PTE_LIST_EXT
;
949 if (desc
->sptes
[PTE_LIST_EXT
-1]) {
950 desc
->more
= mmu_alloc_pte_list_desc(vcpu
);
953 for (i
= 0; desc
->sptes
[i
]; ++i
)
955 desc
->sptes
[i
] = spte
;
961 pte_list_desc_remove_entry(unsigned long *pte_list
, struct pte_list_desc
*desc
,
962 int i
, struct pte_list_desc
*prev_desc
)
966 for (j
= PTE_LIST_EXT
- 1; !desc
->sptes
[j
] && j
> i
; --j
)
968 desc
->sptes
[i
] = desc
->sptes
[j
];
969 desc
->sptes
[j
] = NULL
;
972 if (!prev_desc
&& !desc
->more
)
973 *pte_list
= (unsigned long)desc
->sptes
[0];
976 prev_desc
->more
= desc
->more
;
978 *pte_list
= (unsigned long)desc
->more
| 1;
979 mmu_free_pte_list_desc(desc
);
982 static void pte_list_remove(u64
*spte
, unsigned long *pte_list
)
984 struct pte_list_desc
*desc
;
985 struct pte_list_desc
*prev_desc
;
989 printk(KERN_ERR
"pte_list_remove: %p 0->BUG\n", spte
);
991 } else if (!(*pte_list
& 1)) {
992 rmap_printk("pte_list_remove: %p 1->0\n", spte
);
993 if ((u64
*)*pte_list
!= spte
) {
994 printk(KERN_ERR
"pte_list_remove: %p 1->BUG\n", spte
);
999 rmap_printk("pte_list_remove: %p many->many\n", spte
);
1000 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
1003 for (i
= 0; i
< PTE_LIST_EXT
&& desc
->sptes
[i
]; ++i
)
1004 if (desc
->sptes
[i
] == spte
) {
1005 pte_list_desc_remove_entry(pte_list
,
1013 pr_err("pte_list_remove: %p many->many\n", spte
);
1018 typedef void (*pte_list_walk_fn
) (u64
*spte
);
1019 static void pte_list_walk(unsigned long *pte_list
, pte_list_walk_fn fn
)
1021 struct pte_list_desc
*desc
;
1027 if (!(*pte_list
& 1))
1028 return fn((u64
*)*pte_list
);
1030 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
1032 for (i
= 0; i
< PTE_LIST_EXT
&& desc
->sptes
[i
]; ++i
)
1038 static unsigned long *__gfn_to_rmap(gfn_t gfn
, int level
,
1039 struct kvm_memory_slot
*slot
)
1043 idx
= gfn_to_index(gfn
, slot
->base_gfn
, level
);
1044 return &slot
->arch
.rmap
[level
- PT_PAGE_TABLE_LEVEL
][idx
];
1048 * Take gfn and return the reverse mapping to it.
1050 static unsigned long *gfn_to_rmap(struct kvm
*kvm
, gfn_t gfn
, struct kvm_mmu_page
*sp
)
1052 struct kvm_memslots
*slots
;
1053 struct kvm_memory_slot
*slot
;
1055 slots
= kvm_memslots_for_spte_role(kvm
, sp
->role
);
1056 slot
= __gfn_to_memslot(slots
, gfn
);
1057 return __gfn_to_rmap(gfn
, sp
->role
.level
, slot
);
1060 static bool rmap_can_add(struct kvm_vcpu
*vcpu
)
1062 struct kvm_mmu_memory_cache
*cache
;
1064 cache
= &vcpu
->arch
.mmu_pte_list_desc_cache
;
1065 return mmu_memory_cache_free_objects(cache
);
1068 static int rmap_add(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
1070 struct kvm_mmu_page
*sp
;
1071 unsigned long *rmapp
;
1073 sp
= page_header(__pa(spte
));
1074 kvm_mmu_page_set_gfn(sp
, spte
- sp
->spt
, gfn
);
1075 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
);
1076 return pte_list_add(vcpu
, spte
, rmapp
);
1079 static void rmap_remove(struct kvm
*kvm
, u64
*spte
)
1081 struct kvm_mmu_page
*sp
;
1083 unsigned long *rmapp
;
1085 sp
= page_header(__pa(spte
));
1086 gfn
= kvm_mmu_page_get_gfn(sp
, spte
- sp
->spt
);
1087 rmapp
= gfn_to_rmap(kvm
, gfn
, sp
);
1088 pte_list_remove(spte
, rmapp
);
1092 * Used by the following functions to iterate through the sptes linked by a
1093 * rmap. All fields are private and not assumed to be used outside.
1095 struct rmap_iterator
{
1096 /* private fields */
1097 struct pte_list_desc
*desc
; /* holds the sptep if not NULL */
1098 int pos
; /* index of the sptep */
1102 * Iteration must be started by this function. This should also be used after
1103 * removing/dropping sptes from the rmap link because in such cases the
1104 * information in the itererator may not be valid.
1106 * Returns sptep if found, NULL otherwise.
1108 static u64
*rmap_get_first(unsigned long rmap
, struct rmap_iterator
*iter
)
1118 iter
->desc
= (struct pte_list_desc
*)(rmap
& ~1ul);
1120 return iter
->desc
->sptes
[iter
->pos
];
1124 * Must be used with a valid iterator: e.g. after rmap_get_first().
1126 * Returns sptep if found, NULL otherwise.
1128 static u64
*rmap_get_next(struct rmap_iterator
*iter
)
1131 if (iter
->pos
< PTE_LIST_EXT
- 1) {
1135 sptep
= iter
->desc
->sptes
[iter
->pos
];
1140 iter
->desc
= iter
->desc
->more
;
1144 /* desc->sptes[0] cannot be NULL */
1145 return iter
->desc
->sptes
[iter
->pos
];
1152 #define for_each_rmap_spte(_rmap_, _iter_, _spte_) \
1153 for (_spte_ = rmap_get_first(*_rmap_, _iter_); \
1154 _spte_ && ({BUG_ON(!is_shadow_present_pte(*_spte_)); 1;}); \
1155 _spte_ = rmap_get_next(_iter_))
1157 static void drop_spte(struct kvm
*kvm
, u64
*sptep
)
1159 if (mmu_spte_clear_track_bits(sptep
))
1160 rmap_remove(kvm
, sptep
);
1164 static bool __drop_large_spte(struct kvm
*kvm
, u64
*sptep
)
1166 if (is_large_pte(*sptep
)) {
1167 WARN_ON(page_header(__pa(sptep
))->role
.level
==
1168 PT_PAGE_TABLE_LEVEL
);
1169 drop_spte(kvm
, sptep
);
1177 static void drop_large_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
)
1179 if (__drop_large_spte(vcpu
->kvm
, sptep
))
1180 kvm_flush_remote_tlbs(vcpu
->kvm
);
1184 * Write-protect on the specified @sptep, @pt_protect indicates whether
1185 * spte write-protection is caused by protecting shadow page table.
1187 * Note: write protection is difference between dirty logging and spte
1189 * - for dirty logging, the spte can be set to writable at anytime if
1190 * its dirty bitmap is properly set.
1191 * - for spte protection, the spte can be writable only after unsync-ing
1194 * Return true if tlb need be flushed.
1196 static bool spte_write_protect(struct kvm
*kvm
, u64
*sptep
, bool pt_protect
)
1200 if (!is_writable_pte(spte
) &&
1201 !(pt_protect
&& spte_is_locklessly_modifiable(spte
)))
1204 rmap_printk("rmap_write_protect: spte %p %llx\n", sptep
, *sptep
);
1207 spte
&= ~SPTE_MMU_WRITEABLE
;
1208 spte
= spte
& ~PT_WRITABLE_MASK
;
1210 return mmu_spte_update(sptep
, spte
);
1213 static bool __rmap_write_protect(struct kvm
*kvm
, unsigned long *rmapp
,
1217 struct rmap_iterator iter
;
1220 for_each_rmap_spte(rmapp
, &iter
, sptep
)
1221 flush
|= spte_write_protect(kvm
, sptep
, pt_protect
);
1226 static bool spte_clear_dirty(struct kvm
*kvm
, u64
*sptep
)
1230 rmap_printk("rmap_clear_dirty: spte %p %llx\n", sptep
, *sptep
);
1232 spte
&= ~shadow_dirty_mask
;
1234 return mmu_spte_update(sptep
, spte
);
1237 static bool __rmap_clear_dirty(struct kvm
*kvm
, unsigned long *rmapp
)
1240 struct rmap_iterator iter
;
1243 for_each_rmap_spte(rmapp
, &iter
, sptep
)
1244 flush
|= spte_clear_dirty(kvm
, sptep
);
1249 static bool spte_set_dirty(struct kvm
*kvm
, u64
*sptep
)
1253 rmap_printk("rmap_set_dirty: spte %p %llx\n", sptep
, *sptep
);
1255 spte
|= shadow_dirty_mask
;
1257 return mmu_spte_update(sptep
, spte
);
1260 static bool __rmap_set_dirty(struct kvm
*kvm
, unsigned long *rmapp
)
1263 struct rmap_iterator iter
;
1266 for_each_rmap_spte(rmapp
, &iter
, sptep
)
1267 flush
|= spte_set_dirty(kvm
, sptep
);
1273 * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1274 * @kvm: kvm instance
1275 * @slot: slot to protect
1276 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1277 * @mask: indicates which pages we should protect
1279 * Used when we do not need to care about huge page mappings: e.g. during dirty
1280 * logging we do not have any such mappings.
1282 static void kvm_mmu_write_protect_pt_masked(struct kvm
*kvm
,
1283 struct kvm_memory_slot
*slot
,
1284 gfn_t gfn_offset
, unsigned long mask
)
1286 unsigned long *rmapp
;
1289 rmapp
= __gfn_to_rmap(slot
->base_gfn
+ gfn_offset
+ __ffs(mask
),
1290 PT_PAGE_TABLE_LEVEL
, slot
);
1291 __rmap_write_protect(kvm
, rmapp
, false);
1293 /* clear the first set bit */
1299 * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages
1300 * @kvm: kvm instance
1301 * @slot: slot to clear D-bit
1302 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1303 * @mask: indicates which pages we should clear D-bit
1305 * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap.
1307 void kvm_mmu_clear_dirty_pt_masked(struct kvm
*kvm
,
1308 struct kvm_memory_slot
*slot
,
1309 gfn_t gfn_offset
, unsigned long mask
)
1311 unsigned long *rmapp
;
1314 rmapp
= __gfn_to_rmap(slot
->base_gfn
+ gfn_offset
+ __ffs(mask
),
1315 PT_PAGE_TABLE_LEVEL
, slot
);
1316 __rmap_clear_dirty(kvm
, rmapp
);
1318 /* clear the first set bit */
1322 EXPORT_SYMBOL_GPL(kvm_mmu_clear_dirty_pt_masked
);
1325 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1328 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1329 * enable dirty logging for them.
1331 * Used when we do not need to care about huge page mappings: e.g. during dirty
1332 * logging we do not have any such mappings.
1334 void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm
*kvm
,
1335 struct kvm_memory_slot
*slot
,
1336 gfn_t gfn_offset
, unsigned long mask
)
1338 if (kvm_x86_ops
->enable_log_dirty_pt_masked
)
1339 kvm_x86_ops
->enable_log_dirty_pt_masked(kvm
, slot
, gfn_offset
,
1342 kvm_mmu_write_protect_pt_masked(kvm
, slot
, gfn_offset
, mask
);
1345 static bool rmap_write_protect(struct kvm_vcpu
*vcpu
, u64 gfn
)
1347 struct kvm_memory_slot
*slot
;
1348 unsigned long *rmapp
;
1350 bool write_protected
= false;
1352 slot
= kvm_vcpu_gfn_to_memslot(vcpu
, gfn
);
1354 for (i
= PT_PAGE_TABLE_LEVEL
; i
<= PT_MAX_HUGEPAGE_LEVEL
; ++i
) {
1355 rmapp
= __gfn_to_rmap(gfn
, i
, slot
);
1356 write_protected
|= __rmap_write_protect(vcpu
->kvm
, rmapp
, true);
1359 return write_protected
;
1362 static bool kvm_zap_rmapp(struct kvm
*kvm
, unsigned long *rmapp
)
1365 struct rmap_iterator iter
;
1368 while ((sptep
= rmap_get_first(*rmapp
, &iter
))) {
1369 BUG_ON(!(*sptep
& PT_PRESENT_MASK
));
1370 rmap_printk("%s: spte %p %llx.\n", __func__
, sptep
, *sptep
);
1372 drop_spte(kvm
, sptep
);
1379 static int kvm_unmap_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1380 struct kvm_memory_slot
*slot
, gfn_t gfn
, int level
,
1383 return kvm_zap_rmapp(kvm
, rmapp
);
1386 static int kvm_set_pte_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1387 struct kvm_memory_slot
*slot
, gfn_t gfn
, int level
,
1391 struct rmap_iterator iter
;
1394 pte_t
*ptep
= (pte_t
*)data
;
1397 WARN_ON(pte_huge(*ptep
));
1398 new_pfn
= pte_pfn(*ptep
);
1401 for_each_rmap_spte(rmapp
, &iter
, sptep
) {
1402 rmap_printk("kvm_set_pte_rmapp: spte %p %llx gfn %llx (%d)\n",
1403 sptep
, *sptep
, gfn
, level
);
1407 if (pte_write(*ptep
)) {
1408 drop_spte(kvm
, sptep
);
1411 new_spte
= *sptep
& ~PT64_BASE_ADDR_MASK
;
1412 new_spte
|= (u64
)new_pfn
<< PAGE_SHIFT
;
1414 new_spte
&= ~PT_WRITABLE_MASK
;
1415 new_spte
&= ~SPTE_HOST_WRITEABLE
;
1416 new_spte
&= ~shadow_accessed_mask
;
1418 mmu_spte_clear_track_bits(sptep
);
1419 mmu_spte_set(sptep
, new_spte
);
1424 kvm_flush_remote_tlbs(kvm
);
1429 struct slot_rmap_walk_iterator
{
1431 struct kvm_memory_slot
*slot
;
1437 /* output fields. */
1439 unsigned long *rmap
;
1442 /* private field. */
1443 unsigned long *end_rmap
;
1447 rmap_walk_init_level(struct slot_rmap_walk_iterator
*iterator
, int level
)
1449 iterator
->level
= level
;
1450 iterator
->gfn
= iterator
->start_gfn
;
1451 iterator
->rmap
= __gfn_to_rmap(iterator
->gfn
, level
, iterator
->slot
);
1452 iterator
->end_rmap
= __gfn_to_rmap(iterator
->end_gfn
, level
,
1457 slot_rmap_walk_init(struct slot_rmap_walk_iterator
*iterator
,
1458 struct kvm_memory_slot
*slot
, int start_level
,
1459 int end_level
, gfn_t start_gfn
, gfn_t end_gfn
)
1461 iterator
->slot
= slot
;
1462 iterator
->start_level
= start_level
;
1463 iterator
->end_level
= end_level
;
1464 iterator
->start_gfn
= start_gfn
;
1465 iterator
->end_gfn
= end_gfn
;
1467 rmap_walk_init_level(iterator
, iterator
->start_level
);
1470 static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator
*iterator
)
1472 return !!iterator
->rmap
;
1475 static void slot_rmap_walk_next(struct slot_rmap_walk_iterator
*iterator
)
1477 if (++iterator
->rmap
<= iterator
->end_rmap
) {
1478 iterator
->gfn
+= (1UL << KVM_HPAGE_GFN_SHIFT(iterator
->level
));
1482 if (++iterator
->level
> iterator
->end_level
) {
1483 iterator
->rmap
= NULL
;
1487 rmap_walk_init_level(iterator
, iterator
->level
);
1490 #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \
1491 _start_gfn, _end_gfn, _iter_) \
1492 for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \
1493 _end_level_, _start_gfn, _end_gfn); \
1494 slot_rmap_walk_okay(_iter_); \
1495 slot_rmap_walk_next(_iter_))
1497 static int kvm_handle_hva_range(struct kvm
*kvm
,
1498 unsigned long start
,
1501 int (*handler
)(struct kvm
*kvm
,
1502 unsigned long *rmapp
,
1503 struct kvm_memory_slot
*slot
,
1506 unsigned long data
))
1508 struct kvm_memslots
*slots
;
1509 struct kvm_memory_slot
*memslot
;
1510 struct slot_rmap_walk_iterator iterator
;
1514 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
1515 slots
= __kvm_memslots(kvm
, i
);
1516 kvm_for_each_memslot(memslot
, slots
) {
1517 unsigned long hva_start
, hva_end
;
1518 gfn_t gfn_start
, gfn_end
;
1520 hva_start
= max(start
, memslot
->userspace_addr
);
1521 hva_end
= min(end
, memslot
->userspace_addr
+
1522 (memslot
->npages
<< PAGE_SHIFT
));
1523 if (hva_start
>= hva_end
)
1526 * {gfn(page) | page intersects with [hva_start, hva_end)} =
1527 * {gfn_start, gfn_start+1, ..., gfn_end-1}.
1529 gfn_start
= hva_to_gfn_memslot(hva_start
, memslot
);
1530 gfn_end
= hva_to_gfn_memslot(hva_end
+ PAGE_SIZE
- 1, memslot
);
1532 for_each_slot_rmap_range(memslot
, PT_PAGE_TABLE_LEVEL
,
1533 PT_MAX_HUGEPAGE_LEVEL
,
1534 gfn_start
, gfn_end
- 1,
1536 ret
|= handler(kvm
, iterator
.rmap
, memslot
,
1537 iterator
.gfn
, iterator
.level
, data
);
1544 static int kvm_handle_hva(struct kvm
*kvm
, unsigned long hva
,
1546 int (*handler
)(struct kvm
*kvm
, unsigned long *rmapp
,
1547 struct kvm_memory_slot
*slot
,
1548 gfn_t gfn
, int level
,
1549 unsigned long data
))
1551 return kvm_handle_hva_range(kvm
, hva
, hva
+ 1, data
, handler
);
1554 int kvm_unmap_hva(struct kvm
*kvm
, unsigned long hva
)
1556 return kvm_handle_hva(kvm
, hva
, 0, kvm_unmap_rmapp
);
1559 int kvm_unmap_hva_range(struct kvm
*kvm
, unsigned long start
, unsigned long end
)
1561 return kvm_handle_hva_range(kvm
, start
, end
, 0, kvm_unmap_rmapp
);
1564 void kvm_set_spte_hva(struct kvm
*kvm
, unsigned long hva
, pte_t pte
)
1566 kvm_handle_hva(kvm
, hva
, (unsigned long)&pte
, kvm_set_pte_rmapp
);
1569 static int kvm_age_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1570 struct kvm_memory_slot
*slot
, gfn_t gfn
, int level
,
1574 struct rmap_iterator
uninitialized_var(iter
);
1577 BUG_ON(!shadow_accessed_mask
);
1579 for_each_rmap_spte(rmapp
, &iter
, sptep
)
1580 if (*sptep
& shadow_accessed_mask
) {
1582 clear_bit((ffs(shadow_accessed_mask
) - 1),
1583 (unsigned long *)sptep
);
1586 trace_kvm_age_page(gfn
, level
, slot
, young
);
1590 static int kvm_test_age_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1591 struct kvm_memory_slot
*slot
, gfn_t gfn
,
1592 int level
, unsigned long data
)
1595 struct rmap_iterator iter
;
1599 * If there's no access bit in the secondary pte set by the
1600 * hardware it's up to gup-fast/gup to set the access bit in
1601 * the primary pte or in the page structure.
1603 if (!shadow_accessed_mask
)
1606 for_each_rmap_spte(rmapp
, &iter
, sptep
)
1607 if (*sptep
& shadow_accessed_mask
) {
1615 #define RMAP_RECYCLE_THRESHOLD 1000
1617 static void rmap_recycle(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
1619 unsigned long *rmapp
;
1620 struct kvm_mmu_page
*sp
;
1622 sp
= page_header(__pa(spte
));
1624 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
);
1626 kvm_unmap_rmapp(vcpu
->kvm
, rmapp
, NULL
, gfn
, sp
->role
.level
, 0);
1627 kvm_flush_remote_tlbs(vcpu
->kvm
);
1630 int kvm_age_hva(struct kvm
*kvm
, unsigned long start
, unsigned long end
)
1633 * In case of absence of EPT Access and Dirty Bits supports,
1634 * emulate the accessed bit for EPT, by checking if this page has
1635 * an EPT mapping, and clearing it if it does. On the next access,
1636 * a new EPT mapping will be established.
1637 * This has some overhead, but not as much as the cost of swapping
1638 * out actively used pages or breaking up actively used hugepages.
1640 if (!shadow_accessed_mask
) {
1642 * We are holding the kvm->mmu_lock, and we are blowing up
1643 * shadow PTEs. MMU notifier consumers need to be kept at bay.
1644 * This is correct as long as we don't decouple the mmu_lock
1645 * protected regions (like invalidate_range_start|end does).
1647 kvm
->mmu_notifier_seq
++;
1648 return kvm_handle_hva_range(kvm
, start
, end
, 0,
1652 return kvm_handle_hva_range(kvm
, start
, end
, 0, kvm_age_rmapp
);
1655 int kvm_test_age_hva(struct kvm
*kvm
, unsigned long hva
)
1657 return kvm_handle_hva(kvm
, hva
, 0, kvm_test_age_rmapp
);
1661 static int is_empty_shadow_page(u64
*spt
)
1666 for (pos
= spt
, end
= pos
+ PAGE_SIZE
/ sizeof(u64
); pos
!= end
; pos
++)
1667 if (is_shadow_present_pte(*pos
)) {
1668 printk(KERN_ERR
"%s: %p %llx\n", __func__
,
1677 * This value is the sum of all of the kvm instances's
1678 * kvm->arch.n_used_mmu_pages values. We need a global,
1679 * aggregate version in order to make the slab shrinker
1682 static inline void kvm_mod_used_mmu_pages(struct kvm
*kvm
, int nr
)
1684 kvm
->arch
.n_used_mmu_pages
+= nr
;
1685 percpu_counter_add(&kvm_total_used_mmu_pages
, nr
);
1688 static void kvm_mmu_free_page(struct kvm_mmu_page
*sp
)
1690 MMU_WARN_ON(!is_empty_shadow_page(sp
->spt
));
1691 hlist_del(&sp
->hash_link
);
1692 list_del(&sp
->link
);
1693 free_page((unsigned long)sp
->spt
);
1694 if (!sp
->role
.direct
)
1695 free_page((unsigned long)sp
->gfns
);
1696 kmem_cache_free(mmu_page_header_cache
, sp
);
1699 static unsigned kvm_page_table_hashfn(gfn_t gfn
)
1701 return gfn
& ((1 << KVM_MMU_HASH_SHIFT
) - 1);
1704 static void mmu_page_add_parent_pte(struct kvm_vcpu
*vcpu
,
1705 struct kvm_mmu_page
*sp
, u64
*parent_pte
)
1710 pte_list_add(vcpu
, parent_pte
, &sp
->parent_ptes
);
1713 static void mmu_page_remove_parent_pte(struct kvm_mmu_page
*sp
,
1716 pte_list_remove(parent_pte
, &sp
->parent_ptes
);
1719 static void drop_parent_pte(struct kvm_mmu_page
*sp
,
1722 mmu_page_remove_parent_pte(sp
, parent_pte
);
1723 mmu_spte_clear_no_track(parent_pte
);
1726 static struct kvm_mmu_page
*kvm_mmu_alloc_page(struct kvm_vcpu
*vcpu
,
1727 u64
*parent_pte
, int direct
)
1729 struct kvm_mmu_page
*sp
;
1731 sp
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_header_cache
);
1732 sp
->spt
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
);
1734 sp
->gfns
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
);
1735 set_page_private(virt_to_page(sp
->spt
), (unsigned long)sp
);
1738 * The active_mmu_pages list is the FIFO list, do not move the
1739 * page until it is zapped. kvm_zap_obsolete_pages depends on
1740 * this feature. See the comments in kvm_zap_obsolete_pages().
1742 list_add(&sp
->link
, &vcpu
->kvm
->arch
.active_mmu_pages
);
1743 sp
->parent_ptes
= 0;
1744 mmu_page_add_parent_pte(vcpu
, sp
, parent_pte
);
1745 kvm_mod_used_mmu_pages(vcpu
->kvm
, +1);
1749 static void mark_unsync(u64
*spte
);
1750 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page
*sp
)
1752 pte_list_walk(&sp
->parent_ptes
, mark_unsync
);
1755 static void mark_unsync(u64
*spte
)
1757 struct kvm_mmu_page
*sp
;
1760 sp
= page_header(__pa(spte
));
1761 index
= spte
- sp
->spt
;
1762 if (__test_and_set_bit(index
, sp
->unsync_child_bitmap
))
1764 if (sp
->unsync_children
++)
1766 kvm_mmu_mark_parents_unsync(sp
);
1769 static int nonpaging_sync_page(struct kvm_vcpu
*vcpu
,
1770 struct kvm_mmu_page
*sp
)
1775 static void nonpaging_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
1779 static void nonpaging_update_pte(struct kvm_vcpu
*vcpu
,
1780 struct kvm_mmu_page
*sp
, u64
*spte
,
1786 #define KVM_PAGE_ARRAY_NR 16
1788 struct kvm_mmu_pages
{
1789 struct mmu_page_and_offset
{
1790 struct kvm_mmu_page
*sp
;
1792 } page
[KVM_PAGE_ARRAY_NR
];
1796 static int mmu_pages_add(struct kvm_mmu_pages
*pvec
, struct kvm_mmu_page
*sp
,
1802 for (i
=0; i
< pvec
->nr
; i
++)
1803 if (pvec
->page
[i
].sp
== sp
)
1806 pvec
->page
[pvec
->nr
].sp
= sp
;
1807 pvec
->page
[pvec
->nr
].idx
= idx
;
1809 return (pvec
->nr
== KVM_PAGE_ARRAY_NR
);
1812 static int __mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1813 struct kvm_mmu_pages
*pvec
)
1815 int i
, ret
, nr_unsync_leaf
= 0;
1817 for_each_set_bit(i
, sp
->unsync_child_bitmap
, 512) {
1818 struct kvm_mmu_page
*child
;
1819 u64 ent
= sp
->spt
[i
];
1821 if (!is_shadow_present_pte(ent
) || is_large_pte(ent
))
1822 goto clear_child_bitmap
;
1824 child
= page_header(ent
& PT64_BASE_ADDR_MASK
);
1826 if (child
->unsync_children
) {
1827 if (mmu_pages_add(pvec
, child
, i
))
1830 ret
= __mmu_unsync_walk(child
, pvec
);
1832 goto clear_child_bitmap
;
1834 nr_unsync_leaf
+= ret
;
1837 } else if (child
->unsync
) {
1839 if (mmu_pages_add(pvec
, child
, i
))
1842 goto clear_child_bitmap
;
1847 __clear_bit(i
, sp
->unsync_child_bitmap
);
1848 sp
->unsync_children
--;
1849 WARN_ON((int)sp
->unsync_children
< 0);
1853 return nr_unsync_leaf
;
1856 static int mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1857 struct kvm_mmu_pages
*pvec
)
1859 if (!sp
->unsync_children
)
1862 mmu_pages_add(pvec
, sp
, 0);
1863 return __mmu_unsync_walk(sp
, pvec
);
1866 static void kvm_unlink_unsync_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1868 WARN_ON(!sp
->unsync
);
1869 trace_kvm_mmu_sync_page(sp
);
1871 --kvm
->stat
.mmu_unsync
;
1874 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
1875 struct list_head
*invalid_list
);
1876 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
1877 struct list_head
*invalid_list
);
1880 * NOTE: we should pay more attention on the zapped-obsolete page
1881 * (is_obsolete_sp(sp) && sp->role.invalid) when you do hash list walk
1882 * since it has been deleted from active_mmu_pages but still can be found
1885 * for_each_gfn_indirect_valid_sp has skipped that kind of page and
1886 * kvm_mmu_get_page(), the only user of for_each_gfn_sp(), has skipped
1887 * all the obsolete pages.
1889 #define for_each_gfn_sp(_kvm, _sp, _gfn) \
1890 hlist_for_each_entry(_sp, \
1891 &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)], hash_link) \
1892 if ((_sp)->gfn != (_gfn)) {} else
1894 #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \
1895 for_each_gfn_sp(_kvm, _sp, _gfn) \
1896 if ((_sp)->role.direct || (_sp)->role.invalid) {} else
1898 /* @sp->gfn should be write-protected at the call site */
1899 static int __kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1900 struct list_head
*invalid_list
, bool clear_unsync
)
1902 if (sp
->role
.cr4_pae
!= !!is_pae(vcpu
)) {
1903 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1908 kvm_unlink_unsync_page(vcpu
->kvm
, sp
);
1910 if (vcpu
->arch
.mmu
.sync_page(vcpu
, sp
)) {
1911 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1915 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
1919 static int kvm_sync_page_transient(struct kvm_vcpu
*vcpu
,
1920 struct kvm_mmu_page
*sp
)
1922 LIST_HEAD(invalid_list
);
1925 ret
= __kvm_sync_page(vcpu
, sp
, &invalid_list
, false);
1927 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1932 #ifdef CONFIG_KVM_MMU_AUDIT
1933 #include "mmu_audit.c"
1935 static void kvm_mmu_audit(struct kvm_vcpu
*vcpu
, int point
) { }
1936 static void mmu_audit_disable(void) { }
1939 static int kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1940 struct list_head
*invalid_list
)
1942 return __kvm_sync_page(vcpu
, sp
, invalid_list
, true);
1945 /* @gfn should be write-protected at the call site */
1946 static void kvm_sync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
1948 struct kvm_mmu_page
*s
;
1949 LIST_HEAD(invalid_list
);
1952 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
) {
1956 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
1957 kvm_unlink_unsync_page(vcpu
->kvm
, s
);
1958 if ((s
->role
.cr4_pae
!= !!is_pae(vcpu
)) ||
1959 (vcpu
->arch
.mmu
.sync_page(vcpu
, s
))) {
1960 kvm_mmu_prepare_zap_page(vcpu
->kvm
, s
, &invalid_list
);
1966 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1968 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
1971 struct mmu_page_path
{
1972 struct kvm_mmu_page
*parent
[PT64_ROOT_LEVEL
-1];
1973 unsigned int idx
[PT64_ROOT_LEVEL
-1];
1976 #define for_each_sp(pvec, sp, parents, i) \
1977 for (i = mmu_pages_next(&pvec, &parents, -1), \
1978 sp = pvec.page[i].sp; \
1979 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1980 i = mmu_pages_next(&pvec, &parents, i))
1982 static int mmu_pages_next(struct kvm_mmu_pages
*pvec
,
1983 struct mmu_page_path
*parents
,
1988 for (n
= i
+1; n
< pvec
->nr
; n
++) {
1989 struct kvm_mmu_page
*sp
= pvec
->page
[n
].sp
;
1991 if (sp
->role
.level
== PT_PAGE_TABLE_LEVEL
) {
1992 parents
->idx
[0] = pvec
->page
[n
].idx
;
1996 parents
->parent
[sp
->role
.level
-2] = sp
;
1997 parents
->idx
[sp
->role
.level
-1] = pvec
->page
[n
].idx
;
2003 static void mmu_pages_clear_parents(struct mmu_page_path
*parents
)
2005 struct kvm_mmu_page
*sp
;
2006 unsigned int level
= 0;
2009 unsigned int idx
= parents
->idx
[level
];
2011 sp
= parents
->parent
[level
];
2015 --sp
->unsync_children
;
2016 WARN_ON((int)sp
->unsync_children
< 0);
2017 __clear_bit(idx
, sp
->unsync_child_bitmap
);
2019 } while (level
< PT64_ROOT_LEVEL
-1 && !sp
->unsync_children
);
2022 static void kvm_mmu_pages_init(struct kvm_mmu_page
*parent
,
2023 struct mmu_page_path
*parents
,
2024 struct kvm_mmu_pages
*pvec
)
2026 parents
->parent
[parent
->role
.level
-1] = NULL
;
2030 static void mmu_sync_children(struct kvm_vcpu
*vcpu
,
2031 struct kvm_mmu_page
*parent
)
2034 struct kvm_mmu_page
*sp
;
2035 struct mmu_page_path parents
;
2036 struct kvm_mmu_pages pages
;
2037 LIST_HEAD(invalid_list
);
2039 kvm_mmu_pages_init(parent
, &parents
, &pages
);
2040 while (mmu_unsync_walk(parent
, &pages
)) {
2041 bool protected = false;
2043 for_each_sp(pages
, sp
, parents
, i
)
2044 protected |= rmap_write_protect(vcpu
, sp
->gfn
);
2047 kvm_flush_remote_tlbs(vcpu
->kvm
);
2049 for_each_sp(pages
, sp
, parents
, i
) {
2050 kvm_sync_page(vcpu
, sp
, &invalid_list
);
2051 mmu_pages_clear_parents(&parents
);
2053 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
2054 cond_resched_lock(&vcpu
->kvm
->mmu_lock
);
2055 kvm_mmu_pages_init(parent
, &parents
, &pages
);
2059 static void init_shadow_page_table(struct kvm_mmu_page
*sp
)
2063 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
2067 static void __clear_sp_write_flooding_count(struct kvm_mmu_page
*sp
)
2069 sp
->write_flooding_count
= 0;
2072 static void clear_sp_write_flooding_count(u64
*spte
)
2074 struct kvm_mmu_page
*sp
= page_header(__pa(spte
));
2076 __clear_sp_write_flooding_count(sp
);
2079 static bool is_obsolete_sp(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
2081 return unlikely(sp
->mmu_valid_gen
!= kvm
->arch
.mmu_valid_gen
);
2084 static struct kvm_mmu_page
*kvm_mmu_get_page(struct kvm_vcpu
*vcpu
,
2092 union kvm_mmu_page_role role
;
2094 struct kvm_mmu_page
*sp
;
2095 bool need_sync
= false;
2097 role
= vcpu
->arch
.mmu
.base_role
;
2099 role
.direct
= direct
;
2102 role
.access
= access
;
2103 if (!vcpu
->arch
.mmu
.direct_map
2104 && vcpu
->arch
.mmu
.root_level
<= PT32_ROOT_LEVEL
) {
2105 quadrant
= gaddr
>> (PAGE_SHIFT
+ (PT64_PT_BITS
* level
));
2106 quadrant
&= (1 << ((PT32_PT_BITS
- PT64_PT_BITS
) * level
)) - 1;
2107 role
.quadrant
= quadrant
;
2109 for_each_gfn_sp(vcpu
->kvm
, sp
, gfn
) {
2110 if (is_obsolete_sp(vcpu
->kvm
, sp
))
2113 if (!need_sync
&& sp
->unsync
)
2116 if (sp
->role
.word
!= role
.word
)
2119 if (sp
->unsync
&& kvm_sync_page_transient(vcpu
, sp
))
2122 mmu_page_add_parent_pte(vcpu
, sp
, parent_pte
);
2123 if (sp
->unsync_children
) {
2124 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
2125 kvm_mmu_mark_parents_unsync(sp
);
2126 } else if (sp
->unsync
)
2127 kvm_mmu_mark_parents_unsync(sp
);
2129 __clear_sp_write_flooding_count(sp
);
2130 trace_kvm_mmu_get_page(sp
, false);
2133 ++vcpu
->kvm
->stat
.mmu_cache_miss
;
2134 sp
= kvm_mmu_alloc_page(vcpu
, parent_pte
, direct
);
2139 hlist_add_head(&sp
->hash_link
,
2140 &vcpu
->kvm
->arch
.mmu_page_hash
[kvm_page_table_hashfn(gfn
)]);
2142 if (rmap_write_protect(vcpu
, gfn
))
2143 kvm_flush_remote_tlbs(vcpu
->kvm
);
2144 if (level
> PT_PAGE_TABLE_LEVEL
&& need_sync
)
2145 kvm_sync_pages(vcpu
, gfn
);
2147 account_shadowed(vcpu
->kvm
, sp
);
2149 sp
->mmu_valid_gen
= vcpu
->kvm
->arch
.mmu_valid_gen
;
2150 init_shadow_page_table(sp
);
2151 trace_kvm_mmu_get_page(sp
, true);
2155 static void shadow_walk_init(struct kvm_shadow_walk_iterator
*iterator
,
2156 struct kvm_vcpu
*vcpu
, u64 addr
)
2158 iterator
->addr
= addr
;
2159 iterator
->shadow_addr
= vcpu
->arch
.mmu
.root_hpa
;
2160 iterator
->level
= vcpu
->arch
.mmu
.shadow_root_level
;
2162 if (iterator
->level
== PT64_ROOT_LEVEL
&&
2163 vcpu
->arch
.mmu
.root_level
< PT64_ROOT_LEVEL
&&
2164 !vcpu
->arch
.mmu
.direct_map
)
2167 if (iterator
->level
== PT32E_ROOT_LEVEL
) {
2168 iterator
->shadow_addr
2169 = vcpu
->arch
.mmu
.pae_root
[(addr
>> 30) & 3];
2170 iterator
->shadow_addr
&= PT64_BASE_ADDR_MASK
;
2172 if (!iterator
->shadow_addr
)
2173 iterator
->level
= 0;
2177 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator
*iterator
)
2179 if (iterator
->level
< PT_PAGE_TABLE_LEVEL
)
2182 iterator
->index
= SHADOW_PT_INDEX(iterator
->addr
, iterator
->level
);
2183 iterator
->sptep
= ((u64
*)__va(iterator
->shadow_addr
)) + iterator
->index
;
2187 static void __shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
,
2190 if (is_last_spte(spte
, iterator
->level
)) {
2191 iterator
->level
= 0;
2195 iterator
->shadow_addr
= spte
& PT64_BASE_ADDR_MASK
;
2199 static void shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
)
2201 return __shadow_walk_next(iterator
, *iterator
->sptep
);
2204 static void link_shadow_page(u64
*sptep
, struct kvm_mmu_page
*sp
, bool accessed
)
2208 BUILD_BUG_ON(VMX_EPT_READABLE_MASK
!= PT_PRESENT_MASK
||
2209 VMX_EPT_WRITABLE_MASK
!= PT_WRITABLE_MASK
);
2211 spte
= __pa(sp
->spt
) | PT_PRESENT_MASK
| PT_WRITABLE_MASK
|
2212 shadow_user_mask
| shadow_x_mask
;
2215 spte
|= shadow_accessed_mask
;
2217 mmu_spte_set(sptep
, spte
);
2220 static void validate_direct_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2221 unsigned direct_access
)
2223 if (is_shadow_present_pte(*sptep
) && !is_large_pte(*sptep
)) {
2224 struct kvm_mmu_page
*child
;
2227 * For the direct sp, if the guest pte's dirty bit
2228 * changed form clean to dirty, it will corrupt the
2229 * sp's access: allow writable in the read-only sp,
2230 * so we should update the spte at this point to get
2231 * a new sp with the correct access.
2233 child
= page_header(*sptep
& PT64_BASE_ADDR_MASK
);
2234 if (child
->role
.access
== direct_access
)
2237 drop_parent_pte(child
, sptep
);
2238 kvm_flush_remote_tlbs(vcpu
->kvm
);
2242 static bool mmu_page_zap_pte(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
2246 struct kvm_mmu_page
*child
;
2249 if (is_shadow_present_pte(pte
)) {
2250 if (is_last_spte(pte
, sp
->role
.level
)) {
2251 drop_spte(kvm
, spte
);
2252 if (is_large_pte(pte
))
2255 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
2256 drop_parent_pte(child
, spte
);
2261 if (is_mmio_spte(pte
))
2262 mmu_spte_clear_no_track(spte
);
2267 static void kvm_mmu_page_unlink_children(struct kvm
*kvm
,
2268 struct kvm_mmu_page
*sp
)
2272 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
2273 mmu_page_zap_pte(kvm
, sp
, sp
->spt
+ i
);
2276 static void kvm_mmu_put_page(struct kvm_mmu_page
*sp
, u64
*parent_pte
)
2278 mmu_page_remove_parent_pte(sp
, parent_pte
);
2281 static void kvm_mmu_unlink_parents(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
2284 struct rmap_iterator iter
;
2286 while ((sptep
= rmap_get_first(sp
->parent_ptes
, &iter
)))
2287 drop_parent_pte(sp
, sptep
);
2290 static int mmu_zap_unsync_children(struct kvm
*kvm
,
2291 struct kvm_mmu_page
*parent
,
2292 struct list_head
*invalid_list
)
2295 struct mmu_page_path parents
;
2296 struct kvm_mmu_pages pages
;
2298 if (parent
->role
.level
== PT_PAGE_TABLE_LEVEL
)
2301 kvm_mmu_pages_init(parent
, &parents
, &pages
);
2302 while (mmu_unsync_walk(parent
, &pages
)) {
2303 struct kvm_mmu_page
*sp
;
2305 for_each_sp(pages
, sp
, parents
, i
) {
2306 kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
);
2307 mmu_pages_clear_parents(&parents
);
2310 kvm_mmu_pages_init(parent
, &parents
, &pages
);
2316 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
2317 struct list_head
*invalid_list
)
2321 trace_kvm_mmu_prepare_zap_page(sp
);
2322 ++kvm
->stat
.mmu_shadow_zapped
;
2323 ret
= mmu_zap_unsync_children(kvm
, sp
, invalid_list
);
2324 kvm_mmu_page_unlink_children(kvm
, sp
);
2325 kvm_mmu_unlink_parents(kvm
, sp
);
2327 if (!sp
->role
.invalid
&& !sp
->role
.direct
)
2328 unaccount_shadowed(kvm
, sp
);
2331 kvm_unlink_unsync_page(kvm
, sp
);
2332 if (!sp
->root_count
) {
2335 list_move(&sp
->link
, invalid_list
);
2336 kvm_mod_used_mmu_pages(kvm
, -1);
2338 list_move(&sp
->link
, &kvm
->arch
.active_mmu_pages
);
2341 * The obsolete pages can not be used on any vcpus.
2342 * See the comments in kvm_mmu_invalidate_zap_all_pages().
2344 if (!sp
->role
.invalid
&& !is_obsolete_sp(kvm
, sp
))
2345 kvm_reload_remote_mmus(kvm
);
2348 sp
->role
.invalid
= 1;
2352 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
2353 struct list_head
*invalid_list
)
2355 struct kvm_mmu_page
*sp
, *nsp
;
2357 if (list_empty(invalid_list
))
2361 * wmb: make sure everyone sees our modifications to the page tables
2362 * rmb: make sure we see changes to vcpu->mode
2367 * Wait for all vcpus to exit guest mode and/or lockless shadow
2370 kvm_flush_remote_tlbs(kvm
);
2372 list_for_each_entry_safe(sp
, nsp
, invalid_list
, link
) {
2373 WARN_ON(!sp
->role
.invalid
|| sp
->root_count
);
2374 kvm_mmu_free_page(sp
);
2378 static bool prepare_zap_oldest_mmu_page(struct kvm
*kvm
,
2379 struct list_head
*invalid_list
)
2381 struct kvm_mmu_page
*sp
;
2383 if (list_empty(&kvm
->arch
.active_mmu_pages
))
2386 sp
= list_entry(kvm
->arch
.active_mmu_pages
.prev
,
2387 struct kvm_mmu_page
, link
);
2388 kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
);
2394 * Changing the number of mmu pages allocated to the vm
2395 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
2397 void kvm_mmu_change_mmu_pages(struct kvm
*kvm
, unsigned int goal_nr_mmu_pages
)
2399 LIST_HEAD(invalid_list
);
2401 spin_lock(&kvm
->mmu_lock
);
2403 if (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
) {
2404 /* Need to free some mmu pages to achieve the goal. */
2405 while (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
)
2406 if (!prepare_zap_oldest_mmu_page(kvm
, &invalid_list
))
2409 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
2410 goal_nr_mmu_pages
= kvm
->arch
.n_used_mmu_pages
;
2413 kvm
->arch
.n_max_mmu_pages
= goal_nr_mmu_pages
;
2415 spin_unlock(&kvm
->mmu_lock
);
2418 int kvm_mmu_unprotect_page(struct kvm
*kvm
, gfn_t gfn
)
2420 struct kvm_mmu_page
*sp
;
2421 LIST_HEAD(invalid_list
);
2424 pgprintk("%s: looking for gfn %llx\n", __func__
, gfn
);
2426 spin_lock(&kvm
->mmu_lock
);
2427 for_each_gfn_indirect_valid_sp(kvm
, sp
, gfn
) {
2428 pgprintk("%s: gfn %llx role %x\n", __func__
, gfn
,
2431 kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
);
2433 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
2434 spin_unlock(&kvm
->mmu_lock
);
2438 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page
);
2440 static void __kvm_unsync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
)
2442 trace_kvm_mmu_unsync_page(sp
);
2443 ++vcpu
->kvm
->stat
.mmu_unsync
;
2446 kvm_mmu_mark_parents_unsync(sp
);
2449 static void kvm_unsync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
2451 struct kvm_mmu_page
*s
;
2453 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
) {
2456 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
2457 __kvm_unsync_page(vcpu
, s
);
2461 static int mmu_need_write_protect(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2464 struct kvm_mmu_page
*s
;
2465 bool need_unsync
= false;
2467 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
) {
2471 if (s
->role
.level
!= PT_PAGE_TABLE_LEVEL
)
2478 kvm_unsync_pages(vcpu
, gfn
);
2482 static int set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2483 unsigned pte_access
, int level
,
2484 gfn_t gfn
, pfn_t pfn
, bool speculative
,
2485 bool can_unsync
, bool host_writable
)
2490 if (set_mmio_spte(vcpu
, sptep
, gfn
, pfn
, pte_access
))
2493 spte
= PT_PRESENT_MASK
;
2495 spte
|= shadow_accessed_mask
;
2497 if (pte_access
& ACC_EXEC_MASK
)
2498 spte
|= shadow_x_mask
;
2500 spte
|= shadow_nx_mask
;
2502 if (pte_access
& ACC_USER_MASK
)
2503 spte
|= shadow_user_mask
;
2505 if (level
> PT_PAGE_TABLE_LEVEL
)
2506 spte
|= PT_PAGE_SIZE_MASK
;
2508 spte
|= kvm_x86_ops
->get_mt_mask(vcpu
, gfn
,
2509 kvm_is_reserved_pfn(pfn
));
2512 spte
|= SPTE_HOST_WRITEABLE
;
2514 pte_access
&= ~ACC_WRITE_MASK
;
2516 spte
|= (u64
)pfn
<< PAGE_SHIFT
;
2518 if (pte_access
& ACC_WRITE_MASK
) {
2521 * Other vcpu creates new sp in the window between
2522 * mapping_level() and acquiring mmu-lock. We can
2523 * allow guest to retry the access, the mapping can
2524 * be fixed if guest refault.
2526 if (level
> PT_PAGE_TABLE_LEVEL
&&
2527 has_wrprotected_page(vcpu
, gfn
, level
))
2530 spte
|= PT_WRITABLE_MASK
| SPTE_MMU_WRITEABLE
;
2533 * Optimization: for pte sync, if spte was writable the hash
2534 * lookup is unnecessary (and expensive). Write protection
2535 * is responsibility of mmu_get_page / kvm_sync_page.
2536 * Same reasoning can be applied to dirty page accounting.
2538 if (!can_unsync
&& is_writable_pte(*sptep
))
2541 if (mmu_need_write_protect(vcpu
, gfn
, can_unsync
)) {
2542 pgprintk("%s: found shadow page for %llx, marking ro\n",
2545 pte_access
&= ~ACC_WRITE_MASK
;
2546 spte
&= ~(PT_WRITABLE_MASK
| SPTE_MMU_WRITEABLE
);
2550 if (pte_access
& ACC_WRITE_MASK
) {
2551 kvm_vcpu_mark_page_dirty(vcpu
, gfn
);
2552 spte
|= shadow_dirty_mask
;
2556 if (mmu_spte_update(sptep
, spte
))
2557 kvm_flush_remote_tlbs(vcpu
->kvm
);
2562 static void mmu_set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2563 unsigned pte_access
, int write_fault
, int *emulate
,
2564 int level
, gfn_t gfn
, pfn_t pfn
, bool speculative
,
2567 int was_rmapped
= 0;
2570 pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__
,
2571 *sptep
, write_fault
, gfn
);
2573 if (is_rmap_spte(*sptep
)) {
2575 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2576 * the parent of the now unreachable PTE.
2578 if (level
> PT_PAGE_TABLE_LEVEL
&&
2579 !is_large_pte(*sptep
)) {
2580 struct kvm_mmu_page
*child
;
2583 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
2584 drop_parent_pte(child
, sptep
);
2585 kvm_flush_remote_tlbs(vcpu
->kvm
);
2586 } else if (pfn
!= spte_to_pfn(*sptep
)) {
2587 pgprintk("hfn old %llx new %llx\n",
2588 spte_to_pfn(*sptep
), pfn
);
2589 drop_spte(vcpu
->kvm
, sptep
);
2590 kvm_flush_remote_tlbs(vcpu
->kvm
);
2595 if (set_spte(vcpu
, sptep
, pte_access
, level
, gfn
, pfn
, speculative
,
2596 true, host_writable
)) {
2599 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
2602 if (unlikely(is_mmio_spte(*sptep
) && emulate
))
2605 pgprintk("%s: setting spte %llx\n", __func__
, *sptep
);
2606 pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2607 is_large_pte(*sptep
)? "2MB" : "4kB",
2608 *sptep
& PT_PRESENT_MASK
?"RW":"R", gfn
,
2610 if (!was_rmapped
&& is_large_pte(*sptep
))
2611 ++vcpu
->kvm
->stat
.lpages
;
2613 if (is_shadow_present_pte(*sptep
)) {
2615 rmap_count
= rmap_add(vcpu
, sptep
, gfn
);
2616 if (rmap_count
> RMAP_RECYCLE_THRESHOLD
)
2617 rmap_recycle(vcpu
, sptep
, gfn
);
2621 kvm_release_pfn_clean(pfn
);
2624 static pfn_t
pte_prefetch_gfn_to_pfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2627 struct kvm_memory_slot
*slot
;
2629 slot
= gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, no_dirty_log
);
2631 return KVM_PFN_ERR_FAULT
;
2633 return gfn_to_pfn_memslot_atomic(slot
, gfn
);
2636 static int direct_pte_prefetch_many(struct kvm_vcpu
*vcpu
,
2637 struct kvm_mmu_page
*sp
,
2638 u64
*start
, u64
*end
)
2640 struct page
*pages
[PTE_PREFETCH_NUM
];
2641 struct kvm_memory_slot
*slot
;
2642 unsigned access
= sp
->role
.access
;
2646 gfn
= kvm_mmu_page_get_gfn(sp
, start
- sp
->spt
);
2647 slot
= gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, access
& ACC_WRITE_MASK
);
2651 ret
= gfn_to_page_many_atomic(slot
, gfn
, pages
, end
- start
);
2655 for (i
= 0; i
< ret
; i
++, gfn
++, start
++)
2656 mmu_set_spte(vcpu
, start
, access
, 0, NULL
,
2657 sp
->role
.level
, gfn
, page_to_pfn(pages
[i
]),
2663 static void __direct_pte_prefetch(struct kvm_vcpu
*vcpu
,
2664 struct kvm_mmu_page
*sp
, u64
*sptep
)
2666 u64
*spte
, *start
= NULL
;
2669 WARN_ON(!sp
->role
.direct
);
2671 i
= (sptep
- sp
->spt
) & ~(PTE_PREFETCH_NUM
- 1);
2674 for (i
= 0; i
< PTE_PREFETCH_NUM
; i
++, spte
++) {
2675 if (is_shadow_present_pte(*spte
) || spte
== sptep
) {
2678 if (direct_pte_prefetch_many(vcpu
, sp
, start
, spte
) < 0)
2686 static void direct_pte_prefetch(struct kvm_vcpu
*vcpu
, u64
*sptep
)
2688 struct kvm_mmu_page
*sp
;
2691 * Since it's no accessed bit on EPT, it's no way to
2692 * distinguish between actually accessed translations
2693 * and prefetched, so disable pte prefetch if EPT is
2696 if (!shadow_accessed_mask
)
2699 sp
= page_header(__pa(sptep
));
2700 if (sp
->role
.level
> PT_PAGE_TABLE_LEVEL
)
2703 __direct_pte_prefetch(vcpu
, sp
, sptep
);
2706 static int __direct_map(struct kvm_vcpu
*vcpu
, gpa_t v
, int write
,
2707 int map_writable
, int level
, gfn_t gfn
, pfn_t pfn
,
2710 struct kvm_shadow_walk_iterator iterator
;
2711 struct kvm_mmu_page
*sp
;
2715 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2718 for_each_shadow_entry(vcpu
, (u64
)gfn
<< PAGE_SHIFT
, iterator
) {
2719 if (iterator
.level
== level
) {
2720 mmu_set_spte(vcpu
, iterator
.sptep
, ACC_ALL
,
2721 write
, &emulate
, level
, gfn
, pfn
,
2722 prefault
, map_writable
);
2723 direct_pte_prefetch(vcpu
, iterator
.sptep
);
2724 ++vcpu
->stat
.pf_fixed
;
2728 drop_large_spte(vcpu
, iterator
.sptep
);
2729 if (!is_shadow_present_pte(*iterator
.sptep
)) {
2730 u64 base_addr
= iterator
.addr
;
2732 base_addr
&= PT64_LVL_ADDR_MASK(iterator
.level
);
2733 pseudo_gfn
= base_addr
>> PAGE_SHIFT
;
2734 sp
= kvm_mmu_get_page(vcpu
, pseudo_gfn
, iterator
.addr
,
2736 1, ACC_ALL
, iterator
.sptep
);
2738 link_shadow_page(iterator
.sptep
, sp
, true);
2744 static void kvm_send_hwpoison_signal(unsigned long address
, struct task_struct
*tsk
)
2748 info
.si_signo
= SIGBUS
;
2750 info
.si_code
= BUS_MCEERR_AR
;
2751 info
.si_addr
= (void __user
*)address
;
2752 info
.si_addr_lsb
= PAGE_SHIFT
;
2754 send_sig_info(SIGBUS
, &info
, tsk
);
2757 static int kvm_handle_bad_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
, pfn_t pfn
)
2760 * Do not cache the mmio info caused by writing the readonly gfn
2761 * into the spte otherwise read access on readonly gfn also can
2762 * caused mmio page fault and treat it as mmio access.
2763 * Return 1 to tell kvm to emulate it.
2765 if (pfn
== KVM_PFN_ERR_RO_FAULT
)
2768 if (pfn
== KVM_PFN_ERR_HWPOISON
) {
2769 kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu
, gfn
), current
);
2776 static void transparent_hugepage_adjust(struct kvm_vcpu
*vcpu
,
2777 gfn_t
*gfnp
, pfn_t
*pfnp
, int *levelp
)
2781 int level
= *levelp
;
2784 * Check if it's a transparent hugepage. If this would be an
2785 * hugetlbfs page, level wouldn't be set to
2786 * PT_PAGE_TABLE_LEVEL and there would be no adjustment done
2789 if (!is_error_noslot_pfn(pfn
) && !kvm_is_reserved_pfn(pfn
) &&
2790 level
== PT_PAGE_TABLE_LEVEL
&&
2791 PageTransCompound(pfn_to_page(pfn
)) &&
2792 !has_wrprotected_page(vcpu
, gfn
, PT_DIRECTORY_LEVEL
)) {
2795 * mmu_notifier_retry was successful and we hold the
2796 * mmu_lock here, so the pmd can't become splitting
2797 * from under us, and in turn
2798 * __split_huge_page_refcount() can't run from under
2799 * us and we can safely transfer the refcount from
2800 * PG_tail to PG_head as we switch the pfn to tail to
2803 *levelp
= level
= PT_DIRECTORY_LEVEL
;
2804 mask
= KVM_PAGES_PER_HPAGE(level
) - 1;
2805 VM_BUG_ON((gfn
& mask
) != (pfn
& mask
));
2809 kvm_release_pfn_clean(pfn
);
2817 static bool handle_abnormal_pfn(struct kvm_vcpu
*vcpu
, gva_t gva
, gfn_t gfn
,
2818 pfn_t pfn
, unsigned access
, int *ret_val
)
2822 /* The pfn is invalid, report the error! */
2823 if (unlikely(is_error_pfn(pfn
))) {
2824 *ret_val
= kvm_handle_bad_page(vcpu
, gfn
, pfn
);
2828 if (unlikely(is_noslot_pfn(pfn
)))
2829 vcpu_cache_mmio_info(vcpu
, gva
, gfn
, access
);
2836 static bool page_fault_can_be_fast(u32 error_code
)
2839 * Do not fix the mmio spte with invalid generation number which
2840 * need to be updated by slow page fault path.
2842 if (unlikely(error_code
& PFERR_RSVD_MASK
))
2846 * #PF can be fast only if the shadow page table is present and it
2847 * is caused by write-protect, that means we just need change the
2848 * W bit of the spte which can be done out of mmu-lock.
2850 if (!(error_code
& PFERR_PRESENT_MASK
) ||
2851 !(error_code
& PFERR_WRITE_MASK
))
2858 fast_pf_fix_direct_spte(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
2859 u64
*sptep
, u64 spte
)
2863 WARN_ON(!sp
->role
.direct
);
2866 * The gfn of direct spte is stable since it is calculated
2869 gfn
= kvm_mmu_page_get_gfn(sp
, sptep
- sp
->spt
);
2872 * Theoretically we could also set dirty bit (and flush TLB) here in
2873 * order to eliminate unnecessary PML logging. See comments in
2874 * set_spte. But fast_page_fault is very unlikely to happen with PML
2875 * enabled, so we do not do this. This might result in the same GPA
2876 * to be logged in PML buffer again when the write really happens, and
2877 * eventually to be called by mark_page_dirty twice. But it's also no
2878 * harm. This also avoids the TLB flush needed after setting dirty bit
2879 * so non-PML cases won't be impacted.
2881 * Compare with set_spte where instead shadow_dirty_mask is set.
2883 if (cmpxchg64(sptep
, spte
, spte
| PT_WRITABLE_MASK
) == spte
)
2884 kvm_vcpu_mark_page_dirty(vcpu
, gfn
);
2891 * - true: let the vcpu to access on the same address again.
2892 * - false: let the real page fault path to fix it.
2894 static bool fast_page_fault(struct kvm_vcpu
*vcpu
, gva_t gva
, int level
,
2897 struct kvm_shadow_walk_iterator iterator
;
2898 struct kvm_mmu_page
*sp
;
2902 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2905 if (!page_fault_can_be_fast(error_code
))
2908 walk_shadow_page_lockless_begin(vcpu
);
2909 for_each_shadow_entry_lockless(vcpu
, gva
, iterator
, spte
)
2910 if (!is_shadow_present_pte(spte
) || iterator
.level
< level
)
2914 * If the mapping has been changed, let the vcpu fault on the
2915 * same address again.
2917 if (!is_rmap_spte(spte
)) {
2922 sp
= page_header(__pa(iterator
.sptep
));
2923 if (!is_last_spte(spte
, sp
->role
.level
))
2927 * Check if it is a spurious fault caused by TLB lazily flushed.
2929 * Need not check the access of upper level table entries since
2930 * they are always ACC_ALL.
2932 if (is_writable_pte(spte
)) {
2938 * Currently, to simplify the code, only the spte write-protected
2939 * by dirty-log can be fast fixed.
2941 if (!spte_is_locklessly_modifiable(spte
))
2945 * Do not fix write-permission on the large spte since we only dirty
2946 * the first page into the dirty-bitmap in fast_pf_fix_direct_spte()
2947 * that means other pages are missed if its slot is dirty-logged.
2949 * Instead, we let the slow page fault path create a normal spte to
2952 * See the comments in kvm_arch_commit_memory_region().
2954 if (sp
->role
.level
> PT_PAGE_TABLE_LEVEL
)
2958 * Currently, fast page fault only works for direct mapping since
2959 * the gfn is not stable for indirect shadow page.
2960 * See Documentation/virtual/kvm/locking.txt to get more detail.
2962 ret
= fast_pf_fix_direct_spte(vcpu
, sp
, iterator
.sptep
, spte
);
2964 trace_fast_page_fault(vcpu
, gva
, error_code
, iterator
.sptep
,
2966 walk_shadow_page_lockless_end(vcpu
);
2971 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
2972 gva_t gva
, pfn_t
*pfn
, bool write
, bool *writable
);
2973 static void make_mmu_pages_available(struct kvm_vcpu
*vcpu
);
2975 static int nonpaging_map(struct kvm_vcpu
*vcpu
, gva_t v
, u32 error_code
,
2976 gfn_t gfn
, bool prefault
)
2982 unsigned long mmu_seq
;
2983 bool map_writable
, write
= error_code
& PFERR_WRITE_MASK
;
2985 force_pt_level
= mapping_level_dirty_bitmap(vcpu
, gfn
);
2986 if (likely(!force_pt_level
)) {
2987 level
= mapping_level(vcpu
, gfn
);
2989 * This path builds a PAE pagetable - so we can map
2990 * 2mb pages at maximum. Therefore check if the level
2991 * is larger than that.
2993 if (level
> PT_DIRECTORY_LEVEL
)
2994 level
= PT_DIRECTORY_LEVEL
;
2996 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
2998 level
= PT_PAGE_TABLE_LEVEL
;
3000 if (fast_page_fault(vcpu
, v
, level
, error_code
))
3003 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
3006 if (try_async_pf(vcpu
, prefault
, gfn
, v
, &pfn
, write
, &map_writable
))
3009 if (handle_abnormal_pfn(vcpu
, v
, gfn
, pfn
, ACC_ALL
, &r
))
3012 spin_lock(&vcpu
->kvm
->mmu_lock
);
3013 if (mmu_notifier_retry(vcpu
->kvm
, mmu_seq
))
3015 make_mmu_pages_available(vcpu
);
3016 if (likely(!force_pt_level
))
3017 transparent_hugepage_adjust(vcpu
, &gfn
, &pfn
, &level
);
3018 r
= __direct_map(vcpu
, v
, write
, map_writable
, level
, gfn
, pfn
,
3020 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3026 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3027 kvm_release_pfn_clean(pfn
);
3032 static void mmu_free_roots(struct kvm_vcpu
*vcpu
)
3035 struct kvm_mmu_page
*sp
;
3036 LIST_HEAD(invalid_list
);
3038 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
3041 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
&&
3042 (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
||
3043 vcpu
->arch
.mmu
.direct_map
)) {
3044 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
3046 spin_lock(&vcpu
->kvm
->mmu_lock
);
3047 sp
= page_header(root
);
3049 if (!sp
->root_count
&& sp
->role
.invalid
) {
3050 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, &invalid_list
);
3051 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
3053 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3054 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
3058 spin_lock(&vcpu
->kvm
->mmu_lock
);
3059 for (i
= 0; i
< 4; ++i
) {
3060 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
3063 root
&= PT64_BASE_ADDR_MASK
;
3064 sp
= page_header(root
);
3066 if (!sp
->root_count
&& sp
->role
.invalid
)
3067 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
3070 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
3072 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
3073 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3074 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
3077 static int mmu_check_root(struct kvm_vcpu
*vcpu
, gfn_t root_gfn
)
3081 if (!kvm_is_visible_gfn(vcpu
->kvm
, root_gfn
)) {
3082 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3089 static int mmu_alloc_direct_roots(struct kvm_vcpu
*vcpu
)
3091 struct kvm_mmu_page
*sp
;
3094 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
3095 spin_lock(&vcpu
->kvm
->mmu_lock
);
3096 make_mmu_pages_available(vcpu
);
3097 sp
= kvm_mmu_get_page(vcpu
, 0, 0, PT64_ROOT_LEVEL
,
3100 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3101 vcpu
->arch
.mmu
.root_hpa
= __pa(sp
->spt
);
3102 } else if (vcpu
->arch
.mmu
.shadow_root_level
== PT32E_ROOT_LEVEL
) {
3103 for (i
= 0; i
< 4; ++i
) {
3104 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
3106 MMU_WARN_ON(VALID_PAGE(root
));
3107 spin_lock(&vcpu
->kvm
->mmu_lock
);
3108 make_mmu_pages_available(vcpu
);
3109 sp
= kvm_mmu_get_page(vcpu
, i
<< (30 - PAGE_SHIFT
),
3111 PT32_ROOT_LEVEL
, 1, ACC_ALL
,
3113 root
= __pa(sp
->spt
);
3115 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3116 vcpu
->arch
.mmu
.pae_root
[i
] = root
| PT_PRESENT_MASK
;
3118 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
3125 static int mmu_alloc_shadow_roots(struct kvm_vcpu
*vcpu
)
3127 struct kvm_mmu_page
*sp
;
3132 root_gfn
= vcpu
->arch
.mmu
.get_cr3(vcpu
) >> PAGE_SHIFT
;
3134 if (mmu_check_root(vcpu
, root_gfn
))
3138 * Do we shadow a long mode page table? If so we need to
3139 * write-protect the guests page table root.
3141 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
3142 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
3144 MMU_WARN_ON(VALID_PAGE(root
));
3146 spin_lock(&vcpu
->kvm
->mmu_lock
);
3147 make_mmu_pages_available(vcpu
);
3148 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, 0, PT64_ROOT_LEVEL
,
3150 root
= __pa(sp
->spt
);
3152 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3153 vcpu
->arch
.mmu
.root_hpa
= root
;
3158 * We shadow a 32 bit page table. This may be a legacy 2-level
3159 * or a PAE 3-level page table. In either case we need to be aware that
3160 * the shadow page table may be a PAE or a long mode page table.
3162 pm_mask
= PT_PRESENT_MASK
;
3163 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
)
3164 pm_mask
|= PT_ACCESSED_MASK
| PT_WRITABLE_MASK
| PT_USER_MASK
;
3166 for (i
= 0; i
< 4; ++i
) {
3167 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
3169 MMU_WARN_ON(VALID_PAGE(root
));
3170 if (vcpu
->arch
.mmu
.root_level
== PT32E_ROOT_LEVEL
) {
3171 pdptr
= vcpu
->arch
.mmu
.get_pdptr(vcpu
, i
);
3172 if (!is_present_gpte(pdptr
)) {
3173 vcpu
->arch
.mmu
.pae_root
[i
] = 0;
3176 root_gfn
= pdptr
>> PAGE_SHIFT
;
3177 if (mmu_check_root(vcpu
, root_gfn
))
3180 spin_lock(&vcpu
->kvm
->mmu_lock
);
3181 make_mmu_pages_available(vcpu
);
3182 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, i
<< 30,
3185 root
= __pa(sp
->spt
);
3187 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3189 vcpu
->arch
.mmu
.pae_root
[i
] = root
| pm_mask
;
3191 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
3194 * If we shadow a 32 bit page table with a long mode page
3195 * table we enter this path.
3197 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
3198 if (vcpu
->arch
.mmu
.lm_root
== NULL
) {
3200 * The additional page necessary for this is only
3201 * allocated on demand.
3206 lm_root
= (void*)get_zeroed_page(GFP_KERNEL
);
3207 if (lm_root
== NULL
)
3210 lm_root
[0] = __pa(vcpu
->arch
.mmu
.pae_root
) | pm_mask
;
3212 vcpu
->arch
.mmu
.lm_root
= lm_root
;
3215 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.lm_root
);
3221 static int mmu_alloc_roots(struct kvm_vcpu
*vcpu
)
3223 if (vcpu
->arch
.mmu
.direct_map
)
3224 return mmu_alloc_direct_roots(vcpu
);
3226 return mmu_alloc_shadow_roots(vcpu
);
3229 static void mmu_sync_roots(struct kvm_vcpu
*vcpu
)
3232 struct kvm_mmu_page
*sp
;
3234 if (vcpu
->arch
.mmu
.direct_map
)
3237 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
3240 vcpu_clear_mmio_info(vcpu
, MMIO_GVA_ANY
);
3241 kvm_mmu_audit(vcpu
, AUDIT_PRE_SYNC
);
3242 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
3243 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
3244 sp
= page_header(root
);
3245 mmu_sync_children(vcpu
, sp
);
3246 kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
3249 for (i
= 0; i
< 4; ++i
) {
3250 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
3252 if (root
&& VALID_PAGE(root
)) {
3253 root
&= PT64_BASE_ADDR_MASK
;
3254 sp
= page_header(root
);
3255 mmu_sync_children(vcpu
, sp
);
3258 kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
3261 void kvm_mmu_sync_roots(struct kvm_vcpu
*vcpu
)
3263 spin_lock(&vcpu
->kvm
->mmu_lock
);
3264 mmu_sync_roots(vcpu
);
3265 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3267 EXPORT_SYMBOL_GPL(kvm_mmu_sync_roots
);
3269 static gpa_t
nonpaging_gva_to_gpa(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
3270 u32 access
, struct x86_exception
*exception
)
3273 exception
->error_code
= 0;
3277 static gpa_t
nonpaging_gva_to_gpa_nested(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
3279 struct x86_exception
*exception
)
3282 exception
->error_code
= 0;
3283 return vcpu
->arch
.nested_mmu
.translate_gpa(vcpu
, vaddr
, access
, exception
);
3286 static bool quickly_check_mmio_pf(struct kvm_vcpu
*vcpu
, u64 addr
, bool direct
)
3289 return vcpu_match_mmio_gpa(vcpu
, addr
);
3291 return vcpu_match_mmio_gva(vcpu
, addr
);
3296 * On direct hosts, the last spte is only allows two states
3297 * for mmio page fault:
3298 * - It is the mmio spte
3299 * - It is zapped or it is being zapped.
3301 * This function completely checks the spte when the last spte
3302 * is not the mmio spte.
3304 static bool check_direct_spte_mmio_pf(u64 spte
)
3306 return __check_direct_spte_mmio_pf(spte
);
3309 static u64
walk_shadow_page_get_mmio_spte(struct kvm_vcpu
*vcpu
, u64 addr
)
3311 struct kvm_shadow_walk_iterator iterator
;
3314 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
3317 walk_shadow_page_lockless_begin(vcpu
);
3318 for_each_shadow_entry_lockless(vcpu
, addr
, iterator
, spte
)
3319 if (!is_shadow_present_pte(spte
))
3321 walk_shadow_page_lockless_end(vcpu
);
3326 int handle_mmio_page_fault_common(struct kvm_vcpu
*vcpu
, u64 addr
, bool direct
)
3330 if (quickly_check_mmio_pf(vcpu
, addr
, direct
))
3331 return RET_MMIO_PF_EMULATE
;
3333 spte
= walk_shadow_page_get_mmio_spte(vcpu
, addr
);
3335 if (is_mmio_spte(spte
)) {
3336 gfn_t gfn
= get_mmio_spte_gfn(spte
);
3337 unsigned access
= get_mmio_spte_access(spte
);
3339 if (!check_mmio_spte(vcpu
, spte
))
3340 return RET_MMIO_PF_INVALID
;
3345 trace_handle_mmio_page_fault(addr
, gfn
, access
);
3346 vcpu_cache_mmio_info(vcpu
, addr
, gfn
, access
);
3347 return RET_MMIO_PF_EMULATE
;
3351 * It's ok if the gva is remapped by other cpus on shadow guest,
3352 * it's a BUG if the gfn is not a mmio page.
3354 if (direct
&& !check_direct_spte_mmio_pf(spte
))
3355 return RET_MMIO_PF_BUG
;
3358 * If the page table is zapped by other cpus, let CPU fault again on
3361 return RET_MMIO_PF_RETRY
;
3363 EXPORT_SYMBOL_GPL(handle_mmio_page_fault_common
);
3365 static int handle_mmio_page_fault(struct kvm_vcpu
*vcpu
, u64 addr
,
3366 u32 error_code
, bool direct
)
3370 ret
= handle_mmio_page_fault_common(vcpu
, addr
, direct
);
3371 WARN_ON(ret
== RET_MMIO_PF_BUG
);
3375 static int nonpaging_page_fault(struct kvm_vcpu
*vcpu
, gva_t gva
,
3376 u32 error_code
, bool prefault
)
3381 pgprintk("%s: gva %lx error %x\n", __func__
, gva
, error_code
);
3383 if (unlikely(error_code
& PFERR_RSVD_MASK
)) {
3384 r
= handle_mmio_page_fault(vcpu
, gva
, error_code
, true);
3386 if (likely(r
!= RET_MMIO_PF_INVALID
))
3390 r
= mmu_topup_memory_caches(vcpu
);
3394 MMU_WARN_ON(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3396 gfn
= gva
>> PAGE_SHIFT
;
3398 return nonpaging_map(vcpu
, gva
& PAGE_MASK
,
3399 error_code
, gfn
, prefault
);
3402 static int kvm_arch_setup_async_pf(struct kvm_vcpu
*vcpu
, gva_t gva
, gfn_t gfn
)
3404 struct kvm_arch_async_pf arch
;
3406 arch
.token
= (vcpu
->arch
.apf
.id
++ << 12) | vcpu
->vcpu_id
;
3408 arch
.direct_map
= vcpu
->arch
.mmu
.direct_map
;
3409 arch
.cr3
= vcpu
->arch
.mmu
.get_cr3(vcpu
);
3411 return kvm_setup_async_pf(vcpu
, gva
, kvm_vcpu_gfn_to_hva(vcpu
, gfn
), &arch
);
3414 static bool can_do_async_pf(struct kvm_vcpu
*vcpu
)
3416 if (unlikely(!irqchip_in_kernel(vcpu
->kvm
) ||
3417 kvm_event_needs_reinjection(vcpu
)))
3420 return kvm_x86_ops
->interrupt_allowed(vcpu
);
3423 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
3424 gva_t gva
, pfn_t
*pfn
, bool write
, bool *writable
)
3426 struct kvm_memory_slot
*slot
;
3429 slot
= kvm_vcpu_gfn_to_memslot(vcpu
, gfn
);
3431 *pfn
= __gfn_to_pfn_memslot(slot
, gfn
, false, &async
, write
, writable
);
3433 return false; /* *pfn has correct page already */
3435 if (!prefault
&& can_do_async_pf(vcpu
)) {
3436 trace_kvm_try_async_get_page(gva
, gfn
);
3437 if (kvm_find_async_pf_gfn(vcpu
, gfn
)) {
3438 trace_kvm_async_pf_doublefault(gva
, gfn
);
3439 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
3441 } else if (kvm_arch_setup_async_pf(vcpu
, gva
, gfn
))
3445 *pfn
= __gfn_to_pfn_memslot(slot
, gfn
, false, NULL
, write
, writable
);
3449 static int tdp_page_fault(struct kvm_vcpu
*vcpu
, gva_t gpa
, u32 error_code
,
3456 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
3457 unsigned long mmu_seq
;
3458 int write
= error_code
& PFERR_WRITE_MASK
;
3461 MMU_WARN_ON(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3463 if (unlikely(error_code
& PFERR_RSVD_MASK
)) {
3464 r
= handle_mmio_page_fault(vcpu
, gpa
, error_code
, true);
3466 if (likely(r
!= RET_MMIO_PF_INVALID
))
3470 r
= mmu_topup_memory_caches(vcpu
);
3474 force_pt_level
= mapping_level_dirty_bitmap(vcpu
, gfn
);
3475 if (likely(!force_pt_level
)) {
3476 level
= mapping_level(vcpu
, gfn
);
3477 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
3479 level
= PT_PAGE_TABLE_LEVEL
;
3481 if (fast_page_fault(vcpu
, gpa
, level
, error_code
))
3484 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
3487 if (try_async_pf(vcpu
, prefault
, gfn
, gpa
, &pfn
, write
, &map_writable
))
3490 if (handle_abnormal_pfn(vcpu
, 0, gfn
, pfn
, ACC_ALL
, &r
))
3493 spin_lock(&vcpu
->kvm
->mmu_lock
);
3494 if (mmu_notifier_retry(vcpu
->kvm
, mmu_seq
))
3496 make_mmu_pages_available(vcpu
);
3497 if (likely(!force_pt_level
))
3498 transparent_hugepage_adjust(vcpu
, &gfn
, &pfn
, &level
);
3499 r
= __direct_map(vcpu
, gpa
, write
, map_writable
,
3500 level
, gfn
, pfn
, prefault
);
3501 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3506 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3507 kvm_release_pfn_clean(pfn
);
3511 static void nonpaging_init_context(struct kvm_vcpu
*vcpu
,
3512 struct kvm_mmu
*context
)
3514 context
->page_fault
= nonpaging_page_fault
;
3515 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
3516 context
->sync_page
= nonpaging_sync_page
;
3517 context
->invlpg
= nonpaging_invlpg
;
3518 context
->update_pte
= nonpaging_update_pte
;
3519 context
->root_level
= 0;
3520 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
3521 context
->root_hpa
= INVALID_PAGE
;
3522 context
->direct_map
= true;
3523 context
->nx
= false;
3526 void kvm_mmu_new_cr3(struct kvm_vcpu
*vcpu
)
3528 mmu_free_roots(vcpu
);
3531 static unsigned long get_cr3(struct kvm_vcpu
*vcpu
)
3533 return kvm_read_cr3(vcpu
);
3536 static void inject_page_fault(struct kvm_vcpu
*vcpu
,
3537 struct x86_exception
*fault
)
3539 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
3542 static bool sync_mmio_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
, gfn_t gfn
,
3543 unsigned access
, int *nr_present
)
3545 if (unlikely(is_mmio_spte(*sptep
))) {
3546 if (gfn
!= get_mmio_spte_gfn(*sptep
)) {
3547 mmu_spte_clear_no_track(sptep
);
3552 mark_mmio_spte(vcpu
, sptep
, gfn
, access
);
3559 static inline bool is_last_gpte(struct kvm_mmu
*mmu
, unsigned level
, unsigned gpte
)
3564 index
|= (gpte
& PT_PAGE_SIZE_MASK
) >> (PT_PAGE_SIZE_SHIFT
- 2);
3565 return mmu
->last_pte_bitmap
& (1 << index
);
3568 #define PTTYPE_EPT 18 /* arbitrary */
3569 #define PTTYPE PTTYPE_EPT
3570 #include "paging_tmpl.h"
3574 #include "paging_tmpl.h"
3578 #include "paging_tmpl.h"
3581 static void reset_rsvds_bits_mask(struct kvm_vcpu
*vcpu
,
3582 struct kvm_mmu
*context
)
3584 int maxphyaddr
= cpuid_maxphyaddr(vcpu
);
3585 u64 exb_bit_rsvd
= 0;
3586 u64 gbpages_bit_rsvd
= 0;
3587 u64 nonleaf_bit8_rsvd
= 0;
3589 context
->bad_mt_xwr
= 0;
3592 exb_bit_rsvd
= rsvd_bits(63, 63);
3593 if (!guest_cpuid_has_gbpages(vcpu
))
3594 gbpages_bit_rsvd
= rsvd_bits(7, 7);
3597 * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for
3598 * leaf entries) on AMD CPUs only.
3600 if (guest_cpuid_is_amd(vcpu
))
3601 nonleaf_bit8_rsvd
= rsvd_bits(8, 8);
3603 switch (context
->root_level
) {
3604 case PT32_ROOT_LEVEL
:
3605 /* no rsvd bits for 2 level 4K page table entries */
3606 context
->rsvd_bits_mask
[0][1] = 0;
3607 context
->rsvd_bits_mask
[0][0] = 0;
3608 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
3610 if (!is_pse(vcpu
)) {
3611 context
->rsvd_bits_mask
[1][1] = 0;
3615 if (is_cpuid_PSE36())
3616 /* 36bits PSE 4MB page */
3617 context
->rsvd_bits_mask
[1][1] = rsvd_bits(17, 21);
3619 /* 32 bits PSE 4MB page */
3620 context
->rsvd_bits_mask
[1][1] = rsvd_bits(13, 21);
3622 case PT32E_ROOT_LEVEL
:
3623 context
->rsvd_bits_mask
[0][2] =
3624 rsvd_bits(maxphyaddr
, 63) |
3625 rsvd_bits(5, 8) | rsvd_bits(1, 2); /* PDPTE */
3626 context
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
3627 rsvd_bits(maxphyaddr
, 62); /* PDE */
3628 context
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
3629 rsvd_bits(maxphyaddr
, 62); /* PTE */
3630 context
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
3631 rsvd_bits(maxphyaddr
, 62) |
3632 rsvd_bits(13, 20); /* large page */
3633 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
3635 case PT64_ROOT_LEVEL
:
3636 context
->rsvd_bits_mask
[0][3] = exb_bit_rsvd
|
3637 nonleaf_bit8_rsvd
| rsvd_bits(7, 7) | rsvd_bits(maxphyaddr
, 51);
3638 context
->rsvd_bits_mask
[0][2] = exb_bit_rsvd
|
3639 nonleaf_bit8_rsvd
| gbpages_bit_rsvd
| rsvd_bits(maxphyaddr
, 51);
3640 context
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
3641 rsvd_bits(maxphyaddr
, 51);
3642 context
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
3643 rsvd_bits(maxphyaddr
, 51);
3644 context
->rsvd_bits_mask
[1][3] = context
->rsvd_bits_mask
[0][3];
3645 context
->rsvd_bits_mask
[1][2] = exb_bit_rsvd
|
3646 gbpages_bit_rsvd
| rsvd_bits(maxphyaddr
, 51) |
3648 context
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
3649 rsvd_bits(maxphyaddr
, 51) |
3650 rsvd_bits(13, 20); /* large page */
3651 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
3656 static void reset_rsvds_bits_mask_ept(struct kvm_vcpu
*vcpu
,
3657 struct kvm_mmu
*context
, bool execonly
)
3659 int maxphyaddr
= cpuid_maxphyaddr(vcpu
);
3662 context
->rsvd_bits_mask
[0][3] =
3663 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(3, 7);
3664 context
->rsvd_bits_mask
[0][2] =
3665 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(3, 6);
3666 context
->rsvd_bits_mask
[0][1] =
3667 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(3, 6);
3668 context
->rsvd_bits_mask
[0][0] = rsvd_bits(maxphyaddr
, 51);
3671 context
->rsvd_bits_mask
[1][3] = context
->rsvd_bits_mask
[0][3];
3672 context
->rsvd_bits_mask
[1][2] =
3673 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(12, 29);
3674 context
->rsvd_bits_mask
[1][1] =
3675 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(12, 20);
3676 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
3678 for (pte
= 0; pte
< 64; pte
++) {
3679 int rwx_bits
= pte
& 7;
3681 if (mt
== 0x2 || mt
== 0x3 || mt
== 0x7 ||
3682 rwx_bits
== 0x2 || rwx_bits
== 0x6 ||
3683 (rwx_bits
== 0x4 && !execonly
))
3684 context
->bad_mt_xwr
|= (1ull << pte
);
3688 static void update_permission_bitmask(struct kvm_vcpu
*vcpu
,
3689 struct kvm_mmu
*mmu
, bool ept
)
3691 unsigned bit
, byte
, pfec
;
3693 bool fault
, x
, w
, u
, wf
, uf
, ff
, smapf
, cr4_smap
, cr4_smep
, smap
= 0;
3695 cr4_smep
= kvm_read_cr4_bits(vcpu
, X86_CR4_SMEP
);
3696 cr4_smap
= kvm_read_cr4_bits(vcpu
, X86_CR4_SMAP
);
3697 for (byte
= 0; byte
< ARRAY_SIZE(mmu
->permissions
); ++byte
) {
3700 wf
= pfec
& PFERR_WRITE_MASK
;
3701 uf
= pfec
& PFERR_USER_MASK
;
3702 ff
= pfec
& PFERR_FETCH_MASK
;
3704 * PFERR_RSVD_MASK bit is set in PFEC if the access is not
3705 * subject to SMAP restrictions, and cleared otherwise. The
3706 * bit is only meaningful if the SMAP bit is set in CR4.
3708 smapf
= !(pfec
& PFERR_RSVD_MASK
);
3709 for (bit
= 0; bit
< 8; ++bit
) {
3710 x
= bit
& ACC_EXEC_MASK
;
3711 w
= bit
& ACC_WRITE_MASK
;
3712 u
= bit
& ACC_USER_MASK
;
3715 /* Not really needed: !nx will cause pte.nx to fault */
3717 /* Allow supervisor writes if !cr0.wp */
3718 w
|= !is_write_protection(vcpu
) && !uf
;
3719 /* Disallow supervisor fetches of user code if cr4.smep */
3720 x
&= !(cr4_smep
&& u
&& !uf
);
3723 * SMAP:kernel-mode data accesses from user-mode
3724 * mappings should fault. A fault is considered
3725 * as a SMAP violation if all of the following
3726 * conditions are ture:
3727 * - X86_CR4_SMAP is set in CR4
3728 * - An user page is accessed
3729 * - Page fault in kernel mode
3730 * - if CPL = 3 or X86_EFLAGS_AC is clear
3732 * Here, we cover the first three conditions.
3733 * The fourth is computed dynamically in
3734 * permission_fault() and is in smapf.
3736 * Also, SMAP does not affect instruction
3737 * fetches, add the !ff check here to make it
3740 smap
= cr4_smap
&& u
&& !uf
&& !ff
;
3742 /* Not really needed: no U/S accesses on ept */
3745 fault
= (ff
&& !x
) || (uf
&& !u
) || (wf
&& !w
) ||
3747 map
|= fault
<< bit
;
3749 mmu
->permissions
[byte
] = map
;
3753 static void update_last_pte_bitmap(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
)
3756 unsigned level
, root_level
= mmu
->root_level
;
3757 const unsigned ps_set_index
= 1 << 2; /* bit 2 of index: ps */
3759 if (root_level
== PT32E_ROOT_LEVEL
)
3761 /* PT_PAGE_TABLE_LEVEL always terminates */
3762 map
= 1 | (1 << ps_set_index
);
3763 for (level
= PT_DIRECTORY_LEVEL
; level
<= root_level
; ++level
) {
3764 if (level
<= PT_PDPE_LEVEL
3765 && (mmu
->root_level
>= PT32E_ROOT_LEVEL
|| is_pse(vcpu
)))
3766 map
|= 1 << (ps_set_index
| (level
- 1));
3768 mmu
->last_pte_bitmap
= map
;
3771 static void paging64_init_context_common(struct kvm_vcpu
*vcpu
,
3772 struct kvm_mmu
*context
,
3775 context
->nx
= is_nx(vcpu
);
3776 context
->root_level
= level
;
3778 reset_rsvds_bits_mask(vcpu
, context
);
3779 update_permission_bitmask(vcpu
, context
, false);
3780 update_last_pte_bitmap(vcpu
, context
);
3782 MMU_WARN_ON(!is_pae(vcpu
));
3783 context
->page_fault
= paging64_page_fault
;
3784 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3785 context
->sync_page
= paging64_sync_page
;
3786 context
->invlpg
= paging64_invlpg
;
3787 context
->update_pte
= paging64_update_pte
;
3788 context
->shadow_root_level
= level
;
3789 context
->root_hpa
= INVALID_PAGE
;
3790 context
->direct_map
= false;
3793 static void paging64_init_context(struct kvm_vcpu
*vcpu
,
3794 struct kvm_mmu
*context
)
3796 paging64_init_context_common(vcpu
, context
, PT64_ROOT_LEVEL
);
3799 static void paging32_init_context(struct kvm_vcpu
*vcpu
,
3800 struct kvm_mmu
*context
)
3802 context
->nx
= false;
3803 context
->root_level
= PT32_ROOT_LEVEL
;
3805 reset_rsvds_bits_mask(vcpu
, context
);
3806 update_permission_bitmask(vcpu
, context
, false);
3807 update_last_pte_bitmap(vcpu
, context
);
3809 context
->page_fault
= paging32_page_fault
;
3810 context
->gva_to_gpa
= paging32_gva_to_gpa
;
3811 context
->sync_page
= paging32_sync_page
;
3812 context
->invlpg
= paging32_invlpg
;
3813 context
->update_pte
= paging32_update_pte
;
3814 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
3815 context
->root_hpa
= INVALID_PAGE
;
3816 context
->direct_map
= false;
3819 static void paging32E_init_context(struct kvm_vcpu
*vcpu
,
3820 struct kvm_mmu
*context
)
3822 paging64_init_context_common(vcpu
, context
, PT32E_ROOT_LEVEL
);
3825 static void init_kvm_tdp_mmu(struct kvm_vcpu
*vcpu
)
3827 struct kvm_mmu
*context
= &vcpu
->arch
.mmu
;
3829 context
->base_role
.word
= 0;
3830 context
->base_role
.smm
= is_smm(vcpu
);
3831 context
->page_fault
= tdp_page_fault
;
3832 context
->sync_page
= nonpaging_sync_page
;
3833 context
->invlpg
= nonpaging_invlpg
;
3834 context
->update_pte
= nonpaging_update_pte
;
3835 context
->shadow_root_level
= kvm_x86_ops
->get_tdp_level();
3836 context
->root_hpa
= INVALID_PAGE
;
3837 context
->direct_map
= true;
3838 context
->set_cr3
= kvm_x86_ops
->set_tdp_cr3
;
3839 context
->get_cr3
= get_cr3
;
3840 context
->get_pdptr
= kvm_pdptr_read
;
3841 context
->inject_page_fault
= kvm_inject_page_fault
;
3843 if (!is_paging(vcpu
)) {
3844 context
->nx
= false;
3845 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
3846 context
->root_level
= 0;
3847 } else if (is_long_mode(vcpu
)) {
3848 context
->nx
= is_nx(vcpu
);
3849 context
->root_level
= PT64_ROOT_LEVEL
;
3850 reset_rsvds_bits_mask(vcpu
, context
);
3851 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3852 } else if (is_pae(vcpu
)) {
3853 context
->nx
= is_nx(vcpu
);
3854 context
->root_level
= PT32E_ROOT_LEVEL
;
3855 reset_rsvds_bits_mask(vcpu
, context
);
3856 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3858 context
->nx
= false;
3859 context
->root_level
= PT32_ROOT_LEVEL
;
3860 reset_rsvds_bits_mask(vcpu
, context
);
3861 context
->gva_to_gpa
= paging32_gva_to_gpa
;
3864 update_permission_bitmask(vcpu
, context
, false);
3865 update_last_pte_bitmap(vcpu
, context
);
3868 void kvm_init_shadow_mmu(struct kvm_vcpu
*vcpu
)
3870 bool smep
= kvm_read_cr4_bits(vcpu
, X86_CR4_SMEP
);
3871 bool smap
= kvm_read_cr4_bits(vcpu
, X86_CR4_SMAP
);
3872 struct kvm_mmu
*context
= &vcpu
->arch
.mmu
;
3874 MMU_WARN_ON(VALID_PAGE(context
->root_hpa
));
3876 if (!is_paging(vcpu
))
3877 nonpaging_init_context(vcpu
, context
);
3878 else if (is_long_mode(vcpu
))
3879 paging64_init_context(vcpu
, context
);
3880 else if (is_pae(vcpu
))
3881 paging32E_init_context(vcpu
, context
);
3883 paging32_init_context(vcpu
, context
);
3885 context
->base_role
.nxe
= is_nx(vcpu
);
3886 context
->base_role
.cr4_pae
= !!is_pae(vcpu
);
3887 context
->base_role
.cr0_wp
= is_write_protection(vcpu
);
3888 context
->base_role
.smep_andnot_wp
3889 = smep
&& !is_write_protection(vcpu
);
3890 context
->base_role
.smap_andnot_wp
3891 = smap
&& !is_write_protection(vcpu
);
3892 context
->base_role
.smm
= is_smm(vcpu
);
3894 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu
);
3896 void kvm_init_shadow_ept_mmu(struct kvm_vcpu
*vcpu
, bool execonly
)
3898 struct kvm_mmu
*context
= &vcpu
->arch
.mmu
;
3900 MMU_WARN_ON(VALID_PAGE(context
->root_hpa
));
3902 context
->shadow_root_level
= kvm_x86_ops
->get_tdp_level();
3905 context
->page_fault
= ept_page_fault
;
3906 context
->gva_to_gpa
= ept_gva_to_gpa
;
3907 context
->sync_page
= ept_sync_page
;
3908 context
->invlpg
= ept_invlpg
;
3909 context
->update_pte
= ept_update_pte
;
3910 context
->root_level
= context
->shadow_root_level
;
3911 context
->root_hpa
= INVALID_PAGE
;
3912 context
->direct_map
= false;
3914 update_permission_bitmask(vcpu
, context
, true);
3915 reset_rsvds_bits_mask_ept(vcpu
, context
, execonly
);
3917 EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu
);
3919 static void init_kvm_softmmu(struct kvm_vcpu
*vcpu
)
3921 struct kvm_mmu
*context
= &vcpu
->arch
.mmu
;
3923 kvm_init_shadow_mmu(vcpu
);
3924 context
->set_cr3
= kvm_x86_ops
->set_cr3
;
3925 context
->get_cr3
= get_cr3
;
3926 context
->get_pdptr
= kvm_pdptr_read
;
3927 context
->inject_page_fault
= kvm_inject_page_fault
;
3930 static void init_kvm_nested_mmu(struct kvm_vcpu
*vcpu
)
3932 struct kvm_mmu
*g_context
= &vcpu
->arch
.nested_mmu
;
3934 g_context
->get_cr3
= get_cr3
;
3935 g_context
->get_pdptr
= kvm_pdptr_read
;
3936 g_context
->inject_page_fault
= kvm_inject_page_fault
;
3939 * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
3940 * translation of l2_gpa to l1_gpa addresses is done using the
3941 * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
3942 * functions between mmu and nested_mmu are swapped.
3944 if (!is_paging(vcpu
)) {
3945 g_context
->nx
= false;
3946 g_context
->root_level
= 0;
3947 g_context
->gva_to_gpa
= nonpaging_gva_to_gpa_nested
;
3948 } else if (is_long_mode(vcpu
)) {
3949 g_context
->nx
= is_nx(vcpu
);
3950 g_context
->root_level
= PT64_ROOT_LEVEL
;
3951 reset_rsvds_bits_mask(vcpu
, g_context
);
3952 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
3953 } else if (is_pae(vcpu
)) {
3954 g_context
->nx
= is_nx(vcpu
);
3955 g_context
->root_level
= PT32E_ROOT_LEVEL
;
3956 reset_rsvds_bits_mask(vcpu
, g_context
);
3957 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
3959 g_context
->nx
= false;
3960 g_context
->root_level
= PT32_ROOT_LEVEL
;
3961 reset_rsvds_bits_mask(vcpu
, g_context
);
3962 g_context
->gva_to_gpa
= paging32_gva_to_gpa_nested
;
3965 update_permission_bitmask(vcpu
, g_context
, false);
3966 update_last_pte_bitmap(vcpu
, g_context
);
3969 static void init_kvm_mmu(struct kvm_vcpu
*vcpu
)
3971 if (mmu_is_nested(vcpu
))
3972 init_kvm_nested_mmu(vcpu
);
3973 else if (tdp_enabled
)
3974 init_kvm_tdp_mmu(vcpu
);
3976 init_kvm_softmmu(vcpu
);
3979 void kvm_mmu_reset_context(struct kvm_vcpu
*vcpu
)
3981 kvm_mmu_unload(vcpu
);
3984 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context
);
3986 int kvm_mmu_load(struct kvm_vcpu
*vcpu
)
3990 r
= mmu_topup_memory_caches(vcpu
);
3993 r
= mmu_alloc_roots(vcpu
);
3994 kvm_mmu_sync_roots(vcpu
);
3997 /* set_cr3() should ensure TLB has been flushed */
3998 vcpu
->arch
.mmu
.set_cr3(vcpu
, vcpu
->arch
.mmu
.root_hpa
);
4002 EXPORT_SYMBOL_GPL(kvm_mmu_load
);
4004 void kvm_mmu_unload(struct kvm_vcpu
*vcpu
)
4006 mmu_free_roots(vcpu
);
4007 WARN_ON(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
4009 EXPORT_SYMBOL_GPL(kvm_mmu_unload
);
4011 static void mmu_pte_write_new_pte(struct kvm_vcpu
*vcpu
,
4012 struct kvm_mmu_page
*sp
, u64
*spte
,
4015 if (sp
->role
.level
!= PT_PAGE_TABLE_LEVEL
) {
4016 ++vcpu
->kvm
->stat
.mmu_pde_zapped
;
4020 ++vcpu
->kvm
->stat
.mmu_pte_updated
;
4021 vcpu
->arch
.mmu
.update_pte(vcpu
, sp
, spte
, new);
4024 static bool need_remote_flush(u64 old
, u64
new)
4026 if (!is_shadow_present_pte(old
))
4028 if (!is_shadow_present_pte(new))
4030 if ((old
^ new) & PT64_BASE_ADDR_MASK
)
4032 old
^= shadow_nx_mask
;
4033 new ^= shadow_nx_mask
;
4034 return (old
& ~new & PT64_PERM_MASK
) != 0;
4037 static void mmu_pte_write_flush_tlb(struct kvm_vcpu
*vcpu
, bool zap_page
,
4038 bool remote_flush
, bool local_flush
)
4044 kvm_flush_remote_tlbs(vcpu
->kvm
);
4045 else if (local_flush
)
4046 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
4049 static u64
mmu_pte_write_fetch_gpte(struct kvm_vcpu
*vcpu
, gpa_t
*gpa
,
4050 const u8
*new, int *bytes
)
4056 * Assume that the pte write on a page table of the same type
4057 * as the current vcpu paging mode since we update the sptes only
4058 * when they have the same mode.
4060 if (is_pae(vcpu
) && *bytes
== 4) {
4061 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
4064 r
= kvm_vcpu_read_guest(vcpu
, *gpa
, &gentry
, 8);
4067 new = (const u8
*)&gentry
;
4072 gentry
= *(const u32
*)new;
4075 gentry
= *(const u64
*)new;
4086 * If we're seeing too many writes to a page, it may no longer be a page table,
4087 * or we may be forking, in which case it is better to unmap the page.
4089 static bool detect_write_flooding(struct kvm_mmu_page
*sp
)
4092 * Skip write-flooding detected for the sp whose level is 1, because
4093 * it can become unsync, then the guest page is not write-protected.
4095 if (sp
->role
.level
== PT_PAGE_TABLE_LEVEL
)
4098 return ++sp
->write_flooding_count
>= 3;
4102 * Misaligned accesses are too much trouble to fix up; also, they usually
4103 * indicate a page is not used as a page table.
4105 static bool detect_write_misaligned(struct kvm_mmu_page
*sp
, gpa_t gpa
,
4108 unsigned offset
, pte_size
, misaligned
;
4110 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4111 gpa
, bytes
, sp
->role
.word
);
4113 offset
= offset_in_page(gpa
);
4114 pte_size
= sp
->role
.cr4_pae
? 8 : 4;
4117 * Sometimes, the OS only writes the last one bytes to update status
4118 * bits, for example, in linux, andb instruction is used in clear_bit().
4120 if (!(offset
& (pte_size
- 1)) && bytes
== 1)
4123 misaligned
= (offset
^ (offset
+ bytes
- 1)) & ~(pte_size
- 1);
4124 misaligned
|= bytes
< 4;
4129 static u64
*get_written_sptes(struct kvm_mmu_page
*sp
, gpa_t gpa
, int *nspte
)
4131 unsigned page_offset
, quadrant
;
4135 page_offset
= offset_in_page(gpa
);
4136 level
= sp
->role
.level
;
4138 if (!sp
->role
.cr4_pae
) {
4139 page_offset
<<= 1; /* 32->64 */
4141 * A 32-bit pde maps 4MB while the shadow pdes map
4142 * only 2MB. So we need to double the offset again
4143 * and zap two pdes instead of one.
4145 if (level
== PT32_ROOT_LEVEL
) {
4146 page_offset
&= ~7; /* kill rounding error */
4150 quadrant
= page_offset
>> PAGE_SHIFT
;
4151 page_offset
&= ~PAGE_MASK
;
4152 if (quadrant
!= sp
->role
.quadrant
)
4156 spte
= &sp
->spt
[page_offset
/ sizeof(*spte
)];
4160 void kvm_mmu_pte_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4161 const u8
*new, int bytes
)
4163 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
4164 struct kvm_mmu_page
*sp
;
4165 LIST_HEAD(invalid_list
);
4166 u64 entry
, gentry
, *spte
;
4168 bool remote_flush
, local_flush
, zap_page
;
4169 union kvm_mmu_page_role mask
= { };
4174 mask
.smep_andnot_wp
= 1;
4175 mask
.smap_andnot_wp
= 1;
4179 * If we don't have indirect shadow pages, it means no page is
4180 * write-protected, so we can exit simply.
4182 if (!ACCESS_ONCE(vcpu
->kvm
->arch
.indirect_shadow_pages
))
4185 zap_page
= remote_flush
= local_flush
= false;
4187 pgprintk("%s: gpa %llx bytes %d\n", __func__
, gpa
, bytes
);
4189 gentry
= mmu_pte_write_fetch_gpte(vcpu
, &gpa
, new, &bytes
);
4192 * No need to care whether allocation memory is successful
4193 * or not since pte prefetch is skiped if it does not have
4194 * enough objects in the cache.
4196 mmu_topup_memory_caches(vcpu
);
4198 spin_lock(&vcpu
->kvm
->mmu_lock
);
4199 ++vcpu
->kvm
->stat
.mmu_pte_write
;
4200 kvm_mmu_audit(vcpu
, AUDIT_PRE_PTE_WRITE
);
4202 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, sp
, gfn
) {
4203 if (detect_write_misaligned(sp
, gpa
, bytes
) ||
4204 detect_write_flooding(sp
)) {
4205 zap_page
|= !!kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
4207 ++vcpu
->kvm
->stat
.mmu_flooded
;
4211 spte
= get_written_sptes(sp
, gpa
, &npte
);
4218 mmu_page_zap_pte(vcpu
->kvm
, sp
, spte
);
4220 !((sp
->role
.word
^ vcpu
->arch
.mmu
.base_role
.word
)
4221 & mask
.word
) && rmap_can_add(vcpu
))
4222 mmu_pte_write_new_pte(vcpu
, sp
, spte
, &gentry
);
4223 if (need_remote_flush(entry
, *spte
))
4224 remote_flush
= true;
4228 mmu_pte_write_flush_tlb(vcpu
, zap_page
, remote_flush
, local_flush
);
4229 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
4230 kvm_mmu_audit(vcpu
, AUDIT_POST_PTE_WRITE
);
4231 spin_unlock(&vcpu
->kvm
->mmu_lock
);
4234 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu
*vcpu
, gva_t gva
)
4239 if (vcpu
->arch
.mmu
.direct_map
)
4242 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, gva
, NULL
);
4244 r
= kvm_mmu_unprotect_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4248 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt
);
4250 static void make_mmu_pages_available(struct kvm_vcpu
*vcpu
)
4252 LIST_HEAD(invalid_list
);
4254 if (likely(kvm_mmu_available_pages(vcpu
->kvm
) >= KVM_MIN_FREE_MMU_PAGES
))
4257 while (kvm_mmu_available_pages(vcpu
->kvm
) < KVM_REFILL_PAGES
) {
4258 if (!prepare_zap_oldest_mmu_page(vcpu
->kvm
, &invalid_list
))
4261 ++vcpu
->kvm
->stat
.mmu_recycled
;
4263 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
4266 static bool is_mmio_page_fault(struct kvm_vcpu
*vcpu
, gva_t addr
)
4268 if (vcpu
->arch
.mmu
.direct_map
|| mmu_is_nested(vcpu
))
4269 return vcpu_match_mmio_gpa(vcpu
, addr
);
4271 return vcpu_match_mmio_gva(vcpu
, addr
);
4274 int kvm_mmu_page_fault(struct kvm_vcpu
*vcpu
, gva_t cr2
, u32 error_code
,
4275 void *insn
, int insn_len
)
4277 int r
, emulation_type
= EMULTYPE_RETRY
;
4278 enum emulation_result er
;
4280 r
= vcpu
->arch
.mmu
.page_fault(vcpu
, cr2
, error_code
, false);
4289 if (is_mmio_page_fault(vcpu
, cr2
))
4292 er
= x86_emulate_instruction(vcpu
, cr2
, emulation_type
, insn
, insn_len
);
4297 case EMULATE_USER_EXIT
:
4298 ++vcpu
->stat
.mmio_exits
;
4308 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault
);
4310 void kvm_mmu_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
4312 vcpu
->arch
.mmu
.invlpg(vcpu
, gva
);
4313 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
4314 ++vcpu
->stat
.invlpg
;
4316 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg
);
4318 void kvm_enable_tdp(void)
4322 EXPORT_SYMBOL_GPL(kvm_enable_tdp
);
4324 void kvm_disable_tdp(void)
4326 tdp_enabled
= false;
4328 EXPORT_SYMBOL_GPL(kvm_disable_tdp
);
4330 static void free_mmu_pages(struct kvm_vcpu
*vcpu
)
4332 free_page((unsigned long)vcpu
->arch
.mmu
.pae_root
);
4333 if (vcpu
->arch
.mmu
.lm_root
!= NULL
)
4334 free_page((unsigned long)vcpu
->arch
.mmu
.lm_root
);
4337 static int alloc_mmu_pages(struct kvm_vcpu
*vcpu
)
4343 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
4344 * Therefore we need to allocate shadow page tables in the first
4345 * 4GB of memory, which happens to fit the DMA32 zone.
4347 page
= alloc_page(GFP_KERNEL
| __GFP_DMA32
);
4351 vcpu
->arch
.mmu
.pae_root
= page_address(page
);
4352 for (i
= 0; i
< 4; ++i
)
4353 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
4358 int kvm_mmu_create(struct kvm_vcpu
*vcpu
)
4360 vcpu
->arch
.walk_mmu
= &vcpu
->arch
.mmu
;
4361 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
4362 vcpu
->arch
.mmu
.translate_gpa
= translate_gpa
;
4363 vcpu
->arch
.nested_mmu
.translate_gpa
= translate_nested_gpa
;
4365 return alloc_mmu_pages(vcpu
);
4368 void kvm_mmu_setup(struct kvm_vcpu
*vcpu
)
4370 MMU_WARN_ON(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
4375 /* The return value indicates if tlb flush on all vcpus is needed. */
4376 typedef bool (*slot_level_handler
) (struct kvm
*kvm
, unsigned long *rmap
);
4378 /* The caller should hold mmu-lock before calling this function. */
4380 slot_handle_level_range(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
,
4381 slot_level_handler fn
, int start_level
, int end_level
,
4382 gfn_t start_gfn
, gfn_t end_gfn
, bool lock_flush_tlb
)
4384 struct slot_rmap_walk_iterator iterator
;
4387 for_each_slot_rmap_range(memslot
, start_level
, end_level
, start_gfn
,
4388 end_gfn
, &iterator
) {
4390 flush
|= fn(kvm
, iterator
.rmap
);
4392 if (need_resched() || spin_needbreak(&kvm
->mmu_lock
)) {
4393 if (flush
&& lock_flush_tlb
) {
4394 kvm_flush_remote_tlbs(kvm
);
4397 cond_resched_lock(&kvm
->mmu_lock
);
4401 if (flush
&& lock_flush_tlb
) {
4402 kvm_flush_remote_tlbs(kvm
);
4410 slot_handle_level(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
,
4411 slot_level_handler fn
, int start_level
, int end_level
,
4412 bool lock_flush_tlb
)
4414 return slot_handle_level_range(kvm
, memslot
, fn
, start_level
,
4415 end_level
, memslot
->base_gfn
,
4416 memslot
->base_gfn
+ memslot
->npages
- 1,
4421 slot_handle_all_level(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
,
4422 slot_level_handler fn
, bool lock_flush_tlb
)
4424 return slot_handle_level(kvm
, memslot
, fn
, PT_PAGE_TABLE_LEVEL
,
4425 PT_MAX_HUGEPAGE_LEVEL
, lock_flush_tlb
);
4429 slot_handle_large_level(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
,
4430 slot_level_handler fn
, bool lock_flush_tlb
)
4432 return slot_handle_level(kvm
, memslot
, fn
, PT_PAGE_TABLE_LEVEL
+ 1,
4433 PT_MAX_HUGEPAGE_LEVEL
, lock_flush_tlb
);
4437 slot_handle_leaf(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
,
4438 slot_level_handler fn
, bool lock_flush_tlb
)
4440 return slot_handle_level(kvm
, memslot
, fn
, PT_PAGE_TABLE_LEVEL
,
4441 PT_PAGE_TABLE_LEVEL
, lock_flush_tlb
);
4444 void kvm_zap_gfn_range(struct kvm
*kvm
, gfn_t gfn_start
, gfn_t gfn_end
)
4446 struct kvm_memslots
*slots
;
4447 struct kvm_memory_slot
*memslot
;
4450 spin_lock(&kvm
->mmu_lock
);
4451 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
4452 slots
= __kvm_memslots(kvm
, i
);
4453 kvm_for_each_memslot(memslot
, slots
) {
4456 start
= max(gfn_start
, memslot
->base_gfn
);
4457 end
= min(gfn_end
, memslot
->base_gfn
+ memslot
->npages
);
4461 slot_handle_level_range(kvm
, memslot
, kvm_zap_rmapp
,
4462 PT_PAGE_TABLE_LEVEL
, PT_MAX_HUGEPAGE_LEVEL
,
4463 start
, end
- 1, true);
4467 spin_unlock(&kvm
->mmu_lock
);
4470 static bool slot_rmap_write_protect(struct kvm
*kvm
, unsigned long *rmapp
)
4472 return __rmap_write_protect(kvm
, rmapp
, false);
4475 void kvm_mmu_slot_remove_write_access(struct kvm
*kvm
,
4476 struct kvm_memory_slot
*memslot
)
4480 spin_lock(&kvm
->mmu_lock
);
4481 flush
= slot_handle_all_level(kvm
, memslot
, slot_rmap_write_protect
,
4483 spin_unlock(&kvm
->mmu_lock
);
4486 * kvm_mmu_slot_remove_write_access() and kvm_vm_ioctl_get_dirty_log()
4487 * which do tlb flush out of mmu-lock should be serialized by
4488 * kvm->slots_lock otherwise tlb flush would be missed.
4490 lockdep_assert_held(&kvm
->slots_lock
);
4493 * We can flush all the TLBs out of the mmu lock without TLB
4494 * corruption since we just change the spte from writable to
4495 * readonly so that we only need to care the case of changing
4496 * spte from present to present (changing the spte from present
4497 * to nonpresent will flush all the TLBs immediately), in other
4498 * words, the only case we care is mmu_spte_update() where we
4499 * haved checked SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE
4500 * instead of PT_WRITABLE_MASK, that means it does not depend
4501 * on PT_WRITABLE_MASK anymore.
4504 kvm_flush_remote_tlbs(kvm
);
4507 static bool kvm_mmu_zap_collapsible_spte(struct kvm
*kvm
,
4508 unsigned long *rmapp
)
4511 struct rmap_iterator iter
;
4512 int need_tlb_flush
= 0;
4514 struct kvm_mmu_page
*sp
;
4517 for_each_rmap_spte(rmapp
, &iter
, sptep
) {
4518 sp
= page_header(__pa(sptep
));
4519 pfn
= spte_to_pfn(*sptep
);
4522 * We cannot do huge page mapping for indirect shadow pages,
4523 * which are found on the last rmap (level = 1) when not using
4524 * tdp; such shadow pages are synced with the page table in
4525 * the guest, and the guest page table is using 4K page size
4526 * mapping if the indirect sp has level = 1.
4528 if (sp
->role
.direct
&&
4529 !kvm_is_reserved_pfn(pfn
) &&
4530 PageTransCompound(pfn_to_page(pfn
))) {
4531 drop_spte(kvm
, sptep
);
4537 return need_tlb_flush
;
4540 void kvm_mmu_zap_collapsible_sptes(struct kvm
*kvm
,
4541 const struct kvm_memory_slot
*memslot
)
4543 /* FIXME: const-ify all uses of struct kvm_memory_slot. */
4544 spin_lock(&kvm
->mmu_lock
);
4545 slot_handle_leaf(kvm
, (struct kvm_memory_slot
*)memslot
,
4546 kvm_mmu_zap_collapsible_spte
, true);
4547 spin_unlock(&kvm
->mmu_lock
);
4550 void kvm_mmu_slot_leaf_clear_dirty(struct kvm
*kvm
,
4551 struct kvm_memory_slot
*memslot
)
4555 spin_lock(&kvm
->mmu_lock
);
4556 flush
= slot_handle_leaf(kvm
, memslot
, __rmap_clear_dirty
, false);
4557 spin_unlock(&kvm
->mmu_lock
);
4559 lockdep_assert_held(&kvm
->slots_lock
);
4562 * It's also safe to flush TLBs out of mmu lock here as currently this
4563 * function is only used for dirty logging, in which case flushing TLB
4564 * out of mmu lock also guarantees no dirty pages will be lost in
4568 kvm_flush_remote_tlbs(kvm
);
4570 EXPORT_SYMBOL_GPL(kvm_mmu_slot_leaf_clear_dirty
);
4572 void kvm_mmu_slot_largepage_remove_write_access(struct kvm
*kvm
,
4573 struct kvm_memory_slot
*memslot
)
4577 spin_lock(&kvm
->mmu_lock
);
4578 flush
= slot_handle_large_level(kvm
, memslot
, slot_rmap_write_protect
,
4580 spin_unlock(&kvm
->mmu_lock
);
4582 /* see kvm_mmu_slot_remove_write_access */
4583 lockdep_assert_held(&kvm
->slots_lock
);
4586 kvm_flush_remote_tlbs(kvm
);
4588 EXPORT_SYMBOL_GPL(kvm_mmu_slot_largepage_remove_write_access
);
4590 void kvm_mmu_slot_set_dirty(struct kvm
*kvm
,
4591 struct kvm_memory_slot
*memslot
)
4595 spin_lock(&kvm
->mmu_lock
);
4596 flush
= slot_handle_all_level(kvm
, memslot
, __rmap_set_dirty
, false);
4597 spin_unlock(&kvm
->mmu_lock
);
4599 lockdep_assert_held(&kvm
->slots_lock
);
4601 /* see kvm_mmu_slot_leaf_clear_dirty */
4603 kvm_flush_remote_tlbs(kvm
);
4605 EXPORT_SYMBOL_GPL(kvm_mmu_slot_set_dirty
);
4607 #define BATCH_ZAP_PAGES 10
4608 static void kvm_zap_obsolete_pages(struct kvm
*kvm
)
4610 struct kvm_mmu_page
*sp
, *node
;
4614 list_for_each_entry_safe_reverse(sp
, node
,
4615 &kvm
->arch
.active_mmu_pages
, link
) {
4619 * No obsolete page exists before new created page since
4620 * active_mmu_pages is the FIFO list.
4622 if (!is_obsolete_sp(kvm
, sp
))
4626 * Since we are reversely walking the list and the invalid
4627 * list will be moved to the head, skip the invalid page
4628 * can help us to avoid the infinity list walking.
4630 if (sp
->role
.invalid
)
4634 * Need not flush tlb since we only zap the sp with invalid
4635 * generation number.
4637 if (batch
>= BATCH_ZAP_PAGES
&&
4638 cond_resched_lock(&kvm
->mmu_lock
)) {
4643 ret
= kvm_mmu_prepare_zap_page(kvm
, sp
,
4644 &kvm
->arch
.zapped_obsolete_pages
);
4652 * Should flush tlb before free page tables since lockless-walking
4653 * may use the pages.
4655 kvm_mmu_commit_zap_page(kvm
, &kvm
->arch
.zapped_obsolete_pages
);
4659 * Fast invalidate all shadow pages and use lock-break technique
4660 * to zap obsolete pages.
4662 * It's required when memslot is being deleted or VM is being
4663 * destroyed, in these cases, we should ensure that KVM MMU does
4664 * not use any resource of the being-deleted slot or all slots
4665 * after calling the function.
4667 void kvm_mmu_invalidate_zap_all_pages(struct kvm
*kvm
)
4669 spin_lock(&kvm
->mmu_lock
);
4670 trace_kvm_mmu_invalidate_zap_all_pages(kvm
);
4671 kvm
->arch
.mmu_valid_gen
++;
4674 * Notify all vcpus to reload its shadow page table
4675 * and flush TLB. Then all vcpus will switch to new
4676 * shadow page table with the new mmu_valid_gen.
4678 * Note: we should do this under the protection of
4679 * mmu-lock, otherwise, vcpu would purge shadow page
4680 * but miss tlb flush.
4682 kvm_reload_remote_mmus(kvm
);
4684 kvm_zap_obsolete_pages(kvm
);
4685 spin_unlock(&kvm
->mmu_lock
);
4688 static bool kvm_has_zapped_obsolete_pages(struct kvm
*kvm
)
4690 return unlikely(!list_empty_careful(&kvm
->arch
.zapped_obsolete_pages
));
4693 void kvm_mmu_invalidate_mmio_sptes(struct kvm
*kvm
, struct kvm_memslots
*slots
)
4696 * The very rare case: if the generation-number is round,
4697 * zap all shadow pages.
4699 if (unlikely((slots
->generation
& MMIO_GEN_MASK
) == 0)) {
4700 printk_ratelimited(KERN_DEBUG
"kvm: zapping shadow pages for mmio generation wraparound\n");
4701 kvm_mmu_invalidate_zap_all_pages(kvm
);
4705 static unsigned long
4706 mmu_shrink_scan(struct shrinker
*shrink
, struct shrink_control
*sc
)
4709 int nr_to_scan
= sc
->nr_to_scan
;
4710 unsigned long freed
= 0;
4712 spin_lock(&kvm_lock
);
4714 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
4716 LIST_HEAD(invalid_list
);
4719 * Never scan more than sc->nr_to_scan VM instances.
4720 * Will not hit this condition practically since we do not try
4721 * to shrink more than one VM and it is very unlikely to see
4722 * !n_used_mmu_pages so many times.
4727 * n_used_mmu_pages is accessed without holding kvm->mmu_lock
4728 * here. We may skip a VM instance errorneosly, but we do not
4729 * want to shrink a VM that only started to populate its MMU
4732 if (!kvm
->arch
.n_used_mmu_pages
&&
4733 !kvm_has_zapped_obsolete_pages(kvm
))
4736 idx
= srcu_read_lock(&kvm
->srcu
);
4737 spin_lock(&kvm
->mmu_lock
);
4739 if (kvm_has_zapped_obsolete_pages(kvm
)) {
4740 kvm_mmu_commit_zap_page(kvm
,
4741 &kvm
->arch
.zapped_obsolete_pages
);
4745 if (prepare_zap_oldest_mmu_page(kvm
, &invalid_list
))
4747 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
4750 spin_unlock(&kvm
->mmu_lock
);
4751 srcu_read_unlock(&kvm
->srcu
, idx
);
4754 * unfair on small ones
4755 * per-vm shrinkers cry out
4756 * sadness comes quickly
4758 list_move_tail(&kvm
->vm_list
, &vm_list
);
4762 spin_unlock(&kvm_lock
);
4766 static unsigned long
4767 mmu_shrink_count(struct shrinker
*shrink
, struct shrink_control
*sc
)
4769 return percpu_counter_read_positive(&kvm_total_used_mmu_pages
);
4772 static struct shrinker mmu_shrinker
= {
4773 .count_objects
= mmu_shrink_count
,
4774 .scan_objects
= mmu_shrink_scan
,
4775 .seeks
= DEFAULT_SEEKS
* 10,
4778 static void mmu_destroy_caches(void)
4780 if (pte_list_desc_cache
)
4781 kmem_cache_destroy(pte_list_desc_cache
);
4782 if (mmu_page_header_cache
)
4783 kmem_cache_destroy(mmu_page_header_cache
);
4786 int kvm_mmu_module_init(void)
4788 pte_list_desc_cache
= kmem_cache_create("pte_list_desc",
4789 sizeof(struct pte_list_desc
),
4791 if (!pte_list_desc_cache
)
4794 mmu_page_header_cache
= kmem_cache_create("kvm_mmu_page_header",
4795 sizeof(struct kvm_mmu_page
),
4797 if (!mmu_page_header_cache
)
4800 if (percpu_counter_init(&kvm_total_used_mmu_pages
, 0, GFP_KERNEL
))
4803 register_shrinker(&mmu_shrinker
);
4808 mmu_destroy_caches();
4813 * Caculate mmu pages needed for kvm.
4815 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm
*kvm
)
4817 unsigned int nr_mmu_pages
;
4818 unsigned int nr_pages
= 0;
4819 struct kvm_memslots
*slots
;
4820 struct kvm_memory_slot
*memslot
;
4823 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
4824 slots
= __kvm_memslots(kvm
, i
);
4826 kvm_for_each_memslot(memslot
, slots
)
4827 nr_pages
+= memslot
->npages
;
4830 nr_mmu_pages
= nr_pages
* KVM_PERMILLE_MMU_PAGES
/ 1000;
4831 nr_mmu_pages
= max(nr_mmu_pages
,
4832 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES
);
4834 return nr_mmu_pages
;
4837 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu
*vcpu
, u64 addr
, u64 sptes
[4])
4839 struct kvm_shadow_walk_iterator iterator
;
4843 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
4846 walk_shadow_page_lockless_begin(vcpu
);
4847 for_each_shadow_entry_lockless(vcpu
, addr
, iterator
, spte
) {
4848 sptes
[iterator
.level
-1] = spte
;
4850 if (!is_shadow_present_pte(spte
))
4853 walk_shadow_page_lockless_end(vcpu
);
4857 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy
);
4859 void kvm_mmu_destroy(struct kvm_vcpu
*vcpu
)
4861 kvm_mmu_unload(vcpu
);
4862 free_mmu_pages(vcpu
);
4863 mmu_free_memory_caches(vcpu
);
4866 void kvm_mmu_module_exit(void)
4868 mmu_destroy_caches();
4869 percpu_counter_destroy(&kvm_total_used_mmu_pages
);
4870 unregister_shrinker(&mmu_shrinker
);
4871 mmu_audit_disable();