KVM: MMU: dont hold pagecount reference for mapped sptes pages
[deliverable/linux.git] / arch / x86 / kvm / mmu.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
19
20 #include "mmu.h"
21 #include "kvm_cache_regs.h"
22
23 #include <linux/kvm_host.h>
24 #include <linux/types.h>
25 #include <linux/string.h>
26 #include <linux/mm.h>
27 #include <linux/highmem.h>
28 #include <linux/module.h>
29 #include <linux/swap.h>
30 #include <linux/hugetlb.h>
31 #include <linux/compiler.h>
32
33 #include <asm/page.h>
34 #include <asm/cmpxchg.h>
35 #include <asm/io.h>
36 #include <asm/vmx.h>
37
38 /*
39 * When setting this variable to true it enables Two-Dimensional-Paging
40 * where the hardware walks 2 page tables:
41 * 1. the guest-virtual to guest-physical
42 * 2. while doing 1. it walks guest-physical to host-physical
43 * If the hardware supports that we don't need to do shadow paging.
44 */
45 bool tdp_enabled = false;
46
47 #undef MMU_DEBUG
48
49 #undef AUDIT
50
51 #ifdef AUDIT
52 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
53 #else
54 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
55 #endif
56
57 #ifdef MMU_DEBUG
58
59 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
60 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
61
62 #else
63
64 #define pgprintk(x...) do { } while (0)
65 #define rmap_printk(x...) do { } while (0)
66
67 #endif
68
69 #if defined(MMU_DEBUG) || defined(AUDIT)
70 static int dbg = 0;
71 module_param(dbg, bool, 0644);
72 #endif
73
74 static int oos_shadow = 1;
75 module_param(oos_shadow, bool, 0644);
76
77 #ifndef MMU_DEBUG
78 #define ASSERT(x) do { } while (0)
79 #else
80 #define ASSERT(x) \
81 if (!(x)) { \
82 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
83 __FILE__, __LINE__, #x); \
84 }
85 #endif
86
87 #define PT_FIRST_AVAIL_BITS_SHIFT 9
88 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
89
90 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
91
92 #define PT64_LEVEL_BITS 9
93
94 #define PT64_LEVEL_SHIFT(level) \
95 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
96
97 #define PT64_LEVEL_MASK(level) \
98 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
99
100 #define PT64_INDEX(address, level)\
101 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
102
103
104 #define PT32_LEVEL_BITS 10
105
106 #define PT32_LEVEL_SHIFT(level) \
107 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
108
109 #define PT32_LEVEL_MASK(level) \
110 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
111 #define PT32_LVL_OFFSET_MASK(level) \
112 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
113 * PT32_LEVEL_BITS))) - 1))
114
115 #define PT32_INDEX(address, level)\
116 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
117
118
119 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
120 #define PT64_DIR_BASE_ADDR_MASK \
121 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
122 #define PT64_LVL_ADDR_MASK(level) \
123 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
124 * PT64_LEVEL_BITS))) - 1))
125 #define PT64_LVL_OFFSET_MASK(level) \
126 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
127 * PT64_LEVEL_BITS))) - 1))
128
129 #define PT32_BASE_ADDR_MASK PAGE_MASK
130 #define PT32_DIR_BASE_ADDR_MASK \
131 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
132 #define PT32_LVL_ADDR_MASK(level) \
133 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
134 * PT32_LEVEL_BITS))) - 1))
135
136 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
137 | PT64_NX_MASK)
138
139 #define PFERR_PRESENT_MASK (1U << 0)
140 #define PFERR_WRITE_MASK (1U << 1)
141 #define PFERR_USER_MASK (1U << 2)
142 #define PFERR_RSVD_MASK (1U << 3)
143 #define PFERR_FETCH_MASK (1U << 4)
144
145 #define PT_PDPE_LEVEL 3
146 #define PT_DIRECTORY_LEVEL 2
147 #define PT_PAGE_TABLE_LEVEL 1
148
149 #define RMAP_EXT 4
150
151 #define ACC_EXEC_MASK 1
152 #define ACC_WRITE_MASK PT_WRITABLE_MASK
153 #define ACC_USER_MASK PT_USER_MASK
154 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
155
156 #define CREATE_TRACE_POINTS
157 #include "mmutrace.h"
158
159 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
160
161 struct kvm_rmap_desc {
162 u64 *sptes[RMAP_EXT];
163 struct kvm_rmap_desc *more;
164 };
165
166 struct kvm_shadow_walk_iterator {
167 u64 addr;
168 hpa_t shadow_addr;
169 int level;
170 u64 *sptep;
171 unsigned index;
172 };
173
174 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
175 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
176 shadow_walk_okay(&(_walker)); \
177 shadow_walk_next(&(_walker)))
178
179
180 struct kvm_unsync_walk {
181 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
182 };
183
184 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
185
186 static struct kmem_cache *pte_chain_cache;
187 static struct kmem_cache *rmap_desc_cache;
188 static struct kmem_cache *mmu_page_header_cache;
189
190 static u64 __read_mostly shadow_trap_nonpresent_pte;
191 static u64 __read_mostly shadow_notrap_nonpresent_pte;
192 static u64 __read_mostly shadow_base_present_pte;
193 static u64 __read_mostly shadow_nx_mask;
194 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
195 static u64 __read_mostly shadow_user_mask;
196 static u64 __read_mostly shadow_accessed_mask;
197 static u64 __read_mostly shadow_dirty_mask;
198
199 static inline u64 rsvd_bits(int s, int e)
200 {
201 return ((1ULL << (e - s + 1)) - 1) << s;
202 }
203
204 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
205 {
206 shadow_trap_nonpresent_pte = trap_pte;
207 shadow_notrap_nonpresent_pte = notrap_pte;
208 }
209 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
210
211 void kvm_mmu_set_base_ptes(u64 base_pte)
212 {
213 shadow_base_present_pte = base_pte;
214 }
215 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
216
217 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
218 u64 dirty_mask, u64 nx_mask, u64 x_mask)
219 {
220 shadow_user_mask = user_mask;
221 shadow_accessed_mask = accessed_mask;
222 shadow_dirty_mask = dirty_mask;
223 shadow_nx_mask = nx_mask;
224 shadow_x_mask = x_mask;
225 }
226 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
227
228 static int is_write_protection(struct kvm_vcpu *vcpu)
229 {
230 return vcpu->arch.cr0 & X86_CR0_WP;
231 }
232
233 static int is_cpuid_PSE36(void)
234 {
235 return 1;
236 }
237
238 static int is_nx(struct kvm_vcpu *vcpu)
239 {
240 return vcpu->arch.shadow_efer & EFER_NX;
241 }
242
243 static int is_shadow_present_pte(u64 pte)
244 {
245 return pte != shadow_trap_nonpresent_pte
246 && pte != shadow_notrap_nonpresent_pte;
247 }
248
249 static int is_large_pte(u64 pte)
250 {
251 return pte & PT_PAGE_SIZE_MASK;
252 }
253
254 static int is_writeble_pte(unsigned long pte)
255 {
256 return pte & PT_WRITABLE_MASK;
257 }
258
259 static int is_dirty_gpte(unsigned long pte)
260 {
261 return pte & PT_DIRTY_MASK;
262 }
263
264 static int is_rmap_spte(u64 pte)
265 {
266 return is_shadow_present_pte(pte);
267 }
268
269 static int is_last_spte(u64 pte, int level)
270 {
271 if (level == PT_PAGE_TABLE_LEVEL)
272 return 1;
273 if (is_large_pte(pte))
274 return 1;
275 return 0;
276 }
277
278 static pfn_t spte_to_pfn(u64 pte)
279 {
280 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
281 }
282
283 static gfn_t pse36_gfn_delta(u32 gpte)
284 {
285 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
286
287 return (gpte & PT32_DIR_PSE36_MASK) << shift;
288 }
289
290 static void __set_spte(u64 *sptep, u64 spte)
291 {
292 #ifdef CONFIG_X86_64
293 set_64bit((unsigned long *)sptep, spte);
294 #else
295 set_64bit((unsigned long long *)sptep, spte);
296 #endif
297 }
298
299 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
300 struct kmem_cache *base_cache, int min)
301 {
302 void *obj;
303
304 if (cache->nobjs >= min)
305 return 0;
306 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
307 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
308 if (!obj)
309 return -ENOMEM;
310 cache->objects[cache->nobjs++] = obj;
311 }
312 return 0;
313 }
314
315 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
316 {
317 while (mc->nobjs)
318 kfree(mc->objects[--mc->nobjs]);
319 }
320
321 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
322 int min)
323 {
324 struct page *page;
325
326 if (cache->nobjs >= min)
327 return 0;
328 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
329 page = alloc_page(GFP_KERNEL);
330 if (!page)
331 return -ENOMEM;
332 set_page_private(page, 0);
333 cache->objects[cache->nobjs++] = page_address(page);
334 }
335 return 0;
336 }
337
338 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
339 {
340 while (mc->nobjs)
341 free_page((unsigned long)mc->objects[--mc->nobjs]);
342 }
343
344 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
345 {
346 int r;
347
348 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
349 pte_chain_cache, 4);
350 if (r)
351 goto out;
352 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
353 rmap_desc_cache, 4);
354 if (r)
355 goto out;
356 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
357 if (r)
358 goto out;
359 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
360 mmu_page_header_cache, 4);
361 out:
362 return r;
363 }
364
365 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
366 {
367 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
368 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
369 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
370 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
371 }
372
373 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
374 size_t size)
375 {
376 void *p;
377
378 BUG_ON(!mc->nobjs);
379 p = mc->objects[--mc->nobjs];
380 return p;
381 }
382
383 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
384 {
385 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
386 sizeof(struct kvm_pte_chain));
387 }
388
389 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
390 {
391 kfree(pc);
392 }
393
394 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
395 {
396 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
397 sizeof(struct kvm_rmap_desc));
398 }
399
400 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
401 {
402 kfree(rd);
403 }
404
405 /*
406 * Return the pointer to the largepage write count for a given
407 * gfn, handling slots that are not large page aligned.
408 */
409 static int *slot_largepage_idx(gfn_t gfn,
410 struct kvm_memory_slot *slot,
411 int level)
412 {
413 unsigned long idx;
414
415 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
416 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
417 return &slot->lpage_info[level - 2][idx].write_count;
418 }
419
420 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
421 {
422 struct kvm_memory_slot *slot;
423 int *write_count;
424 int i;
425
426 gfn = unalias_gfn(kvm, gfn);
427
428 slot = gfn_to_memslot_unaliased(kvm, gfn);
429 for (i = PT_DIRECTORY_LEVEL;
430 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
431 write_count = slot_largepage_idx(gfn, slot, i);
432 *write_count += 1;
433 }
434 }
435
436 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
437 {
438 struct kvm_memory_slot *slot;
439 int *write_count;
440 int i;
441
442 gfn = unalias_gfn(kvm, gfn);
443 for (i = PT_DIRECTORY_LEVEL;
444 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
445 slot = gfn_to_memslot_unaliased(kvm, gfn);
446 write_count = slot_largepage_idx(gfn, slot, i);
447 *write_count -= 1;
448 WARN_ON(*write_count < 0);
449 }
450 }
451
452 static int has_wrprotected_page(struct kvm *kvm,
453 gfn_t gfn,
454 int level)
455 {
456 struct kvm_memory_slot *slot;
457 int *largepage_idx;
458
459 gfn = unalias_gfn(kvm, gfn);
460 slot = gfn_to_memslot_unaliased(kvm, gfn);
461 if (slot) {
462 largepage_idx = slot_largepage_idx(gfn, slot, level);
463 return *largepage_idx;
464 }
465
466 return 1;
467 }
468
469 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
470 {
471 unsigned long page_size = PAGE_SIZE;
472 struct vm_area_struct *vma;
473 unsigned long addr;
474 int i, ret = 0;
475
476 addr = gfn_to_hva(kvm, gfn);
477 if (kvm_is_error_hva(addr))
478 return page_size;
479
480 down_read(&current->mm->mmap_sem);
481 vma = find_vma(current->mm, addr);
482 if (!vma)
483 goto out;
484
485 page_size = vma_kernel_pagesize(vma);
486
487 out:
488 up_read(&current->mm->mmap_sem);
489
490 for (i = PT_PAGE_TABLE_LEVEL;
491 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
492 if (page_size >= KVM_HPAGE_SIZE(i))
493 ret = i;
494 else
495 break;
496 }
497
498 return ret;
499 }
500
501 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
502 {
503 struct kvm_memory_slot *slot;
504 int host_level;
505 int level = PT_PAGE_TABLE_LEVEL;
506
507 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
508 if (slot && slot->dirty_bitmap)
509 return PT_PAGE_TABLE_LEVEL;
510
511 host_level = host_mapping_level(vcpu->kvm, large_gfn);
512
513 if (host_level == PT_PAGE_TABLE_LEVEL)
514 return host_level;
515
516 for (level = PT_DIRECTORY_LEVEL; level <= host_level; ++level) {
517
518 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
519 break;
520 }
521
522 return level - 1;
523 }
524
525 /*
526 * Take gfn and return the reverse mapping to it.
527 * Note: gfn must be unaliased before this function get called
528 */
529
530 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
531 {
532 struct kvm_memory_slot *slot;
533 unsigned long idx;
534
535 slot = gfn_to_memslot(kvm, gfn);
536 if (likely(level == PT_PAGE_TABLE_LEVEL))
537 return &slot->rmap[gfn - slot->base_gfn];
538
539 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
540 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
541
542 return &slot->lpage_info[level - 2][idx].rmap_pde;
543 }
544
545 /*
546 * Reverse mapping data structures:
547 *
548 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
549 * that points to page_address(page).
550 *
551 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
552 * containing more mappings.
553 *
554 * Returns the number of rmap entries before the spte was added or zero if
555 * the spte was not added.
556 *
557 */
558 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
559 {
560 struct kvm_mmu_page *sp;
561 struct kvm_rmap_desc *desc;
562 unsigned long *rmapp;
563 int i, count = 0;
564
565 if (!is_rmap_spte(*spte))
566 return count;
567 gfn = unalias_gfn(vcpu->kvm, gfn);
568 sp = page_header(__pa(spte));
569 sp->gfns[spte - sp->spt] = gfn;
570 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
571 if (!*rmapp) {
572 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
573 *rmapp = (unsigned long)spte;
574 } else if (!(*rmapp & 1)) {
575 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
576 desc = mmu_alloc_rmap_desc(vcpu);
577 desc->sptes[0] = (u64 *)*rmapp;
578 desc->sptes[1] = spte;
579 *rmapp = (unsigned long)desc | 1;
580 } else {
581 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
582 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
583 while (desc->sptes[RMAP_EXT-1] && desc->more) {
584 desc = desc->more;
585 count += RMAP_EXT;
586 }
587 if (desc->sptes[RMAP_EXT-1]) {
588 desc->more = mmu_alloc_rmap_desc(vcpu);
589 desc = desc->more;
590 }
591 for (i = 0; desc->sptes[i]; ++i)
592 ;
593 desc->sptes[i] = spte;
594 }
595 return count;
596 }
597
598 static void rmap_desc_remove_entry(unsigned long *rmapp,
599 struct kvm_rmap_desc *desc,
600 int i,
601 struct kvm_rmap_desc *prev_desc)
602 {
603 int j;
604
605 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
606 ;
607 desc->sptes[i] = desc->sptes[j];
608 desc->sptes[j] = NULL;
609 if (j != 0)
610 return;
611 if (!prev_desc && !desc->more)
612 *rmapp = (unsigned long)desc->sptes[0];
613 else
614 if (prev_desc)
615 prev_desc->more = desc->more;
616 else
617 *rmapp = (unsigned long)desc->more | 1;
618 mmu_free_rmap_desc(desc);
619 }
620
621 static void rmap_remove(struct kvm *kvm, u64 *spte)
622 {
623 struct kvm_rmap_desc *desc;
624 struct kvm_rmap_desc *prev_desc;
625 struct kvm_mmu_page *sp;
626 pfn_t pfn;
627 unsigned long *rmapp;
628 int i;
629
630 if (!is_rmap_spte(*spte))
631 return;
632 sp = page_header(__pa(spte));
633 pfn = spte_to_pfn(*spte);
634 if (*spte & shadow_accessed_mask)
635 kvm_set_pfn_accessed(pfn);
636 if (is_writeble_pte(*spte))
637 kvm_set_pfn_dirty(pfn);
638 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
639 if (!*rmapp) {
640 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
641 BUG();
642 } else if (!(*rmapp & 1)) {
643 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
644 if ((u64 *)*rmapp != spte) {
645 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
646 spte, *spte);
647 BUG();
648 }
649 *rmapp = 0;
650 } else {
651 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
652 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
653 prev_desc = NULL;
654 while (desc) {
655 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
656 if (desc->sptes[i] == spte) {
657 rmap_desc_remove_entry(rmapp,
658 desc, i,
659 prev_desc);
660 return;
661 }
662 prev_desc = desc;
663 desc = desc->more;
664 }
665 BUG();
666 }
667 }
668
669 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
670 {
671 struct kvm_rmap_desc *desc;
672 struct kvm_rmap_desc *prev_desc;
673 u64 *prev_spte;
674 int i;
675
676 if (!*rmapp)
677 return NULL;
678 else if (!(*rmapp & 1)) {
679 if (!spte)
680 return (u64 *)*rmapp;
681 return NULL;
682 }
683 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
684 prev_desc = NULL;
685 prev_spte = NULL;
686 while (desc) {
687 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
688 if (prev_spte == spte)
689 return desc->sptes[i];
690 prev_spte = desc->sptes[i];
691 }
692 desc = desc->more;
693 }
694 return NULL;
695 }
696
697 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
698 {
699 unsigned long *rmapp;
700 u64 *spte;
701 int i, write_protected = 0;
702
703 gfn = unalias_gfn(kvm, gfn);
704 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
705
706 spte = rmap_next(kvm, rmapp, NULL);
707 while (spte) {
708 BUG_ON(!spte);
709 BUG_ON(!(*spte & PT_PRESENT_MASK));
710 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
711 if (is_writeble_pte(*spte)) {
712 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
713 write_protected = 1;
714 }
715 spte = rmap_next(kvm, rmapp, spte);
716 }
717 if (write_protected) {
718 pfn_t pfn;
719
720 spte = rmap_next(kvm, rmapp, NULL);
721 pfn = spte_to_pfn(*spte);
722 kvm_set_pfn_dirty(pfn);
723 }
724
725 /* check for huge page mappings */
726 for (i = PT_DIRECTORY_LEVEL;
727 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
728 rmapp = gfn_to_rmap(kvm, gfn, i);
729 spte = rmap_next(kvm, rmapp, NULL);
730 while (spte) {
731 BUG_ON(!spte);
732 BUG_ON(!(*spte & PT_PRESENT_MASK));
733 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
734 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
735 if (is_writeble_pte(*spte)) {
736 rmap_remove(kvm, spte);
737 --kvm->stat.lpages;
738 __set_spte(spte, shadow_trap_nonpresent_pte);
739 spte = NULL;
740 write_protected = 1;
741 }
742 spte = rmap_next(kvm, rmapp, spte);
743 }
744 }
745
746 return write_protected;
747 }
748
749 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
750 {
751 u64 *spte;
752 int need_tlb_flush = 0;
753
754 while ((spte = rmap_next(kvm, rmapp, NULL))) {
755 BUG_ON(!(*spte & PT_PRESENT_MASK));
756 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
757 rmap_remove(kvm, spte);
758 __set_spte(spte, shadow_trap_nonpresent_pte);
759 need_tlb_flush = 1;
760 }
761 return need_tlb_flush;
762 }
763
764 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
765 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
766 {
767 int i, j;
768 int retval = 0;
769
770 /*
771 * If mmap_sem isn't taken, we can look the memslots with only
772 * the mmu_lock by skipping over the slots with userspace_addr == 0.
773 */
774 for (i = 0; i < kvm->nmemslots; i++) {
775 struct kvm_memory_slot *memslot = &kvm->memslots[i];
776 unsigned long start = memslot->userspace_addr;
777 unsigned long end;
778
779 /* mmu_lock protects userspace_addr */
780 if (!start)
781 continue;
782
783 end = start + (memslot->npages << PAGE_SHIFT);
784 if (hva >= start && hva < end) {
785 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
786
787 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
788
789 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
790 int idx = gfn_offset;
791 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
792 retval |= handler(kvm,
793 &memslot->lpage_info[j][idx].rmap_pde);
794 }
795 }
796 }
797
798 return retval;
799 }
800
801 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
802 {
803 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
804 }
805
806 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
807 {
808 u64 *spte;
809 int young = 0;
810
811 /* always return old for EPT */
812 if (!shadow_accessed_mask)
813 return 0;
814
815 spte = rmap_next(kvm, rmapp, NULL);
816 while (spte) {
817 int _young;
818 u64 _spte = *spte;
819 BUG_ON(!(_spte & PT_PRESENT_MASK));
820 _young = _spte & PT_ACCESSED_MASK;
821 if (_young) {
822 young = 1;
823 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
824 }
825 spte = rmap_next(kvm, rmapp, spte);
826 }
827 return young;
828 }
829
830 #define RMAP_RECYCLE_THRESHOLD 1000
831
832 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
833 {
834 unsigned long *rmapp;
835 struct kvm_mmu_page *sp;
836
837 sp = page_header(__pa(spte));
838
839 gfn = unalias_gfn(vcpu->kvm, gfn);
840 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
841
842 kvm_unmap_rmapp(vcpu->kvm, rmapp);
843 kvm_flush_remote_tlbs(vcpu->kvm);
844 }
845
846 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
847 {
848 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
849 }
850
851 #ifdef MMU_DEBUG
852 static int is_empty_shadow_page(u64 *spt)
853 {
854 u64 *pos;
855 u64 *end;
856
857 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
858 if (is_shadow_present_pte(*pos)) {
859 printk(KERN_ERR "%s: %p %llx\n", __func__,
860 pos, *pos);
861 return 0;
862 }
863 return 1;
864 }
865 #endif
866
867 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
868 {
869 ASSERT(is_empty_shadow_page(sp->spt));
870 list_del(&sp->link);
871 __free_page(virt_to_page(sp->spt));
872 __free_page(virt_to_page(sp->gfns));
873 kfree(sp);
874 ++kvm->arch.n_free_mmu_pages;
875 }
876
877 static unsigned kvm_page_table_hashfn(gfn_t gfn)
878 {
879 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
880 }
881
882 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
883 u64 *parent_pte)
884 {
885 struct kvm_mmu_page *sp;
886
887 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
888 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
889 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
890 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
891 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
892 INIT_LIST_HEAD(&sp->oos_link);
893 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
894 sp->multimapped = 0;
895 sp->parent_pte = parent_pte;
896 --vcpu->kvm->arch.n_free_mmu_pages;
897 return sp;
898 }
899
900 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
901 struct kvm_mmu_page *sp, u64 *parent_pte)
902 {
903 struct kvm_pte_chain *pte_chain;
904 struct hlist_node *node;
905 int i;
906
907 if (!parent_pte)
908 return;
909 if (!sp->multimapped) {
910 u64 *old = sp->parent_pte;
911
912 if (!old) {
913 sp->parent_pte = parent_pte;
914 return;
915 }
916 sp->multimapped = 1;
917 pte_chain = mmu_alloc_pte_chain(vcpu);
918 INIT_HLIST_HEAD(&sp->parent_ptes);
919 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
920 pte_chain->parent_ptes[0] = old;
921 }
922 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
923 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
924 continue;
925 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
926 if (!pte_chain->parent_ptes[i]) {
927 pte_chain->parent_ptes[i] = parent_pte;
928 return;
929 }
930 }
931 pte_chain = mmu_alloc_pte_chain(vcpu);
932 BUG_ON(!pte_chain);
933 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
934 pte_chain->parent_ptes[0] = parent_pte;
935 }
936
937 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
938 u64 *parent_pte)
939 {
940 struct kvm_pte_chain *pte_chain;
941 struct hlist_node *node;
942 int i;
943
944 if (!sp->multimapped) {
945 BUG_ON(sp->parent_pte != parent_pte);
946 sp->parent_pte = NULL;
947 return;
948 }
949 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
950 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
951 if (!pte_chain->parent_ptes[i])
952 break;
953 if (pte_chain->parent_ptes[i] != parent_pte)
954 continue;
955 while (i + 1 < NR_PTE_CHAIN_ENTRIES
956 && pte_chain->parent_ptes[i + 1]) {
957 pte_chain->parent_ptes[i]
958 = pte_chain->parent_ptes[i + 1];
959 ++i;
960 }
961 pte_chain->parent_ptes[i] = NULL;
962 if (i == 0) {
963 hlist_del(&pte_chain->link);
964 mmu_free_pte_chain(pte_chain);
965 if (hlist_empty(&sp->parent_ptes)) {
966 sp->multimapped = 0;
967 sp->parent_pte = NULL;
968 }
969 }
970 return;
971 }
972 BUG();
973 }
974
975
976 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
977 mmu_parent_walk_fn fn)
978 {
979 struct kvm_pte_chain *pte_chain;
980 struct hlist_node *node;
981 struct kvm_mmu_page *parent_sp;
982 int i;
983
984 if (!sp->multimapped && sp->parent_pte) {
985 parent_sp = page_header(__pa(sp->parent_pte));
986 fn(vcpu, parent_sp);
987 mmu_parent_walk(vcpu, parent_sp, fn);
988 return;
989 }
990 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
991 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
992 if (!pte_chain->parent_ptes[i])
993 break;
994 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
995 fn(vcpu, parent_sp);
996 mmu_parent_walk(vcpu, parent_sp, fn);
997 }
998 }
999
1000 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1001 {
1002 unsigned int index;
1003 struct kvm_mmu_page *sp = page_header(__pa(spte));
1004
1005 index = spte - sp->spt;
1006 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1007 sp->unsync_children++;
1008 WARN_ON(!sp->unsync_children);
1009 }
1010
1011 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1012 {
1013 struct kvm_pte_chain *pte_chain;
1014 struct hlist_node *node;
1015 int i;
1016
1017 if (!sp->parent_pte)
1018 return;
1019
1020 if (!sp->multimapped) {
1021 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1022 return;
1023 }
1024
1025 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1026 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1027 if (!pte_chain->parent_ptes[i])
1028 break;
1029 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1030 }
1031 }
1032
1033 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1034 {
1035 kvm_mmu_update_parents_unsync(sp);
1036 return 1;
1037 }
1038
1039 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
1040 struct kvm_mmu_page *sp)
1041 {
1042 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
1043 kvm_mmu_update_parents_unsync(sp);
1044 }
1045
1046 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1047 struct kvm_mmu_page *sp)
1048 {
1049 int i;
1050
1051 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1052 sp->spt[i] = shadow_trap_nonpresent_pte;
1053 }
1054
1055 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1056 struct kvm_mmu_page *sp)
1057 {
1058 return 1;
1059 }
1060
1061 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1062 {
1063 }
1064
1065 #define KVM_PAGE_ARRAY_NR 16
1066
1067 struct kvm_mmu_pages {
1068 struct mmu_page_and_offset {
1069 struct kvm_mmu_page *sp;
1070 unsigned int idx;
1071 } page[KVM_PAGE_ARRAY_NR];
1072 unsigned int nr;
1073 };
1074
1075 #define for_each_unsync_children(bitmap, idx) \
1076 for (idx = find_first_bit(bitmap, 512); \
1077 idx < 512; \
1078 idx = find_next_bit(bitmap, 512, idx+1))
1079
1080 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1081 int idx)
1082 {
1083 int i;
1084
1085 if (sp->unsync)
1086 for (i=0; i < pvec->nr; i++)
1087 if (pvec->page[i].sp == sp)
1088 return 0;
1089
1090 pvec->page[pvec->nr].sp = sp;
1091 pvec->page[pvec->nr].idx = idx;
1092 pvec->nr++;
1093 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1094 }
1095
1096 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1097 struct kvm_mmu_pages *pvec)
1098 {
1099 int i, ret, nr_unsync_leaf = 0;
1100
1101 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1102 u64 ent = sp->spt[i];
1103
1104 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1105 struct kvm_mmu_page *child;
1106 child = page_header(ent & PT64_BASE_ADDR_MASK);
1107
1108 if (child->unsync_children) {
1109 if (mmu_pages_add(pvec, child, i))
1110 return -ENOSPC;
1111
1112 ret = __mmu_unsync_walk(child, pvec);
1113 if (!ret)
1114 __clear_bit(i, sp->unsync_child_bitmap);
1115 else if (ret > 0)
1116 nr_unsync_leaf += ret;
1117 else
1118 return ret;
1119 }
1120
1121 if (child->unsync) {
1122 nr_unsync_leaf++;
1123 if (mmu_pages_add(pvec, child, i))
1124 return -ENOSPC;
1125 }
1126 }
1127 }
1128
1129 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1130 sp->unsync_children = 0;
1131
1132 return nr_unsync_leaf;
1133 }
1134
1135 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1136 struct kvm_mmu_pages *pvec)
1137 {
1138 if (!sp->unsync_children)
1139 return 0;
1140
1141 mmu_pages_add(pvec, sp, 0);
1142 return __mmu_unsync_walk(sp, pvec);
1143 }
1144
1145 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1146 {
1147 unsigned index;
1148 struct hlist_head *bucket;
1149 struct kvm_mmu_page *sp;
1150 struct hlist_node *node;
1151
1152 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1153 index = kvm_page_table_hashfn(gfn);
1154 bucket = &kvm->arch.mmu_page_hash[index];
1155 hlist_for_each_entry(sp, node, bucket, hash_link)
1156 if (sp->gfn == gfn && !sp->role.direct
1157 && !sp->role.invalid) {
1158 pgprintk("%s: found role %x\n",
1159 __func__, sp->role.word);
1160 return sp;
1161 }
1162 return NULL;
1163 }
1164
1165 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1166 {
1167 WARN_ON(!sp->unsync);
1168 sp->unsync = 0;
1169 --kvm->stat.mmu_unsync;
1170 }
1171
1172 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1173
1174 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1175 {
1176 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1177 kvm_mmu_zap_page(vcpu->kvm, sp);
1178 return 1;
1179 }
1180
1181 trace_kvm_mmu_sync_page(sp);
1182 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1183 kvm_flush_remote_tlbs(vcpu->kvm);
1184 kvm_unlink_unsync_page(vcpu->kvm, sp);
1185 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1186 kvm_mmu_zap_page(vcpu->kvm, sp);
1187 return 1;
1188 }
1189
1190 kvm_mmu_flush_tlb(vcpu);
1191 return 0;
1192 }
1193
1194 struct mmu_page_path {
1195 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1196 unsigned int idx[PT64_ROOT_LEVEL-1];
1197 };
1198
1199 #define for_each_sp(pvec, sp, parents, i) \
1200 for (i = mmu_pages_next(&pvec, &parents, -1), \
1201 sp = pvec.page[i].sp; \
1202 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1203 i = mmu_pages_next(&pvec, &parents, i))
1204
1205 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1206 struct mmu_page_path *parents,
1207 int i)
1208 {
1209 int n;
1210
1211 for (n = i+1; n < pvec->nr; n++) {
1212 struct kvm_mmu_page *sp = pvec->page[n].sp;
1213
1214 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1215 parents->idx[0] = pvec->page[n].idx;
1216 return n;
1217 }
1218
1219 parents->parent[sp->role.level-2] = sp;
1220 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1221 }
1222
1223 return n;
1224 }
1225
1226 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1227 {
1228 struct kvm_mmu_page *sp;
1229 unsigned int level = 0;
1230
1231 do {
1232 unsigned int idx = parents->idx[level];
1233
1234 sp = parents->parent[level];
1235 if (!sp)
1236 return;
1237
1238 --sp->unsync_children;
1239 WARN_ON((int)sp->unsync_children < 0);
1240 __clear_bit(idx, sp->unsync_child_bitmap);
1241 level++;
1242 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1243 }
1244
1245 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1246 struct mmu_page_path *parents,
1247 struct kvm_mmu_pages *pvec)
1248 {
1249 parents->parent[parent->role.level-1] = NULL;
1250 pvec->nr = 0;
1251 }
1252
1253 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1254 struct kvm_mmu_page *parent)
1255 {
1256 int i;
1257 struct kvm_mmu_page *sp;
1258 struct mmu_page_path parents;
1259 struct kvm_mmu_pages pages;
1260
1261 kvm_mmu_pages_init(parent, &parents, &pages);
1262 while (mmu_unsync_walk(parent, &pages)) {
1263 int protected = 0;
1264
1265 for_each_sp(pages, sp, parents, i)
1266 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1267
1268 if (protected)
1269 kvm_flush_remote_tlbs(vcpu->kvm);
1270
1271 for_each_sp(pages, sp, parents, i) {
1272 kvm_sync_page(vcpu, sp);
1273 mmu_pages_clear_parents(&parents);
1274 }
1275 cond_resched_lock(&vcpu->kvm->mmu_lock);
1276 kvm_mmu_pages_init(parent, &parents, &pages);
1277 }
1278 }
1279
1280 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1281 gfn_t gfn,
1282 gva_t gaddr,
1283 unsigned level,
1284 int direct,
1285 unsigned access,
1286 u64 *parent_pte)
1287 {
1288 union kvm_mmu_page_role role;
1289 unsigned index;
1290 unsigned quadrant;
1291 struct hlist_head *bucket;
1292 struct kvm_mmu_page *sp;
1293 struct hlist_node *node, *tmp;
1294
1295 role = vcpu->arch.mmu.base_role;
1296 role.level = level;
1297 role.direct = direct;
1298 role.access = access;
1299 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1300 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1301 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1302 role.quadrant = quadrant;
1303 }
1304 index = kvm_page_table_hashfn(gfn);
1305 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1306 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1307 if (sp->gfn == gfn) {
1308 if (sp->unsync)
1309 if (kvm_sync_page(vcpu, sp))
1310 continue;
1311
1312 if (sp->role.word != role.word)
1313 continue;
1314
1315 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1316 if (sp->unsync_children) {
1317 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1318 kvm_mmu_mark_parents_unsync(vcpu, sp);
1319 }
1320 trace_kvm_mmu_get_page(sp, false);
1321 return sp;
1322 }
1323 ++vcpu->kvm->stat.mmu_cache_miss;
1324 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1325 if (!sp)
1326 return sp;
1327 sp->gfn = gfn;
1328 sp->role = role;
1329 hlist_add_head(&sp->hash_link, bucket);
1330 if (!direct) {
1331 if (rmap_write_protect(vcpu->kvm, gfn))
1332 kvm_flush_remote_tlbs(vcpu->kvm);
1333 account_shadowed(vcpu->kvm, gfn);
1334 }
1335 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1336 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1337 else
1338 nonpaging_prefetch_page(vcpu, sp);
1339 trace_kvm_mmu_get_page(sp, true);
1340 return sp;
1341 }
1342
1343 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1344 struct kvm_vcpu *vcpu, u64 addr)
1345 {
1346 iterator->addr = addr;
1347 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1348 iterator->level = vcpu->arch.mmu.shadow_root_level;
1349 if (iterator->level == PT32E_ROOT_LEVEL) {
1350 iterator->shadow_addr
1351 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1352 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1353 --iterator->level;
1354 if (!iterator->shadow_addr)
1355 iterator->level = 0;
1356 }
1357 }
1358
1359 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1360 {
1361 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1362 return false;
1363
1364 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1365 if (is_large_pte(*iterator->sptep))
1366 return false;
1367
1368 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1369 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1370 return true;
1371 }
1372
1373 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1374 {
1375 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1376 --iterator->level;
1377 }
1378
1379 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1380 struct kvm_mmu_page *sp)
1381 {
1382 unsigned i;
1383 u64 *pt;
1384 u64 ent;
1385
1386 pt = sp->spt;
1387
1388 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1389 ent = pt[i];
1390
1391 if (is_shadow_present_pte(ent)) {
1392 if (!is_last_spte(ent, sp->role.level)) {
1393 ent &= PT64_BASE_ADDR_MASK;
1394 mmu_page_remove_parent_pte(page_header(ent),
1395 &pt[i]);
1396 } else {
1397 if (is_large_pte(ent))
1398 --kvm->stat.lpages;
1399 rmap_remove(kvm, &pt[i]);
1400 }
1401 }
1402 pt[i] = shadow_trap_nonpresent_pte;
1403 }
1404 }
1405
1406 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1407 {
1408 mmu_page_remove_parent_pte(sp, parent_pte);
1409 }
1410
1411 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1412 {
1413 int i;
1414 struct kvm_vcpu *vcpu;
1415
1416 kvm_for_each_vcpu(i, vcpu, kvm)
1417 vcpu->arch.last_pte_updated = NULL;
1418 }
1419
1420 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1421 {
1422 u64 *parent_pte;
1423
1424 while (sp->multimapped || sp->parent_pte) {
1425 if (!sp->multimapped)
1426 parent_pte = sp->parent_pte;
1427 else {
1428 struct kvm_pte_chain *chain;
1429
1430 chain = container_of(sp->parent_ptes.first,
1431 struct kvm_pte_chain, link);
1432 parent_pte = chain->parent_ptes[0];
1433 }
1434 BUG_ON(!parent_pte);
1435 kvm_mmu_put_page(sp, parent_pte);
1436 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1437 }
1438 }
1439
1440 static int mmu_zap_unsync_children(struct kvm *kvm,
1441 struct kvm_mmu_page *parent)
1442 {
1443 int i, zapped = 0;
1444 struct mmu_page_path parents;
1445 struct kvm_mmu_pages pages;
1446
1447 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1448 return 0;
1449
1450 kvm_mmu_pages_init(parent, &parents, &pages);
1451 while (mmu_unsync_walk(parent, &pages)) {
1452 struct kvm_mmu_page *sp;
1453
1454 for_each_sp(pages, sp, parents, i) {
1455 kvm_mmu_zap_page(kvm, sp);
1456 mmu_pages_clear_parents(&parents);
1457 }
1458 zapped += pages.nr;
1459 kvm_mmu_pages_init(parent, &parents, &pages);
1460 }
1461
1462 return zapped;
1463 }
1464
1465 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1466 {
1467 int ret;
1468
1469 trace_kvm_mmu_zap_page(sp);
1470 ++kvm->stat.mmu_shadow_zapped;
1471 ret = mmu_zap_unsync_children(kvm, sp);
1472 kvm_mmu_page_unlink_children(kvm, sp);
1473 kvm_mmu_unlink_parents(kvm, sp);
1474 kvm_flush_remote_tlbs(kvm);
1475 if (!sp->role.invalid && !sp->role.direct)
1476 unaccount_shadowed(kvm, sp->gfn);
1477 if (sp->unsync)
1478 kvm_unlink_unsync_page(kvm, sp);
1479 if (!sp->root_count) {
1480 hlist_del(&sp->hash_link);
1481 kvm_mmu_free_page(kvm, sp);
1482 } else {
1483 sp->role.invalid = 1;
1484 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1485 kvm_reload_remote_mmus(kvm);
1486 }
1487 kvm_mmu_reset_last_pte_updated(kvm);
1488 return ret;
1489 }
1490
1491 /*
1492 * Changing the number of mmu pages allocated to the vm
1493 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1494 */
1495 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1496 {
1497 int used_pages;
1498
1499 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1500 used_pages = max(0, used_pages);
1501
1502 /*
1503 * If we set the number of mmu pages to be smaller be than the
1504 * number of actived pages , we must to free some mmu pages before we
1505 * change the value
1506 */
1507
1508 if (used_pages > kvm_nr_mmu_pages) {
1509 while (used_pages > kvm_nr_mmu_pages) {
1510 struct kvm_mmu_page *page;
1511
1512 page = container_of(kvm->arch.active_mmu_pages.prev,
1513 struct kvm_mmu_page, link);
1514 kvm_mmu_zap_page(kvm, page);
1515 used_pages--;
1516 }
1517 kvm->arch.n_free_mmu_pages = 0;
1518 }
1519 else
1520 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1521 - kvm->arch.n_alloc_mmu_pages;
1522
1523 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1524 }
1525
1526 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1527 {
1528 unsigned index;
1529 struct hlist_head *bucket;
1530 struct kvm_mmu_page *sp;
1531 struct hlist_node *node, *n;
1532 int r;
1533
1534 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1535 r = 0;
1536 index = kvm_page_table_hashfn(gfn);
1537 bucket = &kvm->arch.mmu_page_hash[index];
1538 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1539 if (sp->gfn == gfn && !sp->role.direct) {
1540 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1541 sp->role.word);
1542 r = 1;
1543 if (kvm_mmu_zap_page(kvm, sp))
1544 n = bucket->first;
1545 }
1546 return r;
1547 }
1548
1549 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1550 {
1551 unsigned index;
1552 struct hlist_head *bucket;
1553 struct kvm_mmu_page *sp;
1554 struct hlist_node *node, *nn;
1555
1556 index = kvm_page_table_hashfn(gfn);
1557 bucket = &kvm->arch.mmu_page_hash[index];
1558 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1559 if (sp->gfn == gfn && !sp->role.direct
1560 && !sp->role.invalid) {
1561 pgprintk("%s: zap %lx %x\n",
1562 __func__, gfn, sp->role.word);
1563 kvm_mmu_zap_page(kvm, sp);
1564 }
1565 }
1566 }
1567
1568 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1569 {
1570 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
1571 struct kvm_mmu_page *sp = page_header(__pa(pte));
1572
1573 __set_bit(slot, sp->slot_bitmap);
1574 }
1575
1576 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1577 {
1578 int i;
1579 u64 *pt = sp->spt;
1580
1581 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1582 return;
1583
1584 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1585 if (pt[i] == shadow_notrap_nonpresent_pte)
1586 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1587 }
1588 }
1589
1590 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1591 {
1592 struct page *page;
1593
1594 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1595
1596 if (gpa == UNMAPPED_GVA)
1597 return NULL;
1598
1599 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1600
1601 return page;
1602 }
1603
1604 /*
1605 * The function is based on mtrr_type_lookup() in
1606 * arch/x86/kernel/cpu/mtrr/generic.c
1607 */
1608 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1609 u64 start, u64 end)
1610 {
1611 int i;
1612 u64 base, mask;
1613 u8 prev_match, curr_match;
1614 int num_var_ranges = KVM_NR_VAR_MTRR;
1615
1616 if (!mtrr_state->enabled)
1617 return 0xFF;
1618
1619 /* Make end inclusive end, instead of exclusive */
1620 end--;
1621
1622 /* Look in fixed ranges. Just return the type as per start */
1623 if (mtrr_state->have_fixed && (start < 0x100000)) {
1624 int idx;
1625
1626 if (start < 0x80000) {
1627 idx = 0;
1628 idx += (start >> 16);
1629 return mtrr_state->fixed_ranges[idx];
1630 } else if (start < 0xC0000) {
1631 idx = 1 * 8;
1632 idx += ((start - 0x80000) >> 14);
1633 return mtrr_state->fixed_ranges[idx];
1634 } else if (start < 0x1000000) {
1635 idx = 3 * 8;
1636 idx += ((start - 0xC0000) >> 12);
1637 return mtrr_state->fixed_ranges[idx];
1638 }
1639 }
1640
1641 /*
1642 * Look in variable ranges
1643 * Look of multiple ranges matching this address and pick type
1644 * as per MTRR precedence
1645 */
1646 if (!(mtrr_state->enabled & 2))
1647 return mtrr_state->def_type;
1648
1649 prev_match = 0xFF;
1650 for (i = 0; i < num_var_ranges; ++i) {
1651 unsigned short start_state, end_state;
1652
1653 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1654 continue;
1655
1656 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1657 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1658 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1659 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1660
1661 start_state = ((start & mask) == (base & mask));
1662 end_state = ((end & mask) == (base & mask));
1663 if (start_state != end_state)
1664 return 0xFE;
1665
1666 if ((start & mask) != (base & mask))
1667 continue;
1668
1669 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1670 if (prev_match == 0xFF) {
1671 prev_match = curr_match;
1672 continue;
1673 }
1674
1675 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1676 curr_match == MTRR_TYPE_UNCACHABLE)
1677 return MTRR_TYPE_UNCACHABLE;
1678
1679 if ((prev_match == MTRR_TYPE_WRBACK &&
1680 curr_match == MTRR_TYPE_WRTHROUGH) ||
1681 (prev_match == MTRR_TYPE_WRTHROUGH &&
1682 curr_match == MTRR_TYPE_WRBACK)) {
1683 prev_match = MTRR_TYPE_WRTHROUGH;
1684 curr_match = MTRR_TYPE_WRTHROUGH;
1685 }
1686
1687 if (prev_match != curr_match)
1688 return MTRR_TYPE_UNCACHABLE;
1689 }
1690
1691 if (prev_match != 0xFF)
1692 return prev_match;
1693
1694 return mtrr_state->def_type;
1695 }
1696
1697 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1698 {
1699 u8 mtrr;
1700
1701 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1702 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1703 if (mtrr == 0xfe || mtrr == 0xff)
1704 mtrr = MTRR_TYPE_WRBACK;
1705 return mtrr;
1706 }
1707 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1708
1709 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1710 {
1711 unsigned index;
1712 struct hlist_head *bucket;
1713 struct kvm_mmu_page *s;
1714 struct hlist_node *node, *n;
1715
1716 trace_kvm_mmu_unsync_page(sp);
1717 index = kvm_page_table_hashfn(sp->gfn);
1718 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1719 /* don't unsync if pagetable is shadowed with multiple roles */
1720 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1721 if (s->gfn != sp->gfn || s->role.direct)
1722 continue;
1723 if (s->role.word != sp->role.word)
1724 return 1;
1725 }
1726 ++vcpu->kvm->stat.mmu_unsync;
1727 sp->unsync = 1;
1728
1729 kvm_mmu_mark_parents_unsync(vcpu, sp);
1730
1731 mmu_convert_notrap(sp);
1732 return 0;
1733 }
1734
1735 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1736 bool can_unsync)
1737 {
1738 struct kvm_mmu_page *shadow;
1739
1740 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1741 if (shadow) {
1742 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1743 return 1;
1744 if (shadow->unsync)
1745 return 0;
1746 if (can_unsync && oos_shadow)
1747 return kvm_unsync_page(vcpu, shadow);
1748 return 1;
1749 }
1750 return 0;
1751 }
1752
1753 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1754 unsigned pte_access, int user_fault,
1755 int write_fault, int dirty, int level,
1756 gfn_t gfn, pfn_t pfn, bool speculative,
1757 bool can_unsync)
1758 {
1759 u64 spte;
1760 int ret = 0;
1761
1762 /*
1763 * We don't set the accessed bit, since we sometimes want to see
1764 * whether the guest actually used the pte (in order to detect
1765 * demand paging).
1766 */
1767 spte = shadow_base_present_pte | shadow_dirty_mask;
1768 if (!speculative)
1769 spte |= shadow_accessed_mask;
1770 if (!dirty)
1771 pte_access &= ~ACC_WRITE_MASK;
1772 if (pte_access & ACC_EXEC_MASK)
1773 spte |= shadow_x_mask;
1774 else
1775 spte |= shadow_nx_mask;
1776 if (pte_access & ACC_USER_MASK)
1777 spte |= shadow_user_mask;
1778 if (level > PT_PAGE_TABLE_LEVEL)
1779 spte |= PT_PAGE_SIZE_MASK;
1780 if (tdp_enabled)
1781 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1782 kvm_is_mmio_pfn(pfn));
1783
1784 spte |= (u64)pfn << PAGE_SHIFT;
1785
1786 if ((pte_access & ACC_WRITE_MASK)
1787 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1788
1789 if (level > PT_PAGE_TABLE_LEVEL &&
1790 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1791 ret = 1;
1792 spte = shadow_trap_nonpresent_pte;
1793 goto set_pte;
1794 }
1795
1796 spte |= PT_WRITABLE_MASK;
1797
1798 /*
1799 * Optimization: for pte sync, if spte was writable the hash
1800 * lookup is unnecessary (and expensive). Write protection
1801 * is responsibility of mmu_get_page / kvm_sync_page.
1802 * Same reasoning can be applied to dirty page accounting.
1803 */
1804 if (!can_unsync && is_writeble_pte(*sptep))
1805 goto set_pte;
1806
1807 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1808 pgprintk("%s: found shadow page for %lx, marking ro\n",
1809 __func__, gfn);
1810 ret = 1;
1811 pte_access &= ~ACC_WRITE_MASK;
1812 if (is_writeble_pte(spte))
1813 spte &= ~PT_WRITABLE_MASK;
1814 }
1815 }
1816
1817 if (pte_access & ACC_WRITE_MASK)
1818 mark_page_dirty(vcpu->kvm, gfn);
1819
1820 set_pte:
1821 __set_spte(sptep, spte);
1822 return ret;
1823 }
1824
1825 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1826 unsigned pt_access, unsigned pte_access,
1827 int user_fault, int write_fault, int dirty,
1828 int *ptwrite, int level, gfn_t gfn,
1829 pfn_t pfn, bool speculative)
1830 {
1831 int was_rmapped = 0;
1832 int was_writeble = is_writeble_pte(*sptep);
1833 int rmap_count;
1834
1835 pgprintk("%s: spte %llx access %x write_fault %d"
1836 " user_fault %d gfn %lx\n",
1837 __func__, *sptep, pt_access,
1838 write_fault, user_fault, gfn);
1839
1840 if (is_rmap_spte(*sptep)) {
1841 /*
1842 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1843 * the parent of the now unreachable PTE.
1844 */
1845 if (level > PT_PAGE_TABLE_LEVEL &&
1846 !is_large_pte(*sptep)) {
1847 struct kvm_mmu_page *child;
1848 u64 pte = *sptep;
1849
1850 child = page_header(pte & PT64_BASE_ADDR_MASK);
1851 mmu_page_remove_parent_pte(child, sptep);
1852 } else if (pfn != spte_to_pfn(*sptep)) {
1853 pgprintk("hfn old %lx new %lx\n",
1854 spte_to_pfn(*sptep), pfn);
1855 rmap_remove(vcpu->kvm, sptep);
1856 } else
1857 was_rmapped = 1;
1858 }
1859
1860 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1861 dirty, level, gfn, pfn, speculative, true)) {
1862 if (write_fault)
1863 *ptwrite = 1;
1864 kvm_x86_ops->tlb_flush(vcpu);
1865 }
1866
1867 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1868 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1869 is_large_pte(*sptep)? "2MB" : "4kB",
1870 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1871 *sptep, sptep);
1872 if (!was_rmapped && is_large_pte(*sptep))
1873 ++vcpu->kvm->stat.lpages;
1874
1875 page_header_update_slot(vcpu->kvm, sptep, gfn);
1876 if (!was_rmapped) {
1877 rmap_count = rmap_add(vcpu, sptep, gfn);
1878 kvm_release_pfn_clean(pfn);
1879 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1880 rmap_recycle(vcpu, sptep, gfn);
1881 } else {
1882 if (was_writeble)
1883 kvm_release_pfn_dirty(pfn);
1884 else
1885 kvm_release_pfn_clean(pfn);
1886 }
1887 if (speculative) {
1888 vcpu->arch.last_pte_updated = sptep;
1889 vcpu->arch.last_pte_gfn = gfn;
1890 }
1891 }
1892
1893 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1894 {
1895 }
1896
1897 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1898 int level, gfn_t gfn, pfn_t pfn)
1899 {
1900 struct kvm_shadow_walk_iterator iterator;
1901 struct kvm_mmu_page *sp;
1902 int pt_write = 0;
1903 gfn_t pseudo_gfn;
1904
1905 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1906 if (iterator.level == level) {
1907 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1908 0, write, 1, &pt_write,
1909 level, gfn, pfn, false);
1910 ++vcpu->stat.pf_fixed;
1911 break;
1912 }
1913
1914 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1915 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1916 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1917 iterator.level - 1,
1918 1, ACC_ALL, iterator.sptep);
1919 if (!sp) {
1920 pgprintk("nonpaging_map: ENOMEM\n");
1921 kvm_release_pfn_clean(pfn);
1922 return -ENOMEM;
1923 }
1924
1925 __set_spte(iterator.sptep,
1926 __pa(sp->spt)
1927 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1928 | shadow_user_mask | shadow_x_mask);
1929 }
1930 }
1931 return pt_write;
1932 }
1933
1934 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1935 {
1936 int r;
1937 int level;
1938 pfn_t pfn;
1939 unsigned long mmu_seq;
1940
1941 level = mapping_level(vcpu, gfn);
1942
1943 /*
1944 * This path builds a PAE pagetable - so we can map 2mb pages at
1945 * maximum. Therefore check if the level is larger than that.
1946 */
1947 if (level > PT_DIRECTORY_LEVEL)
1948 level = PT_DIRECTORY_LEVEL;
1949
1950 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
1951
1952 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1953 smp_rmb();
1954 pfn = gfn_to_pfn(vcpu->kvm, gfn);
1955
1956 /* mmio */
1957 if (is_error_pfn(pfn)) {
1958 kvm_release_pfn_clean(pfn);
1959 return 1;
1960 }
1961
1962 spin_lock(&vcpu->kvm->mmu_lock);
1963 if (mmu_notifier_retry(vcpu, mmu_seq))
1964 goto out_unlock;
1965 kvm_mmu_free_some_pages(vcpu);
1966 r = __direct_map(vcpu, v, write, level, gfn, pfn);
1967 spin_unlock(&vcpu->kvm->mmu_lock);
1968
1969
1970 return r;
1971
1972 out_unlock:
1973 spin_unlock(&vcpu->kvm->mmu_lock);
1974 kvm_release_pfn_clean(pfn);
1975 return 0;
1976 }
1977
1978
1979 static void mmu_free_roots(struct kvm_vcpu *vcpu)
1980 {
1981 int i;
1982 struct kvm_mmu_page *sp;
1983
1984 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1985 return;
1986 spin_lock(&vcpu->kvm->mmu_lock);
1987 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1988 hpa_t root = vcpu->arch.mmu.root_hpa;
1989
1990 sp = page_header(root);
1991 --sp->root_count;
1992 if (!sp->root_count && sp->role.invalid)
1993 kvm_mmu_zap_page(vcpu->kvm, sp);
1994 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1995 spin_unlock(&vcpu->kvm->mmu_lock);
1996 return;
1997 }
1998 for (i = 0; i < 4; ++i) {
1999 hpa_t root = vcpu->arch.mmu.pae_root[i];
2000
2001 if (root) {
2002 root &= PT64_BASE_ADDR_MASK;
2003 sp = page_header(root);
2004 --sp->root_count;
2005 if (!sp->root_count && sp->role.invalid)
2006 kvm_mmu_zap_page(vcpu->kvm, sp);
2007 }
2008 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2009 }
2010 spin_unlock(&vcpu->kvm->mmu_lock);
2011 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2012 }
2013
2014 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2015 {
2016 int ret = 0;
2017
2018 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2019 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2020 ret = 1;
2021 }
2022
2023 return ret;
2024 }
2025
2026 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2027 {
2028 int i;
2029 gfn_t root_gfn;
2030 struct kvm_mmu_page *sp;
2031 int direct = 0;
2032 u64 pdptr;
2033
2034 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2035
2036 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2037 hpa_t root = vcpu->arch.mmu.root_hpa;
2038
2039 ASSERT(!VALID_PAGE(root));
2040 if (tdp_enabled)
2041 direct = 1;
2042 if (mmu_check_root(vcpu, root_gfn))
2043 return 1;
2044 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2045 PT64_ROOT_LEVEL, direct,
2046 ACC_ALL, NULL);
2047 root = __pa(sp->spt);
2048 ++sp->root_count;
2049 vcpu->arch.mmu.root_hpa = root;
2050 return 0;
2051 }
2052 direct = !is_paging(vcpu);
2053 if (tdp_enabled)
2054 direct = 1;
2055 for (i = 0; i < 4; ++i) {
2056 hpa_t root = vcpu->arch.mmu.pae_root[i];
2057
2058 ASSERT(!VALID_PAGE(root));
2059 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2060 pdptr = kvm_pdptr_read(vcpu, i);
2061 if (!is_present_gpte(pdptr)) {
2062 vcpu->arch.mmu.pae_root[i] = 0;
2063 continue;
2064 }
2065 root_gfn = pdptr >> PAGE_SHIFT;
2066 } else if (vcpu->arch.mmu.root_level == 0)
2067 root_gfn = 0;
2068 if (mmu_check_root(vcpu, root_gfn))
2069 return 1;
2070 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2071 PT32_ROOT_LEVEL, direct,
2072 ACC_ALL, NULL);
2073 root = __pa(sp->spt);
2074 ++sp->root_count;
2075 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2076 }
2077 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2078 return 0;
2079 }
2080
2081 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2082 {
2083 int i;
2084 struct kvm_mmu_page *sp;
2085
2086 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2087 return;
2088 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2089 hpa_t root = vcpu->arch.mmu.root_hpa;
2090 sp = page_header(root);
2091 mmu_sync_children(vcpu, sp);
2092 return;
2093 }
2094 for (i = 0; i < 4; ++i) {
2095 hpa_t root = vcpu->arch.mmu.pae_root[i];
2096
2097 if (root && VALID_PAGE(root)) {
2098 root &= PT64_BASE_ADDR_MASK;
2099 sp = page_header(root);
2100 mmu_sync_children(vcpu, sp);
2101 }
2102 }
2103 }
2104
2105 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2106 {
2107 spin_lock(&vcpu->kvm->mmu_lock);
2108 mmu_sync_roots(vcpu);
2109 spin_unlock(&vcpu->kvm->mmu_lock);
2110 }
2111
2112 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2113 {
2114 return vaddr;
2115 }
2116
2117 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2118 u32 error_code)
2119 {
2120 gfn_t gfn;
2121 int r;
2122
2123 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2124 r = mmu_topup_memory_caches(vcpu);
2125 if (r)
2126 return r;
2127
2128 ASSERT(vcpu);
2129 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2130
2131 gfn = gva >> PAGE_SHIFT;
2132
2133 return nonpaging_map(vcpu, gva & PAGE_MASK,
2134 error_code & PFERR_WRITE_MASK, gfn);
2135 }
2136
2137 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2138 u32 error_code)
2139 {
2140 pfn_t pfn;
2141 int r;
2142 int level;
2143 gfn_t gfn = gpa >> PAGE_SHIFT;
2144 unsigned long mmu_seq;
2145
2146 ASSERT(vcpu);
2147 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2148
2149 r = mmu_topup_memory_caches(vcpu);
2150 if (r)
2151 return r;
2152
2153 level = mapping_level(vcpu, gfn);
2154
2155 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2156
2157 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2158 smp_rmb();
2159 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2160 if (is_error_pfn(pfn)) {
2161 kvm_release_pfn_clean(pfn);
2162 return 1;
2163 }
2164 spin_lock(&vcpu->kvm->mmu_lock);
2165 if (mmu_notifier_retry(vcpu, mmu_seq))
2166 goto out_unlock;
2167 kvm_mmu_free_some_pages(vcpu);
2168 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2169 level, gfn, pfn);
2170 spin_unlock(&vcpu->kvm->mmu_lock);
2171
2172 return r;
2173
2174 out_unlock:
2175 spin_unlock(&vcpu->kvm->mmu_lock);
2176 kvm_release_pfn_clean(pfn);
2177 return 0;
2178 }
2179
2180 static void nonpaging_free(struct kvm_vcpu *vcpu)
2181 {
2182 mmu_free_roots(vcpu);
2183 }
2184
2185 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2186 {
2187 struct kvm_mmu *context = &vcpu->arch.mmu;
2188
2189 context->new_cr3 = nonpaging_new_cr3;
2190 context->page_fault = nonpaging_page_fault;
2191 context->gva_to_gpa = nonpaging_gva_to_gpa;
2192 context->free = nonpaging_free;
2193 context->prefetch_page = nonpaging_prefetch_page;
2194 context->sync_page = nonpaging_sync_page;
2195 context->invlpg = nonpaging_invlpg;
2196 context->root_level = 0;
2197 context->shadow_root_level = PT32E_ROOT_LEVEL;
2198 context->root_hpa = INVALID_PAGE;
2199 return 0;
2200 }
2201
2202 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2203 {
2204 ++vcpu->stat.tlb_flush;
2205 kvm_x86_ops->tlb_flush(vcpu);
2206 }
2207
2208 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2209 {
2210 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2211 mmu_free_roots(vcpu);
2212 }
2213
2214 static void inject_page_fault(struct kvm_vcpu *vcpu,
2215 u64 addr,
2216 u32 err_code)
2217 {
2218 kvm_inject_page_fault(vcpu, addr, err_code);
2219 }
2220
2221 static void paging_free(struct kvm_vcpu *vcpu)
2222 {
2223 nonpaging_free(vcpu);
2224 }
2225
2226 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2227 {
2228 int bit7;
2229
2230 bit7 = (gpte >> 7) & 1;
2231 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2232 }
2233
2234 #define PTTYPE 64
2235 #include "paging_tmpl.h"
2236 #undef PTTYPE
2237
2238 #define PTTYPE 32
2239 #include "paging_tmpl.h"
2240 #undef PTTYPE
2241
2242 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2243 {
2244 struct kvm_mmu *context = &vcpu->arch.mmu;
2245 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2246 u64 exb_bit_rsvd = 0;
2247
2248 if (!is_nx(vcpu))
2249 exb_bit_rsvd = rsvd_bits(63, 63);
2250 switch (level) {
2251 case PT32_ROOT_LEVEL:
2252 /* no rsvd bits for 2 level 4K page table entries */
2253 context->rsvd_bits_mask[0][1] = 0;
2254 context->rsvd_bits_mask[0][0] = 0;
2255 if (is_cpuid_PSE36())
2256 /* 36bits PSE 4MB page */
2257 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2258 else
2259 /* 32 bits PSE 4MB page */
2260 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2261 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2262 break;
2263 case PT32E_ROOT_LEVEL:
2264 context->rsvd_bits_mask[0][2] =
2265 rsvd_bits(maxphyaddr, 63) |
2266 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2267 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2268 rsvd_bits(maxphyaddr, 62); /* PDE */
2269 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2270 rsvd_bits(maxphyaddr, 62); /* PTE */
2271 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2272 rsvd_bits(maxphyaddr, 62) |
2273 rsvd_bits(13, 20); /* large page */
2274 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2275 break;
2276 case PT64_ROOT_LEVEL:
2277 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2278 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2279 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2280 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2281 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2282 rsvd_bits(maxphyaddr, 51);
2283 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2284 rsvd_bits(maxphyaddr, 51);
2285 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2286 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2287 rsvd_bits(maxphyaddr, 51) |
2288 rsvd_bits(13, 29);
2289 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2290 rsvd_bits(maxphyaddr, 51) |
2291 rsvd_bits(13, 20); /* large page */
2292 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2293 break;
2294 }
2295 }
2296
2297 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2298 {
2299 struct kvm_mmu *context = &vcpu->arch.mmu;
2300
2301 ASSERT(is_pae(vcpu));
2302 context->new_cr3 = paging_new_cr3;
2303 context->page_fault = paging64_page_fault;
2304 context->gva_to_gpa = paging64_gva_to_gpa;
2305 context->prefetch_page = paging64_prefetch_page;
2306 context->sync_page = paging64_sync_page;
2307 context->invlpg = paging64_invlpg;
2308 context->free = paging_free;
2309 context->root_level = level;
2310 context->shadow_root_level = level;
2311 context->root_hpa = INVALID_PAGE;
2312 return 0;
2313 }
2314
2315 static int paging64_init_context(struct kvm_vcpu *vcpu)
2316 {
2317 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2318 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2319 }
2320
2321 static int paging32_init_context(struct kvm_vcpu *vcpu)
2322 {
2323 struct kvm_mmu *context = &vcpu->arch.mmu;
2324
2325 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2326 context->new_cr3 = paging_new_cr3;
2327 context->page_fault = paging32_page_fault;
2328 context->gva_to_gpa = paging32_gva_to_gpa;
2329 context->free = paging_free;
2330 context->prefetch_page = paging32_prefetch_page;
2331 context->sync_page = paging32_sync_page;
2332 context->invlpg = paging32_invlpg;
2333 context->root_level = PT32_ROOT_LEVEL;
2334 context->shadow_root_level = PT32E_ROOT_LEVEL;
2335 context->root_hpa = INVALID_PAGE;
2336 return 0;
2337 }
2338
2339 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2340 {
2341 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2342 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2343 }
2344
2345 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2346 {
2347 struct kvm_mmu *context = &vcpu->arch.mmu;
2348
2349 context->new_cr3 = nonpaging_new_cr3;
2350 context->page_fault = tdp_page_fault;
2351 context->free = nonpaging_free;
2352 context->prefetch_page = nonpaging_prefetch_page;
2353 context->sync_page = nonpaging_sync_page;
2354 context->invlpg = nonpaging_invlpg;
2355 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2356 context->root_hpa = INVALID_PAGE;
2357
2358 if (!is_paging(vcpu)) {
2359 context->gva_to_gpa = nonpaging_gva_to_gpa;
2360 context->root_level = 0;
2361 } else if (is_long_mode(vcpu)) {
2362 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2363 context->gva_to_gpa = paging64_gva_to_gpa;
2364 context->root_level = PT64_ROOT_LEVEL;
2365 } else if (is_pae(vcpu)) {
2366 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2367 context->gva_to_gpa = paging64_gva_to_gpa;
2368 context->root_level = PT32E_ROOT_LEVEL;
2369 } else {
2370 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2371 context->gva_to_gpa = paging32_gva_to_gpa;
2372 context->root_level = PT32_ROOT_LEVEL;
2373 }
2374
2375 return 0;
2376 }
2377
2378 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2379 {
2380 int r;
2381
2382 ASSERT(vcpu);
2383 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2384
2385 if (!is_paging(vcpu))
2386 r = nonpaging_init_context(vcpu);
2387 else if (is_long_mode(vcpu))
2388 r = paging64_init_context(vcpu);
2389 else if (is_pae(vcpu))
2390 r = paging32E_init_context(vcpu);
2391 else
2392 r = paging32_init_context(vcpu);
2393
2394 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2395
2396 return r;
2397 }
2398
2399 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2400 {
2401 vcpu->arch.update_pte.pfn = bad_pfn;
2402
2403 if (tdp_enabled)
2404 return init_kvm_tdp_mmu(vcpu);
2405 else
2406 return init_kvm_softmmu(vcpu);
2407 }
2408
2409 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2410 {
2411 ASSERT(vcpu);
2412 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2413 vcpu->arch.mmu.free(vcpu);
2414 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2415 }
2416 }
2417
2418 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2419 {
2420 destroy_kvm_mmu(vcpu);
2421 return init_kvm_mmu(vcpu);
2422 }
2423 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2424
2425 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2426 {
2427 int r;
2428
2429 r = mmu_topup_memory_caches(vcpu);
2430 if (r)
2431 goto out;
2432 spin_lock(&vcpu->kvm->mmu_lock);
2433 kvm_mmu_free_some_pages(vcpu);
2434 r = mmu_alloc_roots(vcpu);
2435 mmu_sync_roots(vcpu);
2436 spin_unlock(&vcpu->kvm->mmu_lock);
2437 if (r)
2438 goto out;
2439 /* set_cr3() should ensure TLB has been flushed */
2440 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2441 out:
2442 return r;
2443 }
2444 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2445
2446 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2447 {
2448 mmu_free_roots(vcpu);
2449 }
2450
2451 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2452 struct kvm_mmu_page *sp,
2453 u64 *spte)
2454 {
2455 u64 pte;
2456 struct kvm_mmu_page *child;
2457
2458 pte = *spte;
2459 if (is_shadow_present_pte(pte)) {
2460 if (is_last_spte(pte, sp->role.level))
2461 rmap_remove(vcpu->kvm, spte);
2462 else {
2463 child = page_header(pte & PT64_BASE_ADDR_MASK);
2464 mmu_page_remove_parent_pte(child, spte);
2465 }
2466 }
2467 __set_spte(spte, shadow_trap_nonpresent_pte);
2468 if (is_large_pte(pte))
2469 --vcpu->kvm->stat.lpages;
2470 }
2471
2472 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2473 struct kvm_mmu_page *sp,
2474 u64 *spte,
2475 const void *new)
2476 {
2477 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2478 ++vcpu->kvm->stat.mmu_pde_zapped;
2479 return;
2480 }
2481
2482 ++vcpu->kvm->stat.mmu_pte_updated;
2483 if (sp->role.glevels == PT32_ROOT_LEVEL)
2484 paging32_update_pte(vcpu, sp, spte, new);
2485 else
2486 paging64_update_pte(vcpu, sp, spte, new);
2487 }
2488
2489 static bool need_remote_flush(u64 old, u64 new)
2490 {
2491 if (!is_shadow_present_pte(old))
2492 return false;
2493 if (!is_shadow_present_pte(new))
2494 return true;
2495 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2496 return true;
2497 old ^= PT64_NX_MASK;
2498 new ^= PT64_NX_MASK;
2499 return (old & ~new & PT64_PERM_MASK) != 0;
2500 }
2501
2502 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2503 {
2504 if (need_remote_flush(old, new))
2505 kvm_flush_remote_tlbs(vcpu->kvm);
2506 else
2507 kvm_mmu_flush_tlb(vcpu);
2508 }
2509
2510 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2511 {
2512 u64 *spte = vcpu->arch.last_pte_updated;
2513
2514 return !!(spte && (*spte & shadow_accessed_mask));
2515 }
2516
2517 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2518 const u8 *new, int bytes)
2519 {
2520 gfn_t gfn;
2521 int r;
2522 u64 gpte = 0;
2523 pfn_t pfn;
2524
2525 if (bytes != 4 && bytes != 8)
2526 return;
2527
2528 /*
2529 * Assume that the pte write on a page table of the same type
2530 * as the current vcpu paging mode. This is nearly always true
2531 * (might be false while changing modes). Note it is verified later
2532 * by update_pte().
2533 */
2534 if (is_pae(vcpu)) {
2535 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2536 if ((bytes == 4) && (gpa % 4 == 0)) {
2537 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2538 if (r)
2539 return;
2540 memcpy((void *)&gpte + (gpa % 8), new, 4);
2541 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2542 memcpy((void *)&gpte, new, 8);
2543 }
2544 } else {
2545 if ((bytes == 4) && (gpa % 4 == 0))
2546 memcpy((void *)&gpte, new, 4);
2547 }
2548 if (!is_present_gpte(gpte))
2549 return;
2550 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2551
2552 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2553 smp_rmb();
2554 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2555
2556 if (is_error_pfn(pfn)) {
2557 kvm_release_pfn_clean(pfn);
2558 return;
2559 }
2560 vcpu->arch.update_pte.gfn = gfn;
2561 vcpu->arch.update_pte.pfn = pfn;
2562 }
2563
2564 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2565 {
2566 u64 *spte = vcpu->arch.last_pte_updated;
2567
2568 if (spte
2569 && vcpu->arch.last_pte_gfn == gfn
2570 && shadow_accessed_mask
2571 && !(*spte & shadow_accessed_mask)
2572 && is_shadow_present_pte(*spte))
2573 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2574 }
2575
2576 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2577 const u8 *new, int bytes,
2578 bool guest_initiated)
2579 {
2580 gfn_t gfn = gpa >> PAGE_SHIFT;
2581 struct kvm_mmu_page *sp;
2582 struct hlist_node *node, *n;
2583 struct hlist_head *bucket;
2584 unsigned index;
2585 u64 entry, gentry;
2586 u64 *spte;
2587 unsigned offset = offset_in_page(gpa);
2588 unsigned pte_size;
2589 unsigned page_offset;
2590 unsigned misaligned;
2591 unsigned quadrant;
2592 int level;
2593 int flooded = 0;
2594 int npte;
2595 int r;
2596
2597 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2598 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
2599 spin_lock(&vcpu->kvm->mmu_lock);
2600 kvm_mmu_access_page(vcpu, gfn);
2601 kvm_mmu_free_some_pages(vcpu);
2602 ++vcpu->kvm->stat.mmu_pte_write;
2603 kvm_mmu_audit(vcpu, "pre pte write");
2604 if (guest_initiated) {
2605 if (gfn == vcpu->arch.last_pt_write_gfn
2606 && !last_updated_pte_accessed(vcpu)) {
2607 ++vcpu->arch.last_pt_write_count;
2608 if (vcpu->arch.last_pt_write_count >= 3)
2609 flooded = 1;
2610 } else {
2611 vcpu->arch.last_pt_write_gfn = gfn;
2612 vcpu->arch.last_pt_write_count = 1;
2613 vcpu->arch.last_pte_updated = NULL;
2614 }
2615 }
2616 index = kvm_page_table_hashfn(gfn);
2617 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2618 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2619 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2620 continue;
2621 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2622 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2623 misaligned |= bytes < 4;
2624 if (misaligned || flooded) {
2625 /*
2626 * Misaligned accesses are too much trouble to fix
2627 * up; also, they usually indicate a page is not used
2628 * as a page table.
2629 *
2630 * If we're seeing too many writes to a page,
2631 * it may no longer be a page table, or we may be
2632 * forking, in which case it is better to unmap the
2633 * page.
2634 */
2635 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2636 gpa, bytes, sp->role.word);
2637 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2638 n = bucket->first;
2639 ++vcpu->kvm->stat.mmu_flooded;
2640 continue;
2641 }
2642 page_offset = offset;
2643 level = sp->role.level;
2644 npte = 1;
2645 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2646 page_offset <<= 1; /* 32->64 */
2647 /*
2648 * A 32-bit pde maps 4MB while the shadow pdes map
2649 * only 2MB. So we need to double the offset again
2650 * and zap two pdes instead of one.
2651 */
2652 if (level == PT32_ROOT_LEVEL) {
2653 page_offset &= ~7; /* kill rounding error */
2654 page_offset <<= 1;
2655 npte = 2;
2656 }
2657 quadrant = page_offset >> PAGE_SHIFT;
2658 page_offset &= ~PAGE_MASK;
2659 if (quadrant != sp->role.quadrant)
2660 continue;
2661 }
2662 spte = &sp->spt[page_offset / sizeof(*spte)];
2663 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2664 gentry = 0;
2665 r = kvm_read_guest_atomic(vcpu->kvm,
2666 gpa & ~(u64)(pte_size - 1),
2667 &gentry, pte_size);
2668 new = (const void *)&gentry;
2669 if (r < 0)
2670 new = NULL;
2671 }
2672 while (npte--) {
2673 entry = *spte;
2674 mmu_pte_write_zap_pte(vcpu, sp, spte);
2675 if (new)
2676 mmu_pte_write_new_pte(vcpu, sp, spte, new);
2677 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2678 ++spte;
2679 }
2680 }
2681 kvm_mmu_audit(vcpu, "post pte write");
2682 spin_unlock(&vcpu->kvm->mmu_lock);
2683 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2684 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2685 vcpu->arch.update_pte.pfn = bad_pfn;
2686 }
2687 }
2688
2689 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2690 {
2691 gpa_t gpa;
2692 int r;
2693
2694 if (tdp_enabled)
2695 return 0;
2696
2697 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
2698
2699 spin_lock(&vcpu->kvm->mmu_lock);
2700 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2701 spin_unlock(&vcpu->kvm->mmu_lock);
2702 return r;
2703 }
2704 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2705
2706 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2707 {
2708 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2709 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2710 struct kvm_mmu_page *sp;
2711
2712 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2713 struct kvm_mmu_page, link);
2714 kvm_mmu_zap_page(vcpu->kvm, sp);
2715 ++vcpu->kvm->stat.mmu_recycled;
2716 }
2717 }
2718
2719 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2720 {
2721 int r;
2722 enum emulation_result er;
2723
2724 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2725 if (r < 0)
2726 goto out;
2727
2728 if (!r) {
2729 r = 1;
2730 goto out;
2731 }
2732
2733 r = mmu_topup_memory_caches(vcpu);
2734 if (r)
2735 goto out;
2736
2737 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
2738
2739 switch (er) {
2740 case EMULATE_DONE:
2741 return 1;
2742 case EMULATE_DO_MMIO:
2743 ++vcpu->stat.mmio_exits;
2744 return 0;
2745 case EMULATE_FAIL:
2746 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2747 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2748 return 0;
2749 default:
2750 BUG();
2751 }
2752 out:
2753 return r;
2754 }
2755 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2756
2757 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2758 {
2759 vcpu->arch.mmu.invlpg(vcpu, gva);
2760 kvm_mmu_flush_tlb(vcpu);
2761 ++vcpu->stat.invlpg;
2762 }
2763 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2764
2765 void kvm_enable_tdp(void)
2766 {
2767 tdp_enabled = true;
2768 }
2769 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2770
2771 void kvm_disable_tdp(void)
2772 {
2773 tdp_enabled = false;
2774 }
2775 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2776
2777 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2778 {
2779 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2780 }
2781
2782 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2783 {
2784 struct page *page;
2785 int i;
2786
2787 ASSERT(vcpu);
2788
2789 /*
2790 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2791 * Therefore we need to allocate shadow page tables in the first
2792 * 4GB of memory, which happens to fit the DMA32 zone.
2793 */
2794 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2795 if (!page)
2796 goto error_1;
2797 vcpu->arch.mmu.pae_root = page_address(page);
2798 for (i = 0; i < 4; ++i)
2799 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2800
2801 return 0;
2802
2803 error_1:
2804 free_mmu_pages(vcpu);
2805 return -ENOMEM;
2806 }
2807
2808 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2809 {
2810 ASSERT(vcpu);
2811 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2812
2813 return alloc_mmu_pages(vcpu);
2814 }
2815
2816 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2817 {
2818 ASSERT(vcpu);
2819 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2820
2821 return init_kvm_mmu(vcpu);
2822 }
2823
2824 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2825 {
2826 ASSERT(vcpu);
2827
2828 destroy_kvm_mmu(vcpu);
2829 free_mmu_pages(vcpu);
2830 mmu_free_memory_caches(vcpu);
2831 }
2832
2833 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2834 {
2835 struct kvm_mmu_page *sp;
2836
2837 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2838 int i;
2839 u64 *pt;
2840
2841 if (!test_bit(slot, sp->slot_bitmap))
2842 continue;
2843
2844 pt = sp->spt;
2845 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2846 /* avoid RMW */
2847 if (pt[i] & PT_WRITABLE_MASK)
2848 pt[i] &= ~PT_WRITABLE_MASK;
2849 }
2850 kvm_flush_remote_tlbs(kvm);
2851 }
2852
2853 void kvm_mmu_zap_all(struct kvm *kvm)
2854 {
2855 struct kvm_mmu_page *sp, *node;
2856
2857 spin_lock(&kvm->mmu_lock);
2858 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2859 if (kvm_mmu_zap_page(kvm, sp))
2860 node = container_of(kvm->arch.active_mmu_pages.next,
2861 struct kvm_mmu_page, link);
2862 spin_unlock(&kvm->mmu_lock);
2863
2864 kvm_flush_remote_tlbs(kvm);
2865 }
2866
2867 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2868 {
2869 struct kvm_mmu_page *page;
2870
2871 page = container_of(kvm->arch.active_mmu_pages.prev,
2872 struct kvm_mmu_page, link);
2873 kvm_mmu_zap_page(kvm, page);
2874 }
2875
2876 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2877 {
2878 struct kvm *kvm;
2879 struct kvm *kvm_freed = NULL;
2880 int cache_count = 0;
2881
2882 spin_lock(&kvm_lock);
2883
2884 list_for_each_entry(kvm, &vm_list, vm_list) {
2885 int npages;
2886
2887 if (!down_read_trylock(&kvm->slots_lock))
2888 continue;
2889 spin_lock(&kvm->mmu_lock);
2890 npages = kvm->arch.n_alloc_mmu_pages -
2891 kvm->arch.n_free_mmu_pages;
2892 cache_count += npages;
2893 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2894 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2895 cache_count--;
2896 kvm_freed = kvm;
2897 }
2898 nr_to_scan--;
2899
2900 spin_unlock(&kvm->mmu_lock);
2901 up_read(&kvm->slots_lock);
2902 }
2903 if (kvm_freed)
2904 list_move_tail(&kvm_freed->vm_list, &vm_list);
2905
2906 spin_unlock(&kvm_lock);
2907
2908 return cache_count;
2909 }
2910
2911 static struct shrinker mmu_shrinker = {
2912 .shrink = mmu_shrink,
2913 .seeks = DEFAULT_SEEKS * 10,
2914 };
2915
2916 static void mmu_destroy_caches(void)
2917 {
2918 if (pte_chain_cache)
2919 kmem_cache_destroy(pte_chain_cache);
2920 if (rmap_desc_cache)
2921 kmem_cache_destroy(rmap_desc_cache);
2922 if (mmu_page_header_cache)
2923 kmem_cache_destroy(mmu_page_header_cache);
2924 }
2925
2926 void kvm_mmu_module_exit(void)
2927 {
2928 mmu_destroy_caches();
2929 unregister_shrinker(&mmu_shrinker);
2930 }
2931
2932 int kvm_mmu_module_init(void)
2933 {
2934 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2935 sizeof(struct kvm_pte_chain),
2936 0, 0, NULL);
2937 if (!pte_chain_cache)
2938 goto nomem;
2939 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2940 sizeof(struct kvm_rmap_desc),
2941 0, 0, NULL);
2942 if (!rmap_desc_cache)
2943 goto nomem;
2944
2945 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2946 sizeof(struct kvm_mmu_page),
2947 0, 0, NULL);
2948 if (!mmu_page_header_cache)
2949 goto nomem;
2950
2951 register_shrinker(&mmu_shrinker);
2952
2953 return 0;
2954
2955 nomem:
2956 mmu_destroy_caches();
2957 return -ENOMEM;
2958 }
2959
2960 /*
2961 * Caculate mmu pages needed for kvm.
2962 */
2963 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2964 {
2965 int i;
2966 unsigned int nr_mmu_pages;
2967 unsigned int nr_pages = 0;
2968
2969 for (i = 0; i < kvm->nmemslots; i++)
2970 nr_pages += kvm->memslots[i].npages;
2971
2972 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2973 nr_mmu_pages = max(nr_mmu_pages,
2974 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2975
2976 return nr_mmu_pages;
2977 }
2978
2979 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2980 unsigned len)
2981 {
2982 if (len > buffer->len)
2983 return NULL;
2984 return buffer->ptr;
2985 }
2986
2987 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2988 unsigned len)
2989 {
2990 void *ret;
2991
2992 ret = pv_mmu_peek_buffer(buffer, len);
2993 if (!ret)
2994 return ret;
2995 buffer->ptr += len;
2996 buffer->len -= len;
2997 buffer->processed += len;
2998 return ret;
2999 }
3000
3001 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3002 gpa_t addr, gpa_t value)
3003 {
3004 int bytes = 8;
3005 int r;
3006
3007 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3008 bytes = 4;
3009
3010 r = mmu_topup_memory_caches(vcpu);
3011 if (r)
3012 return r;
3013
3014 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3015 return -EFAULT;
3016
3017 return 1;
3018 }
3019
3020 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3021 {
3022 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3023 return 1;
3024 }
3025
3026 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3027 {
3028 spin_lock(&vcpu->kvm->mmu_lock);
3029 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3030 spin_unlock(&vcpu->kvm->mmu_lock);
3031 return 1;
3032 }
3033
3034 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3035 struct kvm_pv_mmu_op_buffer *buffer)
3036 {
3037 struct kvm_mmu_op_header *header;
3038
3039 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3040 if (!header)
3041 return 0;
3042 switch (header->op) {
3043 case KVM_MMU_OP_WRITE_PTE: {
3044 struct kvm_mmu_op_write_pte *wpte;
3045
3046 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3047 if (!wpte)
3048 return 0;
3049 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3050 wpte->pte_val);
3051 }
3052 case KVM_MMU_OP_FLUSH_TLB: {
3053 struct kvm_mmu_op_flush_tlb *ftlb;
3054
3055 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3056 if (!ftlb)
3057 return 0;
3058 return kvm_pv_mmu_flush_tlb(vcpu);
3059 }
3060 case KVM_MMU_OP_RELEASE_PT: {
3061 struct kvm_mmu_op_release_pt *rpt;
3062
3063 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3064 if (!rpt)
3065 return 0;
3066 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3067 }
3068 default: return 0;
3069 }
3070 }
3071
3072 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3073 gpa_t addr, unsigned long *ret)
3074 {
3075 int r;
3076 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3077
3078 buffer->ptr = buffer->buf;
3079 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3080 buffer->processed = 0;
3081
3082 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3083 if (r)
3084 goto out;
3085
3086 while (buffer->len) {
3087 r = kvm_pv_mmu_op_one(vcpu, buffer);
3088 if (r < 0)
3089 goto out;
3090 if (r == 0)
3091 break;
3092 }
3093
3094 r = 1;
3095 out:
3096 *ret = buffer->processed;
3097 return r;
3098 }
3099
3100 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3101 {
3102 struct kvm_shadow_walk_iterator iterator;
3103 int nr_sptes = 0;
3104
3105 spin_lock(&vcpu->kvm->mmu_lock);
3106 for_each_shadow_entry(vcpu, addr, iterator) {
3107 sptes[iterator.level-1] = *iterator.sptep;
3108 nr_sptes++;
3109 if (!is_shadow_present_pte(*iterator.sptep))
3110 break;
3111 }
3112 spin_unlock(&vcpu->kvm->mmu_lock);
3113
3114 return nr_sptes;
3115 }
3116 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3117
3118 #ifdef AUDIT
3119
3120 static const char *audit_msg;
3121
3122 static gva_t canonicalize(gva_t gva)
3123 {
3124 #ifdef CONFIG_X86_64
3125 gva = (long long)(gva << 16) >> 16;
3126 #endif
3127 return gva;
3128 }
3129
3130
3131 typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
3132 u64 *sptep);
3133
3134 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3135 inspect_spte_fn fn)
3136 {
3137 int i;
3138
3139 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3140 u64 ent = sp->spt[i];
3141
3142 if (is_shadow_present_pte(ent)) {
3143 if (!is_last_spte(ent, sp->role.level)) {
3144 struct kvm_mmu_page *child;
3145 child = page_header(ent & PT64_BASE_ADDR_MASK);
3146 __mmu_spte_walk(kvm, child, fn);
3147 } else
3148 fn(kvm, sp, &sp->spt[i]);
3149 }
3150 }
3151 }
3152
3153 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3154 {
3155 int i;
3156 struct kvm_mmu_page *sp;
3157
3158 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3159 return;
3160 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3161 hpa_t root = vcpu->arch.mmu.root_hpa;
3162 sp = page_header(root);
3163 __mmu_spte_walk(vcpu->kvm, sp, fn);
3164 return;
3165 }
3166 for (i = 0; i < 4; ++i) {
3167 hpa_t root = vcpu->arch.mmu.pae_root[i];
3168
3169 if (root && VALID_PAGE(root)) {
3170 root &= PT64_BASE_ADDR_MASK;
3171 sp = page_header(root);
3172 __mmu_spte_walk(vcpu->kvm, sp, fn);
3173 }
3174 }
3175 return;
3176 }
3177
3178 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3179 gva_t va, int level)
3180 {
3181 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3182 int i;
3183 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3184
3185 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3186 u64 ent = pt[i];
3187
3188 if (ent == shadow_trap_nonpresent_pte)
3189 continue;
3190
3191 va = canonicalize(va);
3192 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3193 audit_mappings_page(vcpu, ent, va, level - 1);
3194 else {
3195 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
3196 gfn_t gfn = gpa >> PAGE_SHIFT;
3197 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3198 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3199
3200 if (is_error_pfn(pfn)) {
3201 kvm_release_pfn_clean(pfn);
3202 continue;
3203 }
3204
3205 if (is_shadow_present_pte(ent)
3206 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3207 printk(KERN_ERR "xx audit error: (%s) levels %d"
3208 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3209 audit_msg, vcpu->arch.mmu.root_level,
3210 va, gpa, hpa, ent,
3211 is_shadow_present_pte(ent));
3212 else if (ent == shadow_notrap_nonpresent_pte
3213 && !is_error_hpa(hpa))
3214 printk(KERN_ERR "audit: (%s) notrap shadow,"
3215 " valid guest gva %lx\n", audit_msg, va);
3216 kvm_release_pfn_clean(pfn);
3217
3218 }
3219 }
3220 }
3221
3222 static void audit_mappings(struct kvm_vcpu *vcpu)
3223 {
3224 unsigned i;
3225
3226 if (vcpu->arch.mmu.root_level == 4)
3227 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3228 else
3229 for (i = 0; i < 4; ++i)
3230 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3231 audit_mappings_page(vcpu,
3232 vcpu->arch.mmu.pae_root[i],
3233 i << 30,
3234 2);
3235 }
3236
3237 static int count_rmaps(struct kvm_vcpu *vcpu)
3238 {
3239 int nmaps = 0;
3240 int i, j, k;
3241
3242 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3243 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3244 struct kvm_rmap_desc *d;
3245
3246 for (j = 0; j < m->npages; ++j) {
3247 unsigned long *rmapp = &m->rmap[j];
3248
3249 if (!*rmapp)
3250 continue;
3251 if (!(*rmapp & 1)) {
3252 ++nmaps;
3253 continue;
3254 }
3255 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3256 while (d) {
3257 for (k = 0; k < RMAP_EXT; ++k)
3258 if (d->sptes[k])
3259 ++nmaps;
3260 else
3261 break;
3262 d = d->more;
3263 }
3264 }
3265 }
3266 return nmaps;
3267 }
3268
3269 void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
3270 {
3271 unsigned long *rmapp;
3272 struct kvm_mmu_page *rev_sp;
3273 gfn_t gfn;
3274
3275 if (*sptep & PT_WRITABLE_MASK) {
3276 rev_sp = page_header(__pa(sptep));
3277 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3278
3279 if (!gfn_to_memslot(kvm, gfn)) {
3280 if (!printk_ratelimit())
3281 return;
3282 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3283 audit_msg, gfn);
3284 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3285 audit_msg, sptep - rev_sp->spt,
3286 rev_sp->gfn);
3287 dump_stack();
3288 return;
3289 }
3290
3291 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3292 is_large_pte(*sptep));
3293 if (!*rmapp) {
3294 if (!printk_ratelimit())
3295 return;
3296 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3297 audit_msg, *sptep);
3298 dump_stack();
3299 }
3300 }
3301
3302 }
3303
3304 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3305 {
3306 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3307 }
3308
3309 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3310 {
3311 struct kvm_mmu_page *sp;
3312 int i;
3313
3314 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3315 u64 *pt = sp->spt;
3316
3317 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3318 continue;
3319
3320 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3321 u64 ent = pt[i];
3322
3323 if (!(ent & PT_PRESENT_MASK))
3324 continue;
3325 if (!(ent & PT_WRITABLE_MASK))
3326 continue;
3327 inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
3328 }
3329 }
3330 return;
3331 }
3332
3333 static void audit_rmap(struct kvm_vcpu *vcpu)
3334 {
3335 check_writable_mappings_rmap(vcpu);
3336 count_rmaps(vcpu);
3337 }
3338
3339 static void audit_write_protection(struct kvm_vcpu *vcpu)
3340 {
3341 struct kvm_mmu_page *sp;
3342 struct kvm_memory_slot *slot;
3343 unsigned long *rmapp;
3344 u64 *spte;
3345 gfn_t gfn;
3346
3347 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3348 if (sp->role.direct)
3349 continue;
3350 if (sp->unsync)
3351 continue;
3352
3353 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3354 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3355 rmapp = &slot->rmap[gfn - slot->base_gfn];
3356
3357 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3358 while (spte) {
3359 if (*spte & PT_WRITABLE_MASK)
3360 printk(KERN_ERR "%s: (%s) shadow page has "
3361 "writable mappings: gfn %lx role %x\n",
3362 __func__, audit_msg, sp->gfn,
3363 sp->role.word);
3364 spte = rmap_next(vcpu->kvm, rmapp, spte);
3365 }
3366 }
3367 }
3368
3369 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3370 {
3371 int olddbg = dbg;
3372
3373 dbg = 0;
3374 audit_msg = msg;
3375 audit_rmap(vcpu);
3376 audit_write_protection(vcpu);
3377 if (strcmp("pre pte write", audit_msg) != 0)
3378 audit_mappings(vcpu);
3379 audit_writable_sptes_have_rmaps(vcpu);
3380 dbg = olddbg;
3381 }
3382
3383 #endif
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