2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
24 #include "kvm_cache_regs.h"
26 #include <linux/kvm_host.h>
27 #include <linux/types.h>
28 #include <linux/string.h>
30 #include <linux/highmem.h>
31 #include <linux/module.h>
32 #include <linux/swap.h>
33 #include <linux/hugetlb.h>
34 #include <linux/compiler.h>
35 #include <linux/srcu.h>
36 #include <linux/slab.h>
37 #include <linux/uaccess.h>
40 #include <asm/cmpxchg.h>
45 * When setting this variable to true it enables Two-Dimensional-Paging
46 * where the hardware walks 2 page tables:
47 * 1. the guest-virtual to guest-physical
48 * 2. while doing 1. it walks guest-physical to host-physical
49 * If the hardware supports that we don't need to do shadow paging.
51 bool tdp_enabled
= false;
55 AUDIT_POST_PAGE_FAULT
,
66 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
67 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
71 #define pgprintk(x...) do { } while (0)
72 #define rmap_printk(x...) do { } while (0)
78 module_param(dbg
, bool, 0644);
82 #define ASSERT(x) do { } while (0)
86 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
87 __FILE__, __LINE__, #x); \
91 #define PTE_PREFETCH_NUM 8
93 #define PT_FIRST_AVAIL_BITS_SHIFT 9
94 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
96 #define PT64_LEVEL_BITS 9
98 #define PT64_LEVEL_SHIFT(level) \
99 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
101 #define PT64_INDEX(address, level)\
102 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
105 #define PT32_LEVEL_BITS 10
107 #define PT32_LEVEL_SHIFT(level) \
108 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
110 #define PT32_LVL_OFFSET_MASK(level) \
111 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
112 * PT32_LEVEL_BITS))) - 1))
114 #define PT32_INDEX(address, level)\
115 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
118 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
119 #define PT64_DIR_BASE_ADDR_MASK \
120 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
121 #define PT64_LVL_ADDR_MASK(level) \
122 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
123 * PT64_LEVEL_BITS))) - 1))
124 #define PT64_LVL_OFFSET_MASK(level) \
125 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
126 * PT64_LEVEL_BITS))) - 1))
128 #define PT32_BASE_ADDR_MASK PAGE_MASK
129 #define PT32_DIR_BASE_ADDR_MASK \
130 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
131 #define PT32_LVL_ADDR_MASK(level) \
132 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
133 * PT32_LEVEL_BITS))) - 1))
135 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
138 #define ACC_EXEC_MASK 1
139 #define ACC_WRITE_MASK PT_WRITABLE_MASK
140 #define ACC_USER_MASK PT_USER_MASK
141 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
143 #include <trace/events/kvm.h>
145 #define CREATE_TRACE_POINTS
146 #include "mmutrace.h"
148 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
150 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
152 /* make pte_list_desc fit well in cache line */
153 #define PTE_LIST_EXT 3
155 struct pte_list_desc
{
156 u64
*sptes
[PTE_LIST_EXT
];
157 struct pte_list_desc
*more
;
160 struct kvm_shadow_walk_iterator
{
168 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
169 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
170 shadow_walk_okay(&(_walker)); \
171 shadow_walk_next(&(_walker)))
173 #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \
174 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
175 shadow_walk_okay(&(_walker)) && \
176 ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \
177 __shadow_walk_next(&(_walker), spte))
179 static struct kmem_cache
*pte_list_desc_cache
;
180 static struct kmem_cache
*mmu_page_header_cache
;
181 static struct percpu_counter kvm_total_used_mmu_pages
;
183 static u64 __read_mostly shadow_nx_mask
;
184 static u64 __read_mostly shadow_x_mask
; /* mutual exclusive with nx_mask */
185 static u64 __read_mostly shadow_user_mask
;
186 static u64 __read_mostly shadow_accessed_mask
;
187 static u64 __read_mostly shadow_dirty_mask
;
188 static u64 __read_mostly shadow_mmio_mask
;
190 static void mmu_spte_set(u64
*sptep
, u64 spte
);
192 void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask
)
194 shadow_mmio_mask
= mmio_mask
;
196 EXPORT_SYMBOL_GPL(kvm_mmu_set_mmio_spte_mask
);
198 static void mark_mmio_spte(u64
*sptep
, u64 gfn
, unsigned access
)
200 access
&= ACC_WRITE_MASK
| ACC_USER_MASK
;
202 trace_mark_mmio_spte(sptep
, gfn
, access
);
203 mmu_spte_set(sptep
, shadow_mmio_mask
| access
| gfn
<< PAGE_SHIFT
);
206 static bool is_mmio_spte(u64 spte
)
208 return (spte
& shadow_mmio_mask
) == shadow_mmio_mask
;
211 static gfn_t
get_mmio_spte_gfn(u64 spte
)
213 return (spte
& ~shadow_mmio_mask
) >> PAGE_SHIFT
;
216 static unsigned get_mmio_spte_access(u64 spte
)
218 return (spte
& ~shadow_mmio_mask
) & ~PAGE_MASK
;
221 static bool set_mmio_spte(u64
*sptep
, gfn_t gfn
, pfn_t pfn
, unsigned access
)
223 if (unlikely(is_noslot_pfn(pfn
))) {
224 mark_mmio_spte(sptep
, gfn
, access
);
231 static inline u64
rsvd_bits(int s
, int e
)
233 return ((1ULL << (e
- s
+ 1)) - 1) << s
;
236 void kvm_mmu_set_mask_ptes(u64 user_mask
, u64 accessed_mask
,
237 u64 dirty_mask
, u64 nx_mask
, u64 x_mask
)
239 shadow_user_mask
= user_mask
;
240 shadow_accessed_mask
= accessed_mask
;
241 shadow_dirty_mask
= dirty_mask
;
242 shadow_nx_mask
= nx_mask
;
243 shadow_x_mask
= x_mask
;
245 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes
);
247 static int is_cpuid_PSE36(void)
252 static int is_nx(struct kvm_vcpu
*vcpu
)
254 return vcpu
->arch
.efer
& EFER_NX
;
257 static int is_shadow_present_pte(u64 pte
)
259 return pte
& PT_PRESENT_MASK
&& !is_mmio_spte(pte
);
262 static int is_large_pte(u64 pte
)
264 return pte
& PT_PAGE_SIZE_MASK
;
267 static int is_dirty_gpte(unsigned long pte
)
269 return pte
& PT_DIRTY_MASK
;
272 static int is_rmap_spte(u64 pte
)
274 return is_shadow_present_pte(pte
);
277 static int is_last_spte(u64 pte
, int level
)
279 if (level
== PT_PAGE_TABLE_LEVEL
)
281 if (is_large_pte(pte
))
286 static pfn_t
spte_to_pfn(u64 pte
)
288 return (pte
& PT64_BASE_ADDR_MASK
) >> PAGE_SHIFT
;
291 static gfn_t
pse36_gfn_delta(u32 gpte
)
293 int shift
= 32 - PT32_DIR_PSE36_SHIFT
- PAGE_SHIFT
;
295 return (gpte
& PT32_DIR_PSE36_MASK
) << shift
;
299 static void __set_spte(u64
*sptep
, u64 spte
)
304 static void __update_clear_spte_fast(u64
*sptep
, u64 spte
)
309 static u64
__update_clear_spte_slow(u64
*sptep
, u64 spte
)
311 return xchg(sptep
, spte
);
314 static u64
__get_spte_lockless(u64
*sptep
)
316 return ACCESS_ONCE(*sptep
);
319 static bool __check_direct_spte_mmio_pf(u64 spte
)
321 /* It is valid if the spte is zapped. */
333 static void count_spte_clear(u64
*sptep
, u64 spte
)
335 struct kvm_mmu_page
*sp
= page_header(__pa(sptep
));
337 if (is_shadow_present_pte(spte
))
340 /* Ensure the spte is completely set before we increase the count */
342 sp
->clear_spte_count
++;
345 static void __set_spte(u64
*sptep
, u64 spte
)
347 union split_spte
*ssptep
, sspte
;
349 ssptep
= (union split_spte
*)sptep
;
350 sspte
= (union split_spte
)spte
;
352 ssptep
->spte_high
= sspte
.spte_high
;
355 * If we map the spte from nonpresent to present, We should store
356 * the high bits firstly, then set present bit, so cpu can not
357 * fetch this spte while we are setting the spte.
361 ssptep
->spte_low
= sspte
.spte_low
;
364 static void __update_clear_spte_fast(u64
*sptep
, u64 spte
)
366 union split_spte
*ssptep
, sspte
;
368 ssptep
= (union split_spte
*)sptep
;
369 sspte
= (union split_spte
)spte
;
371 ssptep
->spte_low
= sspte
.spte_low
;
374 * If we map the spte from present to nonpresent, we should clear
375 * present bit firstly to avoid vcpu fetch the old high bits.
379 ssptep
->spte_high
= sspte
.spte_high
;
380 count_spte_clear(sptep
, spte
);
383 static u64
__update_clear_spte_slow(u64
*sptep
, u64 spte
)
385 union split_spte
*ssptep
, sspte
, orig
;
387 ssptep
= (union split_spte
*)sptep
;
388 sspte
= (union split_spte
)spte
;
390 /* xchg acts as a barrier before the setting of the high bits */
391 orig
.spte_low
= xchg(&ssptep
->spte_low
, sspte
.spte_low
);
392 orig
.spte_high
= ssptep
->spte_high
;
393 ssptep
->spte_high
= sspte
.spte_high
;
394 count_spte_clear(sptep
, spte
);
400 * The idea using the light way get the spte on x86_32 guest is from
401 * gup_get_pte(arch/x86/mm/gup.c).
402 * The difference is we can not catch the spte tlb flush if we leave
403 * guest mode, so we emulate it by increase clear_spte_count when spte
406 static u64
__get_spte_lockless(u64
*sptep
)
408 struct kvm_mmu_page
*sp
= page_header(__pa(sptep
));
409 union split_spte spte
, *orig
= (union split_spte
*)sptep
;
413 count
= sp
->clear_spte_count
;
416 spte
.spte_low
= orig
->spte_low
;
419 spte
.spte_high
= orig
->spte_high
;
422 if (unlikely(spte
.spte_low
!= orig
->spte_low
||
423 count
!= sp
->clear_spte_count
))
429 static bool __check_direct_spte_mmio_pf(u64 spte
)
431 union split_spte sspte
= (union split_spte
)spte
;
432 u32 high_mmio_mask
= shadow_mmio_mask
>> 32;
434 /* It is valid if the spte is zapped. */
438 /* It is valid if the spte is being zapped. */
439 if (sspte
.spte_low
== 0ull &&
440 (sspte
.spte_high
& high_mmio_mask
) == high_mmio_mask
)
447 static bool spte_has_volatile_bits(u64 spte
)
449 if (!shadow_accessed_mask
)
452 if (!is_shadow_present_pte(spte
))
455 if ((spte
& shadow_accessed_mask
) &&
456 (!is_writable_pte(spte
) || (spte
& shadow_dirty_mask
)))
462 static bool spte_is_bit_cleared(u64 old_spte
, u64 new_spte
, u64 bit_mask
)
464 return (old_spte
& bit_mask
) && !(new_spte
& bit_mask
);
467 /* Rules for using mmu_spte_set:
468 * Set the sptep from nonpresent to present.
469 * Note: the sptep being assigned *must* be either not present
470 * or in a state where the hardware will not attempt to update
473 static void mmu_spte_set(u64
*sptep
, u64 new_spte
)
475 WARN_ON(is_shadow_present_pte(*sptep
));
476 __set_spte(sptep
, new_spte
);
479 /* Rules for using mmu_spte_update:
480 * Update the state bits, it means the mapped pfn is not changged.
482 static void mmu_spte_update(u64
*sptep
, u64 new_spte
)
484 u64 mask
, old_spte
= *sptep
;
486 WARN_ON(!is_rmap_spte(new_spte
));
488 if (!is_shadow_present_pte(old_spte
))
489 return mmu_spte_set(sptep
, new_spte
);
491 new_spte
|= old_spte
& shadow_dirty_mask
;
493 mask
= shadow_accessed_mask
;
494 if (is_writable_pte(old_spte
))
495 mask
|= shadow_dirty_mask
;
497 if (!spte_has_volatile_bits(old_spte
) || (new_spte
& mask
) == mask
)
498 __update_clear_spte_fast(sptep
, new_spte
);
500 old_spte
= __update_clear_spte_slow(sptep
, new_spte
);
502 if (!shadow_accessed_mask
)
505 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_accessed_mask
))
506 kvm_set_pfn_accessed(spte_to_pfn(old_spte
));
507 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_dirty_mask
))
508 kvm_set_pfn_dirty(spte_to_pfn(old_spte
));
512 * Rules for using mmu_spte_clear_track_bits:
513 * It sets the sptep from present to nonpresent, and track the
514 * state bits, it is used to clear the last level sptep.
516 static int mmu_spte_clear_track_bits(u64
*sptep
)
519 u64 old_spte
= *sptep
;
521 if (!spte_has_volatile_bits(old_spte
))
522 __update_clear_spte_fast(sptep
, 0ull);
524 old_spte
= __update_clear_spte_slow(sptep
, 0ull);
526 if (!is_rmap_spte(old_spte
))
529 pfn
= spte_to_pfn(old_spte
);
530 if (!shadow_accessed_mask
|| old_spte
& shadow_accessed_mask
)
531 kvm_set_pfn_accessed(pfn
);
532 if (!shadow_dirty_mask
|| (old_spte
& shadow_dirty_mask
))
533 kvm_set_pfn_dirty(pfn
);
538 * Rules for using mmu_spte_clear_no_track:
539 * Directly clear spte without caring the state bits of sptep,
540 * it is used to set the upper level spte.
542 static void mmu_spte_clear_no_track(u64
*sptep
)
544 __update_clear_spte_fast(sptep
, 0ull);
547 static u64
mmu_spte_get_lockless(u64
*sptep
)
549 return __get_spte_lockless(sptep
);
552 static void walk_shadow_page_lockless_begin(struct kvm_vcpu
*vcpu
)
555 * Prevent page table teardown by making any free-er wait during
556 * kvm_flush_remote_tlbs() IPI to all active vcpus.
559 vcpu
->mode
= READING_SHADOW_PAGE_TABLES
;
561 * Make sure a following spte read is not reordered ahead of the write
567 static void walk_shadow_page_lockless_end(struct kvm_vcpu
*vcpu
)
570 * Make sure the write to vcpu->mode is not reordered in front of
571 * reads to sptes. If it does, kvm_commit_zap_page() can see us
572 * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
575 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
579 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache
*cache
,
580 struct kmem_cache
*base_cache
, int min
)
584 if (cache
->nobjs
>= min
)
586 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
587 obj
= kmem_cache_zalloc(base_cache
, GFP_KERNEL
);
590 cache
->objects
[cache
->nobjs
++] = obj
;
595 static int mmu_memory_cache_free_objects(struct kvm_mmu_memory_cache
*cache
)
600 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache
*mc
,
601 struct kmem_cache
*cache
)
604 kmem_cache_free(cache
, mc
->objects
[--mc
->nobjs
]);
607 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache
*cache
,
612 if (cache
->nobjs
>= min
)
614 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
615 page
= (void *)__get_free_page(GFP_KERNEL
);
618 cache
->objects
[cache
->nobjs
++] = page
;
623 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache
*mc
)
626 free_page((unsigned long)mc
->objects
[--mc
->nobjs
]);
629 static int mmu_topup_memory_caches(struct kvm_vcpu
*vcpu
)
633 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_pte_list_desc_cache
,
634 pte_list_desc_cache
, 8 + PTE_PREFETCH_NUM
);
637 r
= mmu_topup_memory_cache_page(&vcpu
->arch
.mmu_page_cache
, 8);
640 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
641 mmu_page_header_cache
, 4);
646 static void mmu_free_memory_caches(struct kvm_vcpu
*vcpu
)
648 mmu_free_memory_cache(&vcpu
->arch
.mmu_pte_list_desc_cache
,
649 pte_list_desc_cache
);
650 mmu_free_memory_cache_page(&vcpu
->arch
.mmu_page_cache
);
651 mmu_free_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
652 mmu_page_header_cache
);
655 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache
*mc
,
661 p
= mc
->objects
[--mc
->nobjs
];
665 static struct pte_list_desc
*mmu_alloc_pte_list_desc(struct kvm_vcpu
*vcpu
)
667 return mmu_memory_cache_alloc(&vcpu
->arch
.mmu_pte_list_desc_cache
,
668 sizeof(struct pte_list_desc
));
671 static void mmu_free_pte_list_desc(struct pte_list_desc
*pte_list_desc
)
673 kmem_cache_free(pte_list_desc_cache
, pte_list_desc
);
676 static gfn_t
kvm_mmu_page_get_gfn(struct kvm_mmu_page
*sp
, int index
)
678 if (!sp
->role
.direct
)
679 return sp
->gfns
[index
];
681 return sp
->gfn
+ (index
<< ((sp
->role
.level
- 1) * PT64_LEVEL_BITS
));
684 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page
*sp
, int index
, gfn_t gfn
)
687 BUG_ON(gfn
!= kvm_mmu_page_get_gfn(sp
, index
));
689 sp
->gfns
[index
] = gfn
;
693 * Return the pointer to the large page information for a given gfn,
694 * handling slots that are not large page aligned.
696 static struct kvm_lpage_info
*lpage_info_slot(gfn_t gfn
,
697 struct kvm_memory_slot
*slot
,
702 idx
= gfn_to_index(gfn
, slot
->base_gfn
, level
);
703 return &slot
->arch
.lpage_info
[level
- 2][idx
];
706 static void account_shadowed(struct kvm
*kvm
, gfn_t gfn
)
708 struct kvm_memory_slot
*slot
;
709 struct kvm_lpage_info
*linfo
;
712 slot
= gfn_to_memslot(kvm
, gfn
);
713 for (i
= PT_DIRECTORY_LEVEL
;
714 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
715 linfo
= lpage_info_slot(gfn
, slot
, i
);
716 linfo
->write_count
+= 1;
718 kvm
->arch
.indirect_shadow_pages
++;
721 static void unaccount_shadowed(struct kvm
*kvm
, gfn_t gfn
)
723 struct kvm_memory_slot
*slot
;
724 struct kvm_lpage_info
*linfo
;
727 slot
= gfn_to_memslot(kvm
, gfn
);
728 for (i
= PT_DIRECTORY_LEVEL
;
729 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
730 linfo
= lpage_info_slot(gfn
, slot
, i
);
731 linfo
->write_count
-= 1;
732 WARN_ON(linfo
->write_count
< 0);
734 kvm
->arch
.indirect_shadow_pages
--;
737 static int has_wrprotected_page(struct kvm
*kvm
,
741 struct kvm_memory_slot
*slot
;
742 struct kvm_lpage_info
*linfo
;
744 slot
= gfn_to_memslot(kvm
, gfn
);
746 linfo
= lpage_info_slot(gfn
, slot
, level
);
747 return linfo
->write_count
;
753 static int host_mapping_level(struct kvm
*kvm
, gfn_t gfn
)
755 unsigned long page_size
;
758 page_size
= kvm_host_page_size(kvm
, gfn
);
760 for (i
= PT_PAGE_TABLE_LEVEL
;
761 i
< (PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
); ++i
) {
762 if (page_size
>= KVM_HPAGE_SIZE(i
))
771 static struct kvm_memory_slot
*
772 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
775 struct kvm_memory_slot
*slot
;
777 slot
= gfn_to_memslot(vcpu
->kvm
, gfn
);
778 if (!slot
|| slot
->flags
& KVM_MEMSLOT_INVALID
||
779 (no_dirty_log
&& slot
->dirty_bitmap
))
785 static bool mapping_level_dirty_bitmap(struct kvm_vcpu
*vcpu
, gfn_t large_gfn
)
787 return !gfn_to_memslot_dirty_bitmap(vcpu
, large_gfn
, true);
790 static int mapping_level(struct kvm_vcpu
*vcpu
, gfn_t large_gfn
)
792 int host_level
, level
, max_level
;
794 host_level
= host_mapping_level(vcpu
->kvm
, large_gfn
);
796 if (host_level
== PT_PAGE_TABLE_LEVEL
)
799 max_level
= kvm_x86_ops
->get_lpage_level() < host_level
?
800 kvm_x86_ops
->get_lpage_level() : host_level
;
802 for (level
= PT_DIRECTORY_LEVEL
; level
<= max_level
; ++level
)
803 if (has_wrprotected_page(vcpu
->kvm
, large_gfn
, level
))
810 * Pte mapping structures:
812 * If pte_list bit zero is zero, then pte_list point to the spte.
814 * If pte_list bit zero is one, (then pte_list & ~1) points to a struct
815 * pte_list_desc containing more mappings.
817 * Returns the number of pte entries before the spte was added or zero if
818 * the spte was not added.
821 static int pte_list_add(struct kvm_vcpu
*vcpu
, u64
*spte
,
822 unsigned long *pte_list
)
824 struct pte_list_desc
*desc
;
828 rmap_printk("pte_list_add: %p %llx 0->1\n", spte
, *spte
);
829 *pte_list
= (unsigned long)spte
;
830 } else if (!(*pte_list
& 1)) {
831 rmap_printk("pte_list_add: %p %llx 1->many\n", spte
, *spte
);
832 desc
= mmu_alloc_pte_list_desc(vcpu
);
833 desc
->sptes
[0] = (u64
*)*pte_list
;
834 desc
->sptes
[1] = spte
;
835 *pte_list
= (unsigned long)desc
| 1;
838 rmap_printk("pte_list_add: %p %llx many->many\n", spte
, *spte
);
839 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
840 while (desc
->sptes
[PTE_LIST_EXT
-1] && desc
->more
) {
842 count
+= PTE_LIST_EXT
;
844 if (desc
->sptes
[PTE_LIST_EXT
-1]) {
845 desc
->more
= mmu_alloc_pte_list_desc(vcpu
);
848 for (i
= 0; desc
->sptes
[i
]; ++i
)
850 desc
->sptes
[i
] = spte
;
856 pte_list_desc_remove_entry(unsigned long *pte_list
, struct pte_list_desc
*desc
,
857 int i
, struct pte_list_desc
*prev_desc
)
861 for (j
= PTE_LIST_EXT
- 1; !desc
->sptes
[j
] && j
> i
; --j
)
863 desc
->sptes
[i
] = desc
->sptes
[j
];
864 desc
->sptes
[j
] = NULL
;
867 if (!prev_desc
&& !desc
->more
)
868 *pte_list
= (unsigned long)desc
->sptes
[0];
871 prev_desc
->more
= desc
->more
;
873 *pte_list
= (unsigned long)desc
->more
| 1;
874 mmu_free_pte_list_desc(desc
);
877 static void pte_list_remove(u64
*spte
, unsigned long *pte_list
)
879 struct pte_list_desc
*desc
;
880 struct pte_list_desc
*prev_desc
;
884 printk(KERN_ERR
"pte_list_remove: %p 0->BUG\n", spte
);
886 } else if (!(*pte_list
& 1)) {
887 rmap_printk("pte_list_remove: %p 1->0\n", spte
);
888 if ((u64
*)*pte_list
!= spte
) {
889 printk(KERN_ERR
"pte_list_remove: %p 1->BUG\n", spte
);
894 rmap_printk("pte_list_remove: %p many->many\n", spte
);
895 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
898 for (i
= 0; i
< PTE_LIST_EXT
&& desc
->sptes
[i
]; ++i
)
899 if (desc
->sptes
[i
] == spte
) {
900 pte_list_desc_remove_entry(pte_list
,
908 pr_err("pte_list_remove: %p many->many\n", spte
);
913 typedef void (*pte_list_walk_fn
) (u64
*spte
);
914 static void pte_list_walk(unsigned long *pte_list
, pte_list_walk_fn fn
)
916 struct pte_list_desc
*desc
;
922 if (!(*pte_list
& 1))
923 return fn((u64
*)*pte_list
);
925 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
927 for (i
= 0; i
< PTE_LIST_EXT
&& desc
->sptes
[i
]; ++i
)
933 static unsigned long *__gfn_to_rmap(gfn_t gfn
, int level
,
934 struct kvm_memory_slot
*slot
)
936 struct kvm_lpage_info
*linfo
;
938 if (likely(level
== PT_PAGE_TABLE_LEVEL
))
939 return &slot
->rmap
[gfn
- slot
->base_gfn
];
941 linfo
= lpage_info_slot(gfn
, slot
, level
);
942 return &linfo
->rmap_pde
;
946 * Take gfn and return the reverse mapping to it.
948 static unsigned long *gfn_to_rmap(struct kvm
*kvm
, gfn_t gfn
, int level
)
950 struct kvm_memory_slot
*slot
;
952 slot
= gfn_to_memslot(kvm
, gfn
);
953 return __gfn_to_rmap(gfn
, level
, slot
);
956 static bool rmap_can_add(struct kvm_vcpu
*vcpu
)
958 struct kvm_mmu_memory_cache
*cache
;
960 cache
= &vcpu
->arch
.mmu_pte_list_desc_cache
;
961 return mmu_memory_cache_free_objects(cache
);
964 static int rmap_add(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
966 struct kvm_mmu_page
*sp
;
967 unsigned long *rmapp
;
969 sp
= page_header(__pa(spte
));
970 kvm_mmu_page_set_gfn(sp
, spte
- sp
->spt
, gfn
);
971 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
->role
.level
);
972 return pte_list_add(vcpu
, spte
, rmapp
);
975 static void rmap_remove(struct kvm
*kvm
, u64
*spte
)
977 struct kvm_mmu_page
*sp
;
979 unsigned long *rmapp
;
981 sp
= page_header(__pa(spte
));
982 gfn
= kvm_mmu_page_get_gfn(sp
, spte
- sp
->spt
);
983 rmapp
= gfn_to_rmap(kvm
, gfn
, sp
->role
.level
);
984 pte_list_remove(spte
, rmapp
);
988 * Used by the following functions to iterate through the sptes linked by a
989 * rmap. All fields are private and not assumed to be used outside.
991 struct rmap_iterator
{
993 struct pte_list_desc
*desc
; /* holds the sptep if not NULL */
994 int pos
; /* index of the sptep */
998 * Iteration must be started by this function. This should also be used after
999 * removing/dropping sptes from the rmap link because in such cases the
1000 * information in the itererator may not be valid.
1002 * Returns sptep if found, NULL otherwise.
1004 static u64
*rmap_get_first(unsigned long rmap
, struct rmap_iterator
*iter
)
1014 iter
->desc
= (struct pte_list_desc
*)(rmap
& ~1ul);
1016 return iter
->desc
->sptes
[iter
->pos
];
1020 * Must be used with a valid iterator: e.g. after rmap_get_first().
1022 * Returns sptep if found, NULL otherwise.
1024 static u64
*rmap_get_next(struct rmap_iterator
*iter
)
1027 if (iter
->pos
< PTE_LIST_EXT
- 1) {
1031 sptep
= iter
->desc
->sptes
[iter
->pos
];
1036 iter
->desc
= iter
->desc
->more
;
1040 /* desc->sptes[0] cannot be NULL */
1041 return iter
->desc
->sptes
[iter
->pos
];
1048 static void drop_spte(struct kvm
*kvm
, u64
*sptep
)
1050 if (mmu_spte_clear_track_bits(sptep
))
1051 rmap_remove(kvm
, sptep
);
1054 static int __rmap_write_protect(struct kvm
*kvm
, unsigned long *rmapp
, int level
)
1057 struct rmap_iterator iter
;
1058 int write_protected
= 0;
1060 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;) {
1061 BUG_ON(!(*sptep
& PT_PRESENT_MASK
));
1062 rmap_printk("rmap_write_protect: spte %p %llx\n", sptep
, *sptep
);
1064 if (!is_writable_pte(*sptep
)) {
1065 sptep
= rmap_get_next(&iter
);
1069 if (level
== PT_PAGE_TABLE_LEVEL
) {
1070 mmu_spte_update(sptep
, *sptep
& ~PT_WRITABLE_MASK
);
1071 sptep
= rmap_get_next(&iter
);
1073 BUG_ON(!is_large_pte(*sptep
));
1074 drop_spte(kvm
, sptep
);
1076 sptep
= rmap_get_first(*rmapp
, &iter
);
1079 write_protected
= 1;
1082 return write_protected
;
1086 * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1087 * @kvm: kvm instance
1088 * @slot: slot to protect
1089 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1090 * @mask: indicates which pages we should protect
1092 * Used when we do not need to care about huge page mappings: e.g. during dirty
1093 * logging we do not have any such mappings.
1095 void kvm_mmu_write_protect_pt_masked(struct kvm
*kvm
,
1096 struct kvm_memory_slot
*slot
,
1097 gfn_t gfn_offset
, unsigned long mask
)
1099 unsigned long *rmapp
;
1102 rmapp
= &slot
->rmap
[gfn_offset
+ __ffs(mask
)];
1103 __rmap_write_protect(kvm
, rmapp
, PT_PAGE_TABLE_LEVEL
);
1105 /* clear the first set bit */
1110 static int rmap_write_protect(struct kvm
*kvm
, u64 gfn
)
1112 struct kvm_memory_slot
*slot
;
1113 unsigned long *rmapp
;
1115 int write_protected
= 0;
1117 slot
= gfn_to_memslot(kvm
, gfn
);
1119 for (i
= PT_PAGE_TABLE_LEVEL
;
1120 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
1121 rmapp
= __gfn_to_rmap(gfn
, i
, slot
);
1122 write_protected
|= __rmap_write_protect(kvm
, rmapp
, i
);
1125 return write_protected
;
1128 static int kvm_unmap_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1132 struct rmap_iterator iter
;
1133 int need_tlb_flush
= 0;
1135 while ((sptep
= rmap_get_first(*rmapp
, &iter
))) {
1136 BUG_ON(!(*sptep
& PT_PRESENT_MASK
));
1137 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", sptep
, *sptep
);
1139 drop_spte(kvm
, sptep
);
1143 return need_tlb_flush
;
1146 static int kvm_set_pte_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1150 struct rmap_iterator iter
;
1153 pte_t
*ptep
= (pte_t
*)data
;
1156 WARN_ON(pte_huge(*ptep
));
1157 new_pfn
= pte_pfn(*ptep
);
1159 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;) {
1160 BUG_ON(!is_shadow_present_pte(*sptep
));
1161 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", sptep
, *sptep
);
1165 if (pte_write(*ptep
)) {
1166 drop_spte(kvm
, sptep
);
1167 sptep
= rmap_get_first(*rmapp
, &iter
);
1169 new_spte
= *sptep
& ~PT64_BASE_ADDR_MASK
;
1170 new_spte
|= (u64
)new_pfn
<< PAGE_SHIFT
;
1172 new_spte
&= ~PT_WRITABLE_MASK
;
1173 new_spte
&= ~SPTE_HOST_WRITEABLE
;
1174 new_spte
&= ~shadow_accessed_mask
;
1176 mmu_spte_clear_track_bits(sptep
);
1177 mmu_spte_set(sptep
, new_spte
);
1178 sptep
= rmap_get_next(&iter
);
1183 kvm_flush_remote_tlbs(kvm
);
1188 static int kvm_handle_hva(struct kvm
*kvm
, unsigned long hva
,
1190 int (*handler
)(struct kvm
*kvm
, unsigned long *rmapp
,
1191 unsigned long data
))
1196 struct kvm_memslots
*slots
;
1197 struct kvm_memory_slot
*memslot
;
1199 slots
= kvm_memslots(kvm
);
1201 kvm_for_each_memslot(memslot
, slots
) {
1202 unsigned long start
= memslot
->userspace_addr
;
1205 end
= start
+ (memslot
->npages
<< PAGE_SHIFT
);
1206 if (hva
>= start
&& hva
< end
) {
1207 gfn_t gfn_offset
= (hva
- start
) >> PAGE_SHIFT
;
1208 gfn_t gfn
= memslot
->base_gfn
+ gfn_offset
;
1210 ret
= handler(kvm
, &memslot
->rmap
[gfn_offset
], data
);
1212 for (j
= 0; j
< KVM_NR_PAGE_SIZES
- 1; ++j
) {
1213 struct kvm_lpage_info
*linfo
;
1215 linfo
= lpage_info_slot(gfn
, memslot
,
1216 PT_DIRECTORY_LEVEL
+ j
);
1217 ret
|= handler(kvm
, &linfo
->rmap_pde
, data
);
1219 trace_kvm_age_page(hva
, memslot
, ret
);
1227 int kvm_unmap_hva(struct kvm
*kvm
, unsigned long hva
)
1229 return kvm_handle_hva(kvm
, hva
, 0, kvm_unmap_rmapp
);
1232 void kvm_set_spte_hva(struct kvm
*kvm
, unsigned long hva
, pte_t pte
)
1234 kvm_handle_hva(kvm
, hva
, (unsigned long)&pte
, kvm_set_pte_rmapp
);
1237 static int kvm_age_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1241 struct rmap_iterator iter
;
1245 * Emulate the accessed bit for EPT, by checking if this page has
1246 * an EPT mapping, and clearing it if it does. On the next access,
1247 * a new EPT mapping will be established.
1248 * This has some overhead, but not as much as the cost of swapping
1249 * out actively used pages or breaking up actively used hugepages.
1251 if (!shadow_accessed_mask
)
1252 return kvm_unmap_rmapp(kvm
, rmapp
, data
);
1254 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;
1255 sptep
= rmap_get_next(&iter
)) {
1256 BUG_ON(!(*sptep
& PT_PRESENT_MASK
));
1258 if (*sptep
& PT_ACCESSED_MASK
) {
1260 clear_bit(PT_ACCESSED_SHIFT
, (unsigned long *)sptep
);
1267 static int kvm_test_age_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1271 struct rmap_iterator iter
;
1275 * If there's no access bit in the secondary pte set by the
1276 * hardware it's up to gup-fast/gup to set the access bit in
1277 * the primary pte or in the page structure.
1279 if (!shadow_accessed_mask
)
1282 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;
1283 sptep
= rmap_get_next(&iter
)) {
1284 BUG_ON(!(*sptep
& PT_PRESENT_MASK
));
1286 if (*sptep
& PT_ACCESSED_MASK
) {
1295 #define RMAP_RECYCLE_THRESHOLD 1000
1297 static void rmap_recycle(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
1299 unsigned long *rmapp
;
1300 struct kvm_mmu_page
*sp
;
1302 sp
= page_header(__pa(spte
));
1304 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
->role
.level
);
1306 kvm_unmap_rmapp(vcpu
->kvm
, rmapp
, 0);
1307 kvm_flush_remote_tlbs(vcpu
->kvm
);
1310 int kvm_age_hva(struct kvm
*kvm
, unsigned long hva
)
1312 return kvm_handle_hva(kvm
, hva
, 0, kvm_age_rmapp
);
1315 int kvm_test_age_hva(struct kvm
*kvm
, unsigned long hva
)
1317 return kvm_handle_hva(kvm
, hva
, 0, kvm_test_age_rmapp
);
1321 static int is_empty_shadow_page(u64
*spt
)
1326 for (pos
= spt
, end
= pos
+ PAGE_SIZE
/ sizeof(u64
); pos
!= end
; pos
++)
1327 if (is_shadow_present_pte(*pos
)) {
1328 printk(KERN_ERR
"%s: %p %llx\n", __func__
,
1337 * This value is the sum of all of the kvm instances's
1338 * kvm->arch.n_used_mmu_pages values. We need a global,
1339 * aggregate version in order to make the slab shrinker
1342 static inline void kvm_mod_used_mmu_pages(struct kvm
*kvm
, int nr
)
1344 kvm
->arch
.n_used_mmu_pages
+= nr
;
1345 percpu_counter_add(&kvm_total_used_mmu_pages
, nr
);
1349 * Remove the sp from shadow page cache, after call it,
1350 * we can not find this sp from the cache, and the shadow
1351 * page table is still valid.
1352 * It should be under the protection of mmu lock.
1354 static void kvm_mmu_isolate_page(struct kvm_mmu_page
*sp
)
1356 ASSERT(is_empty_shadow_page(sp
->spt
));
1357 hlist_del(&sp
->hash_link
);
1358 if (!sp
->role
.direct
)
1359 free_page((unsigned long)sp
->gfns
);
1363 * Free the shadow page table and the sp, we can do it
1364 * out of the protection of mmu lock.
1366 static void kvm_mmu_free_page(struct kvm_mmu_page
*sp
)
1368 list_del(&sp
->link
);
1369 free_page((unsigned long)sp
->spt
);
1370 kmem_cache_free(mmu_page_header_cache
, sp
);
1373 static unsigned kvm_page_table_hashfn(gfn_t gfn
)
1375 return gfn
& ((1 << KVM_MMU_HASH_SHIFT
) - 1);
1378 static void mmu_page_add_parent_pte(struct kvm_vcpu
*vcpu
,
1379 struct kvm_mmu_page
*sp
, u64
*parent_pte
)
1384 pte_list_add(vcpu
, parent_pte
, &sp
->parent_ptes
);
1387 static void mmu_page_remove_parent_pte(struct kvm_mmu_page
*sp
,
1390 pte_list_remove(parent_pte
, &sp
->parent_ptes
);
1393 static void drop_parent_pte(struct kvm_mmu_page
*sp
,
1396 mmu_page_remove_parent_pte(sp
, parent_pte
);
1397 mmu_spte_clear_no_track(parent_pte
);
1400 static struct kvm_mmu_page
*kvm_mmu_alloc_page(struct kvm_vcpu
*vcpu
,
1401 u64
*parent_pte
, int direct
)
1403 struct kvm_mmu_page
*sp
;
1404 sp
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_header_cache
,
1406 sp
->spt
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
, PAGE_SIZE
);
1408 sp
->gfns
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
,
1410 set_page_private(virt_to_page(sp
->spt
), (unsigned long)sp
);
1411 list_add(&sp
->link
, &vcpu
->kvm
->arch
.active_mmu_pages
);
1412 bitmap_zero(sp
->slot_bitmap
, KVM_MEM_SLOTS_NUM
);
1413 sp
->parent_ptes
= 0;
1414 mmu_page_add_parent_pte(vcpu
, sp
, parent_pte
);
1415 kvm_mod_used_mmu_pages(vcpu
->kvm
, +1);
1419 static void mark_unsync(u64
*spte
);
1420 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page
*sp
)
1422 pte_list_walk(&sp
->parent_ptes
, mark_unsync
);
1425 static void mark_unsync(u64
*spte
)
1427 struct kvm_mmu_page
*sp
;
1430 sp
= page_header(__pa(spte
));
1431 index
= spte
- sp
->spt
;
1432 if (__test_and_set_bit(index
, sp
->unsync_child_bitmap
))
1434 if (sp
->unsync_children
++)
1436 kvm_mmu_mark_parents_unsync(sp
);
1439 static int nonpaging_sync_page(struct kvm_vcpu
*vcpu
,
1440 struct kvm_mmu_page
*sp
)
1445 static void nonpaging_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
1449 static void nonpaging_update_pte(struct kvm_vcpu
*vcpu
,
1450 struct kvm_mmu_page
*sp
, u64
*spte
,
1456 #define KVM_PAGE_ARRAY_NR 16
1458 struct kvm_mmu_pages
{
1459 struct mmu_page_and_offset
{
1460 struct kvm_mmu_page
*sp
;
1462 } page
[KVM_PAGE_ARRAY_NR
];
1466 static int mmu_pages_add(struct kvm_mmu_pages
*pvec
, struct kvm_mmu_page
*sp
,
1472 for (i
=0; i
< pvec
->nr
; i
++)
1473 if (pvec
->page
[i
].sp
== sp
)
1476 pvec
->page
[pvec
->nr
].sp
= sp
;
1477 pvec
->page
[pvec
->nr
].idx
= idx
;
1479 return (pvec
->nr
== KVM_PAGE_ARRAY_NR
);
1482 static int __mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1483 struct kvm_mmu_pages
*pvec
)
1485 int i
, ret
, nr_unsync_leaf
= 0;
1487 for_each_set_bit(i
, sp
->unsync_child_bitmap
, 512) {
1488 struct kvm_mmu_page
*child
;
1489 u64 ent
= sp
->spt
[i
];
1491 if (!is_shadow_present_pte(ent
) || is_large_pte(ent
))
1492 goto clear_child_bitmap
;
1494 child
= page_header(ent
& PT64_BASE_ADDR_MASK
);
1496 if (child
->unsync_children
) {
1497 if (mmu_pages_add(pvec
, child
, i
))
1500 ret
= __mmu_unsync_walk(child
, pvec
);
1502 goto clear_child_bitmap
;
1504 nr_unsync_leaf
+= ret
;
1507 } else if (child
->unsync
) {
1509 if (mmu_pages_add(pvec
, child
, i
))
1512 goto clear_child_bitmap
;
1517 __clear_bit(i
, sp
->unsync_child_bitmap
);
1518 sp
->unsync_children
--;
1519 WARN_ON((int)sp
->unsync_children
< 0);
1523 return nr_unsync_leaf
;
1526 static int mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1527 struct kvm_mmu_pages
*pvec
)
1529 if (!sp
->unsync_children
)
1532 mmu_pages_add(pvec
, sp
, 0);
1533 return __mmu_unsync_walk(sp
, pvec
);
1536 static void kvm_unlink_unsync_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1538 WARN_ON(!sp
->unsync
);
1539 trace_kvm_mmu_sync_page(sp
);
1541 --kvm
->stat
.mmu_unsync
;
1544 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
1545 struct list_head
*invalid_list
);
1546 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
1547 struct list_head
*invalid_list
);
1549 #define for_each_gfn_sp(kvm, sp, gfn, pos) \
1550 hlist_for_each_entry(sp, pos, \
1551 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1552 if ((sp)->gfn != (gfn)) {} else
1554 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos) \
1555 hlist_for_each_entry(sp, pos, \
1556 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1557 if ((sp)->gfn != (gfn) || (sp)->role.direct || \
1558 (sp)->role.invalid) {} else
1560 /* @sp->gfn should be write-protected at the call site */
1561 static int __kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1562 struct list_head
*invalid_list
, bool clear_unsync
)
1564 if (sp
->role
.cr4_pae
!= !!is_pae(vcpu
)) {
1565 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1570 kvm_unlink_unsync_page(vcpu
->kvm
, sp
);
1572 if (vcpu
->arch
.mmu
.sync_page(vcpu
, sp
)) {
1573 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1577 kvm_mmu_flush_tlb(vcpu
);
1581 static int kvm_sync_page_transient(struct kvm_vcpu
*vcpu
,
1582 struct kvm_mmu_page
*sp
)
1584 LIST_HEAD(invalid_list
);
1587 ret
= __kvm_sync_page(vcpu
, sp
, &invalid_list
, false);
1589 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1594 #ifdef CONFIG_KVM_MMU_AUDIT
1595 #include "mmu_audit.c"
1597 static void kvm_mmu_audit(struct kvm_vcpu
*vcpu
, int point
) { }
1598 static void mmu_audit_disable(void) { }
1601 static int kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1602 struct list_head
*invalid_list
)
1604 return __kvm_sync_page(vcpu
, sp
, invalid_list
, true);
1607 /* @gfn should be write-protected at the call site */
1608 static void kvm_sync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
1610 struct kvm_mmu_page
*s
;
1611 struct hlist_node
*node
;
1612 LIST_HEAD(invalid_list
);
1615 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
, node
) {
1619 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
1620 kvm_unlink_unsync_page(vcpu
->kvm
, s
);
1621 if ((s
->role
.cr4_pae
!= !!is_pae(vcpu
)) ||
1622 (vcpu
->arch
.mmu
.sync_page(vcpu
, s
))) {
1623 kvm_mmu_prepare_zap_page(vcpu
->kvm
, s
, &invalid_list
);
1629 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1631 kvm_mmu_flush_tlb(vcpu
);
1634 struct mmu_page_path
{
1635 struct kvm_mmu_page
*parent
[PT64_ROOT_LEVEL
-1];
1636 unsigned int idx
[PT64_ROOT_LEVEL
-1];
1639 #define for_each_sp(pvec, sp, parents, i) \
1640 for (i = mmu_pages_next(&pvec, &parents, -1), \
1641 sp = pvec.page[i].sp; \
1642 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1643 i = mmu_pages_next(&pvec, &parents, i))
1645 static int mmu_pages_next(struct kvm_mmu_pages
*pvec
,
1646 struct mmu_page_path
*parents
,
1651 for (n
= i
+1; n
< pvec
->nr
; n
++) {
1652 struct kvm_mmu_page
*sp
= pvec
->page
[n
].sp
;
1654 if (sp
->role
.level
== PT_PAGE_TABLE_LEVEL
) {
1655 parents
->idx
[0] = pvec
->page
[n
].idx
;
1659 parents
->parent
[sp
->role
.level
-2] = sp
;
1660 parents
->idx
[sp
->role
.level
-1] = pvec
->page
[n
].idx
;
1666 static void mmu_pages_clear_parents(struct mmu_page_path
*parents
)
1668 struct kvm_mmu_page
*sp
;
1669 unsigned int level
= 0;
1672 unsigned int idx
= parents
->idx
[level
];
1674 sp
= parents
->parent
[level
];
1678 --sp
->unsync_children
;
1679 WARN_ON((int)sp
->unsync_children
< 0);
1680 __clear_bit(idx
, sp
->unsync_child_bitmap
);
1682 } while (level
< PT64_ROOT_LEVEL
-1 && !sp
->unsync_children
);
1685 static void kvm_mmu_pages_init(struct kvm_mmu_page
*parent
,
1686 struct mmu_page_path
*parents
,
1687 struct kvm_mmu_pages
*pvec
)
1689 parents
->parent
[parent
->role
.level
-1] = NULL
;
1693 static void mmu_sync_children(struct kvm_vcpu
*vcpu
,
1694 struct kvm_mmu_page
*parent
)
1697 struct kvm_mmu_page
*sp
;
1698 struct mmu_page_path parents
;
1699 struct kvm_mmu_pages pages
;
1700 LIST_HEAD(invalid_list
);
1702 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1703 while (mmu_unsync_walk(parent
, &pages
)) {
1706 for_each_sp(pages
, sp
, parents
, i
)
1707 protected |= rmap_write_protect(vcpu
->kvm
, sp
->gfn
);
1710 kvm_flush_remote_tlbs(vcpu
->kvm
);
1712 for_each_sp(pages
, sp
, parents
, i
) {
1713 kvm_sync_page(vcpu
, sp
, &invalid_list
);
1714 mmu_pages_clear_parents(&parents
);
1716 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1717 cond_resched_lock(&vcpu
->kvm
->mmu_lock
);
1718 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1722 static void init_shadow_page_table(struct kvm_mmu_page
*sp
)
1726 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
1730 static void __clear_sp_write_flooding_count(struct kvm_mmu_page
*sp
)
1732 sp
->write_flooding_count
= 0;
1735 static void clear_sp_write_flooding_count(u64
*spte
)
1737 struct kvm_mmu_page
*sp
= page_header(__pa(spte
));
1739 __clear_sp_write_flooding_count(sp
);
1742 static struct kvm_mmu_page
*kvm_mmu_get_page(struct kvm_vcpu
*vcpu
,
1750 union kvm_mmu_page_role role
;
1752 struct kvm_mmu_page
*sp
;
1753 struct hlist_node
*node
;
1754 bool need_sync
= false;
1756 role
= vcpu
->arch
.mmu
.base_role
;
1758 role
.direct
= direct
;
1761 role
.access
= access
;
1762 if (!vcpu
->arch
.mmu
.direct_map
1763 && vcpu
->arch
.mmu
.root_level
<= PT32_ROOT_LEVEL
) {
1764 quadrant
= gaddr
>> (PAGE_SHIFT
+ (PT64_PT_BITS
* level
));
1765 quadrant
&= (1 << ((PT32_PT_BITS
- PT64_PT_BITS
) * level
)) - 1;
1766 role
.quadrant
= quadrant
;
1768 for_each_gfn_sp(vcpu
->kvm
, sp
, gfn
, node
) {
1769 if (!need_sync
&& sp
->unsync
)
1772 if (sp
->role
.word
!= role
.word
)
1775 if (sp
->unsync
&& kvm_sync_page_transient(vcpu
, sp
))
1778 mmu_page_add_parent_pte(vcpu
, sp
, parent_pte
);
1779 if (sp
->unsync_children
) {
1780 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
1781 kvm_mmu_mark_parents_unsync(sp
);
1782 } else if (sp
->unsync
)
1783 kvm_mmu_mark_parents_unsync(sp
);
1785 __clear_sp_write_flooding_count(sp
);
1786 trace_kvm_mmu_get_page(sp
, false);
1789 ++vcpu
->kvm
->stat
.mmu_cache_miss
;
1790 sp
= kvm_mmu_alloc_page(vcpu
, parent_pte
, direct
);
1795 hlist_add_head(&sp
->hash_link
,
1796 &vcpu
->kvm
->arch
.mmu_page_hash
[kvm_page_table_hashfn(gfn
)]);
1798 if (rmap_write_protect(vcpu
->kvm
, gfn
))
1799 kvm_flush_remote_tlbs(vcpu
->kvm
);
1800 if (level
> PT_PAGE_TABLE_LEVEL
&& need_sync
)
1801 kvm_sync_pages(vcpu
, gfn
);
1803 account_shadowed(vcpu
->kvm
, gfn
);
1805 init_shadow_page_table(sp
);
1806 trace_kvm_mmu_get_page(sp
, true);
1810 static void shadow_walk_init(struct kvm_shadow_walk_iterator
*iterator
,
1811 struct kvm_vcpu
*vcpu
, u64 addr
)
1813 iterator
->addr
= addr
;
1814 iterator
->shadow_addr
= vcpu
->arch
.mmu
.root_hpa
;
1815 iterator
->level
= vcpu
->arch
.mmu
.shadow_root_level
;
1817 if (iterator
->level
== PT64_ROOT_LEVEL
&&
1818 vcpu
->arch
.mmu
.root_level
< PT64_ROOT_LEVEL
&&
1819 !vcpu
->arch
.mmu
.direct_map
)
1822 if (iterator
->level
== PT32E_ROOT_LEVEL
) {
1823 iterator
->shadow_addr
1824 = vcpu
->arch
.mmu
.pae_root
[(addr
>> 30) & 3];
1825 iterator
->shadow_addr
&= PT64_BASE_ADDR_MASK
;
1827 if (!iterator
->shadow_addr
)
1828 iterator
->level
= 0;
1832 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator
*iterator
)
1834 if (iterator
->level
< PT_PAGE_TABLE_LEVEL
)
1837 iterator
->index
= SHADOW_PT_INDEX(iterator
->addr
, iterator
->level
);
1838 iterator
->sptep
= ((u64
*)__va(iterator
->shadow_addr
)) + iterator
->index
;
1842 static void __shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
,
1845 if (is_last_spte(spte
, iterator
->level
)) {
1846 iterator
->level
= 0;
1850 iterator
->shadow_addr
= spte
& PT64_BASE_ADDR_MASK
;
1854 static void shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
)
1856 return __shadow_walk_next(iterator
, *iterator
->sptep
);
1859 static void link_shadow_page(u64
*sptep
, struct kvm_mmu_page
*sp
)
1863 spte
= __pa(sp
->spt
)
1864 | PT_PRESENT_MASK
| PT_ACCESSED_MASK
1865 | PT_WRITABLE_MASK
| PT_USER_MASK
;
1866 mmu_spte_set(sptep
, spte
);
1869 static void drop_large_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
)
1871 if (is_large_pte(*sptep
)) {
1872 drop_spte(vcpu
->kvm
, sptep
);
1873 --vcpu
->kvm
->stat
.lpages
;
1874 kvm_flush_remote_tlbs(vcpu
->kvm
);
1878 static void validate_direct_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
1879 unsigned direct_access
)
1881 if (is_shadow_present_pte(*sptep
) && !is_large_pte(*sptep
)) {
1882 struct kvm_mmu_page
*child
;
1885 * For the direct sp, if the guest pte's dirty bit
1886 * changed form clean to dirty, it will corrupt the
1887 * sp's access: allow writable in the read-only sp,
1888 * so we should update the spte at this point to get
1889 * a new sp with the correct access.
1891 child
= page_header(*sptep
& PT64_BASE_ADDR_MASK
);
1892 if (child
->role
.access
== direct_access
)
1895 drop_parent_pte(child
, sptep
);
1896 kvm_flush_remote_tlbs(vcpu
->kvm
);
1900 static bool mmu_page_zap_pte(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
1904 struct kvm_mmu_page
*child
;
1907 if (is_shadow_present_pte(pte
)) {
1908 if (is_last_spte(pte
, sp
->role
.level
)) {
1909 drop_spte(kvm
, spte
);
1910 if (is_large_pte(pte
))
1913 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
1914 drop_parent_pte(child
, spte
);
1919 if (is_mmio_spte(pte
))
1920 mmu_spte_clear_no_track(spte
);
1925 static void kvm_mmu_page_unlink_children(struct kvm
*kvm
,
1926 struct kvm_mmu_page
*sp
)
1930 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
1931 mmu_page_zap_pte(kvm
, sp
, sp
->spt
+ i
);
1934 static void kvm_mmu_put_page(struct kvm_mmu_page
*sp
, u64
*parent_pte
)
1936 mmu_page_remove_parent_pte(sp
, parent_pte
);
1939 static void kvm_mmu_unlink_parents(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1942 struct rmap_iterator iter
;
1944 while ((sptep
= rmap_get_first(sp
->parent_ptes
, &iter
)))
1945 drop_parent_pte(sp
, sptep
);
1948 static int mmu_zap_unsync_children(struct kvm
*kvm
,
1949 struct kvm_mmu_page
*parent
,
1950 struct list_head
*invalid_list
)
1953 struct mmu_page_path parents
;
1954 struct kvm_mmu_pages pages
;
1956 if (parent
->role
.level
== PT_PAGE_TABLE_LEVEL
)
1959 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1960 while (mmu_unsync_walk(parent
, &pages
)) {
1961 struct kvm_mmu_page
*sp
;
1963 for_each_sp(pages
, sp
, parents
, i
) {
1964 kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
);
1965 mmu_pages_clear_parents(&parents
);
1968 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1974 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
1975 struct list_head
*invalid_list
)
1979 trace_kvm_mmu_prepare_zap_page(sp
);
1980 ++kvm
->stat
.mmu_shadow_zapped
;
1981 ret
= mmu_zap_unsync_children(kvm
, sp
, invalid_list
);
1982 kvm_mmu_page_unlink_children(kvm
, sp
);
1983 kvm_mmu_unlink_parents(kvm
, sp
);
1984 if (!sp
->role
.invalid
&& !sp
->role
.direct
)
1985 unaccount_shadowed(kvm
, sp
->gfn
);
1987 kvm_unlink_unsync_page(kvm
, sp
);
1988 if (!sp
->root_count
) {
1991 list_move(&sp
->link
, invalid_list
);
1992 kvm_mod_used_mmu_pages(kvm
, -1);
1994 list_move(&sp
->link
, &kvm
->arch
.active_mmu_pages
);
1995 kvm_reload_remote_mmus(kvm
);
1998 sp
->role
.invalid
= 1;
2002 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
2003 struct list_head
*invalid_list
)
2005 struct kvm_mmu_page
*sp
;
2007 if (list_empty(invalid_list
))
2011 * wmb: make sure everyone sees our modifications to the page tables
2012 * rmb: make sure we see changes to vcpu->mode
2017 * Wait for all vcpus to exit guest mode and/or lockless shadow
2020 kvm_flush_remote_tlbs(kvm
);
2023 sp
= list_first_entry(invalid_list
, struct kvm_mmu_page
, link
);
2024 WARN_ON(!sp
->role
.invalid
|| sp
->root_count
);
2025 kvm_mmu_isolate_page(sp
);
2026 kvm_mmu_free_page(sp
);
2027 } while (!list_empty(invalid_list
));
2031 * Changing the number of mmu pages allocated to the vm
2032 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
2034 void kvm_mmu_change_mmu_pages(struct kvm
*kvm
, unsigned int goal_nr_mmu_pages
)
2036 LIST_HEAD(invalid_list
);
2038 * If we set the number of mmu pages to be smaller be than the
2039 * number of actived pages , we must to free some mmu pages before we
2043 if (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
) {
2044 while (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
&&
2045 !list_empty(&kvm
->arch
.active_mmu_pages
)) {
2046 struct kvm_mmu_page
*page
;
2048 page
= container_of(kvm
->arch
.active_mmu_pages
.prev
,
2049 struct kvm_mmu_page
, link
);
2050 kvm_mmu_prepare_zap_page(kvm
, page
, &invalid_list
);
2052 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
2053 goal_nr_mmu_pages
= kvm
->arch
.n_used_mmu_pages
;
2056 kvm
->arch
.n_max_mmu_pages
= goal_nr_mmu_pages
;
2059 int kvm_mmu_unprotect_page(struct kvm
*kvm
, gfn_t gfn
)
2061 struct kvm_mmu_page
*sp
;
2062 struct hlist_node
*node
;
2063 LIST_HEAD(invalid_list
);
2066 pgprintk("%s: looking for gfn %llx\n", __func__
, gfn
);
2068 spin_lock(&kvm
->mmu_lock
);
2069 for_each_gfn_indirect_valid_sp(kvm
, sp
, gfn
, node
) {
2070 pgprintk("%s: gfn %llx role %x\n", __func__
, gfn
,
2073 kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
);
2075 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
2076 spin_unlock(&kvm
->mmu_lock
);
2080 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page
);
2082 static void page_header_update_slot(struct kvm
*kvm
, void *pte
, gfn_t gfn
)
2084 int slot
= memslot_id(kvm
, gfn
);
2085 struct kvm_mmu_page
*sp
= page_header(__pa(pte
));
2087 __set_bit(slot
, sp
->slot_bitmap
);
2091 * The function is based on mtrr_type_lookup() in
2092 * arch/x86/kernel/cpu/mtrr/generic.c
2094 static int get_mtrr_type(struct mtrr_state_type
*mtrr_state
,
2099 u8 prev_match
, curr_match
;
2100 int num_var_ranges
= KVM_NR_VAR_MTRR
;
2102 if (!mtrr_state
->enabled
)
2105 /* Make end inclusive end, instead of exclusive */
2108 /* Look in fixed ranges. Just return the type as per start */
2109 if (mtrr_state
->have_fixed
&& (start
< 0x100000)) {
2112 if (start
< 0x80000) {
2114 idx
+= (start
>> 16);
2115 return mtrr_state
->fixed_ranges
[idx
];
2116 } else if (start
< 0xC0000) {
2118 idx
+= ((start
- 0x80000) >> 14);
2119 return mtrr_state
->fixed_ranges
[idx
];
2120 } else if (start
< 0x1000000) {
2122 idx
+= ((start
- 0xC0000) >> 12);
2123 return mtrr_state
->fixed_ranges
[idx
];
2128 * Look in variable ranges
2129 * Look of multiple ranges matching this address and pick type
2130 * as per MTRR precedence
2132 if (!(mtrr_state
->enabled
& 2))
2133 return mtrr_state
->def_type
;
2136 for (i
= 0; i
< num_var_ranges
; ++i
) {
2137 unsigned short start_state
, end_state
;
2139 if (!(mtrr_state
->var_ranges
[i
].mask_lo
& (1 << 11)))
2142 base
= (((u64
)mtrr_state
->var_ranges
[i
].base_hi
) << 32) +
2143 (mtrr_state
->var_ranges
[i
].base_lo
& PAGE_MASK
);
2144 mask
= (((u64
)mtrr_state
->var_ranges
[i
].mask_hi
) << 32) +
2145 (mtrr_state
->var_ranges
[i
].mask_lo
& PAGE_MASK
);
2147 start_state
= ((start
& mask
) == (base
& mask
));
2148 end_state
= ((end
& mask
) == (base
& mask
));
2149 if (start_state
!= end_state
)
2152 if ((start
& mask
) != (base
& mask
))
2155 curr_match
= mtrr_state
->var_ranges
[i
].base_lo
& 0xff;
2156 if (prev_match
== 0xFF) {
2157 prev_match
= curr_match
;
2161 if (prev_match
== MTRR_TYPE_UNCACHABLE
||
2162 curr_match
== MTRR_TYPE_UNCACHABLE
)
2163 return MTRR_TYPE_UNCACHABLE
;
2165 if ((prev_match
== MTRR_TYPE_WRBACK
&&
2166 curr_match
== MTRR_TYPE_WRTHROUGH
) ||
2167 (prev_match
== MTRR_TYPE_WRTHROUGH
&&
2168 curr_match
== MTRR_TYPE_WRBACK
)) {
2169 prev_match
= MTRR_TYPE_WRTHROUGH
;
2170 curr_match
= MTRR_TYPE_WRTHROUGH
;
2173 if (prev_match
!= curr_match
)
2174 return MTRR_TYPE_UNCACHABLE
;
2177 if (prev_match
!= 0xFF)
2180 return mtrr_state
->def_type
;
2183 u8
kvm_get_guest_memory_type(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
2187 mtrr
= get_mtrr_type(&vcpu
->arch
.mtrr_state
, gfn
<< PAGE_SHIFT
,
2188 (gfn
<< PAGE_SHIFT
) + PAGE_SIZE
);
2189 if (mtrr
== 0xfe || mtrr
== 0xff)
2190 mtrr
= MTRR_TYPE_WRBACK
;
2193 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type
);
2195 static void __kvm_unsync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
)
2197 trace_kvm_mmu_unsync_page(sp
);
2198 ++vcpu
->kvm
->stat
.mmu_unsync
;
2201 kvm_mmu_mark_parents_unsync(sp
);
2204 static void kvm_unsync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
2206 struct kvm_mmu_page
*s
;
2207 struct hlist_node
*node
;
2209 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
, node
) {
2212 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
2213 __kvm_unsync_page(vcpu
, s
);
2217 static int mmu_need_write_protect(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2220 struct kvm_mmu_page
*s
;
2221 struct hlist_node
*node
;
2222 bool need_unsync
= false;
2224 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
, node
) {
2228 if (s
->role
.level
!= PT_PAGE_TABLE_LEVEL
)
2231 if (!need_unsync
&& !s
->unsync
) {
2236 kvm_unsync_pages(vcpu
, gfn
);
2240 static int set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2241 unsigned pte_access
, int user_fault
,
2242 int write_fault
, int level
,
2243 gfn_t gfn
, pfn_t pfn
, bool speculative
,
2244 bool can_unsync
, bool host_writable
)
2246 u64 spte
, entry
= *sptep
;
2249 if (set_mmio_spte(sptep
, gfn
, pfn
, pte_access
))
2252 spte
= PT_PRESENT_MASK
;
2254 spte
|= shadow_accessed_mask
;
2256 if (pte_access
& ACC_EXEC_MASK
)
2257 spte
|= shadow_x_mask
;
2259 spte
|= shadow_nx_mask
;
2260 if (pte_access
& ACC_USER_MASK
)
2261 spte
|= shadow_user_mask
;
2262 if (level
> PT_PAGE_TABLE_LEVEL
)
2263 spte
|= PT_PAGE_SIZE_MASK
;
2265 spte
|= kvm_x86_ops
->get_mt_mask(vcpu
, gfn
,
2266 kvm_is_mmio_pfn(pfn
));
2269 spte
|= SPTE_HOST_WRITEABLE
;
2271 pte_access
&= ~ACC_WRITE_MASK
;
2273 spte
|= (u64
)pfn
<< PAGE_SHIFT
;
2275 if ((pte_access
& ACC_WRITE_MASK
)
2276 || (!vcpu
->arch
.mmu
.direct_map
&& write_fault
2277 && !is_write_protection(vcpu
) && !user_fault
)) {
2279 if (level
> PT_PAGE_TABLE_LEVEL
&&
2280 has_wrprotected_page(vcpu
->kvm
, gfn
, level
)) {
2282 drop_spte(vcpu
->kvm
, sptep
);
2286 spte
|= PT_WRITABLE_MASK
;
2288 if (!vcpu
->arch
.mmu
.direct_map
2289 && !(pte_access
& ACC_WRITE_MASK
)) {
2290 spte
&= ~PT_USER_MASK
;
2292 * If we converted a user page to a kernel page,
2293 * so that the kernel can write to it when cr0.wp=0,
2294 * then we should prevent the kernel from executing it
2295 * if SMEP is enabled.
2297 if (kvm_read_cr4_bits(vcpu
, X86_CR4_SMEP
))
2298 spte
|= PT64_NX_MASK
;
2302 * Optimization: for pte sync, if spte was writable the hash
2303 * lookup is unnecessary (and expensive). Write protection
2304 * is responsibility of mmu_get_page / kvm_sync_page.
2305 * Same reasoning can be applied to dirty page accounting.
2307 if (!can_unsync
&& is_writable_pte(*sptep
))
2310 if (mmu_need_write_protect(vcpu
, gfn
, can_unsync
)) {
2311 pgprintk("%s: found shadow page for %llx, marking ro\n",
2314 pte_access
&= ~ACC_WRITE_MASK
;
2315 if (is_writable_pte(spte
))
2316 spte
&= ~PT_WRITABLE_MASK
;
2320 if (pte_access
& ACC_WRITE_MASK
)
2321 mark_page_dirty(vcpu
->kvm
, gfn
);
2324 mmu_spte_update(sptep
, spte
);
2326 * If we overwrite a writable spte with a read-only one we
2327 * should flush remote TLBs. Otherwise rmap_write_protect
2328 * will find a read-only spte, even though the writable spte
2329 * might be cached on a CPU's TLB.
2331 if (is_writable_pte(entry
) && !is_writable_pte(*sptep
))
2332 kvm_flush_remote_tlbs(vcpu
->kvm
);
2337 static void mmu_set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2338 unsigned pt_access
, unsigned pte_access
,
2339 int user_fault
, int write_fault
,
2340 int *emulate
, int level
, gfn_t gfn
,
2341 pfn_t pfn
, bool speculative
,
2344 int was_rmapped
= 0;
2347 pgprintk("%s: spte %llx access %x write_fault %d"
2348 " user_fault %d gfn %llx\n",
2349 __func__
, *sptep
, pt_access
,
2350 write_fault
, user_fault
, gfn
);
2352 if (is_rmap_spte(*sptep
)) {
2354 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2355 * the parent of the now unreachable PTE.
2357 if (level
> PT_PAGE_TABLE_LEVEL
&&
2358 !is_large_pte(*sptep
)) {
2359 struct kvm_mmu_page
*child
;
2362 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
2363 drop_parent_pte(child
, sptep
);
2364 kvm_flush_remote_tlbs(vcpu
->kvm
);
2365 } else if (pfn
!= spte_to_pfn(*sptep
)) {
2366 pgprintk("hfn old %llx new %llx\n",
2367 spte_to_pfn(*sptep
), pfn
);
2368 drop_spte(vcpu
->kvm
, sptep
);
2369 kvm_flush_remote_tlbs(vcpu
->kvm
);
2374 if (set_spte(vcpu
, sptep
, pte_access
, user_fault
, write_fault
,
2375 level
, gfn
, pfn
, speculative
, true,
2379 kvm_mmu_flush_tlb(vcpu
);
2382 if (unlikely(is_mmio_spte(*sptep
) && emulate
))
2385 pgprintk("%s: setting spte %llx\n", __func__
, *sptep
);
2386 pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2387 is_large_pte(*sptep
)? "2MB" : "4kB",
2388 *sptep
& PT_PRESENT_MASK
?"RW":"R", gfn
,
2390 if (!was_rmapped
&& is_large_pte(*sptep
))
2391 ++vcpu
->kvm
->stat
.lpages
;
2393 if (is_shadow_present_pte(*sptep
)) {
2394 page_header_update_slot(vcpu
->kvm
, sptep
, gfn
);
2396 rmap_count
= rmap_add(vcpu
, sptep
, gfn
);
2397 if (rmap_count
> RMAP_RECYCLE_THRESHOLD
)
2398 rmap_recycle(vcpu
, sptep
, gfn
);
2401 kvm_release_pfn_clean(pfn
);
2404 static void nonpaging_new_cr3(struct kvm_vcpu
*vcpu
)
2408 static pfn_t
pte_prefetch_gfn_to_pfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2411 struct kvm_memory_slot
*slot
;
2414 slot
= gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, no_dirty_log
);
2416 get_page(fault_page
);
2417 return page_to_pfn(fault_page
);
2420 hva
= gfn_to_hva_memslot(slot
, gfn
);
2422 return hva_to_pfn_atomic(vcpu
->kvm
, hva
);
2425 static int direct_pte_prefetch_many(struct kvm_vcpu
*vcpu
,
2426 struct kvm_mmu_page
*sp
,
2427 u64
*start
, u64
*end
)
2429 struct page
*pages
[PTE_PREFETCH_NUM
];
2430 unsigned access
= sp
->role
.access
;
2434 gfn
= kvm_mmu_page_get_gfn(sp
, start
- sp
->spt
);
2435 if (!gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, access
& ACC_WRITE_MASK
))
2438 ret
= gfn_to_page_many_atomic(vcpu
->kvm
, gfn
, pages
, end
- start
);
2442 for (i
= 0; i
< ret
; i
++, gfn
++, start
++)
2443 mmu_set_spte(vcpu
, start
, ACC_ALL
,
2445 sp
->role
.level
, gfn
,
2446 page_to_pfn(pages
[i
]), true, true);
2451 static void __direct_pte_prefetch(struct kvm_vcpu
*vcpu
,
2452 struct kvm_mmu_page
*sp
, u64
*sptep
)
2454 u64
*spte
, *start
= NULL
;
2457 WARN_ON(!sp
->role
.direct
);
2459 i
= (sptep
- sp
->spt
) & ~(PTE_PREFETCH_NUM
- 1);
2462 for (i
= 0; i
< PTE_PREFETCH_NUM
; i
++, spte
++) {
2463 if (is_shadow_present_pte(*spte
) || spte
== sptep
) {
2466 if (direct_pte_prefetch_many(vcpu
, sp
, start
, spte
) < 0)
2474 static void direct_pte_prefetch(struct kvm_vcpu
*vcpu
, u64
*sptep
)
2476 struct kvm_mmu_page
*sp
;
2479 * Since it's no accessed bit on EPT, it's no way to
2480 * distinguish between actually accessed translations
2481 * and prefetched, so disable pte prefetch if EPT is
2484 if (!shadow_accessed_mask
)
2487 sp
= page_header(__pa(sptep
));
2488 if (sp
->role
.level
> PT_PAGE_TABLE_LEVEL
)
2491 __direct_pte_prefetch(vcpu
, sp
, sptep
);
2494 static int __direct_map(struct kvm_vcpu
*vcpu
, gpa_t v
, int write
,
2495 int map_writable
, int level
, gfn_t gfn
, pfn_t pfn
,
2498 struct kvm_shadow_walk_iterator iterator
;
2499 struct kvm_mmu_page
*sp
;
2503 for_each_shadow_entry(vcpu
, (u64
)gfn
<< PAGE_SHIFT
, iterator
) {
2504 if (iterator
.level
== level
) {
2505 unsigned pte_access
= ACC_ALL
;
2507 mmu_set_spte(vcpu
, iterator
.sptep
, ACC_ALL
, pte_access
,
2509 level
, gfn
, pfn
, prefault
, map_writable
);
2510 direct_pte_prefetch(vcpu
, iterator
.sptep
);
2511 ++vcpu
->stat
.pf_fixed
;
2515 if (!is_shadow_present_pte(*iterator
.sptep
)) {
2516 u64 base_addr
= iterator
.addr
;
2518 base_addr
&= PT64_LVL_ADDR_MASK(iterator
.level
);
2519 pseudo_gfn
= base_addr
>> PAGE_SHIFT
;
2520 sp
= kvm_mmu_get_page(vcpu
, pseudo_gfn
, iterator
.addr
,
2522 1, ACC_ALL
, iterator
.sptep
);
2524 pgprintk("nonpaging_map: ENOMEM\n");
2525 kvm_release_pfn_clean(pfn
);
2529 mmu_spte_set(iterator
.sptep
,
2531 | PT_PRESENT_MASK
| PT_WRITABLE_MASK
2532 | shadow_user_mask
| shadow_x_mask
2533 | shadow_accessed_mask
);
2539 static void kvm_send_hwpoison_signal(unsigned long address
, struct task_struct
*tsk
)
2543 info
.si_signo
= SIGBUS
;
2545 info
.si_code
= BUS_MCEERR_AR
;
2546 info
.si_addr
= (void __user
*)address
;
2547 info
.si_addr_lsb
= PAGE_SHIFT
;
2549 send_sig_info(SIGBUS
, &info
, tsk
);
2552 static int kvm_handle_bad_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
, pfn_t pfn
)
2554 kvm_release_pfn_clean(pfn
);
2555 if (is_hwpoison_pfn(pfn
)) {
2556 kvm_send_hwpoison_signal(gfn_to_hva(vcpu
->kvm
, gfn
), current
);
2563 static void transparent_hugepage_adjust(struct kvm_vcpu
*vcpu
,
2564 gfn_t
*gfnp
, pfn_t
*pfnp
, int *levelp
)
2568 int level
= *levelp
;
2571 * Check if it's a transparent hugepage. If this would be an
2572 * hugetlbfs page, level wouldn't be set to
2573 * PT_PAGE_TABLE_LEVEL and there would be no adjustment done
2576 if (!is_error_pfn(pfn
) && !kvm_is_mmio_pfn(pfn
) &&
2577 level
== PT_PAGE_TABLE_LEVEL
&&
2578 PageTransCompound(pfn_to_page(pfn
)) &&
2579 !has_wrprotected_page(vcpu
->kvm
, gfn
, PT_DIRECTORY_LEVEL
)) {
2582 * mmu_notifier_retry was successful and we hold the
2583 * mmu_lock here, so the pmd can't become splitting
2584 * from under us, and in turn
2585 * __split_huge_page_refcount() can't run from under
2586 * us and we can safely transfer the refcount from
2587 * PG_tail to PG_head as we switch the pfn to tail to
2590 *levelp
= level
= PT_DIRECTORY_LEVEL
;
2591 mask
= KVM_PAGES_PER_HPAGE(level
) - 1;
2592 VM_BUG_ON((gfn
& mask
) != (pfn
& mask
));
2596 kvm_release_pfn_clean(pfn
);
2604 static bool mmu_invalid_pfn(pfn_t pfn
)
2606 return unlikely(is_invalid_pfn(pfn
));
2609 static bool handle_abnormal_pfn(struct kvm_vcpu
*vcpu
, gva_t gva
, gfn_t gfn
,
2610 pfn_t pfn
, unsigned access
, int *ret_val
)
2614 /* The pfn is invalid, report the error! */
2615 if (unlikely(is_invalid_pfn(pfn
))) {
2616 *ret_val
= kvm_handle_bad_page(vcpu
, gfn
, pfn
);
2620 if (unlikely(is_noslot_pfn(pfn
)))
2621 vcpu_cache_mmio_info(vcpu
, gva
, gfn
, access
);
2628 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
2629 gva_t gva
, pfn_t
*pfn
, bool write
, bool *writable
);
2631 static int nonpaging_map(struct kvm_vcpu
*vcpu
, gva_t v
, int write
, gfn_t gfn
,
2638 unsigned long mmu_seq
;
2641 force_pt_level
= mapping_level_dirty_bitmap(vcpu
, gfn
);
2642 if (likely(!force_pt_level
)) {
2643 level
= mapping_level(vcpu
, gfn
);
2645 * This path builds a PAE pagetable - so we can map
2646 * 2mb pages at maximum. Therefore check if the level
2647 * is larger than that.
2649 if (level
> PT_DIRECTORY_LEVEL
)
2650 level
= PT_DIRECTORY_LEVEL
;
2652 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
2654 level
= PT_PAGE_TABLE_LEVEL
;
2656 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
2659 if (try_async_pf(vcpu
, prefault
, gfn
, v
, &pfn
, write
, &map_writable
))
2662 if (handle_abnormal_pfn(vcpu
, v
, gfn
, pfn
, ACC_ALL
, &r
))
2665 spin_lock(&vcpu
->kvm
->mmu_lock
);
2666 if (mmu_notifier_retry(vcpu
, mmu_seq
))
2668 kvm_mmu_free_some_pages(vcpu
);
2669 if (likely(!force_pt_level
))
2670 transparent_hugepage_adjust(vcpu
, &gfn
, &pfn
, &level
);
2671 r
= __direct_map(vcpu
, v
, write
, map_writable
, level
, gfn
, pfn
,
2673 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2679 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2680 kvm_release_pfn_clean(pfn
);
2685 static void mmu_free_roots(struct kvm_vcpu
*vcpu
)
2688 struct kvm_mmu_page
*sp
;
2689 LIST_HEAD(invalid_list
);
2691 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2693 spin_lock(&vcpu
->kvm
->mmu_lock
);
2694 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
&&
2695 (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
||
2696 vcpu
->arch
.mmu
.direct_map
)) {
2697 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
2699 sp
= page_header(root
);
2701 if (!sp
->root_count
&& sp
->role
.invalid
) {
2702 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, &invalid_list
);
2703 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
2705 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
2706 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2709 for (i
= 0; i
< 4; ++i
) {
2710 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2713 root
&= PT64_BASE_ADDR_MASK
;
2714 sp
= page_header(root
);
2716 if (!sp
->root_count
&& sp
->role
.invalid
)
2717 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
2720 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
2722 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
2723 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2724 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
2727 static int mmu_check_root(struct kvm_vcpu
*vcpu
, gfn_t root_gfn
)
2731 if (!kvm_is_visible_gfn(vcpu
->kvm
, root_gfn
)) {
2732 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2739 static int mmu_alloc_direct_roots(struct kvm_vcpu
*vcpu
)
2741 struct kvm_mmu_page
*sp
;
2744 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
2745 spin_lock(&vcpu
->kvm
->mmu_lock
);
2746 kvm_mmu_free_some_pages(vcpu
);
2747 sp
= kvm_mmu_get_page(vcpu
, 0, 0, PT64_ROOT_LEVEL
,
2750 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2751 vcpu
->arch
.mmu
.root_hpa
= __pa(sp
->spt
);
2752 } else if (vcpu
->arch
.mmu
.shadow_root_level
== PT32E_ROOT_LEVEL
) {
2753 for (i
= 0; i
< 4; ++i
) {
2754 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2756 ASSERT(!VALID_PAGE(root
));
2757 spin_lock(&vcpu
->kvm
->mmu_lock
);
2758 kvm_mmu_free_some_pages(vcpu
);
2759 sp
= kvm_mmu_get_page(vcpu
, i
<< (30 - PAGE_SHIFT
),
2761 PT32_ROOT_LEVEL
, 1, ACC_ALL
,
2763 root
= __pa(sp
->spt
);
2765 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2766 vcpu
->arch
.mmu
.pae_root
[i
] = root
| PT_PRESENT_MASK
;
2768 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
2775 static int mmu_alloc_shadow_roots(struct kvm_vcpu
*vcpu
)
2777 struct kvm_mmu_page
*sp
;
2782 root_gfn
= vcpu
->arch
.mmu
.get_cr3(vcpu
) >> PAGE_SHIFT
;
2784 if (mmu_check_root(vcpu
, root_gfn
))
2788 * Do we shadow a long mode page table? If so we need to
2789 * write-protect the guests page table root.
2791 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
2792 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
2794 ASSERT(!VALID_PAGE(root
));
2796 spin_lock(&vcpu
->kvm
->mmu_lock
);
2797 kvm_mmu_free_some_pages(vcpu
);
2798 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, 0, PT64_ROOT_LEVEL
,
2800 root
= __pa(sp
->spt
);
2802 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2803 vcpu
->arch
.mmu
.root_hpa
= root
;
2808 * We shadow a 32 bit page table. This may be a legacy 2-level
2809 * or a PAE 3-level page table. In either case we need to be aware that
2810 * the shadow page table may be a PAE or a long mode page table.
2812 pm_mask
= PT_PRESENT_MASK
;
2813 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
)
2814 pm_mask
|= PT_ACCESSED_MASK
| PT_WRITABLE_MASK
| PT_USER_MASK
;
2816 for (i
= 0; i
< 4; ++i
) {
2817 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2819 ASSERT(!VALID_PAGE(root
));
2820 if (vcpu
->arch
.mmu
.root_level
== PT32E_ROOT_LEVEL
) {
2821 pdptr
= vcpu
->arch
.mmu
.get_pdptr(vcpu
, i
);
2822 if (!is_present_gpte(pdptr
)) {
2823 vcpu
->arch
.mmu
.pae_root
[i
] = 0;
2826 root_gfn
= pdptr
>> PAGE_SHIFT
;
2827 if (mmu_check_root(vcpu
, root_gfn
))
2830 spin_lock(&vcpu
->kvm
->mmu_lock
);
2831 kvm_mmu_free_some_pages(vcpu
);
2832 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, i
<< 30,
2835 root
= __pa(sp
->spt
);
2837 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2839 vcpu
->arch
.mmu
.pae_root
[i
] = root
| pm_mask
;
2841 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
2844 * If we shadow a 32 bit page table with a long mode page
2845 * table we enter this path.
2847 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
2848 if (vcpu
->arch
.mmu
.lm_root
== NULL
) {
2850 * The additional page necessary for this is only
2851 * allocated on demand.
2856 lm_root
= (void*)get_zeroed_page(GFP_KERNEL
);
2857 if (lm_root
== NULL
)
2860 lm_root
[0] = __pa(vcpu
->arch
.mmu
.pae_root
) | pm_mask
;
2862 vcpu
->arch
.mmu
.lm_root
= lm_root
;
2865 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.lm_root
);
2871 static int mmu_alloc_roots(struct kvm_vcpu
*vcpu
)
2873 if (vcpu
->arch
.mmu
.direct_map
)
2874 return mmu_alloc_direct_roots(vcpu
);
2876 return mmu_alloc_shadow_roots(vcpu
);
2879 static void mmu_sync_roots(struct kvm_vcpu
*vcpu
)
2882 struct kvm_mmu_page
*sp
;
2884 if (vcpu
->arch
.mmu
.direct_map
)
2887 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2890 vcpu_clear_mmio_info(vcpu
, ~0ul);
2891 kvm_mmu_audit(vcpu
, AUDIT_PRE_SYNC
);
2892 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
2893 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
2894 sp
= page_header(root
);
2895 mmu_sync_children(vcpu
, sp
);
2896 kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
2899 for (i
= 0; i
< 4; ++i
) {
2900 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2902 if (root
&& VALID_PAGE(root
)) {
2903 root
&= PT64_BASE_ADDR_MASK
;
2904 sp
= page_header(root
);
2905 mmu_sync_children(vcpu
, sp
);
2908 kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
2911 void kvm_mmu_sync_roots(struct kvm_vcpu
*vcpu
)
2913 spin_lock(&vcpu
->kvm
->mmu_lock
);
2914 mmu_sync_roots(vcpu
);
2915 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2918 static gpa_t
nonpaging_gva_to_gpa(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
2919 u32 access
, struct x86_exception
*exception
)
2922 exception
->error_code
= 0;
2926 static gpa_t
nonpaging_gva_to_gpa_nested(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
2928 struct x86_exception
*exception
)
2931 exception
->error_code
= 0;
2932 return vcpu
->arch
.nested_mmu
.translate_gpa(vcpu
, vaddr
, access
);
2935 static bool quickly_check_mmio_pf(struct kvm_vcpu
*vcpu
, u64 addr
, bool direct
)
2938 return vcpu_match_mmio_gpa(vcpu
, addr
);
2940 return vcpu_match_mmio_gva(vcpu
, addr
);
2945 * On direct hosts, the last spte is only allows two states
2946 * for mmio page fault:
2947 * - It is the mmio spte
2948 * - It is zapped or it is being zapped.
2950 * This function completely checks the spte when the last spte
2951 * is not the mmio spte.
2953 static bool check_direct_spte_mmio_pf(u64 spte
)
2955 return __check_direct_spte_mmio_pf(spte
);
2958 static u64
walk_shadow_page_get_mmio_spte(struct kvm_vcpu
*vcpu
, u64 addr
)
2960 struct kvm_shadow_walk_iterator iterator
;
2963 walk_shadow_page_lockless_begin(vcpu
);
2964 for_each_shadow_entry_lockless(vcpu
, addr
, iterator
, spte
)
2965 if (!is_shadow_present_pte(spte
))
2967 walk_shadow_page_lockless_end(vcpu
);
2973 * If it is a real mmio page fault, return 1 and emulat the instruction
2974 * directly, return 0 to let CPU fault again on the address, -1 is
2975 * returned if bug is detected.
2977 int handle_mmio_page_fault_common(struct kvm_vcpu
*vcpu
, u64 addr
, bool direct
)
2981 if (quickly_check_mmio_pf(vcpu
, addr
, direct
))
2984 spte
= walk_shadow_page_get_mmio_spte(vcpu
, addr
);
2986 if (is_mmio_spte(spte
)) {
2987 gfn_t gfn
= get_mmio_spte_gfn(spte
);
2988 unsigned access
= get_mmio_spte_access(spte
);
2993 trace_handle_mmio_page_fault(addr
, gfn
, access
);
2994 vcpu_cache_mmio_info(vcpu
, addr
, gfn
, access
);
2999 * It's ok if the gva is remapped by other cpus on shadow guest,
3000 * it's a BUG if the gfn is not a mmio page.
3002 if (direct
&& !check_direct_spte_mmio_pf(spte
))
3006 * If the page table is zapped by other cpus, let CPU fault again on
3011 EXPORT_SYMBOL_GPL(handle_mmio_page_fault_common
);
3013 static int handle_mmio_page_fault(struct kvm_vcpu
*vcpu
, u64 addr
,
3014 u32 error_code
, bool direct
)
3018 ret
= handle_mmio_page_fault_common(vcpu
, addr
, direct
);
3023 static int nonpaging_page_fault(struct kvm_vcpu
*vcpu
, gva_t gva
,
3024 u32 error_code
, bool prefault
)
3029 pgprintk("%s: gva %lx error %x\n", __func__
, gva
, error_code
);
3031 if (unlikely(error_code
& PFERR_RSVD_MASK
))
3032 return handle_mmio_page_fault(vcpu
, gva
, error_code
, true);
3034 r
= mmu_topup_memory_caches(vcpu
);
3039 ASSERT(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3041 gfn
= gva
>> PAGE_SHIFT
;
3043 return nonpaging_map(vcpu
, gva
& PAGE_MASK
,
3044 error_code
& PFERR_WRITE_MASK
, gfn
, prefault
);
3047 static int kvm_arch_setup_async_pf(struct kvm_vcpu
*vcpu
, gva_t gva
, gfn_t gfn
)
3049 struct kvm_arch_async_pf arch
;
3051 arch
.token
= (vcpu
->arch
.apf
.id
++ << 12) | vcpu
->vcpu_id
;
3053 arch
.direct_map
= vcpu
->arch
.mmu
.direct_map
;
3054 arch
.cr3
= vcpu
->arch
.mmu
.get_cr3(vcpu
);
3056 return kvm_setup_async_pf(vcpu
, gva
, gfn
, &arch
);
3059 static bool can_do_async_pf(struct kvm_vcpu
*vcpu
)
3061 if (unlikely(!irqchip_in_kernel(vcpu
->kvm
) ||
3062 kvm_event_needs_reinjection(vcpu
)))
3065 return kvm_x86_ops
->interrupt_allowed(vcpu
);
3068 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
3069 gva_t gva
, pfn_t
*pfn
, bool write
, bool *writable
)
3073 *pfn
= gfn_to_pfn_async(vcpu
->kvm
, gfn
, &async
, write
, writable
);
3076 return false; /* *pfn has correct page already */
3078 put_page(pfn_to_page(*pfn
));
3080 if (!prefault
&& can_do_async_pf(vcpu
)) {
3081 trace_kvm_try_async_get_page(gva
, gfn
);
3082 if (kvm_find_async_pf_gfn(vcpu
, gfn
)) {
3083 trace_kvm_async_pf_doublefault(gva
, gfn
);
3084 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
3086 } else if (kvm_arch_setup_async_pf(vcpu
, gva
, gfn
))
3090 *pfn
= gfn_to_pfn_prot(vcpu
->kvm
, gfn
, write
, writable
);
3095 static int tdp_page_fault(struct kvm_vcpu
*vcpu
, gva_t gpa
, u32 error_code
,
3102 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
3103 unsigned long mmu_seq
;
3104 int write
= error_code
& PFERR_WRITE_MASK
;
3108 ASSERT(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3110 if (unlikely(error_code
& PFERR_RSVD_MASK
))
3111 return handle_mmio_page_fault(vcpu
, gpa
, error_code
, true);
3113 r
= mmu_topup_memory_caches(vcpu
);
3117 force_pt_level
= mapping_level_dirty_bitmap(vcpu
, gfn
);
3118 if (likely(!force_pt_level
)) {
3119 level
= mapping_level(vcpu
, gfn
);
3120 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
3122 level
= PT_PAGE_TABLE_LEVEL
;
3124 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
3127 if (try_async_pf(vcpu
, prefault
, gfn
, gpa
, &pfn
, write
, &map_writable
))
3130 if (handle_abnormal_pfn(vcpu
, 0, gfn
, pfn
, ACC_ALL
, &r
))
3133 spin_lock(&vcpu
->kvm
->mmu_lock
);
3134 if (mmu_notifier_retry(vcpu
, mmu_seq
))
3136 kvm_mmu_free_some_pages(vcpu
);
3137 if (likely(!force_pt_level
))
3138 transparent_hugepage_adjust(vcpu
, &gfn
, &pfn
, &level
);
3139 r
= __direct_map(vcpu
, gpa
, write
, map_writable
,
3140 level
, gfn
, pfn
, prefault
);
3141 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3146 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3147 kvm_release_pfn_clean(pfn
);
3151 static void nonpaging_free(struct kvm_vcpu
*vcpu
)
3153 mmu_free_roots(vcpu
);
3156 static int nonpaging_init_context(struct kvm_vcpu
*vcpu
,
3157 struct kvm_mmu
*context
)
3159 context
->new_cr3
= nonpaging_new_cr3
;
3160 context
->page_fault
= nonpaging_page_fault
;
3161 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
3162 context
->free
= nonpaging_free
;
3163 context
->sync_page
= nonpaging_sync_page
;
3164 context
->invlpg
= nonpaging_invlpg
;
3165 context
->update_pte
= nonpaging_update_pte
;
3166 context
->root_level
= 0;
3167 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
3168 context
->root_hpa
= INVALID_PAGE
;
3169 context
->direct_map
= true;
3170 context
->nx
= false;
3174 void kvm_mmu_flush_tlb(struct kvm_vcpu
*vcpu
)
3176 ++vcpu
->stat
.tlb_flush
;
3177 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
3180 static void paging_new_cr3(struct kvm_vcpu
*vcpu
)
3182 pgprintk("%s: cr3 %lx\n", __func__
, kvm_read_cr3(vcpu
));
3183 mmu_free_roots(vcpu
);
3186 static unsigned long get_cr3(struct kvm_vcpu
*vcpu
)
3188 return kvm_read_cr3(vcpu
);
3191 static void inject_page_fault(struct kvm_vcpu
*vcpu
,
3192 struct x86_exception
*fault
)
3194 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
3197 static void paging_free(struct kvm_vcpu
*vcpu
)
3199 nonpaging_free(vcpu
);
3202 static bool is_rsvd_bits_set(struct kvm_mmu
*mmu
, u64 gpte
, int level
)
3206 bit7
= (gpte
>> 7) & 1;
3207 return (gpte
& mmu
->rsvd_bits_mask
[bit7
][level
-1]) != 0;
3210 static bool sync_mmio_spte(u64
*sptep
, gfn_t gfn
, unsigned access
,
3213 if (unlikely(is_mmio_spte(*sptep
))) {
3214 if (gfn
!= get_mmio_spte_gfn(*sptep
)) {
3215 mmu_spte_clear_no_track(sptep
);
3220 mark_mmio_spte(sptep
, gfn
, access
);
3228 #include "paging_tmpl.h"
3232 #include "paging_tmpl.h"
3235 static void reset_rsvds_bits_mask(struct kvm_vcpu
*vcpu
,
3236 struct kvm_mmu
*context
)
3238 int maxphyaddr
= cpuid_maxphyaddr(vcpu
);
3239 u64 exb_bit_rsvd
= 0;
3242 exb_bit_rsvd
= rsvd_bits(63, 63);
3243 switch (context
->root_level
) {
3244 case PT32_ROOT_LEVEL
:
3245 /* no rsvd bits for 2 level 4K page table entries */
3246 context
->rsvd_bits_mask
[0][1] = 0;
3247 context
->rsvd_bits_mask
[0][0] = 0;
3248 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
3250 if (!is_pse(vcpu
)) {
3251 context
->rsvd_bits_mask
[1][1] = 0;
3255 if (is_cpuid_PSE36())
3256 /* 36bits PSE 4MB page */
3257 context
->rsvd_bits_mask
[1][1] = rsvd_bits(17, 21);
3259 /* 32 bits PSE 4MB page */
3260 context
->rsvd_bits_mask
[1][1] = rsvd_bits(13, 21);
3262 case PT32E_ROOT_LEVEL
:
3263 context
->rsvd_bits_mask
[0][2] =
3264 rsvd_bits(maxphyaddr
, 63) |
3265 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
3266 context
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
3267 rsvd_bits(maxphyaddr
, 62); /* PDE */
3268 context
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
3269 rsvd_bits(maxphyaddr
, 62); /* PTE */
3270 context
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
3271 rsvd_bits(maxphyaddr
, 62) |
3272 rsvd_bits(13, 20); /* large page */
3273 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
3275 case PT64_ROOT_LEVEL
:
3276 context
->rsvd_bits_mask
[0][3] = exb_bit_rsvd
|
3277 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(7, 8);
3278 context
->rsvd_bits_mask
[0][2] = exb_bit_rsvd
|
3279 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(7, 8);
3280 context
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
3281 rsvd_bits(maxphyaddr
, 51);
3282 context
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
3283 rsvd_bits(maxphyaddr
, 51);
3284 context
->rsvd_bits_mask
[1][3] = context
->rsvd_bits_mask
[0][3];
3285 context
->rsvd_bits_mask
[1][2] = exb_bit_rsvd
|
3286 rsvd_bits(maxphyaddr
, 51) |
3288 context
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
3289 rsvd_bits(maxphyaddr
, 51) |
3290 rsvd_bits(13, 20); /* large page */
3291 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
3296 static int paging64_init_context_common(struct kvm_vcpu
*vcpu
,
3297 struct kvm_mmu
*context
,
3300 context
->nx
= is_nx(vcpu
);
3301 context
->root_level
= level
;
3303 reset_rsvds_bits_mask(vcpu
, context
);
3305 ASSERT(is_pae(vcpu
));
3306 context
->new_cr3
= paging_new_cr3
;
3307 context
->page_fault
= paging64_page_fault
;
3308 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3309 context
->sync_page
= paging64_sync_page
;
3310 context
->invlpg
= paging64_invlpg
;
3311 context
->update_pte
= paging64_update_pte
;
3312 context
->free
= paging_free
;
3313 context
->shadow_root_level
= level
;
3314 context
->root_hpa
= INVALID_PAGE
;
3315 context
->direct_map
= false;
3319 static int paging64_init_context(struct kvm_vcpu
*vcpu
,
3320 struct kvm_mmu
*context
)
3322 return paging64_init_context_common(vcpu
, context
, PT64_ROOT_LEVEL
);
3325 static int paging32_init_context(struct kvm_vcpu
*vcpu
,
3326 struct kvm_mmu
*context
)
3328 context
->nx
= false;
3329 context
->root_level
= PT32_ROOT_LEVEL
;
3331 reset_rsvds_bits_mask(vcpu
, context
);
3333 context
->new_cr3
= paging_new_cr3
;
3334 context
->page_fault
= paging32_page_fault
;
3335 context
->gva_to_gpa
= paging32_gva_to_gpa
;
3336 context
->free
= paging_free
;
3337 context
->sync_page
= paging32_sync_page
;
3338 context
->invlpg
= paging32_invlpg
;
3339 context
->update_pte
= paging32_update_pte
;
3340 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
3341 context
->root_hpa
= INVALID_PAGE
;
3342 context
->direct_map
= false;
3346 static int paging32E_init_context(struct kvm_vcpu
*vcpu
,
3347 struct kvm_mmu
*context
)
3349 return paging64_init_context_common(vcpu
, context
, PT32E_ROOT_LEVEL
);
3352 static int init_kvm_tdp_mmu(struct kvm_vcpu
*vcpu
)
3354 struct kvm_mmu
*context
= vcpu
->arch
.walk_mmu
;
3356 context
->base_role
.word
= 0;
3357 context
->new_cr3
= nonpaging_new_cr3
;
3358 context
->page_fault
= tdp_page_fault
;
3359 context
->free
= nonpaging_free
;
3360 context
->sync_page
= nonpaging_sync_page
;
3361 context
->invlpg
= nonpaging_invlpg
;
3362 context
->update_pte
= nonpaging_update_pte
;
3363 context
->shadow_root_level
= kvm_x86_ops
->get_tdp_level();
3364 context
->root_hpa
= INVALID_PAGE
;
3365 context
->direct_map
= true;
3366 context
->set_cr3
= kvm_x86_ops
->set_tdp_cr3
;
3367 context
->get_cr3
= get_cr3
;
3368 context
->get_pdptr
= kvm_pdptr_read
;
3369 context
->inject_page_fault
= kvm_inject_page_fault
;
3371 if (!is_paging(vcpu
)) {
3372 context
->nx
= false;
3373 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
3374 context
->root_level
= 0;
3375 } else if (is_long_mode(vcpu
)) {
3376 context
->nx
= is_nx(vcpu
);
3377 context
->root_level
= PT64_ROOT_LEVEL
;
3378 reset_rsvds_bits_mask(vcpu
, context
);
3379 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3380 } else if (is_pae(vcpu
)) {
3381 context
->nx
= is_nx(vcpu
);
3382 context
->root_level
= PT32E_ROOT_LEVEL
;
3383 reset_rsvds_bits_mask(vcpu
, context
);
3384 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3386 context
->nx
= false;
3387 context
->root_level
= PT32_ROOT_LEVEL
;
3388 reset_rsvds_bits_mask(vcpu
, context
);
3389 context
->gva_to_gpa
= paging32_gva_to_gpa
;
3395 int kvm_init_shadow_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*context
)
3398 bool smep
= kvm_read_cr4_bits(vcpu
, X86_CR4_SMEP
);
3400 ASSERT(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3402 if (!is_paging(vcpu
))
3403 r
= nonpaging_init_context(vcpu
, context
);
3404 else if (is_long_mode(vcpu
))
3405 r
= paging64_init_context(vcpu
, context
);
3406 else if (is_pae(vcpu
))
3407 r
= paging32E_init_context(vcpu
, context
);
3409 r
= paging32_init_context(vcpu
, context
);
3411 vcpu
->arch
.mmu
.base_role
.cr4_pae
= !!is_pae(vcpu
);
3412 vcpu
->arch
.mmu
.base_role
.cr0_wp
= is_write_protection(vcpu
);
3413 vcpu
->arch
.mmu
.base_role
.smep_andnot_wp
3414 = smep
&& !is_write_protection(vcpu
);
3418 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu
);
3420 static int init_kvm_softmmu(struct kvm_vcpu
*vcpu
)
3422 int r
= kvm_init_shadow_mmu(vcpu
, vcpu
->arch
.walk_mmu
);
3424 vcpu
->arch
.walk_mmu
->set_cr3
= kvm_x86_ops
->set_cr3
;
3425 vcpu
->arch
.walk_mmu
->get_cr3
= get_cr3
;
3426 vcpu
->arch
.walk_mmu
->get_pdptr
= kvm_pdptr_read
;
3427 vcpu
->arch
.walk_mmu
->inject_page_fault
= kvm_inject_page_fault
;
3432 static int init_kvm_nested_mmu(struct kvm_vcpu
*vcpu
)
3434 struct kvm_mmu
*g_context
= &vcpu
->arch
.nested_mmu
;
3436 g_context
->get_cr3
= get_cr3
;
3437 g_context
->get_pdptr
= kvm_pdptr_read
;
3438 g_context
->inject_page_fault
= kvm_inject_page_fault
;
3441 * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
3442 * translation of l2_gpa to l1_gpa addresses is done using the
3443 * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
3444 * functions between mmu and nested_mmu are swapped.
3446 if (!is_paging(vcpu
)) {
3447 g_context
->nx
= false;
3448 g_context
->root_level
= 0;
3449 g_context
->gva_to_gpa
= nonpaging_gva_to_gpa_nested
;
3450 } else if (is_long_mode(vcpu
)) {
3451 g_context
->nx
= is_nx(vcpu
);
3452 g_context
->root_level
= PT64_ROOT_LEVEL
;
3453 reset_rsvds_bits_mask(vcpu
, g_context
);
3454 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
3455 } else if (is_pae(vcpu
)) {
3456 g_context
->nx
= is_nx(vcpu
);
3457 g_context
->root_level
= PT32E_ROOT_LEVEL
;
3458 reset_rsvds_bits_mask(vcpu
, g_context
);
3459 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
3461 g_context
->nx
= false;
3462 g_context
->root_level
= PT32_ROOT_LEVEL
;
3463 reset_rsvds_bits_mask(vcpu
, g_context
);
3464 g_context
->gva_to_gpa
= paging32_gva_to_gpa_nested
;
3470 static int init_kvm_mmu(struct kvm_vcpu
*vcpu
)
3472 if (mmu_is_nested(vcpu
))
3473 return init_kvm_nested_mmu(vcpu
);
3474 else if (tdp_enabled
)
3475 return init_kvm_tdp_mmu(vcpu
);
3477 return init_kvm_softmmu(vcpu
);
3480 static void destroy_kvm_mmu(struct kvm_vcpu
*vcpu
)
3483 if (VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
3484 /* mmu.free() should set root_hpa = INVALID_PAGE */
3485 vcpu
->arch
.mmu
.free(vcpu
);
3488 int kvm_mmu_reset_context(struct kvm_vcpu
*vcpu
)
3490 destroy_kvm_mmu(vcpu
);
3491 return init_kvm_mmu(vcpu
);
3493 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context
);
3495 int kvm_mmu_load(struct kvm_vcpu
*vcpu
)
3499 r
= mmu_topup_memory_caches(vcpu
);
3502 r
= mmu_alloc_roots(vcpu
);
3503 spin_lock(&vcpu
->kvm
->mmu_lock
);
3504 mmu_sync_roots(vcpu
);
3505 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3508 /* set_cr3() should ensure TLB has been flushed */
3509 vcpu
->arch
.mmu
.set_cr3(vcpu
, vcpu
->arch
.mmu
.root_hpa
);
3513 EXPORT_SYMBOL_GPL(kvm_mmu_load
);
3515 void kvm_mmu_unload(struct kvm_vcpu
*vcpu
)
3517 mmu_free_roots(vcpu
);
3519 EXPORT_SYMBOL_GPL(kvm_mmu_unload
);
3521 static void mmu_pte_write_new_pte(struct kvm_vcpu
*vcpu
,
3522 struct kvm_mmu_page
*sp
, u64
*spte
,
3525 if (sp
->role
.level
!= PT_PAGE_TABLE_LEVEL
) {
3526 ++vcpu
->kvm
->stat
.mmu_pde_zapped
;
3530 ++vcpu
->kvm
->stat
.mmu_pte_updated
;
3531 vcpu
->arch
.mmu
.update_pte(vcpu
, sp
, spte
, new);
3534 static bool need_remote_flush(u64 old
, u64
new)
3536 if (!is_shadow_present_pte(old
))
3538 if (!is_shadow_present_pte(new))
3540 if ((old
^ new) & PT64_BASE_ADDR_MASK
)
3542 old
^= PT64_NX_MASK
;
3543 new ^= PT64_NX_MASK
;
3544 return (old
& ~new & PT64_PERM_MASK
) != 0;
3547 static void mmu_pte_write_flush_tlb(struct kvm_vcpu
*vcpu
, bool zap_page
,
3548 bool remote_flush
, bool local_flush
)
3554 kvm_flush_remote_tlbs(vcpu
->kvm
);
3555 else if (local_flush
)
3556 kvm_mmu_flush_tlb(vcpu
);
3559 static u64
mmu_pte_write_fetch_gpte(struct kvm_vcpu
*vcpu
, gpa_t
*gpa
,
3560 const u8
*new, int *bytes
)
3566 * Assume that the pte write on a page table of the same type
3567 * as the current vcpu paging mode since we update the sptes only
3568 * when they have the same mode.
3570 if (is_pae(vcpu
) && *bytes
== 4) {
3571 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
3574 r
= kvm_read_guest(vcpu
->kvm
, *gpa
, &gentry
, min(*bytes
, 8));
3577 new = (const u8
*)&gentry
;
3582 gentry
= *(const u32
*)new;
3585 gentry
= *(const u64
*)new;
3596 * If we're seeing too many writes to a page, it may no longer be a page table,
3597 * or we may be forking, in which case it is better to unmap the page.
3599 static bool detect_write_flooding(struct kvm_mmu_page
*sp
)
3602 * Skip write-flooding detected for the sp whose level is 1, because
3603 * it can become unsync, then the guest page is not write-protected.
3605 if (sp
->role
.level
== PT_PAGE_TABLE_LEVEL
)
3608 return ++sp
->write_flooding_count
>= 3;
3612 * Misaligned accesses are too much trouble to fix up; also, they usually
3613 * indicate a page is not used as a page table.
3615 static bool detect_write_misaligned(struct kvm_mmu_page
*sp
, gpa_t gpa
,
3618 unsigned offset
, pte_size
, misaligned
;
3620 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
3621 gpa
, bytes
, sp
->role
.word
);
3623 offset
= offset_in_page(gpa
);
3624 pte_size
= sp
->role
.cr4_pae
? 8 : 4;
3627 * Sometimes, the OS only writes the last one bytes to update status
3628 * bits, for example, in linux, andb instruction is used in clear_bit().
3630 if (!(offset
& (pte_size
- 1)) && bytes
== 1)
3633 misaligned
= (offset
^ (offset
+ bytes
- 1)) & ~(pte_size
- 1);
3634 misaligned
|= bytes
< 4;
3639 static u64
*get_written_sptes(struct kvm_mmu_page
*sp
, gpa_t gpa
, int *nspte
)
3641 unsigned page_offset
, quadrant
;
3645 page_offset
= offset_in_page(gpa
);
3646 level
= sp
->role
.level
;
3648 if (!sp
->role
.cr4_pae
) {
3649 page_offset
<<= 1; /* 32->64 */
3651 * A 32-bit pde maps 4MB while the shadow pdes map
3652 * only 2MB. So we need to double the offset again
3653 * and zap two pdes instead of one.
3655 if (level
== PT32_ROOT_LEVEL
) {
3656 page_offset
&= ~7; /* kill rounding error */
3660 quadrant
= page_offset
>> PAGE_SHIFT
;
3661 page_offset
&= ~PAGE_MASK
;
3662 if (quadrant
!= sp
->role
.quadrant
)
3666 spte
= &sp
->spt
[page_offset
/ sizeof(*spte
)];
3670 void kvm_mmu_pte_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3671 const u8
*new, int bytes
)
3673 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
3674 union kvm_mmu_page_role mask
= { .word
= 0 };
3675 struct kvm_mmu_page
*sp
;
3676 struct hlist_node
*node
;
3677 LIST_HEAD(invalid_list
);
3678 u64 entry
, gentry
, *spte
;
3680 bool remote_flush
, local_flush
, zap_page
;
3683 * If we don't have indirect shadow pages, it means no page is
3684 * write-protected, so we can exit simply.
3686 if (!ACCESS_ONCE(vcpu
->kvm
->arch
.indirect_shadow_pages
))
3689 zap_page
= remote_flush
= local_flush
= false;
3691 pgprintk("%s: gpa %llx bytes %d\n", __func__
, gpa
, bytes
);
3693 gentry
= mmu_pte_write_fetch_gpte(vcpu
, &gpa
, new, &bytes
);
3696 * No need to care whether allocation memory is successful
3697 * or not since pte prefetch is skiped if it does not have
3698 * enough objects in the cache.
3700 mmu_topup_memory_caches(vcpu
);
3702 spin_lock(&vcpu
->kvm
->mmu_lock
);
3703 ++vcpu
->kvm
->stat
.mmu_pte_write
;
3704 kvm_mmu_audit(vcpu
, AUDIT_PRE_PTE_WRITE
);
3706 mask
.cr0_wp
= mask
.cr4_pae
= mask
.nxe
= 1;
3707 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, sp
, gfn
, node
) {
3708 if (detect_write_misaligned(sp
, gpa
, bytes
) ||
3709 detect_write_flooding(sp
)) {
3710 zap_page
|= !!kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
3712 ++vcpu
->kvm
->stat
.mmu_flooded
;
3716 spte
= get_written_sptes(sp
, gpa
, &npte
);
3723 mmu_page_zap_pte(vcpu
->kvm
, sp
, spte
);
3725 !((sp
->role
.word
^ vcpu
->arch
.mmu
.base_role
.word
)
3726 & mask
.word
) && rmap_can_add(vcpu
))
3727 mmu_pte_write_new_pte(vcpu
, sp
, spte
, &gentry
);
3728 if (!remote_flush
&& need_remote_flush(entry
, *spte
))
3729 remote_flush
= true;
3733 mmu_pte_write_flush_tlb(vcpu
, zap_page
, remote_flush
, local_flush
);
3734 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
3735 kvm_mmu_audit(vcpu
, AUDIT_POST_PTE_WRITE
);
3736 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3739 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu
*vcpu
, gva_t gva
)
3744 if (vcpu
->arch
.mmu
.direct_map
)
3747 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, gva
, NULL
);
3749 r
= kvm_mmu_unprotect_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
3753 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt
);
3755 void __kvm_mmu_free_some_pages(struct kvm_vcpu
*vcpu
)
3757 LIST_HEAD(invalid_list
);
3759 while (kvm_mmu_available_pages(vcpu
->kvm
) < KVM_REFILL_PAGES
&&
3760 !list_empty(&vcpu
->kvm
->arch
.active_mmu_pages
)) {
3761 struct kvm_mmu_page
*sp
;
3763 sp
= container_of(vcpu
->kvm
->arch
.active_mmu_pages
.prev
,
3764 struct kvm_mmu_page
, link
);
3765 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, &invalid_list
);
3766 ++vcpu
->kvm
->stat
.mmu_recycled
;
3768 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
3771 static bool is_mmio_page_fault(struct kvm_vcpu
*vcpu
, gva_t addr
)
3773 if (vcpu
->arch
.mmu
.direct_map
|| mmu_is_nested(vcpu
))
3774 return vcpu_match_mmio_gpa(vcpu
, addr
);
3776 return vcpu_match_mmio_gva(vcpu
, addr
);
3779 int kvm_mmu_page_fault(struct kvm_vcpu
*vcpu
, gva_t cr2
, u32 error_code
,
3780 void *insn
, int insn_len
)
3782 int r
, emulation_type
= EMULTYPE_RETRY
;
3783 enum emulation_result er
;
3785 r
= vcpu
->arch
.mmu
.page_fault(vcpu
, cr2
, error_code
, false);
3794 if (is_mmio_page_fault(vcpu
, cr2
))
3797 er
= x86_emulate_instruction(vcpu
, cr2
, emulation_type
, insn
, insn_len
);
3802 case EMULATE_DO_MMIO
:
3803 ++vcpu
->stat
.mmio_exits
;
3813 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault
);
3815 void kvm_mmu_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
3817 vcpu
->arch
.mmu
.invlpg(vcpu
, gva
);
3818 kvm_mmu_flush_tlb(vcpu
);
3819 ++vcpu
->stat
.invlpg
;
3821 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg
);
3823 void kvm_enable_tdp(void)
3827 EXPORT_SYMBOL_GPL(kvm_enable_tdp
);
3829 void kvm_disable_tdp(void)
3831 tdp_enabled
= false;
3833 EXPORT_SYMBOL_GPL(kvm_disable_tdp
);
3835 static void free_mmu_pages(struct kvm_vcpu
*vcpu
)
3837 free_page((unsigned long)vcpu
->arch
.mmu
.pae_root
);
3838 if (vcpu
->arch
.mmu
.lm_root
!= NULL
)
3839 free_page((unsigned long)vcpu
->arch
.mmu
.lm_root
);
3842 static int alloc_mmu_pages(struct kvm_vcpu
*vcpu
)
3850 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
3851 * Therefore we need to allocate shadow page tables in the first
3852 * 4GB of memory, which happens to fit the DMA32 zone.
3854 page
= alloc_page(GFP_KERNEL
| __GFP_DMA32
);
3858 vcpu
->arch
.mmu
.pae_root
= page_address(page
);
3859 for (i
= 0; i
< 4; ++i
)
3860 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
3865 int kvm_mmu_create(struct kvm_vcpu
*vcpu
)
3869 vcpu
->arch
.walk_mmu
= &vcpu
->arch
.mmu
;
3870 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
3871 vcpu
->arch
.mmu
.translate_gpa
= translate_gpa
;
3872 vcpu
->arch
.nested_mmu
.translate_gpa
= translate_nested_gpa
;
3874 return alloc_mmu_pages(vcpu
);
3877 int kvm_mmu_setup(struct kvm_vcpu
*vcpu
)
3880 ASSERT(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3882 return init_kvm_mmu(vcpu
);
3885 void kvm_mmu_slot_remove_write_access(struct kvm
*kvm
, int slot
)
3887 struct kvm_mmu_page
*sp
;
3889 list_for_each_entry(sp
, &kvm
->arch
.active_mmu_pages
, link
) {
3893 if (!test_bit(slot
, sp
->slot_bitmap
))
3897 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
) {
3898 if (!is_shadow_present_pte(pt
[i
]) ||
3899 !is_last_spte(pt
[i
], sp
->role
.level
))
3902 if (is_large_pte(pt
[i
])) {
3903 drop_spte(kvm
, &pt
[i
]);
3909 if (is_writable_pte(pt
[i
]))
3910 mmu_spte_update(&pt
[i
],
3911 pt
[i
] & ~PT_WRITABLE_MASK
);
3914 kvm_flush_remote_tlbs(kvm
);
3917 void kvm_mmu_zap_all(struct kvm
*kvm
)
3919 struct kvm_mmu_page
*sp
, *node
;
3920 LIST_HEAD(invalid_list
);
3922 spin_lock(&kvm
->mmu_lock
);
3924 list_for_each_entry_safe(sp
, node
, &kvm
->arch
.active_mmu_pages
, link
)
3925 if (kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
))
3928 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
3929 spin_unlock(&kvm
->mmu_lock
);
3932 static void kvm_mmu_remove_some_alloc_mmu_pages(struct kvm
*kvm
,
3933 struct list_head
*invalid_list
)
3935 struct kvm_mmu_page
*page
;
3937 page
= container_of(kvm
->arch
.active_mmu_pages
.prev
,
3938 struct kvm_mmu_page
, link
);
3939 kvm_mmu_prepare_zap_page(kvm
, page
, invalid_list
);
3942 static int mmu_shrink(struct shrinker
*shrink
, struct shrink_control
*sc
)
3945 struct kvm
*kvm_freed
= NULL
;
3946 int nr_to_scan
= sc
->nr_to_scan
;
3948 if (nr_to_scan
== 0)
3951 raw_spin_lock(&kvm_lock
);
3953 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
3955 LIST_HEAD(invalid_list
);
3957 idx
= srcu_read_lock(&kvm
->srcu
);
3958 spin_lock(&kvm
->mmu_lock
);
3959 if (!kvm_freed
&& nr_to_scan
> 0 &&
3960 kvm
->arch
.n_used_mmu_pages
> 0) {
3961 kvm_mmu_remove_some_alloc_mmu_pages(kvm
,
3967 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
3968 spin_unlock(&kvm
->mmu_lock
);
3969 srcu_read_unlock(&kvm
->srcu
, idx
);
3972 list_move_tail(&kvm_freed
->vm_list
, &vm_list
);
3974 raw_spin_unlock(&kvm_lock
);
3977 return percpu_counter_read_positive(&kvm_total_used_mmu_pages
);
3980 static struct shrinker mmu_shrinker
= {
3981 .shrink
= mmu_shrink
,
3982 .seeks
= DEFAULT_SEEKS
* 10,
3985 static void mmu_destroy_caches(void)
3987 if (pte_list_desc_cache
)
3988 kmem_cache_destroy(pte_list_desc_cache
);
3989 if (mmu_page_header_cache
)
3990 kmem_cache_destroy(mmu_page_header_cache
);
3993 int kvm_mmu_module_init(void)
3995 pte_list_desc_cache
= kmem_cache_create("pte_list_desc",
3996 sizeof(struct pte_list_desc
),
3998 if (!pte_list_desc_cache
)
4001 mmu_page_header_cache
= kmem_cache_create("kvm_mmu_page_header",
4002 sizeof(struct kvm_mmu_page
),
4004 if (!mmu_page_header_cache
)
4007 if (percpu_counter_init(&kvm_total_used_mmu_pages
, 0))
4010 register_shrinker(&mmu_shrinker
);
4015 mmu_destroy_caches();
4020 * Caculate mmu pages needed for kvm.
4022 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm
*kvm
)
4024 unsigned int nr_mmu_pages
;
4025 unsigned int nr_pages
= 0;
4026 struct kvm_memslots
*slots
;
4027 struct kvm_memory_slot
*memslot
;
4029 slots
= kvm_memslots(kvm
);
4031 kvm_for_each_memslot(memslot
, slots
)
4032 nr_pages
+= memslot
->npages
;
4034 nr_mmu_pages
= nr_pages
* KVM_PERMILLE_MMU_PAGES
/ 1000;
4035 nr_mmu_pages
= max(nr_mmu_pages
,
4036 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES
);
4038 return nr_mmu_pages
;
4041 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu
*vcpu
, u64 addr
, u64 sptes
[4])
4043 struct kvm_shadow_walk_iterator iterator
;
4047 walk_shadow_page_lockless_begin(vcpu
);
4048 for_each_shadow_entry_lockless(vcpu
, addr
, iterator
, spte
) {
4049 sptes
[iterator
.level
-1] = spte
;
4051 if (!is_shadow_present_pte(spte
))
4054 walk_shadow_page_lockless_end(vcpu
);
4058 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy
);
4060 void kvm_mmu_destroy(struct kvm_vcpu
*vcpu
)
4064 destroy_kvm_mmu(vcpu
);
4065 free_mmu_pages(vcpu
);
4066 mmu_free_memory_caches(vcpu
);
4069 void kvm_mmu_module_exit(void)
4071 mmu_destroy_caches();
4072 percpu_counter_destroy(&kvm_total_used_mmu_pages
);
4073 unregister_shrinker(&mmu_shrinker
);
4074 mmu_audit_disable();