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KVM: export information about NPT to generic x86 code
[deliverable/linux.git] / arch / x86 / kvm / mmu.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
19
20 #include "vmx.h"
21 #include "mmu.h"
22
23 #include <linux/kvm_host.h>
24 #include <linux/types.h>
25 #include <linux/string.h>
26 #include <linux/mm.h>
27 #include <linux/highmem.h>
28 #include <linux/module.h>
29 #include <linux/swap.h>
30
31 #include <asm/page.h>
32 #include <asm/cmpxchg.h>
33 #include <asm/io.h>
34
35 /*
36 * When setting this variable to true it enables Two-Dimensional-Paging
37 * where the hardware walks 2 page tables:
38 * 1. the guest-virtual to guest-physical
39 * 2. while doing 1. it walks guest-physical to host-physical
40 * If the hardware supports that we don't need to do shadow paging.
41 */
42 static bool tdp_enabled = false;
43
44 #undef MMU_DEBUG
45
46 #undef AUDIT
47
48 #ifdef AUDIT
49 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
50 #else
51 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
52 #endif
53
54 #ifdef MMU_DEBUG
55
56 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
57 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
58
59 #else
60
61 #define pgprintk(x...) do { } while (0)
62 #define rmap_printk(x...) do { } while (0)
63
64 #endif
65
66 #if defined(MMU_DEBUG) || defined(AUDIT)
67 static int dbg = 1;
68 #endif
69
70 #ifndef MMU_DEBUG
71 #define ASSERT(x) do { } while (0)
72 #else
73 #define ASSERT(x) \
74 if (!(x)) { \
75 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
76 __FILE__, __LINE__, #x); \
77 }
78 #endif
79
80 #define PT64_PT_BITS 9
81 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
82 #define PT32_PT_BITS 10
83 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
84
85 #define PT_WRITABLE_SHIFT 1
86
87 #define PT_PRESENT_MASK (1ULL << 0)
88 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
89 #define PT_USER_MASK (1ULL << 2)
90 #define PT_PWT_MASK (1ULL << 3)
91 #define PT_PCD_MASK (1ULL << 4)
92 #define PT_ACCESSED_MASK (1ULL << 5)
93 #define PT_DIRTY_MASK (1ULL << 6)
94 #define PT_PAGE_SIZE_MASK (1ULL << 7)
95 #define PT_PAT_MASK (1ULL << 7)
96 #define PT_GLOBAL_MASK (1ULL << 8)
97 #define PT64_NX_SHIFT 63
98 #define PT64_NX_MASK (1ULL << PT64_NX_SHIFT)
99
100 #define PT_PAT_SHIFT 7
101 #define PT_DIR_PAT_SHIFT 12
102 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
103
104 #define PT32_DIR_PSE36_SIZE 4
105 #define PT32_DIR_PSE36_SHIFT 13
106 #define PT32_DIR_PSE36_MASK \
107 (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
108
109
110 #define PT_FIRST_AVAIL_BITS_SHIFT 9
111 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
112
113 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
114
115 #define PT64_LEVEL_BITS 9
116
117 #define PT64_LEVEL_SHIFT(level) \
118 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
119
120 #define PT64_LEVEL_MASK(level) \
121 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
122
123 #define PT64_INDEX(address, level)\
124 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
125
126
127 #define PT32_LEVEL_BITS 10
128
129 #define PT32_LEVEL_SHIFT(level) \
130 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
131
132 #define PT32_LEVEL_MASK(level) \
133 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
134
135 #define PT32_INDEX(address, level)\
136 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
137
138
139 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
140 #define PT64_DIR_BASE_ADDR_MASK \
141 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
142
143 #define PT32_BASE_ADDR_MASK PAGE_MASK
144 #define PT32_DIR_BASE_ADDR_MASK \
145 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
146
147 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
148 | PT64_NX_MASK)
149
150 #define PFERR_PRESENT_MASK (1U << 0)
151 #define PFERR_WRITE_MASK (1U << 1)
152 #define PFERR_USER_MASK (1U << 2)
153 #define PFERR_FETCH_MASK (1U << 4)
154
155 #define PT64_ROOT_LEVEL 4
156 #define PT32_ROOT_LEVEL 2
157 #define PT32E_ROOT_LEVEL 3
158
159 #define PT_DIRECTORY_LEVEL 2
160 #define PT_PAGE_TABLE_LEVEL 1
161
162 #define RMAP_EXT 4
163
164 #define ACC_EXEC_MASK 1
165 #define ACC_WRITE_MASK PT_WRITABLE_MASK
166 #define ACC_USER_MASK PT_USER_MASK
167 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
168
169 struct kvm_rmap_desc {
170 u64 *shadow_ptes[RMAP_EXT];
171 struct kvm_rmap_desc *more;
172 };
173
174 static struct kmem_cache *pte_chain_cache;
175 static struct kmem_cache *rmap_desc_cache;
176 static struct kmem_cache *mmu_page_header_cache;
177
178 static u64 __read_mostly shadow_trap_nonpresent_pte;
179 static u64 __read_mostly shadow_notrap_nonpresent_pte;
180
181 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
182 {
183 shadow_trap_nonpresent_pte = trap_pte;
184 shadow_notrap_nonpresent_pte = notrap_pte;
185 }
186 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
187
188 static int is_write_protection(struct kvm_vcpu *vcpu)
189 {
190 return vcpu->arch.cr0 & X86_CR0_WP;
191 }
192
193 static int is_cpuid_PSE36(void)
194 {
195 return 1;
196 }
197
198 static int is_nx(struct kvm_vcpu *vcpu)
199 {
200 return vcpu->arch.shadow_efer & EFER_NX;
201 }
202
203 static int is_present_pte(unsigned long pte)
204 {
205 return pte & PT_PRESENT_MASK;
206 }
207
208 static int is_shadow_present_pte(u64 pte)
209 {
210 return pte != shadow_trap_nonpresent_pte
211 && pte != shadow_notrap_nonpresent_pte;
212 }
213
214 static int is_writeble_pte(unsigned long pte)
215 {
216 return pte & PT_WRITABLE_MASK;
217 }
218
219 static int is_dirty_pte(unsigned long pte)
220 {
221 return pte & PT_DIRTY_MASK;
222 }
223
224 static int is_rmap_pte(u64 pte)
225 {
226 return is_shadow_present_pte(pte);
227 }
228
229 static gfn_t pse36_gfn_delta(u32 gpte)
230 {
231 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
232
233 return (gpte & PT32_DIR_PSE36_MASK) << shift;
234 }
235
236 static void set_shadow_pte(u64 *sptep, u64 spte)
237 {
238 #ifdef CONFIG_X86_64
239 set_64bit((unsigned long *)sptep, spte);
240 #else
241 set_64bit((unsigned long long *)sptep, spte);
242 #endif
243 }
244
245 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
246 struct kmem_cache *base_cache, int min)
247 {
248 void *obj;
249
250 if (cache->nobjs >= min)
251 return 0;
252 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
253 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
254 if (!obj)
255 return -ENOMEM;
256 cache->objects[cache->nobjs++] = obj;
257 }
258 return 0;
259 }
260
261 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
262 {
263 while (mc->nobjs)
264 kfree(mc->objects[--mc->nobjs]);
265 }
266
267 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
268 int min)
269 {
270 struct page *page;
271
272 if (cache->nobjs >= min)
273 return 0;
274 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
275 page = alloc_page(GFP_KERNEL);
276 if (!page)
277 return -ENOMEM;
278 set_page_private(page, 0);
279 cache->objects[cache->nobjs++] = page_address(page);
280 }
281 return 0;
282 }
283
284 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
285 {
286 while (mc->nobjs)
287 free_page((unsigned long)mc->objects[--mc->nobjs]);
288 }
289
290 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
291 {
292 int r;
293
294 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
295 pte_chain_cache, 4);
296 if (r)
297 goto out;
298 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
299 rmap_desc_cache, 1);
300 if (r)
301 goto out;
302 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
303 if (r)
304 goto out;
305 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
306 mmu_page_header_cache, 4);
307 out:
308 return r;
309 }
310
311 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
312 {
313 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
314 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
315 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
316 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
317 }
318
319 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
320 size_t size)
321 {
322 void *p;
323
324 BUG_ON(!mc->nobjs);
325 p = mc->objects[--mc->nobjs];
326 memset(p, 0, size);
327 return p;
328 }
329
330 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
331 {
332 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
333 sizeof(struct kvm_pte_chain));
334 }
335
336 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
337 {
338 kfree(pc);
339 }
340
341 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
342 {
343 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
344 sizeof(struct kvm_rmap_desc));
345 }
346
347 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
348 {
349 kfree(rd);
350 }
351
352 /*
353 * Take gfn and return the reverse mapping to it.
354 * Note: gfn must be unaliased before this function get called
355 */
356
357 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn)
358 {
359 struct kvm_memory_slot *slot;
360
361 slot = gfn_to_memslot(kvm, gfn);
362 return &slot->rmap[gfn - slot->base_gfn];
363 }
364
365 /*
366 * Reverse mapping data structures:
367 *
368 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
369 * that points to page_address(page).
370 *
371 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
372 * containing more mappings.
373 */
374 static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
375 {
376 struct kvm_mmu_page *sp;
377 struct kvm_rmap_desc *desc;
378 unsigned long *rmapp;
379 int i;
380
381 if (!is_rmap_pte(*spte))
382 return;
383 gfn = unalias_gfn(vcpu->kvm, gfn);
384 sp = page_header(__pa(spte));
385 sp->gfns[spte - sp->spt] = gfn;
386 rmapp = gfn_to_rmap(vcpu->kvm, gfn);
387 if (!*rmapp) {
388 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
389 *rmapp = (unsigned long)spte;
390 } else if (!(*rmapp & 1)) {
391 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
392 desc = mmu_alloc_rmap_desc(vcpu);
393 desc->shadow_ptes[0] = (u64 *)*rmapp;
394 desc->shadow_ptes[1] = spte;
395 *rmapp = (unsigned long)desc | 1;
396 } else {
397 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
398 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
399 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
400 desc = desc->more;
401 if (desc->shadow_ptes[RMAP_EXT-1]) {
402 desc->more = mmu_alloc_rmap_desc(vcpu);
403 desc = desc->more;
404 }
405 for (i = 0; desc->shadow_ptes[i]; ++i)
406 ;
407 desc->shadow_ptes[i] = spte;
408 }
409 }
410
411 static void rmap_desc_remove_entry(unsigned long *rmapp,
412 struct kvm_rmap_desc *desc,
413 int i,
414 struct kvm_rmap_desc *prev_desc)
415 {
416 int j;
417
418 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
419 ;
420 desc->shadow_ptes[i] = desc->shadow_ptes[j];
421 desc->shadow_ptes[j] = NULL;
422 if (j != 0)
423 return;
424 if (!prev_desc && !desc->more)
425 *rmapp = (unsigned long)desc->shadow_ptes[0];
426 else
427 if (prev_desc)
428 prev_desc->more = desc->more;
429 else
430 *rmapp = (unsigned long)desc->more | 1;
431 mmu_free_rmap_desc(desc);
432 }
433
434 static void rmap_remove(struct kvm *kvm, u64 *spte)
435 {
436 struct kvm_rmap_desc *desc;
437 struct kvm_rmap_desc *prev_desc;
438 struct kvm_mmu_page *sp;
439 struct page *page;
440 unsigned long *rmapp;
441 int i;
442
443 if (!is_rmap_pte(*spte))
444 return;
445 sp = page_header(__pa(spte));
446 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
447 mark_page_accessed(page);
448 if (is_writeble_pte(*spte))
449 kvm_release_page_dirty(page);
450 else
451 kvm_release_page_clean(page);
452 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt]);
453 if (!*rmapp) {
454 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
455 BUG();
456 } else if (!(*rmapp & 1)) {
457 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
458 if ((u64 *)*rmapp != spte) {
459 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
460 spte, *spte);
461 BUG();
462 }
463 *rmapp = 0;
464 } else {
465 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
466 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
467 prev_desc = NULL;
468 while (desc) {
469 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
470 if (desc->shadow_ptes[i] == spte) {
471 rmap_desc_remove_entry(rmapp,
472 desc, i,
473 prev_desc);
474 return;
475 }
476 prev_desc = desc;
477 desc = desc->more;
478 }
479 BUG();
480 }
481 }
482
483 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
484 {
485 struct kvm_rmap_desc *desc;
486 struct kvm_rmap_desc *prev_desc;
487 u64 *prev_spte;
488 int i;
489
490 if (!*rmapp)
491 return NULL;
492 else if (!(*rmapp & 1)) {
493 if (!spte)
494 return (u64 *)*rmapp;
495 return NULL;
496 }
497 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
498 prev_desc = NULL;
499 prev_spte = NULL;
500 while (desc) {
501 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
502 if (prev_spte == spte)
503 return desc->shadow_ptes[i];
504 prev_spte = desc->shadow_ptes[i];
505 }
506 desc = desc->more;
507 }
508 return NULL;
509 }
510
511 static void rmap_write_protect(struct kvm *kvm, u64 gfn)
512 {
513 unsigned long *rmapp;
514 u64 *spte;
515 int write_protected = 0;
516
517 gfn = unalias_gfn(kvm, gfn);
518 rmapp = gfn_to_rmap(kvm, gfn);
519
520 spte = rmap_next(kvm, rmapp, NULL);
521 while (spte) {
522 BUG_ON(!spte);
523 BUG_ON(!(*spte & PT_PRESENT_MASK));
524 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
525 if (is_writeble_pte(*spte)) {
526 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
527 write_protected = 1;
528 }
529 spte = rmap_next(kvm, rmapp, spte);
530 }
531 if (write_protected)
532 kvm_flush_remote_tlbs(kvm);
533 }
534
535 #ifdef MMU_DEBUG
536 static int is_empty_shadow_page(u64 *spt)
537 {
538 u64 *pos;
539 u64 *end;
540
541 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
542 if (*pos != shadow_trap_nonpresent_pte) {
543 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
544 pos, *pos);
545 return 0;
546 }
547 return 1;
548 }
549 #endif
550
551 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
552 {
553 ASSERT(is_empty_shadow_page(sp->spt));
554 list_del(&sp->link);
555 __free_page(virt_to_page(sp->spt));
556 __free_page(virt_to_page(sp->gfns));
557 kfree(sp);
558 ++kvm->arch.n_free_mmu_pages;
559 }
560
561 static unsigned kvm_page_table_hashfn(gfn_t gfn)
562 {
563 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
564 }
565
566 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
567 u64 *parent_pte)
568 {
569 struct kvm_mmu_page *sp;
570
571 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
572 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
573 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
574 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
575 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
576 ASSERT(is_empty_shadow_page(sp->spt));
577 sp->slot_bitmap = 0;
578 sp->multimapped = 0;
579 sp->parent_pte = parent_pte;
580 --vcpu->kvm->arch.n_free_mmu_pages;
581 return sp;
582 }
583
584 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
585 struct kvm_mmu_page *sp, u64 *parent_pte)
586 {
587 struct kvm_pte_chain *pte_chain;
588 struct hlist_node *node;
589 int i;
590
591 if (!parent_pte)
592 return;
593 if (!sp->multimapped) {
594 u64 *old = sp->parent_pte;
595
596 if (!old) {
597 sp->parent_pte = parent_pte;
598 return;
599 }
600 sp->multimapped = 1;
601 pte_chain = mmu_alloc_pte_chain(vcpu);
602 INIT_HLIST_HEAD(&sp->parent_ptes);
603 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
604 pte_chain->parent_ptes[0] = old;
605 }
606 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
607 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
608 continue;
609 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
610 if (!pte_chain->parent_ptes[i]) {
611 pte_chain->parent_ptes[i] = parent_pte;
612 return;
613 }
614 }
615 pte_chain = mmu_alloc_pte_chain(vcpu);
616 BUG_ON(!pte_chain);
617 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
618 pte_chain->parent_ptes[0] = parent_pte;
619 }
620
621 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
622 u64 *parent_pte)
623 {
624 struct kvm_pte_chain *pte_chain;
625 struct hlist_node *node;
626 int i;
627
628 if (!sp->multimapped) {
629 BUG_ON(sp->parent_pte != parent_pte);
630 sp->parent_pte = NULL;
631 return;
632 }
633 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
634 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
635 if (!pte_chain->parent_ptes[i])
636 break;
637 if (pte_chain->parent_ptes[i] != parent_pte)
638 continue;
639 while (i + 1 < NR_PTE_CHAIN_ENTRIES
640 && pte_chain->parent_ptes[i + 1]) {
641 pte_chain->parent_ptes[i]
642 = pte_chain->parent_ptes[i + 1];
643 ++i;
644 }
645 pte_chain->parent_ptes[i] = NULL;
646 if (i == 0) {
647 hlist_del(&pte_chain->link);
648 mmu_free_pte_chain(pte_chain);
649 if (hlist_empty(&sp->parent_ptes)) {
650 sp->multimapped = 0;
651 sp->parent_pte = NULL;
652 }
653 }
654 return;
655 }
656 BUG();
657 }
658
659 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
660 {
661 unsigned index;
662 struct hlist_head *bucket;
663 struct kvm_mmu_page *sp;
664 struct hlist_node *node;
665
666 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
667 index = kvm_page_table_hashfn(gfn);
668 bucket = &kvm->arch.mmu_page_hash[index];
669 hlist_for_each_entry(sp, node, bucket, hash_link)
670 if (sp->gfn == gfn && !sp->role.metaphysical) {
671 pgprintk("%s: found role %x\n",
672 __FUNCTION__, sp->role.word);
673 return sp;
674 }
675 return NULL;
676 }
677
678 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
679 gfn_t gfn,
680 gva_t gaddr,
681 unsigned level,
682 int metaphysical,
683 unsigned access,
684 u64 *parent_pte)
685 {
686 union kvm_mmu_page_role role;
687 unsigned index;
688 unsigned quadrant;
689 struct hlist_head *bucket;
690 struct kvm_mmu_page *sp;
691 struct hlist_node *node;
692
693 role.word = 0;
694 role.glevels = vcpu->arch.mmu.root_level;
695 role.level = level;
696 role.metaphysical = metaphysical;
697 role.access = access;
698 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
699 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
700 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
701 role.quadrant = quadrant;
702 }
703 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
704 gfn, role.word);
705 index = kvm_page_table_hashfn(gfn);
706 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
707 hlist_for_each_entry(sp, node, bucket, hash_link)
708 if (sp->gfn == gfn && sp->role.word == role.word) {
709 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
710 pgprintk("%s: found\n", __FUNCTION__);
711 return sp;
712 }
713 ++vcpu->kvm->stat.mmu_cache_miss;
714 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
715 if (!sp)
716 return sp;
717 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
718 sp->gfn = gfn;
719 sp->role = role;
720 hlist_add_head(&sp->hash_link, bucket);
721 vcpu->arch.mmu.prefetch_page(vcpu, sp);
722 if (!metaphysical)
723 rmap_write_protect(vcpu->kvm, gfn);
724 return sp;
725 }
726
727 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
728 struct kvm_mmu_page *sp)
729 {
730 unsigned i;
731 u64 *pt;
732 u64 ent;
733
734 pt = sp->spt;
735
736 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
737 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
738 if (is_shadow_present_pte(pt[i]))
739 rmap_remove(kvm, &pt[i]);
740 pt[i] = shadow_trap_nonpresent_pte;
741 }
742 kvm_flush_remote_tlbs(kvm);
743 return;
744 }
745
746 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
747 ent = pt[i];
748
749 pt[i] = shadow_trap_nonpresent_pte;
750 if (!is_shadow_present_pte(ent))
751 continue;
752 ent &= PT64_BASE_ADDR_MASK;
753 mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
754 }
755 kvm_flush_remote_tlbs(kvm);
756 }
757
758 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
759 {
760 mmu_page_remove_parent_pte(sp, parent_pte);
761 }
762
763 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
764 {
765 int i;
766
767 for (i = 0; i < KVM_MAX_VCPUS; ++i)
768 if (kvm->vcpus[i])
769 kvm->vcpus[i]->arch.last_pte_updated = NULL;
770 }
771
772 static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
773 {
774 u64 *parent_pte;
775
776 ++kvm->stat.mmu_shadow_zapped;
777 while (sp->multimapped || sp->parent_pte) {
778 if (!sp->multimapped)
779 parent_pte = sp->parent_pte;
780 else {
781 struct kvm_pte_chain *chain;
782
783 chain = container_of(sp->parent_ptes.first,
784 struct kvm_pte_chain, link);
785 parent_pte = chain->parent_ptes[0];
786 }
787 BUG_ON(!parent_pte);
788 kvm_mmu_put_page(sp, parent_pte);
789 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
790 }
791 kvm_mmu_page_unlink_children(kvm, sp);
792 if (!sp->root_count) {
793 hlist_del(&sp->hash_link);
794 kvm_mmu_free_page(kvm, sp);
795 } else
796 list_move(&sp->link, &kvm->arch.active_mmu_pages);
797 kvm_mmu_reset_last_pte_updated(kvm);
798 }
799
800 /*
801 * Changing the number of mmu pages allocated to the vm
802 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
803 */
804 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
805 {
806 /*
807 * If we set the number of mmu pages to be smaller be than the
808 * number of actived pages , we must to free some mmu pages before we
809 * change the value
810 */
811
812 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
813 kvm_nr_mmu_pages) {
814 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
815 - kvm->arch.n_free_mmu_pages;
816
817 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
818 struct kvm_mmu_page *page;
819
820 page = container_of(kvm->arch.active_mmu_pages.prev,
821 struct kvm_mmu_page, link);
822 kvm_mmu_zap_page(kvm, page);
823 n_used_mmu_pages--;
824 }
825 kvm->arch.n_free_mmu_pages = 0;
826 }
827 else
828 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
829 - kvm->arch.n_alloc_mmu_pages;
830
831 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
832 }
833
834 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
835 {
836 unsigned index;
837 struct hlist_head *bucket;
838 struct kvm_mmu_page *sp;
839 struct hlist_node *node, *n;
840 int r;
841
842 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
843 r = 0;
844 index = kvm_page_table_hashfn(gfn);
845 bucket = &kvm->arch.mmu_page_hash[index];
846 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
847 if (sp->gfn == gfn && !sp->role.metaphysical) {
848 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
849 sp->role.word);
850 kvm_mmu_zap_page(kvm, sp);
851 r = 1;
852 }
853 return r;
854 }
855
856 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
857 {
858 struct kvm_mmu_page *sp;
859
860 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
861 pgprintk("%s: zap %lx %x\n", __FUNCTION__, gfn, sp->role.word);
862 kvm_mmu_zap_page(kvm, sp);
863 }
864 }
865
866 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
867 {
868 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
869 struct kvm_mmu_page *sp = page_header(__pa(pte));
870
871 __set_bit(slot, &sp->slot_bitmap);
872 }
873
874 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
875 {
876 struct page *page;
877
878 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
879
880 if (gpa == UNMAPPED_GVA)
881 return NULL;
882
883 down_read(&current->mm->mmap_sem);
884 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
885 up_read(&current->mm->mmap_sem);
886
887 return page;
888 }
889
890 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
891 unsigned pt_access, unsigned pte_access,
892 int user_fault, int write_fault, int dirty,
893 int *ptwrite, gfn_t gfn, struct page *page)
894 {
895 u64 spte;
896 int was_rmapped = 0;
897 int was_writeble = is_writeble_pte(*shadow_pte);
898 hfn_t host_pfn = (*shadow_pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
899
900 pgprintk("%s: spte %llx access %x write_fault %d"
901 " user_fault %d gfn %lx\n",
902 __FUNCTION__, *shadow_pte, pt_access,
903 write_fault, user_fault, gfn);
904
905 if (is_rmap_pte(*shadow_pte)) {
906 if (host_pfn != page_to_pfn(page)) {
907 pgprintk("hfn old %lx new %lx\n",
908 host_pfn, page_to_pfn(page));
909 rmap_remove(vcpu->kvm, shadow_pte);
910 }
911 else
912 was_rmapped = 1;
913 }
914
915 /*
916 * We don't set the accessed bit, since we sometimes want to see
917 * whether the guest actually used the pte (in order to detect
918 * demand paging).
919 */
920 spte = PT_PRESENT_MASK | PT_DIRTY_MASK;
921 if (!dirty)
922 pte_access &= ~ACC_WRITE_MASK;
923 if (!(pte_access & ACC_EXEC_MASK))
924 spte |= PT64_NX_MASK;
925
926 spte |= PT_PRESENT_MASK;
927 if (pte_access & ACC_USER_MASK)
928 spte |= PT_USER_MASK;
929
930 spte |= page_to_phys(page);
931
932 if ((pte_access & ACC_WRITE_MASK)
933 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
934 struct kvm_mmu_page *shadow;
935
936 spte |= PT_WRITABLE_MASK;
937 if (user_fault) {
938 mmu_unshadow(vcpu->kvm, gfn);
939 goto unshadowed;
940 }
941
942 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
943 if (shadow) {
944 pgprintk("%s: found shadow page for %lx, marking ro\n",
945 __FUNCTION__, gfn);
946 pte_access &= ~ACC_WRITE_MASK;
947 if (is_writeble_pte(spte)) {
948 spte &= ~PT_WRITABLE_MASK;
949 kvm_x86_ops->tlb_flush(vcpu);
950 }
951 if (write_fault)
952 *ptwrite = 1;
953 }
954 }
955
956 unshadowed:
957
958 if (pte_access & ACC_WRITE_MASK)
959 mark_page_dirty(vcpu->kvm, gfn);
960
961 pgprintk("%s: setting spte %llx\n", __FUNCTION__, spte);
962 set_shadow_pte(shadow_pte, spte);
963 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
964 if (!was_rmapped) {
965 rmap_add(vcpu, shadow_pte, gfn);
966 if (!is_rmap_pte(*shadow_pte))
967 kvm_release_page_clean(page);
968 } else {
969 if (was_writeble)
970 kvm_release_page_dirty(page);
971 else
972 kvm_release_page_clean(page);
973 }
974 if (!ptwrite || !*ptwrite)
975 vcpu->arch.last_pte_updated = shadow_pte;
976 }
977
978 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
979 {
980 }
981
982 static int __nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write,
983 gfn_t gfn, struct page *page)
984 {
985 int level = PT32E_ROOT_LEVEL;
986 hpa_t table_addr = vcpu->arch.mmu.root_hpa;
987 int pt_write = 0;
988
989 for (; ; level--) {
990 u32 index = PT64_INDEX(v, level);
991 u64 *table;
992
993 ASSERT(VALID_PAGE(table_addr));
994 table = __va(table_addr);
995
996 if (level == 1) {
997 mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
998 0, write, 1, &pt_write, gfn, page);
999 return pt_write;
1000 }
1001
1002 if (table[index] == shadow_trap_nonpresent_pte) {
1003 struct kvm_mmu_page *new_table;
1004 gfn_t pseudo_gfn;
1005
1006 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
1007 >> PAGE_SHIFT;
1008 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
1009 v, level - 1,
1010 1, ACC_ALL, &table[index]);
1011 if (!new_table) {
1012 pgprintk("nonpaging_map: ENOMEM\n");
1013 kvm_release_page_clean(page);
1014 return -ENOMEM;
1015 }
1016
1017 table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
1018 | PT_WRITABLE_MASK | PT_USER_MASK;
1019 }
1020 table_addr = table[index] & PT64_BASE_ADDR_MASK;
1021 }
1022 }
1023
1024 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1025 {
1026 int r;
1027
1028 struct page *page;
1029
1030 down_read(&vcpu->kvm->slots_lock);
1031
1032 down_read(&current->mm->mmap_sem);
1033 page = gfn_to_page(vcpu->kvm, gfn);
1034 up_read(&current->mm->mmap_sem);
1035
1036 /* mmio */
1037 if (is_error_page(page)) {
1038 kvm_release_page_clean(page);
1039 up_read(&vcpu->kvm->slots_lock);
1040 return 1;
1041 }
1042
1043 spin_lock(&vcpu->kvm->mmu_lock);
1044 kvm_mmu_free_some_pages(vcpu);
1045 r = __nonpaging_map(vcpu, v, write, gfn, page);
1046 spin_unlock(&vcpu->kvm->mmu_lock);
1047
1048 up_read(&vcpu->kvm->slots_lock);
1049
1050 return r;
1051 }
1052
1053
1054 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1055 struct kvm_mmu_page *sp)
1056 {
1057 int i;
1058
1059 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1060 sp->spt[i] = shadow_trap_nonpresent_pte;
1061 }
1062
1063 static void mmu_free_roots(struct kvm_vcpu *vcpu)
1064 {
1065 int i;
1066 struct kvm_mmu_page *sp;
1067
1068 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1069 return;
1070 spin_lock(&vcpu->kvm->mmu_lock);
1071 #ifdef CONFIG_X86_64
1072 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1073 hpa_t root = vcpu->arch.mmu.root_hpa;
1074
1075 sp = page_header(root);
1076 --sp->root_count;
1077 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1078 spin_unlock(&vcpu->kvm->mmu_lock);
1079 return;
1080 }
1081 #endif
1082 for (i = 0; i < 4; ++i) {
1083 hpa_t root = vcpu->arch.mmu.pae_root[i];
1084
1085 if (root) {
1086 root &= PT64_BASE_ADDR_MASK;
1087 sp = page_header(root);
1088 --sp->root_count;
1089 }
1090 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
1091 }
1092 spin_unlock(&vcpu->kvm->mmu_lock);
1093 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1094 }
1095
1096 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1097 {
1098 int i;
1099 gfn_t root_gfn;
1100 struct kvm_mmu_page *sp;
1101
1102 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
1103
1104 #ifdef CONFIG_X86_64
1105 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1106 hpa_t root = vcpu->arch.mmu.root_hpa;
1107
1108 ASSERT(!VALID_PAGE(root));
1109 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
1110 PT64_ROOT_LEVEL, 0, ACC_ALL, NULL);
1111 root = __pa(sp->spt);
1112 ++sp->root_count;
1113 vcpu->arch.mmu.root_hpa = root;
1114 return;
1115 }
1116 #endif
1117 for (i = 0; i < 4; ++i) {
1118 hpa_t root = vcpu->arch.mmu.pae_root[i];
1119
1120 ASSERT(!VALID_PAGE(root));
1121 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1122 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1123 vcpu->arch.mmu.pae_root[i] = 0;
1124 continue;
1125 }
1126 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1127 } else if (vcpu->arch.mmu.root_level == 0)
1128 root_gfn = 0;
1129 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
1130 PT32_ROOT_LEVEL, !is_paging(vcpu),
1131 ACC_ALL, NULL);
1132 root = __pa(sp->spt);
1133 ++sp->root_count;
1134 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
1135 }
1136 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
1137 }
1138
1139 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1140 {
1141 return vaddr;
1142 }
1143
1144 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
1145 u32 error_code)
1146 {
1147 gfn_t gfn;
1148 int r;
1149
1150 pgprintk("%s: gva %lx error %x\n", __FUNCTION__, gva, error_code);
1151 r = mmu_topup_memory_caches(vcpu);
1152 if (r)
1153 return r;
1154
1155 ASSERT(vcpu);
1156 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
1157
1158 gfn = gva >> PAGE_SHIFT;
1159
1160 return nonpaging_map(vcpu, gva & PAGE_MASK,
1161 error_code & PFERR_WRITE_MASK, gfn);
1162 }
1163
1164 static void nonpaging_free(struct kvm_vcpu *vcpu)
1165 {
1166 mmu_free_roots(vcpu);
1167 }
1168
1169 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
1170 {
1171 struct kvm_mmu *context = &vcpu->arch.mmu;
1172
1173 context->new_cr3 = nonpaging_new_cr3;
1174 context->page_fault = nonpaging_page_fault;
1175 context->gva_to_gpa = nonpaging_gva_to_gpa;
1176 context->free = nonpaging_free;
1177 context->prefetch_page = nonpaging_prefetch_page;
1178 context->root_level = 0;
1179 context->shadow_root_level = PT32E_ROOT_LEVEL;
1180 context->root_hpa = INVALID_PAGE;
1181 return 0;
1182 }
1183
1184 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
1185 {
1186 ++vcpu->stat.tlb_flush;
1187 kvm_x86_ops->tlb_flush(vcpu);
1188 }
1189
1190 static void paging_new_cr3(struct kvm_vcpu *vcpu)
1191 {
1192 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->arch.cr3);
1193 mmu_free_roots(vcpu);
1194 }
1195
1196 static void inject_page_fault(struct kvm_vcpu *vcpu,
1197 u64 addr,
1198 u32 err_code)
1199 {
1200 kvm_inject_page_fault(vcpu, addr, err_code);
1201 }
1202
1203 static void paging_free(struct kvm_vcpu *vcpu)
1204 {
1205 nonpaging_free(vcpu);
1206 }
1207
1208 #define PTTYPE 64
1209 #include "paging_tmpl.h"
1210 #undef PTTYPE
1211
1212 #define PTTYPE 32
1213 #include "paging_tmpl.h"
1214 #undef PTTYPE
1215
1216 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
1217 {
1218 struct kvm_mmu *context = &vcpu->arch.mmu;
1219
1220 ASSERT(is_pae(vcpu));
1221 context->new_cr3 = paging_new_cr3;
1222 context->page_fault = paging64_page_fault;
1223 context->gva_to_gpa = paging64_gva_to_gpa;
1224 context->prefetch_page = paging64_prefetch_page;
1225 context->free = paging_free;
1226 context->root_level = level;
1227 context->shadow_root_level = level;
1228 context->root_hpa = INVALID_PAGE;
1229 return 0;
1230 }
1231
1232 static int paging64_init_context(struct kvm_vcpu *vcpu)
1233 {
1234 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1235 }
1236
1237 static int paging32_init_context(struct kvm_vcpu *vcpu)
1238 {
1239 struct kvm_mmu *context = &vcpu->arch.mmu;
1240
1241 context->new_cr3 = paging_new_cr3;
1242 context->page_fault = paging32_page_fault;
1243 context->gva_to_gpa = paging32_gva_to_gpa;
1244 context->free = paging_free;
1245 context->prefetch_page = paging32_prefetch_page;
1246 context->root_level = PT32_ROOT_LEVEL;
1247 context->shadow_root_level = PT32E_ROOT_LEVEL;
1248 context->root_hpa = INVALID_PAGE;
1249 return 0;
1250 }
1251
1252 static int paging32E_init_context(struct kvm_vcpu *vcpu)
1253 {
1254 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
1255 }
1256
1257 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1258 {
1259 ASSERT(vcpu);
1260 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
1261
1262 if (!is_paging(vcpu))
1263 return nonpaging_init_context(vcpu);
1264 else if (is_long_mode(vcpu))
1265 return paging64_init_context(vcpu);
1266 else if (is_pae(vcpu))
1267 return paging32E_init_context(vcpu);
1268 else
1269 return paging32_init_context(vcpu);
1270 }
1271
1272 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1273 {
1274 ASSERT(vcpu);
1275 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
1276 vcpu->arch.mmu.free(vcpu);
1277 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1278 }
1279 }
1280
1281 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
1282 {
1283 destroy_kvm_mmu(vcpu);
1284 return init_kvm_mmu(vcpu);
1285 }
1286 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
1287
1288 int kvm_mmu_load(struct kvm_vcpu *vcpu)
1289 {
1290 int r;
1291
1292 r = mmu_topup_memory_caches(vcpu);
1293 if (r)
1294 goto out;
1295 spin_lock(&vcpu->kvm->mmu_lock);
1296 kvm_mmu_free_some_pages(vcpu);
1297 mmu_alloc_roots(vcpu);
1298 spin_unlock(&vcpu->kvm->mmu_lock);
1299 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
1300 kvm_mmu_flush_tlb(vcpu);
1301 out:
1302 return r;
1303 }
1304 EXPORT_SYMBOL_GPL(kvm_mmu_load);
1305
1306 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
1307 {
1308 mmu_free_roots(vcpu);
1309 }
1310
1311 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
1312 struct kvm_mmu_page *sp,
1313 u64 *spte)
1314 {
1315 u64 pte;
1316 struct kvm_mmu_page *child;
1317
1318 pte = *spte;
1319 if (is_shadow_present_pte(pte)) {
1320 if (sp->role.level == PT_PAGE_TABLE_LEVEL)
1321 rmap_remove(vcpu->kvm, spte);
1322 else {
1323 child = page_header(pte & PT64_BASE_ADDR_MASK);
1324 mmu_page_remove_parent_pte(child, spte);
1325 }
1326 }
1327 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
1328 }
1329
1330 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
1331 struct kvm_mmu_page *sp,
1332 u64 *spte,
1333 const void *new)
1334 {
1335 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
1336 ++vcpu->kvm->stat.mmu_pde_zapped;
1337 return;
1338 }
1339
1340 ++vcpu->kvm->stat.mmu_pte_updated;
1341 if (sp->role.glevels == PT32_ROOT_LEVEL)
1342 paging32_update_pte(vcpu, sp, spte, new);
1343 else
1344 paging64_update_pte(vcpu, sp, spte, new);
1345 }
1346
1347 static bool need_remote_flush(u64 old, u64 new)
1348 {
1349 if (!is_shadow_present_pte(old))
1350 return false;
1351 if (!is_shadow_present_pte(new))
1352 return true;
1353 if ((old ^ new) & PT64_BASE_ADDR_MASK)
1354 return true;
1355 old ^= PT64_NX_MASK;
1356 new ^= PT64_NX_MASK;
1357 return (old & ~new & PT64_PERM_MASK) != 0;
1358 }
1359
1360 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
1361 {
1362 if (need_remote_flush(old, new))
1363 kvm_flush_remote_tlbs(vcpu->kvm);
1364 else
1365 kvm_mmu_flush_tlb(vcpu);
1366 }
1367
1368 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
1369 {
1370 u64 *spte = vcpu->arch.last_pte_updated;
1371
1372 return !!(spte && (*spte & PT_ACCESSED_MASK));
1373 }
1374
1375 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1376 const u8 *new, int bytes)
1377 {
1378 gfn_t gfn;
1379 int r;
1380 u64 gpte = 0;
1381 struct page *page;
1382
1383 if (bytes != 4 && bytes != 8)
1384 return;
1385
1386 /*
1387 * Assume that the pte write on a page table of the same type
1388 * as the current vcpu paging mode. This is nearly always true
1389 * (might be false while changing modes). Note it is verified later
1390 * by update_pte().
1391 */
1392 if (is_pae(vcpu)) {
1393 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
1394 if ((bytes == 4) && (gpa % 4 == 0)) {
1395 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
1396 if (r)
1397 return;
1398 memcpy((void *)&gpte + (gpa % 8), new, 4);
1399 } else if ((bytes == 8) && (gpa % 8 == 0)) {
1400 memcpy((void *)&gpte, new, 8);
1401 }
1402 } else {
1403 if ((bytes == 4) && (gpa % 4 == 0))
1404 memcpy((void *)&gpte, new, 4);
1405 }
1406 if (!is_present_pte(gpte))
1407 return;
1408 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
1409
1410 down_read(&vcpu->kvm->slots_lock);
1411 page = gfn_to_page(vcpu->kvm, gfn);
1412 up_read(&vcpu->kvm->slots_lock);
1413
1414 if (is_error_page(page)) {
1415 kvm_release_page_clean(page);
1416 return;
1417 }
1418 vcpu->arch.update_pte.gfn = gfn;
1419 vcpu->arch.update_pte.page = page;
1420 }
1421
1422 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1423 const u8 *new, int bytes)
1424 {
1425 gfn_t gfn = gpa >> PAGE_SHIFT;
1426 struct kvm_mmu_page *sp;
1427 struct hlist_node *node, *n;
1428 struct hlist_head *bucket;
1429 unsigned index;
1430 u64 entry, gentry;
1431 u64 *spte;
1432 unsigned offset = offset_in_page(gpa);
1433 unsigned pte_size;
1434 unsigned page_offset;
1435 unsigned misaligned;
1436 unsigned quadrant;
1437 int level;
1438 int flooded = 0;
1439 int npte;
1440 int r;
1441
1442 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
1443 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
1444 spin_lock(&vcpu->kvm->mmu_lock);
1445 kvm_mmu_free_some_pages(vcpu);
1446 ++vcpu->kvm->stat.mmu_pte_write;
1447 kvm_mmu_audit(vcpu, "pre pte write");
1448 if (gfn == vcpu->arch.last_pt_write_gfn
1449 && !last_updated_pte_accessed(vcpu)) {
1450 ++vcpu->arch.last_pt_write_count;
1451 if (vcpu->arch.last_pt_write_count >= 3)
1452 flooded = 1;
1453 } else {
1454 vcpu->arch.last_pt_write_gfn = gfn;
1455 vcpu->arch.last_pt_write_count = 1;
1456 vcpu->arch.last_pte_updated = NULL;
1457 }
1458 index = kvm_page_table_hashfn(gfn);
1459 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1460 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
1461 if (sp->gfn != gfn || sp->role.metaphysical)
1462 continue;
1463 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1464 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
1465 misaligned |= bytes < 4;
1466 if (misaligned || flooded) {
1467 /*
1468 * Misaligned accesses are too much trouble to fix
1469 * up; also, they usually indicate a page is not used
1470 * as a page table.
1471 *
1472 * If we're seeing too many writes to a page,
1473 * it may no longer be a page table, or we may be
1474 * forking, in which case it is better to unmap the
1475 * page.
1476 */
1477 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1478 gpa, bytes, sp->role.word);
1479 kvm_mmu_zap_page(vcpu->kvm, sp);
1480 ++vcpu->kvm->stat.mmu_flooded;
1481 continue;
1482 }
1483 page_offset = offset;
1484 level = sp->role.level;
1485 npte = 1;
1486 if (sp->role.glevels == PT32_ROOT_LEVEL) {
1487 page_offset <<= 1; /* 32->64 */
1488 /*
1489 * A 32-bit pde maps 4MB while the shadow pdes map
1490 * only 2MB. So we need to double the offset again
1491 * and zap two pdes instead of one.
1492 */
1493 if (level == PT32_ROOT_LEVEL) {
1494 page_offset &= ~7; /* kill rounding error */
1495 page_offset <<= 1;
1496 npte = 2;
1497 }
1498 quadrant = page_offset >> PAGE_SHIFT;
1499 page_offset &= ~PAGE_MASK;
1500 if (quadrant != sp->role.quadrant)
1501 continue;
1502 }
1503 spte = &sp->spt[page_offset / sizeof(*spte)];
1504 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
1505 gentry = 0;
1506 r = kvm_read_guest_atomic(vcpu->kvm,
1507 gpa & ~(u64)(pte_size - 1),
1508 &gentry, pte_size);
1509 new = (const void *)&gentry;
1510 if (r < 0)
1511 new = NULL;
1512 }
1513 while (npte--) {
1514 entry = *spte;
1515 mmu_pte_write_zap_pte(vcpu, sp, spte);
1516 if (new)
1517 mmu_pte_write_new_pte(vcpu, sp, spte, new);
1518 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
1519 ++spte;
1520 }
1521 }
1522 kvm_mmu_audit(vcpu, "post pte write");
1523 spin_unlock(&vcpu->kvm->mmu_lock);
1524 if (vcpu->arch.update_pte.page) {
1525 kvm_release_page_clean(vcpu->arch.update_pte.page);
1526 vcpu->arch.update_pte.page = NULL;
1527 }
1528 }
1529
1530 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1531 {
1532 gpa_t gpa;
1533 int r;
1534
1535 down_read(&vcpu->kvm->slots_lock);
1536 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1537 up_read(&vcpu->kvm->slots_lock);
1538
1539 spin_lock(&vcpu->kvm->mmu_lock);
1540 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1541 spin_unlock(&vcpu->kvm->mmu_lock);
1542 return r;
1543 }
1544
1545 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
1546 {
1547 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
1548 struct kvm_mmu_page *sp;
1549
1550 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
1551 struct kvm_mmu_page, link);
1552 kvm_mmu_zap_page(vcpu->kvm, sp);
1553 ++vcpu->kvm->stat.mmu_recycled;
1554 }
1555 }
1556
1557 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
1558 {
1559 int r;
1560 enum emulation_result er;
1561
1562 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
1563 if (r < 0)
1564 goto out;
1565
1566 if (!r) {
1567 r = 1;
1568 goto out;
1569 }
1570
1571 r = mmu_topup_memory_caches(vcpu);
1572 if (r)
1573 goto out;
1574
1575 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
1576
1577 switch (er) {
1578 case EMULATE_DONE:
1579 return 1;
1580 case EMULATE_DO_MMIO:
1581 ++vcpu->stat.mmio_exits;
1582 return 0;
1583 case EMULATE_FAIL:
1584 kvm_report_emulation_failure(vcpu, "pagetable");
1585 return 1;
1586 default:
1587 BUG();
1588 }
1589 out:
1590 return r;
1591 }
1592 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
1593
1594 void kvm_enable_tdp(void)
1595 {
1596 tdp_enabled = true;
1597 }
1598 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
1599
1600 static void free_mmu_pages(struct kvm_vcpu *vcpu)
1601 {
1602 struct kvm_mmu_page *sp;
1603
1604 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
1605 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
1606 struct kvm_mmu_page, link);
1607 kvm_mmu_zap_page(vcpu->kvm, sp);
1608 }
1609 free_page((unsigned long)vcpu->arch.mmu.pae_root);
1610 }
1611
1612 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1613 {
1614 struct page *page;
1615 int i;
1616
1617 ASSERT(vcpu);
1618
1619 if (vcpu->kvm->arch.n_requested_mmu_pages)
1620 vcpu->kvm->arch.n_free_mmu_pages =
1621 vcpu->kvm->arch.n_requested_mmu_pages;
1622 else
1623 vcpu->kvm->arch.n_free_mmu_pages =
1624 vcpu->kvm->arch.n_alloc_mmu_pages;
1625 /*
1626 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1627 * Therefore we need to allocate shadow page tables in the first
1628 * 4GB of memory, which happens to fit the DMA32 zone.
1629 */
1630 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1631 if (!page)
1632 goto error_1;
1633 vcpu->arch.mmu.pae_root = page_address(page);
1634 for (i = 0; i < 4; ++i)
1635 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
1636
1637 return 0;
1638
1639 error_1:
1640 free_mmu_pages(vcpu);
1641 return -ENOMEM;
1642 }
1643
1644 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1645 {
1646 ASSERT(vcpu);
1647 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
1648
1649 return alloc_mmu_pages(vcpu);
1650 }
1651
1652 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1653 {
1654 ASSERT(vcpu);
1655 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
1656
1657 return init_kvm_mmu(vcpu);
1658 }
1659
1660 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1661 {
1662 ASSERT(vcpu);
1663
1664 destroy_kvm_mmu(vcpu);
1665 free_mmu_pages(vcpu);
1666 mmu_free_memory_caches(vcpu);
1667 }
1668
1669 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
1670 {
1671 struct kvm_mmu_page *sp;
1672
1673 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
1674 int i;
1675 u64 *pt;
1676
1677 if (!test_bit(slot, &sp->slot_bitmap))
1678 continue;
1679
1680 pt = sp->spt;
1681 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1682 /* avoid RMW */
1683 if (pt[i] & PT_WRITABLE_MASK)
1684 pt[i] &= ~PT_WRITABLE_MASK;
1685 }
1686 }
1687
1688 void kvm_mmu_zap_all(struct kvm *kvm)
1689 {
1690 struct kvm_mmu_page *sp, *node;
1691
1692 spin_lock(&kvm->mmu_lock);
1693 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
1694 kvm_mmu_zap_page(kvm, sp);
1695 spin_unlock(&kvm->mmu_lock);
1696
1697 kvm_flush_remote_tlbs(kvm);
1698 }
1699
1700 void kvm_mmu_module_exit(void)
1701 {
1702 if (pte_chain_cache)
1703 kmem_cache_destroy(pte_chain_cache);
1704 if (rmap_desc_cache)
1705 kmem_cache_destroy(rmap_desc_cache);
1706 if (mmu_page_header_cache)
1707 kmem_cache_destroy(mmu_page_header_cache);
1708 }
1709
1710 int kvm_mmu_module_init(void)
1711 {
1712 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
1713 sizeof(struct kvm_pte_chain),
1714 0, 0, NULL);
1715 if (!pte_chain_cache)
1716 goto nomem;
1717 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
1718 sizeof(struct kvm_rmap_desc),
1719 0, 0, NULL);
1720 if (!rmap_desc_cache)
1721 goto nomem;
1722
1723 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
1724 sizeof(struct kvm_mmu_page),
1725 0, 0, NULL);
1726 if (!mmu_page_header_cache)
1727 goto nomem;
1728
1729 return 0;
1730
1731 nomem:
1732 kvm_mmu_module_exit();
1733 return -ENOMEM;
1734 }
1735
1736 /*
1737 * Caculate mmu pages needed for kvm.
1738 */
1739 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
1740 {
1741 int i;
1742 unsigned int nr_mmu_pages;
1743 unsigned int nr_pages = 0;
1744
1745 for (i = 0; i < kvm->nmemslots; i++)
1746 nr_pages += kvm->memslots[i].npages;
1747
1748 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
1749 nr_mmu_pages = max(nr_mmu_pages,
1750 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
1751
1752 return nr_mmu_pages;
1753 }
1754
1755 #ifdef AUDIT
1756
1757 static const char *audit_msg;
1758
1759 static gva_t canonicalize(gva_t gva)
1760 {
1761 #ifdef CONFIG_X86_64
1762 gva = (long long)(gva << 16) >> 16;
1763 #endif
1764 return gva;
1765 }
1766
1767 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1768 gva_t va, int level)
1769 {
1770 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1771 int i;
1772 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1773
1774 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1775 u64 ent = pt[i];
1776
1777 if (ent == shadow_trap_nonpresent_pte)
1778 continue;
1779
1780 va = canonicalize(va);
1781 if (level > 1) {
1782 if (ent == shadow_notrap_nonpresent_pte)
1783 printk(KERN_ERR "audit: (%s) nontrapping pte"
1784 " in nonleaf level: levels %d gva %lx"
1785 " level %d pte %llx\n", audit_msg,
1786 vcpu->arch.mmu.root_level, va, level, ent);
1787
1788 audit_mappings_page(vcpu, ent, va, level - 1);
1789 } else {
1790 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
1791 struct page *page = gpa_to_page(vcpu, gpa);
1792 hpa_t hpa = page_to_phys(page);
1793
1794 if (is_shadow_present_pte(ent)
1795 && (ent & PT64_BASE_ADDR_MASK) != hpa)
1796 printk(KERN_ERR "xx audit error: (%s) levels %d"
1797 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
1798 audit_msg, vcpu->arch.mmu.root_level,
1799 va, gpa, hpa, ent,
1800 is_shadow_present_pte(ent));
1801 else if (ent == shadow_notrap_nonpresent_pte
1802 && !is_error_hpa(hpa))
1803 printk(KERN_ERR "audit: (%s) notrap shadow,"
1804 " valid guest gva %lx\n", audit_msg, va);
1805 kvm_release_page_clean(page);
1806
1807 }
1808 }
1809 }
1810
1811 static void audit_mappings(struct kvm_vcpu *vcpu)
1812 {
1813 unsigned i;
1814
1815 if (vcpu->arch.mmu.root_level == 4)
1816 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
1817 else
1818 for (i = 0; i < 4; ++i)
1819 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
1820 audit_mappings_page(vcpu,
1821 vcpu->arch.mmu.pae_root[i],
1822 i << 30,
1823 2);
1824 }
1825
1826 static int count_rmaps(struct kvm_vcpu *vcpu)
1827 {
1828 int nmaps = 0;
1829 int i, j, k;
1830
1831 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1832 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1833 struct kvm_rmap_desc *d;
1834
1835 for (j = 0; j < m->npages; ++j) {
1836 unsigned long *rmapp = &m->rmap[j];
1837
1838 if (!*rmapp)
1839 continue;
1840 if (!(*rmapp & 1)) {
1841 ++nmaps;
1842 continue;
1843 }
1844 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
1845 while (d) {
1846 for (k = 0; k < RMAP_EXT; ++k)
1847 if (d->shadow_ptes[k])
1848 ++nmaps;
1849 else
1850 break;
1851 d = d->more;
1852 }
1853 }
1854 }
1855 return nmaps;
1856 }
1857
1858 static int count_writable_mappings(struct kvm_vcpu *vcpu)
1859 {
1860 int nmaps = 0;
1861 struct kvm_mmu_page *sp;
1862 int i;
1863
1864 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
1865 u64 *pt = sp->spt;
1866
1867 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
1868 continue;
1869
1870 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1871 u64 ent = pt[i];
1872
1873 if (!(ent & PT_PRESENT_MASK))
1874 continue;
1875 if (!(ent & PT_WRITABLE_MASK))
1876 continue;
1877 ++nmaps;
1878 }
1879 }
1880 return nmaps;
1881 }
1882
1883 static void audit_rmap(struct kvm_vcpu *vcpu)
1884 {
1885 int n_rmap = count_rmaps(vcpu);
1886 int n_actual = count_writable_mappings(vcpu);
1887
1888 if (n_rmap != n_actual)
1889 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1890 __FUNCTION__, audit_msg, n_rmap, n_actual);
1891 }
1892
1893 static void audit_write_protection(struct kvm_vcpu *vcpu)
1894 {
1895 struct kvm_mmu_page *sp;
1896 struct kvm_memory_slot *slot;
1897 unsigned long *rmapp;
1898 gfn_t gfn;
1899
1900 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
1901 if (sp->role.metaphysical)
1902 continue;
1903
1904 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
1905 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
1906 rmapp = &slot->rmap[gfn - slot->base_gfn];
1907 if (*rmapp)
1908 printk(KERN_ERR "%s: (%s) shadow page has writable"
1909 " mappings: gfn %lx role %x\n",
1910 __FUNCTION__, audit_msg, sp->gfn,
1911 sp->role.word);
1912 }
1913 }
1914
1915 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1916 {
1917 int olddbg = dbg;
1918
1919 dbg = 0;
1920 audit_msg = msg;
1921 audit_rmap(vcpu);
1922 audit_write_protection(vcpu);
1923 audit_mappings(vcpu);
1924 dbg = olddbg;
1925 }
1926
1927 #endif
Linux kernel - Deliverables
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