2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
23 #include "kvm_cache_regs.h"
25 #include <linux/kvm_host.h>
26 #include <linux/types.h>
27 #include <linux/string.h>
29 #include <linux/highmem.h>
30 #include <linux/module.h>
31 #include <linux/swap.h>
32 #include <linux/hugetlb.h>
33 #include <linux/compiler.h>
34 #include <linux/srcu.h>
35 #include <linux/slab.h>
36 #include <linux/uaccess.h>
39 #include <asm/cmpxchg.h>
44 * When setting this variable to true it enables Two-Dimensional-Paging
45 * where the hardware walks 2 page tables:
46 * 1. the guest-virtual to guest-physical
47 * 2. while doing 1. it walks guest-physical to host-physical
48 * If the hardware supports that we don't need to do shadow paging.
50 bool tdp_enabled
= false;
54 AUDIT_POST_PAGE_FAULT
,
61 char *audit_point_name
[] = {
74 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
75 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
79 #define pgprintk(x...) do { } while (0)
80 #define rmap_printk(x...) do { } while (0)
86 module_param(dbg
, bool, 0644);
89 static int oos_shadow
= 1;
90 module_param(oos_shadow
, bool, 0644);
93 #define ASSERT(x) do { } while (0)
97 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
98 __FILE__, __LINE__, #x); \
102 #define PTE_PREFETCH_NUM 8
104 #define PT_FIRST_AVAIL_BITS_SHIFT 9
105 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
107 #define PT64_LEVEL_BITS 9
109 #define PT64_LEVEL_SHIFT(level) \
110 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
112 #define PT64_LEVEL_MASK(level) \
113 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
115 #define PT64_INDEX(address, level)\
116 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
119 #define PT32_LEVEL_BITS 10
121 #define PT32_LEVEL_SHIFT(level) \
122 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
124 #define PT32_LEVEL_MASK(level) \
125 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
126 #define PT32_LVL_OFFSET_MASK(level) \
127 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
128 * PT32_LEVEL_BITS))) - 1))
130 #define PT32_INDEX(address, level)\
131 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
134 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
135 #define PT64_DIR_BASE_ADDR_MASK \
136 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
137 #define PT64_LVL_ADDR_MASK(level) \
138 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
139 * PT64_LEVEL_BITS))) - 1))
140 #define PT64_LVL_OFFSET_MASK(level) \
141 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
142 * PT64_LEVEL_BITS))) - 1))
144 #define PT32_BASE_ADDR_MASK PAGE_MASK
145 #define PT32_DIR_BASE_ADDR_MASK \
146 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
147 #define PT32_LVL_ADDR_MASK(level) \
148 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
149 * PT32_LEVEL_BITS))) - 1))
151 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
156 #define ACC_EXEC_MASK 1
157 #define ACC_WRITE_MASK PT_WRITABLE_MASK
158 #define ACC_USER_MASK PT_USER_MASK
159 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
161 #include <trace/events/kvm.h>
163 #define CREATE_TRACE_POINTS
164 #include "mmutrace.h"
166 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
168 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
170 struct kvm_rmap_desc
{
171 u64
*sptes
[RMAP_EXT
];
172 struct kvm_rmap_desc
*more
;
175 struct kvm_shadow_walk_iterator
{
183 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
184 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
185 shadow_walk_okay(&(_walker)); \
186 shadow_walk_next(&(_walker)))
188 typedef void (*mmu_parent_walk_fn
) (struct kvm_mmu_page
*sp
, u64
*spte
);
190 static struct kmem_cache
*pte_chain_cache
;
191 static struct kmem_cache
*rmap_desc_cache
;
192 static struct kmem_cache
*mmu_page_header_cache
;
193 static struct percpu_counter kvm_total_used_mmu_pages
;
195 static u64 __read_mostly shadow_trap_nonpresent_pte
;
196 static u64 __read_mostly shadow_notrap_nonpresent_pte
;
197 static u64 __read_mostly shadow_base_present_pte
;
198 static u64 __read_mostly shadow_nx_mask
;
199 static u64 __read_mostly shadow_x_mask
; /* mutual exclusive with nx_mask */
200 static u64 __read_mostly shadow_user_mask
;
201 static u64 __read_mostly shadow_accessed_mask
;
202 static u64 __read_mostly shadow_dirty_mask
;
204 static inline u64
rsvd_bits(int s
, int e
)
206 return ((1ULL << (e
- s
+ 1)) - 1) << s
;
209 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte
, u64 notrap_pte
)
211 shadow_trap_nonpresent_pte
= trap_pte
;
212 shadow_notrap_nonpresent_pte
= notrap_pte
;
214 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes
);
216 void kvm_mmu_set_base_ptes(u64 base_pte
)
218 shadow_base_present_pte
= base_pte
;
220 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes
);
222 void kvm_mmu_set_mask_ptes(u64 user_mask
, u64 accessed_mask
,
223 u64 dirty_mask
, u64 nx_mask
, u64 x_mask
)
225 shadow_user_mask
= user_mask
;
226 shadow_accessed_mask
= accessed_mask
;
227 shadow_dirty_mask
= dirty_mask
;
228 shadow_nx_mask
= nx_mask
;
229 shadow_x_mask
= x_mask
;
231 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes
);
233 static bool is_write_protection(struct kvm_vcpu
*vcpu
)
235 return kvm_read_cr0_bits(vcpu
, X86_CR0_WP
);
238 static int is_cpuid_PSE36(void)
243 static int is_nx(struct kvm_vcpu
*vcpu
)
245 return vcpu
->arch
.efer
& EFER_NX
;
248 static int is_shadow_present_pte(u64 pte
)
250 return pte
!= shadow_trap_nonpresent_pte
251 && pte
!= shadow_notrap_nonpresent_pte
;
254 static int is_large_pte(u64 pte
)
256 return pte
& PT_PAGE_SIZE_MASK
;
259 static int is_writable_pte(unsigned long pte
)
261 return pte
& PT_WRITABLE_MASK
;
264 static int is_dirty_gpte(unsigned long pte
)
266 return pte
& PT_DIRTY_MASK
;
269 static int is_rmap_spte(u64 pte
)
271 return is_shadow_present_pte(pte
);
274 static int is_last_spte(u64 pte
, int level
)
276 if (level
== PT_PAGE_TABLE_LEVEL
)
278 if (is_large_pte(pte
))
283 static pfn_t
spte_to_pfn(u64 pte
)
285 return (pte
& PT64_BASE_ADDR_MASK
) >> PAGE_SHIFT
;
288 static gfn_t
pse36_gfn_delta(u32 gpte
)
290 int shift
= 32 - PT32_DIR_PSE36_SHIFT
- PAGE_SHIFT
;
292 return (gpte
& PT32_DIR_PSE36_MASK
) << shift
;
295 static void __set_spte(u64
*sptep
, u64 spte
)
297 set_64bit(sptep
, spte
);
300 static u64
__xchg_spte(u64
*sptep
, u64 new_spte
)
303 return xchg(sptep
, new_spte
);
309 } while (cmpxchg64(sptep
, old_spte
, new_spte
) != old_spte
);
315 static bool spte_has_volatile_bits(u64 spte
)
317 if (!shadow_accessed_mask
)
320 if (!is_shadow_present_pte(spte
))
323 if ((spte
& shadow_accessed_mask
) &&
324 (!is_writable_pte(spte
) || (spte
& shadow_dirty_mask
)))
330 static bool spte_is_bit_cleared(u64 old_spte
, u64 new_spte
, u64 bit_mask
)
332 return (old_spte
& bit_mask
) && !(new_spte
& bit_mask
);
335 static void update_spte(u64
*sptep
, u64 new_spte
)
337 u64 mask
, old_spte
= *sptep
;
339 WARN_ON(!is_rmap_spte(new_spte
));
341 new_spte
|= old_spte
& shadow_dirty_mask
;
343 mask
= shadow_accessed_mask
;
344 if (is_writable_pte(old_spte
))
345 mask
|= shadow_dirty_mask
;
347 if (!spte_has_volatile_bits(old_spte
) || (new_spte
& mask
) == mask
)
348 __set_spte(sptep
, new_spte
);
350 old_spte
= __xchg_spte(sptep
, new_spte
);
352 if (!shadow_accessed_mask
)
355 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_accessed_mask
))
356 kvm_set_pfn_accessed(spte_to_pfn(old_spte
));
357 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_dirty_mask
))
358 kvm_set_pfn_dirty(spte_to_pfn(old_spte
));
361 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache
*cache
,
362 struct kmem_cache
*base_cache
, int min
)
366 if (cache
->nobjs
>= min
)
368 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
369 obj
= kmem_cache_zalloc(base_cache
, GFP_KERNEL
);
372 cache
->objects
[cache
->nobjs
++] = obj
;
377 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache
*mc
,
378 struct kmem_cache
*cache
)
381 kmem_cache_free(cache
, mc
->objects
[--mc
->nobjs
]);
384 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache
*cache
,
389 if (cache
->nobjs
>= min
)
391 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
392 page
= alloc_page(GFP_KERNEL
);
395 cache
->objects
[cache
->nobjs
++] = page_address(page
);
400 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache
*mc
)
403 free_page((unsigned long)mc
->objects
[--mc
->nobjs
]);
406 static int mmu_topup_memory_caches(struct kvm_vcpu
*vcpu
)
410 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_pte_chain_cache
,
414 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_rmap_desc_cache
,
415 rmap_desc_cache
, 4 + PTE_PREFETCH_NUM
);
418 r
= mmu_topup_memory_cache_page(&vcpu
->arch
.mmu_page_cache
, 8);
421 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
422 mmu_page_header_cache
, 4);
427 static void mmu_free_memory_caches(struct kvm_vcpu
*vcpu
)
429 mmu_free_memory_cache(&vcpu
->arch
.mmu_pte_chain_cache
, pte_chain_cache
);
430 mmu_free_memory_cache(&vcpu
->arch
.mmu_rmap_desc_cache
, rmap_desc_cache
);
431 mmu_free_memory_cache_page(&vcpu
->arch
.mmu_page_cache
);
432 mmu_free_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
433 mmu_page_header_cache
);
436 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache
*mc
,
442 p
= mc
->objects
[--mc
->nobjs
];
446 static struct kvm_pte_chain
*mmu_alloc_pte_chain(struct kvm_vcpu
*vcpu
)
448 return mmu_memory_cache_alloc(&vcpu
->arch
.mmu_pte_chain_cache
,
449 sizeof(struct kvm_pte_chain
));
452 static void mmu_free_pte_chain(struct kvm_pte_chain
*pc
)
454 kmem_cache_free(pte_chain_cache
, pc
);
457 static struct kvm_rmap_desc
*mmu_alloc_rmap_desc(struct kvm_vcpu
*vcpu
)
459 return mmu_memory_cache_alloc(&vcpu
->arch
.mmu_rmap_desc_cache
,
460 sizeof(struct kvm_rmap_desc
));
463 static void mmu_free_rmap_desc(struct kvm_rmap_desc
*rd
)
465 kmem_cache_free(rmap_desc_cache
, rd
);
468 static gfn_t
kvm_mmu_page_get_gfn(struct kvm_mmu_page
*sp
, int index
)
470 if (!sp
->role
.direct
)
471 return sp
->gfns
[index
];
473 return sp
->gfn
+ (index
<< ((sp
->role
.level
- 1) * PT64_LEVEL_BITS
));
476 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page
*sp
, int index
, gfn_t gfn
)
479 BUG_ON(gfn
!= kvm_mmu_page_get_gfn(sp
, index
));
481 sp
->gfns
[index
] = gfn
;
485 * Return the pointer to the largepage write count for a given
486 * gfn, handling slots that are not large page aligned.
488 static int *slot_largepage_idx(gfn_t gfn
,
489 struct kvm_memory_slot
*slot
,
494 idx
= (gfn
>> KVM_HPAGE_GFN_SHIFT(level
)) -
495 (slot
->base_gfn
>> KVM_HPAGE_GFN_SHIFT(level
));
496 return &slot
->lpage_info
[level
- 2][idx
].write_count
;
499 static void account_shadowed(struct kvm
*kvm
, gfn_t gfn
)
501 struct kvm_memory_slot
*slot
;
505 slot
= gfn_to_memslot(kvm
, gfn
);
506 for (i
= PT_DIRECTORY_LEVEL
;
507 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
508 write_count
= slot_largepage_idx(gfn
, slot
, i
);
513 static void unaccount_shadowed(struct kvm
*kvm
, gfn_t gfn
)
515 struct kvm_memory_slot
*slot
;
519 slot
= gfn_to_memslot(kvm
, gfn
);
520 for (i
= PT_DIRECTORY_LEVEL
;
521 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
522 write_count
= slot_largepage_idx(gfn
, slot
, i
);
524 WARN_ON(*write_count
< 0);
528 static int has_wrprotected_page(struct kvm
*kvm
,
532 struct kvm_memory_slot
*slot
;
535 slot
= gfn_to_memslot(kvm
, gfn
);
537 largepage_idx
= slot_largepage_idx(gfn
, slot
, level
);
538 return *largepage_idx
;
544 static int host_mapping_level(struct kvm
*kvm
, gfn_t gfn
)
546 unsigned long page_size
;
549 page_size
= kvm_host_page_size(kvm
, gfn
);
551 for (i
= PT_PAGE_TABLE_LEVEL
;
552 i
< (PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
); ++i
) {
553 if (page_size
>= KVM_HPAGE_SIZE(i
))
562 static int mapping_level(struct kvm_vcpu
*vcpu
, gfn_t large_gfn
)
564 struct kvm_memory_slot
*slot
;
565 int host_level
, level
, max_level
;
567 slot
= gfn_to_memslot(vcpu
->kvm
, large_gfn
);
568 if (slot
&& slot
->dirty_bitmap
)
569 return PT_PAGE_TABLE_LEVEL
;
571 host_level
= host_mapping_level(vcpu
->kvm
, large_gfn
);
573 if (host_level
== PT_PAGE_TABLE_LEVEL
)
576 max_level
= kvm_x86_ops
->get_lpage_level() < host_level
?
577 kvm_x86_ops
->get_lpage_level() : host_level
;
579 for (level
= PT_DIRECTORY_LEVEL
; level
<= max_level
; ++level
)
580 if (has_wrprotected_page(vcpu
->kvm
, large_gfn
, level
))
587 * Take gfn and return the reverse mapping to it.
590 static unsigned long *gfn_to_rmap(struct kvm
*kvm
, gfn_t gfn
, int level
)
592 struct kvm_memory_slot
*slot
;
595 slot
= gfn_to_memslot(kvm
, gfn
);
596 if (likely(level
== PT_PAGE_TABLE_LEVEL
))
597 return &slot
->rmap
[gfn
- slot
->base_gfn
];
599 idx
= (gfn
>> KVM_HPAGE_GFN_SHIFT(level
)) -
600 (slot
->base_gfn
>> KVM_HPAGE_GFN_SHIFT(level
));
602 return &slot
->lpage_info
[level
- 2][idx
].rmap_pde
;
606 * Reverse mapping data structures:
608 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
609 * that points to page_address(page).
611 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
612 * containing more mappings.
614 * Returns the number of rmap entries before the spte was added or zero if
615 * the spte was not added.
618 static int rmap_add(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
620 struct kvm_mmu_page
*sp
;
621 struct kvm_rmap_desc
*desc
;
622 unsigned long *rmapp
;
625 if (!is_rmap_spte(*spte
))
627 sp
= page_header(__pa(spte
));
628 kvm_mmu_page_set_gfn(sp
, spte
- sp
->spt
, gfn
);
629 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
->role
.level
);
631 rmap_printk("rmap_add: %p %llx 0->1\n", spte
, *spte
);
632 *rmapp
= (unsigned long)spte
;
633 } else if (!(*rmapp
& 1)) {
634 rmap_printk("rmap_add: %p %llx 1->many\n", spte
, *spte
);
635 desc
= mmu_alloc_rmap_desc(vcpu
);
636 desc
->sptes
[0] = (u64
*)*rmapp
;
637 desc
->sptes
[1] = spte
;
638 *rmapp
= (unsigned long)desc
| 1;
641 rmap_printk("rmap_add: %p %llx many->many\n", spte
, *spte
);
642 desc
= (struct kvm_rmap_desc
*)(*rmapp
& ~1ul);
643 while (desc
->sptes
[RMAP_EXT
-1] && desc
->more
) {
647 if (desc
->sptes
[RMAP_EXT
-1]) {
648 desc
->more
= mmu_alloc_rmap_desc(vcpu
);
651 for (i
= 0; desc
->sptes
[i
]; ++i
)
653 desc
->sptes
[i
] = spte
;
658 static void rmap_desc_remove_entry(unsigned long *rmapp
,
659 struct kvm_rmap_desc
*desc
,
661 struct kvm_rmap_desc
*prev_desc
)
665 for (j
= RMAP_EXT
- 1; !desc
->sptes
[j
] && j
> i
; --j
)
667 desc
->sptes
[i
] = desc
->sptes
[j
];
668 desc
->sptes
[j
] = NULL
;
671 if (!prev_desc
&& !desc
->more
)
672 *rmapp
= (unsigned long)desc
->sptes
[0];
675 prev_desc
->more
= desc
->more
;
677 *rmapp
= (unsigned long)desc
->more
| 1;
678 mmu_free_rmap_desc(desc
);
681 static void rmap_remove(struct kvm
*kvm
, u64
*spte
)
683 struct kvm_rmap_desc
*desc
;
684 struct kvm_rmap_desc
*prev_desc
;
685 struct kvm_mmu_page
*sp
;
687 unsigned long *rmapp
;
690 sp
= page_header(__pa(spte
));
691 gfn
= kvm_mmu_page_get_gfn(sp
, spte
- sp
->spt
);
692 rmapp
= gfn_to_rmap(kvm
, gfn
, sp
->role
.level
);
694 printk(KERN_ERR
"rmap_remove: %p 0->BUG\n", spte
);
696 } else if (!(*rmapp
& 1)) {
697 rmap_printk("rmap_remove: %p 1->0\n", spte
);
698 if ((u64
*)*rmapp
!= spte
) {
699 printk(KERN_ERR
"rmap_remove: %p 1->BUG\n", spte
);
704 rmap_printk("rmap_remove: %p many->many\n", spte
);
705 desc
= (struct kvm_rmap_desc
*)(*rmapp
& ~1ul);
708 for (i
= 0; i
< RMAP_EXT
&& desc
->sptes
[i
]; ++i
)
709 if (desc
->sptes
[i
] == spte
) {
710 rmap_desc_remove_entry(rmapp
,
718 pr_err("rmap_remove: %p many->many\n", spte
);
723 static int set_spte_track_bits(u64
*sptep
, u64 new_spte
)
726 u64 old_spte
= *sptep
;
728 if (!spte_has_volatile_bits(old_spte
))
729 __set_spte(sptep
, new_spte
);
731 old_spte
= __xchg_spte(sptep
, new_spte
);
733 if (!is_rmap_spte(old_spte
))
736 pfn
= spte_to_pfn(old_spte
);
737 if (!shadow_accessed_mask
|| old_spte
& shadow_accessed_mask
)
738 kvm_set_pfn_accessed(pfn
);
739 if (!shadow_dirty_mask
|| (old_spte
& shadow_dirty_mask
))
740 kvm_set_pfn_dirty(pfn
);
744 static void drop_spte(struct kvm
*kvm
, u64
*sptep
, u64 new_spte
)
746 if (set_spte_track_bits(sptep
, new_spte
))
747 rmap_remove(kvm
, sptep
);
750 static u64
*rmap_next(struct kvm
*kvm
, unsigned long *rmapp
, u64
*spte
)
752 struct kvm_rmap_desc
*desc
;
758 else if (!(*rmapp
& 1)) {
760 return (u64
*)*rmapp
;
763 desc
= (struct kvm_rmap_desc
*)(*rmapp
& ~1ul);
766 for (i
= 0; i
< RMAP_EXT
&& desc
->sptes
[i
]; ++i
) {
767 if (prev_spte
== spte
)
768 return desc
->sptes
[i
];
769 prev_spte
= desc
->sptes
[i
];
776 static int rmap_write_protect(struct kvm
*kvm
, u64 gfn
)
778 unsigned long *rmapp
;
780 int i
, write_protected
= 0;
782 rmapp
= gfn_to_rmap(kvm
, gfn
, PT_PAGE_TABLE_LEVEL
);
784 spte
= rmap_next(kvm
, rmapp
, NULL
);
787 BUG_ON(!(*spte
& PT_PRESENT_MASK
));
788 rmap_printk("rmap_write_protect: spte %p %llx\n", spte
, *spte
);
789 if (is_writable_pte(*spte
)) {
790 update_spte(spte
, *spte
& ~PT_WRITABLE_MASK
);
793 spte
= rmap_next(kvm
, rmapp
, spte
);
796 /* check for huge page mappings */
797 for (i
= PT_DIRECTORY_LEVEL
;
798 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
799 rmapp
= gfn_to_rmap(kvm
, gfn
, i
);
800 spte
= rmap_next(kvm
, rmapp
, NULL
);
803 BUG_ON(!(*spte
& PT_PRESENT_MASK
));
804 BUG_ON((*spte
& (PT_PAGE_SIZE_MASK
|PT_PRESENT_MASK
)) != (PT_PAGE_SIZE_MASK
|PT_PRESENT_MASK
));
805 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte
, *spte
, gfn
);
806 if (is_writable_pte(*spte
)) {
808 shadow_trap_nonpresent_pte
);
813 spte
= rmap_next(kvm
, rmapp
, spte
);
817 return write_protected
;
820 static int kvm_unmap_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
824 int need_tlb_flush
= 0;
826 while ((spte
= rmap_next(kvm
, rmapp
, NULL
))) {
827 BUG_ON(!(*spte
& PT_PRESENT_MASK
));
828 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte
, *spte
);
829 drop_spte(kvm
, spte
, shadow_trap_nonpresent_pte
);
832 return need_tlb_flush
;
835 static int kvm_set_pte_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
840 pte_t
*ptep
= (pte_t
*)data
;
843 WARN_ON(pte_huge(*ptep
));
844 new_pfn
= pte_pfn(*ptep
);
845 spte
= rmap_next(kvm
, rmapp
, NULL
);
847 BUG_ON(!is_shadow_present_pte(*spte
));
848 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte
, *spte
);
850 if (pte_write(*ptep
)) {
851 drop_spte(kvm
, spte
, shadow_trap_nonpresent_pte
);
852 spte
= rmap_next(kvm
, rmapp
, NULL
);
854 new_spte
= *spte
&~ (PT64_BASE_ADDR_MASK
);
855 new_spte
|= (u64
)new_pfn
<< PAGE_SHIFT
;
857 new_spte
&= ~PT_WRITABLE_MASK
;
858 new_spte
&= ~SPTE_HOST_WRITEABLE
;
859 new_spte
&= ~shadow_accessed_mask
;
860 set_spte_track_bits(spte
, new_spte
);
861 spte
= rmap_next(kvm
, rmapp
, spte
);
865 kvm_flush_remote_tlbs(kvm
);
870 static int kvm_handle_hva(struct kvm
*kvm
, unsigned long hva
,
872 int (*handler
)(struct kvm
*kvm
, unsigned long *rmapp
,
878 struct kvm_memslots
*slots
;
880 slots
= kvm_memslots(kvm
);
882 for (i
= 0; i
< slots
->nmemslots
; i
++) {
883 struct kvm_memory_slot
*memslot
= &slots
->memslots
[i
];
884 unsigned long start
= memslot
->userspace_addr
;
887 end
= start
+ (memslot
->npages
<< PAGE_SHIFT
);
888 if (hva
>= start
&& hva
< end
) {
889 gfn_t gfn_offset
= (hva
- start
) >> PAGE_SHIFT
;
891 ret
= handler(kvm
, &memslot
->rmap
[gfn_offset
], data
);
893 for (j
= 0; j
< KVM_NR_PAGE_SIZES
- 1; ++j
) {
897 sh
= KVM_HPAGE_GFN_SHIFT(PT_DIRECTORY_LEVEL
+j
);
898 idx
= ((memslot
->base_gfn
+gfn_offset
) >> sh
) -
899 (memslot
->base_gfn
>> sh
);
901 &memslot
->lpage_info
[j
][idx
].rmap_pde
,
904 trace_kvm_age_page(hva
, memslot
, ret
);
912 int kvm_unmap_hva(struct kvm
*kvm
, unsigned long hva
)
914 return kvm_handle_hva(kvm
, hva
, 0, kvm_unmap_rmapp
);
917 void kvm_set_spte_hva(struct kvm
*kvm
, unsigned long hva
, pte_t pte
)
919 kvm_handle_hva(kvm
, hva
, (unsigned long)&pte
, kvm_set_pte_rmapp
);
922 static int kvm_age_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
929 * Emulate the accessed bit for EPT, by checking if this page has
930 * an EPT mapping, and clearing it if it does. On the next access,
931 * a new EPT mapping will be established.
932 * This has some overhead, but not as much as the cost of swapping
933 * out actively used pages or breaking up actively used hugepages.
935 if (!shadow_accessed_mask
)
936 return kvm_unmap_rmapp(kvm
, rmapp
, data
);
938 spte
= rmap_next(kvm
, rmapp
, NULL
);
942 BUG_ON(!(_spte
& PT_PRESENT_MASK
));
943 _young
= _spte
& PT_ACCESSED_MASK
;
946 clear_bit(PT_ACCESSED_SHIFT
, (unsigned long *)spte
);
948 spte
= rmap_next(kvm
, rmapp
, spte
);
953 #define RMAP_RECYCLE_THRESHOLD 1000
955 static void rmap_recycle(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
957 unsigned long *rmapp
;
958 struct kvm_mmu_page
*sp
;
960 sp
= page_header(__pa(spte
));
962 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
->role
.level
);
964 kvm_unmap_rmapp(vcpu
->kvm
, rmapp
, 0);
965 kvm_flush_remote_tlbs(vcpu
->kvm
);
968 int kvm_age_hva(struct kvm
*kvm
, unsigned long hva
)
970 return kvm_handle_hva(kvm
, hva
, 0, kvm_age_rmapp
);
974 static int is_empty_shadow_page(u64
*spt
)
979 for (pos
= spt
, end
= pos
+ PAGE_SIZE
/ sizeof(u64
); pos
!= end
; pos
++)
980 if (is_shadow_present_pte(*pos
)) {
981 printk(KERN_ERR
"%s: %p %llx\n", __func__
,
990 * This value is the sum of all of the kvm instances's
991 * kvm->arch.n_used_mmu_pages values. We need a global,
992 * aggregate version in order to make the slab shrinker
995 static inline void kvm_mod_used_mmu_pages(struct kvm
*kvm
, int nr
)
997 kvm
->arch
.n_used_mmu_pages
+= nr
;
998 percpu_counter_add(&kvm_total_used_mmu_pages
, nr
);
1001 static void kvm_mmu_free_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1003 ASSERT(is_empty_shadow_page(sp
->spt
));
1004 hlist_del(&sp
->hash_link
);
1005 list_del(&sp
->link
);
1006 __free_page(virt_to_page(sp
->spt
));
1007 if (!sp
->role
.direct
)
1008 __free_page(virt_to_page(sp
->gfns
));
1009 kmem_cache_free(mmu_page_header_cache
, sp
);
1010 kvm_mod_used_mmu_pages(kvm
, -1);
1013 static unsigned kvm_page_table_hashfn(gfn_t gfn
)
1015 return gfn
& ((1 << KVM_MMU_HASH_SHIFT
) - 1);
1018 static struct kvm_mmu_page
*kvm_mmu_alloc_page(struct kvm_vcpu
*vcpu
,
1019 u64
*parent_pte
, int direct
)
1021 struct kvm_mmu_page
*sp
;
1023 sp
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_header_cache
, sizeof *sp
);
1024 sp
->spt
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
, PAGE_SIZE
);
1026 sp
->gfns
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
,
1028 set_page_private(virt_to_page(sp
->spt
), (unsigned long)sp
);
1029 list_add(&sp
->link
, &vcpu
->kvm
->arch
.active_mmu_pages
);
1030 bitmap_zero(sp
->slot_bitmap
, KVM_MEMORY_SLOTS
+ KVM_PRIVATE_MEM_SLOTS
);
1031 sp
->multimapped
= 0;
1032 sp
->parent_pte
= parent_pte
;
1033 kvm_mod_used_mmu_pages(vcpu
->kvm
, +1);
1037 static void mmu_page_add_parent_pte(struct kvm_vcpu
*vcpu
,
1038 struct kvm_mmu_page
*sp
, u64
*parent_pte
)
1040 struct kvm_pte_chain
*pte_chain
;
1041 struct hlist_node
*node
;
1046 if (!sp
->multimapped
) {
1047 u64
*old
= sp
->parent_pte
;
1050 sp
->parent_pte
= parent_pte
;
1053 sp
->multimapped
= 1;
1054 pte_chain
= mmu_alloc_pte_chain(vcpu
);
1055 INIT_HLIST_HEAD(&sp
->parent_ptes
);
1056 hlist_add_head(&pte_chain
->link
, &sp
->parent_ptes
);
1057 pte_chain
->parent_ptes
[0] = old
;
1059 hlist_for_each_entry(pte_chain
, node
, &sp
->parent_ptes
, link
) {
1060 if (pte_chain
->parent_ptes
[NR_PTE_CHAIN_ENTRIES
-1])
1062 for (i
= 0; i
< NR_PTE_CHAIN_ENTRIES
; ++i
)
1063 if (!pte_chain
->parent_ptes
[i
]) {
1064 pte_chain
->parent_ptes
[i
] = parent_pte
;
1068 pte_chain
= mmu_alloc_pte_chain(vcpu
);
1070 hlist_add_head(&pte_chain
->link
, &sp
->parent_ptes
);
1071 pte_chain
->parent_ptes
[0] = parent_pte
;
1074 static void mmu_page_remove_parent_pte(struct kvm_mmu_page
*sp
,
1077 struct kvm_pte_chain
*pte_chain
;
1078 struct hlist_node
*node
;
1081 if (!sp
->multimapped
) {
1082 BUG_ON(sp
->parent_pte
!= parent_pte
);
1083 sp
->parent_pte
= NULL
;
1086 hlist_for_each_entry(pte_chain
, node
, &sp
->parent_ptes
, link
)
1087 for (i
= 0; i
< NR_PTE_CHAIN_ENTRIES
; ++i
) {
1088 if (!pte_chain
->parent_ptes
[i
])
1090 if (pte_chain
->parent_ptes
[i
] != parent_pte
)
1092 while (i
+ 1 < NR_PTE_CHAIN_ENTRIES
1093 && pte_chain
->parent_ptes
[i
+ 1]) {
1094 pte_chain
->parent_ptes
[i
]
1095 = pte_chain
->parent_ptes
[i
+ 1];
1098 pte_chain
->parent_ptes
[i
] = NULL
;
1100 hlist_del(&pte_chain
->link
);
1101 mmu_free_pte_chain(pte_chain
);
1102 if (hlist_empty(&sp
->parent_ptes
)) {
1103 sp
->multimapped
= 0;
1104 sp
->parent_pte
= NULL
;
1112 static void mmu_parent_walk(struct kvm_mmu_page
*sp
, mmu_parent_walk_fn fn
)
1114 struct kvm_pte_chain
*pte_chain
;
1115 struct hlist_node
*node
;
1116 struct kvm_mmu_page
*parent_sp
;
1119 if (!sp
->multimapped
&& sp
->parent_pte
) {
1120 parent_sp
= page_header(__pa(sp
->parent_pte
));
1121 fn(parent_sp
, sp
->parent_pte
);
1125 hlist_for_each_entry(pte_chain
, node
, &sp
->parent_ptes
, link
)
1126 for (i
= 0; i
< NR_PTE_CHAIN_ENTRIES
; ++i
) {
1127 u64
*spte
= pte_chain
->parent_ptes
[i
];
1131 parent_sp
= page_header(__pa(spte
));
1132 fn(parent_sp
, spte
);
1136 static void mark_unsync(struct kvm_mmu_page
*sp
, u64
*spte
);
1137 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page
*sp
)
1139 mmu_parent_walk(sp
, mark_unsync
);
1142 static void mark_unsync(struct kvm_mmu_page
*sp
, u64
*spte
)
1146 index
= spte
- sp
->spt
;
1147 if (__test_and_set_bit(index
, sp
->unsync_child_bitmap
))
1149 if (sp
->unsync_children
++)
1151 kvm_mmu_mark_parents_unsync(sp
);
1154 static void nonpaging_prefetch_page(struct kvm_vcpu
*vcpu
,
1155 struct kvm_mmu_page
*sp
)
1159 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
1160 sp
->spt
[i
] = shadow_trap_nonpresent_pte
;
1163 static int nonpaging_sync_page(struct kvm_vcpu
*vcpu
,
1164 struct kvm_mmu_page
*sp
, bool clear_unsync
)
1169 static void nonpaging_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
1173 #define KVM_PAGE_ARRAY_NR 16
1175 struct kvm_mmu_pages
{
1176 struct mmu_page_and_offset
{
1177 struct kvm_mmu_page
*sp
;
1179 } page
[KVM_PAGE_ARRAY_NR
];
1183 #define for_each_unsync_children(bitmap, idx) \
1184 for (idx = find_first_bit(bitmap, 512); \
1186 idx = find_next_bit(bitmap, 512, idx+1))
1188 static int mmu_pages_add(struct kvm_mmu_pages
*pvec
, struct kvm_mmu_page
*sp
,
1194 for (i
=0; i
< pvec
->nr
; i
++)
1195 if (pvec
->page
[i
].sp
== sp
)
1198 pvec
->page
[pvec
->nr
].sp
= sp
;
1199 pvec
->page
[pvec
->nr
].idx
= idx
;
1201 return (pvec
->nr
== KVM_PAGE_ARRAY_NR
);
1204 static int __mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1205 struct kvm_mmu_pages
*pvec
)
1207 int i
, ret
, nr_unsync_leaf
= 0;
1209 for_each_unsync_children(sp
->unsync_child_bitmap
, i
) {
1210 struct kvm_mmu_page
*child
;
1211 u64 ent
= sp
->spt
[i
];
1213 if (!is_shadow_present_pte(ent
) || is_large_pte(ent
))
1214 goto clear_child_bitmap
;
1216 child
= page_header(ent
& PT64_BASE_ADDR_MASK
);
1218 if (child
->unsync_children
) {
1219 if (mmu_pages_add(pvec
, child
, i
))
1222 ret
= __mmu_unsync_walk(child
, pvec
);
1224 goto clear_child_bitmap
;
1226 nr_unsync_leaf
+= ret
;
1229 } else if (child
->unsync
) {
1231 if (mmu_pages_add(pvec
, child
, i
))
1234 goto clear_child_bitmap
;
1239 __clear_bit(i
, sp
->unsync_child_bitmap
);
1240 sp
->unsync_children
--;
1241 WARN_ON((int)sp
->unsync_children
< 0);
1245 return nr_unsync_leaf
;
1248 static int mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1249 struct kvm_mmu_pages
*pvec
)
1251 if (!sp
->unsync_children
)
1254 mmu_pages_add(pvec
, sp
, 0);
1255 return __mmu_unsync_walk(sp
, pvec
);
1258 static void kvm_unlink_unsync_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1260 WARN_ON(!sp
->unsync
);
1261 trace_kvm_mmu_sync_page(sp
);
1263 --kvm
->stat
.mmu_unsync
;
1266 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
1267 struct list_head
*invalid_list
);
1268 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
1269 struct list_head
*invalid_list
);
1271 #define for_each_gfn_sp(kvm, sp, gfn, pos) \
1272 hlist_for_each_entry(sp, pos, \
1273 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1274 if ((sp)->gfn != (gfn)) {} else
1276 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos) \
1277 hlist_for_each_entry(sp, pos, \
1278 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1279 if ((sp)->gfn != (gfn) || (sp)->role.direct || \
1280 (sp)->role.invalid) {} else
1282 /* @sp->gfn should be write-protected at the call site */
1283 static int __kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1284 struct list_head
*invalid_list
, bool clear_unsync
)
1286 if (sp
->role
.cr4_pae
!= !!is_pae(vcpu
)) {
1287 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1292 kvm_unlink_unsync_page(vcpu
->kvm
, sp
);
1294 if (vcpu
->arch
.mmu
.sync_page(vcpu
, sp
, clear_unsync
)) {
1295 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1299 kvm_mmu_flush_tlb(vcpu
);
1303 static int kvm_sync_page_transient(struct kvm_vcpu
*vcpu
,
1304 struct kvm_mmu_page
*sp
)
1306 LIST_HEAD(invalid_list
);
1309 ret
= __kvm_sync_page(vcpu
, sp
, &invalid_list
, false);
1311 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1316 static int kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1317 struct list_head
*invalid_list
)
1319 return __kvm_sync_page(vcpu
, sp
, invalid_list
, true);
1322 /* @gfn should be write-protected at the call site */
1323 static void kvm_sync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
1325 struct kvm_mmu_page
*s
;
1326 struct hlist_node
*node
;
1327 LIST_HEAD(invalid_list
);
1330 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
, node
) {
1334 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
1335 if ((s
->role
.cr4_pae
!= !!is_pae(vcpu
)) ||
1336 (vcpu
->arch
.mmu
.sync_page(vcpu
, s
, true))) {
1337 kvm_mmu_prepare_zap_page(vcpu
->kvm
, s
, &invalid_list
);
1340 kvm_unlink_unsync_page(vcpu
->kvm
, s
);
1344 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1346 kvm_mmu_flush_tlb(vcpu
);
1349 struct mmu_page_path
{
1350 struct kvm_mmu_page
*parent
[PT64_ROOT_LEVEL
-1];
1351 unsigned int idx
[PT64_ROOT_LEVEL
-1];
1354 #define for_each_sp(pvec, sp, parents, i) \
1355 for (i = mmu_pages_next(&pvec, &parents, -1), \
1356 sp = pvec.page[i].sp; \
1357 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1358 i = mmu_pages_next(&pvec, &parents, i))
1360 static int mmu_pages_next(struct kvm_mmu_pages
*pvec
,
1361 struct mmu_page_path
*parents
,
1366 for (n
= i
+1; n
< pvec
->nr
; n
++) {
1367 struct kvm_mmu_page
*sp
= pvec
->page
[n
].sp
;
1369 if (sp
->role
.level
== PT_PAGE_TABLE_LEVEL
) {
1370 parents
->idx
[0] = pvec
->page
[n
].idx
;
1374 parents
->parent
[sp
->role
.level
-2] = sp
;
1375 parents
->idx
[sp
->role
.level
-1] = pvec
->page
[n
].idx
;
1381 static void mmu_pages_clear_parents(struct mmu_page_path
*parents
)
1383 struct kvm_mmu_page
*sp
;
1384 unsigned int level
= 0;
1387 unsigned int idx
= parents
->idx
[level
];
1389 sp
= parents
->parent
[level
];
1393 --sp
->unsync_children
;
1394 WARN_ON((int)sp
->unsync_children
< 0);
1395 __clear_bit(idx
, sp
->unsync_child_bitmap
);
1397 } while (level
< PT64_ROOT_LEVEL
-1 && !sp
->unsync_children
);
1400 static void kvm_mmu_pages_init(struct kvm_mmu_page
*parent
,
1401 struct mmu_page_path
*parents
,
1402 struct kvm_mmu_pages
*pvec
)
1404 parents
->parent
[parent
->role
.level
-1] = NULL
;
1408 static void mmu_sync_children(struct kvm_vcpu
*vcpu
,
1409 struct kvm_mmu_page
*parent
)
1412 struct kvm_mmu_page
*sp
;
1413 struct mmu_page_path parents
;
1414 struct kvm_mmu_pages pages
;
1415 LIST_HEAD(invalid_list
);
1417 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1418 while (mmu_unsync_walk(parent
, &pages
)) {
1421 for_each_sp(pages
, sp
, parents
, i
)
1422 protected |= rmap_write_protect(vcpu
->kvm
, sp
->gfn
);
1425 kvm_flush_remote_tlbs(vcpu
->kvm
);
1427 for_each_sp(pages
, sp
, parents
, i
) {
1428 kvm_sync_page(vcpu
, sp
, &invalid_list
);
1429 mmu_pages_clear_parents(&parents
);
1431 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1432 cond_resched_lock(&vcpu
->kvm
->mmu_lock
);
1433 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1437 static struct kvm_mmu_page
*kvm_mmu_get_page(struct kvm_vcpu
*vcpu
,
1445 union kvm_mmu_page_role role
;
1447 struct kvm_mmu_page
*sp
;
1448 struct hlist_node
*node
;
1449 bool need_sync
= false;
1451 role
= vcpu
->arch
.mmu
.base_role
;
1453 role
.direct
= direct
;
1456 role
.access
= access
;
1457 if (!vcpu
->arch
.mmu
.direct_map
1458 && vcpu
->arch
.mmu
.root_level
<= PT32_ROOT_LEVEL
) {
1459 quadrant
= gaddr
>> (PAGE_SHIFT
+ (PT64_PT_BITS
* level
));
1460 quadrant
&= (1 << ((PT32_PT_BITS
- PT64_PT_BITS
) * level
)) - 1;
1461 role
.quadrant
= quadrant
;
1463 for_each_gfn_sp(vcpu
->kvm
, sp
, gfn
, node
) {
1464 if (!need_sync
&& sp
->unsync
)
1467 if (sp
->role
.word
!= role
.word
)
1470 if (sp
->unsync
&& kvm_sync_page_transient(vcpu
, sp
))
1473 mmu_page_add_parent_pte(vcpu
, sp
, parent_pte
);
1474 if (sp
->unsync_children
) {
1475 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
1476 kvm_mmu_mark_parents_unsync(sp
);
1477 } else if (sp
->unsync
)
1478 kvm_mmu_mark_parents_unsync(sp
);
1480 trace_kvm_mmu_get_page(sp
, false);
1483 ++vcpu
->kvm
->stat
.mmu_cache_miss
;
1484 sp
= kvm_mmu_alloc_page(vcpu
, parent_pte
, direct
);
1489 hlist_add_head(&sp
->hash_link
,
1490 &vcpu
->kvm
->arch
.mmu_page_hash
[kvm_page_table_hashfn(gfn
)]);
1492 if (rmap_write_protect(vcpu
->kvm
, gfn
))
1493 kvm_flush_remote_tlbs(vcpu
->kvm
);
1494 if (level
> PT_PAGE_TABLE_LEVEL
&& need_sync
)
1495 kvm_sync_pages(vcpu
, gfn
);
1497 account_shadowed(vcpu
->kvm
, gfn
);
1499 if (shadow_trap_nonpresent_pte
!= shadow_notrap_nonpresent_pte
)
1500 vcpu
->arch
.mmu
.prefetch_page(vcpu
, sp
);
1502 nonpaging_prefetch_page(vcpu
, sp
);
1503 trace_kvm_mmu_get_page(sp
, true);
1507 static void shadow_walk_init(struct kvm_shadow_walk_iterator
*iterator
,
1508 struct kvm_vcpu
*vcpu
, u64 addr
)
1510 iterator
->addr
= addr
;
1511 iterator
->shadow_addr
= vcpu
->arch
.mmu
.root_hpa
;
1512 iterator
->level
= vcpu
->arch
.mmu
.shadow_root_level
;
1514 if (iterator
->level
== PT64_ROOT_LEVEL
&&
1515 vcpu
->arch
.mmu
.root_level
< PT64_ROOT_LEVEL
&&
1516 !vcpu
->arch
.mmu
.direct_map
)
1519 if (iterator
->level
== PT32E_ROOT_LEVEL
) {
1520 iterator
->shadow_addr
1521 = vcpu
->arch
.mmu
.pae_root
[(addr
>> 30) & 3];
1522 iterator
->shadow_addr
&= PT64_BASE_ADDR_MASK
;
1524 if (!iterator
->shadow_addr
)
1525 iterator
->level
= 0;
1529 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator
*iterator
)
1531 if (iterator
->level
< PT_PAGE_TABLE_LEVEL
)
1534 if (iterator
->level
== PT_PAGE_TABLE_LEVEL
)
1535 if (is_large_pte(*iterator
->sptep
))
1538 iterator
->index
= SHADOW_PT_INDEX(iterator
->addr
, iterator
->level
);
1539 iterator
->sptep
= ((u64
*)__va(iterator
->shadow_addr
)) + iterator
->index
;
1543 static void shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
)
1545 iterator
->shadow_addr
= *iterator
->sptep
& PT64_BASE_ADDR_MASK
;
1549 static void link_shadow_page(u64
*sptep
, struct kvm_mmu_page
*sp
)
1553 spte
= __pa(sp
->spt
)
1554 | PT_PRESENT_MASK
| PT_ACCESSED_MASK
1555 | PT_WRITABLE_MASK
| PT_USER_MASK
;
1556 __set_spte(sptep
, spte
);
1559 static void drop_large_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
)
1561 if (is_large_pte(*sptep
)) {
1562 drop_spte(vcpu
->kvm
, sptep
, shadow_trap_nonpresent_pte
);
1563 kvm_flush_remote_tlbs(vcpu
->kvm
);
1567 static void validate_direct_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
1568 unsigned direct_access
)
1570 if (is_shadow_present_pte(*sptep
) && !is_large_pte(*sptep
)) {
1571 struct kvm_mmu_page
*child
;
1574 * For the direct sp, if the guest pte's dirty bit
1575 * changed form clean to dirty, it will corrupt the
1576 * sp's access: allow writable in the read-only sp,
1577 * so we should update the spte at this point to get
1578 * a new sp with the correct access.
1580 child
= page_header(*sptep
& PT64_BASE_ADDR_MASK
);
1581 if (child
->role
.access
== direct_access
)
1584 mmu_page_remove_parent_pte(child
, sptep
);
1585 __set_spte(sptep
, shadow_trap_nonpresent_pte
);
1586 kvm_flush_remote_tlbs(vcpu
->kvm
);
1590 static void kvm_mmu_page_unlink_children(struct kvm
*kvm
,
1591 struct kvm_mmu_page
*sp
)
1599 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
) {
1602 if (is_shadow_present_pte(ent
)) {
1603 if (!is_last_spte(ent
, sp
->role
.level
)) {
1604 ent
&= PT64_BASE_ADDR_MASK
;
1605 mmu_page_remove_parent_pte(page_header(ent
),
1608 if (is_large_pte(ent
))
1610 drop_spte(kvm
, &pt
[i
],
1611 shadow_trap_nonpresent_pte
);
1614 pt
[i
] = shadow_trap_nonpresent_pte
;
1618 static void kvm_mmu_put_page(struct kvm_mmu_page
*sp
, u64
*parent_pte
)
1620 mmu_page_remove_parent_pte(sp
, parent_pte
);
1623 static void kvm_mmu_reset_last_pte_updated(struct kvm
*kvm
)
1626 struct kvm_vcpu
*vcpu
;
1628 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1629 vcpu
->arch
.last_pte_updated
= NULL
;
1632 static void kvm_mmu_unlink_parents(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1636 while (sp
->multimapped
|| sp
->parent_pte
) {
1637 if (!sp
->multimapped
)
1638 parent_pte
= sp
->parent_pte
;
1640 struct kvm_pte_chain
*chain
;
1642 chain
= container_of(sp
->parent_ptes
.first
,
1643 struct kvm_pte_chain
, link
);
1644 parent_pte
= chain
->parent_ptes
[0];
1646 BUG_ON(!parent_pte
);
1647 kvm_mmu_put_page(sp
, parent_pte
);
1648 __set_spte(parent_pte
, shadow_trap_nonpresent_pte
);
1652 static int mmu_zap_unsync_children(struct kvm
*kvm
,
1653 struct kvm_mmu_page
*parent
,
1654 struct list_head
*invalid_list
)
1657 struct mmu_page_path parents
;
1658 struct kvm_mmu_pages pages
;
1660 if (parent
->role
.level
== PT_PAGE_TABLE_LEVEL
)
1663 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1664 while (mmu_unsync_walk(parent
, &pages
)) {
1665 struct kvm_mmu_page
*sp
;
1667 for_each_sp(pages
, sp
, parents
, i
) {
1668 kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
);
1669 mmu_pages_clear_parents(&parents
);
1672 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1678 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
1679 struct list_head
*invalid_list
)
1683 trace_kvm_mmu_prepare_zap_page(sp
);
1684 ++kvm
->stat
.mmu_shadow_zapped
;
1685 ret
= mmu_zap_unsync_children(kvm
, sp
, invalid_list
);
1686 kvm_mmu_page_unlink_children(kvm
, sp
);
1687 kvm_mmu_unlink_parents(kvm
, sp
);
1688 if (!sp
->role
.invalid
&& !sp
->role
.direct
)
1689 unaccount_shadowed(kvm
, sp
->gfn
);
1691 kvm_unlink_unsync_page(kvm
, sp
);
1692 if (!sp
->root_count
) {
1695 list_move(&sp
->link
, invalid_list
);
1697 list_move(&sp
->link
, &kvm
->arch
.active_mmu_pages
);
1698 kvm_reload_remote_mmus(kvm
);
1701 sp
->role
.invalid
= 1;
1702 kvm_mmu_reset_last_pte_updated(kvm
);
1706 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
1707 struct list_head
*invalid_list
)
1709 struct kvm_mmu_page
*sp
;
1711 if (list_empty(invalid_list
))
1714 kvm_flush_remote_tlbs(kvm
);
1717 sp
= list_first_entry(invalid_list
, struct kvm_mmu_page
, link
);
1718 WARN_ON(!sp
->role
.invalid
|| sp
->root_count
);
1719 kvm_mmu_free_page(kvm
, sp
);
1720 } while (!list_empty(invalid_list
));
1725 * Changing the number of mmu pages allocated to the vm
1726 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
1728 void kvm_mmu_change_mmu_pages(struct kvm
*kvm
, unsigned int goal_nr_mmu_pages
)
1730 LIST_HEAD(invalid_list
);
1732 * If we set the number of mmu pages to be smaller be than the
1733 * number of actived pages , we must to free some mmu pages before we
1737 if (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
) {
1738 while (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
&&
1739 !list_empty(&kvm
->arch
.active_mmu_pages
)) {
1740 struct kvm_mmu_page
*page
;
1742 page
= container_of(kvm
->arch
.active_mmu_pages
.prev
,
1743 struct kvm_mmu_page
, link
);
1744 kvm_mmu_prepare_zap_page(kvm
, page
, &invalid_list
);
1745 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
1747 goal_nr_mmu_pages
= kvm
->arch
.n_used_mmu_pages
;
1750 kvm
->arch
.n_max_mmu_pages
= goal_nr_mmu_pages
;
1753 static int kvm_mmu_unprotect_page(struct kvm
*kvm
, gfn_t gfn
)
1755 struct kvm_mmu_page
*sp
;
1756 struct hlist_node
*node
;
1757 LIST_HEAD(invalid_list
);
1760 pgprintk("%s: looking for gfn %llx\n", __func__
, gfn
);
1763 for_each_gfn_indirect_valid_sp(kvm
, sp
, gfn
, node
) {
1764 pgprintk("%s: gfn %llx role %x\n", __func__
, gfn
,
1767 kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
);
1769 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
1773 static void mmu_unshadow(struct kvm
*kvm
, gfn_t gfn
)
1775 struct kvm_mmu_page
*sp
;
1776 struct hlist_node
*node
;
1777 LIST_HEAD(invalid_list
);
1779 for_each_gfn_indirect_valid_sp(kvm
, sp
, gfn
, node
) {
1780 pgprintk("%s: zap %llx %x\n",
1781 __func__
, gfn
, sp
->role
.word
);
1782 kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
);
1784 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
1787 static void page_header_update_slot(struct kvm
*kvm
, void *pte
, gfn_t gfn
)
1789 int slot
= memslot_id(kvm
, gfn
);
1790 struct kvm_mmu_page
*sp
= page_header(__pa(pte
));
1792 __set_bit(slot
, sp
->slot_bitmap
);
1795 static void mmu_convert_notrap(struct kvm_mmu_page
*sp
)
1800 if (shadow_trap_nonpresent_pte
== shadow_notrap_nonpresent_pte
)
1803 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
) {
1804 if (pt
[i
] == shadow_notrap_nonpresent_pte
)
1805 __set_spte(&pt
[i
], shadow_trap_nonpresent_pte
);
1810 * The function is based on mtrr_type_lookup() in
1811 * arch/x86/kernel/cpu/mtrr/generic.c
1813 static int get_mtrr_type(struct mtrr_state_type
*mtrr_state
,
1818 u8 prev_match
, curr_match
;
1819 int num_var_ranges
= KVM_NR_VAR_MTRR
;
1821 if (!mtrr_state
->enabled
)
1824 /* Make end inclusive end, instead of exclusive */
1827 /* Look in fixed ranges. Just return the type as per start */
1828 if (mtrr_state
->have_fixed
&& (start
< 0x100000)) {
1831 if (start
< 0x80000) {
1833 idx
+= (start
>> 16);
1834 return mtrr_state
->fixed_ranges
[idx
];
1835 } else if (start
< 0xC0000) {
1837 idx
+= ((start
- 0x80000) >> 14);
1838 return mtrr_state
->fixed_ranges
[idx
];
1839 } else if (start
< 0x1000000) {
1841 idx
+= ((start
- 0xC0000) >> 12);
1842 return mtrr_state
->fixed_ranges
[idx
];
1847 * Look in variable ranges
1848 * Look of multiple ranges matching this address and pick type
1849 * as per MTRR precedence
1851 if (!(mtrr_state
->enabled
& 2))
1852 return mtrr_state
->def_type
;
1855 for (i
= 0; i
< num_var_ranges
; ++i
) {
1856 unsigned short start_state
, end_state
;
1858 if (!(mtrr_state
->var_ranges
[i
].mask_lo
& (1 << 11)))
1861 base
= (((u64
)mtrr_state
->var_ranges
[i
].base_hi
) << 32) +
1862 (mtrr_state
->var_ranges
[i
].base_lo
& PAGE_MASK
);
1863 mask
= (((u64
)mtrr_state
->var_ranges
[i
].mask_hi
) << 32) +
1864 (mtrr_state
->var_ranges
[i
].mask_lo
& PAGE_MASK
);
1866 start_state
= ((start
& mask
) == (base
& mask
));
1867 end_state
= ((end
& mask
) == (base
& mask
));
1868 if (start_state
!= end_state
)
1871 if ((start
& mask
) != (base
& mask
))
1874 curr_match
= mtrr_state
->var_ranges
[i
].base_lo
& 0xff;
1875 if (prev_match
== 0xFF) {
1876 prev_match
= curr_match
;
1880 if (prev_match
== MTRR_TYPE_UNCACHABLE
||
1881 curr_match
== MTRR_TYPE_UNCACHABLE
)
1882 return MTRR_TYPE_UNCACHABLE
;
1884 if ((prev_match
== MTRR_TYPE_WRBACK
&&
1885 curr_match
== MTRR_TYPE_WRTHROUGH
) ||
1886 (prev_match
== MTRR_TYPE_WRTHROUGH
&&
1887 curr_match
== MTRR_TYPE_WRBACK
)) {
1888 prev_match
= MTRR_TYPE_WRTHROUGH
;
1889 curr_match
= MTRR_TYPE_WRTHROUGH
;
1892 if (prev_match
!= curr_match
)
1893 return MTRR_TYPE_UNCACHABLE
;
1896 if (prev_match
!= 0xFF)
1899 return mtrr_state
->def_type
;
1902 u8
kvm_get_guest_memory_type(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
1906 mtrr
= get_mtrr_type(&vcpu
->arch
.mtrr_state
, gfn
<< PAGE_SHIFT
,
1907 (gfn
<< PAGE_SHIFT
) + PAGE_SIZE
);
1908 if (mtrr
== 0xfe || mtrr
== 0xff)
1909 mtrr
= MTRR_TYPE_WRBACK
;
1912 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type
);
1914 static void __kvm_unsync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
)
1916 trace_kvm_mmu_unsync_page(sp
);
1917 ++vcpu
->kvm
->stat
.mmu_unsync
;
1920 kvm_mmu_mark_parents_unsync(sp
);
1921 mmu_convert_notrap(sp
);
1924 static void kvm_unsync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
1926 struct kvm_mmu_page
*s
;
1927 struct hlist_node
*node
;
1929 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
, node
) {
1932 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
1933 __kvm_unsync_page(vcpu
, s
);
1937 static int mmu_need_write_protect(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
1940 struct kvm_mmu_page
*s
;
1941 struct hlist_node
*node
;
1942 bool need_unsync
= false;
1944 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
, node
) {
1948 if (s
->role
.level
!= PT_PAGE_TABLE_LEVEL
)
1951 if (!need_unsync
&& !s
->unsync
) {
1958 kvm_unsync_pages(vcpu
, gfn
);
1962 static int set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
1963 unsigned pte_access
, int user_fault
,
1964 int write_fault
, int dirty
, int level
,
1965 gfn_t gfn
, pfn_t pfn
, bool speculative
,
1966 bool can_unsync
, bool reset_host_protection
)
1972 * We don't set the accessed bit, since we sometimes want to see
1973 * whether the guest actually used the pte (in order to detect
1976 spte
= shadow_base_present_pte
;
1978 spte
|= shadow_accessed_mask
;
1980 pte_access
&= ~ACC_WRITE_MASK
;
1981 if (pte_access
& ACC_EXEC_MASK
)
1982 spte
|= shadow_x_mask
;
1984 spte
|= shadow_nx_mask
;
1985 if (pte_access
& ACC_USER_MASK
)
1986 spte
|= shadow_user_mask
;
1987 if (level
> PT_PAGE_TABLE_LEVEL
)
1988 spte
|= PT_PAGE_SIZE_MASK
;
1990 spte
|= kvm_x86_ops
->get_mt_mask(vcpu
, gfn
,
1991 kvm_is_mmio_pfn(pfn
));
1993 if (reset_host_protection
)
1994 spte
|= SPTE_HOST_WRITEABLE
;
1996 spte
|= (u64
)pfn
<< PAGE_SHIFT
;
1998 if ((pte_access
& ACC_WRITE_MASK
)
1999 || (!vcpu
->arch
.mmu
.direct_map
&& write_fault
2000 && !is_write_protection(vcpu
) && !user_fault
)) {
2002 if (level
> PT_PAGE_TABLE_LEVEL
&&
2003 has_wrprotected_page(vcpu
->kvm
, gfn
, level
)) {
2005 drop_spte(vcpu
->kvm
, sptep
, shadow_trap_nonpresent_pte
);
2009 spte
|= PT_WRITABLE_MASK
;
2011 if (!vcpu
->arch
.mmu
.direct_map
2012 && !(pte_access
& ACC_WRITE_MASK
))
2013 spte
&= ~PT_USER_MASK
;
2016 * Optimization: for pte sync, if spte was writable the hash
2017 * lookup is unnecessary (and expensive). Write protection
2018 * is responsibility of mmu_get_page / kvm_sync_page.
2019 * Same reasoning can be applied to dirty page accounting.
2021 if (!can_unsync
&& is_writable_pte(*sptep
))
2024 if (mmu_need_write_protect(vcpu
, gfn
, can_unsync
)) {
2025 pgprintk("%s: found shadow page for %llx, marking ro\n",
2028 pte_access
&= ~ACC_WRITE_MASK
;
2029 if (is_writable_pte(spte
))
2030 spte
&= ~PT_WRITABLE_MASK
;
2034 if (pte_access
& ACC_WRITE_MASK
)
2035 mark_page_dirty(vcpu
->kvm
, gfn
);
2038 update_spte(sptep
, spte
);
2043 static void mmu_set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2044 unsigned pt_access
, unsigned pte_access
,
2045 int user_fault
, int write_fault
, int dirty
,
2046 int *ptwrite
, int level
, gfn_t gfn
,
2047 pfn_t pfn
, bool speculative
,
2048 bool reset_host_protection
)
2050 int was_rmapped
= 0;
2053 pgprintk("%s: spte %llx access %x write_fault %d"
2054 " user_fault %d gfn %llx\n",
2055 __func__
, *sptep
, pt_access
,
2056 write_fault
, user_fault
, gfn
);
2058 if (is_rmap_spte(*sptep
)) {
2060 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2061 * the parent of the now unreachable PTE.
2063 if (level
> PT_PAGE_TABLE_LEVEL
&&
2064 !is_large_pte(*sptep
)) {
2065 struct kvm_mmu_page
*child
;
2068 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
2069 mmu_page_remove_parent_pte(child
, sptep
);
2070 __set_spte(sptep
, shadow_trap_nonpresent_pte
);
2071 kvm_flush_remote_tlbs(vcpu
->kvm
);
2072 } else if (pfn
!= spte_to_pfn(*sptep
)) {
2073 pgprintk("hfn old %llx new %llx\n",
2074 spte_to_pfn(*sptep
), pfn
);
2075 drop_spte(vcpu
->kvm
, sptep
, shadow_trap_nonpresent_pte
);
2076 kvm_flush_remote_tlbs(vcpu
->kvm
);
2081 if (set_spte(vcpu
, sptep
, pte_access
, user_fault
, write_fault
,
2082 dirty
, level
, gfn
, pfn
, speculative
, true,
2083 reset_host_protection
)) {
2086 kvm_mmu_flush_tlb(vcpu
);
2089 pgprintk("%s: setting spte %llx\n", __func__
, *sptep
);
2090 pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2091 is_large_pte(*sptep
)? "2MB" : "4kB",
2092 *sptep
& PT_PRESENT_MASK
?"RW":"R", gfn
,
2094 if (!was_rmapped
&& is_large_pte(*sptep
))
2095 ++vcpu
->kvm
->stat
.lpages
;
2097 page_header_update_slot(vcpu
->kvm
, sptep
, gfn
);
2099 rmap_count
= rmap_add(vcpu
, sptep
, gfn
);
2100 if (rmap_count
> RMAP_RECYCLE_THRESHOLD
)
2101 rmap_recycle(vcpu
, sptep
, gfn
);
2103 kvm_release_pfn_clean(pfn
);
2105 vcpu
->arch
.last_pte_updated
= sptep
;
2106 vcpu
->arch
.last_pte_gfn
= gfn
;
2110 static void nonpaging_new_cr3(struct kvm_vcpu
*vcpu
)
2114 static struct kvm_memory_slot
*
2115 pte_prefetch_gfn_to_memslot(struct kvm_vcpu
*vcpu
, gfn_t gfn
, bool no_dirty_log
)
2117 struct kvm_memory_slot
*slot
;
2119 slot
= gfn_to_memslot(vcpu
->kvm
, gfn
);
2120 if (!slot
|| slot
->flags
& KVM_MEMSLOT_INVALID
||
2121 (no_dirty_log
&& slot
->dirty_bitmap
))
2127 static pfn_t
pte_prefetch_gfn_to_pfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2130 struct kvm_memory_slot
*slot
;
2133 slot
= pte_prefetch_gfn_to_memslot(vcpu
, gfn
, no_dirty_log
);
2136 return page_to_pfn(bad_page
);
2139 hva
= gfn_to_hva_memslot(slot
, gfn
);
2141 return hva_to_pfn_atomic(vcpu
->kvm
, hva
);
2144 static int direct_pte_prefetch_many(struct kvm_vcpu
*vcpu
,
2145 struct kvm_mmu_page
*sp
,
2146 u64
*start
, u64
*end
)
2148 struct page
*pages
[PTE_PREFETCH_NUM
];
2149 unsigned access
= sp
->role
.access
;
2153 gfn
= kvm_mmu_page_get_gfn(sp
, start
- sp
->spt
);
2154 if (!pte_prefetch_gfn_to_memslot(vcpu
, gfn
, access
& ACC_WRITE_MASK
))
2157 ret
= gfn_to_page_many_atomic(vcpu
->kvm
, gfn
, pages
, end
- start
);
2161 for (i
= 0; i
< ret
; i
++, gfn
++, start
++)
2162 mmu_set_spte(vcpu
, start
, ACC_ALL
,
2163 access
, 0, 0, 1, NULL
,
2164 sp
->role
.level
, gfn
,
2165 page_to_pfn(pages
[i
]), true, true);
2170 static void __direct_pte_prefetch(struct kvm_vcpu
*vcpu
,
2171 struct kvm_mmu_page
*sp
, u64
*sptep
)
2173 u64
*spte
, *start
= NULL
;
2176 WARN_ON(!sp
->role
.direct
);
2178 i
= (sptep
- sp
->spt
) & ~(PTE_PREFETCH_NUM
- 1);
2181 for (i
= 0; i
< PTE_PREFETCH_NUM
; i
++, spte
++) {
2182 if (*spte
!= shadow_trap_nonpresent_pte
|| spte
== sptep
) {
2185 if (direct_pte_prefetch_many(vcpu
, sp
, start
, spte
) < 0)
2193 static void direct_pte_prefetch(struct kvm_vcpu
*vcpu
, u64
*sptep
)
2195 struct kvm_mmu_page
*sp
;
2198 * Since it's no accessed bit on EPT, it's no way to
2199 * distinguish between actually accessed translations
2200 * and prefetched, so disable pte prefetch if EPT is
2203 if (!shadow_accessed_mask
)
2206 sp
= page_header(__pa(sptep
));
2207 if (sp
->role
.level
> PT_PAGE_TABLE_LEVEL
)
2210 __direct_pte_prefetch(vcpu
, sp
, sptep
);
2213 static int __direct_map(struct kvm_vcpu
*vcpu
, gpa_t v
, int write
,
2214 int level
, gfn_t gfn
, pfn_t pfn
)
2216 struct kvm_shadow_walk_iterator iterator
;
2217 struct kvm_mmu_page
*sp
;
2221 for_each_shadow_entry(vcpu
, (u64
)gfn
<< PAGE_SHIFT
, iterator
) {
2222 if (iterator
.level
== level
) {
2223 mmu_set_spte(vcpu
, iterator
.sptep
, ACC_ALL
, ACC_ALL
,
2224 0, write
, 1, &pt_write
,
2225 level
, gfn
, pfn
, false, true);
2226 direct_pte_prefetch(vcpu
, iterator
.sptep
);
2227 ++vcpu
->stat
.pf_fixed
;
2231 if (*iterator
.sptep
== shadow_trap_nonpresent_pte
) {
2232 u64 base_addr
= iterator
.addr
;
2234 base_addr
&= PT64_LVL_ADDR_MASK(iterator
.level
);
2235 pseudo_gfn
= base_addr
>> PAGE_SHIFT
;
2236 sp
= kvm_mmu_get_page(vcpu
, pseudo_gfn
, iterator
.addr
,
2238 1, ACC_ALL
, iterator
.sptep
);
2240 pgprintk("nonpaging_map: ENOMEM\n");
2241 kvm_release_pfn_clean(pfn
);
2245 __set_spte(iterator
.sptep
,
2247 | PT_PRESENT_MASK
| PT_WRITABLE_MASK
2248 | shadow_user_mask
| shadow_x_mask
2249 | shadow_accessed_mask
);
2255 static void kvm_send_hwpoison_signal(unsigned long address
, struct task_struct
*tsk
)
2259 info
.si_signo
= SIGBUS
;
2261 info
.si_code
= BUS_MCEERR_AR
;
2262 info
.si_addr
= (void __user
*)address
;
2263 info
.si_addr_lsb
= PAGE_SHIFT
;
2265 send_sig_info(SIGBUS
, &info
, tsk
);
2268 static int kvm_handle_bad_page(struct kvm
*kvm
, gfn_t gfn
, pfn_t pfn
)
2270 kvm_release_pfn_clean(pfn
);
2271 if (is_hwpoison_pfn(pfn
)) {
2272 kvm_send_hwpoison_signal(gfn_to_hva(kvm
, gfn
), current
);
2274 } else if (is_fault_pfn(pfn
))
2280 static int nonpaging_map(struct kvm_vcpu
*vcpu
, gva_t v
, int write
, gfn_t gfn
)
2285 unsigned long mmu_seq
;
2287 level
= mapping_level(vcpu
, gfn
);
2290 * This path builds a PAE pagetable - so we can map 2mb pages at
2291 * maximum. Therefore check if the level is larger than that.
2293 if (level
> PT_DIRECTORY_LEVEL
)
2294 level
= PT_DIRECTORY_LEVEL
;
2296 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
2298 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
2300 pfn
= gfn_to_pfn(vcpu
->kvm
, gfn
);
2303 if (is_error_pfn(pfn
))
2304 return kvm_handle_bad_page(vcpu
->kvm
, gfn
, pfn
);
2306 spin_lock(&vcpu
->kvm
->mmu_lock
);
2307 if (mmu_notifier_retry(vcpu
, mmu_seq
))
2309 kvm_mmu_free_some_pages(vcpu
);
2310 r
= __direct_map(vcpu
, v
, write
, level
, gfn
, pfn
);
2311 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2317 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2318 kvm_release_pfn_clean(pfn
);
2323 static void mmu_free_roots(struct kvm_vcpu
*vcpu
)
2326 struct kvm_mmu_page
*sp
;
2327 LIST_HEAD(invalid_list
);
2329 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2331 spin_lock(&vcpu
->kvm
->mmu_lock
);
2332 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
&&
2333 (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
||
2334 vcpu
->arch
.mmu
.direct_map
)) {
2335 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
2337 sp
= page_header(root
);
2339 if (!sp
->root_count
&& sp
->role
.invalid
) {
2340 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, &invalid_list
);
2341 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
2343 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
2344 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2347 for (i
= 0; i
< 4; ++i
) {
2348 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2351 root
&= PT64_BASE_ADDR_MASK
;
2352 sp
= page_header(root
);
2354 if (!sp
->root_count
&& sp
->role
.invalid
)
2355 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
2358 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
2360 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
2361 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2362 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
2365 static int mmu_check_root(struct kvm_vcpu
*vcpu
, gfn_t root_gfn
)
2369 if (!kvm_is_visible_gfn(vcpu
->kvm
, root_gfn
)) {
2370 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2377 static int mmu_alloc_direct_roots(struct kvm_vcpu
*vcpu
)
2379 struct kvm_mmu_page
*sp
;
2382 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
2383 spin_lock(&vcpu
->kvm
->mmu_lock
);
2384 kvm_mmu_free_some_pages(vcpu
);
2385 sp
= kvm_mmu_get_page(vcpu
, 0, 0, PT64_ROOT_LEVEL
,
2388 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2389 vcpu
->arch
.mmu
.root_hpa
= __pa(sp
->spt
);
2390 } else if (vcpu
->arch
.mmu
.shadow_root_level
== PT32E_ROOT_LEVEL
) {
2391 for (i
= 0; i
< 4; ++i
) {
2392 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2394 ASSERT(!VALID_PAGE(root
));
2395 spin_lock(&vcpu
->kvm
->mmu_lock
);
2396 kvm_mmu_free_some_pages(vcpu
);
2397 sp
= kvm_mmu_get_page(vcpu
, i
<< 30, i
<< 30,
2398 PT32_ROOT_LEVEL
, 1, ACC_ALL
,
2400 root
= __pa(sp
->spt
);
2402 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2403 vcpu
->arch
.mmu
.pae_root
[i
] = root
| PT_PRESENT_MASK
;
2405 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
2412 static int mmu_alloc_shadow_roots(struct kvm_vcpu
*vcpu
)
2414 struct kvm_mmu_page
*sp
;
2419 root_gfn
= vcpu
->arch
.mmu
.get_cr3(vcpu
) >> PAGE_SHIFT
;
2421 if (mmu_check_root(vcpu
, root_gfn
))
2425 * Do we shadow a long mode page table? If so we need to
2426 * write-protect the guests page table root.
2428 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
2429 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
2431 ASSERT(!VALID_PAGE(root
));
2433 spin_lock(&vcpu
->kvm
->mmu_lock
);
2434 kvm_mmu_free_some_pages(vcpu
);
2435 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, 0, PT64_ROOT_LEVEL
,
2437 root
= __pa(sp
->spt
);
2439 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2440 vcpu
->arch
.mmu
.root_hpa
= root
;
2445 * We shadow a 32 bit page table. This may be a legacy 2-level
2446 * or a PAE 3-level page table. In either case we need to be aware that
2447 * the shadow page table may be a PAE or a long mode page table.
2449 pm_mask
= PT_PRESENT_MASK
;
2450 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
)
2451 pm_mask
|= PT_ACCESSED_MASK
| PT_WRITABLE_MASK
| PT_USER_MASK
;
2453 for (i
= 0; i
< 4; ++i
) {
2454 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2456 ASSERT(!VALID_PAGE(root
));
2457 if (vcpu
->arch
.mmu
.root_level
== PT32E_ROOT_LEVEL
) {
2458 pdptr
= kvm_pdptr_read_mmu(vcpu
, &vcpu
->arch
.mmu
, i
);
2459 if (!is_present_gpte(pdptr
)) {
2460 vcpu
->arch
.mmu
.pae_root
[i
] = 0;
2463 root_gfn
= pdptr
>> PAGE_SHIFT
;
2464 if (mmu_check_root(vcpu
, root_gfn
))
2467 spin_lock(&vcpu
->kvm
->mmu_lock
);
2468 kvm_mmu_free_some_pages(vcpu
);
2469 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, i
<< 30,
2472 root
= __pa(sp
->spt
);
2474 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2476 vcpu
->arch
.mmu
.pae_root
[i
] = root
| pm_mask
;
2478 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
2481 * If we shadow a 32 bit page table with a long mode page
2482 * table we enter this path.
2484 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
2485 if (vcpu
->arch
.mmu
.lm_root
== NULL
) {
2487 * The additional page necessary for this is only
2488 * allocated on demand.
2493 lm_root
= (void*)get_zeroed_page(GFP_KERNEL
);
2494 if (lm_root
== NULL
)
2497 lm_root
[0] = __pa(vcpu
->arch
.mmu
.pae_root
) | pm_mask
;
2499 vcpu
->arch
.mmu
.lm_root
= lm_root
;
2502 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.lm_root
);
2508 static int mmu_alloc_roots(struct kvm_vcpu
*vcpu
)
2510 if (vcpu
->arch
.mmu
.direct_map
)
2511 return mmu_alloc_direct_roots(vcpu
);
2513 return mmu_alloc_shadow_roots(vcpu
);
2516 static void mmu_sync_roots(struct kvm_vcpu
*vcpu
)
2519 struct kvm_mmu_page
*sp
;
2521 if (vcpu
->arch
.mmu
.direct_map
)
2524 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2527 trace_kvm_mmu_audit(vcpu
, AUDIT_PRE_SYNC
);
2528 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
2529 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
2530 sp
= page_header(root
);
2531 mmu_sync_children(vcpu
, sp
);
2534 for (i
= 0; i
< 4; ++i
) {
2535 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2537 if (root
&& VALID_PAGE(root
)) {
2538 root
&= PT64_BASE_ADDR_MASK
;
2539 sp
= page_header(root
);
2540 mmu_sync_children(vcpu
, sp
);
2543 trace_kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
2546 void kvm_mmu_sync_roots(struct kvm_vcpu
*vcpu
)
2548 spin_lock(&vcpu
->kvm
->mmu_lock
);
2549 mmu_sync_roots(vcpu
);
2550 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2553 static gpa_t
nonpaging_gva_to_gpa(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
2554 u32 access
, u32
*error
)
2561 static gpa_t
nonpaging_gva_to_gpa_nested(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
2562 u32 access
, u32
*error
)
2566 return vcpu
->arch
.nested_mmu
.translate_gpa(vcpu
, vaddr
, access
);
2569 static int nonpaging_page_fault(struct kvm_vcpu
*vcpu
, gva_t gva
,
2575 pgprintk("%s: gva %lx error %x\n", __func__
, gva
, error_code
);
2576 r
= mmu_topup_memory_caches(vcpu
);
2581 ASSERT(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
2583 gfn
= gva
>> PAGE_SHIFT
;
2585 return nonpaging_map(vcpu
, gva
& PAGE_MASK
,
2586 error_code
& PFERR_WRITE_MASK
, gfn
);
2589 static int tdp_page_fault(struct kvm_vcpu
*vcpu
, gva_t gpa
,
2595 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
2596 unsigned long mmu_seq
;
2599 ASSERT(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
2601 r
= mmu_topup_memory_caches(vcpu
);
2605 level
= mapping_level(vcpu
, gfn
);
2607 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
2609 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
2611 pfn
= gfn_to_pfn(vcpu
->kvm
, gfn
);
2612 if (is_error_pfn(pfn
))
2613 return kvm_handle_bad_page(vcpu
->kvm
, gfn
, pfn
);
2614 spin_lock(&vcpu
->kvm
->mmu_lock
);
2615 if (mmu_notifier_retry(vcpu
, mmu_seq
))
2617 kvm_mmu_free_some_pages(vcpu
);
2618 r
= __direct_map(vcpu
, gpa
, error_code
& PFERR_WRITE_MASK
,
2620 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2625 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2626 kvm_release_pfn_clean(pfn
);
2630 static void nonpaging_free(struct kvm_vcpu
*vcpu
)
2632 mmu_free_roots(vcpu
);
2635 static int nonpaging_init_context(struct kvm_vcpu
*vcpu
,
2636 struct kvm_mmu
*context
)
2638 context
->new_cr3
= nonpaging_new_cr3
;
2639 context
->page_fault
= nonpaging_page_fault
;
2640 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
2641 context
->free
= nonpaging_free
;
2642 context
->prefetch_page
= nonpaging_prefetch_page
;
2643 context
->sync_page
= nonpaging_sync_page
;
2644 context
->invlpg
= nonpaging_invlpg
;
2645 context
->root_level
= 0;
2646 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
2647 context
->root_hpa
= INVALID_PAGE
;
2648 context
->direct_map
= true;
2649 context
->nx
= false;
2653 void kvm_mmu_flush_tlb(struct kvm_vcpu
*vcpu
)
2655 ++vcpu
->stat
.tlb_flush
;
2656 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
2659 static void paging_new_cr3(struct kvm_vcpu
*vcpu
)
2661 pgprintk("%s: cr3 %lx\n", __func__
, vcpu
->arch
.cr3
);
2662 mmu_free_roots(vcpu
);
2665 static unsigned long get_cr3(struct kvm_vcpu
*vcpu
)
2667 return vcpu
->arch
.cr3
;
2670 static void inject_page_fault(struct kvm_vcpu
*vcpu
)
2672 vcpu
->arch
.mmu
.inject_page_fault(vcpu
);
2675 static void paging_free(struct kvm_vcpu
*vcpu
)
2677 nonpaging_free(vcpu
);
2680 static bool is_rsvd_bits_set(struct kvm_mmu
*mmu
, u64 gpte
, int level
)
2684 bit7
= (gpte
>> 7) & 1;
2685 return (gpte
& mmu
->rsvd_bits_mask
[bit7
][level
-1]) != 0;
2689 #include "paging_tmpl.h"
2693 #include "paging_tmpl.h"
2696 static void reset_rsvds_bits_mask(struct kvm_vcpu
*vcpu
,
2697 struct kvm_mmu
*context
,
2700 int maxphyaddr
= cpuid_maxphyaddr(vcpu
);
2701 u64 exb_bit_rsvd
= 0;
2704 exb_bit_rsvd
= rsvd_bits(63, 63);
2706 case PT32_ROOT_LEVEL
:
2707 /* no rsvd bits for 2 level 4K page table entries */
2708 context
->rsvd_bits_mask
[0][1] = 0;
2709 context
->rsvd_bits_mask
[0][0] = 0;
2710 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
2712 if (!is_pse(vcpu
)) {
2713 context
->rsvd_bits_mask
[1][1] = 0;
2717 if (is_cpuid_PSE36())
2718 /* 36bits PSE 4MB page */
2719 context
->rsvd_bits_mask
[1][1] = rsvd_bits(17, 21);
2721 /* 32 bits PSE 4MB page */
2722 context
->rsvd_bits_mask
[1][1] = rsvd_bits(13, 21);
2724 case PT32E_ROOT_LEVEL
:
2725 context
->rsvd_bits_mask
[0][2] =
2726 rsvd_bits(maxphyaddr
, 63) |
2727 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2728 context
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
2729 rsvd_bits(maxphyaddr
, 62); /* PDE */
2730 context
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
2731 rsvd_bits(maxphyaddr
, 62); /* PTE */
2732 context
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
2733 rsvd_bits(maxphyaddr
, 62) |
2734 rsvd_bits(13, 20); /* large page */
2735 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
2737 case PT64_ROOT_LEVEL
:
2738 context
->rsvd_bits_mask
[0][3] = exb_bit_rsvd
|
2739 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(7, 8);
2740 context
->rsvd_bits_mask
[0][2] = exb_bit_rsvd
|
2741 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(7, 8);
2742 context
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
2743 rsvd_bits(maxphyaddr
, 51);
2744 context
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
2745 rsvd_bits(maxphyaddr
, 51);
2746 context
->rsvd_bits_mask
[1][3] = context
->rsvd_bits_mask
[0][3];
2747 context
->rsvd_bits_mask
[1][2] = exb_bit_rsvd
|
2748 rsvd_bits(maxphyaddr
, 51) |
2750 context
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
2751 rsvd_bits(maxphyaddr
, 51) |
2752 rsvd_bits(13, 20); /* large page */
2753 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
2758 static int paging64_init_context_common(struct kvm_vcpu
*vcpu
,
2759 struct kvm_mmu
*context
,
2762 context
->nx
= is_nx(vcpu
);
2764 reset_rsvds_bits_mask(vcpu
, context
, level
);
2766 ASSERT(is_pae(vcpu
));
2767 context
->new_cr3
= paging_new_cr3
;
2768 context
->page_fault
= paging64_page_fault
;
2769 context
->gva_to_gpa
= paging64_gva_to_gpa
;
2770 context
->prefetch_page
= paging64_prefetch_page
;
2771 context
->sync_page
= paging64_sync_page
;
2772 context
->invlpg
= paging64_invlpg
;
2773 context
->free
= paging_free
;
2774 context
->root_level
= level
;
2775 context
->shadow_root_level
= level
;
2776 context
->root_hpa
= INVALID_PAGE
;
2777 context
->direct_map
= false;
2781 static int paging64_init_context(struct kvm_vcpu
*vcpu
,
2782 struct kvm_mmu
*context
)
2784 return paging64_init_context_common(vcpu
, context
, PT64_ROOT_LEVEL
);
2787 static int paging32_init_context(struct kvm_vcpu
*vcpu
,
2788 struct kvm_mmu
*context
)
2790 context
->nx
= false;
2792 reset_rsvds_bits_mask(vcpu
, context
, PT32_ROOT_LEVEL
);
2794 context
->new_cr3
= paging_new_cr3
;
2795 context
->page_fault
= paging32_page_fault
;
2796 context
->gva_to_gpa
= paging32_gva_to_gpa
;
2797 context
->free
= paging_free
;
2798 context
->prefetch_page
= paging32_prefetch_page
;
2799 context
->sync_page
= paging32_sync_page
;
2800 context
->invlpg
= paging32_invlpg
;
2801 context
->root_level
= PT32_ROOT_LEVEL
;
2802 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
2803 context
->root_hpa
= INVALID_PAGE
;
2804 context
->direct_map
= false;
2808 static int paging32E_init_context(struct kvm_vcpu
*vcpu
,
2809 struct kvm_mmu
*context
)
2811 return paging64_init_context_common(vcpu
, context
, PT32E_ROOT_LEVEL
);
2814 static int init_kvm_tdp_mmu(struct kvm_vcpu
*vcpu
)
2816 struct kvm_mmu
*context
= vcpu
->arch
.walk_mmu
;
2818 context
->new_cr3
= nonpaging_new_cr3
;
2819 context
->page_fault
= tdp_page_fault
;
2820 context
->free
= nonpaging_free
;
2821 context
->prefetch_page
= nonpaging_prefetch_page
;
2822 context
->sync_page
= nonpaging_sync_page
;
2823 context
->invlpg
= nonpaging_invlpg
;
2824 context
->shadow_root_level
= kvm_x86_ops
->get_tdp_level();
2825 context
->root_hpa
= INVALID_PAGE
;
2826 context
->direct_map
= true;
2827 context
->set_cr3
= kvm_x86_ops
->set_tdp_cr3
;
2828 context
->get_cr3
= get_cr3
;
2829 context
->inject_page_fault
= kvm_inject_page_fault
;
2830 context
->nx
= is_nx(vcpu
);
2832 if (!is_paging(vcpu
)) {
2833 context
->nx
= false;
2834 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
2835 context
->root_level
= 0;
2836 } else if (is_long_mode(vcpu
)) {
2837 context
->nx
= is_nx(vcpu
);
2838 reset_rsvds_bits_mask(vcpu
, context
, PT64_ROOT_LEVEL
);
2839 context
->gva_to_gpa
= paging64_gva_to_gpa
;
2840 context
->root_level
= PT64_ROOT_LEVEL
;
2841 } else if (is_pae(vcpu
)) {
2842 context
->nx
= is_nx(vcpu
);
2843 reset_rsvds_bits_mask(vcpu
, context
, PT32E_ROOT_LEVEL
);
2844 context
->gva_to_gpa
= paging64_gva_to_gpa
;
2845 context
->root_level
= PT32E_ROOT_LEVEL
;
2847 context
->nx
= false;
2848 reset_rsvds_bits_mask(vcpu
, context
, PT32_ROOT_LEVEL
);
2849 context
->gva_to_gpa
= paging32_gva_to_gpa
;
2850 context
->root_level
= PT32_ROOT_LEVEL
;
2856 int kvm_init_shadow_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*context
)
2860 ASSERT(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
2862 if (!is_paging(vcpu
))
2863 r
= nonpaging_init_context(vcpu
, context
);
2864 else if (is_long_mode(vcpu
))
2865 r
= paging64_init_context(vcpu
, context
);
2866 else if (is_pae(vcpu
))
2867 r
= paging32E_init_context(vcpu
, context
);
2869 r
= paging32_init_context(vcpu
, context
);
2871 vcpu
->arch
.mmu
.base_role
.cr4_pae
= !!is_pae(vcpu
);
2872 vcpu
->arch
.mmu
.base_role
.cr0_wp
= is_write_protection(vcpu
);
2876 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu
);
2878 static int init_kvm_softmmu(struct kvm_vcpu
*vcpu
)
2880 int r
= kvm_init_shadow_mmu(vcpu
, vcpu
->arch
.walk_mmu
);
2882 vcpu
->arch
.walk_mmu
->set_cr3
= kvm_x86_ops
->set_cr3
;
2883 vcpu
->arch
.walk_mmu
->get_cr3
= get_cr3
;
2884 vcpu
->arch
.walk_mmu
->inject_page_fault
= kvm_inject_page_fault
;
2889 static int init_kvm_nested_mmu(struct kvm_vcpu
*vcpu
)
2891 struct kvm_mmu
*g_context
= &vcpu
->arch
.nested_mmu
;
2893 g_context
->get_cr3
= get_cr3
;
2894 g_context
->inject_page_fault
= kvm_inject_page_fault
;
2897 * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
2898 * translation of l2_gpa to l1_gpa addresses is done using the
2899 * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
2900 * functions between mmu and nested_mmu are swapped.
2902 if (!is_paging(vcpu
)) {
2903 g_context
->nx
= false;
2904 g_context
->root_level
= 0;
2905 g_context
->gva_to_gpa
= nonpaging_gva_to_gpa_nested
;
2906 } else if (is_long_mode(vcpu
)) {
2907 g_context
->nx
= is_nx(vcpu
);
2908 reset_rsvds_bits_mask(vcpu
, g_context
, PT64_ROOT_LEVEL
);
2909 g_context
->root_level
= PT64_ROOT_LEVEL
;
2910 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
2911 } else if (is_pae(vcpu
)) {
2912 g_context
->nx
= is_nx(vcpu
);
2913 reset_rsvds_bits_mask(vcpu
, g_context
, PT32E_ROOT_LEVEL
);
2914 g_context
->root_level
= PT32E_ROOT_LEVEL
;
2915 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
2917 g_context
->nx
= false;
2918 reset_rsvds_bits_mask(vcpu
, g_context
, PT32_ROOT_LEVEL
);
2919 g_context
->root_level
= PT32_ROOT_LEVEL
;
2920 g_context
->gva_to_gpa
= paging32_gva_to_gpa_nested
;
2926 static int init_kvm_mmu(struct kvm_vcpu
*vcpu
)
2928 vcpu
->arch
.update_pte
.pfn
= bad_pfn
;
2930 if (mmu_is_nested(vcpu
))
2931 return init_kvm_nested_mmu(vcpu
);
2932 else if (tdp_enabled
)
2933 return init_kvm_tdp_mmu(vcpu
);
2935 return init_kvm_softmmu(vcpu
);
2938 static void destroy_kvm_mmu(struct kvm_vcpu
*vcpu
)
2941 if (VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2942 /* mmu.free() should set root_hpa = INVALID_PAGE */
2943 vcpu
->arch
.mmu
.free(vcpu
);
2946 int kvm_mmu_reset_context(struct kvm_vcpu
*vcpu
)
2948 destroy_kvm_mmu(vcpu
);
2949 return init_kvm_mmu(vcpu
);
2951 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context
);
2953 int kvm_mmu_load(struct kvm_vcpu
*vcpu
)
2957 r
= mmu_topup_memory_caches(vcpu
);
2960 r
= mmu_alloc_roots(vcpu
);
2961 spin_lock(&vcpu
->kvm
->mmu_lock
);
2962 mmu_sync_roots(vcpu
);
2963 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2966 /* set_cr3() should ensure TLB has been flushed */
2967 vcpu
->arch
.mmu
.set_cr3(vcpu
, vcpu
->arch
.mmu
.root_hpa
);
2971 EXPORT_SYMBOL_GPL(kvm_mmu_load
);
2973 void kvm_mmu_unload(struct kvm_vcpu
*vcpu
)
2975 mmu_free_roots(vcpu
);
2977 EXPORT_SYMBOL_GPL(kvm_mmu_unload
);
2979 static void mmu_pte_write_zap_pte(struct kvm_vcpu
*vcpu
,
2980 struct kvm_mmu_page
*sp
,
2984 struct kvm_mmu_page
*child
;
2987 if (is_shadow_present_pte(pte
)) {
2988 if (is_last_spte(pte
, sp
->role
.level
))
2989 drop_spte(vcpu
->kvm
, spte
, shadow_trap_nonpresent_pte
);
2991 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
2992 mmu_page_remove_parent_pte(child
, spte
);
2995 __set_spte(spte
, shadow_trap_nonpresent_pte
);
2996 if (is_large_pte(pte
))
2997 --vcpu
->kvm
->stat
.lpages
;
3000 static void mmu_pte_write_new_pte(struct kvm_vcpu
*vcpu
,
3001 struct kvm_mmu_page
*sp
,
3005 if (sp
->role
.level
!= PT_PAGE_TABLE_LEVEL
) {
3006 ++vcpu
->kvm
->stat
.mmu_pde_zapped
;
3010 if (is_rsvd_bits_set(&vcpu
->arch
.mmu
, *(u64
*)new, PT_PAGE_TABLE_LEVEL
))
3013 ++vcpu
->kvm
->stat
.mmu_pte_updated
;
3014 if (!sp
->role
.cr4_pae
)
3015 paging32_update_pte(vcpu
, sp
, spte
, new);
3017 paging64_update_pte(vcpu
, sp
, spte
, new);
3020 static bool need_remote_flush(u64 old
, u64
new)
3022 if (!is_shadow_present_pte(old
))
3024 if (!is_shadow_present_pte(new))
3026 if ((old
^ new) & PT64_BASE_ADDR_MASK
)
3028 old
^= PT64_NX_MASK
;
3029 new ^= PT64_NX_MASK
;
3030 return (old
& ~new & PT64_PERM_MASK
) != 0;
3033 static void mmu_pte_write_flush_tlb(struct kvm_vcpu
*vcpu
, bool zap_page
,
3034 bool remote_flush
, bool local_flush
)
3040 kvm_flush_remote_tlbs(vcpu
->kvm
);
3041 else if (local_flush
)
3042 kvm_mmu_flush_tlb(vcpu
);
3045 static bool last_updated_pte_accessed(struct kvm_vcpu
*vcpu
)
3047 u64
*spte
= vcpu
->arch
.last_pte_updated
;
3049 return !!(spte
&& (*spte
& shadow_accessed_mask
));
3052 static void mmu_guess_page_from_pte_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3058 if (!is_present_gpte(gpte
))
3060 gfn
= (gpte
& PT64_BASE_ADDR_MASK
) >> PAGE_SHIFT
;
3062 vcpu
->arch
.update_pte
.mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
3064 pfn
= gfn_to_pfn(vcpu
->kvm
, gfn
);
3066 if (is_error_pfn(pfn
)) {
3067 kvm_release_pfn_clean(pfn
);
3070 vcpu
->arch
.update_pte
.gfn
= gfn
;
3071 vcpu
->arch
.update_pte
.pfn
= pfn
;
3074 static void kvm_mmu_access_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
3076 u64
*spte
= vcpu
->arch
.last_pte_updated
;
3079 && vcpu
->arch
.last_pte_gfn
== gfn
3080 && shadow_accessed_mask
3081 && !(*spte
& shadow_accessed_mask
)
3082 && is_shadow_present_pte(*spte
))
3083 set_bit(PT_ACCESSED_SHIFT
, (unsigned long *)spte
);
3086 void kvm_mmu_pte_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3087 const u8
*new, int bytes
,
3088 bool guest_initiated
)
3090 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
3091 union kvm_mmu_page_role mask
= { .word
= 0 };
3092 struct kvm_mmu_page
*sp
;
3093 struct hlist_node
*node
;
3094 LIST_HEAD(invalid_list
);
3097 unsigned offset
= offset_in_page(gpa
);
3099 unsigned page_offset
;
3100 unsigned misaligned
;
3107 bool remote_flush
, local_flush
, zap_page
;
3109 zap_page
= remote_flush
= local_flush
= false;
3111 pgprintk("%s: gpa %llx bytes %d\n", __func__
, gpa
, bytes
);
3113 invlpg_counter
= atomic_read(&vcpu
->kvm
->arch
.invlpg_counter
);
3116 * Assume that the pte write on a page table of the same type
3117 * as the current vcpu paging mode. This is nearly always true
3118 * (might be false while changing modes). Note it is verified later
3121 if ((is_pae(vcpu
) && bytes
== 4) || !new) {
3122 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
3127 r
= kvm_read_guest(vcpu
->kvm
, gpa
, &gentry
, min(bytes
, 8));
3130 new = (const u8
*)&gentry
;
3135 gentry
= *(const u32
*)new;
3138 gentry
= *(const u64
*)new;
3145 mmu_guess_page_from_pte_write(vcpu
, gpa
, gentry
);
3146 spin_lock(&vcpu
->kvm
->mmu_lock
);
3147 if (atomic_read(&vcpu
->kvm
->arch
.invlpg_counter
) != invlpg_counter
)
3149 kvm_mmu_access_page(vcpu
, gfn
);
3150 kvm_mmu_free_some_pages(vcpu
);
3151 ++vcpu
->kvm
->stat
.mmu_pte_write
;
3152 trace_kvm_mmu_audit(vcpu
, AUDIT_PRE_PTE_WRITE
);
3153 if (guest_initiated
) {
3154 if (gfn
== vcpu
->arch
.last_pt_write_gfn
3155 && !last_updated_pte_accessed(vcpu
)) {
3156 ++vcpu
->arch
.last_pt_write_count
;
3157 if (vcpu
->arch
.last_pt_write_count
>= 3)
3160 vcpu
->arch
.last_pt_write_gfn
= gfn
;
3161 vcpu
->arch
.last_pt_write_count
= 1;
3162 vcpu
->arch
.last_pte_updated
= NULL
;
3166 mask
.cr0_wp
= mask
.cr4_pae
= mask
.nxe
= 1;
3167 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, sp
, gfn
, node
) {
3168 pte_size
= sp
->role
.cr4_pae
? 8 : 4;
3169 misaligned
= (offset
^ (offset
+ bytes
- 1)) & ~(pte_size
- 1);
3170 misaligned
|= bytes
< 4;
3171 if (misaligned
|| flooded
) {
3173 * Misaligned accesses are too much trouble to fix
3174 * up; also, they usually indicate a page is not used
3177 * If we're seeing too many writes to a page,
3178 * it may no longer be a page table, or we may be
3179 * forking, in which case it is better to unmap the
3182 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
3183 gpa
, bytes
, sp
->role
.word
);
3184 zap_page
|= !!kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
3186 ++vcpu
->kvm
->stat
.mmu_flooded
;
3189 page_offset
= offset
;
3190 level
= sp
->role
.level
;
3192 if (!sp
->role
.cr4_pae
) {
3193 page_offset
<<= 1; /* 32->64 */
3195 * A 32-bit pde maps 4MB while the shadow pdes map
3196 * only 2MB. So we need to double the offset again
3197 * and zap two pdes instead of one.
3199 if (level
== PT32_ROOT_LEVEL
) {
3200 page_offset
&= ~7; /* kill rounding error */
3204 quadrant
= page_offset
>> PAGE_SHIFT
;
3205 page_offset
&= ~PAGE_MASK
;
3206 if (quadrant
!= sp
->role
.quadrant
)
3210 spte
= &sp
->spt
[page_offset
/ sizeof(*spte
)];
3213 mmu_pte_write_zap_pte(vcpu
, sp
, spte
);
3215 !((sp
->role
.word
^ vcpu
->arch
.mmu
.base_role
.word
)
3217 mmu_pte_write_new_pte(vcpu
, sp
, spte
, &gentry
);
3218 if (!remote_flush
&& need_remote_flush(entry
, *spte
))
3219 remote_flush
= true;
3223 mmu_pte_write_flush_tlb(vcpu
, zap_page
, remote_flush
, local_flush
);
3224 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
3225 trace_kvm_mmu_audit(vcpu
, AUDIT_POST_PTE_WRITE
);
3226 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3227 if (!is_error_pfn(vcpu
->arch
.update_pte
.pfn
)) {
3228 kvm_release_pfn_clean(vcpu
->arch
.update_pte
.pfn
);
3229 vcpu
->arch
.update_pte
.pfn
= bad_pfn
;
3233 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu
*vcpu
, gva_t gva
)
3238 if (vcpu
->arch
.mmu
.direct_map
)
3241 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, gva
, NULL
);
3243 spin_lock(&vcpu
->kvm
->mmu_lock
);
3244 r
= kvm_mmu_unprotect_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
3245 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3248 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt
);
3250 void __kvm_mmu_free_some_pages(struct kvm_vcpu
*vcpu
)
3252 LIST_HEAD(invalid_list
);
3254 while (kvm_mmu_available_pages(vcpu
->kvm
) < KVM_REFILL_PAGES
&&
3255 !list_empty(&vcpu
->kvm
->arch
.active_mmu_pages
)) {
3256 struct kvm_mmu_page
*sp
;
3258 sp
= container_of(vcpu
->kvm
->arch
.active_mmu_pages
.prev
,
3259 struct kvm_mmu_page
, link
);
3260 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, &invalid_list
);
3261 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
3262 ++vcpu
->kvm
->stat
.mmu_recycled
;
3266 int kvm_mmu_page_fault(struct kvm_vcpu
*vcpu
, gva_t cr2
, u32 error_code
)
3269 enum emulation_result er
;
3271 r
= vcpu
->arch
.mmu
.page_fault(vcpu
, cr2
, error_code
);
3280 r
= mmu_topup_memory_caches(vcpu
);
3284 er
= emulate_instruction(vcpu
, cr2
, error_code
, 0);
3289 case EMULATE_DO_MMIO
:
3290 ++vcpu
->stat
.mmio_exits
;
3300 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault
);
3302 void kvm_mmu_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
3304 vcpu
->arch
.mmu
.invlpg(vcpu
, gva
);
3305 kvm_mmu_flush_tlb(vcpu
);
3306 ++vcpu
->stat
.invlpg
;
3308 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg
);
3310 void kvm_enable_tdp(void)
3314 EXPORT_SYMBOL_GPL(kvm_enable_tdp
);
3316 void kvm_disable_tdp(void)
3318 tdp_enabled
= false;
3320 EXPORT_SYMBOL_GPL(kvm_disable_tdp
);
3322 static void free_mmu_pages(struct kvm_vcpu
*vcpu
)
3324 free_page((unsigned long)vcpu
->arch
.mmu
.pae_root
);
3325 if (vcpu
->arch
.mmu
.lm_root
!= NULL
)
3326 free_page((unsigned long)vcpu
->arch
.mmu
.lm_root
);
3329 static int alloc_mmu_pages(struct kvm_vcpu
*vcpu
)
3337 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
3338 * Therefore we need to allocate shadow page tables in the first
3339 * 4GB of memory, which happens to fit the DMA32 zone.
3341 page
= alloc_page(GFP_KERNEL
| __GFP_DMA32
);
3345 vcpu
->arch
.mmu
.pae_root
= page_address(page
);
3346 for (i
= 0; i
< 4; ++i
)
3347 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
3352 int kvm_mmu_create(struct kvm_vcpu
*vcpu
)
3355 ASSERT(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3357 return alloc_mmu_pages(vcpu
);
3360 int kvm_mmu_setup(struct kvm_vcpu
*vcpu
)
3363 ASSERT(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3365 return init_kvm_mmu(vcpu
);
3368 void kvm_mmu_slot_remove_write_access(struct kvm
*kvm
, int slot
)
3370 struct kvm_mmu_page
*sp
;
3372 list_for_each_entry(sp
, &kvm
->arch
.active_mmu_pages
, link
) {
3376 if (!test_bit(slot
, sp
->slot_bitmap
))
3380 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
3382 if (is_writable_pte(pt
[i
]))
3383 pt
[i
] &= ~PT_WRITABLE_MASK
;
3385 kvm_flush_remote_tlbs(kvm
);
3388 void kvm_mmu_zap_all(struct kvm
*kvm
)
3390 struct kvm_mmu_page
*sp
, *node
;
3391 LIST_HEAD(invalid_list
);
3393 spin_lock(&kvm
->mmu_lock
);
3395 list_for_each_entry_safe(sp
, node
, &kvm
->arch
.active_mmu_pages
, link
)
3396 if (kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
))
3399 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
3400 spin_unlock(&kvm
->mmu_lock
);
3403 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm
*kvm
,
3404 struct list_head
*invalid_list
)
3406 struct kvm_mmu_page
*page
;
3408 page
= container_of(kvm
->arch
.active_mmu_pages
.prev
,
3409 struct kvm_mmu_page
, link
);
3410 return kvm_mmu_prepare_zap_page(kvm
, page
, invalid_list
);
3413 static int mmu_shrink(struct shrinker
*shrink
, int nr_to_scan
, gfp_t gfp_mask
)
3416 struct kvm
*kvm_freed
= NULL
;
3418 if (nr_to_scan
== 0)
3421 spin_lock(&kvm_lock
);
3423 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
3424 int idx
, freed_pages
;
3425 LIST_HEAD(invalid_list
);
3427 idx
= srcu_read_lock(&kvm
->srcu
);
3428 spin_lock(&kvm
->mmu_lock
);
3429 if (!kvm_freed
&& nr_to_scan
> 0 &&
3430 kvm
->arch
.n_used_mmu_pages
> 0) {
3431 freed_pages
= kvm_mmu_remove_some_alloc_mmu_pages(kvm
,
3437 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
3438 spin_unlock(&kvm
->mmu_lock
);
3439 srcu_read_unlock(&kvm
->srcu
, idx
);
3442 list_move_tail(&kvm_freed
->vm_list
, &vm_list
);
3444 spin_unlock(&kvm_lock
);
3447 return percpu_counter_read_positive(&kvm_total_used_mmu_pages
);
3450 static struct shrinker mmu_shrinker
= {
3451 .shrink
= mmu_shrink
,
3452 .seeks
= DEFAULT_SEEKS
* 10,
3455 static void mmu_destroy_caches(void)
3457 if (pte_chain_cache
)
3458 kmem_cache_destroy(pte_chain_cache
);
3459 if (rmap_desc_cache
)
3460 kmem_cache_destroy(rmap_desc_cache
);
3461 if (mmu_page_header_cache
)
3462 kmem_cache_destroy(mmu_page_header_cache
);
3465 void kvm_mmu_module_exit(void)
3467 mmu_destroy_caches();
3468 percpu_counter_destroy(&kvm_total_used_mmu_pages
);
3469 unregister_shrinker(&mmu_shrinker
);
3472 int kvm_mmu_module_init(void)
3474 pte_chain_cache
= kmem_cache_create("kvm_pte_chain",
3475 sizeof(struct kvm_pte_chain
),
3477 if (!pte_chain_cache
)
3479 rmap_desc_cache
= kmem_cache_create("kvm_rmap_desc",
3480 sizeof(struct kvm_rmap_desc
),
3482 if (!rmap_desc_cache
)
3485 mmu_page_header_cache
= kmem_cache_create("kvm_mmu_page_header",
3486 sizeof(struct kvm_mmu_page
),
3488 if (!mmu_page_header_cache
)
3491 if (percpu_counter_init(&kvm_total_used_mmu_pages
, 0))
3494 register_shrinker(&mmu_shrinker
);
3499 mmu_destroy_caches();
3504 * Caculate mmu pages needed for kvm.
3506 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm
*kvm
)
3509 unsigned int nr_mmu_pages
;
3510 unsigned int nr_pages
= 0;
3511 struct kvm_memslots
*slots
;
3513 slots
= kvm_memslots(kvm
);
3515 for (i
= 0; i
< slots
->nmemslots
; i
++)
3516 nr_pages
+= slots
->memslots
[i
].npages
;
3518 nr_mmu_pages
= nr_pages
* KVM_PERMILLE_MMU_PAGES
/ 1000;
3519 nr_mmu_pages
= max(nr_mmu_pages
,
3520 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES
);
3522 return nr_mmu_pages
;
3525 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer
*buffer
,
3528 if (len
> buffer
->len
)
3533 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer
*buffer
,
3538 ret
= pv_mmu_peek_buffer(buffer
, len
);
3543 buffer
->processed
+= len
;
3547 static int kvm_pv_mmu_write(struct kvm_vcpu
*vcpu
,
3548 gpa_t addr
, gpa_t value
)
3553 if (!is_long_mode(vcpu
) && !is_pae(vcpu
))
3556 r
= mmu_topup_memory_caches(vcpu
);
3560 if (!emulator_write_phys(vcpu
, addr
, &value
, bytes
))
3566 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu
*vcpu
)
3568 (void)kvm_set_cr3(vcpu
, vcpu
->arch
.cr3
);
3572 static int kvm_pv_mmu_release_pt(struct kvm_vcpu
*vcpu
, gpa_t addr
)
3574 spin_lock(&vcpu
->kvm
->mmu_lock
);
3575 mmu_unshadow(vcpu
->kvm
, addr
>> PAGE_SHIFT
);
3576 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3580 static int kvm_pv_mmu_op_one(struct kvm_vcpu
*vcpu
,
3581 struct kvm_pv_mmu_op_buffer
*buffer
)
3583 struct kvm_mmu_op_header
*header
;
3585 header
= pv_mmu_peek_buffer(buffer
, sizeof *header
);
3588 switch (header
->op
) {
3589 case KVM_MMU_OP_WRITE_PTE
: {
3590 struct kvm_mmu_op_write_pte
*wpte
;
3592 wpte
= pv_mmu_read_buffer(buffer
, sizeof *wpte
);
3595 return kvm_pv_mmu_write(vcpu
, wpte
->pte_phys
,
3598 case KVM_MMU_OP_FLUSH_TLB
: {
3599 struct kvm_mmu_op_flush_tlb
*ftlb
;
3601 ftlb
= pv_mmu_read_buffer(buffer
, sizeof *ftlb
);
3604 return kvm_pv_mmu_flush_tlb(vcpu
);
3606 case KVM_MMU_OP_RELEASE_PT
: {
3607 struct kvm_mmu_op_release_pt
*rpt
;
3609 rpt
= pv_mmu_read_buffer(buffer
, sizeof *rpt
);
3612 return kvm_pv_mmu_release_pt(vcpu
, rpt
->pt_phys
);
3618 int kvm_pv_mmu_op(struct kvm_vcpu
*vcpu
, unsigned long bytes
,
3619 gpa_t addr
, unsigned long *ret
)
3622 struct kvm_pv_mmu_op_buffer
*buffer
= &vcpu
->arch
.mmu_op_buffer
;
3624 buffer
->ptr
= buffer
->buf
;
3625 buffer
->len
= min_t(unsigned long, bytes
, sizeof buffer
->buf
);
3626 buffer
->processed
= 0;
3628 r
= kvm_read_guest(vcpu
->kvm
, addr
, buffer
->buf
, buffer
->len
);
3632 while (buffer
->len
) {
3633 r
= kvm_pv_mmu_op_one(vcpu
, buffer
);
3642 *ret
= buffer
->processed
;
3646 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu
*vcpu
, u64 addr
, u64 sptes
[4])
3648 struct kvm_shadow_walk_iterator iterator
;
3651 spin_lock(&vcpu
->kvm
->mmu_lock
);
3652 for_each_shadow_entry(vcpu
, addr
, iterator
) {
3653 sptes
[iterator
.level
-1] = *iterator
.sptep
;
3655 if (!is_shadow_present_pte(*iterator
.sptep
))
3658 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3662 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy
);
3664 #ifdef CONFIG_KVM_MMU_AUDIT
3665 #include "mmu_audit.c"
3667 static void mmu_audit_disable(void) { }
3670 void kvm_mmu_destroy(struct kvm_vcpu
*vcpu
)
3674 destroy_kvm_mmu(vcpu
);
3675 free_mmu_pages(vcpu
);
3676 mmu_free_memory_caches(vcpu
);
3677 mmu_audit_disable();