projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
KVM: MMU: cleanup for function unaccount_shadowed()
[deliverable/linux.git] / arch / x86 / kvm / mmu.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
19
20 #include "mmu.h"
21 #include "x86.h"
22 #include "kvm_cache_regs.h"
23
24 #include <linux/kvm_host.h>
25 #include <linux/types.h>
26 #include <linux/string.h>
27 #include <linux/mm.h>
28 #include <linux/highmem.h>
29 #include <linux/module.h>
30 #include <linux/swap.h>
31 #include <linux/hugetlb.h>
32 #include <linux/compiler.h>
33 #include <linux/srcu.h>
34 #include <linux/slab.h>
35
36 #include <asm/page.h>
37 #include <asm/cmpxchg.h>
38 #include <asm/io.h>
39 #include <asm/vmx.h>
40
41 /*
42 * When setting this variable to true it enables Two-Dimensional-Paging
43 * where the hardware walks 2 page tables:
44 * 1. the guest-virtual to guest-physical
45 * 2. while doing 1. it walks guest-physical to host-physical
46 * If the hardware supports that we don't need to do shadow paging.
47 */
48 bool tdp_enabled = false;
49
50 #undef MMU_DEBUG
51
52 #undef AUDIT
53
54 #ifdef AUDIT
55 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
56 #else
57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
58 #endif
59
60 #ifdef MMU_DEBUG
61
62 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
63 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
64
65 #else
66
67 #define pgprintk(x...) do { } while (0)
68 #define rmap_printk(x...) do { } while (0)
69
70 #endif
71
72 #if defined(MMU_DEBUG) || defined(AUDIT)
73 static int dbg = 0;
74 module_param(dbg, bool, 0644);
75 #endif
76
77 static int oos_shadow = 1;
78 module_param(oos_shadow, bool, 0644);
79
80 #ifndef MMU_DEBUG
81 #define ASSERT(x) do { } while (0)
82 #else
83 #define ASSERT(x) \
84 if (!(x)) { \
85 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
86 __FILE__, __LINE__, #x); \
87 }
88 #endif
89
90 #define PT_FIRST_AVAIL_BITS_SHIFT 9
91 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
92
93 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
94
95 #define PT64_LEVEL_BITS 9
96
97 #define PT64_LEVEL_SHIFT(level) \
98 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
99
100 #define PT64_LEVEL_MASK(level) \
101 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
102
103 #define PT64_INDEX(address, level)\
104 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
105
106
107 #define PT32_LEVEL_BITS 10
108
109 #define PT32_LEVEL_SHIFT(level) \
110 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
111
112 #define PT32_LEVEL_MASK(level) \
113 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
114 #define PT32_LVL_OFFSET_MASK(level) \
115 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
116 * PT32_LEVEL_BITS))) - 1))
117
118 #define PT32_INDEX(address, level)\
119 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
120
121
122 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
123 #define PT64_DIR_BASE_ADDR_MASK \
124 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
125 #define PT64_LVL_ADDR_MASK(level) \
126 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
127 * PT64_LEVEL_BITS))) - 1))
128 #define PT64_LVL_OFFSET_MASK(level) \
129 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
130 * PT64_LEVEL_BITS))) - 1))
131
132 #define PT32_BASE_ADDR_MASK PAGE_MASK
133 #define PT32_DIR_BASE_ADDR_MASK \
134 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
135 #define PT32_LVL_ADDR_MASK(level) \
136 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
137 * PT32_LEVEL_BITS))) - 1))
138
139 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
140 | PT64_NX_MASK)
141
142 #define RMAP_EXT 4
143
144 #define ACC_EXEC_MASK 1
145 #define ACC_WRITE_MASK PT_WRITABLE_MASK
146 #define ACC_USER_MASK PT_USER_MASK
147 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
148
149 #include <trace/events/kvm.h>
150
151 #define CREATE_TRACE_POINTS
152 #include "mmutrace.h"
153
154 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
155
156 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
157
158 struct kvm_rmap_desc {
159 u64 *sptes[RMAP_EXT];
160 struct kvm_rmap_desc *more;
161 };
162
163 struct kvm_shadow_walk_iterator {
164 u64 addr;
165 hpa_t shadow_addr;
166 int level;
167 u64 *sptep;
168 unsigned index;
169 };
170
171 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
172 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
173 shadow_walk_okay(&(_walker)); \
174 shadow_walk_next(&(_walker)))
175
176 typedef int (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp);
177
178 static struct kmem_cache *pte_chain_cache;
179 static struct kmem_cache *rmap_desc_cache;
180 static struct kmem_cache *mmu_page_header_cache;
181
182 static u64 __read_mostly shadow_trap_nonpresent_pte;
183 static u64 __read_mostly shadow_notrap_nonpresent_pte;
184 static u64 __read_mostly shadow_base_present_pte;
185 static u64 __read_mostly shadow_nx_mask;
186 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
187 static u64 __read_mostly shadow_user_mask;
188 static u64 __read_mostly shadow_accessed_mask;
189 static u64 __read_mostly shadow_dirty_mask;
190
191 static inline u64 rsvd_bits(int s, int e)
192 {
193 return ((1ULL << (e - s + 1)) - 1) << s;
194 }
195
196 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
197 {
198 shadow_trap_nonpresent_pte = trap_pte;
199 shadow_notrap_nonpresent_pte = notrap_pte;
200 }
201 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
202
203 void kvm_mmu_set_base_ptes(u64 base_pte)
204 {
205 shadow_base_present_pte = base_pte;
206 }
207 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
208
209 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
210 u64 dirty_mask, u64 nx_mask, u64 x_mask)
211 {
212 shadow_user_mask = user_mask;
213 shadow_accessed_mask = accessed_mask;
214 shadow_dirty_mask = dirty_mask;
215 shadow_nx_mask = nx_mask;
216 shadow_x_mask = x_mask;
217 }
218 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
219
220 static int is_write_protection(struct kvm_vcpu *vcpu)
221 {
222 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
223 }
224
225 static int is_cpuid_PSE36(void)
226 {
227 return 1;
228 }
229
230 static int is_nx(struct kvm_vcpu *vcpu)
231 {
232 return vcpu->arch.efer & EFER_NX;
233 }
234
235 static int is_shadow_present_pte(u64 pte)
236 {
237 return pte != shadow_trap_nonpresent_pte
238 && pte != shadow_notrap_nonpresent_pte;
239 }
240
241 static int is_large_pte(u64 pte)
242 {
243 return pte & PT_PAGE_SIZE_MASK;
244 }
245
246 static int is_writable_pte(unsigned long pte)
247 {
248 return pte & PT_WRITABLE_MASK;
249 }
250
251 static int is_dirty_gpte(unsigned long pte)
252 {
253 return pte & PT_DIRTY_MASK;
254 }
255
256 static int is_rmap_spte(u64 pte)
257 {
258 return is_shadow_present_pte(pte);
259 }
260
261 static int is_last_spte(u64 pte, int level)
262 {
263 if (level == PT_PAGE_TABLE_LEVEL)
264 return 1;
265 if (is_large_pte(pte))
266 return 1;
267 return 0;
268 }
269
270 static pfn_t spte_to_pfn(u64 pte)
271 {
272 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
273 }
274
275 static gfn_t pse36_gfn_delta(u32 gpte)
276 {
277 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
278
279 return (gpte & PT32_DIR_PSE36_MASK) << shift;
280 }
281
282 static void __set_spte(u64 *sptep, u64 spte)
283 {
284 #ifdef CONFIG_X86_64
285 set_64bit((unsigned long *)sptep, spte);
286 #else
287 set_64bit((unsigned long long *)sptep, spte);
288 #endif
289 }
290
291 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
292 struct kmem_cache *base_cache, int min)
293 {
294 void *obj;
295
296 if (cache->nobjs >= min)
297 return 0;
298 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
299 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
300 if (!obj)
301 return -ENOMEM;
302 cache->objects[cache->nobjs++] = obj;
303 }
304 return 0;
305 }
306
307 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
308 {
309 while (mc->nobjs)
310 kfree(mc->objects[--mc->nobjs]);
311 }
312
313 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
314 int min)
315 {
316 struct page *page;
317
318 if (cache->nobjs >= min)
319 return 0;
320 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
321 page = alloc_page(GFP_KERNEL);
322 if (!page)
323 return -ENOMEM;
324 cache->objects[cache->nobjs++] = page_address(page);
325 }
326 return 0;
327 }
328
329 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
330 {
331 while (mc->nobjs)
332 free_page((unsigned long)mc->objects[--mc->nobjs]);
333 }
334
335 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
336 {
337 int r;
338
339 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
340 pte_chain_cache, 4);
341 if (r)
342 goto out;
343 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
344 rmap_desc_cache, 4);
345 if (r)
346 goto out;
347 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
348 if (r)
349 goto out;
350 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
351 mmu_page_header_cache, 4);
352 out:
353 return r;
354 }
355
356 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
357 {
358 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
359 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
360 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
361 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
362 }
363
364 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
365 size_t size)
366 {
367 void *p;
368
369 BUG_ON(!mc->nobjs);
370 p = mc->objects[--mc->nobjs];
371 return p;
372 }
373
374 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
375 {
376 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
377 sizeof(struct kvm_pte_chain));
378 }
379
380 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
381 {
382 kfree(pc);
383 }
384
385 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
386 {
387 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
388 sizeof(struct kvm_rmap_desc));
389 }
390
391 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
392 {
393 kfree(rd);
394 }
395
396 /*
397 * Return the pointer to the largepage write count for a given
398 * gfn, handling slots that are not large page aligned.
399 */
400 static int *slot_largepage_idx(gfn_t gfn,
401 struct kvm_memory_slot *slot,
402 int level)
403 {
404 unsigned long idx;
405
406 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
407 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
408 return &slot->lpage_info[level - 2][idx].write_count;
409 }
410
411 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
412 {
413 struct kvm_memory_slot *slot;
414 int *write_count;
415 int i;
416
417 gfn = unalias_gfn(kvm, gfn);
418
419 slot = gfn_to_memslot_unaliased(kvm, gfn);
420 for (i = PT_DIRECTORY_LEVEL;
421 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
422 write_count = slot_largepage_idx(gfn, slot, i);
423 *write_count += 1;
424 }
425 }
426
427 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
428 {
429 struct kvm_memory_slot *slot;
430 int *write_count;
431 int i;
432
433 gfn = unalias_gfn(kvm, gfn);
434 slot = gfn_to_memslot_unaliased(kvm, gfn);
435 for (i = PT_DIRECTORY_LEVEL;
436 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
437 write_count = slot_largepage_idx(gfn, slot, i);
438 *write_count -= 1;
439 WARN_ON(*write_count < 0);
440 }
441 }
442
443 static int has_wrprotected_page(struct kvm *kvm,
444 gfn_t gfn,
445 int level)
446 {
447 struct kvm_memory_slot *slot;
448 int *largepage_idx;
449
450 gfn = unalias_gfn(kvm, gfn);
451 slot = gfn_to_memslot_unaliased(kvm, gfn);
452 if (slot) {
453 largepage_idx = slot_largepage_idx(gfn, slot, level);
454 return *largepage_idx;
455 }
456
457 return 1;
458 }
459
460 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
461 {
462 unsigned long page_size;
463 int i, ret = 0;
464
465 page_size = kvm_host_page_size(kvm, gfn);
466
467 for (i = PT_PAGE_TABLE_LEVEL;
468 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
469 if (page_size >= KVM_HPAGE_SIZE(i))
470 ret = i;
471 else
472 break;
473 }
474
475 return ret;
476 }
477
478 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
479 {
480 struct kvm_memory_slot *slot;
481 int host_level, level, max_level;
482
483 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
484 if (slot && slot->dirty_bitmap)
485 return PT_PAGE_TABLE_LEVEL;
486
487 host_level = host_mapping_level(vcpu->kvm, large_gfn);
488
489 if (host_level == PT_PAGE_TABLE_LEVEL)
490 return host_level;
491
492 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
493 kvm_x86_ops->get_lpage_level() : host_level;
494
495 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
496 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
497 break;
498
499 return level - 1;
500 }
501
502 /*
503 * Take gfn and return the reverse mapping to it.
504 * Note: gfn must be unaliased before this function get called
505 */
506
507 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
508 {
509 struct kvm_memory_slot *slot;
510 unsigned long idx;
511
512 slot = gfn_to_memslot(kvm, gfn);
513 if (likely(level == PT_PAGE_TABLE_LEVEL))
514 return &slot->rmap[gfn - slot->base_gfn];
515
516 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
517 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
518
519 return &slot->lpage_info[level - 2][idx].rmap_pde;
520 }
521
522 /*
523 * Reverse mapping data structures:
524 *
525 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
526 * that points to page_address(page).
527 *
528 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
529 * containing more mappings.
530 *
531 * Returns the number of rmap entries before the spte was added or zero if
532 * the spte was not added.
533 *
534 */
535 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
536 {
537 struct kvm_mmu_page *sp;
538 struct kvm_rmap_desc *desc;
539 unsigned long *rmapp;
540 int i, count = 0;
541
542 if (!is_rmap_spte(*spte))
543 return count;
544 gfn = unalias_gfn(vcpu->kvm, gfn);
545 sp = page_header(__pa(spte));
546 sp->gfns[spte - sp->spt] = gfn;
547 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
548 if (!*rmapp) {
549 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
550 *rmapp = (unsigned long)spte;
551 } else if (!(*rmapp & 1)) {
552 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
553 desc = mmu_alloc_rmap_desc(vcpu);
554 desc->sptes[0] = (u64 *)*rmapp;
555 desc->sptes[1] = spte;
556 *rmapp = (unsigned long)desc | 1;
557 } else {
558 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
559 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
560 while (desc->sptes[RMAP_EXT-1] && desc->more) {
561 desc = desc->more;
562 count += RMAP_EXT;
563 }
564 if (desc->sptes[RMAP_EXT-1]) {
565 desc->more = mmu_alloc_rmap_desc(vcpu);
566 desc = desc->more;
567 }
568 for (i = 0; desc->sptes[i]; ++i)
569 ;
570 desc->sptes[i] = spte;
571 }
572 return count;
573 }
574
575 static void rmap_desc_remove_entry(unsigned long *rmapp,
576 struct kvm_rmap_desc *desc,
577 int i,
578 struct kvm_rmap_desc *prev_desc)
579 {
580 int j;
581
582 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
583 ;
584 desc->sptes[i] = desc->sptes[j];
585 desc->sptes[j] = NULL;
586 if (j != 0)
587 return;
588 if (!prev_desc && !desc->more)
589 *rmapp = (unsigned long)desc->sptes[0];
590 else
591 if (prev_desc)
592 prev_desc->more = desc->more;
593 else
594 *rmapp = (unsigned long)desc->more | 1;
595 mmu_free_rmap_desc(desc);
596 }
597
598 static void rmap_remove(struct kvm *kvm, u64 *spte)
599 {
600 struct kvm_rmap_desc *desc;
601 struct kvm_rmap_desc *prev_desc;
602 struct kvm_mmu_page *sp;
603 pfn_t pfn;
604 unsigned long *rmapp;
605 int i;
606
607 if (!is_rmap_spte(*spte))
608 return;
609 sp = page_header(__pa(spte));
610 pfn = spte_to_pfn(*spte);
611 if (*spte & shadow_accessed_mask)
612 kvm_set_pfn_accessed(pfn);
613 if (is_writable_pte(*spte))
614 kvm_set_pfn_dirty(pfn);
615 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
616 if (!*rmapp) {
617 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
618 BUG();
619 } else if (!(*rmapp & 1)) {
620 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
621 if ((u64 *)*rmapp != spte) {
622 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
623 spte, *spte);
624 BUG();
625 }
626 *rmapp = 0;
627 } else {
628 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
629 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
630 prev_desc = NULL;
631 while (desc) {
632 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
633 if (desc->sptes[i] == spte) {
634 rmap_desc_remove_entry(rmapp,
635 desc, i,
636 prev_desc);
637 return;
638 }
639 prev_desc = desc;
640 desc = desc->more;
641 }
642 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
643 BUG();
644 }
645 }
646
647 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
648 {
649 struct kvm_rmap_desc *desc;
650 u64 *prev_spte;
651 int i;
652
653 if (!*rmapp)
654 return NULL;
655 else if (!(*rmapp & 1)) {
656 if (!spte)
657 return (u64 *)*rmapp;
658 return NULL;
659 }
660 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
661 prev_spte = NULL;
662 while (desc) {
663 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
664 if (prev_spte == spte)
665 return desc->sptes[i];
666 prev_spte = desc->sptes[i];
667 }
668 desc = desc->more;
669 }
670 return NULL;
671 }
672
673 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
674 {
675 unsigned long *rmapp;
676 u64 *spte;
677 int i, write_protected = 0;
678
679 gfn = unalias_gfn(kvm, gfn);
680 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
681
682 spte = rmap_next(kvm, rmapp, NULL);
683 while (spte) {
684 BUG_ON(!spte);
685 BUG_ON(!(*spte & PT_PRESENT_MASK));
686 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
687 if (is_writable_pte(*spte)) {
688 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
689 write_protected = 1;
690 }
691 spte = rmap_next(kvm, rmapp, spte);
692 }
693 if (write_protected) {
694 pfn_t pfn;
695
696 spte = rmap_next(kvm, rmapp, NULL);
697 pfn = spte_to_pfn(*spte);
698 kvm_set_pfn_dirty(pfn);
699 }
700
701 /* check for huge page mappings */
702 for (i = PT_DIRECTORY_LEVEL;
703 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
704 rmapp = gfn_to_rmap(kvm, gfn, i);
705 spte = rmap_next(kvm, rmapp, NULL);
706 while (spte) {
707 BUG_ON(!spte);
708 BUG_ON(!(*spte & PT_PRESENT_MASK));
709 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
710 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
711 if (is_writable_pte(*spte)) {
712 rmap_remove(kvm, spte);
713 --kvm->stat.lpages;
714 __set_spte(spte, shadow_trap_nonpresent_pte);
715 spte = NULL;
716 write_protected = 1;
717 }
718 spte = rmap_next(kvm, rmapp, spte);
719 }
720 }
721
722 return write_protected;
723 }
724
725 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
726 unsigned long data)
727 {
728 u64 *spte;
729 int need_tlb_flush = 0;
730
731 while ((spte = rmap_next(kvm, rmapp, NULL))) {
732 BUG_ON(!(*spte & PT_PRESENT_MASK));
733 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
734 rmap_remove(kvm, spte);
735 __set_spte(spte, shadow_trap_nonpresent_pte);
736 need_tlb_flush = 1;
737 }
738 return need_tlb_flush;
739 }
740
741 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
742 unsigned long data)
743 {
744 int need_flush = 0;
745 u64 *spte, new_spte;
746 pte_t *ptep = (pte_t *)data;
747 pfn_t new_pfn;
748
749 WARN_ON(pte_huge(*ptep));
750 new_pfn = pte_pfn(*ptep);
751 spte = rmap_next(kvm, rmapp, NULL);
752 while (spte) {
753 BUG_ON(!is_shadow_present_pte(*spte));
754 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
755 need_flush = 1;
756 if (pte_write(*ptep)) {
757 rmap_remove(kvm, spte);
758 __set_spte(spte, shadow_trap_nonpresent_pte);
759 spte = rmap_next(kvm, rmapp, NULL);
760 } else {
761 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
762 new_spte |= (u64)new_pfn << PAGE_SHIFT;
763
764 new_spte &= ~PT_WRITABLE_MASK;
765 new_spte &= ~SPTE_HOST_WRITEABLE;
766 if (is_writable_pte(*spte))
767 kvm_set_pfn_dirty(spte_to_pfn(*spte));
768 __set_spte(spte, new_spte);
769 spte = rmap_next(kvm, rmapp, spte);
770 }
771 }
772 if (need_flush)
773 kvm_flush_remote_tlbs(kvm);
774
775 return 0;
776 }
777
778 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
779 unsigned long data,
780 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
781 unsigned long data))
782 {
783 int i, j;
784 int ret;
785 int retval = 0;
786 struct kvm_memslots *slots;
787
788 slots = kvm_memslots(kvm);
789
790 for (i = 0; i < slots->nmemslots; i++) {
791 struct kvm_memory_slot *memslot = &slots->memslots[i];
792 unsigned long start = memslot->userspace_addr;
793 unsigned long end;
794
795 end = start + (memslot->npages << PAGE_SHIFT);
796 if (hva >= start && hva < end) {
797 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
798
799 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
800
801 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
802 int idx = gfn_offset;
803 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
804 ret |= handler(kvm,
805 &memslot->lpage_info[j][idx].rmap_pde,
806 data);
807 }
808 trace_kvm_age_page(hva, memslot, ret);
809 retval |= ret;
810 }
811 }
812
813 return retval;
814 }
815
816 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
817 {
818 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
819 }
820
821 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
822 {
823 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
824 }
825
826 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
827 unsigned long data)
828 {
829 u64 *spte;
830 int young = 0;
831
832 /*
833 * Emulate the accessed bit for EPT, by checking if this page has
834 * an EPT mapping, and clearing it if it does. On the next access,
835 * a new EPT mapping will be established.
836 * This has some overhead, but not as much as the cost of swapping
837 * out actively used pages or breaking up actively used hugepages.
838 */
839 if (!shadow_accessed_mask)
840 return kvm_unmap_rmapp(kvm, rmapp, data);
841
842 spte = rmap_next(kvm, rmapp, NULL);
843 while (spte) {
844 int _young;
845 u64 _spte = *spte;
846 BUG_ON(!(_spte & PT_PRESENT_MASK));
847 _young = _spte & PT_ACCESSED_MASK;
848 if (_young) {
849 young = 1;
850 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
851 }
852 spte = rmap_next(kvm, rmapp, spte);
853 }
854 return young;
855 }
856
857 #define RMAP_RECYCLE_THRESHOLD 1000
858
859 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
860 {
861 unsigned long *rmapp;
862 struct kvm_mmu_page *sp;
863
864 sp = page_header(__pa(spte));
865
866 gfn = unalias_gfn(vcpu->kvm, gfn);
867 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
868
869 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
870 kvm_flush_remote_tlbs(vcpu->kvm);
871 }
872
873 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
874 {
875 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
876 }
877
878 #ifdef MMU_DEBUG
879 static int is_empty_shadow_page(u64 *spt)
880 {
881 u64 *pos;
882 u64 *end;
883
884 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
885 if (is_shadow_present_pte(*pos)) {
886 printk(KERN_ERR "%s: %p %llx\n", __func__,
887 pos, *pos);
888 return 0;
889 }
890 return 1;
891 }
892 #endif
893
894 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
895 {
896 ASSERT(is_empty_shadow_page(sp->spt));
897 list_del(&sp->link);
898 __free_page(virt_to_page(sp->spt));
899 __free_page(virt_to_page(sp->gfns));
900 kfree(sp);
901 ++kvm->arch.n_free_mmu_pages;
902 }
903
904 static unsigned kvm_page_table_hashfn(gfn_t gfn)
905 {
906 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
907 }
908
909 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
910 u64 *parent_pte)
911 {
912 struct kvm_mmu_page *sp;
913
914 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
915 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
916 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
917 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
918 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
919 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
920 sp->multimapped = 0;
921 sp->parent_pte = parent_pte;
922 --vcpu->kvm->arch.n_free_mmu_pages;
923 return sp;
924 }
925
926 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
927 struct kvm_mmu_page *sp, u64 *parent_pte)
928 {
929 struct kvm_pte_chain *pte_chain;
930 struct hlist_node *node;
931 int i;
932
933 if (!parent_pte)
934 return;
935 if (!sp->multimapped) {
936 u64 *old = sp->parent_pte;
937
938 if (!old) {
939 sp->parent_pte = parent_pte;
940 return;
941 }
942 sp->multimapped = 1;
943 pte_chain = mmu_alloc_pte_chain(vcpu);
944 INIT_HLIST_HEAD(&sp->parent_ptes);
945 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
946 pte_chain->parent_ptes[0] = old;
947 }
948 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
949 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
950 continue;
951 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
952 if (!pte_chain->parent_ptes[i]) {
953 pte_chain->parent_ptes[i] = parent_pte;
954 return;
955 }
956 }
957 pte_chain = mmu_alloc_pte_chain(vcpu);
958 BUG_ON(!pte_chain);
959 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
960 pte_chain->parent_ptes[0] = parent_pte;
961 }
962
963 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
964 u64 *parent_pte)
965 {
966 struct kvm_pte_chain *pte_chain;
967 struct hlist_node *node;
968 int i;
969
970 if (!sp->multimapped) {
971 BUG_ON(sp->parent_pte != parent_pte);
972 sp->parent_pte = NULL;
973 return;
974 }
975 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
976 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
977 if (!pte_chain->parent_ptes[i])
978 break;
979 if (pte_chain->parent_ptes[i] != parent_pte)
980 continue;
981 while (i + 1 < NR_PTE_CHAIN_ENTRIES
982 && pte_chain->parent_ptes[i + 1]) {
983 pte_chain->parent_ptes[i]
984 = pte_chain->parent_ptes[i + 1];
985 ++i;
986 }
987 pte_chain->parent_ptes[i] = NULL;
988 if (i == 0) {
989 hlist_del(&pte_chain->link);
990 mmu_free_pte_chain(pte_chain);
991 if (hlist_empty(&sp->parent_ptes)) {
992 sp->multimapped = 0;
993 sp->parent_pte = NULL;
994 }
995 }
996 return;
997 }
998 BUG();
999 }
1000
1001
1002 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1003 {
1004 struct kvm_pte_chain *pte_chain;
1005 struct hlist_node *node;
1006 struct kvm_mmu_page *parent_sp;
1007 int i;
1008
1009 if (!sp->multimapped && sp->parent_pte) {
1010 parent_sp = page_header(__pa(sp->parent_pte));
1011 fn(parent_sp);
1012 mmu_parent_walk(parent_sp, fn);
1013 return;
1014 }
1015 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1016 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1017 if (!pte_chain->parent_ptes[i])
1018 break;
1019 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1020 fn(parent_sp);
1021 mmu_parent_walk(parent_sp, fn);
1022 }
1023 }
1024
1025 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1026 {
1027 unsigned int index;
1028 struct kvm_mmu_page *sp = page_header(__pa(spte));
1029
1030 index = spte - sp->spt;
1031 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1032 sp->unsync_children++;
1033 WARN_ON(!sp->unsync_children);
1034 }
1035
1036 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1037 {
1038 struct kvm_pte_chain *pte_chain;
1039 struct hlist_node *node;
1040 int i;
1041
1042 if (!sp->parent_pte)
1043 return;
1044
1045 if (!sp->multimapped) {
1046 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1047 return;
1048 }
1049
1050 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1051 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1052 if (!pte_chain->parent_ptes[i])
1053 break;
1054 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1055 }
1056 }
1057
1058 static int unsync_walk_fn(struct kvm_mmu_page *sp)
1059 {
1060 kvm_mmu_update_parents_unsync(sp);
1061 return 1;
1062 }
1063
1064 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1065 {
1066 mmu_parent_walk(sp, unsync_walk_fn);
1067 kvm_mmu_update_parents_unsync(sp);
1068 }
1069
1070 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1071 struct kvm_mmu_page *sp)
1072 {
1073 int i;
1074
1075 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1076 sp->spt[i] = shadow_trap_nonpresent_pte;
1077 }
1078
1079 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1080 struct kvm_mmu_page *sp)
1081 {
1082 return 1;
1083 }
1084
1085 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1086 {
1087 }
1088
1089 #define KVM_PAGE_ARRAY_NR 16
1090
1091 struct kvm_mmu_pages {
1092 struct mmu_page_and_offset {
1093 struct kvm_mmu_page *sp;
1094 unsigned int idx;
1095 } page[KVM_PAGE_ARRAY_NR];
1096 unsigned int nr;
1097 };
1098
1099 #define for_each_unsync_children(bitmap, idx) \
1100 for (idx = find_first_bit(bitmap, 512); \
1101 idx < 512; \
1102 idx = find_next_bit(bitmap, 512, idx+1))
1103
1104 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1105 int idx)
1106 {
1107 int i;
1108
1109 if (sp->unsync)
1110 for (i=0; i < pvec->nr; i++)
1111 if (pvec->page[i].sp == sp)
1112 return 0;
1113
1114 pvec->page[pvec->nr].sp = sp;
1115 pvec->page[pvec->nr].idx = idx;
1116 pvec->nr++;
1117 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1118 }
1119
1120 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1121 struct kvm_mmu_pages *pvec)
1122 {
1123 int i, ret, nr_unsync_leaf = 0;
1124
1125 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1126 u64 ent = sp->spt[i];
1127
1128 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1129 struct kvm_mmu_page *child;
1130 child = page_header(ent & PT64_BASE_ADDR_MASK);
1131
1132 if (child->unsync_children) {
1133 if (mmu_pages_add(pvec, child, i))
1134 return -ENOSPC;
1135
1136 ret = __mmu_unsync_walk(child, pvec);
1137 if (!ret)
1138 __clear_bit(i, sp->unsync_child_bitmap);
1139 else if (ret > 0)
1140 nr_unsync_leaf += ret;
1141 else
1142 return ret;
1143 }
1144
1145 if (child->unsync) {
1146 nr_unsync_leaf++;
1147 if (mmu_pages_add(pvec, child, i))
1148 return -ENOSPC;
1149 }
1150 }
1151 }
1152
1153 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1154 sp->unsync_children = 0;
1155
1156 return nr_unsync_leaf;
1157 }
1158
1159 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1160 struct kvm_mmu_pages *pvec)
1161 {
1162 if (!sp->unsync_children)
1163 return 0;
1164
1165 mmu_pages_add(pvec, sp, 0);
1166 return __mmu_unsync_walk(sp, pvec);
1167 }
1168
1169 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1170 {
1171 unsigned index;
1172 struct hlist_head *bucket;
1173 struct kvm_mmu_page *sp;
1174 struct hlist_node *node;
1175
1176 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1177 index = kvm_page_table_hashfn(gfn);
1178 bucket = &kvm->arch.mmu_page_hash[index];
1179 hlist_for_each_entry(sp, node, bucket, hash_link)
1180 if (sp->gfn == gfn && !sp->role.direct
1181 && !sp->role.invalid) {
1182 pgprintk("%s: found role %x\n",
1183 __func__, sp->role.word);
1184 return sp;
1185 }
1186 return NULL;
1187 }
1188
1189 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1190 {
1191 WARN_ON(!sp->unsync);
1192 sp->unsync = 0;
1193 --kvm->stat.mmu_unsync;
1194 }
1195
1196 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1197
1198 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1199 {
1200 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1201 kvm_mmu_zap_page(vcpu->kvm, sp);
1202 return 1;
1203 }
1204
1205 trace_kvm_mmu_sync_page(sp);
1206 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1207 kvm_flush_remote_tlbs(vcpu->kvm);
1208 kvm_unlink_unsync_page(vcpu->kvm, sp);
1209 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1210 kvm_mmu_zap_page(vcpu->kvm, sp);
1211 return 1;
1212 }
1213
1214 kvm_mmu_flush_tlb(vcpu);
1215 return 0;
1216 }
1217
1218 struct mmu_page_path {
1219 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1220 unsigned int idx[PT64_ROOT_LEVEL-1];
1221 };
1222
1223 #define for_each_sp(pvec, sp, parents, i) \
1224 for (i = mmu_pages_next(&pvec, &parents, -1), \
1225 sp = pvec.page[i].sp; \
1226 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1227 i = mmu_pages_next(&pvec, &parents, i))
1228
1229 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1230 struct mmu_page_path *parents,
1231 int i)
1232 {
1233 int n;
1234
1235 for (n = i+1; n < pvec->nr; n++) {
1236 struct kvm_mmu_page *sp = pvec->page[n].sp;
1237
1238 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1239 parents->idx[0] = pvec->page[n].idx;
1240 return n;
1241 }
1242
1243 parents->parent[sp->role.level-2] = sp;
1244 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1245 }
1246
1247 return n;
1248 }
1249
1250 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1251 {
1252 struct kvm_mmu_page *sp;
1253 unsigned int level = 0;
1254
1255 do {
1256 unsigned int idx = parents->idx[level];
1257
1258 sp = parents->parent[level];
1259 if (!sp)
1260 return;
1261
1262 --sp->unsync_children;
1263 WARN_ON((int)sp->unsync_children < 0);
1264 __clear_bit(idx, sp->unsync_child_bitmap);
1265 level++;
1266 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1267 }
1268
1269 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1270 struct mmu_page_path *parents,
1271 struct kvm_mmu_pages *pvec)
1272 {
1273 parents->parent[parent->role.level-1] = NULL;
1274 pvec->nr = 0;
1275 }
1276
1277 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1278 struct kvm_mmu_page *parent)
1279 {
1280 int i;
1281 struct kvm_mmu_page *sp;
1282 struct mmu_page_path parents;
1283 struct kvm_mmu_pages pages;
1284
1285 kvm_mmu_pages_init(parent, &parents, &pages);
1286 while (mmu_unsync_walk(parent, &pages)) {
1287 int protected = 0;
1288
1289 for_each_sp(pages, sp, parents, i)
1290 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1291
1292 if (protected)
1293 kvm_flush_remote_tlbs(vcpu->kvm);
1294
1295 for_each_sp(pages, sp, parents, i) {
1296 kvm_sync_page(vcpu, sp);
1297 mmu_pages_clear_parents(&parents);
1298 }
1299 cond_resched_lock(&vcpu->kvm->mmu_lock);
1300 kvm_mmu_pages_init(parent, &parents, &pages);
1301 }
1302 }
1303
1304 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1305 gfn_t gfn,
1306 gva_t gaddr,
1307 unsigned level,
1308 int direct,
1309 unsigned access,
1310 u64 *parent_pte)
1311 {
1312 union kvm_mmu_page_role role;
1313 unsigned index;
1314 unsigned quadrant;
1315 struct hlist_head *bucket;
1316 struct kvm_mmu_page *sp;
1317 struct hlist_node *node, *tmp;
1318
1319 role = vcpu->arch.mmu.base_role;
1320 role.level = level;
1321 role.direct = direct;
1322 if (role.direct)
1323 role.cr4_pae = 0;
1324 role.access = access;
1325 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1326 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1327 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1328 role.quadrant = quadrant;
1329 }
1330 index = kvm_page_table_hashfn(gfn);
1331 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1332 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1333 if (sp->gfn == gfn) {
1334 if (sp->unsync)
1335 if (kvm_sync_page(vcpu, sp))
1336 continue;
1337
1338 if (sp->role.word != role.word)
1339 continue;
1340
1341 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1342 if (sp->unsync_children) {
1343 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1344 kvm_mmu_mark_parents_unsync(sp);
1345 }
1346 trace_kvm_mmu_get_page(sp, false);
1347 return sp;
1348 }
1349 ++vcpu->kvm->stat.mmu_cache_miss;
1350 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1351 if (!sp)
1352 return sp;
1353 sp->gfn = gfn;
1354 sp->role = role;
1355 hlist_add_head(&sp->hash_link, bucket);
1356 if (!direct) {
1357 if (rmap_write_protect(vcpu->kvm, gfn))
1358 kvm_flush_remote_tlbs(vcpu->kvm);
1359 account_shadowed(vcpu->kvm, gfn);
1360 }
1361 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1362 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1363 else
1364 nonpaging_prefetch_page(vcpu, sp);
1365 trace_kvm_mmu_get_page(sp, true);
1366 return sp;
1367 }
1368
1369 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1370 struct kvm_vcpu *vcpu, u64 addr)
1371 {
1372 iterator->addr = addr;
1373 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1374 iterator->level = vcpu->arch.mmu.shadow_root_level;
1375 if (iterator->level == PT32E_ROOT_LEVEL) {
1376 iterator->shadow_addr
1377 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1378 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1379 --iterator->level;
1380 if (!iterator->shadow_addr)
1381 iterator->level = 0;
1382 }
1383 }
1384
1385 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1386 {
1387 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1388 return false;
1389
1390 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1391 if (is_large_pte(*iterator->sptep))
1392 return false;
1393
1394 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1395 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1396 return true;
1397 }
1398
1399 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1400 {
1401 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1402 --iterator->level;
1403 }
1404
1405 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1406 struct kvm_mmu_page *sp)
1407 {
1408 unsigned i;
1409 u64 *pt;
1410 u64 ent;
1411
1412 pt = sp->spt;
1413
1414 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1415 ent = pt[i];
1416
1417 if (is_shadow_present_pte(ent)) {
1418 if (!is_last_spte(ent, sp->role.level)) {
1419 ent &= PT64_BASE_ADDR_MASK;
1420 mmu_page_remove_parent_pte(page_header(ent),
1421 &pt[i]);
1422 } else {
1423 if (is_large_pte(ent))
1424 --kvm->stat.lpages;
1425 rmap_remove(kvm, &pt[i]);
1426 }
1427 }
1428 pt[i] = shadow_trap_nonpresent_pte;
1429 }
1430 }
1431
1432 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1433 {
1434 mmu_page_remove_parent_pte(sp, parent_pte);
1435 }
1436
1437 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1438 {
1439 int i;
1440 struct kvm_vcpu *vcpu;
1441
1442 kvm_for_each_vcpu(i, vcpu, kvm)
1443 vcpu->arch.last_pte_updated = NULL;
1444 }
1445
1446 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1447 {
1448 u64 *parent_pte;
1449
1450 while (sp->multimapped || sp->parent_pte) {
1451 if (!sp->multimapped)
1452 parent_pte = sp->parent_pte;
1453 else {
1454 struct kvm_pte_chain *chain;
1455
1456 chain = container_of(sp->parent_ptes.first,
1457 struct kvm_pte_chain, link);
1458 parent_pte = chain->parent_ptes[0];
1459 }
1460 BUG_ON(!parent_pte);
1461 kvm_mmu_put_page(sp, parent_pte);
1462 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1463 }
1464 }
1465
1466 static int mmu_zap_unsync_children(struct kvm *kvm,
1467 struct kvm_mmu_page *parent)
1468 {
1469 int i, zapped = 0;
1470 struct mmu_page_path parents;
1471 struct kvm_mmu_pages pages;
1472
1473 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1474 return 0;
1475
1476 kvm_mmu_pages_init(parent, &parents, &pages);
1477 while (mmu_unsync_walk(parent, &pages)) {
1478 struct kvm_mmu_page *sp;
1479
1480 for_each_sp(pages, sp, parents, i) {
1481 kvm_mmu_zap_page(kvm, sp);
1482 mmu_pages_clear_parents(&parents);
1483 zapped++;
1484 }
1485 kvm_mmu_pages_init(parent, &parents, &pages);
1486 }
1487
1488 return zapped;
1489 }
1490
1491 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1492 {
1493 int ret;
1494
1495 trace_kvm_mmu_zap_page(sp);
1496 ++kvm->stat.mmu_shadow_zapped;
1497 ret = mmu_zap_unsync_children(kvm, sp);
1498 kvm_mmu_page_unlink_children(kvm, sp);
1499 kvm_mmu_unlink_parents(kvm, sp);
1500 kvm_flush_remote_tlbs(kvm);
1501 if (!sp->role.invalid && !sp->role.direct)
1502 unaccount_shadowed(kvm, sp->gfn);
1503 if (sp->unsync)
1504 kvm_unlink_unsync_page(kvm, sp);
1505 if (!sp->root_count) {
1506 hlist_del(&sp->hash_link);
1507 kvm_mmu_free_page(kvm, sp);
1508 } else {
1509 sp->role.invalid = 1;
1510 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1511 kvm_reload_remote_mmus(kvm);
1512 }
1513 kvm_mmu_reset_last_pte_updated(kvm);
1514 return ret;
1515 }
1516
1517 /*
1518 * Changing the number of mmu pages allocated to the vm
1519 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1520 */
1521 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1522 {
1523 int used_pages;
1524
1525 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1526 used_pages = max(0, used_pages);
1527
1528 /*
1529 * If we set the number of mmu pages to be smaller be than the
1530 * number of actived pages , we must to free some mmu pages before we
1531 * change the value
1532 */
1533
1534 if (used_pages > kvm_nr_mmu_pages) {
1535 while (used_pages > kvm_nr_mmu_pages &&
1536 !list_empty(&kvm->arch.active_mmu_pages)) {
1537 struct kvm_mmu_page *page;
1538
1539 page = container_of(kvm->arch.active_mmu_pages.prev,
1540 struct kvm_mmu_page, link);
1541 used_pages -= kvm_mmu_zap_page(kvm, page);
1542 used_pages--;
1543 }
1544 kvm_nr_mmu_pages = used_pages;
1545 kvm->arch.n_free_mmu_pages = 0;
1546 }
1547 else
1548 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1549 - kvm->arch.n_alloc_mmu_pages;
1550
1551 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1552 }
1553
1554 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1555 {
1556 unsigned index;
1557 struct hlist_head *bucket;
1558 struct kvm_mmu_page *sp;
1559 struct hlist_node *node, *n;
1560 int r;
1561
1562 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1563 r = 0;
1564 index = kvm_page_table_hashfn(gfn);
1565 bucket = &kvm->arch.mmu_page_hash[index];
1566 restart:
1567 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1568 if (sp->gfn == gfn && !sp->role.direct) {
1569 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1570 sp->role.word);
1571 r = 1;
1572 if (kvm_mmu_zap_page(kvm, sp))
1573 goto restart;
1574 }
1575 return r;
1576 }
1577
1578 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1579 {
1580 unsigned index;
1581 struct hlist_head *bucket;
1582 struct kvm_mmu_page *sp;
1583 struct hlist_node *node, *nn;
1584
1585 index = kvm_page_table_hashfn(gfn);
1586 bucket = &kvm->arch.mmu_page_hash[index];
1587 restart:
1588 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1589 if (sp->gfn == gfn && !sp->role.direct
1590 && !sp->role.invalid) {
1591 pgprintk("%s: zap %lx %x\n",
1592 __func__, gfn, sp->role.word);
1593 if (kvm_mmu_zap_page(kvm, sp))
1594 goto restart;
1595 }
1596 }
1597 }
1598
1599 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1600 {
1601 int slot = memslot_id(kvm, gfn);
1602 struct kvm_mmu_page *sp = page_header(__pa(pte));
1603
1604 __set_bit(slot, sp->slot_bitmap);
1605 }
1606
1607 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1608 {
1609 int i;
1610 u64 *pt = sp->spt;
1611
1612 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1613 return;
1614
1615 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1616 if (pt[i] == shadow_notrap_nonpresent_pte)
1617 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1618 }
1619 }
1620
1621 /*
1622 * The function is based on mtrr_type_lookup() in
1623 * arch/x86/kernel/cpu/mtrr/generic.c
1624 */
1625 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1626 u64 start, u64 end)
1627 {
1628 int i;
1629 u64 base, mask;
1630 u8 prev_match, curr_match;
1631 int num_var_ranges = KVM_NR_VAR_MTRR;
1632
1633 if (!mtrr_state->enabled)
1634 return 0xFF;
1635
1636 /* Make end inclusive end, instead of exclusive */
1637 end--;
1638
1639 /* Look in fixed ranges. Just return the type as per start */
1640 if (mtrr_state->have_fixed && (start < 0x100000)) {
1641 int idx;
1642
1643 if (start < 0x80000) {
1644 idx = 0;
1645 idx += (start >> 16);
1646 return mtrr_state->fixed_ranges[idx];
1647 } else if (start < 0xC0000) {
1648 idx = 1 * 8;
1649 idx += ((start - 0x80000) >> 14);
1650 return mtrr_state->fixed_ranges[idx];
1651 } else if (start < 0x1000000) {
1652 idx = 3 * 8;
1653 idx += ((start - 0xC0000) >> 12);
1654 return mtrr_state->fixed_ranges[idx];
1655 }
1656 }
1657
1658 /*
1659 * Look in variable ranges
1660 * Look of multiple ranges matching this address and pick type
1661 * as per MTRR precedence
1662 */
1663 if (!(mtrr_state->enabled & 2))
1664 return mtrr_state->def_type;
1665
1666 prev_match = 0xFF;
1667 for (i = 0; i < num_var_ranges; ++i) {
1668 unsigned short start_state, end_state;
1669
1670 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1671 continue;
1672
1673 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1674 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1675 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1676 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1677
1678 start_state = ((start & mask) == (base & mask));
1679 end_state = ((end & mask) == (base & mask));
1680 if (start_state != end_state)
1681 return 0xFE;
1682
1683 if ((start & mask) != (base & mask))
1684 continue;
1685
1686 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1687 if (prev_match == 0xFF) {
1688 prev_match = curr_match;
1689 continue;
1690 }
1691
1692 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1693 curr_match == MTRR_TYPE_UNCACHABLE)
1694 return MTRR_TYPE_UNCACHABLE;
1695
1696 if ((prev_match == MTRR_TYPE_WRBACK &&
1697 curr_match == MTRR_TYPE_WRTHROUGH) ||
1698 (prev_match == MTRR_TYPE_WRTHROUGH &&
1699 curr_match == MTRR_TYPE_WRBACK)) {
1700 prev_match = MTRR_TYPE_WRTHROUGH;
1701 curr_match = MTRR_TYPE_WRTHROUGH;
1702 }
1703
1704 if (prev_match != curr_match)
1705 return MTRR_TYPE_UNCACHABLE;
1706 }
1707
1708 if (prev_match != 0xFF)
1709 return prev_match;
1710
1711 return mtrr_state->def_type;
1712 }
1713
1714 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1715 {
1716 u8 mtrr;
1717
1718 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1719 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1720 if (mtrr == 0xfe || mtrr == 0xff)
1721 mtrr = MTRR_TYPE_WRBACK;
1722 return mtrr;
1723 }
1724 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1725
1726 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1727 {
1728 unsigned index;
1729 struct hlist_head *bucket;
1730 struct kvm_mmu_page *s;
1731 struct hlist_node *node, *n;
1732
1733 trace_kvm_mmu_unsync_page(sp);
1734 index = kvm_page_table_hashfn(sp->gfn);
1735 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1736 /* don't unsync if pagetable is shadowed with multiple roles */
1737 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1738 if (s->gfn != sp->gfn || s->role.direct)
1739 continue;
1740 if (s->role.word != sp->role.word)
1741 return 1;
1742 }
1743 ++vcpu->kvm->stat.mmu_unsync;
1744 sp->unsync = 1;
1745
1746 kvm_mmu_mark_parents_unsync(sp);
1747
1748 mmu_convert_notrap(sp);
1749 return 0;
1750 }
1751
1752 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1753 bool can_unsync)
1754 {
1755 struct kvm_mmu_page *shadow;
1756
1757 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1758 if (shadow) {
1759 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1760 return 1;
1761 if (shadow->unsync)
1762 return 0;
1763 if (can_unsync && oos_shadow)
1764 return kvm_unsync_page(vcpu, shadow);
1765 return 1;
1766 }
1767 return 0;
1768 }
1769
1770 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1771 unsigned pte_access, int user_fault,
1772 int write_fault, int dirty, int level,
1773 gfn_t gfn, pfn_t pfn, bool speculative,
1774 bool can_unsync, bool reset_host_protection)
1775 {
1776 u64 spte;
1777 int ret = 0;
1778
1779 /*
1780 * We don't set the accessed bit, since we sometimes want to see
1781 * whether the guest actually used the pte (in order to detect
1782 * demand paging).
1783 */
1784 spte = shadow_base_present_pte | shadow_dirty_mask;
1785 if (!speculative)
1786 spte |= shadow_accessed_mask;
1787 if (!dirty)
1788 pte_access &= ~ACC_WRITE_MASK;
1789 if (pte_access & ACC_EXEC_MASK)
1790 spte |= shadow_x_mask;
1791 else
1792 spte |= shadow_nx_mask;
1793 if (pte_access & ACC_USER_MASK)
1794 spte |= shadow_user_mask;
1795 if (level > PT_PAGE_TABLE_LEVEL)
1796 spte |= PT_PAGE_SIZE_MASK;
1797 if (tdp_enabled)
1798 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1799 kvm_is_mmio_pfn(pfn));
1800
1801 if (reset_host_protection)
1802 spte |= SPTE_HOST_WRITEABLE;
1803
1804 spte |= (u64)pfn << PAGE_SHIFT;
1805
1806 if ((pte_access & ACC_WRITE_MASK)
1807 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1808
1809 if (level > PT_PAGE_TABLE_LEVEL &&
1810 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1811 ret = 1;
1812 spte = shadow_trap_nonpresent_pte;
1813 goto set_pte;
1814 }
1815
1816 spte |= PT_WRITABLE_MASK;
1817
1818 /*
1819 * Optimization: for pte sync, if spte was writable the hash
1820 * lookup is unnecessary (and expensive). Write protection
1821 * is responsibility of mmu_get_page / kvm_sync_page.
1822 * Same reasoning can be applied to dirty page accounting.
1823 */
1824 if (!can_unsync && is_writable_pte(*sptep))
1825 goto set_pte;
1826
1827 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1828 pgprintk("%s: found shadow page for %lx, marking ro\n",
1829 __func__, gfn);
1830 ret = 1;
1831 pte_access &= ~ACC_WRITE_MASK;
1832 if (is_writable_pte(spte))
1833 spte &= ~PT_WRITABLE_MASK;
1834 }
1835 }
1836
1837 if (pte_access & ACC_WRITE_MASK)
1838 mark_page_dirty(vcpu->kvm, gfn);
1839
1840 set_pte:
1841 __set_spte(sptep, spte);
1842 return ret;
1843 }
1844
1845 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1846 unsigned pt_access, unsigned pte_access,
1847 int user_fault, int write_fault, int dirty,
1848 int *ptwrite, int level, gfn_t gfn,
1849 pfn_t pfn, bool speculative,
1850 bool reset_host_protection)
1851 {
1852 int was_rmapped = 0;
1853 int was_writable = is_writable_pte(*sptep);
1854 int rmap_count;
1855
1856 pgprintk("%s: spte %llx access %x write_fault %d"
1857 " user_fault %d gfn %lx\n",
1858 __func__, *sptep, pt_access,
1859 write_fault, user_fault, gfn);
1860
1861 if (is_rmap_spte(*sptep)) {
1862 /*
1863 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1864 * the parent of the now unreachable PTE.
1865 */
1866 if (level > PT_PAGE_TABLE_LEVEL &&
1867 !is_large_pte(*sptep)) {
1868 struct kvm_mmu_page *child;
1869 u64 pte = *sptep;
1870
1871 child = page_header(pte & PT64_BASE_ADDR_MASK);
1872 mmu_page_remove_parent_pte(child, sptep);
1873 } else if (pfn != spte_to_pfn(*sptep)) {
1874 pgprintk("hfn old %lx new %lx\n",
1875 spte_to_pfn(*sptep), pfn);
1876 rmap_remove(vcpu->kvm, sptep);
1877 } else
1878 was_rmapped = 1;
1879 }
1880
1881 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1882 dirty, level, gfn, pfn, speculative, true,
1883 reset_host_protection)) {
1884 if (write_fault)
1885 *ptwrite = 1;
1886 kvm_x86_ops->tlb_flush(vcpu);
1887 }
1888
1889 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1890 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1891 is_large_pte(*sptep)? "2MB" : "4kB",
1892 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1893 *sptep, sptep);
1894 if (!was_rmapped && is_large_pte(*sptep))
1895 ++vcpu->kvm->stat.lpages;
1896
1897 page_header_update_slot(vcpu->kvm, sptep, gfn);
1898 if (!was_rmapped) {
1899 rmap_count = rmap_add(vcpu, sptep, gfn);
1900 kvm_release_pfn_clean(pfn);
1901 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1902 rmap_recycle(vcpu, sptep, gfn);
1903 } else {
1904 if (was_writable)
1905 kvm_release_pfn_dirty(pfn);
1906 else
1907 kvm_release_pfn_clean(pfn);
1908 }
1909 if (speculative) {
1910 vcpu->arch.last_pte_updated = sptep;
1911 vcpu->arch.last_pte_gfn = gfn;
1912 }
1913 }
1914
1915 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1916 {
1917 }
1918
1919 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1920 int level, gfn_t gfn, pfn_t pfn)
1921 {
1922 struct kvm_shadow_walk_iterator iterator;
1923 struct kvm_mmu_page *sp;
1924 int pt_write = 0;
1925 gfn_t pseudo_gfn;
1926
1927 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1928 if (iterator.level == level) {
1929 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1930 0, write, 1, &pt_write,
1931 level, gfn, pfn, false, true);
1932 ++vcpu->stat.pf_fixed;
1933 break;
1934 }
1935
1936 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1937 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1938 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1939 iterator.level - 1,
1940 1, ACC_ALL, iterator.sptep);
1941 if (!sp) {
1942 pgprintk("nonpaging_map: ENOMEM\n");
1943 kvm_release_pfn_clean(pfn);
1944 return -ENOMEM;
1945 }
1946
1947 __set_spte(iterator.sptep,
1948 __pa(sp->spt)
1949 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1950 | shadow_user_mask | shadow_x_mask);
1951 }
1952 }
1953 return pt_write;
1954 }
1955
1956 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1957 {
1958 int r;
1959 int level;
1960 pfn_t pfn;
1961 unsigned long mmu_seq;
1962
1963 level = mapping_level(vcpu, gfn);
1964
1965 /*
1966 * This path builds a PAE pagetable - so we can map 2mb pages at
1967 * maximum. Therefore check if the level is larger than that.
1968 */
1969 if (level > PT_DIRECTORY_LEVEL)
1970 level = PT_DIRECTORY_LEVEL;
1971
1972 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
1973
1974 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1975 smp_rmb();
1976 pfn = gfn_to_pfn(vcpu->kvm, gfn);
1977
1978 /* mmio */
1979 if (is_error_pfn(pfn)) {
1980 kvm_release_pfn_clean(pfn);
1981 return 1;
1982 }
1983
1984 spin_lock(&vcpu->kvm->mmu_lock);
1985 if (mmu_notifier_retry(vcpu, mmu_seq))
1986 goto out_unlock;
1987 kvm_mmu_free_some_pages(vcpu);
1988 r = __direct_map(vcpu, v, write, level, gfn, pfn);
1989 spin_unlock(&vcpu->kvm->mmu_lock);
1990
1991
1992 return r;
1993
1994 out_unlock:
1995 spin_unlock(&vcpu->kvm->mmu_lock);
1996 kvm_release_pfn_clean(pfn);
1997 return 0;
1998 }
1999
2000
2001 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2002 {
2003 int i;
2004 struct kvm_mmu_page *sp;
2005
2006 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2007 return;
2008 spin_lock(&vcpu->kvm->mmu_lock);
2009 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2010 hpa_t root = vcpu->arch.mmu.root_hpa;
2011
2012 sp = page_header(root);
2013 --sp->root_count;
2014 if (!sp->root_count && sp->role.invalid)
2015 kvm_mmu_zap_page(vcpu->kvm, sp);
2016 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2017 spin_unlock(&vcpu->kvm->mmu_lock);
2018 return;
2019 }
2020 for (i = 0; i < 4; ++i) {
2021 hpa_t root = vcpu->arch.mmu.pae_root[i];
2022
2023 if (root) {
2024 root &= PT64_BASE_ADDR_MASK;
2025 sp = page_header(root);
2026 --sp->root_count;
2027 if (!sp->root_count && sp->role.invalid)
2028 kvm_mmu_zap_page(vcpu->kvm, sp);
2029 }
2030 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2031 }
2032 spin_unlock(&vcpu->kvm->mmu_lock);
2033 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2034 }
2035
2036 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2037 {
2038 int ret = 0;
2039
2040 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2041 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2042 ret = 1;
2043 }
2044
2045 return ret;
2046 }
2047
2048 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2049 {
2050 int i;
2051 gfn_t root_gfn;
2052 struct kvm_mmu_page *sp;
2053 int direct = 0;
2054 u64 pdptr;
2055
2056 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2057
2058 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2059 hpa_t root = vcpu->arch.mmu.root_hpa;
2060
2061 ASSERT(!VALID_PAGE(root));
2062 if (tdp_enabled)
2063 direct = 1;
2064 if (mmu_check_root(vcpu, root_gfn))
2065 return 1;
2066 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2067 PT64_ROOT_LEVEL, direct,
2068 ACC_ALL, NULL);
2069 root = __pa(sp->spt);
2070 ++sp->root_count;
2071 vcpu->arch.mmu.root_hpa = root;
2072 return 0;
2073 }
2074 direct = !is_paging(vcpu);
2075 if (tdp_enabled)
2076 direct = 1;
2077 for (i = 0; i < 4; ++i) {
2078 hpa_t root = vcpu->arch.mmu.pae_root[i];
2079
2080 ASSERT(!VALID_PAGE(root));
2081 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2082 pdptr = kvm_pdptr_read(vcpu, i);
2083 if (!is_present_gpte(pdptr)) {
2084 vcpu->arch.mmu.pae_root[i] = 0;
2085 continue;
2086 }
2087 root_gfn = pdptr >> PAGE_SHIFT;
2088 } else if (vcpu->arch.mmu.root_level == 0)
2089 root_gfn = 0;
2090 if (mmu_check_root(vcpu, root_gfn))
2091 return 1;
2092 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2093 PT32_ROOT_LEVEL, direct,
2094 ACC_ALL, NULL);
2095 root = __pa(sp->spt);
2096 ++sp->root_count;
2097 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2098 }
2099 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2100 return 0;
2101 }
2102
2103 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2104 {
2105 int i;
2106 struct kvm_mmu_page *sp;
2107
2108 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2109 return;
2110 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2111 hpa_t root = vcpu->arch.mmu.root_hpa;
2112 sp = page_header(root);
2113 mmu_sync_children(vcpu, sp);
2114 return;
2115 }
2116 for (i = 0; i < 4; ++i) {
2117 hpa_t root = vcpu->arch.mmu.pae_root[i];
2118
2119 if (root && VALID_PAGE(root)) {
2120 root &= PT64_BASE_ADDR_MASK;
2121 sp = page_header(root);
2122 mmu_sync_children(vcpu, sp);
2123 }
2124 }
2125 }
2126
2127 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2128 {
2129 spin_lock(&vcpu->kvm->mmu_lock);
2130 mmu_sync_roots(vcpu);
2131 spin_unlock(&vcpu->kvm->mmu_lock);
2132 }
2133
2134 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2135 u32 access, u32 *error)
2136 {
2137 if (error)
2138 *error = 0;
2139 return vaddr;
2140 }
2141
2142 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2143 u32 error_code)
2144 {
2145 gfn_t gfn;
2146 int r;
2147
2148 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2149 r = mmu_topup_memory_caches(vcpu);
2150 if (r)
2151 return r;
2152
2153 ASSERT(vcpu);
2154 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2155
2156 gfn = gva >> PAGE_SHIFT;
2157
2158 return nonpaging_map(vcpu, gva & PAGE_MASK,
2159 error_code & PFERR_WRITE_MASK, gfn);
2160 }
2161
2162 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2163 u32 error_code)
2164 {
2165 pfn_t pfn;
2166 int r;
2167 int level;
2168 gfn_t gfn = gpa >> PAGE_SHIFT;
2169 unsigned long mmu_seq;
2170
2171 ASSERT(vcpu);
2172 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2173
2174 r = mmu_topup_memory_caches(vcpu);
2175 if (r)
2176 return r;
2177
2178 level = mapping_level(vcpu, gfn);
2179
2180 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2181
2182 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2183 smp_rmb();
2184 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2185 if (is_error_pfn(pfn)) {
2186 kvm_release_pfn_clean(pfn);
2187 return 1;
2188 }
2189 spin_lock(&vcpu->kvm->mmu_lock);
2190 if (mmu_notifier_retry(vcpu, mmu_seq))
2191 goto out_unlock;
2192 kvm_mmu_free_some_pages(vcpu);
2193 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2194 level, gfn, pfn);
2195 spin_unlock(&vcpu->kvm->mmu_lock);
2196
2197 return r;
2198
2199 out_unlock:
2200 spin_unlock(&vcpu->kvm->mmu_lock);
2201 kvm_release_pfn_clean(pfn);
2202 return 0;
2203 }
2204
2205 static void nonpaging_free(struct kvm_vcpu *vcpu)
2206 {
2207 mmu_free_roots(vcpu);
2208 }
2209
2210 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2211 {
2212 struct kvm_mmu *context = &vcpu->arch.mmu;
2213
2214 context->new_cr3 = nonpaging_new_cr3;
2215 context->page_fault = nonpaging_page_fault;
2216 context->gva_to_gpa = nonpaging_gva_to_gpa;
2217 context->free = nonpaging_free;
2218 context->prefetch_page = nonpaging_prefetch_page;
2219 context->sync_page = nonpaging_sync_page;
2220 context->invlpg = nonpaging_invlpg;
2221 context->root_level = 0;
2222 context->shadow_root_level = PT32E_ROOT_LEVEL;
2223 context->root_hpa = INVALID_PAGE;
2224 return 0;
2225 }
2226
2227 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2228 {
2229 ++vcpu->stat.tlb_flush;
2230 kvm_x86_ops->tlb_flush(vcpu);
2231 }
2232
2233 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2234 {
2235 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2236 mmu_free_roots(vcpu);
2237 }
2238
2239 static void inject_page_fault(struct kvm_vcpu *vcpu,
2240 u64 addr,
2241 u32 err_code)
2242 {
2243 kvm_inject_page_fault(vcpu, addr, err_code);
2244 }
2245
2246 static void paging_free(struct kvm_vcpu *vcpu)
2247 {
2248 nonpaging_free(vcpu);
2249 }
2250
2251 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2252 {
2253 int bit7;
2254
2255 bit7 = (gpte >> 7) & 1;
2256 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2257 }
2258
2259 #define PTTYPE 64
2260 #include "paging_tmpl.h"
2261 #undef PTTYPE
2262
2263 #define PTTYPE 32
2264 #include "paging_tmpl.h"
2265 #undef PTTYPE
2266
2267 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2268 {
2269 struct kvm_mmu *context = &vcpu->arch.mmu;
2270 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2271 u64 exb_bit_rsvd = 0;
2272
2273 if (!is_nx(vcpu))
2274 exb_bit_rsvd = rsvd_bits(63, 63);
2275 switch (level) {
2276 case PT32_ROOT_LEVEL:
2277 /* no rsvd bits for 2 level 4K page table entries */
2278 context->rsvd_bits_mask[0][1] = 0;
2279 context->rsvd_bits_mask[0][0] = 0;
2280 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2281
2282 if (!is_pse(vcpu)) {
2283 context->rsvd_bits_mask[1][1] = 0;
2284 break;
2285 }
2286
2287 if (is_cpuid_PSE36())
2288 /* 36bits PSE 4MB page */
2289 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2290 else
2291 /* 32 bits PSE 4MB page */
2292 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2293 break;
2294 case PT32E_ROOT_LEVEL:
2295 context->rsvd_bits_mask[0][2] =
2296 rsvd_bits(maxphyaddr, 63) |
2297 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2298 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2299 rsvd_bits(maxphyaddr, 62); /* PDE */
2300 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2301 rsvd_bits(maxphyaddr, 62); /* PTE */
2302 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2303 rsvd_bits(maxphyaddr, 62) |
2304 rsvd_bits(13, 20); /* large page */
2305 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2306 break;
2307 case PT64_ROOT_LEVEL:
2308 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2309 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2310 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2311 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2312 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2313 rsvd_bits(maxphyaddr, 51);
2314 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2315 rsvd_bits(maxphyaddr, 51);
2316 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2317 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2318 rsvd_bits(maxphyaddr, 51) |
2319 rsvd_bits(13, 29);
2320 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2321 rsvd_bits(maxphyaddr, 51) |
2322 rsvd_bits(13, 20); /* large page */
2323 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2324 break;
2325 }
2326 }
2327
2328 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2329 {
2330 struct kvm_mmu *context = &vcpu->arch.mmu;
2331
2332 ASSERT(is_pae(vcpu));
2333 context->new_cr3 = paging_new_cr3;
2334 context->page_fault = paging64_page_fault;
2335 context->gva_to_gpa = paging64_gva_to_gpa;
2336 context->prefetch_page = paging64_prefetch_page;
2337 context->sync_page = paging64_sync_page;
2338 context->invlpg = paging64_invlpg;
2339 context->free = paging_free;
2340 context->root_level = level;
2341 context->shadow_root_level = level;
2342 context->root_hpa = INVALID_PAGE;
2343 return 0;
2344 }
2345
2346 static int paging64_init_context(struct kvm_vcpu *vcpu)
2347 {
2348 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2349 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2350 }
2351
2352 static int paging32_init_context(struct kvm_vcpu *vcpu)
2353 {
2354 struct kvm_mmu *context = &vcpu->arch.mmu;
2355
2356 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2357 context->new_cr3 = paging_new_cr3;
2358 context->page_fault = paging32_page_fault;
2359 context->gva_to_gpa = paging32_gva_to_gpa;
2360 context->free = paging_free;
2361 context->prefetch_page = paging32_prefetch_page;
2362 context->sync_page = paging32_sync_page;
2363 context->invlpg = paging32_invlpg;
2364 context->root_level = PT32_ROOT_LEVEL;
2365 context->shadow_root_level = PT32E_ROOT_LEVEL;
2366 context->root_hpa = INVALID_PAGE;
2367 return 0;
2368 }
2369
2370 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2371 {
2372 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2373 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2374 }
2375
2376 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2377 {
2378 struct kvm_mmu *context = &vcpu->arch.mmu;
2379
2380 context->new_cr3 = nonpaging_new_cr3;
2381 context->page_fault = tdp_page_fault;
2382 context->free = nonpaging_free;
2383 context->prefetch_page = nonpaging_prefetch_page;
2384 context->sync_page = nonpaging_sync_page;
2385 context->invlpg = nonpaging_invlpg;
2386 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2387 context->root_hpa = INVALID_PAGE;
2388
2389 if (!is_paging(vcpu)) {
2390 context->gva_to_gpa = nonpaging_gva_to_gpa;
2391 context->root_level = 0;
2392 } else if (is_long_mode(vcpu)) {
2393 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2394 context->gva_to_gpa = paging64_gva_to_gpa;
2395 context->root_level = PT64_ROOT_LEVEL;
2396 } else if (is_pae(vcpu)) {
2397 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2398 context->gva_to_gpa = paging64_gva_to_gpa;
2399 context->root_level = PT32E_ROOT_LEVEL;
2400 } else {
2401 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2402 context->gva_to_gpa = paging32_gva_to_gpa;
2403 context->root_level = PT32_ROOT_LEVEL;
2404 }
2405
2406 return 0;
2407 }
2408
2409 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2410 {
2411 int r;
2412
2413 ASSERT(vcpu);
2414 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2415
2416 if (!is_paging(vcpu))
2417 r = nonpaging_init_context(vcpu);
2418 else if (is_long_mode(vcpu))
2419 r = paging64_init_context(vcpu);
2420 else if (is_pae(vcpu))
2421 r = paging32E_init_context(vcpu);
2422 else
2423 r = paging32_init_context(vcpu);
2424
2425 vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2426
2427 return r;
2428 }
2429
2430 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2431 {
2432 vcpu->arch.update_pte.pfn = bad_pfn;
2433
2434 if (tdp_enabled)
2435 return init_kvm_tdp_mmu(vcpu);
2436 else
2437 return init_kvm_softmmu(vcpu);
2438 }
2439
2440 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2441 {
2442 ASSERT(vcpu);
2443 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2444 vcpu->arch.mmu.free(vcpu);
2445 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2446 }
2447 }
2448
2449 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2450 {
2451 destroy_kvm_mmu(vcpu);
2452 return init_kvm_mmu(vcpu);
2453 }
2454 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2455
2456 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2457 {
2458 int r;
2459
2460 r = mmu_topup_memory_caches(vcpu);
2461 if (r)
2462 goto out;
2463 spin_lock(&vcpu->kvm->mmu_lock);
2464 kvm_mmu_free_some_pages(vcpu);
2465 r = mmu_alloc_roots(vcpu);
2466 mmu_sync_roots(vcpu);
2467 spin_unlock(&vcpu->kvm->mmu_lock);
2468 if (r)
2469 goto out;
2470 /* set_cr3() should ensure TLB has been flushed */
2471 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2472 out:
2473 return r;
2474 }
2475 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2476
2477 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2478 {
2479 mmu_free_roots(vcpu);
2480 }
2481
2482 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2483 struct kvm_mmu_page *sp,
2484 u64 *spte)
2485 {
2486 u64 pte;
2487 struct kvm_mmu_page *child;
2488
2489 pte = *spte;
2490 if (is_shadow_present_pte(pte)) {
2491 if (is_last_spte(pte, sp->role.level))
2492 rmap_remove(vcpu->kvm, spte);
2493 else {
2494 child = page_header(pte & PT64_BASE_ADDR_MASK);
2495 mmu_page_remove_parent_pte(child, spte);
2496 }
2497 }
2498 __set_spte(spte, shadow_trap_nonpresent_pte);
2499 if (is_large_pte(pte))
2500 --vcpu->kvm->stat.lpages;
2501 }
2502
2503 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2504 struct kvm_mmu_page *sp,
2505 u64 *spte,
2506 const void *new)
2507 {
2508 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2509 ++vcpu->kvm->stat.mmu_pde_zapped;
2510 return;
2511 }
2512
2513 ++vcpu->kvm->stat.mmu_pte_updated;
2514 if (!sp->role.cr4_pae)
2515 paging32_update_pte(vcpu, sp, spte, new);
2516 else
2517 paging64_update_pte(vcpu, sp, spte, new);
2518 }
2519
2520 static bool need_remote_flush(u64 old, u64 new)
2521 {
2522 if (!is_shadow_present_pte(old))
2523 return false;
2524 if (!is_shadow_present_pte(new))
2525 return true;
2526 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2527 return true;
2528 old ^= PT64_NX_MASK;
2529 new ^= PT64_NX_MASK;
2530 return (old & ~new & PT64_PERM_MASK) != 0;
2531 }
2532
2533 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2534 {
2535 if (need_remote_flush(old, new))
2536 kvm_flush_remote_tlbs(vcpu->kvm);
2537 else
2538 kvm_mmu_flush_tlb(vcpu);
2539 }
2540
2541 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2542 {
2543 u64 *spte = vcpu->arch.last_pte_updated;
2544
2545 return !!(spte && (*spte & shadow_accessed_mask));
2546 }
2547
2548 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2549 u64 gpte)
2550 {
2551 gfn_t gfn;
2552 pfn_t pfn;
2553
2554 if (!is_present_gpte(gpte))
2555 return;
2556 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2557
2558 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2559 smp_rmb();
2560 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2561
2562 if (is_error_pfn(pfn)) {
2563 kvm_release_pfn_clean(pfn);
2564 return;
2565 }
2566 vcpu->arch.update_pte.gfn = gfn;
2567 vcpu->arch.update_pte.pfn = pfn;
2568 }
2569
2570 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2571 {
2572 u64 *spte = vcpu->arch.last_pte_updated;
2573
2574 if (spte
2575 && vcpu->arch.last_pte_gfn == gfn
2576 && shadow_accessed_mask
2577 && !(*spte & shadow_accessed_mask)
2578 && is_shadow_present_pte(*spte))
2579 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2580 }
2581
2582 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2583 const u8 *new, int bytes,
2584 bool guest_initiated)
2585 {
2586 gfn_t gfn = gpa >> PAGE_SHIFT;
2587 struct kvm_mmu_page *sp;
2588 struct hlist_node *node, *n;
2589 struct hlist_head *bucket;
2590 unsigned index;
2591 u64 entry, gentry;
2592 u64 *spte;
2593 unsigned offset = offset_in_page(gpa);
2594 unsigned pte_size;
2595 unsigned page_offset;
2596 unsigned misaligned;
2597 unsigned quadrant;
2598 int level;
2599 int flooded = 0;
2600 int npte;
2601 int r;
2602 int invlpg_counter;
2603
2604 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2605
2606 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2607
2608 /*
2609 * Assume that the pte write on a page table of the same type
2610 * as the current vcpu paging mode. This is nearly always true
2611 * (might be false while changing modes). Note it is verified later
2612 * by update_pte().
2613 */
2614 if ((is_pae(vcpu) && bytes == 4) || !new) {
2615 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2616 if (is_pae(vcpu)) {
2617 gpa &= ~(gpa_t)7;
2618 bytes = 8;
2619 }
2620 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2621 if (r)
2622 gentry = 0;
2623 new = (const u8 *)&gentry;
2624 }
2625
2626 switch (bytes) {
2627 case 4:
2628 gentry = *(const u32 *)new;
2629 break;
2630 case 8:
2631 gentry = *(const u64 *)new;
2632 break;
2633 default:
2634 gentry = 0;
2635 break;
2636 }
2637
2638 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2639 spin_lock(&vcpu->kvm->mmu_lock);
2640 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2641 gentry = 0;
2642 kvm_mmu_access_page(vcpu, gfn);
2643 kvm_mmu_free_some_pages(vcpu);
2644 ++vcpu->kvm->stat.mmu_pte_write;
2645 kvm_mmu_audit(vcpu, "pre pte write");
2646 if (guest_initiated) {
2647 if (gfn == vcpu->arch.last_pt_write_gfn
2648 && !last_updated_pte_accessed(vcpu)) {
2649 ++vcpu->arch.last_pt_write_count;
2650 if (vcpu->arch.last_pt_write_count >= 3)
2651 flooded = 1;
2652 } else {
2653 vcpu->arch.last_pt_write_gfn = gfn;
2654 vcpu->arch.last_pt_write_count = 1;
2655 vcpu->arch.last_pte_updated = NULL;
2656 }
2657 }
2658 index = kvm_page_table_hashfn(gfn);
2659 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2660
2661 restart:
2662 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2663 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2664 continue;
2665 pte_size = sp->role.cr4_pae ? 8 : 4;
2666 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2667 misaligned |= bytes < 4;
2668 if (misaligned || flooded) {
2669 /*
2670 * Misaligned accesses are too much trouble to fix
2671 * up; also, they usually indicate a page is not used
2672 * as a page table.
2673 *
2674 * If we're seeing too many writes to a page,
2675 * it may no longer be a page table, or we may be
2676 * forking, in which case it is better to unmap the
2677 * page.
2678 */
2679 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2680 gpa, bytes, sp->role.word);
2681 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2682 goto restart;
2683 ++vcpu->kvm->stat.mmu_flooded;
2684 continue;
2685 }
2686 page_offset = offset;
2687 level = sp->role.level;
2688 npte = 1;
2689 if (!sp->role.cr4_pae) {
2690 page_offset <<= 1; /* 32->64 */
2691 /*
2692 * A 32-bit pde maps 4MB while the shadow pdes map
2693 * only 2MB. So we need to double the offset again
2694 * and zap two pdes instead of one.
2695 */
2696 if (level == PT32_ROOT_LEVEL) {
2697 page_offset &= ~7; /* kill rounding error */
2698 page_offset <<= 1;
2699 npte = 2;
2700 }
2701 quadrant = page_offset >> PAGE_SHIFT;
2702 page_offset &= ~PAGE_MASK;
2703 if (quadrant != sp->role.quadrant)
2704 continue;
2705 }
2706 spte = &sp->spt[page_offset / sizeof(*spte)];
2707 while (npte--) {
2708 entry = *spte;
2709 mmu_pte_write_zap_pte(vcpu, sp, spte);
2710 if (gentry)
2711 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2712 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2713 ++spte;
2714 }
2715 }
2716 kvm_mmu_audit(vcpu, "post pte write");
2717 spin_unlock(&vcpu->kvm->mmu_lock);
2718 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2719 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2720 vcpu->arch.update_pte.pfn = bad_pfn;
2721 }
2722 }
2723
2724 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2725 {
2726 gpa_t gpa;
2727 int r;
2728
2729 if (tdp_enabled)
2730 return 0;
2731
2732 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2733
2734 spin_lock(&vcpu->kvm->mmu_lock);
2735 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2736 spin_unlock(&vcpu->kvm->mmu_lock);
2737 return r;
2738 }
2739 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2740
2741 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2742 {
2743 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2744 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2745 struct kvm_mmu_page *sp;
2746
2747 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2748 struct kvm_mmu_page, link);
2749 kvm_mmu_zap_page(vcpu->kvm, sp);
2750 ++vcpu->kvm->stat.mmu_recycled;
2751 }
2752 }
2753
2754 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2755 {
2756 int r;
2757 enum emulation_result er;
2758
2759 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2760 if (r < 0)
2761 goto out;
2762
2763 if (!r) {
2764 r = 1;
2765 goto out;
2766 }
2767
2768 r = mmu_topup_memory_caches(vcpu);
2769 if (r)
2770 goto out;
2771
2772 er = emulate_instruction(vcpu, cr2, error_code, 0);
2773
2774 switch (er) {
2775 case EMULATE_DONE:
2776 return 1;
2777 case EMULATE_DO_MMIO:
2778 ++vcpu->stat.mmio_exits;
2779 return 0;
2780 case EMULATE_FAIL:
2781 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2782 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2783 vcpu->run->internal.ndata = 0;
2784 return 0;
2785 default:
2786 BUG();
2787 }
2788 out:
2789 return r;
2790 }
2791 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2792
2793 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2794 {
2795 vcpu->arch.mmu.invlpg(vcpu, gva);
2796 kvm_mmu_flush_tlb(vcpu);
2797 ++vcpu->stat.invlpg;
2798 }
2799 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2800
2801 void kvm_enable_tdp(void)
2802 {
2803 tdp_enabled = true;
2804 }
2805 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2806
2807 void kvm_disable_tdp(void)
2808 {
2809 tdp_enabled = false;
2810 }
2811 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2812
2813 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2814 {
2815 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2816 }
2817
2818 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2819 {
2820 struct page *page;
2821 int i;
2822
2823 ASSERT(vcpu);
2824
2825 /*
2826 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2827 * Therefore we need to allocate shadow page tables in the first
2828 * 4GB of memory, which happens to fit the DMA32 zone.
2829 */
2830 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2831 if (!page)
2832 return -ENOMEM;
2833
2834 vcpu->arch.mmu.pae_root = page_address(page);
2835 for (i = 0; i < 4; ++i)
2836 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2837
2838 return 0;
2839 }
2840
2841 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2842 {
2843 ASSERT(vcpu);
2844 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2845
2846 return alloc_mmu_pages(vcpu);
2847 }
2848
2849 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2850 {
2851 ASSERT(vcpu);
2852 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2853
2854 return init_kvm_mmu(vcpu);
2855 }
2856
2857 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2858 {
2859 ASSERT(vcpu);
2860
2861 destroy_kvm_mmu(vcpu);
2862 free_mmu_pages(vcpu);
2863 mmu_free_memory_caches(vcpu);
2864 }
2865
2866 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2867 {
2868 struct kvm_mmu_page *sp;
2869
2870 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2871 int i;
2872 u64 *pt;
2873
2874 if (!test_bit(slot, sp->slot_bitmap))
2875 continue;
2876
2877 pt = sp->spt;
2878 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2879 /* avoid RMW */
2880 if (pt[i] & PT_WRITABLE_MASK)
2881 pt[i] &= ~PT_WRITABLE_MASK;
2882 }
2883 kvm_flush_remote_tlbs(kvm);
2884 }
2885
2886 void kvm_mmu_zap_all(struct kvm *kvm)
2887 {
2888 struct kvm_mmu_page *sp, *node;
2889
2890 spin_lock(&kvm->mmu_lock);
2891 restart:
2892 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2893 if (kvm_mmu_zap_page(kvm, sp))
2894 goto restart;
2895
2896 spin_unlock(&kvm->mmu_lock);
2897
2898 kvm_flush_remote_tlbs(kvm);
2899 }
2900
2901 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2902 {
2903 struct kvm_mmu_page *page;
2904
2905 page = container_of(kvm->arch.active_mmu_pages.prev,
2906 struct kvm_mmu_page, link);
2907 kvm_mmu_zap_page(kvm, page);
2908 }
2909
2910 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2911 {
2912 struct kvm *kvm;
2913 struct kvm *kvm_freed = NULL;
2914 int cache_count = 0;
2915
2916 spin_lock(&kvm_lock);
2917
2918 list_for_each_entry(kvm, &vm_list, vm_list) {
2919 int npages, idx;
2920
2921 idx = srcu_read_lock(&kvm->srcu);
2922 spin_lock(&kvm->mmu_lock);
2923 npages = kvm->arch.n_alloc_mmu_pages -
2924 kvm->arch.n_free_mmu_pages;
2925 cache_count += npages;
2926 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2927 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2928 cache_count--;
2929 kvm_freed = kvm;
2930 }
2931 nr_to_scan--;
2932
2933 spin_unlock(&kvm->mmu_lock);
2934 srcu_read_unlock(&kvm->srcu, idx);
2935 }
2936 if (kvm_freed)
2937 list_move_tail(&kvm_freed->vm_list, &vm_list);
2938
2939 spin_unlock(&kvm_lock);
2940
2941 return cache_count;
2942 }
2943
2944 static struct shrinker mmu_shrinker = {
2945 .shrink = mmu_shrink,
2946 .seeks = DEFAULT_SEEKS * 10,
2947 };
2948
2949 static void mmu_destroy_caches(void)
2950 {
2951 if (pte_chain_cache)
2952 kmem_cache_destroy(pte_chain_cache);
2953 if (rmap_desc_cache)
2954 kmem_cache_destroy(rmap_desc_cache);
2955 if (mmu_page_header_cache)
2956 kmem_cache_destroy(mmu_page_header_cache);
2957 }
2958
2959 void kvm_mmu_module_exit(void)
2960 {
2961 mmu_destroy_caches();
2962 unregister_shrinker(&mmu_shrinker);
2963 }
2964
2965 int kvm_mmu_module_init(void)
2966 {
2967 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2968 sizeof(struct kvm_pte_chain),
2969 0, 0, NULL);
2970 if (!pte_chain_cache)
2971 goto nomem;
2972 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2973 sizeof(struct kvm_rmap_desc),
2974 0, 0, NULL);
2975 if (!rmap_desc_cache)
2976 goto nomem;
2977
2978 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2979 sizeof(struct kvm_mmu_page),
2980 0, 0, NULL);
2981 if (!mmu_page_header_cache)
2982 goto nomem;
2983
2984 register_shrinker(&mmu_shrinker);
2985
2986 return 0;
2987
2988 nomem:
2989 mmu_destroy_caches();
2990 return -ENOMEM;
2991 }
2992
2993 /*
2994 * Caculate mmu pages needed for kvm.
2995 */
2996 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2997 {
2998 int i;
2999 unsigned int nr_mmu_pages;
3000 unsigned int nr_pages = 0;
3001 struct kvm_memslots *slots;
3002
3003 slots = kvm_memslots(kvm);
3004
3005 for (i = 0; i < slots->nmemslots; i++)
3006 nr_pages += slots->memslots[i].npages;
3007
3008 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3009 nr_mmu_pages = max(nr_mmu_pages,
3010 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3011
3012 return nr_mmu_pages;
3013 }
3014
3015 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3016 unsigned len)
3017 {
3018 if (len > buffer->len)
3019 return NULL;
3020 return buffer->ptr;
3021 }
3022
3023 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3024 unsigned len)
3025 {
3026 void *ret;
3027
3028 ret = pv_mmu_peek_buffer(buffer, len);
3029 if (!ret)
3030 return ret;
3031 buffer->ptr += len;
3032 buffer->len -= len;
3033 buffer->processed += len;
3034 return ret;
3035 }
3036
3037 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3038 gpa_t addr, gpa_t value)
3039 {
3040 int bytes = 8;
3041 int r;
3042
3043 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3044 bytes = 4;
3045
3046 r = mmu_topup_memory_caches(vcpu);
3047 if (r)
3048 return r;
3049
3050 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3051 return -EFAULT;
3052
3053 return 1;
3054 }
3055
3056 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3057 {
3058 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3059 return 1;
3060 }
3061
3062 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3063 {
3064 spin_lock(&vcpu->kvm->mmu_lock);
3065 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3066 spin_unlock(&vcpu->kvm->mmu_lock);
3067 return 1;
3068 }
3069
3070 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3071 struct kvm_pv_mmu_op_buffer *buffer)
3072 {
3073 struct kvm_mmu_op_header *header;
3074
3075 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3076 if (!header)
3077 return 0;
3078 switch (header->op) {
3079 case KVM_MMU_OP_WRITE_PTE: {
3080 struct kvm_mmu_op_write_pte *wpte;
3081
3082 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3083 if (!wpte)
3084 return 0;
3085 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3086 wpte->pte_val);
3087 }
3088 case KVM_MMU_OP_FLUSH_TLB: {
3089 struct kvm_mmu_op_flush_tlb *ftlb;
3090
3091 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3092 if (!ftlb)
3093 return 0;
3094 return kvm_pv_mmu_flush_tlb(vcpu);
3095 }
3096 case KVM_MMU_OP_RELEASE_PT: {
3097 struct kvm_mmu_op_release_pt *rpt;
3098
3099 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3100 if (!rpt)
3101 return 0;
3102 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3103 }
3104 default: return 0;
3105 }
3106 }
3107
3108 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3109 gpa_t addr, unsigned long *ret)
3110 {
3111 int r;
3112 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3113
3114 buffer->ptr = buffer->buf;
3115 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3116 buffer->processed = 0;
3117
3118 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3119 if (r)
3120 goto out;
3121
3122 while (buffer->len) {
3123 r = kvm_pv_mmu_op_one(vcpu, buffer);
3124 if (r < 0)
3125 goto out;
3126 if (r == 0)
3127 break;
3128 }
3129
3130 r = 1;
3131 out:
3132 *ret = buffer->processed;
3133 return r;
3134 }
3135
3136 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3137 {
3138 struct kvm_shadow_walk_iterator iterator;
3139 int nr_sptes = 0;
3140
3141 spin_lock(&vcpu->kvm->mmu_lock);
3142 for_each_shadow_entry(vcpu, addr, iterator) {
3143 sptes[iterator.level-1] = *iterator.sptep;
3144 nr_sptes++;
3145 if (!is_shadow_present_pte(*iterator.sptep))
3146 break;
3147 }
3148 spin_unlock(&vcpu->kvm->mmu_lock);
3149
3150 return nr_sptes;
3151 }
3152 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3153
3154 #ifdef AUDIT
3155
3156 static const char *audit_msg;
3157
3158 static gva_t canonicalize(gva_t gva)
3159 {
3160 #ifdef CONFIG_X86_64
3161 gva = (long long)(gva << 16) >> 16;
3162 #endif
3163 return gva;
3164 }
3165
3166
3167 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3168
3169 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3170 inspect_spte_fn fn)
3171 {
3172 int i;
3173
3174 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3175 u64 ent = sp->spt[i];
3176
3177 if (is_shadow_present_pte(ent)) {
3178 if (!is_last_spte(ent, sp->role.level)) {
3179 struct kvm_mmu_page *child;
3180 child = page_header(ent & PT64_BASE_ADDR_MASK);
3181 __mmu_spte_walk(kvm, child, fn);
3182 } else
3183 fn(kvm, &sp->spt[i]);
3184 }
3185 }
3186 }
3187
3188 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3189 {
3190 int i;
3191 struct kvm_mmu_page *sp;
3192
3193 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3194 return;
3195 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3196 hpa_t root = vcpu->arch.mmu.root_hpa;
3197 sp = page_header(root);
3198 __mmu_spte_walk(vcpu->kvm, sp, fn);
3199 return;
3200 }
3201 for (i = 0; i < 4; ++i) {
3202 hpa_t root = vcpu->arch.mmu.pae_root[i];
3203
3204 if (root && VALID_PAGE(root)) {
3205 root &= PT64_BASE_ADDR_MASK;
3206 sp = page_header(root);
3207 __mmu_spte_walk(vcpu->kvm, sp, fn);
3208 }
3209 }
3210 return;
3211 }
3212
3213 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3214 gva_t va, int level)
3215 {
3216 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3217 int i;
3218 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3219
3220 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3221 u64 ent = pt[i];
3222
3223 if (ent == shadow_trap_nonpresent_pte)
3224 continue;
3225
3226 va = canonicalize(va);
3227 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3228 audit_mappings_page(vcpu, ent, va, level - 1);
3229 else {
3230 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3231 gfn_t gfn = gpa >> PAGE_SHIFT;
3232 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3233 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3234
3235 if (is_error_pfn(pfn)) {
3236 kvm_release_pfn_clean(pfn);
3237 continue;
3238 }
3239
3240 if (is_shadow_present_pte(ent)
3241 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3242 printk(KERN_ERR "xx audit error: (%s) levels %d"
3243 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3244 audit_msg, vcpu->arch.mmu.root_level,
3245 va, gpa, hpa, ent,
3246 is_shadow_present_pte(ent));
3247 else if (ent == shadow_notrap_nonpresent_pte
3248 && !is_error_hpa(hpa))
3249 printk(KERN_ERR "audit: (%s) notrap shadow,"
3250 " valid guest gva %lx\n", audit_msg, va);
3251 kvm_release_pfn_clean(pfn);
3252
3253 }
3254 }
3255 }
3256
3257 static void audit_mappings(struct kvm_vcpu *vcpu)
3258 {
3259 unsigned i;
3260
3261 if (vcpu->arch.mmu.root_level == 4)
3262 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3263 else
3264 for (i = 0; i < 4; ++i)
3265 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3266 audit_mappings_page(vcpu,
3267 vcpu->arch.mmu.pae_root[i],
3268 i << 30,
3269 2);
3270 }
3271
3272 static int count_rmaps(struct kvm_vcpu *vcpu)
3273 {
3274 struct kvm *kvm = vcpu->kvm;
3275 struct kvm_memslots *slots;
3276 int nmaps = 0;
3277 int i, j, k, idx;
3278
3279 idx = srcu_read_lock(&kvm->srcu);
3280 slots = kvm_memslots(kvm);
3281 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3282 struct kvm_memory_slot *m = &slots->memslots[i];
3283 struct kvm_rmap_desc *d;
3284
3285 for (j = 0; j < m->npages; ++j) {
3286 unsigned long *rmapp = &m->rmap[j];
3287
3288 if (!*rmapp)
3289 continue;
3290 if (!(*rmapp & 1)) {
3291 ++nmaps;
3292 continue;
3293 }
3294 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3295 while (d) {
3296 for (k = 0; k < RMAP_EXT; ++k)
3297 if (d->sptes[k])
3298 ++nmaps;
3299 else
3300 break;
3301 d = d->more;
3302 }
3303 }
3304 }
3305 srcu_read_unlock(&kvm->srcu, idx);
3306 return nmaps;
3307 }
3308
3309 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3310 {
3311 unsigned long *rmapp;
3312 struct kvm_mmu_page *rev_sp;
3313 gfn_t gfn;
3314
3315 if (*sptep & PT_WRITABLE_MASK) {
3316 rev_sp = page_header(__pa(sptep));
3317 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3318
3319 if (!gfn_to_memslot(kvm, gfn)) {
3320 if (!printk_ratelimit())
3321 return;
3322 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3323 audit_msg, gfn);
3324 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3325 audit_msg, (long int)(sptep - rev_sp->spt),
3326 rev_sp->gfn);
3327 dump_stack();
3328 return;
3329 }
3330
3331 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3332 rev_sp->role.level);
3333 if (!*rmapp) {
3334 if (!printk_ratelimit())
3335 return;
3336 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3337 audit_msg, *sptep);
3338 dump_stack();
3339 }
3340 }
3341
3342 }
3343
3344 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3345 {
3346 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3347 }
3348
3349 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3350 {
3351 struct kvm_mmu_page *sp;
3352 int i;
3353
3354 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3355 u64 *pt = sp->spt;
3356
3357 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3358 continue;
3359
3360 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3361 u64 ent = pt[i];
3362
3363 if (!(ent & PT_PRESENT_MASK))
3364 continue;
3365 if (!(ent & PT_WRITABLE_MASK))
3366 continue;
3367 inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3368 }
3369 }
3370 return;
3371 }
3372
3373 static void audit_rmap(struct kvm_vcpu *vcpu)
3374 {
3375 check_writable_mappings_rmap(vcpu);
3376 count_rmaps(vcpu);
3377 }
3378
3379 static void audit_write_protection(struct kvm_vcpu *vcpu)
3380 {
3381 struct kvm_mmu_page *sp;
3382 struct kvm_memory_slot *slot;
3383 unsigned long *rmapp;
3384 u64 *spte;
3385 gfn_t gfn;
3386
3387 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3388 if (sp->role.direct)
3389 continue;
3390 if (sp->unsync)
3391 continue;
3392
3393 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3394 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3395 rmapp = &slot->rmap[gfn - slot->base_gfn];
3396
3397 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3398 while (spte) {
3399 if (*spte & PT_WRITABLE_MASK)
3400 printk(KERN_ERR "%s: (%s) shadow page has "
3401 "writable mappings: gfn %lx role %x\n",
3402 __func__, audit_msg, sp->gfn,
3403 sp->role.word);
3404 spte = rmap_next(vcpu->kvm, rmapp, spte);
3405 }
3406 }
3407 }
3408
3409 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3410 {
3411 int olddbg = dbg;
3412
3413 dbg = 0;
3414 audit_msg = msg;
3415 audit_rmap(vcpu);
3416 audit_write_protection(vcpu);
3417 if (strcmp("pre pte write", audit_msg) != 0)
3418 audit_mappings(vcpu);
3419 audit_writable_sptes_have_rmaps(vcpu);
3420 dbg = olddbg;
3421 }
3422
3423 #endif
Linux kernel - Deliverables
This page took 0.097752 seconds and 6 git commands to generate.