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KVM: MMU: cleanup/fix mmu audit code
[deliverable/linux.git] / arch / x86 / kvm / mmu.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
19
20 #include "mmu.h"
21 #include "x86.h"
22 #include "kvm_cache_regs.h"
23
24 #include <linux/kvm_host.h>
25 #include <linux/types.h>
26 #include <linux/string.h>
27 #include <linux/mm.h>
28 #include <linux/highmem.h>
29 #include <linux/module.h>
30 #include <linux/swap.h>
31 #include <linux/hugetlb.h>
32 #include <linux/compiler.h>
33 #include <linux/srcu.h>
34 #include <linux/slab.h>
35
36 #include <asm/page.h>
37 #include <asm/cmpxchg.h>
38 #include <asm/io.h>
39 #include <asm/vmx.h>
40
41 /*
42 * When setting this variable to true it enables Two-Dimensional-Paging
43 * where the hardware walks 2 page tables:
44 * 1. the guest-virtual to guest-physical
45 * 2. while doing 1. it walks guest-physical to host-physical
46 * If the hardware supports that we don't need to do shadow paging.
47 */
48 bool tdp_enabled = false;
49
50 #undef MMU_DEBUG
51
52 #undef AUDIT
53
54 #ifdef AUDIT
55 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
56 #else
57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
58 #endif
59
60 #ifdef MMU_DEBUG
61
62 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
63 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
64
65 #else
66
67 #define pgprintk(x...) do { } while (0)
68 #define rmap_printk(x...) do { } while (0)
69
70 #endif
71
72 #if defined(MMU_DEBUG) || defined(AUDIT)
73 static int dbg = 0;
74 module_param(dbg, bool, 0644);
75 #endif
76
77 static int oos_shadow = 1;
78 module_param(oos_shadow, bool, 0644);
79
80 #ifndef MMU_DEBUG
81 #define ASSERT(x) do { } while (0)
82 #else
83 #define ASSERT(x) \
84 if (!(x)) { \
85 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
86 __FILE__, __LINE__, #x); \
87 }
88 #endif
89
90 #define PT_FIRST_AVAIL_BITS_SHIFT 9
91 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
92
93 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
94
95 #define PT64_LEVEL_BITS 9
96
97 #define PT64_LEVEL_SHIFT(level) \
98 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
99
100 #define PT64_LEVEL_MASK(level) \
101 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
102
103 #define PT64_INDEX(address, level)\
104 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
105
106
107 #define PT32_LEVEL_BITS 10
108
109 #define PT32_LEVEL_SHIFT(level) \
110 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
111
112 #define PT32_LEVEL_MASK(level) \
113 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
114 #define PT32_LVL_OFFSET_MASK(level) \
115 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
116 * PT32_LEVEL_BITS))) - 1))
117
118 #define PT32_INDEX(address, level)\
119 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
120
121
122 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
123 #define PT64_DIR_BASE_ADDR_MASK \
124 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
125 #define PT64_LVL_ADDR_MASK(level) \
126 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
127 * PT64_LEVEL_BITS))) - 1))
128 #define PT64_LVL_OFFSET_MASK(level) \
129 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
130 * PT64_LEVEL_BITS))) - 1))
131
132 #define PT32_BASE_ADDR_MASK PAGE_MASK
133 #define PT32_DIR_BASE_ADDR_MASK \
134 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
135 #define PT32_LVL_ADDR_MASK(level) \
136 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
137 * PT32_LEVEL_BITS))) - 1))
138
139 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
140 | PT64_NX_MASK)
141
142 #define RMAP_EXT 4
143
144 #define ACC_EXEC_MASK 1
145 #define ACC_WRITE_MASK PT_WRITABLE_MASK
146 #define ACC_USER_MASK PT_USER_MASK
147 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
148
149 #include <trace/events/kvm.h>
150
151 #define CREATE_TRACE_POINTS
152 #include "mmutrace.h"
153
154 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
155
156 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
157
158 struct kvm_rmap_desc {
159 u64 *sptes[RMAP_EXT];
160 struct kvm_rmap_desc *more;
161 };
162
163 struct kvm_shadow_walk_iterator {
164 u64 addr;
165 hpa_t shadow_addr;
166 int level;
167 u64 *sptep;
168 unsigned index;
169 };
170
171 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
172 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
173 shadow_walk_okay(&(_walker)); \
174 shadow_walk_next(&(_walker)))
175
176
177 struct kvm_unsync_walk {
178 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
179 };
180
181 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
182
183 static struct kmem_cache *pte_chain_cache;
184 static struct kmem_cache *rmap_desc_cache;
185 static struct kmem_cache *mmu_page_header_cache;
186
187 static u64 __read_mostly shadow_trap_nonpresent_pte;
188 static u64 __read_mostly shadow_notrap_nonpresent_pte;
189 static u64 __read_mostly shadow_base_present_pte;
190 static u64 __read_mostly shadow_nx_mask;
191 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
192 static u64 __read_mostly shadow_user_mask;
193 static u64 __read_mostly shadow_accessed_mask;
194 static u64 __read_mostly shadow_dirty_mask;
195
196 static inline u64 rsvd_bits(int s, int e)
197 {
198 return ((1ULL << (e - s + 1)) - 1) << s;
199 }
200
201 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
202 {
203 shadow_trap_nonpresent_pte = trap_pte;
204 shadow_notrap_nonpresent_pte = notrap_pte;
205 }
206 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
207
208 void kvm_mmu_set_base_ptes(u64 base_pte)
209 {
210 shadow_base_present_pte = base_pte;
211 }
212 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
213
214 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
215 u64 dirty_mask, u64 nx_mask, u64 x_mask)
216 {
217 shadow_user_mask = user_mask;
218 shadow_accessed_mask = accessed_mask;
219 shadow_dirty_mask = dirty_mask;
220 shadow_nx_mask = nx_mask;
221 shadow_x_mask = x_mask;
222 }
223 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
224
225 static int is_write_protection(struct kvm_vcpu *vcpu)
226 {
227 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
228 }
229
230 static int is_cpuid_PSE36(void)
231 {
232 return 1;
233 }
234
235 static int is_nx(struct kvm_vcpu *vcpu)
236 {
237 return vcpu->arch.efer & EFER_NX;
238 }
239
240 static int is_shadow_present_pte(u64 pte)
241 {
242 return pte != shadow_trap_nonpresent_pte
243 && pte != shadow_notrap_nonpresent_pte;
244 }
245
246 static int is_large_pte(u64 pte)
247 {
248 return pte & PT_PAGE_SIZE_MASK;
249 }
250
251 static int is_writable_pte(unsigned long pte)
252 {
253 return pte & PT_WRITABLE_MASK;
254 }
255
256 static int is_dirty_gpte(unsigned long pte)
257 {
258 return pte & PT_DIRTY_MASK;
259 }
260
261 static int is_rmap_spte(u64 pte)
262 {
263 return is_shadow_present_pte(pte);
264 }
265
266 static int is_last_spte(u64 pte, int level)
267 {
268 if (level == PT_PAGE_TABLE_LEVEL)
269 return 1;
270 if (is_large_pte(pte))
271 return 1;
272 return 0;
273 }
274
275 static pfn_t spte_to_pfn(u64 pte)
276 {
277 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
278 }
279
280 static gfn_t pse36_gfn_delta(u32 gpte)
281 {
282 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
283
284 return (gpte & PT32_DIR_PSE36_MASK) << shift;
285 }
286
287 static void __set_spte(u64 *sptep, u64 spte)
288 {
289 #ifdef CONFIG_X86_64
290 set_64bit((unsigned long *)sptep, spte);
291 #else
292 set_64bit((unsigned long long *)sptep, spte);
293 #endif
294 }
295
296 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
297 struct kmem_cache *base_cache, int min)
298 {
299 void *obj;
300
301 if (cache->nobjs >= min)
302 return 0;
303 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
304 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
305 if (!obj)
306 return -ENOMEM;
307 cache->objects[cache->nobjs++] = obj;
308 }
309 return 0;
310 }
311
312 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
313 {
314 while (mc->nobjs)
315 kfree(mc->objects[--mc->nobjs]);
316 }
317
318 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
319 int min)
320 {
321 struct page *page;
322
323 if (cache->nobjs >= min)
324 return 0;
325 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
326 page = alloc_page(GFP_KERNEL);
327 if (!page)
328 return -ENOMEM;
329 cache->objects[cache->nobjs++] = page_address(page);
330 }
331 return 0;
332 }
333
334 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
335 {
336 while (mc->nobjs)
337 free_page((unsigned long)mc->objects[--mc->nobjs]);
338 }
339
340 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
341 {
342 int r;
343
344 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
345 pte_chain_cache, 4);
346 if (r)
347 goto out;
348 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
349 rmap_desc_cache, 4);
350 if (r)
351 goto out;
352 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
353 if (r)
354 goto out;
355 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
356 mmu_page_header_cache, 4);
357 out:
358 return r;
359 }
360
361 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
362 {
363 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
364 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
365 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
366 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
367 }
368
369 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
370 size_t size)
371 {
372 void *p;
373
374 BUG_ON(!mc->nobjs);
375 p = mc->objects[--mc->nobjs];
376 return p;
377 }
378
379 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
380 {
381 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
382 sizeof(struct kvm_pte_chain));
383 }
384
385 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
386 {
387 kfree(pc);
388 }
389
390 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
391 {
392 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
393 sizeof(struct kvm_rmap_desc));
394 }
395
396 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
397 {
398 kfree(rd);
399 }
400
401 /*
402 * Return the pointer to the largepage write count for a given
403 * gfn, handling slots that are not large page aligned.
404 */
405 static int *slot_largepage_idx(gfn_t gfn,
406 struct kvm_memory_slot *slot,
407 int level)
408 {
409 unsigned long idx;
410
411 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
412 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
413 return &slot->lpage_info[level - 2][idx].write_count;
414 }
415
416 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
417 {
418 struct kvm_memory_slot *slot;
419 int *write_count;
420 int i;
421
422 gfn = unalias_gfn(kvm, gfn);
423
424 slot = gfn_to_memslot_unaliased(kvm, gfn);
425 for (i = PT_DIRECTORY_LEVEL;
426 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
427 write_count = slot_largepage_idx(gfn, slot, i);
428 *write_count += 1;
429 }
430 }
431
432 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
433 {
434 struct kvm_memory_slot *slot;
435 int *write_count;
436 int i;
437
438 gfn = unalias_gfn(kvm, gfn);
439 for (i = PT_DIRECTORY_LEVEL;
440 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
441 slot = gfn_to_memslot_unaliased(kvm, gfn);
442 write_count = slot_largepage_idx(gfn, slot, i);
443 *write_count -= 1;
444 WARN_ON(*write_count < 0);
445 }
446 }
447
448 static int has_wrprotected_page(struct kvm *kvm,
449 gfn_t gfn,
450 int level)
451 {
452 struct kvm_memory_slot *slot;
453 int *largepage_idx;
454
455 gfn = unalias_gfn(kvm, gfn);
456 slot = gfn_to_memslot_unaliased(kvm, gfn);
457 if (slot) {
458 largepage_idx = slot_largepage_idx(gfn, slot, level);
459 return *largepage_idx;
460 }
461
462 return 1;
463 }
464
465 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
466 {
467 unsigned long page_size;
468 int i, ret = 0;
469
470 page_size = kvm_host_page_size(kvm, gfn);
471
472 for (i = PT_PAGE_TABLE_LEVEL;
473 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
474 if (page_size >= KVM_HPAGE_SIZE(i))
475 ret = i;
476 else
477 break;
478 }
479
480 return ret;
481 }
482
483 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
484 {
485 struct kvm_memory_slot *slot;
486 int host_level, level, max_level;
487
488 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
489 if (slot && slot->dirty_bitmap)
490 return PT_PAGE_TABLE_LEVEL;
491
492 host_level = host_mapping_level(vcpu->kvm, large_gfn);
493
494 if (host_level == PT_PAGE_TABLE_LEVEL)
495 return host_level;
496
497 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
498 kvm_x86_ops->get_lpage_level() : host_level;
499
500 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
501 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
502 break;
503
504 return level - 1;
505 }
506
507 /*
508 * Take gfn and return the reverse mapping to it.
509 * Note: gfn must be unaliased before this function get called
510 */
511
512 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
513 {
514 struct kvm_memory_slot *slot;
515 unsigned long idx;
516
517 slot = gfn_to_memslot(kvm, gfn);
518 if (likely(level == PT_PAGE_TABLE_LEVEL))
519 return &slot->rmap[gfn - slot->base_gfn];
520
521 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
522 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
523
524 return &slot->lpage_info[level - 2][idx].rmap_pde;
525 }
526
527 /*
528 * Reverse mapping data structures:
529 *
530 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
531 * that points to page_address(page).
532 *
533 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
534 * containing more mappings.
535 *
536 * Returns the number of rmap entries before the spte was added or zero if
537 * the spte was not added.
538 *
539 */
540 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
541 {
542 struct kvm_mmu_page *sp;
543 struct kvm_rmap_desc *desc;
544 unsigned long *rmapp;
545 int i, count = 0;
546
547 if (!is_rmap_spte(*spte))
548 return count;
549 gfn = unalias_gfn(vcpu->kvm, gfn);
550 sp = page_header(__pa(spte));
551 sp->gfns[spte - sp->spt] = gfn;
552 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
553 if (!*rmapp) {
554 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
555 *rmapp = (unsigned long)spte;
556 } else if (!(*rmapp & 1)) {
557 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
558 desc = mmu_alloc_rmap_desc(vcpu);
559 desc->sptes[0] = (u64 *)*rmapp;
560 desc->sptes[1] = spte;
561 *rmapp = (unsigned long)desc | 1;
562 } else {
563 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
564 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
565 while (desc->sptes[RMAP_EXT-1] && desc->more) {
566 desc = desc->more;
567 count += RMAP_EXT;
568 }
569 if (desc->sptes[RMAP_EXT-1]) {
570 desc->more = mmu_alloc_rmap_desc(vcpu);
571 desc = desc->more;
572 }
573 for (i = 0; desc->sptes[i]; ++i)
574 ;
575 desc->sptes[i] = spte;
576 }
577 return count;
578 }
579
580 static void rmap_desc_remove_entry(unsigned long *rmapp,
581 struct kvm_rmap_desc *desc,
582 int i,
583 struct kvm_rmap_desc *prev_desc)
584 {
585 int j;
586
587 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
588 ;
589 desc->sptes[i] = desc->sptes[j];
590 desc->sptes[j] = NULL;
591 if (j != 0)
592 return;
593 if (!prev_desc && !desc->more)
594 *rmapp = (unsigned long)desc->sptes[0];
595 else
596 if (prev_desc)
597 prev_desc->more = desc->more;
598 else
599 *rmapp = (unsigned long)desc->more | 1;
600 mmu_free_rmap_desc(desc);
601 }
602
603 static void rmap_remove(struct kvm *kvm, u64 *spte)
604 {
605 struct kvm_rmap_desc *desc;
606 struct kvm_rmap_desc *prev_desc;
607 struct kvm_mmu_page *sp;
608 pfn_t pfn;
609 unsigned long *rmapp;
610 int i;
611
612 if (!is_rmap_spte(*spte))
613 return;
614 sp = page_header(__pa(spte));
615 pfn = spte_to_pfn(*spte);
616 if (*spte & shadow_accessed_mask)
617 kvm_set_pfn_accessed(pfn);
618 if (is_writable_pte(*spte))
619 kvm_set_pfn_dirty(pfn);
620 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
621 if (!*rmapp) {
622 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
623 BUG();
624 } else if (!(*rmapp & 1)) {
625 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
626 if ((u64 *)*rmapp != spte) {
627 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
628 spte, *spte);
629 BUG();
630 }
631 *rmapp = 0;
632 } else {
633 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
634 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
635 prev_desc = NULL;
636 while (desc) {
637 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
638 if (desc->sptes[i] == spte) {
639 rmap_desc_remove_entry(rmapp,
640 desc, i,
641 prev_desc);
642 return;
643 }
644 prev_desc = desc;
645 desc = desc->more;
646 }
647 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
648 BUG();
649 }
650 }
651
652 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
653 {
654 struct kvm_rmap_desc *desc;
655 struct kvm_rmap_desc *prev_desc;
656 u64 *prev_spte;
657 int i;
658
659 if (!*rmapp)
660 return NULL;
661 else if (!(*rmapp & 1)) {
662 if (!spte)
663 return (u64 *)*rmapp;
664 return NULL;
665 }
666 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
667 prev_desc = NULL;
668 prev_spte = NULL;
669 while (desc) {
670 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
671 if (prev_spte == spte)
672 return desc->sptes[i];
673 prev_spte = desc->sptes[i];
674 }
675 desc = desc->more;
676 }
677 return NULL;
678 }
679
680 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
681 {
682 unsigned long *rmapp;
683 u64 *spte;
684 int i, write_protected = 0;
685
686 gfn = unalias_gfn(kvm, gfn);
687 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
688
689 spte = rmap_next(kvm, rmapp, NULL);
690 while (spte) {
691 BUG_ON(!spte);
692 BUG_ON(!(*spte & PT_PRESENT_MASK));
693 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
694 if (is_writable_pte(*spte)) {
695 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
696 write_protected = 1;
697 }
698 spte = rmap_next(kvm, rmapp, spte);
699 }
700 if (write_protected) {
701 pfn_t pfn;
702
703 spte = rmap_next(kvm, rmapp, NULL);
704 pfn = spte_to_pfn(*spte);
705 kvm_set_pfn_dirty(pfn);
706 }
707
708 /* check for huge page mappings */
709 for (i = PT_DIRECTORY_LEVEL;
710 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
711 rmapp = gfn_to_rmap(kvm, gfn, i);
712 spte = rmap_next(kvm, rmapp, NULL);
713 while (spte) {
714 BUG_ON(!spte);
715 BUG_ON(!(*spte & PT_PRESENT_MASK));
716 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
717 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
718 if (is_writable_pte(*spte)) {
719 rmap_remove(kvm, spte);
720 --kvm->stat.lpages;
721 __set_spte(spte, shadow_trap_nonpresent_pte);
722 spte = NULL;
723 write_protected = 1;
724 }
725 spte = rmap_next(kvm, rmapp, spte);
726 }
727 }
728
729 return write_protected;
730 }
731
732 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
733 unsigned long data)
734 {
735 u64 *spte;
736 int need_tlb_flush = 0;
737
738 while ((spte = rmap_next(kvm, rmapp, NULL))) {
739 BUG_ON(!(*spte & PT_PRESENT_MASK));
740 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
741 rmap_remove(kvm, spte);
742 __set_spte(spte, shadow_trap_nonpresent_pte);
743 need_tlb_flush = 1;
744 }
745 return need_tlb_flush;
746 }
747
748 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
749 unsigned long data)
750 {
751 int need_flush = 0;
752 u64 *spte, new_spte;
753 pte_t *ptep = (pte_t *)data;
754 pfn_t new_pfn;
755
756 WARN_ON(pte_huge(*ptep));
757 new_pfn = pte_pfn(*ptep);
758 spte = rmap_next(kvm, rmapp, NULL);
759 while (spte) {
760 BUG_ON(!is_shadow_present_pte(*spte));
761 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
762 need_flush = 1;
763 if (pte_write(*ptep)) {
764 rmap_remove(kvm, spte);
765 __set_spte(spte, shadow_trap_nonpresent_pte);
766 spte = rmap_next(kvm, rmapp, NULL);
767 } else {
768 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
769 new_spte |= (u64)new_pfn << PAGE_SHIFT;
770
771 new_spte &= ~PT_WRITABLE_MASK;
772 new_spte &= ~SPTE_HOST_WRITEABLE;
773 if (is_writable_pte(*spte))
774 kvm_set_pfn_dirty(spte_to_pfn(*spte));
775 __set_spte(spte, new_spte);
776 spte = rmap_next(kvm, rmapp, spte);
777 }
778 }
779 if (need_flush)
780 kvm_flush_remote_tlbs(kvm);
781
782 return 0;
783 }
784
785 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
786 unsigned long data,
787 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
788 unsigned long data))
789 {
790 int i, j;
791 int ret;
792 int retval = 0;
793 struct kvm_memslots *slots;
794
795 slots = rcu_dereference(kvm->memslots);
796
797 for (i = 0; i < slots->nmemslots; i++) {
798 struct kvm_memory_slot *memslot = &slots->memslots[i];
799 unsigned long start = memslot->userspace_addr;
800 unsigned long end;
801
802 end = start + (memslot->npages << PAGE_SHIFT);
803 if (hva >= start && hva < end) {
804 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
805
806 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
807
808 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
809 int idx = gfn_offset;
810 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
811 ret |= handler(kvm,
812 &memslot->lpage_info[j][idx].rmap_pde,
813 data);
814 }
815 trace_kvm_age_page(hva, memslot, ret);
816 retval |= ret;
817 }
818 }
819
820 return retval;
821 }
822
823 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
824 {
825 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
826 }
827
828 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
829 {
830 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
831 }
832
833 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
834 unsigned long data)
835 {
836 u64 *spte;
837 int young = 0;
838
839 /*
840 * Emulate the accessed bit for EPT, by checking if this page has
841 * an EPT mapping, and clearing it if it does. On the next access,
842 * a new EPT mapping will be established.
843 * This has some overhead, but not as much as the cost of swapping
844 * out actively used pages or breaking up actively used hugepages.
845 */
846 if (!shadow_accessed_mask)
847 return kvm_unmap_rmapp(kvm, rmapp, data);
848
849 spte = rmap_next(kvm, rmapp, NULL);
850 while (spte) {
851 int _young;
852 u64 _spte = *spte;
853 BUG_ON(!(_spte & PT_PRESENT_MASK));
854 _young = _spte & PT_ACCESSED_MASK;
855 if (_young) {
856 young = 1;
857 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
858 }
859 spte = rmap_next(kvm, rmapp, spte);
860 }
861 return young;
862 }
863
864 #define RMAP_RECYCLE_THRESHOLD 1000
865
866 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
867 {
868 unsigned long *rmapp;
869 struct kvm_mmu_page *sp;
870
871 sp = page_header(__pa(spte));
872
873 gfn = unalias_gfn(vcpu->kvm, gfn);
874 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
875
876 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
877 kvm_flush_remote_tlbs(vcpu->kvm);
878 }
879
880 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
881 {
882 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
883 }
884
885 #ifdef MMU_DEBUG
886 static int is_empty_shadow_page(u64 *spt)
887 {
888 u64 *pos;
889 u64 *end;
890
891 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
892 if (is_shadow_present_pte(*pos)) {
893 printk(KERN_ERR "%s: %p %llx\n", __func__,
894 pos, *pos);
895 return 0;
896 }
897 return 1;
898 }
899 #endif
900
901 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
902 {
903 ASSERT(is_empty_shadow_page(sp->spt));
904 list_del(&sp->link);
905 __free_page(virt_to_page(sp->spt));
906 __free_page(virt_to_page(sp->gfns));
907 kfree(sp);
908 ++kvm->arch.n_free_mmu_pages;
909 }
910
911 static unsigned kvm_page_table_hashfn(gfn_t gfn)
912 {
913 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
914 }
915
916 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
917 u64 *parent_pte)
918 {
919 struct kvm_mmu_page *sp;
920
921 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
922 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
923 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
924 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
925 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
926 INIT_LIST_HEAD(&sp->oos_link);
927 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
928 sp->multimapped = 0;
929 sp->parent_pte = parent_pte;
930 --vcpu->kvm->arch.n_free_mmu_pages;
931 return sp;
932 }
933
934 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
935 struct kvm_mmu_page *sp, u64 *parent_pte)
936 {
937 struct kvm_pte_chain *pte_chain;
938 struct hlist_node *node;
939 int i;
940
941 if (!parent_pte)
942 return;
943 if (!sp->multimapped) {
944 u64 *old = sp->parent_pte;
945
946 if (!old) {
947 sp->parent_pte = parent_pte;
948 return;
949 }
950 sp->multimapped = 1;
951 pte_chain = mmu_alloc_pte_chain(vcpu);
952 INIT_HLIST_HEAD(&sp->parent_ptes);
953 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
954 pte_chain->parent_ptes[0] = old;
955 }
956 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
957 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
958 continue;
959 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
960 if (!pte_chain->parent_ptes[i]) {
961 pte_chain->parent_ptes[i] = parent_pte;
962 return;
963 }
964 }
965 pte_chain = mmu_alloc_pte_chain(vcpu);
966 BUG_ON(!pte_chain);
967 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
968 pte_chain->parent_ptes[0] = parent_pte;
969 }
970
971 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
972 u64 *parent_pte)
973 {
974 struct kvm_pte_chain *pte_chain;
975 struct hlist_node *node;
976 int i;
977
978 if (!sp->multimapped) {
979 BUG_ON(sp->parent_pte != parent_pte);
980 sp->parent_pte = NULL;
981 return;
982 }
983 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
984 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
985 if (!pte_chain->parent_ptes[i])
986 break;
987 if (pte_chain->parent_ptes[i] != parent_pte)
988 continue;
989 while (i + 1 < NR_PTE_CHAIN_ENTRIES
990 && pte_chain->parent_ptes[i + 1]) {
991 pte_chain->parent_ptes[i]
992 = pte_chain->parent_ptes[i + 1];
993 ++i;
994 }
995 pte_chain->parent_ptes[i] = NULL;
996 if (i == 0) {
997 hlist_del(&pte_chain->link);
998 mmu_free_pte_chain(pte_chain);
999 if (hlist_empty(&sp->parent_ptes)) {
1000 sp->multimapped = 0;
1001 sp->parent_pte = NULL;
1002 }
1003 }
1004 return;
1005 }
1006 BUG();
1007 }
1008
1009
1010 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1011 mmu_parent_walk_fn fn)
1012 {
1013 struct kvm_pte_chain *pte_chain;
1014 struct hlist_node *node;
1015 struct kvm_mmu_page *parent_sp;
1016 int i;
1017
1018 if (!sp->multimapped && sp->parent_pte) {
1019 parent_sp = page_header(__pa(sp->parent_pte));
1020 fn(vcpu, parent_sp);
1021 mmu_parent_walk(vcpu, parent_sp, fn);
1022 return;
1023 }
1024 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1025 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1026 if (!pte_chain->parent_ptes[i])
1027 break;
1028 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1029 fn(vcpu, parent_sp);
1030 mmu_parent_walk(vcpu, parent_sp, fn);
1031 }
1032 }
1033
1034 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1035 {
1036 unsigned int index;
1037 struct kvm_mmu_page *sp = page_header(__pa(spte));
1038
1039 index = spte - sp->spt;
1040 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1041 sp->unsync_children++;
1042 WARN_ON(!sp->unsync_children);
1043 }
1044
1045 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1046 {
1047 struct kvm_pte_chain *pte_chain;
1048 struct hlist_node *node;
1049 int i;
1050
1051 if (!sp->parent_pte)
1052 return;
1053
1054 if (!sp->multimapped) {
1055 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1056 return;
1057 }
1058
1059 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1060 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1061 if (!pte_chain->parent_ptes[i])
1062 break;
1063 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1064 }
1065 }
1066
1067 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1068 {
1069 kvm_mmu_update_parents_unsync(sp);
1070 return 1;
1071 }
1072
1073 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
1074 struct kvm_mmu_page *sp)
1075 {
1076 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
1077 kvm_mmu_update_parents_unsync(sp);
1078 }
1079
1080 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1081 struct kvm_mmu_page *sp)
1082 {
1083 int i;
1084
1085 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1086 sp->spt[i] = shadow_trap_nonpresent_pte;
1087 }
1088
1089 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1090 struct kvm_mmu_page *sp)
1091 {
1092 return 1;
1093 }
1094
1095 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1096 {
1097 }
1098
1099 #define KVM_PAGE_ARRAY_NR 16
1100
1101 struct kvm_mmu_pages {
1102 struct mmu_page_and_offset {
1103 struct kvm_mmu_page *sp;
1104 unsigned int idx;
1105 } page[KVM_PAGE_ARRAY_NR];
1106 unsigned int nr;
1107 };
1108
1109 #define for_each_unsync_children(bitmap, idx) \
1110 for (idx = find_first_bit(bitmap, 512); \
1111 idx < 512; \
1112 idx = find_next_bit(bitmap, 512, idx+1))
1113
1114 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1115 int idx)
1116 {
1117 int i;
1118
1119 if (sp->unsync)
1120 for (i=0; i < pvec->nr; i++)
1121 if (pvec->page[i].sp == sp)
1122 return 0;
1123
1124 pvec->page[pvec->nr].sp = sp;
1125 pvec->page[pvec->nr].idx = idx;
1126 pvec->nr++;
1127 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1128 }
1129
1130 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1131 struct kvm_mmu_pages *pvec)
1132 {
1133 int i, ret, nr_unsync_leaf = 0;
1134
1135 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1136 u64 ent = sp->spt[i];
1137
1138 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1139 struct kvm_mmu_page *child;
1140 child = page_header(ent & PT64_BASE_ADDR_MASK);
1141
1142 if (child->unsync_children) {
1143 if (mmu_pages_add(pvec, child, i))
1144 return -ENOSPC;
1145
1146 ret = __mmu_unsync_walk(child, pvec);
1147 if (!ret)
1148 __clear_bit(i, sp->unsync_child_bitmap);
1149 else if (ret > 0)
1150 nr_unsync_leaf += ret;
1151 else
1152 return ret;
1153 }
1154
1155 if (child->unsync) {
1156 nr_unsync_leaf++;
1157 if (mmu_pages_add(pvec, child, i))
1158 return -ENOSPC;
1159 }
1160 }
1161 }
1162
1163 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1164 sp->unsync_children = 0;
1165
1166 return nr_unsync_leaf;
1167 }
1168
1169 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1170 struct kvm_mmu_pages *pvec)
1171 {
1172 if (!sp->unsync_children)
1173 return 0;
1174
1175 mmu_pages_add(pvec, sp, 0);
1176 return __mmu_unsync_walk(sp, pvec);
1177 }
1178
1179 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1180 {
1181 unsigned index;
1182 struct hlist_head *bucket;
1183 struct kvm_mmu_page *sp;
1184 struct hlist_node *node;
1185
1186 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1187 index = kvm_page_table_hashfn(gfn);
1188 bucket = &kvm->arch.mmu_page_hash[index];
1189 hlist_for_each_entry(sp, node, bucket, hash_link)
1190 if (sp->gfn == gfn && !sp->role.direct
1191 && !sp->role.invalid) {
1192 pgprintk("%s: found role %x\n",
1193 __func__, sp->role.word);
1194 return sp;
1195 }
1196 return NULL;
1197 }
1198
1199 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1200 {
1201 WARN_ON(!sp->unsync);
1202 sp->unsync = 0;
1203 --kvm->stat.mmu_unsync;
1204 }
1205
1206 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1207
1208 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1209 {
1210 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1211 kvm_mmu_zap_page(vcpu->kvm, sp);
1212 return 1;
1213 }
1214
1215 trace_kvm_mmu_sync_page(sp);
1216 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1217 kvm_flush_remote_tlbs(vcpu->kvm);
1218 kvm_unlink_unsync_page(vcpu->kvm, sp);
1219 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1220 kvm_mmu_zap_page(vcpu->kvm, sp);
1221 return 1;
1222 }
1223
1224 kvm_mmu_flush_tlb(vcpu);
1225 return 0;
1226 }
1227
1228 struct mmu_page_path {
1229 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1230 unsigned int idx[PT64_ROOT_LEVEL-1];
1231 };
1232
1233 #define for_each_sp(pvec, sp, parents, i) \
1234 for (i = mmu_pages_next(&pvec, &parents, -1), \
1235 sp = pvec.page[i].sp; \
1236 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1237 i = mmu_pages_next(&pvec, &parents, i))
1238
1239 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1240 struct mmu_page_path *parents,
1241 int i)
1242 {
1243 int n;
1244
1245 for (n = i+1; n < pvec->nr; n++) {
1246 struct kvm_mmu_page *sp = pvec->page[n].sp;
1247
1248 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1249 parents->idx[0] = pvec->page[n].idx;
1250 return n;
1251 }
1252
1253 parents->parent[sp->role.level-2] = sp;
1254 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1255 }
1256
1257 return n;
1258 }
1259
1260 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1261 {
1262 struct kvm_mmu_page *sp;
1263 unsigned int level = 0;
1264
1265 do {
1266 unsigned int idx = parents->idx[level];
1267
1268 sp = parents->parent[level];
1269 if (!sp)
1270 return;
1271
1272 --sp->unsync_children;
1273 WARN_ON((int)sp->unsync_children < 0);
1274 __clear_bit(idx, sp->unsync_child_bitmap);
1275 level++;
1276 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1277 }
1278
1279 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1280 struct mmu_page_path *parents,
1281 struct kvm_mmu_pages *pvec)
1282 {
1283 parents->parent[parent->role.level-1] = NULL;
1284 pvec->nr = 0;
1285 }
1286
1287 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1288 struct kvm_mmu_page *parent)
1289 {
1290 int i;
1291 struct kvm_mmu_page *sp;
1292 struct mmu_page_path parents;
1293 struct kvm_mmu_pages pages;
1294
1295 kvm_mmu_pages_init(parent, &parents, &pages);
1296 while (mmu_unsync_walk(parent, &pages)) {
1297 int protected = 0;
1298
1299 for_each_sp(pages, sp, parents, i)
1300 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1301
1302 if (protected)
1303 kvm_flush_remote_tlbs(vcpu->kvm);
1304
1305 for_each_sp(pages, sp, parents, i) {
1306 kvm_sync_page(vcpu, sp);
1307 mmu_pages_clear_parents(&parents);
1308 }
1309 cond_resched_lock(&vcpu->kvm->mmu_lock);
1310 kvm_mmu_pages_init(parent, &parents, &pages);
1311 }
1312 }
1313
1314 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1315 gfn_t gfn,
1316 gva_t gaddr,
1317 unsigned level,
1318 int direct,
1319 unsigned access,
1320 u64 *parent_pte)
1321 {
1322 union kvm_mmu_page_role role;
1323 unsigned index;
1324 unsigned quadrant;
1325 struct hlist_head *bucket;
1326 struct kvm_mmu_page *sp;
1327 struct hlist_node *node, *tmp;
1328
1329 role = vcpu->arch.mmu.base_role;
1330 role.level = level;
1331 role.direct = direct;
1332 if (role.direct)
1333 role.glevels = 0;
1334 role.access = access;
1335 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1336 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1337 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1338 role.quadrant = quadrant;
1339 }
1340 index = kvm_page_table_hashfn(gfn);
1341 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1342 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1343 if (sp->gfn == gfn) {
1344 if (sp->unsync)
1345 if (kvm_sync_page(vcpu, sp))
1346 continue;
1347
1348 if (sp->role.word != role.word)
1349 continue;
1350
1351 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1352 if (sp->unsync_children) {
1353 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1354 kvm_mmu_mark_parents_unsync(vcpu, sp);
1355 }
1356 trace_kvm_mmu_get_page(sp, false);
1357 return sp;
1358 }
1359 ++vcpu->kvm->stat.mmu_cache_miss;
1360 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1361 if (!sp)
1362 return sp;
1363 sp->gfn = gfn;
1364 sp->role = role;
1365 hlist_add_head(&sp->hash_link, bucket);
1366 if (!direct) {
1367 if (rmap_write_protect(vcpu->kvm, gfn))
1368 kvm_flush_remote_tlbs(vcpu->kvm);
1369 account_shadowed(vcpu->kvm, gfn);
1370 }
1371 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1372 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1373 else
1374 nonpaging_prefetch_page(vcpu, sp);
1375 trace_kvm_mmu_get_page(sp, true);
1376 return sp;
1377 }
1378
1379 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1380 struct kvm_vcpu *vcpu, u64 addr)
1381 {
1382 iterator->addr = addr;
1383 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1384 iterator->level = vcpu->arch.mmu.shadow_root_level;
1385 if (iterator->level == PT32E_ROOT_LEVEL) {
1386 iterator->shadow_addr
1387 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1388 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1389 --iterator->level;
1390 if (!iterator->shadow_addr)
1391 iterator->level = 0;
1392 }
1393 }
1394
1395 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1396 {
1397 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1398 return false;
1399
1400 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1401 if (is_large_pte(*iterator->sptep))
1402 return false;
1403
1404 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1405 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1406 return true;
1407 }
1408
1409 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1410 {
1411 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1412 --iterator->level;
1413 }
1414
1415 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1416 struct kvm_mmu_page *sp)
1417 {
1418 unsigned i;
1419 u64 *pt;
1420 u64 ent;
1421
1422 pt = sp->spt;
1423
1424 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1425 ent = pt[i];
1426
1427 if (is_shadow_present_pte(ent)) {
1428 if (!is_last_spte(ent, sp->role.level)) {
1429 ent &= PT64_BASE_ADDR_MASK;
1430 mmu_page_remove_parent_pte(page_header(ent),
1431 &pt[i]);
1432 } else {
1433 if (is_large_pte(ent))
1434 --kvm->stat.lpages;
1435 rmap_remove(kvm, &pt[i]);
1436 }
1437 }
1438 pt[i] = shadow_trap_nonpresent_pte;
1439 }
1440 }
1441
1442 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1443 {
1444 mmu_page_remove_parent_pte(sp, parent_pte);
1445 }
1446
1447 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1448 {
1449 int i;
1450 struct kvm_vcpu *vcpu;
1451
1452 kvm_for_each_vcpu(i, vcpu, kvm)
1453 vcpu->arch.last_pte_updated = NULL;
1454 }
1455
1456 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1457 {
1458 u64 *parent_pte;
1459
1460 while (sp->multimapped || sp->parent_pte) {
1461 if (!sp->multimapped)
1462 parent_pte = sp->parent_pte;
1463 else {
1464 struct kvm_pte_chain *chain;
1465
1466 chain = container_of(sp->parent_ptes.first,
1467 struct kvm_pte_chain, link);
1468 parent_pte = chain->parent_ptes[0];
1469 }
1470 BUG_ON(!parent_pte);
1471 kvm_mmu_put_page(sp, parent_pte);
1472 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1473 }
1474 }
1475
1476 static int mmu_zap_unsync_children(struct kvm *kvm,
1477 struct kvm_mmu_page *parent)
1478 {
1479 int i, zapped = 0;
1480 struct mmu_page_path parents;
1481 struct kvm_mmu_pages pages;
1482
1483 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1484 return 0;
1485
1486 kvm_mmu_pages_init(parent, &parents, &pages);
1487 while (mmu_unsync_walk(parent, &pages)) {
1488 struct kvm_mmu_page *sp;
1489
1490 for_each_sp(pages, sp, parents, i) {
1491 kvm_mmu_zap_page(kvm, sp);
1492 mmu_pages_clear_parents(&parents);
1493 zapped++;
1494 }
1495 kvm_mmu_pages_init(parent, &parents, &pages);
1496 }
1497
1498 return zapped;
1499 }
1500
1501 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1502 {
1503 int ret;
1504
1505 trace_kvm_mmu_zap_page(sp);
1506 ++kvm->stat.mmu_shadow_zapped;
1507 ret = mmu_zap_unsync_children(kvm, sp);
1508 kvm_mmu_page_unlink_children(kvm, sp);
1509 kvm_mmu_unlink_parents(kvm, sp);
1510 kvm_flush_remote_tlbs(kvm);
1511 if (!sp->role.invalid && !sp->role.direct)
1512 unaccount_shadowed(kvm, sp->gfn);
1513 if (sp->unsync)
1514 kvm_unlink_unsync_page(kvm, sp);
1515 if (!sp->root_count) {
1516 hlist_del(&sp->hash_link);
1517 kvm_mmu_free_page(kvm, sp);
1518 } else {
1519 sp->role.invalid = 1;
1520 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1521 kvm_reload_remote_mmus(kvm);
1522 }
1523 kvm_mmu_reset_last_pte_updated(kvm);
1524 return ret;
1525 }
1526
1527 /*
1528 * Changing the number of mmu pages allocated to the vm
1529 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1530 */
1531 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1532 {
1533 int used_pages;
1534
1535 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1536 used_pages = max(0, used_pages);
1537
1538 /*
1539 * If we set the number of mmu pages to be smaller be than the
1540 * number of actived pages , we must to free some mmu pages before we
1541 * change the value
1542 */
1543
1544 if (used_pages > kvm_nr_mmu_pages) {
1545 while (used_pages > kvm_nr_mmu_pages &&
1546 !list_empty(&kvm->arch.active_mmu_pages)) {
1547 struct kvm_mmu_page *page;
1548
1549 page = container_of(kvm->arch.active_mmu_pages.prev,
1550 struct kvm_mmu_page, link);
1551 used_pages -= kvm_mmu_zap_page(kvm, page);
1552 used_pages--;
1553 }
1554 kvm_nr_mmu_pages = used_pages;
1555 kvm->arch.n_free_mmu_pages = 0;
1556 }
1557 else
1558 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1559 - kvm->arch.n_alloc_mmu_pages;
1560
1561 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1562 }
1563
1564 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1565 {
1566 unsigned index;
1567 struct hlist_head *bucket;
1568 struct kvm_mmu_page *sp;
1569 struct hlist_node *node, *n;
1570 int r;
1571
1572 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1573 r = 0;
1574 index = kvm_page_table_hashfn(gfn);
1575 bucket = &kvm->arch.mmu_page_hash[index];
1576 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1577 if (sp->gfn == gfn && !sp->role.direct) {
1578 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1579 sp->role.word);
1580 r = 1;
1581 if (kvm_mmu_zap_page(kvm, sp))
1582 n = bucket->first;
1583 }
1584 return r;
1585 }
1586
1587 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1588 {
1589 unsigned index;
1590 struct hlist_head *bucket;
1591 struct kvm_mmu_page *sp;
1592 struct hlist_node *node, *nn;
1593
1594 index = kvm_page_table_hashfn(gfn);
1595 bucket = &kvm->arch.mmu_page_hash[index];
1596 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1597 if (sp->gfn == gfn && !sp->role.direct
1598 && !sp->role.invalid) {
1599 pgprintk("%s: zap %lx %x\n",
1600 __func__, gfn, sp->role.word);
1601 if (kvm_mmu_zap_page(kvm, sp))
1602 nn = bucket->first;
1603 }
1604 }
1605 }
1606
1607 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1608 {
1609 int slot = memslot_id(kvm, gfn);
1610 struct kvm_mmu_page *sp = page_header(__pa(pte));
1611
1612 __set_bit(slot, sp->slot_bitmap);
1613 }
1614
1615 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1616 {
1617 int i;
1618 u64 *pt = sp->spt;
1619
1620 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1621 return;
1622
1623 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1624 if (pt[i] == shadow_notrap_nonpresent_pte)
1625 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1626 }
1627 }
1628
1629 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1630 {
1631 struct page *page;
1632
1633 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
1634
1635 if (gpa == UNMAPPED_GVA)
1636 return NULL;
1637
1638 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1639
1640 return page;
1641 }
1642
1643 /*
1644 * The function is based on mtrr_type_lookup() in
1645 * arch/x86/kernel/cpu/mtrr/generic.c
1646 */
1647 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1648 u64 start, u64 end)
1649 {
1650 int i;
1651 u64 base, mask;
1652 u8 prev_match, curr_match;
1653 int num_var_ranges = KVM_NR_VAR_MTRR;
1654
1655 if (!mtrr_state->enabled)
1656 return 0xFF;
1657
1658 /* Make end inclusive end, instead of exclusive */
1659 end--;
1660
1661 /* Look in fixed ranges. Just return the type as per start */
1662 if (mtrr_state->have_fixed && (start < 0x100000)) {
1663 int idx;
1664
1665 if (start < 0x80000) {
1666 idx = 0;
1667 idx += (start >> 16);
1668 return mtrr_state->fixed_ranges[idx];
1669 } else if (start < 0xC0000) {
1670 idx = 1 * 8;
1671 idx += ((start - 0x80000) >> 14);
1672 return mtrr_state->fixed_ranges[idx];
1673 } else if (start < 0x1000000) {
1674 idx = 3 * 8;
1675 idx += ((start - 0xC0000) >> 12);
1676 return mtrr_state->fixed_ranges[idx];
1677 }
1678 }
1679
1680 /*
1681 * Look in variable ranges
1682 * Look of multiple ranges matching this address and pick type
1683 * as per MTRR precedence
1684 */
1685 if (!(mtrr_state->enabled & 2))
1686 return mtrr_state->def_type;
1687
1688 prev_match = 0xFF;
1689 for (i = 0; i < num_var_ranges; ++i) {
1690 unsigned short start_state, end_state;
1691
1692 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1693 continue;
1694
1695 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1696 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1697 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1698 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1699
1700 start_state = ((start & mask) == (base & mask));
1701 end_state = ((end & mask) == (base & mask));
1702 if (start_state != end_state)
1703 return 0xFE;
1704
1705 if ((start & mask) != (base & mask))
1706 continue;
1707
1708 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1709 if (prev_match == 0xFF) {
1710 prev_match = curr_match;
1711 continue;
1712 }
1713
1714 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1715 curr_match == MTRR_TYPE_UNCACHABLE)
1716 return MTRR_TYPE_UNCACHABLE;
1717
1718 if ((prev_match == MTRR_TYPE_WRBACK &&
1719 curr_match == MTRR_TYPE_WRTHROUGH) ||
1720 (prev_match == MTRR_TYPE_WRTHROUGH &&
1721 curr_match == MTRR_TYPE_WRBACK)) {
1722 prev_match = MTRR_TYPE_WRTHROUGH;
1723 curr_match = MTRR_TYPE_WRTHROUGH;
1724 }
1725
1726 if (prev_match != curr_match)
1727 return MTRR_TYPE_UNCACHABLE;
1728 }
1729
1730 if (prev_match != 0xFF)
1731 return prev_match;
1732
1733 return mtrr_state->def_type;
1734 }
1735
1736 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1737 {
1738 u8 mtrr;
1739
1740 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1741 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1742 if (mtrr == 0xfe || mtrr == 0xff)
1743 mtrr = MTRR_TYPE_WRBACK;
1744 return mtrr;
1745 }
1746 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1747
1748 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1749 {
1750 unsigned index;
1751 struct hlist_head *bucket;
1752 struct kvm_mmu_page *s;
1753 struct hlist_node *node, *n;
1754
1755 trace_kvm_mmu_unsync_page(sp);
1756 index = kvm_page_table_hashfn(sp->gfn);
1757 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1758 /* don't unsync if pagetable is shadowed with multiple roles */
1759 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1760 if (s->gfn != sp->gfn || s->role.direct)
1761 continue;
1762 if (s->role.word != sp->role.word)
1763 return 1;
1764 }
1765 ++vcpu->kvm->stat.mmu_unsync;
1766 sp->unsync = 1;
1767
1768 kvm_mmu_mark_parents_unsync(vcpu, sp);
1769
1770 mmu_convert_notrap(sp);
1771 return 0;
1772 }
1773
1774 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1775 bool can_unsync)
1776 {
1777 struct kvm_mmu_page *shadow;
1778
1779 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1780 if (shadow) {
1781 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1782 return 1;
1783 if (shadow->unsync)
1784 return 0;
1785 if (can_unsync && oos_shadow)
1786 return kvm_unsync_page(vcpu, shadow);
1787 return 1;
1788 }
1789 return 0;
1790 }
1791
1792 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1793 unsigned pte_access, int user_fault,
1794 int write_fault, int dirty, int level,
1795 gfn_t gfn, pfn_t pfn, bool speculative,
1796 bool can_unsync, bool reset_host_protection)
1797 {
1798 u64 spte;
1799 int ret = 0;
1800
1801 /*
1802 * We don't set the accessed bit, since we sometimes want to see
1803 * whether the guest actually used the pte (in order to detect
1804 * demand paging).
1805 */
1806 spte = shadow_base_present_pte | shadow_dirty_mask;
1807 if (!speculative)
1808 spte |= shadow_accessed_mask;
1809 if (!dirty)
1810 pte_access &= ~ACC_WRITE_MASK;
1811 if (pte_access & ACC_EXEC_MASK)
1812 spte |= shadow_x_mask;
1813 else
1814 spte |= shadow_nx_mask;
1815 if (pte_access & ACC_USER_MASK)
1816 spte |= shadow_user_mask;
1817 if (level > PT_PAGE_TABLE_LEVEL)
1818 spte |= PT_PAGE_SIZE_MASK;
1819 if (tdp_enabled)
1820 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1821 kvm_is_mmio_pfn(pfn));
1822
1823 if (reset_host_protection)
1824 spte |= SPTE_HOST_WRITEABLE;
1825
1826 spte |= (u64)pfn << PAGE_SHIFT;
1827
1828 if ((pte_access & ACC_WRITE_MASK)
1829 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1830
1831 if (level > PT_PAGE_TABLE_LEVEL &&
1832 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1833 ret = 1;
1834 spte = shadow_trap_nonpresent_pte;
1835 goto set_pte;
1836 }
1837
1838 spte |= PT_WRITABLE_MASK;
1839
1840 /*
1841 * Optimization: for pte sync, if spte was writable the hash
1842 * lookup is unnecessary (and expensive). Write protection
1843 * is responsibility of mmu_get_page / kvm_sync_page.
1844 * Same reasoning can be applied to dirty page accounting.
1845 */
1846 if (!can_unsync && is_writable_pte(*sptep))
1847 goto set_pte;
1848
1849 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1850 pgprintk("%s: found shadow page for %lx, marking ro\n",
1851 __func__, gfn);
1852 ret = 1;
1853 pte_access &= ~ACC_WRITE_MASK;
1854 if (is_writable_pte(spte))
1855 spte &= ~PT_WRITABLE_MASK;
1856 }
1857 }
1858
1859 if (pte_access & ACC_WRITE_MASK)
1860 mark_page_dirty(vcpu->kvm, gfn);
1861
1862 set_pte:
1863 __set_spte(sptep, spte);
1864 return ret;
1865 }
1866
1867 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1868 unsigned pt_access, unsigned pte_access,
1869 int user_fault, int write_fault, int dirty,
1870 int *ptwrite, int level, gfn_t gfn,
1871 pfn_t pfn, bool speculative,
1872 bool reset_host_protection)
1873 {
1874 int was_rmapped = 0;
1875 int was_writable = is_writable_pte(*sptep);
1876 int rmap_count;
1877
1878 pgprintk("%s: spte %llx access %x write_fault %d"
1879 " user_fault %d gfn %lx\n",
1880 __func__, *sptep, pt_access,
1881 write_fault, user_fault, gfn);
1882
1883 if (is_rmap_spte(*sptep)) {
1884 /*
1885 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1886 * the parent of the now unreachable PTE.
1887 */
1888 if (level > PT_PAGE_TABLE_LEVEL &&
1889 !is_large_pte(*sptep)) {
1890 struct kvm_mmu_page *child;
1891 u64 pte = *sptep;
1892
1893 child = page_header(pte & PT64_BASE_ADDR_MASK);
1894 mmu_page_remove_parent_pte(child, sptep);
1895 } else if (pfn != spte_to_pfn(*sptep)) {
1896 pgprintk("hfn old %lx new %lx\n",
1897 spte_to_pfn(*sptep), pfn);
1898 rmap_remove(vcpu->kvm, sptep);
1899 } else
1900 was_rmapped = 1;
1901 }
1902
1903 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1904 dirty, level, gfn, pfn, speculative, true,
1905 reset_host_protection)) {
1906 if (write_fault)
1907 *ptwrite = 1;
1908 kvm_x86_ops->tlb_flush(vcpu);
1909 }
1910
1911 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1912 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1913 is_large_pte(*sptep)? "2MB" : "4kB",
1914 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1915 *sptep, sptep);
1916 if (!was_rmapped && is_large_pte(*sptep))
1917 ++vcpu->kvm->stat.lpages;
1918
1919 page_header_update_slot(vcpu->kvm, sptep, gfn);
1920 if (!was_rmapped) {
1921 rmap_count = rmap_add(vcpu, sptep, gfn);
1922 kvm_release_pfn_clean(pfn);
1923 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1924 rmap_recycle(vcpu, sptep, gfn);
1925 } else {
1926 if (was_writable)
1927 kvm_release_pfn_dirty(pfn);
1928 else
1929 kvm_release_pfn_clean(pfn);
1930 }
1931 if (speculative) {
1932 vcpu->arch.last_pte_updated = sptep;
1933 vcpu->arch.last_pte_gfn = gfn;
1934 }
1935 }
1936
1937 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1938 {
1939 }
1940
1941 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1942 int level, gfn_t gfn, pfn_t pfn)
1943 {
1944 struct kvm_shadow_walk_iterator iterator;
1945 struct kvm_mmu_page *sp;
1946 int pt_write = 0;
1947 gfn_t pseudo_gfn;
1948
1949 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1950 if (iterator.level == level) {
1951 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1952 0, write, 1, &pt_write,
1953 level, gfn, pfn, false, true);
1954 ++vcpu->stat.pf_fixed;
1955 break;
1956 }
1957
1958 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1959 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1960 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1961 iterator.level - 1,
1962 1, ACC_ALL, iterator.sptep);
1963 if (!sp) {
1964 pgprintk("nonpaging_map: ENOMEM\n");
1965 kvm_release_pfn_clean(pfn);
1966 return -ENOMEM;
1967 }
1968
1969 __set_spte(iterator.sptep,
1970 __pa(sp->spt)
1971 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1972 | shadow_user_mask | shadow_x_mask);
1973 }
1974 }
1975 return pt_write;
1976 }
1977
1978 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1979 {
1980 int r;
1981 int level;
1982 pfn_t pfn;
1983 unsigned long mmu_seq;
1984
1985 level = mapping_level(vcpu, gfn);
1986
1987 /*
1988 * This path builds a PAE pagetable - so we can map 2mb pages at
1989 * maximum. Therefore check if the level is larger than that.
1990 */
1991 if (level > PT_DIRECTORY_LEVEL)
1992 level = PT_DIRECTORY_LEVEL;
1993
1994 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
1995
1996 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1997 smp_rmb();
1998 pfn = gfn_to_pfn(vcpu->kvm, gfn);
1999
2000 /* mmio */
2001 if (is_error_pfn(pfn)) {
2002 kvm_release_pfn_clean(pfn);
2003 return 1;
2004 }
2005
2006 spin_lock(&vcpu->kvm->mmu_lock);
2007 if (mmu_notifier_retry(vcpu, mmu_seq))
2008 goto out_unlock;
2009 kvm_mmu_free_some_pages(vcpu);
2010 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2011 spin_unlock(&vcpu->kvm->mmu_lock);
2012
2013
2014 return r;
2015
2016 out_unlock:
2017 spin_unlock(&vcpu->kvm->mmu_lock);
2018 kvm_release_pfn_clean(pfn);
2019 return 0;
2020 }
2021
2022
2023 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2024 {
2025 int i;
2026 struct kvm_mmu_page *sp;
2027
2028 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2029 return;
2030 spin_lock(&vcpu->kvm->mmu_lock);
2031 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2032 hpa_t root = vcpu->arch.mmu.root_hpa;
2033
2034 sp = page_header(root);
2035 --sp->root_count;
2036 if (!sp->root_count && sp->role.invalid)
2037 kvm_mmu_zap_page(vcpu->kvm, sp);
2038 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2039 spin_unlock(&vcpu->kvm->mmu_lock);
2040 return;
2041 }
2042 for (i = 0; i < 4; ++i) {
2043 hpa_t root = vcpu->arch.mmu.pae_root[i];
2044
2045 if (root) {
2046 root &= PT64_BASE_ADDR_MASK;
2047 sp = page_header(root);
2048 --sp->root_count;
2049 if (!sp->root_count && sp->role.invalid)
2050 kvm_mmu_zap_page(vcpu->kvm, sp);
2051 }
2052 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2053 }
2054 spin_unlock(&vcpu->kvm->mmu_lock);
2055 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2056 }
2057
2058 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2059 {
2060 int ret = 0;
2061
2062 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2063 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2064 ret = 1;
2065 }
2066
2067 return ret;
2068 }
2069
2070 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2071 {
2072 int i;
2073 gfn_t root_gfn;
2074 struct kvm_mmu_page *sp;
2075 int direct = 0;
2076 u64 pdptr;
2077
2078 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2079
2080 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2081 hpa_t root = vcpu->arch.mmu.root_hpa;
2082
2083 ASSERT(!VALID_PAGE(root));
2084 if (tdp_enabled)
2085 direct = 1;
2086 if (mmu_check_root(vcpu, root_gfn))
2087 return 1;
2088 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2089 PT64_ROOT_LEVEL, direct,
2090 ACC_ALL, NULL);
2091 root = __pa(sp->spt);
2092 ++sp->root_count;
2093 vcpu->arch.mmu.root_hpa = root;
2094 return 0;
2095 }
2096 direct = !is_paging(vcpu);
2097 if (tdp_enabled)
2098 direct = 1;
2099 for (i = 0; i < 4; ++i) {
2100 hpa_t root = vcpu->arch.mmu.pae_root[i];
2101
2102 ASSERT(!VALID_PAGE(root));
2103 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2104 pdptr = kvm_pdptr_read(vcpu, i);
2105 if (!is_present_gpte(pdptr)) {
2106 vcpu->arch.mmu.pae_root[i] = 0;
2107 continue;
2108 }
2109 root_gfn = pdptr >> PAGE_SHIFT;
2110 } else if (vcpu->arch.mmu.root_level == 0)
2111 root_gfn = 0;
2112 if (mmu_check_root(vcpu, root_gfn))
2113 return 1;
2114 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2115 PT32_ROOT_LEVEL, direct,
2116 ACC_ALL, NULL);
2117 root = __pa(sp->spt);
2118 ++sp->root_count;
2119 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2120 }
2121 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2122 return 0;
2123 }
2124
2125 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2126 {
2127 int i;
2128 struct kvm_mmu_page *sp;
2129
2130 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2131 return;
2132 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2133 hpa_t root = vcpu->arch.mmu.root_hpa;
2134 sp = page_header(root);
2135 mmu_sync_children(vcpu, sp);
2136 return;
2137 }
2138 for (i = 0; i < 4; ++i) {
2139 hpa_t root = vcpu->arch.mmu.pae_root[i];
2140
2141 if (root && VALID_PAGE(root)) {
2142 root &= PT64_BASE_ADDR_MASK;
2143 sp = page_header(root);
2144 mmu_sync_children(vcpu, sp);
2145 }
2146 }
2147 }
2148
2149 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2150 {
2151 spin_lock(&vcpu->kvm->mmu_lock);
2152 mmu_sync_roots(vcpu);
2153 spin_unlock(&vcpu->kvm->mmu_lock);
2154 }
2155
2156 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2157 u32 access, u32 *error)
2158 {
2159 if (error)
2160 *error = 0;
2161 return vaddr;
2162 }
2163
2164 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2165 u32 error_code)
2166 {
2167 gfn_t gfn;
2168 int r;
2169
2170 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2171 r = mmu_topup_memory_caches(vcpu);
2172 if (r)
2173 return r;
2174
2175 ASSERT(vcpu);
2176 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2177
2178 gfn = gva >> PAGE_SHIFT;
2179
2180 return nonpaging_map(vcpu, gva & PAGE_MASK,
2181 error_code & PFERR_WRITE_MASK, gfn);
2182 }
2183
2184 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2185 u32 error_code)
2186 {
2187 pfn_t pfn;
2188 int r;
2189 int level;
2190 gfn_t gfn = gpa >> PAGE_SHIFT;
2191 unsigned long mmu_seq;
2192
2193 ASSERT(vcpu);
2194 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2195
2196 r = mmu_topup_memory_caches(vcpu);
2197 if (r)
2198 return r;
2199
2200 level = mapping_level(vcpu, gfn);
2201
2202 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2203
2204 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2205 smp_rmb();
2206 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2207 if (is_error_pfn(pfn)) {
2208 kvm_release_pfn_clean(pfn);
2209 return 1;
2210 }
2211 spin_lock(&vcpu->kvm->mmu_lock);
2212 if (mmu_notifier_retry(vcpu, mmu_seq))
2213 goto out_unlock;
2214 kvm_mmu_free_some_pages(vcpu);
2215 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2216 level, gfn, pfn);
2217 spin_unlock(&vcpu->kvm->mmu_lock);
2218
2219 return r;
2220
2221 out_unlock:
2222 spin_unlock(&vcpu->kvm->mmu_lock);
2223 kvm_release_pfn_clean(pfn);
2224 return 0;
2225 }
2226
2227 static void nonpaging_free(struct kvm_vcpu *vcpu)
2228 {
2229 mmu_free_roots(vcpu);
2230 }
2231
2232 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2233 {
2234 struct kvm_mmu *context = &vcpu->arch.mmu;
2235
2236 context->new_cr3 = nonpaging_new_cr3;
2237 context->page_fault = nonpaging_page_fault;
2238 context->gva_to_gpa = nonpaging_gva_to_gpa;
2239 context->free = nonpaging_free;
2240 context->prefetch_page = nonpaging_prefetch_page;
2241 context->sync_page = nonpaging_sync_page;
2242 context->invlpg = nonpaging_invlpg;
2243 context->root_level = 0;
2244 context->shadow_root_level = PT32E_ROOT_LEVEL;
2245 context->root_hpa = INVALID_PAGE;
2246 return 0;
2247 }
2248
2249 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2250 {
2251 ++vcpu->stat.tlb_flush;
2252 kvm_x86_ops->tlb_flush(vcpu);
2253 }
2254
2255 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2256 {
2257 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2258 mmu_free_roots(vcpu);
2259 }
2260
2261 static void inject_page_fault(struct kvm_vcpu *vcpu,
2262 u64 addr,
2263 u32 err_code)
2264 {
2265 kvm_inject_page_fault(vcpu, addr, err_code);
2266 }
2267
2268 static void paging_free(struct kvm_vcpu *vcpu)
2269 {
2270 nonpaging_free(vcpu);
2271 }
2272
2273 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2274 {
2275 int bit7;
2276
2277 bit7 = (gpte >> 7) & 1;
2278 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2279 }
2280
2281 #define PTTYPE 64
2282 #include "paging_tmpl.h"
2283 #undef PTTYPE
2284
2285 #define PTTYPE 32
2286 #include "paging_tmpl.h"
2287 #undef PTTYPE
2288
2289 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2290 {
2291 struct kvm_mmu *context = &vcpu->arch.mmu;
2292 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2293 u64 exb_bit_rsvd = 0;
2294
2295 if (!is_nx(vcpu))
2296 exb_bit_rsvd = rsvd_bits(63, 63);
2297 switch (level) {
2298 case PT32_ROOT_LEVEL:
2299 /* no rsvd bits for 2 level 4K page table entries */
2300 context->rsvd_bits_mask[0][1] = 0;
2301 context->rsvd_bits_mask[0][0] = 0;
2302 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2303
2304 if (!is_pse(vcpu)) {
2305 context->rsvd_bits_mask[1][1] = 0;
2306 break;
2307 }
2308
2309 if (is_cpuid_PSE36())
2310 /* 36bits PSE 4MB page */
2311 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2312 else
2313 /* 32 bits PSE 4MB page */
2314 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2315 break;
2316 case PT32E_ROOT_LEVEL:
2317 context->rsvd_bits_mask[0][2] =
2318 rsvd_bits(maxphyaddr, 63) |
2319 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2320 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2321 rsvd_bits(maxphyaddr, 62); /* PDE */
2322 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2323 rsvd_bits(maxphyaddr, 62); /* PTE */
2324 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2325 rsvd_bits(maxphyaddr, 62) |
2326 rsvd_bits(13, 20); /* large page */
2327 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2328 break;
2329 case PT64_ROOT_LEVEL:
2330 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2331 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2332 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2333 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2334 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2335 rsvd_bits(maxphyaddr, 51);
2336 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2337 rsvd_bits(maxphyaddr, 51);
2338 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2339 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2340 rsvd_bits(maxphyaddr, 51) |
2341 rsvd_bits(13, 29);
2342 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2343 rsvd_bits(maxphyaddr, 51) |
2344 rsvd_bits(13, 20); /* large page */
2345 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2346 break;
2347 }
2348 }
2349
2350 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2351 {
2352 struct kvm_mmu *context = &vcpu->arch.mmu;
2353
2354 ASSERT(is_pae(vcpu));
2355 context->new_cr3 = paging_new_cr3;
2356 context->page_fault = paging64_page_fault;
2357 context->gva_to_gpa = paging64_gva_to_gpa;
2358 context->prefetch_page = paging64_prefetch_page;
2359 context->sync_page = paging64_sync_page;
2360 context->invlpg = paging64_invlpg;
2361 context->free = paging_free;
2362 context->root_level = level;
2363 context->shadow_root_level = level;
2364 context->root_hpa = INVALID_PAGE;
2365 return 0;
2366 }
2367
2368 static int paging64_init_context(struct kvm_vcpu *vcpu)
2369 {
2370 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2371 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2372 }
2373
2374 static int paging32_init_context(struct kvm_vcpu *vcpu)
2375 {
2376 struct kvm_mmu *context = &vcpu->arch.mmu;
2377
2378 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2379 context->new_cr3 = paging_new_cr3;
2380 context->page_fault = paging32_page_fault;
2381 context->gva_to_gpa = paging32_gva_to_gpa;
2382 context->free = paging_free;
2383 context->prefetch_page = paging32_prefetch_page;
2384 context->sync_page = paging32_sync_page;
2385 context->invlpg = paging32_invlpg;
2386 context->root_level = PT32_ROOT_LEVEL;
2387 context->shadow_root_level = PT32E_ROOT_LEVEL;
2388 context->root_hpa = INVALID_PAGE;
2389 return 0;
2390 }
2391
2392 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2393 {
2394 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2395 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2396 }
2397
2398 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2399 {
2400 struct kvm_mmu *context = &vcpu->arch.mmu;
2401
2402 context->new_cr3 = nonpaging_new_cr3;
2403 context->page_fault = tdp_page_fault;
2404 context->free = nonpaging_free;
2405 context->prefetch_page = nonpaging_prefetch_page;
2406 context->sync_page = nonpaging_sync_page;
2407 context->invlpg = nonpaging_invlpg;
2408 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2409 context->root_hpa = INVALID_PAGE;
2410
2411 if (!is_paging(vcpu)) {
2412 context->gva_to_gpa = nonpaging_gva_to_gpa;
2413 context->root_level = 0;
2414 } else if (is_long_mode(vcpu)) {
2415 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2416 context->gva_to_gpa = paging64_gva_to_gpa;
2417 context->root_level = PT64_ROOT_LEVEL;
2418 } else if (is_pae(vcpu)) {
2419 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2420 context->gva_to_gpa = paging64_gva_to_gpa;
2421 context->root_level = PT32E_ROOT_LEVEL;
2422 } else {
2423 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2424 context->gva_to_gpa = paging32_gva_to_gpa;
2425 context->root_level = PT32_ROOT_LEVEL;
2426 }
2427
2428 return 0;
2429 }
2430
2431 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2432 {
2433 int r;
2434
2435 ASSERT(vcpu);
2436 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2437
2438 if (!is_paging(vcpu))
2439 r = nonpaging_init_context(vcpu);
2440 else if (is_long_mode(vcpu))
2441 r = paging64_init_context(vcpu);
2442 else if (is_pae(vcpu))
2443 r = paging32E_init_context(vcpu);
2444 else
2445 r = paging32_init_context(vcpu);
2446
2447 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2448
2449 return r;
2450 }
2451
2452 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2453 {
2454 vcpu->arch.update_pte.pfn = bad_pfn;
2455
2456 if (tdp_enabled)
2457 return init_kvm_tdp_mmu(vcpu);
2458 else
2459 return init_kvm_softmmu(vcpu);
2460 }
2461
2462 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2463 {
2464 ASSERT(vcpu);
2465 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2466 vcpu->arch.mmu.free(vcpu);
2467 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2468 }
2469 }
2470
2471 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2472 {
2473 destroy_kvm_mmu(vcpu);
2474 return init_kvm_mmu(vcpu);
2475 }
2476 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2477
2478 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2479 {
2480 int r;
2481
2482 r = mmu_topup_memory_caches(vcpu);
2483 if (r)
2484 goto out;
2485 spin_lock(&vcpu->kvm->mmu_lock);
2486 kvm_mmu_free_some_pages(vcpu);
2487 r = mmu_alloc_roots(vcpu);
2488 mmu_sync_roots(vcpu);
2489 spin_unlock(&vcpu->kvm->mmu_lock);
2490 if (r)
2491 goto out;
2492 /* set_cr3() should ensure TLB has been flushed */
2493 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2494 out:
2495 return r;
2496 }
2497 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2498
2499 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2500 {
2501 mmu_free_roots(vcpu);
2502 }
2503
2504 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2505 struct kvm_mmu_page *sp,
2506 u64 *spte)
2507 {
2508 u64 pte;
2509 struct kvm_mmu_page *child;
2510
2511 pte = *spte;
2512 if (is_shadow_present_pte(pte)) {
2513 if (is_last_spte(pte, sp->role.level))
2514 rmap_remove(vcpu->kvm, spte);
2515 else {
2516 child = page_header(pte & PT64_BASE_ADDR_MASK);
2517 mmu_page_remove_parent_pte(child, spte);
2518 }
2519 }
2520 __set_spte(spte, shadow_trap_nonpresent_pte);
2521 if (is_large_pte(pte))
2522 --vcpu->kvm->stat.lpages;
2523 }
2524
2525 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2526 struct kvm_mmu_page *sp,
2527 u64 *spte,
2528 const void *new)
2529 {
2530 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2531 ++vcpu->kvm->stat.mmu_pde_zapped;
2532 return;
2533 }
2534
2535 ++vcpu->kvm->stat.mmu_pte_updated;
2536 if (sp->role.glevels == PT32_ROOT_LEVEL)
2537 paging32_update_pte(vcpu, sp, spte, new);
2538 else
2539 paging64_update_pte(vcpu, sp, spte, new);
2540 }
2541
2542 static bool need_remote_flush(u64 old, u64 new)
2543 {
2544 if (!is_shadow_present_pte(old))
2545 return false;
2546 if (!is_shadow_present_pte(new))
2547 return true;
2548 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2549 return true;
2550 old ^= PT64_NX_MASK;
2551 new ^= PT64_NX_MASK;
2552 return (old & ~new & PT64_PERM_MASK) != 0;
2553 }
2554
2555 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2556 {
2557 if (need_remote_flush(old, new))
2558 kvm_flush_remote_tlbs(vcpu->kvm);
2559 else
2560 kvm_mmu_flush_tlb(vcpu);
2561 }
2562
2563 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2564 {
2565 u64 *spte = vcpu->arch.last_pte_updated;
2566
2567 return !!(spte && (*spte & shadow_accessed_mask));
2568 }
2569
2570 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2571 u64 gpte)
2572 {
2573 gfn_t gfn;
2574 pfn_t pfn;
2575
2576 if (!is_present_gpte(gpte))
2577 return;
2578 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2579
2580 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2581 smp_rmb();
2582 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2583
2584 if (is_error_pfn(pfn)) {
2585 kvm_release_pfn_clean(pfn);
2586 return;
2587 }
2588 vcpu->arch.update_pte.gfn = gfn;
2589 vcpu->arch.update_pte.pfn = pfn;
2590 }
2591
2592 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2593 {
2594 u64 *spte = vcpu->arch.last_pte_updated;
2595
2596 if (spte
2597 && vcpu->arch.last_pte_gfn == gfn
2598 && shadow_accessed_mask
2599 && !(*spte & shadow_accessed_mask)
2600 && is_shadow_present_pte(*spte))
2601 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2602 }
2603
2604 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2605 const u8 *new, int bytes,
2606 bool guest_initiated)
2607 {
2608 gfn_t gfn = gpa >> PAGE_SHIFT;
2609 struct kvm_mmu_page *sp;
2610 struct hlist_node *node, *n;
2611 struct hlist_head *bucket;
2612 unsigned index;
2613 u64 entry, gentry;
2614 u64 *spte;
2615 unsigned offset = offset_in_page(gpa);
2616 unsigned pte_size;
2617 unsigned page_offset;
2618 unsigned misaligned;
2619 unsigned quadrant;
2620 int level;
2621 int flooded = 0;
2622 int npte;
2623 int r;
2624 int invlpg_counter;
2625
2626 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2627
2628 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2629
2630 /*
2631 * Assume that the pte write on a page table of the same type
2632 * as the current vcpu paging mode. This is nearly always true
2633 * (might be false while changing modes). Note it is verified later
2634 * by update_pte().
2635 */
2636 if ((is_pae(vcpu) && bytes == 4) || !new) {
2637 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2638 if (is_pae(vcpu)) {
2639 gpa &= ~(gpa_t)7;
2640 bytes = 8;
2641 }
2642 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2643 if (r)
2644 gentry = 0;
2645 new = (const u8 *)&gentry;
2646 }
2647
2648 switch (bytes) {
2649 case 4:
2650 gentry = *(const u32 *)new;
2651 break;
2652 case 8:
2653 gentry = *(const u64 *)new;
2654 break;
2655 default:
2656 gentry = 0;
2657 break;
2658 }
2659
2660 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2661 spin_lock(&vcpu->kvm->mmu_lock);
2662 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2663 gentry = 0;
2664 kvm_mmu_access_page(vcpu, gfn);
2665 kvm_mmu_free_some_pages(vcpu);
2666 ++vcpu->kvm->stat.mmu_pte_write;
2667 kvm_mmu_audit(vcpu, "pre pte write");
2668 if (guest_initiated) {
2669 if (gfn == vcpu->arch.last_pt_write_gfn
2670 && !last_updated_pte_accessed(vcpu)) {
2671 ++vcpu->arch.last_pt_write_count;
2672 if (vcpu->arch.last_pt_write_count >= 3)
2673 flooded = 1;
2674 } else {
2675 vcpu->arch.last_pt_write_gfn = gfn;
2676 vcpu->arch.last_pt_write_count = 1;
2677 vcpu->arch.last_pte_updated = NULL;
2678 }
2679 }
2680 index = kvm_page_table_hashfn(gfn);
2681 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2682 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2683 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2684 continue;
2685 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2686 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2687 misaligned |= bytes < 4;
2688 if (misaligned || flooded) {
2689 /*
2690 * Misaligned accesses are too much trouble to fix
2691 * up; also, they usually indicate a page is not used
2692 * as a page table.
2693 *
2694 * If we're seeing too many writes to a page,
2695 * it may no longer be a page table, or we may be
2696 * forking, in which case it is better to unmap the
2697 * page.
2698 */
2699 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2700 gpa, bytes, sp->role.word);
2701 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2702 n = bucket->first;
2703 ++vcpu->kvm->stat.mmu_flooded;
2704 continue;
2705 }
2706 page_offset = offset;
2707 level = sp->role.level;
2708 npte = 1;
2709 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2710 page_offset <<= 1; /* 32->64 */
2711 /*
2712 * A 32-bit pde maps 4MB while the shadow pdes map
2713 * only 2MB. So we need to double the offset again
2714 * and zap two pdes instead of one.
2715 */
2716 if (level == PT32_ROOT_LEVEL) {
2717 page_offset &= ~7; /* kill rounding error */
2718 page_offset <<= 1;
2719 npte = 2;
2720 }
2721 quadrant = page_offset >> PAGE_SHIFT;
2722 page_offset &= ~PAGE_MASK;
2723 if (quadrant != sp->role.quadrant)
2724 continue;
2725 }
2726 spte = &sp->spt[page_offset / sizeof(*spte)];
2727 while (npte--) {
2728 entry = *spte;
2729 mmu_pte_write_zap_pte(vcpu, sp, spte);
2730 if (gentry)
2731 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2732 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2733 ++spte;
2734 }
2735 }
2736 kvm_mmu_audit(vcpu, "post pte write");
2737 spin_unlock(&vcpu->kvm->mmu_lock);
2738 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2739 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2740 vcpu->arch.update_pte.pfn = bad_pfn;
2741 }
2742 }
2743
2744 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2745 {
2746 gpa_t gpa;
2747 int r;
2748
2749 if (tdp_enabled)
2750 return 0;
2751
2752 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2753
2754 spin_lock(&vcpu->kvm->mmu_lock);
2755 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2756 spin_unlock(&vcpu->kvm->mmu_lock);
2757 return r;
2758 }
2759 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2760
2761 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2762 {
2763 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2764 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2765 struct kvm_mmu_page *sp;
2766
2767 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2768 struct kvm_mmu_page, link);
2769 kvm_mmu_zap_page(vcpu->kvm, sp);
2770 ++vcpu->kvm->stat.mmu_recycled;
2771 }
2772 }
2773
2774 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2775 {
2776 int r;
2777 enum emulation_result er;
2778
2779 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2780 if (r < 0)
2781 goto out;
2782
2783 if (!r) {
2784 r = 1;
2785 goto out;
2786 }
2787
2788 r = mmu_topup_memory_caches(vcpu);
2789 if (r)
2790 goto out;
2791
2792 er = emulate_instruction(vcpu, cr2, error_code, 0);
2793
2794 switch (er) {
2795 case EMULATE_DONE:
2796 return 1;
2797 case EMULATE_DO_MMIO:
2798 ++vcpu->stat.mmio_exits;
2799 return 0;
2800 case EMULATE_FAIL:
2801 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2802 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2803 vcpu->run->internal.ndata = 0;
2804 return 0;
2805 default:
2806 BUG();
2807 }
2808 out:
2809 return r;
2810 }
2811 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2812
2813 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2814 {
2815 vcpu->arch.mmu.invlpg(vcpu, gva);
2816 kvm_mmu_flush_tlb(vcpu);
2817 ++vcpu->stat.invlpg;
2818 }
2819 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2820
2821 void kvm_enable_tdp(void)
2822 {
2823 tdp_enabled = true;
2824 }
2825 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2826
2827 void kvm_disable_tdp(void)
2828 {
2829 tdp_enabled = false;
2830 }
2831 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2832
2833 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2834 {
2835 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2836 }
2837
2838 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2839 {
2840 struct page *page;
2841 int i;
2842
2843 ASSERT(vcpu);
2844
2845 /*
2846 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2847 * Therefore we need to allocate shadow page tables in the first
2848 * 4GB of memory, which happens to fit the DMA32 zone.
2849 */
2850 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2851 if (!page)
2852 return -ENOMEM;
2853
2854 vcpu->arch.mmu.pae_root = page_address(page);
2855 for (i = 0; i < 4; ++i)
2856 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2857
2858 return 0;
2859 }
2860
2861 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2862 {
2863 ASSERT(vcpu);
2864 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2865
2866 return alloc_mmu_pages(vcpu);
2867 }
2868
2869 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2870 {
2871 ASSERT(vcpu);
2872 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2873
2874 return init_kvm_mmu(vcpu);
2875 }
2876
2877 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2878 {
2879 ASSERT(vcpu);
2880
2881 destroy_kvm_mmu(vcpu);
2882 free_mmu_pages(vcpu);
2883 mmu_free_memory_caches(vcpu);
2884 }
2885
2886 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2887 {
2888 struct kvm_mmu_page *sp;
2889
2890 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2891 int i;
2892 u64 *pt;
2893
2894 if (!test_bit(slot, sp->slot_bitmap))
2895 continue;
2896
2897 pt = sp->spt;
2898 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2899 /* avoid RMW */
2900 if (pt[i] & PT_WRITABLE_MASK)
2901 pt[i] &= ~PT_WRITABLE_MASK;
2902 }
2903 kvm_flush_remote_tlbs(kvm);
2904 }
2905
2906 void kvm_mmu_zap_all(struct kvm *kvm)
2907 {
2908 struct kvm_mmu_page *sp, *node;
2909
2910 spin_lock(&kvm->mmu_lock);
2911 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2912 if (kvm_mmu_zap_page(kvm, sp))
2913 node = container_of(kvm->arch.active_mmu_pages.next,
2914 struct kvm_mmu_page, link);
2915 spin_unlock(&kvm->mmu_lock);
2916
2917 kvm_flush_remote_tlbs(kvm);
2918 }
2919
2920 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2921 {
2922 struct kvm_mmu_page *page;
2923
2924 page = container_of(kvm->arch.active_mmu_pages.prev,
2925 struct kvm_mmu_page, link);
2926 kvm_mmu_zap_page(kvm, page);
2927 }
2928
2929 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2930 {
2931 struct kvm *kvm;
2932 struct kvm *kvm_freed = NULL;
2933 int cache_count = 0;
2934
2935 spin_lock(&kvm_lock);
2936
2937 list_for_each_entry(kvm, &vm_list, vm_list) {
2938 int npages, idx;
2939
2940 idx = srcu_read_lock(&kvm->srcu);
2941 spin_lock(&kvm->mmu_lock);
2942 npages = kvm->arch.n_alloc_mmu_pages -
2943 kvm->arch.n_free_mmu_pages;
2944 cache_count += npages;
2945 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2946 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2947 cache_count--;
2948 kvm_freed = kvm;
2949 }
2950 nr_to_scan--;
2951
2952 spin_unlock(&kvm->mmu_lock);
2953 srcu_read_unlock(&kvm->srcu, idx);
2954 }
2955 if (kvm_freed)
2956 list_move_tail(&kvm_freed->vm_list, &vm_list);
2957
2958 spin_unlock(&kvm_lock);
2959
2960 return cache_count;
2961 }
2962
2963 static struct shrinker mmu_shrinker = {
2964 .shrink = mmu_shrink,
2965 .seeks = DEFAULT_SEEKS * 10,
2966 };
2967
2968 static void mmu_destroy_caches(void)
2969 {
2970 if (pte_chain_cache)
2971 kmem_cache_destroy(pte_chain_cache);
2972 if (rmap_desc_cache)
2973 kmem_cache_destroy(rmap_desc_cache);
2974 if (mmu_page_header_cache)
2975 kmem_cache_destroy(mmu_page_header_cache);
2976 }
2977
2978 void kvm_mmu_module_exit(void)
2979 {
2980 mmu_destroy_caches();
2981 unregister_shrinker(&mmu_shrinker);
2982 }
2983
2984 int kvm_mmu_module_init(void)
2985 {
2986 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2987 sizeof(struct kvm_pte_chain),
2988 0, 0, NULL);
2989 if (!pte_chain_cache)
2990 goto nomem;
2991 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2992 sizeof(struct kvm_rmap_desc),
2993 0, 0, NULL);
2994 if (!rmap_desc_cache)
2995 goto nomem;
2996
2997 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2998 sizeof(struct kvm_mmu_page),
2999 0, 0, NULL);
3000 if (!mmu_page_header_cache)
3001 goto nomem;
3002
3003 register_shrinker(&mmu_shrinker);
3004
3005 return 0;
3006
3007 nomem:
3008 mmu_destroy_caches();
3009 return -ENOMEM;
3010 }
3011
3012 /*
3013 * Caculate mmu pages needed for kvm.
3014 */
3015 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3016 {
3017 int i;
3018 unsigned int nr_mmu_pages;
3019 unsigned int nr_pages = 0;
3020 struct kvm_memslots *slots;
3021
3022 slots = rcu_dereference(kvm->memslots);
3023 for (i = 0; i < slots->nmemslots; i++)
3024 nr_pages += slots->memslots[i].npages;
3025
3026 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3027 nr_mmu_pages = max(nr_mmu_pages,
3028 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3029
3030 return nr_mmu_pages;
3031 }
3032
3033 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3034 unsigned len)
3035 {
3036 if (len > buffer->len)
3037 return NULL;
3038 return buffer->ptr;
3039 }
3040
3041 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3042 unsigned len)
3043 {
3044 void *ret;
3045
3046 ret = pv_mmu_peek_buffer(buffer, len);
3047 if (!ret)
3048 return ret;
3049 buffer->ptr += len;
3050 buffer->len -= len;
3051 buffer->processed += len;
3052 return ret;
3053 }
3054
3055 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3056 gpa_t addr, gpa_t value)
3057 {
3058 int bytes = 8;
3059 int r;
3060
3061 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3062 bytes = 4;
3063
3064 r = mmu_topup_memory_caches(vcpu);
3065 if (r)
3066 return r;
3067
3068 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3069 return -EFAULT;
3070
3071 return 1;
3072 }
3073
3074 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3075 {
3076 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3077 return 1;
3078 }
3079
3080 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3081 {
3082 spin_lock(&vcpu->kvm->mmu_lock);
3083 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3084 spin_unlock(&vcpu->kvm->mmu_lock);
3085 return 1;
3086 }
3087
3088 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3089 struct kvm_pv_mmu_op_buffer *buffer)
3090 {
3091 struct kvm_mmu_op_header *header;
3092
3093 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3094 if (!header)
3095 return 0;
3096 switch (header->op) {
3097 case KVM_MMU_OP_WRITE_PTE: {
3098 struct kvm_mmu_op_write_pte *wpte;
3099
3100 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3101 if (!wpte)
3102 return 0;
3103 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3104 wpte->pte_val);
3105 }
3106 case KVM_MMU_OP_FLUSH_TLB: {
3107 struct kvm_mmu_op_flush_tlb *ftlb;
3108
3109 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3110 if (!ftlb)
3111 return 0;
3112 return kvm_pv_mmu_flush_tlb(vcpu);
3113 }
3114 case KVM_MMU_OP_RELEASE_PT: {
3115 struct kvm_mmu_op_release_pt *rpt;
3116
3117 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3118 if (!rpt)
3119 return 0;
3120 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3121 }
3122 default: return 0;
3123 }
3124 }
3125
3126 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3127 gpa_t addr, unsigned long *ret)
3128 {
3129 int r;
3130 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3131
3132 buffer->ptr = buffer->buf;
3133 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3134 buffer->processed = 0;
3135
3136 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3137 if (r)
3138 goto out;
3139
3140 while (buffer->len) {
3141 r = kvm_pv_mmu_op_one(vcpu, buffer);
3142 if (r < 0)
3143 goto out;
3144 if (r == 0)
3145 break;
3146 }
3147
3148 r = 1;
3149 out:
3150 *ret = buffer->processed;
3151 return r;
3152 }
3153
3154 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3155 {
3156 struct kvm_shadow_walk_iterator iterator;
3157 int nr_sptes = 0;
3158
3159 spin_lock(&vcpu->kvm->mmu_lock);
3160 for_each_shadow_entry(vcpu, addr, iterator) {
3161 sptes[iterator.level-1] = *iterator.sptep;
3162 nr_sptes++;
3163 if (!is_shadow_present_pte(*iterator.sptep))
3164 break;
3165 }
3166 spin_unlock(&vcpu->kvm->mmu_lock);
3167
3168 return nr_sptes;
3169 }
3170 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3171
3172 #ifdef AUDIT
3173
3174 static const char *audit_msg;
3175
3176 static gva_t canonicalize(gva_t gva)
3177 {
3178 #ifdef CONFIG_X86_64
3179 gva = (long long)(gva << 16) >> 16;
3180 #endif
3181 return gva;
3182 }
3183
3184
3185 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3186
3187 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3188 inspect_spte_fn fn)
3189 {
3190 int i;
3191
3192 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3193 u64 ent = sp->spt[i];
3194
3195 if (is_shadow_present_pte(ent)) {
3196 if (!is_last_spte(ent, sp->role.level)) {
3197 struct kvm_mmu_page *child;
3198 child = page_header(ent & PT64_BASE_ADDR_MASK);
3199 __mmu_spte_walk(kvm, child, fn);
3200 } else
3201 fn(kvm, &sp->spt[i]);
3202 }
3203 }
3204 }
3205
3206 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3207 {
3208 int i;
3209 struct kvm_mmu_page *sp;
3210
3211 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3212 return;
3213 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3214 hpa_t root = vcpu->arch.mmu.root_hpa;
3215 sp = page_header(root);
3216 __mmu_spte_walk(vcpu->kvm, sp, fn);
3217 return;
3218 }
3219 for (i = 0; i < 4; ++i) {
3220 hpa_t root = vcpu->arch.mmu.pae_root[i];
3221
3222 if (root && VALID_PAGE(root)) {
3223 root &= PT64_BASE_ADDR_MASK;
3224 sp = page_header(root);
3225 __mmu_spte_walk(vcpu->kvm, sp, fn);
3226 }
3227 }
3228 return;
3229 }
3230
3231 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3232 gva_t va, int level)
3233 {
3234 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3235 int i;
3236 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3237
3238 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3239 u64 ent = pt[i];
3240
3241 if (ent == shadow_trap_nonpresent_pte)
3242 continue;
3243
3244 va = canonicalize(va);
3245 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3246 audit_mappings_page(vcpu, ent, va, level - 1);
3247 else {
3248 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3249 gfn_t gfn = gpa >> PAGE_SHIFT;
3250 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3251 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3252
3253 if (is_error_pfn(pfn)) {
3254 kvm_release_pfn_clean(pfn);
3255 continue;
3256 }
3257
3258 if (is_shadow_present_pte(ent)
3259 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3260 printk(KERN_ERR "xx audit error: (%s) levels %d"
3261 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3262 audit_msg, vcpu->arch.mmu.root_level,
3263 va, gpa, hpa, ent,
3264 is_shadow_present_pte(ent));
3265 else if (ent == shadow_notrap_nonpresent_pte
3266 && !is_error_hpa(hpa))
3267 printk(KERN_ERR "audit: (%s) notrap shadow,"
3268 " valid guest gva %lx\n", audit_msg, va);
3269 kvm_release_pfn_clean(pfn);
3270
3271 }
3272 }
3273 }
3274
3275 static void audit_mappings(struct kvm_vcpu *vcpu)
3276 {
3277 unsigned i;
3278
3279 if (vcpu->arch.mmu.root_level == 4)
3280 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3281 else
3282 for (i = 0; i < 4; ++i)
3283 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3284 audit_mappings_page(vcpu,
3285 vcpu->arch.mmu.pae_root[i],
3286 i << 30,
3287 2);
3288 }
3289
3290 static int count_rmaps(struct kvm_vcpu *vcpu)
3291 {
3292 struct kvm *kvm = vcpu->kvm;
3293 struct kvm_memslots *slots;
3294 int nmaps = 0;
3295 int i, j, k, idx;
3296
3297 idx = srcu_read_lock(&kvm->srcu);
3298 slots = rcu_dereference(kvm->memslots);
3299 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3300 struct kvm_memory_slot *m = &slots->memslots[i];
3301 struct kvm_rmap_desc *d;
3302
3303 for (j = 0; j < m->npages; ++j) {
3304 unsigned long *rmapp = &m->rmap[j];
3305
3306 if (!*rmapp)
3307 continue;
3308 if (!(*rmapp & 1)) {
3309 ++nmaps;
3310 continue;
3311 }
3312 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3313 while (d) {
3314 for (k = 0; k < RMAP_EXT; ++k)
3315 if (d->sptes[k])
3316 ++nmaps;
3317 else
3318 break;
3319 d = d->more;
3320 }
3321 }
3322 }
3323 srcu_read_unlock(&kvm->srcu, idx);
3324 return nmaps;
3325 }
3326
3327 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3328 {
3329 unsigned long *rmapp;
3330 struct kvm_mmu_page *rev_sp;
3331 gfn_t gfn;
3332
3333 if (*sptep & PT_WRITABLE_MASK) {
3334 rev_sp = page_header(__pa(sptep));
3335 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3336
3337 if (!gfn_to_memslot(kvm, gfn)) {
3338 if (!printk_ratelimit())
3339 return;
3340 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3341 audit_msg, gfn);
3342 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3343 audit_msg, (long int)(sptep - rev_sp->spt),
3344 rev_sp->gfn);
3345 dump_stack();
3346 return;
3347 }
3348
3349 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3350 rev_sp->role.level);
3351 if (!*rmapp) {
3352 if (!printk_ratelimit())
3353 return;
3354 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3355 audit_msg, *sptep);
3356 dump_stack();
3357 }
3358 }
3359
3360 }
3361
3362 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3363 {
3364 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3365 }
3366
3367 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3368 {
3369 struct kvm_mmu_page *sp;
3370 int i;
3371
3372 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3373 u64 *pt = sp->spt;
3374
3375 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3376 continue;
3377
3378 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3379 u64 ent = pt[i];
3380
3381 if (!(ent & PT_PRESENT_MASK))
3382 continue;
3383 if (!(ent & PT_WRITABLE_MASK))
3384 continue;
3385 inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3386 }
3387 }
3388 return;
3389 }
3390
3391 static void audit_rmap(struct kvm_vcpu *vcpu)
3392 {
3393 check_writable_mappings_rmap(vcpu);
3394 count_rmaps(vcpu);
3395 }
3396
3397 static void audit_write_protection(struct kvm_vcpu *vcpu)
3398 {
3399 struct kvm_mmu_page *sp;
3400 struct kvm_memory_slot *slot;
3401 unsigned long *rmapp;
3402 u64 *spte;
3403 gfn_t gfn;
3404
3405 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3406 if (sp->role.direct)
3407 continue;
3408 if (sp->unsync)
3409 continue;
3410
3411 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3412 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3413 rmapp = &slot->rmap[gfn - slot->base_gfn];
3414
3415 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3416 while (spte) {
3417 if (*spte & PT_WRITABLE_MASK)
3418 printk(KERN_ERR "%s: (%s) shadow page has "
3419 "writable mappings: gfn %lx role %x\n",
3420 __func__, audit_msg, sp->gfn,
3421 sp->role.word);
3422 spte = rmap_next(vcpu->kvm, rmapp, spte);
3423 }
3424 }
3425 }
3426
3427 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3428 {
3429 int olddbg = dbg;
3430
3431 dbg = 0;
3432 audit_msg = msg;
3433 audit_rmap(vcpu);
3434 audit_write_protection(vcpu);
3435 if (strcmp("pre pte write", audit_msg) != 0)
3436 audit_mappings(vcpu);
3437 audit_writable_sptes_have_rmaps(vcpu);
3438 dbg = olddbg;
3439 }
3440
3441 #endif
Linux kernel - Deliverables
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