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KVM: rename is_writeble_pte() to is_writable_pte()
[deliverable/linux.git] / arch / x86 / kvm / mmu.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
19
20 #include "mmu.h"
21 #include "kvm_cache_regs.h"
22
23 #include <linux/kvm_host.h>
24 #include <linux/types.h>
25 #include <linux/string.h>
26 #include <linux/mm.h>
27 #include <linux/highmem.h>
28 #include <linux/module.h>
29 #include <linux/swap.h>
30 #include <linux/hugetlb.h>
31 #include <linux/compiler.h>
32 #include <linux/srcu.h>
33
34 #include <asm/page.h>
35 #include <asm/cmpxchg.h>
36 #include <asm/io.h>
37 #include <asm/vmx.h>
38
39 /*
40 * When setting this variable to true it enables Two-Dimensional-Paging
41 * where the hardware walks 2 page tables:
42 * 1. the guest-virtual to guest-physical
43 * 2. while doing 1. it walks guest-physical to host-physical
44 * If the hardware supports that we don't need to do shadow paging.
45 */
46 bool tdp_enabled = false;
47
48 #undef MMU_DEBUG
49
50 #undef AUDIT
51
52 #ifdef AUDIT
53 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
54 #else
55 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
56 #endif
57
58 #ifdef MMU_DEBUG
59
60 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
61 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
62
63 #else
64
65 #define pgprintk(x...) do { } while (0)
66 #define rmap_printk(x...) do { } while (0)
67
68 #endif
69
70 #if defined(MMU_DEBUG) || defined(AUDIT)
71 static int dbg = 0;
72 module_param(dbg, bool, 0644);
73 #endif
74
75 static int oos_shadow = 1;
76 module_param(oos_shadow, bool, 0644);
77
78 #ifndef MMU_DEBUG
79 #define ASSERT(x) do { } while (0)
80 #else
81 #define ASSERT(x) \
82 if (!(x)) { \
83 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
84 __FILE__, __LINE__, #x); \
85 }
86 #endif
87
88 #define PT_FIRST_AVAIL_BITS_SHIFT 9
89 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
90
91 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
92
93 #define PT64_LEVEL_BITS 9
94
95 #define PT64_LEVEL_SHIFT(level) \
96 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
97
98 #define PT64_LEVEL_MASK(level) \
99 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
100
101 #define PT64_INDEX(address, level)\
102 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
103
104
105 #define PT32_LEVEL_BITS 10
106
107 #define PT32_LEVEL_SHIFT(level) \
108 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
109
110 #define PT32_LEVEL_MASK(level) \
111 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
112 #define PT32_LVL_OFFSET_MASK(level) \
113 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
114 * PT32_LEVEL_BITS))) - 1))
115
116 #define PT32_INDEX(address, level)\
117 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
118
119
120 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
121 #define PT64_DIR_BASE_ADDR_MASK \
122 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
123 #define PT64_LVL_ADDR_MASK(level) \
124 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
125 * PT64_LEVEL_BITS))) - 1))
126 #define PT64_LVL_OFFSET_MASK(level) \
127 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
128 * PT64_LEVEL_BITS))) - 1))
129
130 #define PT32_BASE_ADDR_MASK PAGE_MASK
131 #define PT32_DIR_BASE_ADDR_MASK \
132 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
133 #define PT32_LVL_ADDR_MASK(level) \
134 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
135 * PT32_LEVEL_BITS))) - 1))
136
137 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
138 | PT64_NX_MASK)
139
140 #define PFERR_PRESENT_MASK (1U << 0)
141 #define PFERR_WRITE_MASK (1U << 1)
142 #define PFERR_USER_MASK (1U << 2)
143 #define PFERR_RSVD_MASK (1U << 3)
144 #define PFERR_FETCH_MASK (1U << 4)
145
146 #define RMAP_EXT 4
147
148 #define ACC_EXEC_MASK 1
149 #define ACC_WRITE_MASK PT_WRITABLE_MASK
150 #define ACC_USER_MASK PT_USER_MASK
151 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
152
153 #define CREATE_TRACE_POINTS
154 #include "mmutrace.h"
155
156 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
157
158 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
159
160 struct kvm_rmap_desc {
161 u64 *sptes[RMAP_EXT];
162 struct kvm_rmap_desc *more;
163 };
164
165 struct kvm_shadow_walk_iterator {
166 u64 addr;
167 hpa_t shadow_addr;
168 int level;
169 u64 *sptep;
170 unsigned index;
171 };
172
173 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
174 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
175 shadow_walk_okay(&(_walker)); \
176 shadow_walk_next(&(_walker)))
177
178
179 struct kvm_unsync_walk {
180 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
181 };
182
183 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
184
185 static struct kmem_cache *pte_chain_cache;
186 static struct kmem_cache *rmap_desc_cache;
187 static struct kmem_cache *mmu_page_header_cache;
188
189 static u64 __read_mostly shadow_trap_nonpresent_pte;
190 static u64 __read_mostly shadow_notrap_nonpresent_pte;
191 static u64 __read_mostly shadow_base_present_pte;
192 static u64 __read_mostly shadow_nx_mask;
193 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
194 static u64 __read_mostly shadow_user_mask;
195 static u64 __read_mostly shadow_accessed_mask;
196 static u64 __read_mostly shadow_dirty_mask;
197
198 static inline u64 rsvd_bits(int s, int e)
199 {
200 return ((1ULL << (e - s + 1)) - 1) << s;
201 }
202
203 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
204 {
205 shadow_trap_nonpresent_pte = trap_pte;
206 shadow_notrap_nonpresent_pte = notrap_pte;
207 }
208 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
209
210 void kvm_mmu_set_base_ptes(u64 base_pte)
211 {
212 shadow_base_present_pte = base_pte;
213 }
214 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
215
216 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
217 u64 dirty_mask, u64 nx_mask, u64 x_mask)
218 {
219 shadow_user_mask = user_mask;
220 shadow_accessed_mask = accessed_mask;
221 shadow_dirty_mask = dirty_mask;
222 shadow_nx_mask = nx_mask;
223 shadow_x_mask = x_mask;
224 }
225 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
226
227 static int is_write_protection(struct kvm_vcpu *vcpu)
228 {
229 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
230 }
231
232 static int is_cpuid_PSE36(void)
233 {
234 return 1;
235 }
236
237 static int is_nx(struct kvm_vcpu *vcpu)
238 {
239 return vcpu->arch.shadow_efer & EFER_NX;
240 }
241
242 static int is_shadow_present_pte(u64 pte)
243 {
244 return pte != shadow_trap_nonpresent_pte
245 && pte != shadow_notrap_nonpresent_pte;
246 }
247
248 static int is_large_pte(u64 pte)
249 {
250 return pte & PT_PAGE_SIZE_MASK;
251 }
252
253 static int is_writable_pte(unsigned long pte)
254 {
255 return pte & PT_WRITABLE_MASK;
256 }
257
258 static int is_dirty_gpte(unsigned long pte)
259 {
260 return pte & PT_DIRTY_MASK;
261 }
262
263 static int is_rmap_spte(u64 pte)
264 {
265 return is_shadow_present_pte(pte);
266 }
267
268 static int is_last_spte(u64 pte, int level)
269 {
270 if (level == PT_PAGE_TABLE_LEVEL)
271 return 1;
272 if (is_large_pte(pte))
273 return 1;
274 return 0;
275 }
276
277 static pfn_t spte_to_pfn(u64 pte)
278 {
279 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
280 }
281
282 static gfn_t pse36_gfn_delta(u32 gpte)
283 {
284 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
285
286 return (gpte & PT32_DIR_PSE36_MASK) << shift;
287 }
288
289 static void __set_spte(u64 *sptep, u64 spte)
290 {
291 #ifdef CONFIG_X86_64
292 set_64bit((unsigned long *)sptep, spte);
293 #else
294 set_64bit((unsigned long long *)sptep, spte);
295 #endif
296 }
297
298 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
299 struct kmem_cache *base_cache, int min)
300 {
301 void *obj;
302
303 if (cache->nobjs >= min)
304 return 0;
305 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
306 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
307 if (!obj)
308 return -ENOMEM;
309 cache->objects[cache->nobjs++] = obj;
310 }
311 return 0;
312 }
313
314 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
315 {
316 while (mc->nobjs)
317 kfree(mc->objects[--mc->nobjs]);
318 }
319
320 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
321 int min)
322 {
323 struct page *page;
324
325 if (cache->nobjs >= min)
326 return 0;
327 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
328 page = alloc_page(GFP_KERNEL);
329 if (!page)
330 return -ENOMEM;
331 set_page_private(page, 0);
332 cache->objects[cache->nobjs++] = page_address(page);
333 }
334 return 0;
335 }
336
337 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
338 {
339 while (mc->nobjs)
340 free_page((unsigned long)mc->objects[--mc->nobjs]);
341 }
342
343 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
344 {
345 int r;
346
347 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
348 pte_chain_cache, 4);
349 if (r)
350 goto out;
351 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
352 rmap_desc_cache, 4);
353 if (r)
354 goto out;
355 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
356 if (r)
357 goto out;
358 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
359 mmu_page_header_cache, 4);
360 out:
361 return r;
362 }
363
364 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
365 {
366 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
367 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
368 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
369 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
370 }
371
372 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
373 size_t size)
374 {
375 void *p;
376
377 BUG_ON(!mc->nobjs);
378 p = mc->objects[--mc->nobjs];
379 return p;
380 }
381
382 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
383 {
384 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
385 sizeof(struct kvm_pte_chain));
386 }
387
388 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
389 {
390 kfree(pc);
391 }
392
393 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
394 {
395 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
396 sizeof(struct kvm_rmap_desc));
397 }
398
399 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
400 {
401 kfree(rd);
402 }
403
404 /*
405 * Return the pointer to the largepage write count for a given
406 * gfn, handling slots that are not large page aligned.
407 */
408 static int *slot_largepage_idx(gfn_t gfn,
409 struct kvm_memory_slot *slot,
410 int level)
411 {
412 unsigned long idx;
413
414 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
415 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
416 return &slot->lpage_info[level - 2][idx].write_count;
417 }
418
419 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
420 {
421 struct kvm_memory_slot *slot;
422 int *write_count;
423 int i;
424
425 gfn = unalias_gfn(kvm, gfn);
426
427 slot = gfn_to_memslot_unaliased(kvm, gfn);
428 for (i = PT_DIRECTORY_LEVEL;
429 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
430 write_count = slot_largepage_idx(gfn, slot, i);
431 *write_count += 1;
432 }
433 }
434
435 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
436 {
437 struct kvm_memory_slot *slot;
438 int *write_count;
439 int i;
440
441 gfn = unalias_gfn(kvm, gfn);
442 for (i = PT_DIRECTORY_LEVEL;
443 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
444 slot = gfn_to_memslot_unaliased(kvm, gfn);
445 write_count = slot_largepage_idx(gfn, slot, i);
446 *write_count -= 1;
447 WARN_ON(*write_count < 0);
448 }
449 }
450
451 static int has_wrprotected_page(struct kvm *kvm,
452 gfn_t gfn,
453 int level)
454 {
455 struct kvm_memory_slot *slot;
456 int *largepage_idx;
457
458 gfn = unalias_gfn(kvm, gfn);
459 slot = gfn_to_memslot_unaliased(kvm, gfn);
460 if (slot) {
461 largepage_idx = slot_largepage_idx(gfn, slot, level);
462 return *largepage_idx;
463 }
464
465 return 1;
466 }
467
468 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
469 {
470 unsigned long page_size = PAGE_SIZE;
471 struct vm_area_struct *vma;
472 unsigned long addr;
473 int i, ret = 0;
474
475 addr = gfn_to_hva(kvm, gfn);
476 if (kvm_is_error_hva(addr))
477 return PT_PAGE_TABLE_LEVEL;
478
479 down_read(&current->mm->mmap_sem);
480 vma = find_vma(current->mm, addr);
481 if (!vma)
482 goto out;
483
484 page_size = vma_kernel_pagesize(vma);
485
486 out:
487 up_read(&current->mm->mmap_sem);
488
489 for (i = PT_PAGE_TABLE_LEVEL;
490 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
491 if (page_size >= KVM_HPAGE_SIZE(i))
492 ret = i;
493 else
494 break;
495 }
496
497 return ret;
498 }
499
500 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
501 {
502 struct kvm_memory_slot *slot;
503 int host_level, level, max_level;
504
505 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
506 if (slot && slot->dirty_bitmap)
507 return PT_PAGE_TABLE_LEVEL;
508
509 host_level = host_mapping_level(vcpu->kvm, large_gfn);
510
511 if (host_level == PT_PAGE_TABLE_LEVEL)
512 return host_level;
513
514 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
515 kvm_x86_ops->get_lpage_level() : host_level;
516
517 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
518 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
519 break;
520
521 return level - 1;
522 }
523
524 /*
525 * Take gfn and return the reverse mapping to it.
526 * Note: gfn must be unaliased before this function get called
527 */
528
529 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
530 {
531 struct kvm_memory_slot *slot;
532 unsigned long idx;
533
534 slot = gfn_to_memslot(kvm, gfn);
535 if (likely(level == PT_PAGE_TABLE_LEVEL))
536 return &slot->rmap[gfn - slot->base_gfn];
537
538 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
539 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
540
541 return &slot->lpage_info[level - 2][idx].rmap_pde;
542 }
543
544 /*
545 * Reverse mapping data structures:
546 *
547 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
548 * that points to page_address(page).
549 *
550 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
551 * containing more mappings.
552 *
553 * Returns the number of rmap entries before the spte was added or zero if
554 * the spte was not added.
555 *
556 */
557 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
558 {
559 struct kvm_mmu_page *sp;
560 struct kvm_rmap_desc *desc;
561 unsigned long *rmapp;
562 int i, count = 0;
563
564 if (!is_rmap_spte(*spte))
565 return count;
566 gfn = unalias_gfn(vcpu->kvm, gfn);
567 sp = page_header(__pa(spte));
568 sp->gfns[spte - sp->spt] = gfn;
569 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
570 if (!*rmapp) {
571 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
572 *rmapp = (unsigned long)spte;
573 } else if (!(*rmapp & 1)) {
574 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
575 desc = mmu_alloc_rmap_desc(vcpu);
576 desc->sptes[0] = (u64 *)*rmapp;
577 desc->sptes[1] = spte;
578 *rmapp = (unsigned long)desc | 1;
579 } else {
580 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
581 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
582 while (desc->sptes[RMAP_EXT-1] && desc->more) {
583 desc = desc->more;
584 count += RMAP_EXT;
585 }
586 if (desc->sptes[RMAP_EXT-1]) {
587 desc->more = mmu_alloc_rmap_desc(vcpu);
588 desc = desc->more;
589 }
590 for (i = 0; desc->sptes[i]; ++i)
591 ;
592 desc->sptes[i] = spte;
593 }
594 return count;
595 }
596
597 static void rmap_desc_remove_entry(unsigned long *rmapp,
598 struct kvm_rmap_desc *desc,
599 int i,
600 struct kvm_rmap_desc *prev_desc)
601 {
602 int j;
603
604 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
605 ;
606 desc->sptes[i] = desc->sptes[j];
607 desc->sptes[j] = NULL;
608 if (j != 0)
609 return;
610 if (!prev_desc && !desc->more)
611 *rmapp = (unsigned long)desc->sptes[0];
612 else
613 if (prev_desc)
614 prev_desc->more = desc->more;
615 else
616 *rmapp = (unsigned long)desc->more | 1;
617 mmu_free_rmap_desc(desc);
618 }
619
620 static void rmap_remove(struct kvm *kvm, u64 *spte)
621 {
622 struct kvm_rmap_desc *desc;
623 struct kvm_rmap_desc *prev_desc;
624 struct kvm_mmu_page *sp;
625 pfn_t pfn;
626 unsigned long *rmapp;
627 int i;
628
629 if (!is_rmap_spte(*spte))
630 return;
631 sp = page_header(__pa(spte));
632 pfn = spte_to_pfn(*spte);
633 if (*spte & shadow_accessed_mask)
634 kvm_set_pfn_accessed(pfn);
635 if (is_writable_pte(*spte))
636 kvm_set_pfn_dirty(pfn);
637 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
638 if (!*rmapp) {
639 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
640 BUG();
641 } else if (!(*rmapp & 1)) {
642 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
643 if ((u64 *)*rmapp != spte) {
644 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
645 spte, *spte);
646 BUG();
647 }
648 *rmapp = 0;
649 } else {
650 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
651 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
652 prev_desc = NULL;
653 while (desc) {
654 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
655 if (desc->sptes[i] == spte) {
656 rmap_desc_remove_entry(rmapp,
657 desc, i,
658 prev_desc);
659 return;
660 }
661 prev_desc = desc;
662 desc = desc->more;
663 }
664 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
665 BUG();
666 }
667 }
668
669 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
670 {
671 struct kvm_rmap_desc *desc;
672 struct kvm_rmap_desc *prev_desc;
673 u64 *prev_spte;
674 int i;
675
676 if (!*rmapp)
677 return NULL;
678 else if (!(*rmapp & 1)) {
679 if (!spte)
680 return (u64 *)*rmapp;
681 return NULL;
682 }
683 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
684 prev_desc = NULL;
685 prev_spte = NULL;
686 while (desc) {
687 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
688 if (prev_spte == spte)
689 return desc->sptes[i];
690 prev_spte = desc->sptes[i];
691 }
692 desc = desc->more;
693 }
694 return NULL;
695 }
696
697 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
698 {
699 unsigned long *rmapp;
700 u64 *spte;
701 int i, write_protected = 0;
702
703 gfn = unalias_gfn(kvm, gfn);
704 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
705
706 spte = rmap_next(kvm, rmapp, NULL);
707 while (spte) {
708 BUG_ON(!spte);
709 BUG_ON(!(*spte & PT_PRESENT_MASK));
710 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
711 if (is_writable_pte(*spte)) {
712 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
713 write_protected = 1;
714 }
715 spte = rmap_next(kvm, rmapp, spte);
716 }
717 if (write_protected) {
718 pfn_t pfn;
719
720 spte = rmap_next(kvm, rmapp, NULL);
721 pfn = spte_to_pfn(*spte);
722 kvm_set_pfn_dirty(pfn);
723 }
724
725 /* check for huge page mappings */
726 for (i = PT_DIRECTORY_LEVEL;
727 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
728 rmapp = gfn_to_rmap(kvm, gfn, i);
729 spte = rmap_next(kvm, rmapp, NULL);
730 while (spte) {
731 BUG_ON(!spte);
732 BUG_ON(!(*spte & PT_PRESENT_MASK));
733 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
734 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
735 if (is_writable_pte(*spte)) {
736 rmap_remove(kvm, spte);
737 --kvm->stat.lpages;
738 __set_spte(spte, shadow_trap_nonpresent_pte);
739 spte = NULL;
740 write_protected = 1;
741 }
742 spte = rmap_next(kvm, rmapp, spte);
743 }
744 }
745
746 return write_protected;
747 }
748
749 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
750 unsigned long data)
751 {
752 u64 *spte;
753 int need_tlb_flush = 0;
754
755 while ((spte = rmap_next(kvm, rmapp, NULL))) {
756 BUG_ON(!(*spte & PT_PRESENT_MASK));
757 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
758 rmap_remove(kvm, spte);
759 __set_spte(spte, shadow_trap_nonpresent_pte);
760 need_tlb_flush = 1;
761 }
762 return need_tlb_flush;
763 }
764
765 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
766 unsigned long data)
767 {
768 int need_flush = 0;
769 u64 *spte, new_spte;
770 pte_t *ptep = (pte_t *)data;
771 pfn_t new_pfn;
772
773 WARN_ON(pte_huge(*ptep));
774 new_pfn = pte_pfn(*ptep);
775 spte = rmap_next(kvm, rmapp, NULL);
776 while (spte) {
777 BUG_ON(!is_shadow_present_pte(*spte));
778 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
779 need_flush = 1;
780 if (pte_write(*ptep)) {
781 rmap_remove(kvm, spte);
782 __set_spte(spte, shadow_trap_nonpresent_pte);
783 spte = rmap_next(kvm, rmapp, NULL);
784 } else {
785 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
786 new_spte |= (u64)new_pfn << PAGE_SHIFT;
787
788 new_spte &= ~PT_WRITABLE_MASK;
789 new_spte &= ~SPTE_HOST_WRITEABLE;
790 if (is_writable_pte(*spte))
791 kvm_set_pfn_dirty(spte_to_pfn(*spte));
792 __set_spte(spte, new_spte);
793 spte = rmap_next(kvm, rmapp, spte);
794 }
795 }
796 if (need_flush)
797 kvm_flush_remote_tlbs(kvm);
798
799 return 0;
800 }
801
802 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
803 unsigned long data,
804 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
805 unsigned long data))
806 {
807 int i, j;
808 int retval = 0;
809 struct kvm_memslots *slots;
810
811 slots = rcu_dereference(kvm->memslots);
812
813 for (i = 0; i < slots->nmemslots; i++) {
814 struct kvm_memory_slot *memslot = &slots->memslots[i];
815 unsigned long start = memslot->userspace_addr;
816 unsigned long end;
817
818 end = start + (memslot->npages << PAGE_SHIFT);
819 if (hva >= start && hva < end) {
820 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
821
822 retval |= handler(kvm, &memslot->rmap[gfn_offset],
823 data);
824
825 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
826 int idx = gfn_offset;
827 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
828 retval |= handler(kvm,
829 &memslot->lpage_info[j][idx].rmap_pde,
830 data);
831 }
832 }
833 }
834
835 return retval;
836 }
837
838 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
839 {
840 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
841 }
842
843 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
844 {
845 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
846 }
847
848 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
849 unsigned long data)
850 {
851 u64 *spte;
852 int young = 0;
853
854 /* always return old for EPT */
855 if (!shadow_accessed_mask)
856 return 0;
857
858 spte = rmap_next(kvm, rmapp, NULL);
859 while (spte) {
860 int _young;
861 u64 _spte = *spte;
862 BUG_ON(!(_spte & PT_PRESENT_MASK));
863 _young = _spte & PT_ACCESSED_MASK;
864 if (_young) {
865 young = 1;
866 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
867 }
868 spte = rmap_next(kvm, rmapp, spte);
869 }
870 return young;
871 }
872
873 #define RMAP_RECYCLE_THRESHOLD 1000
874
875 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
876 {
877 unsigned long *rmapp;
878 struct kvm_mmu_page *sp;
879
880 sp = page_header(__pa(spte));
881
882 gfn = unalias_gfn(vcpu->kvm, gfn);
883 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
884
885 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
886 kvm_flush_remote_tlbs(vcpu->kvm);
887 }
888
889 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
890 {
891 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
892 }
893
894 #ifdef MMU_DEBUG
895 static int is_empty_shadow_page(u64 *spt)
896 {
897 u64 *pos;
898 u64 *end;
899
900 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
901 if (is_shadow_present_pte(*pos)) {
902 printk(KERN_ERR "%s: %p %llx\n", __func__,
903 pos, *pos);
904 return 0;
905 }
906 return 1;
907 }
908 #endif
909
910 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
911 {
912 ASSERT(is_empty_shadow_page(sp->spt));
913 list_del(&sp->link);
914 __free_page(virt_to_page(sp->spt));
915 __free_page(virt_to_page(sp->gfns));
916 kfree(sp);
917 ++kvm->arch.n_free_mmu_pages;
918 }
919
920 static unsigned kvm_page_table_hashfn(gfn_t gfn)
921 {
922 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
923 }
924
925 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
926 u64 *parent_pte)
927 {
928 struct kvm_mmu_page *sp;
929
930 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
931 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
932 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
933 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
934 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
935 INIT_LIST_HEAD(&sp->oos_link);
936 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
937 sp->multimapped = 0;
938 sp->parent_pte = parent_pte;
939 --vcpu->kvm->arch.n_free_mmu_pages;
940 return sp;
941 }
942
943 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
944 struct kvm_mmu_page *sp, u64 *parent_pte)
945 {
946 struct kvm_pte_chain *pte_chain;
947 struct hlist_node *node;
948 int i;
949
950 if (!parent_pte)
951 return;
952 if (!sp->multimapped) {
953 u64 *old = sp->parent_pte;
954
955 if (!old) {
956 sp->parent_pte = parent_pte;
957 return;
958 }
959 sp->multimapped = 1;
960 pte_chain = mmu_alloc_pte_chain(vcpu);
961 INIT_HLIST_HEAD(&sp->parent_ptes);
962 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
963 pte_chain->parent_ptes[0] = old;
964 }
965 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
966 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
967 continue;
968 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
969 if (!pte_chain->parent_ptes[i]) {
970 pte_chain->parent_ptes[i] = parent_pte;
971 return;
972 }
973 }
974 pte_chain = mmu_alloc_pte_chain(vcpu);
975 BUG_ON(!pte_chain);
976 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
977 pte_chain->parent_ptes[0] = parent_pte;
978 }
979
980 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
981 u64 *parent_pte)
982 {
983 struct kvm_pte_chain *pte_chain;
984 struct hlist_node *node;
985 int i;
986
987 if (!sp->multimapped) {
988 BUG_ON(sp->parent_pte != parent_pte);
989 sp->parent_pte = NULL;
990 return;
991 }
992 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
993 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
994 if (!pte_chain->parent_ptes[i])
995 break;
996 if (pte_chain->parent_ptes[i] != parent_pte)
997 continue;
998 while (i + 1 < NR_PTE_CHAIN_ENTRIES
999 && pte_chain->parent_ptes[i + 1]) {
1000 pte_chain->parent_ptes[i]
1001 = pte_chain->parent_ptes[i + 1];
1002 ++i;
1003 }
1004 pte_chain->parent_ptes[i] = NULL;
1005 if (i == 0) {
1006 hlist_del(&pte_chain->link);
1007 mmu_free_pte_chain(pte_chain);
1008 if (hlist_empty(&sp->parent_ptes)) {
1009 sp->multimapped = 0;
1010 sp->parent_pte = NULL;
1011 }
1012 }
1013 return;
1014 }
1015 BUG();
1016 }
1017
1018
1019 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1020 mmu_parent_walk_fn fn)
1021 {
1022 struct kvm_pte_chain *pte_chain;
1023 struct hlist_node *node;
1024 struct kvm_mmu_page *parent_sp;
1025 int i;
1026
1027 if (!sp->multimapped && sp->parent_pte) {
1028 parent_sp = page_header(__pa(sp->parent_pte));
1029 fn(vcpu, parent_sp);
1030 mmu_parent_walk(vcpu, parent_sp, fn);
1031 return;
1032 }
1033 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1034 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1035 if (!pte_chain->parent_ptes[i])
1036 break;
1037 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1038 fn(vcpu, parent_sp);
1039 mmu_parent_walk(vcpu, parent_sp, fn);
1040 }
1041 }
1042
1043 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1044 {
1045 unsigned int index;
1046 struct kvm_mmu_page *sp = page_header(__pa(spte));
1047
1048 index = spte - sp->spt;
1049 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1050 sp->unsync_children++;
1051 WARN_ON(!sp->unsync_children);
1052 }
1053
1054 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1055 {
1056 struct kvm_pte_chain *pte_chain;
1057 struct hlist_node *node;
1058 int i;
1059
1060 if (!sp->parent_pte)
1061 return;
1062
1063 if (!sp->multimapped) {
1064 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1065 return;
1066 }
1067
1068 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1069 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1070 if (!pte_chain->parent_ptes[i])
1071 break;
1072 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1073 }
1074 }
1075
1076 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1077 {
1078 kvm_mmu_update_parents_unsync(sp);
1079 return 1;
1080 }
1081
1082 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
1083 struct kvm_mmu_page *sp)
1084 {
1085 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
1086 kvm_mmu_update_parents_unsync(sp);
1087 }
1088
1089 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1090 struct kvm_mmu_page *sp)
1091 {
1092 int i;
1093
1094 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1095 sp->spt[i] = shadow_trap_nonpresent_pte;
1096 }
1097
1098 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1099 struct kvm_mmu_page *sp)
1100 {
1101 return 1;
1102 }
1103
1104 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1105 {
1106 }
1107
1108 #define KVM_PAGE_ARRAY_NR 16
1109
1110 struct kvm_mmu_pages {
1111 struct mmu_page_and_offset {
1112 struct kvm_mmu_page *sp;
1113 unsigned int idx;
1114 } page[KVM_PAGE_ARRAY_NR];
1115 unsigned int nr;
1116 };
1117
1118 #define for_each_unsync_children(bitmap, idx) \
1119 for (idx = find_first_bit(bitmap, 512); \
1120 idx < 512; \
1121 idx = find_next_bit(bitmap, 512, idx+1))
1122
1123 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1124 int idx)
1125 {
1126 int i;
1127
1128 if (sp->unsync)
1129 for (i=0; i < pvec->nr; i++)
1130 if (pvec->page[i].sp == sp)
1131 return 0;
1132
1133 pvec->page[pvec->nr].sp = sp;
1134 pvec->page[pvec->nr].idx = idx;
1135 pvec->nr++;
1136 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1137 }
1138
1139 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1140 struct kvm_mmu_pages *pvec)
1141 {
1142 int i, ret, nr_unsync_leaf = 0;
1143
1144 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1145 u64 ent = sp->spt[i];
1146
1147 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1148 struct kvm_mmu_page *child;
1149 child = page_header(ent & PT64_BASE_ADDR_MASK);
1150
1151 if (child->unsync_children) {
1152 if (mmu_pages_add(pvec, child, i))
1153 return -ENOSPC;
1154
1155 ret = __mmu_unsync_walk(child, pvec);
1156 if (!ret)
1157 __clear_bit(i, sp->unsync_child_bitmap);
1158 else if (ret > 0)
1159 nr_unsync_leaf += ret;
1160 else
1161 return ret;
1162 }
1163
1164 if (child->unsync) {
1165 nr_unsync_leaf++;
1166 if (mmu_pages_add(pvec, child, i))
1167 return -ENOSPC;
1168 }
1169 }
1170 }
1171
1172 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1173 sp->unsync_children = 0;
1174
1175 return nr_unsync_leaf;
1176 }
1177
1178 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1179 struct kvm_mmu_pages *pvec)
1180 {
1181 if (!sp->unsync_children)
1182 return 0;
1183
1184 mmu_pages_add(pvec, sp, 0);
1185 return __mmu_unsync_walk(sp, pvec);
1186 }
1187
1188 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1189 {
1190 unsigned index;
1191 struct hlist_head *bucket;
1192 struct kvm_mmu_page *sp;
1193 struct hlist_node *node;
1194
1195 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1196 index = kvm_page_table_hashfn(gfn);
1197 bucket = &kvm->arch.mmu_page_hash[index];
1198 hlist_for_each_entry(sp, node, bucket, hash_link)
1199 if (sp->gfn == gfn && !sp->role.direct
1200 && !sp->role.invalid) {
1201 pgprintk("%s: found role %x\n",
1202 __func__, sp->role.word);
1203 return sp;
1204 }
1205 return NULL;
1206 }
1207
1208 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1209 {
1210 WARN_ON(!sp->unsync);
1211 sp->unsync = 0;
1212 --kvm->stat.mmu_unsync;
1213 }
1214
1215 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1216
1217 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1218 {
1219 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1220 kvm_mmu_zap_page(vcpu->kvm, sp);
1221 return 1;
1222 }
1223
1224 trace_kvm_mmu_sync_page(sp);
1225 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1226 kvm_flush_remote_tlbs(vcpu->kvm);
1227 kvm_unlink_unsync_page(vcpu->kvm, sp);
1228 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1229 kvm_mmu_zap_page(vcpu->kvm, sp);
1230 return 1;
1231 }
1232
1233 kvm_mmu_flush_tlb(vcpu);
1234 return 0;
1235 }
1236
1237 struct mmu_page_path {
1238 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1239 unsigned int idx[PT64_ROOT_LEVEL-1];
1240 };
1241
1242 #define for_each_sp(pvec, sp, parents, i) \
1243 for (i = mmu_pages_next(&pvec, &parents, -1), \
1244 sp = pvec.page[i].sp; \
1245 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1246 i = mmu_pages_next(&pvec, &parents, i))
1247
1248 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1249 struct mmu_page_path *parents,
1250 int i)
1251 {
1252 int n;
1253
1254 for (n = i+1; n < pvec->nr; n++) {
1255 struct kvm_mmu_page *sp = pvec->page[n].sp;
1256
1257 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1258 parents->idx[0] = pvec->page[n].idx;
1259 return n;
1260 }
1261
1262 parents->parent[sp->role.level-2] = sp;
1263 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1264 }
1265
1266 return n;
1267 }
1268
1269 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1270 {
1271 struct kvm_mmu_page *sp;
1272 unsigned int level = 0;
1273
1274 do {
1275 unsigned int idx = parents->idx[level];
1276
1277 sp = parents->parent[level];
1278 if (!sp)
1279 return;
1280
1281 --sp->unsync_children;
1282 WARN_ON((int)sp->unsync_children < 0);
1283 __clear_bit(idx, sp->unsync_child_bitmap);
1284 level++;
1285 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1286 }
1287
1288 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1289 struct mmu_page_path *parents,
1290 struct kvm_mmu_pages *pvec)
1291 {
1292 parents->parent[parent->role.level-1] = NULL;
1293 pvec->nr = 0;
1294 }
1295
1296 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1297 struct kvm_mmu_page *parent)
1298 {
1299 int i;
1300 struct kvm_mmu_page *sp;
1301 struct mmu_page_path parents;
1302 struct kvm_mmu_pages pages;
1303
1304 kvm_mmu_pages_init(parent, &parents, &pages);
1305 while (mmu_unsync_walk(parent, &pages)) {
1306 int protected = 0;
1307
1308 for_each_sp(pages, sp, parents, i)
1309 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1310
1311 if (protected)
1312 kvm_flush_remote_tlbs(vcpu->kvm);
1313
1314 for_each_sp(pages, sp, parents, i) {
1315 kvm_sync_page(vcpu, sp);
1316 mmu_pages_clear_parents(&parents);
1317 }
1318 cond_resched_lock(&vcpu->kvm->mmu_lock);
1319 kvm_mmu_pages_init(parent, &parents, &pages);
1320 }
1321 }
1322
1323 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1324 gfn_t gfn,
1325 gva_t gaddr,
1326 unsigned level,
1327 int direct,
1328 unsigned access,
1329 u64 *parent_pte)
1330 {
1331 union kvm_mmu_page_role role;
1332 unsigned index;
1333 unsigned quadrant;
1334 struct hlist_head *bucket;
1335 struct kvm_mmu_page *sp;
1336 struct hlist_node *node, *tmp;
1337
1338 role = vcpu->arch.mmu.base_role;
1339 role.level = level;
1340 role.direct = direct;
1341 role.access = access;
1342 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1343 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1344 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1345 role.quadrant = quadrant;
1346 }
1347 index = kvm_page_table_hashfn(gfn);
1348 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1349 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1350 if (sp->gfn == gfn) {
1351 if (sp->unsync)
1352 if (kvm_sync_page(vcpu, sp))
1353 continue;
1354
1355 if (sp->role.word != role.word)
1356 continue;
1357
1358 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1359 if (sp->unsync_children) {
1360 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1361 kvm_mmu_mark_parents_unsync(vcpu, sp);
1362 }
1363 trace_kvm_mmu_get_page(sp, false);
1364 return sp;
1365 }
1366 ++vcpu->kvm->stat.mmu_cache_miss;
1367 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1368 if (!sp)
1369 return sp;
1370 sp->gfn = gfn;
1371 sp->role = role;
1372 hlist_add_head(&sp->hash_link, bucket);
1373 if (!direct) {
1374 if (rmap_write_protect(vcpu->kvm, gfn))
1375 kvm_flush_remote_tlbs(vcpu->kvm);
1376 account_shadowed(vcpu->kvm, gfn);
1377 }
1378 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1379 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1380 else
1381 nonpaging_prefetch_page(vcpu, sp);
1382 trace_kvm_mmu_get_page(sp, true);
1383 return sp;
1384 }
1385
1386 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1387 struct kvm_vcpu *vcpu, u64 addr)
1388 {
1389 iterator->addr = addr;
1390 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1391 iterator->level = vcpu->arch.mmu.shadow_root_level;
1392 if (iterator->level == PT32E_ROOT_LEVEL) {
1393 iterator->shadow_addr
1394 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1395 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1396 --iterator->level;
1397 if (!iterator->shadow_addr)
1398 iterator->level = 0;
1399 }
1400 }
1401
1402 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1403 {
1404 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1405 return false;
1406
1407 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1408 if (is_large_pte(*iterator->sptep))
1409 return false;
1410
1411 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1412 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1413 return true;
1414 }
1415
1416 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1417 {
1418 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1419 --iterator->level;
1420 }
1421
1422 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1423 struct kvm_mmu_page *sp)
1424 {
1425 unsigned i;
1426 u64 *pt;
1427 u64 ent;
1428
1429 pt = sp->spt;
1430
1431 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1432 ent = pt[i];
1433
1434 if (is_shadow_present_pte(ent)) {
1435 if (!is_last_spte(ent, sp->role.level)) {
1436 ent &= PT64_BASE_ADDR_MASK;
1437 mmu_page_remove_parent_pte(page_header(ent),
1438 &pt[i]);
1439 } else {
1440 if (is_large_pte(ent))
1441 --kvm->stat.lpages;
1442 rmap_remove(kvm, &pt[i]);
1443 }
1444 }
1445 pt[i] = shadow_trap_nonpresent_pte;
1446 }
1447 }
1448
1449 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1450 {
1451 mmu_page_remove_parent_pte(sp, parent_pte);
1452 }
1453
1454 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1455 {
1456 int i;
1457 struct kvm_vcpu *vcpu;
1458
1459 kvm_for_each_vcpu(i, vcpu, kvm)
1460 vcpu->arch.last_pte_updated = NULL;
1461 }
1462
1463 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1464 {
1465 u64 *parent_pte;
1466
1467 while (sp->multimapped || sp->parent_pte) {
1468 if (!sp->multimapped)
1469 parent_pte = sp->parent_pte;
1470 else {
1471 struct kvm_pte_chain *chain;
1472
1473 chain = container_of(sp->parent_ptes.first,
1474 struct kvm_pte_chain, link);
1475 parent_pte = chain->parent_ptes[0];
1476 }
1477 BUG_ON(!parent_pte);
1478 kvm_mmu_put_page(sp, parent_pte);
1479 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1480 }
1481 }
1482
1483 static int mmu_zap_unsync_children(struct kvm *kvm,
1484 struct kvm_mmu_page *parent)
1485 {
1486 int i, zapped = 0;
1487 struct mmu_page_path parents;
1488 struct kvm_mmu_pages pages;
1489
1490 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1491 return 0;
1492
1493 kvm_mmu_pages_init(parent, &parents, &pages);
1494 while (mmu_unsync_walk(parent, &pages)) {
1495 struct kvm_mmu_page *sp;
1496
1497 for_each_sp(pages, sp, parents, i) {
1498 kvm_mmu_zap_page(kvm, sp);
1499 mmu_pages_clear_parents(&parents);
1500 }
1501 zapped += pages.nr;
1502 kvm_mmu_pages_init(parent, &parents, &pages);
1503 }
1504
1505 return zapped;
1506 }
1507
1508 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1509 {
1510 int ret;
1511
1512 trace_kvm_mmu_zap_page(sp);
1513 ++kvm->stat.mmu_shadow_zapped;
1514 ret = mmu_zap_unsync_children(kvm, sp);
1515 kvm_mmu_page_unlink_children(kvm, sp);
1516 kvm_mmu_unlink_parents(kvm, sp);
1517 kvm_flush_remote_tlbs(kvm);
1518 if (!sp->role.invalid && !sp->role.direct)
1519 unaccount_shadowed(kvm, sp->gfn);
1520 if (sp->unsync)
1521 kvm_unlink_unsync_page(kvm, sp);
1522 if (!sp->root_count) {
1523 hlist_del(&sp->hash_link);
1524 kvm_mmu_free_page(kvm, sp);
1525 } else {
1526 sp->role.invalid = 1;
1527 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1528 kvm_reload_remote_mmus(kvm);
1529 }
1530 kvm_mmu_reset_last_pte_updated(kvm);
1531 return ret;
1532 }
1533
1534 /*
1535 * Changing the number of mmu pages allocated to the vm
1536 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1537 */
1538 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1539 {
1540 int used_pages;
1541
1542 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1543 used_pages = max(0, used_pages);
1544
1545 /*
1546 * If we set the number of mmu pages to be smaller be than the
1547 * number of actived pages , we must to free some mmu pages before we
1548 * change the value
1549 */
1550
1551 if (used_pages > kvm_nr_mmu_pages) {
1552 while (used_pages > kvm_nr_mmu_pages) {
1553 struct kvm_mmu_page *page;
1554
1555 page = container_of(kvm->arch.active_mmu_pages.prev,
1556 struct kvm_mmu_page, link);
1557 kvm_mmu_zap_page(kvm, page);
1558 used_pages--;
1559 }
1560 kvm->arch.n_free_mmu_pages = 0;
1561 }
1562 else
1563 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1564 - kvm->arch.n_alloc_mmu_pages;
1565
1566 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1567 }
1568
1569 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1570 {
1571 unsigned index;
1572 struct hlist_head *bucket;
1573 struct kvm_mmu_page *sp;
1574 struct hlist_node *node, *n;
1575 int r;
1576
1577 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1578 r = 0;
1579 index = kvm_page_table_hashfn(gfn);
1580 bucket = &kvm->arch.mmu_page_hash[index];
1581 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1582 if (sp->gfn == gfn && !sp->role.direct) {
1583 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1584 sp->role.word);
1585 r = 1;
1586 if (kvm_mmu_zap_page(kvm, sp))
1587 n = bucket->first;
1588 }
1589 return r;
1590 }
1591
1592 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1593 {
1594 unsigned index;
1595 struct hlist_head *bucket;
1596 struct kvm_mmu_page *sp;
1597 struct hlist_node *node, *nn;
1598
1599 index = kvm_page_table_hashfn(gfn);
1600 bucket = &kvm->arch.mmu_page_hash[index];
1601 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1602 if (sp->gfn == gfn && !sp->role.direct
1603 && !sp->role.invalid) {
1604 pgprintk("%s: zap %lx %x\n",
1605 __func__, gfn, sp->role.word);
1606 kvm_mmu_zap_page(kvm, sp);
1607 }
1608 }
1609 }
1610
1611 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1612 {
1613 int slot = memslot_id(kvm, gfn);
1614 struct kvm_mmu_page *sp = page_header(__pa(pte));
1615
1616 __set_bit(slot, sp->slot_bitmap);
1617 }
1618
1619 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1620 {
1621 int i;
1622 u64 *pt = sp->spt;
1623
1624 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1625 return;
1626
1627 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1628 if (pt[i] == shadow_notrap_nonpresent_pte)
1629 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1630 }
1631 }
1632
1633 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1634 {
1635 struct page *page;
1636
1637 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1638
1639 if (gpa == UNMAPPED_GVA)
1640 return NULL;
1641
1642 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1643
1644 return page;
1645 }
1646
1647 /*
1648 * The function is based on mtrr_type_lookup() in
1649 * arch/x86/kernel/cpu/mtrr/generic.c
1650 */
1651 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1652 u64 start, u64 end)
1653 {
1654 int i;
1655 u64 base, mask;
1656 u8 prev_match, curr_match;
1657 int num_var_ranges = KVM_NR_VAR_MTRR;
1658
1659 if (!mtrr_state->enabled)
1660 return 0xFF;
1661
1662 /* Make end inclusive end, instead of exclusive */
1663 end--;
1664
1665 /* Look in fixed ranges. Just return the type as per start */
1666 if (mtrr_state->have_fixed && (start < 0x100000)) {
1667 int idx;
1668
1669 if (start < 0x80000) {
1670 idx = 0;
1671 idx += (start >> 16);
1672 return mtrr_state->fixed_ranges[idx];
1673 } else if (start < 0xC0000) {
1674 idx = 1 * 8;
1675 idx += ((start - 0x80000) >> 14);
1676 return mtrr_state->fixed_ranges[idx];
1677 } else if (start < 0x1000000) {
1678 idx = 3 * 8;
1679 idx += ((start - 0xC0000) >> 12);
1680 return mtrr_state->fixed_ranges[idx];
1681 }
1682 }
1683
1684 /*
1685 * Look in variable ranges
1686 * Look of multiple ranges matching this address and pick type
1687 * as per MTRR precedence
1688 */
1689 if (!(mtrr_state->enabled & 2))
1690 return mtrr_state->def_type;
1691
1692 prev_match = 0xFF;
1693 for (i = 0; i < num_var_ranges; ++i) {
1694 unsigned short start_state, end_state;
1695
1696 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1697 continue;
1698
1699 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1700 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1701 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1702 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1703
1704 start_state = ((start & mask) == (base & mask));
1705 end_state = ((end & mask) == (base & mask));
1706 if (start_state != end_state)
1707 return 0xFE;
1708
1709 if ((start & mask) != (base & mask))
1710 continue;
1711
1712 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1713 if (prev_match == 0xFF) {
1714 prev_match = curr_match;
1715 continue;
1716 }
1717
1718 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1719 curr_match == MTRR_TYPE_UNCACHABLE)
1720 return MTRR_TYPE_UNCACHABLE;
1721
1722 if ((prev_match == MTRR_TYPE_WRBACK &&
1723 curr_match == MTRR_TYPE_WRTHROUGH) ||
1724 (prev_match == MTRR_TYPE_WRTHROUGH &&
1725 curr_match == MTRR_TYPE_WRBACK)) {
1726 prev_match = MTRR_TYPE_WRTHROUGH;
1727 curr_match = MTRR_TYPE_WRTHROUGH;
1728 }
1729
1730 if (prev_match != curr_match)
1731 return MTRR_TYPE_UNCACHABLE;
1732 }
1733
1734 if (prev_match != 0xFF)
1735 return prev_match;
1736
1737 return mtrr_state->def_type;
1738 }
1739
1740 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1741 {
1742 u8 mtrr;
1743
1744 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1745 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1746 if (mtrr == 0xfe || mtrr == 0xff)
1747 mtrr = MTRR_TYPE_WRBACK;
1748 return mtrr;
1749 }
1750 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1751
1752 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1753 {
1754 unsigned index;
1755 struct hlist_head *bucket;
1756 struct kvm_mmu_page *s;
1757 struct hlist_node *node, *n;
1758
1759 trace_kvm_mmu_unsync_page(sp);
1760 index = kvm_page_table_hashfn(sp->gfn);
1761 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1762 /* don't unsync if pagetable is shadowed with multiple roles */
1763 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1764 if (s->gfn != sp->gfn || s->role.direct)
1765 continue;
1766 if (s->role.word != sp->role.word)
1767 return 1;
1768 }
1769 ++vcpu->kvm->stat.mmu_unsync;
1770 sp->unsync = 1;
1771
1772 kvm_mmu_mark_parents_unsync(vcpu, sp);
1773
1774 mmu_convert_notrap(sp);
1775 return 0;
1776 }
1777
1778 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1779 bool can_unsync)
1780 {
1781 struct kvm_mmu_page *shadow;
1782
1783 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1784 if (shadow) {
1785 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1786 return 1;
1787 if (shadow->unsync)
1788 return 0;
1789 if (can_unsync && oos_shadow)
1790 return kvm_unsync_page(vcpu, shadow);
1791 return 1;
1792 }
1793 return 0;
1794 }
1795
1796 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1797 unsigned pte_access, int user_fault,
1798 int write_fault, int dirty, int level,
1799 gfn_t gfn, pfn_t pfn, bool speculative,
1800 bool can_unsync, bool reset_host_protection)
1801 {
1802 u64 spte;
1803 int ret = 0;
1804
1805 /*
1806 * We don't set the accessed bit, since we sometimes want to see
1807 * whether the guest actually used the pte (in order to detect
1808 * demand paging).
1809 */
1810 spte = shadow_base_present_pte | shadow_dirty_mask;
1811 if (!speculative)
1812 spte |= shadow_accessed_mask;
1813 if (!dirty)
1814 pte_access &= ~ACC_WRITE_MASK;
1815 if (pte_access & ACC_EXEC_MASK)
1816 spte |= shadow_x_mask;
1817 else
1818 spte |= shadow_nx_mask;
1819 if (pte_access & ACC_USER_MASK)
1820 spte |= shadow_user_mask;
1821 if (level > PT_PAGE_TABLE_LEVEL)
1822 spte |= PT_PAGE_SIZE_MASK;
1823 if (tdp_enabled)
1824 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1825 kvm_is_mmio_pfn(pfn));
1826
1827 if (reset_host_protection)
1828 spte |= SPTE_HOST_WRITEABLE;
1829
1830 spte |= (u64)pfn << PAGE_SHIFT;
1831
1832 if ((pte_access & ACC_WRITE_MASK)
1833 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1834
1835 if (level > PT_PAGE_TABLE_LEVEL &&
1836 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1837 ret = 1;
1838 spte = shadow_trap_nonpresent_pte;
1839 goto set_pte;
1840 }
1841
1842 spte |= PT_WRITABLE_MASK;
1843
1844 /*
1845 * Optimization: for pte sync, if spte was writable the hash
1846 * lookup is unnecessary (and expensive). Write protection
1847 * is responsibility of mmu_get_page / kvm_sync_page.
1848 * Same reasoning can be applied to dirty page accounting.
1849 */
1850 if (!can_unsync && is_writable_pte(*sptep))
1851 goto set_pte;
1852
1853 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1854 pgprintk("%s: found shadow page for %lx, marking ro\n",
1855 __func__, gfn);
1856 ret = 1;
1857 pte_access &= ~ACC_WRITE_MASK;
1858 if (is_writable_pte(spte))
1859 spte &= ~PT_WRITABLE_MASK;
1860 }
1861 }
1862
1863 if (pte_access & ACC_WRITE_MASK)
1864 mark_page_dirty(vcpu->kvm, gfn);
1865
1866 set_pte:
1867 __set_spte(sptep, spte);
1868 return ret;
1869 }
1870
1871 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1872 unsigned pt_access, unsigned pte_access,
1873 int user_fault, int write_fault, int dirty,
1874 int *ptwrite, int level, gfn_t gfn,
1875 pfn_t pfn, bool speculative,
1876 bool reset_host_protection)
1877 {
1878 int was_rmapped = 0;
1879 int was_writable = is_writable_pte(*sptep);
1880 int rmap_count;
1881
1882 pgprintk("%s: spte %llx access %x write_fault %d"
1883 " user_fault %d gfn %lx\n",
1884 __func__, *sptep, pt_access,
1885 write_fault, user_fault, gfn);
1886
1887 if (is_rmap_spte(*sptep)) {
1888 /*
1889 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1890 * the parent of the now unreachable PTE.
1891 */
1892 if (level > PT_PAGE_TABLE_LEVEL &&
1893 !is_large_pte(*sptep)) {
1894 struct kvm_mmu_page *child;
1895 u64 pte = *sptep;
1896
1897 child = page_header(pte & PT64_BASE_ADDR_MASK);
1898 mmu_page_remove_parent_pte(child, sptep);
1899 } else if (pfn != spte_to_pfn(*sptep)) {
1900 pgprintk("hfn old %lx new %lx\n",
1901 spte_to_pfn(*sptep), pfn);
1902 rmap_remove(vcpu->kvm, sptep);
1903 } else
1904 was_rmapped = 1;
1905 }
1906
1907 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1908 dirty, level, gfn, pfn, speculative, true,
1909 reset_host_protection)) {
1910 if (write_fault)
1911 *ptwrite = 1;
1912 kvm_x86_ops->tlb_flush(vcpu);
1913 }
1914
1915 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1916 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1917 is_large_pte(*sptep)? "2MB" : "4kB",
1918 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1919 *sptep, sptep);
1920 if (!was_rmapped && is_large_pte(*sptep))
1921 ++vcpu->kvm->stat.lpages;
1922
1923 page_header_update_slot(vcpu->kvm, sptep, gfn);
1924 if (!was_rmapped) {
1925 rmap_count = rmap_add(vcpu, sptep, gfn);
1926 kvm_release_pfn_clean(pfn);
1927 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1928 rmap_recycle(vcpu, sptep, gfn);
1929 } else {
1930 if (was_writable)
1931 kvm_release_pfn_dirty(pfn);
1932 else
1933 kvm_release_pfn_clean(pfn);
1934 }
1935 if (speculative) {
1936 vcpu->arch.last_pte_updated = sptep;
1937 vcpu->arch.last_pte_gfn = gfn;
1938 }
1939 }
1940
1941 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1942 {
1943 }
1944
1945 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1946 int level, gfn_t gfn, pfn_t pfn)
1947 {
1948 struct kvm_shadow_walk_iterator iterator;
1949 struct kvm_mmu_page *sp;
1950 int pt_write = 0;
1951 gfn_t pseudo_gfn;
1952
1953 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1954 if (iterator.level == level) {
1955 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1956 0, write, 1, &pt_write,
1957 level, gfn, pfn, false, true);
1958 ++vcpu->stat.pf_fixed;
1959 break;
1960 }
1961
1962 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1963 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1964 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1965 iterator.level - 1,
1966 1, ACC_ALL, iterator.sptep);
1967 if (!sp) {
1968 pgprintk("nonpaging_map: ENOMEM\n");
1969 kvm_release_pfn_clean(pfn);
1970 return -ENOMEM;
1971 }
1972
1973 __set_spte(iterator.sptep,
1974 __pa(sp->spt)
1975 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1976 | shadow_user_mask | shadow_x_mask);
1977 }
1978 }
1979 return pt_write;
1980 }
1981
1982 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1983 {
1984 int r;
1985 int level;
1986 pfn_t pfn;
1987 unsigned long mmu_seq;
1988
1989 level = mapping_level(vcpu, gfn);
1990
1991 /*
1992 * This path builds a PAE pagetable - so we can map 2mb pages at
1993 * maximum. Therefore check if the level is larger than that.
1994 */
1995 if (level > PT_DIRECTORY_LEVEL)
1996 level = PT_DIRECTORY_LEVEL;
1997
1998 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
1999
2000 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2001 smp_rmb();
2002 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2003
2004 /* mmio */
2005 if (is_error_pfn(pfn)) {
2006 kvm_release_pfn_clean(pfn);
2007 return 1;
2008 }
2009
2010 spin_lock(&vcpu->kvm->mmu_lock);
2011 if (mmu_notifier_retry(vcpu, mmu_seq))
2012 goto out_unlock;
2013 kvm_mmu_free_some_pages(vcpu);
2014 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2015 spin_unlock(&vcpu->kvm->mmu_lock);
2016
2017
2018 return r;
2019
2020 out_unlock:
2021 spin_unlock(&vcpu->kvm->mmu_lock);
2022 kvm_release_pfn_clean(pfn);
2023 return 0;
2024 }
2025
2026
2027 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2028 {
2029 int i;
2030 struct kvm_mmu_page *sp;
2031
2032 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2033 return;
2034 spin_lock(&vcpu->kvm->mmu_lock);
2035 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2036 hpa_t root = vcpu->arch.mmu.root_hpa;
2037
2038 sp = page_header(root);
2039 --sp->root_count;
2040 if (!sp->root_count && sp->role.invalid)
2041 kvm_mmu_zap_page(vcpu->kvm, sp);
2042 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2043 spin_unlock(&vcpu->kvm->mmu_lock);
2044 return;
2045 }
2046 for (i = 0; i < 4; ++i) {
2047 hpa_t root = vcpu->arch.mmu.pae_root[i];
2048
2049 if (root) {
2050 root &= PT64_BASE_ADDR_MASK;
2051 sp = page_header(root);
2052 --sp->root_count;
2053 if (!sp->root_count && sp->role.invalid)
2054 kvm_mmu_zap_page(vcpu->kvm, sp);
2055 }
2056 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2057 }
2058 spin_unlock(&vcpu->kvm->mmu_lock);
2059 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2060 }
2061
2062 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2063 {
2064 int ret = 0;
2065
2066 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2067 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2068 ret = 1;
2069 }
2070
2071 return ret;
2072 }
2073
2074 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2075 {
2076 int i;
2077 gfn_t root_gfn;
2078 struct kvm_mmu_page *sp;
2079 int direct = 0;
2080 u64 pdptr;
2081
2082 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2083
2084 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2085 hpa_t root = vcpu->arch.mmu.root_hpa;
2086
2087 ASSERT(!VALID_PAGE(root));
2088 if (tdp_enabled)
2089 direct = 1;
2090 if (mmu_check_root(vcpu, root_gfn))
2091 return 1;
2092 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2093 PT64_ROOT_LEVEL, direct,
2094 ACC_ALL, NULL);
2095 root = __pa(sp->spt);
2096 ++sp->root_count;
2097 vcpu->arch.mmu.root_hpa = root;
2098 return 0;
2099 }
2100 direct = !is_paging(vcpu);
2101 if (tdp_enabled)
2102 direct = 1;
2103 for (i = 0; i < 4; ++i) {
2104 hpa_t root = vcpu->arch.mmu.pae_root[i];
2105
2106 ASSERT(!VALID_PAGE(root));
2107 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2108 pdptr = kvm_pdptr_read(vcpu, i);
2109 if (!is_present_gpte(pdptr)) {
2110 vcpu->arch.mmu.pae_root[i] = 0;
2111 continue;
2112 }
2113 root_gfn = pdptr >> PAGE_SHIFT;
2114 } else if (vcpu->arch.mmu.root_level == 0)
2115 root_gfn = 0;
2116 if (mmu_check_root(vcpu, root_gfn))
2117 return 1;
2118 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2119 PT32_ROOT_LEVEL, direct,
2120 ACC_ALL, NULL);
2121 root = __pa(sp->spt);
2122 ++sp->root_count;
2123 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2124 }
2125 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2126 return 0;
2127 }
2128
2129 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2130 {
2131 int i;
2132 struct kvm_mmu_page *sp;
2133
2134 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2135 return;
2136 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2137 hpa_t root = vcpu->arch.mmu.root_hpa;
2138 sp = page_header(root);
2139 mmu_sync_children(vcpu, sp);
2140 return;
2141 }
2142 for (i = 0; i < 4; ++i) {
2143 hpa_t root = vcpu->arch.mmu.pae_root[i];
2144
2145 if (root && VALID_PAGE(root)) {
2146 root &= PT64_BASE_ADDR_MASK;
2147 sp = page_header(root);
2148 mmu_sync_children(vcpu, sp);
2149 }
2150 }
2151 }
2152
2153 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2154 {
2155 spin_lock(&vcpu->kvm->mmu_lock);
2156 mmu_sync_roots(vcpu);
2157 spin_unlock(&vcpu->kvm->mmu_lock);
2158 }
2159
2160 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2161 {
2162 return vaddr;
2163 }
2164
2165 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2166 u32 error_code)
2167 {
2168 gfn_t gfn;
2169 int r;
2170
2171 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2172 r = mmu_topup_memory_caches(vcpu);
2173 if (r)
2174 return r;
2175
2176 ASSERT(vcpu);
2177 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2178
2179 gfn = gva >> PAGE_SHIFT;
2180
2181 return nonpaging_map(vcpu, gva & PAGE_MASK,
2182 error_code & PFERR_WRITE_MASK, gfn);
2183 }
2184
2185 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2186 u32 error_code)
2187 {
2188 pfn_t pfn;
2189 int r;
2190 int level;
2191 gfn_t gfn = gpa >> PAGE_SHIFT;
2192 unsigned long mmu_seq;
2193
2194 ASSERT(vcpu);
2195 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2196
2197 r = mmu_topup_memory_caches(vcpu);
2198 if (r)
2199 return r;
2200
2201 level = mapping_level(vcpu, gfn);
2202
2203 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2204
2205 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2206 smp_rmb();
2207 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2208 if (is_error_pfn(pfn)) {
2209 kvm_release_pfn_clean(pfn);
2210 return 1;
2211 }
2212 spin_lock(&vcpu->kvm->mmu_lock);
2213 if (mmu_notifier_retry(vcpu, mmu_seq))
2214 goto out_unlock;
2215 kvm_mmu_free_some_pages(vcpu);
2216 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2217 level, gfn, pfn);
2218 spin_unlock(&vcpu->kvm->mmu_lock);
2219
2220 return r;
2221
2222 out_unlock:
2223 spin_unlock(&vcpu->kvm->mmu_lock);
2224 kvm_release_pfn_clean(pfn);
2225 return 0;
2226 }
2227
2228 static void nonpaging_free(struct kvm_vcpu *vcpu)
2229 {
2230 mmu_free_roots(vcpu);
2231 }
2232
2233 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2234 {
2235 struct kvm_mmu *context = &vcpu->arch.mmu;
2236
2237 context->new_cr3 = nonpaging_new_cr3;
2238 context->page_fault = nonpaging_page_fault;
2239 context->gva_to_gpa = nonpaging_gva_to_gpa;
2240 context->free = nonpaging_free;
2241 context->prefetch_page = nonpaging_prefetch_page;
2242 context->sync_page = nonpaging_sync_page;
2243 context->invlpg = nonpaging_invlpg;
2244 context->root_level = 0;
2245 context->shadow_root_level = PT32E_ROOT_LEVEL;
2246 context->root_hpa = INVALID_PAGE;
2247 return 0;
2248 }
2249
2250 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2251 {
2252 ++vcpu->stat.tlb_flush;
2253 kvm_x86_ops->tlb_flush(vcpu);
2254 }
2255
2256 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2257 {
2258 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2259 mmu_free_roots(vcpu);
2260 }
2261
2262 static void inject_page_fault(struct kvm_vcpu *vcpu,
2263 u64 addr,
2264 u32 err_code)
2265 {
2266 kvm_inject_page_fault(vcpu, addr, err_code);
2267 }
2268
2269 static void paging_free(struct kvm_vcpu *vcpu)
2270 {
2271 nonpaging_free(vcpu);
2272 }
2273
2274 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2275 {
2276 int bit7;
2277
2278 bit7 = (gpte >> 7) & 1;
2279 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2280 }
2281
2282 #define PTTYPE 64
2283 #include "paging_tmpl.h"
2284 #undef PTTYPE
2285
2286 #define PTTYPE 32
2287 #include "paging_tmpl.h"
2288 #undef PTTYPE
2289
2290 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2291 {
2292 struct kvm_mmu *context = &vcpu->arch.mmu;
2293 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2294 u64 exb_bit_rsvd = 0;
2295
2296 if (!is_nx(vcpu))
2297 exb_bit_rsvd = rsvd_bits(63, 63);
2298 switch (level) {
2299 case PT32_ROOT_LEVEL:
2300 /* no rsvd bits for 2 level 4K page table entries */
2301 context->rsvd_bits_mask[0][1] = 0;
2302 context->rsvd_bits_mask[0][0] = 0;
2303 if (is_cpuid_PSE36())
2304 /* 36bits PSE 4MB page */
2305 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2306 else
2307 /* 32 bits PSE 4MB page */
2308 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2309 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2310 break;
2311 case PT32E_ROOT_LEVEL:
2312 context->rsvd_bits_mask[0][2] =
2313 rsvd_bits(maxphyaddr, 63) |
2314 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2315 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2316 rsvd_bits(maxphyaddr, 62); /* PDE */
2317 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2318 rsvd_bits(maxphyaddr, 62); /* PTE */
2319 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2320 rsvd_bits(maxphyaddr, 62) |
2321 rsvd_bits(13, 20); /* large page */
2322 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2323 break;
2324 case PT64_ROOT_LEVEL:
2325 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2326 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2327 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2328 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2329 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2330 rsvd_bits(maxphyaddr, 51);
2331 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2332 rsvd_bits(maxphyaddr, 51);
2333 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2334 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2335 rsvd_bits(maxphyaddr, 51) |
2336 rsvd_bits(13, 29);
2337 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2338 rsvd_bits(maxphyaddr, 51) |
2339 rsvd_bits(13, 20); /* large page */
2340 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2341 break;
2342 }
2343 }
2344
2345 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2346 {
2347 struct kvm_mmu *context = &vcpu->arch.mmu;
2348
2349 ASSERT(is_pae(vcpu));
2350 context->new_cr3 = paging_new_cr3;
2351 context->page_fault = paging64_page_fault;
2352 context->gva_to_gpa = paging64_gva_to_gpa;
2353 context->prefetch_page = paging64_prefetch_page;
2354 context->sync_page = paging64_sync_page;
2355 context->invlpg = paging64_invlpg;
2356 context->free = paging_free;
2357 context->root_level = level;
2358 context->shadow_root_level = level;
2359 context->root_hpa = INVALID_PAGE;
2360 return 0;
2361 }
2362
2363 static int paging64_init_context(struct kvm_vcpu *vcpu)
2364 {
2365 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2366 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2367 }
2368
2369 static int paging32_init_context(struct kvm_vcpu *vcpu)
2370 {
2371 struct kvm_mmu *context = &vcpu->arch.mmu;
2372
2373 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2374 context->new_cr3 = paging_new_cr3;
2375 context->page_fault = paging32_page_fault;
2376 context->gva_to_gpa = paging32_gva_to_gpa;
2377 context->free = paging_free;
2378 context->prefetch_page = paging32_prefetch_page;
2379 context->sync_page = paging32_sync_page;
2380 context->invlpg = paging32_invlpg;
2381 context->root_level = PT32_ROOT_LEVEL;
2382 context->shadow_root_level = PT32E_ROOT_LEVEL;
2383 context->root_hpa = INVALID_PAGE;
2384 return 0;
2385 }
2386
2387 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2388 {
2389 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2390 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2391 }
2392
2393 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2394 {
2395 struct kvm_mmu *context = &vcpu->arch.mmu;
2396
2397 context->new_cr3 = nonpaging_new_cr3;
2398 context->page_fault = tdp_page_fault;
2399 context->free = nonpaging_free;
2400 context->prefetch_page = nonpaging_prefetch_page;
2401 context->sync_page = nonpaging_sync_page;
2402 context->invlpg = nonpaging_invlpg;
2403 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2404 context->root_hpa = INVALID_PAGE;
2405
2406 if (!is_paging(vcpu)) {
2407 context->gva_to_gpa = nonpaging_gva_to_gpa;
2408 context->root_level = 0;
2409 } else if (is_long_mode(vcpu)) {
2410 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2411 context->gva_to_gpa = paging64_gva_to_gpa;
2412 context->root_level = PT64_ROOT_LEVEL;
2413 } else if (is_pae(vcpu)) {
2414 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2415 context->gva_to_gpa = paging64_gva_to_gpa;
2416 context->root_level = PT32E_ROOT_LEVEL;
2417 } else {
2418 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2419 context->gva_to_gpa = paging32_gva_to_gpa;
2420 context->root_level = PT32_ROOT_LEVEL;
2421 }
2422
2423 return 0;
2424 }
2425
2426 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2427 {
2428 int r;
2429
2430 ASSERT(vcpu);
2431 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2432
2433 if (!is_paging(vcpu))
2434 r = nonpaging_init_context(vcpu);
2435 else if (is_long_mode(vcpu))
2436 r = paging64_init_context(vcpu);
2437 else if (is_pae(vcpu))
2438 r = paging32E_init_context(vcpu);
2439 else
2440 r = paging32_init_context(vcpu);
2441
2442 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2443
2444 return r;
2445 }
2446
2447 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2448 {
2449 vcpu->arch.update_pte.pfn = bad_pfn;
2450
2451 if (tdp_enabled)
2452 return init_kvm_tdp_mmu(vcpu);
2453 else
2454 return init_kvm_softmmu(vcpu);
2455 }
2456
2457 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2458 {
2459 ASSERT(vcpu);
2460 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2461 vcpu->arch.mmu.free(vcpu);
2462 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2463 }
2464 }
2465
2466 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2467 {
2468 destroy_kvm_mmu(vcpu);
2469 return init_kvm_mmu(vcpu);
2470 }
2471 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2472
2473 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2474 {
2475 int r;
2476
2477 r = mmu_topup_memory_caches(vcpu);
2478 if (r)
2479 goto out;
2480 spin_lock(&vcpu->kvm->mmu_lock);
2481 kvm_mmu_free_some_pages(vcpu);
2482 r = mmu_alloc_roots(vcpu);
2483 mmu_sync_roots(vcpu);
2484 spin_unlock(&vcpu->kvm->mmu_lock);
2485 if (r)
2486 goto out;
2487 /* set_cr3() should ensure TLB has been flushed */
2488 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2489 out:
2490 return r;
2491 }
2492 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2493
2494 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2495 {
2496 mmu_free_roots(vcpu);
2497 }
2498
2499 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2500 struct kvm_mmu_page *sp,
2501 u64 *spte)
2502 {
2503 u64 pte;
2504 struct kvm_mmu_page *child;
2505
2506 pte = *spte;
2507 if (is_shadow_present_pte(pte)) {
2508 if (is_last_spte(pte, sp->role.level))
2509 rmap_remove(vcpu->kvm, spte);
2510 else {
2511 child = page_header(pte & PT64_BASE_ADDR_MASK);
2512 mmu_page_remove_parent_pte(child, spte);
2513 }
2514 }
2515 __set_spte(spte, shadow_trap_nonpresent_pte);
2516 if (is_large_pte(pte))
2517 --vcpu->kvm->stat.lpages;
2518 }
2519
2520 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2521 struct kvm_mmu_page *sp,
2522 u64 *spte,
2523 const void *new)
2524 {
2525 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2526 ++vcpu->kvm->stat.mmu_pde_zapped;
2527 return;
2528 }
2529
2530 ++vcpu->kvm->stat.mmu_pte_updated;
2531 if (sp->role.glevels == PT32_ROOT_LEVEL)
2532 paging32_update_pte(vcpu, sp, spte, new);
2533 else
2534 paging64_update_pte(vcpu, sp, spte, new);
2535 }
2536
2537 static bool need_remote_flush(u64 old, u64 new)
2538 {
2539 if (!is_shadow_present_pte(old))
2540 return false;
2541 if (!is_shadow_present_pte(new))
2542 return true;
2543 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2544 return true;
2545 old ^= PT64_NX_MASK;
2546 new ^= PT64_NX_MASK;
2547 return (old & ~new & PT64_PERM_MASK) != 0;
2548 }
2549
2550 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2551 {
2552 if (need_remote_flush(old, new))
2553 kvm_flush_remote_tlbs(vcpu->kvm);
2554 else
2555 kvm_mmu_flush_tlb(vcpu);
2556 }
2557
2558 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2559 {
2560 u64 *spte = vcpu->arch.last_pte_updated;
2561
2562 return !!(spte && (*spte & shadow_accessed_mask));
2563 }
2564
2565 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2566 const u8 *new, int bytes)
2567 {
2568 gfn_t gfn;
2569 int r;
2570 u64 gpte = 0;
2571 pfn_t pfn;
2572
2573 if (bytes != 4 && bytes != 8)
2574 return;
2575
2576 /*
2577 * Assume that the pte write on a page table of the same type
2578 * as the current vcpu paging mode. This is nearly always true
2579 * (might be false while changing modes). Note it is verified later
2580 * by update_pte().
2581 */
2582 if (is_pae(vcpu)) {
2583 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2584 if ((bytes == 4) && (gpa % 4 == 0)) {
2585 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2586 if (r)
2587 return;
2588 memcpy((void *)&gpte + (gpa % 8), new, 4);
2589 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2590 memcpy((void *)&gpte, new, 8);
2591 }
2592 } else {
2593 if ((bytes == 4) && (gpa % 4 == 0))
2594 memcpy((void *)&gpte, new, 4);
2595 }
2596 if (!is_present_gpte(gpte))
2597 return;
2598 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2599
2600 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2601 smp_rmb();
2602 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2603
2604 if (is_error_pfn(pfn)) {
2605 kvm_release_pfn_clean(pfn);
2606 return;
2607 }
2608 vcpu->arch.update_pte.gfn = gfn;
2609 vcpu->arch.update_pte.pfn = pfn;
2610 }
2611
2612 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2613 {
2614 u64 *spte = vcpu->arch.last_pte_updated;
2615
2616 if (spte
2617 && vcpu->arch.last_pte_gfn == gfn
2618 && shadow_accessed_mask
2619 && !(*spte & shadow_accessed_mask)
2620 && is_shadow_present_pte(*spte))
2621 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2622 }
2623
2624 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2625 const u8 *new, int bytes,
2626 bool guest_initiated)
2627 {
2628 gfn_t gfn = gpa >> PAGE_SHIFT;
2629 struct kvm_mmu_page *sp;
2630 struct hlist_node *node, *n;
2631 struct hlist_head *bucket;
2632 unsigned index;
2633 u64 entry, gentry;
2634 u64 *spte;
2635 unsigned offset = offset_in_page(gpa);
2636 unsigned pte_size;
2637 unsigned page_offset;
2638 unsigned misaligned;
2639 unsigned quadrant;
2640 int level;
2641 int flooded = 0;
2642 int npte;
2643 int r;
2644
2645 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2646 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
2647 spin_lock(&vcpu->kvm->mmu_lock);
2648 kvm_mmu_access_page(vcpu, gfn);
2649 kvm_mmu_free_some_pages(vcpu);
2650 ++vcpu->kvm->stat.mmu_pte_write;
2651 kvm_mmu_audit(vcpu, "pre pte write");
2652 if (guest_initiated) {
2653 if (gfn == vcpu->arch.last_pt_write_gfn
2654 && !last_updated_pte_accessed(vcpu)) {
2655 ++vcpu->arch.last_pt_write_count;
2656 if (vcpu->arch.last_pt_write_count >= 3)
2657 flooded = 1;
2658 } else {
2659 vcpu->arch.last_pt_write_gfn = gfn;
2660 vcpu->arch.last_pt_write_count = 1;
2661 vcpu->arch.last_pte_updated = NULL;
2662 }
2663 }
2664 index = kvm_page_table_hashfn(gfn);
2665 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2666 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2667 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2668 continue;
2669 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2670 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2671 misaligned |= bytes < 4;
2672 if (misaligned || flooded) {
2673 /*
2674 * Misaligned accesses are too much trouble to fix
2675 * up; also, they usually indicate a page is not used
2676 * as a page table.
2677 *
2678 * If we're seeing too many writes to a page,
2679 * it may no longer be a page table, or we may be
2680 * forking, in which case it is better to unmap the
2681 * page.
2682 */
2683 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2684 gpa, bytes, sp->role.word);
2685 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2686 n = bucket->first;
2687 ++vcpu->kvm->stat.mmu_flooded;
2688 continue;
2689 }
2690 page_offset = offset;
2691 level = sp->role.level;
2692 npte = 1;
2693 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2694 page_offset <<= 1; /* 32->64 */
2695 /*
2696 * A 32-bit pde maps 4MB while the shadow pdes map
2697 * only 2MB. So we need to double the offset again
2698 * and zap two pdes instead of one.
2699 */
2700 if (level == PT32_ROOT_LEVEL) {
2701 page_offset &= ~7; /* kill rounding error */
2702 page_offset <<= 1;
2703 npte = 2;
2704 }
2705 quadrant = page_offset >> PAGE_SHIFT;
2706 page_offset &= ~PAGE_MASK;
2707 if (quadrant != sp->role.quadrant)
2708 continue;
2709 }
2710 spte = &sp->spt[page_offset / sizeof(*spte)];
2711 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2712 gentry = 0;
2713 r = kvm_read_guest_atomic(vcpu->kvm,
2714 gpa & ~(u64)(pte_size - 1),
2715 &gentry, pte_size);
2716 new = (const void *)&gentry;
2717 if (r < 0)
2718 new = NULL;
2719 }
2720 while (npte--) {
2721 entry = *spte;
2722 mmu_pte_write_zap_pte(vcpu, sp, spte);
2723 if (new)
2724 mmu_pte_write_new_pte(vcpu, sp, spte, new);
2725 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2726 ++spte;
2727 }
2728 }
2729 kvm_mmu_audit(vcpu, "post pte write");
2730 spin_unlock(&vcpu->kvm->mmu_lock);
2731 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2732 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2733 vcpu->arch.update_pte.pfn = bad_pfn;
2734 }
2735 }
2736
2737 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2738 {
2739 gpa_t gpa;
2740 int r;
2741
2742 if (tdp_enabled)
2743 return 0;
2744
2745 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
2746
2747 spin_lock(&vcpu->kvm->mmu_lock);
2748 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2749 spin_unlock(&vcpu->kvm->mmu_lock);
2750 return r;
2751 }
2752 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2753
2754 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2755 {
2756 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2757 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2758 struct kvm_mmu_page *sp;
2759
2760 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2761 struct kvm_mmu_page, link);
2762 kvm_mmu_zap_page(vcpu->kvm, sp);
2763 ++vcpu->kvm->stat.mmu_recycled;
2764 }
2765 }
2766
2767 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2768 {
2769 int r;
2770 enum emulation_result er;
2771
2772 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2773 if (r < 0)
2774 goto out;
2775
2776 if (!r) {
2777 r = 1;
2778 goto out;
2779 }
2780
2781 r = mmu_topup_memory_caches(vcpu);
2782 if (r)
2783 goto out;
2784
2785 er = emulate_instruction(vcpu, cr2, error_code, 0);
2786
2787 switch (er) {
2788 case EMULATE_DONE:
2789 return 1;
2790 case EMULATE_DO_MMIO:
2791 ++vcpu->stat.mmio_exits;
2792 return 0;
2793 case EMULATE_FAIL:
2794 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2795 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2796 vcpu->run->internal.ndata = 0;
2797 return 0;
2798 default:
2799 BUG();
2800 }
2801 out:
2802 return r;
2803 }
2804 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2805
2806 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2807 {
2808 vcpu->arch.mmu.invlpg(vcpu, gva);
2809 kvm_mmu_flush_tlb(vcpu);
2810 ++vcpu->stat.invlpg;
2811 }
2812 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2813
2814 void kvm_enable_tdp(void)
2815 {
2816 tdp_enabled = true;
2817 }
2818 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2819
2820 void kvm_disable_tdp(void)
2821 {
2822 tdp_enabled = false;
2823 }
2824 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2825
2826 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2827 {
2828 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2829 }
2830
2831 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2832 {
2833 struct page *page;
2834 int i;
2835
2836 ASSERT(vcpu);
2837
2838 /*
2839 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2840 * Therefore we need to allocate shadow page tables in the first
2841 * 4GB of memory, which happens to fit the DMA32 zone.
2842 */
2843 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2844 if (!page)
2845 goto error_1;
2846 vcpu->arch.mmu.pae_root = page_address(page);
2847 for (i = 0; i < 4; ++i)
2848 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2849
2850 return 0;
2851
2852 error_1:
2853 free_mmu_pages(vcpu);
2854 return -ENOMEM;
2855 }
2856
2857 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2858 {
2859 ASSERT(vcpu);
2860 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2861
2862 return alloc_mmu_pages(vcpu);
2863 }
2864
2865 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2866 {
2867 ASSERT(vcpu);
2868 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2869
2870 return init_kvm_mmu(vcpu);
2871 }
2872
2873 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2874 {
2875 ASSERT(vcpu);
2876
2877 destroy_kvm_mmu(vcpu);
2878 free_mmu_pages(vcpu);
2879 mmu_free_memory_caches(vcpu);
2880 }
2881
2882 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2883 {
2884 struct kvm_mmu_page *sp;
2885
2886 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2887 int i;
2888 u64 *pt;
2889
2890 if (!test_bit(slot, sp->slot_bitmap))
2891 continue;
2892
2893 pt = sp->spt;
2894 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2895 /* avoid RMW */
2896 if (pt[i] & PT_WRITABLE_MASK)
2897 pt[i] &= ~PT_WRITABLE_MASK;
2898 }
2899 kvm_flush_remote_tlbs(kvm);
2900 }
2901
2902 void kvm_mmu_zap_all(struct kvm *kvm)
2903 {
2904 struct kvm_mmu_page *sp, *node;
2905
2906 spin_lock(&kvm->mmu_lock);
2907 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2908 if (kvm_mmu_zap_page(kvm, sp))
2909 node = container_of(kvm->arch.active_mmu_pages.next,
2910 struct kvm_mmu_page, link);
2911 spin_unlock(&kvm->mmu_lock);
2912
2913 kvm_flush_remote_tlbs(kvm);
2914 }
2915
2916 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2917 {
2918 struct kvm_mmu_page *page;
2919
2920 page = container_of(kvm->arch.active_mmu_pages.prev,
2921 struct kvm_mmu_page, link);
2922 kvm_mmu_zap_page(kvm, page);
2923 }
2924
2925 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2926 {
2927 struct kvm *kvm;
2928 struct kvm *kvm_freed = NULL;
2929 int cache_count = 0;
2930
2931 spin_lock(&kvm_lock);
2932
2933 list_for_each_entry(kvm, &vm_list, vm_list) {
2934 int npages, idx;
2935
2936 idx = srcu_read_lock(&kvm->srcu);
2937 spin_lock(&kvm->mmu_lock);
2938 npages = kvm->arch.n_alloc_mmu_pages -
2939 kvm->arch.n_free_mmu_pages;
2940 cache_count += npages;
2941 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2942 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2943 cache_count--;
2944 kvm_freed = kvm;
2945 }
2946 nr_to_scan--;
2947
2948 spin_unlock(&kvm->mmu_lock);
2949 srcu_read_unlock(&kvm->srcu, idx);
2950 }
2951 if (kvm_freed)
2952 list_move_tail(&kvm_freed->vm_list, &vm_list);
2953
2954 spin_unlock(&kvm_lock);
2955
2956 return cache_count;
2957 }
2958
2959 static struct shrinker mmu_shrinker = {
2960 .shrink = mmu_shrink,
2961 .seeks = DEFAULT_SEEKS * 10,
2962 };
2963
2964 static void mmu_destroy_caches(void)
2965 {
2966 if (pte_chain_cache)
2967 kmem_cache_destroy(pte_chain_cache);
2968 if (rmap_desc_cache)
2969 kmem_cache_destroy(rmap_desc_cache);
2970 if (mmu_page_header_cache)
2971 kmem_cache_destroy(mmu_page_header_cache);
2972 }
2973
2974 void kvm_mmu_module_exit(void)
2975 {
2976 mmu_destroy_caches();
2977 unregister_shrinker(&mmu_shrinker);
2978 }
2979
2980 int kvm_mmu_module_init(void)
2981 {
2982 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2983 sizeof(struct kvm_pte_chain),
2984 0, 0, NULL);
2985 if (!pte_chain_cache)
2986 goto nomem;
2987 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2988 sizeof(struct kvm_rmap_desc),
2989 0, 0, NULL);
2990 if (!rmap_desc_cache)
2991 goto nomem;
2992
2993 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2994 sizeof(struct kvm_mmu_page),
2995 0, 0, NULL);
2996 if (!mmu_page_header_cache)
2997 goto nomem;
2998
2999 register_shrinker(&mmu_shrinker);
3000
3001 return 0;
3002
3003 nomem:
3004 mmu_destroy_caches();
3005 return -ENOMEM;
3006 }
3007
3008 /*
3009 * Caculate mmu pages needed for kvm.
3010 */
3011 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3012 {
3013 int i;
3014 unsigned int nr_mmu_pages;
3015 unsigned int nr_pages = 0;
3016 struct kvm_memslots *slots;
3017
3018 slots = rcu_dereference(kvm->memslots);
3019 for (i = 0; i < slots->nmemslots; i++)
3020 nr_pages += slots->memslots[i].npages;
3021
3022 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3023 nr_mmu_pages = max(nr_mmu_pages,
3024 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3025
3026 return nr_mmu_pages;
3027 }
3028
3029 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3030 unsigned len)
3031 {
3032 if (len > buffer->len)
3033 return NULL;
3034 return buffer->ptr;
3035 }
3036
3037 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3038 unsigned len)
3039 {
3040 void *ret;
3041
3042 ret = pv_mmu_peek_buffer(buffer, len);
3043 if (!ret)
3044 return ret;
3045 buffer->ptr += len;
3046 buffer->len -= len;
3047 buffer->processed += len;
3048 return ret;
3049 }
3050
3051 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3052 gpa_t addr, gpa_t value)
3053 {
3054 int bytes = 8;
3055 int r;
3056
3057 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3058 bytes = 4;
3059
3060 r = mmu_topup_memory_caches(vcpu);
3061 if (r)
3062 return r;
3063
3064 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3065 return -EFAULT;
3066
3067 return 1;
3068 }
3069
3070 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3071 {
3072 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3073 return 1;
3074 }
3075
3076 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3077 {
3078 spin_lock(&vcpu->kvm->mmu_lock);
3079 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3080 spin_unlock(&vcpu->kvm->mmu_lock);
3081 return 1;
3082 }
3083
3084 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3085 struct kvm_pv_mmu_op_buffer *buffer)
3086 {
3087 struct kvm_mmu_op_header *header;
3088
3089 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3090 if (!header)
3091 return 0;
3092 switch (header->op) {
3093 case KVM_MMU_OP_WRITE_PTE: {
3094 struct kvm_mmu_op_write_pte *wpte;
3095
3096 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3097 if (!wpte)
3098 return 0;
3099 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3100 wpte->pte_val);
3101 }
3102 case KVM_MMU_OP_FLUSH_TLB: {
3103 struct kvm_mmu_op_flush_tlb *ftlb;
3104
3105 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3106 if (!ftlb)
3107 return 0;
3108 return kvm_pv_mmu_flush_tlb(vcpu);
3109 }
3110 case KVM_MMU_OP_RELEASE_PT: {
3111 struct kvm_mmu_op_release_pt *rpt;
3112
3113 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3114 if (!rpt)
3115 return 0;
3116 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3117 }
3118 default: return 0;
3119 }
3120 }
3121
3122 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3123 gpa_t addr, unsigned long *ret)
3124 {
3125 int r;
3126 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3127
3128 buffer->ptr = buffer->buf;
3129 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3130 buffer->processed = 0;
3131
3132 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3133 if (r)
3134 goto out;
3135
3136 while (buffer->len) {
3137 r = kvm_pv_mmu_op_one(vcpu, buffer);
3138 if (r < 0)
3139 goto out;
3140 if (r == 0)
3141 break;
3142 }
3143
3144 r = 1;
3145 out:
3146 *ret = buffer->processed;
3147 return r;
3148 }
3149
3150 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3151 {
3152 struct kvm_shadow_walk_iterator iterator;
3153 int nr_sptes = 0;
3154
3155 spin_lock(&vcpu->kvm->mmu_lock);
3156 for_each_shadow_entry(vcpu, addr, iterator) {
3157 sptes[iterator.level-1] = *iterator.sptep;
3158 nr_sptes++;
3159 if (!is_shadow_present_pte(*iterator.sptep))
3160 break;
3161 }
3162 spin_unlock(&vcpu->kvm->mmu_lock);
3163
3164 return nr_sptes;
3165 }
3166 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3167
3168 #ifdef AUDIT
3169
3170 static const char *audit_msg;
3171
3172 static gva_t canonicalize(gva_t gva)
3173 {
3174 #ifdef CONFIG_X86_64
3175 gva = (long long)(gva << 16) >> 16;
3176 #endif
3177 return gva;
3178 }
3179
3180
3181 typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
3182 u64 *sptep);
3183
3184 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3185 inspect_spte_fn fn)
3186 {
3187 int i;
3188
3189 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3190 u64 ent = sp->spt[i];
3191
3192 if (is_shadow_present_pte(ent)) {
3193 if (!is_last_spte(ent, sp->role.level)) {
3194 struct kvm_mmu_page *child;
3195 child = page_header(ent & PT64_BASE_ADDR_MASK);
3196 __mmu_spte_walk(kvm, child, fn);
3197 } else
3198 fn(kvm, sp, &sp->spt[i]);
3199 }
3200 }
3201 }
3202
3203 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3204 {
3205 int i;
3206 struct kvm_mmu_page *sp;
3207
3208 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3209 return;
3210 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3211 hpa_t root = vcpu->arch.mmu.root_hpa;
3212 sp = page_header(root);
3213 __mmu_spte_walk(vcpu->kvm, sp, fn);
3214 return;
3215 }
3216 for (i = 0; i < 4; ++i) {
3217 hpa_t root = vcpu->arch.mmu.pae_root[i];
3218
3219 if (root && VALID_PAGE(root)) {
3220 root &= PT64_BASE_ADDR_MASK;
3221 sp = page_header(root);
3222 __mmu_spte_walk(vcpu->kvm, sp, fn);
3223 }
3224 }
3225 return;
3226 }
3227
3228 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3229 gva_t va, int level)
3230 {
3231 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3232 int i;
3233 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3234
3235 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3236 u64 ent = pt[i];
3237
3238 if (ent == shadow_trap_nonpresent_pte)
3239 continue;
3240
3241 va = canonicalize(va);
3242 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3243 audit_mappings_page(vcpu, ent, va, level - 1);
3244 else {
3245 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
3246 gfn_t gfn = gpa >> PAGE_SHIFT;
3247 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3248 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3249
3250 if (is_error_pfn(pfn)) {
3251 kvm_release_pfn_clean(pfn);
3252 continue;
3253 }
3254
3255 if (is_shadow_present_pte(ent)
3256 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3257 printk(KERN_ERR "xx audit error: (%s) levels %d"
3258 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3259 audit_msg, vcpu->arch.mmu.root_level,
3260 va, gpa, hpa, ent,
3261 is_shadow_present_pte(ent));
3262 else if (ent == shadow_notrap_nonpresent_pte
3263 && !is_error_hpa(hpa))
3264 printk(KERN_ERR "audit: (%s) notrap shadow,"
3265 " valid guest gva %lx\n", audit_msg, va);
3266 kvm_release_pfn_clean(pfn);
3267
3268 }
3269 }
3270 }
3271
3272 static void audit_mappings(struct kvm_vcpu *vcpu)
3273 {
3274 unsigned i;
3275
3276 if (vcpu->arch.mmu.root_level == 4)
3277 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3278 else
3279 for (i = 0; i < 4; ++i)
3280 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3281 audit_mappings_page(vcpu,
3282 vcpu->arch.mmu.pae_root[i],
3283 i << 30,
3284 2);
3285 }
3286
3287 static int count_rmaps(struct kvm_vcpu *vcpu)
3288 {
3289 int nmaps = 0;
3290 int i, j, k, idx;
3291
3292 idx = srcu_read_lock(&kvm->srcu);
3293 slots = rcu_dereference(kvm->memslots);
3294 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3295 struct kvm_memory_slot *m = &slots->memslots[i];
3296 struct kvm_rmap_desc *d;
3297
3298 for (j = 0; j < m->npages; ++j) {
3299 unsigned long *rmapp = &m->rmap[j];
3300
3301 if (!*rmapp)
3302 continue;
3303 if (!(*rmapp & 1)) {
3304 ++nmaps;
3305 continue;
3306 }
3307 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3308 while (d) {
3309 for (k = 0; k < RMAP_EXT; ++k)
3310 if (d->sptes[k])
3311 ++nmaps;
3312 else
3313 break;
3314 d = d->more;
3315 }
3316 }
3317 }
3318 srcu_read_unlock(&kvm->srcu, idx);
3319 return nmaps;
3320 }
3321
3322 void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
3323 {
3324 unsigned long *rmapp;
3325 struct kvm_mmu_page *rev_sp;
3326 gfn_t gfn;
3327
3328 if (*sptep & PT_WRITABLE_MASK) {
3329 rev_sp = page_header(__pa(sptep));
3330 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3331
3332 if (!gfn_to_memslot(kvm, gfn)) {
3333 if (!printk_ratelimit())
3334 return;
3335 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3336 audit_msg, gfn);
3337 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3338 audit_msg, sptep - rev_sp->spt,
3339 rev_sp->gfn);
3340 dump_stack();
3341 return;
3342 }
3343
3344 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3345 is_large_pte(*sptep));
3346 if (!*rmapp) {
3347 if (!printk_ratelimit())
3348 return;
3349 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3350 audit_msg, *sptep);
3351 dump_stack();
3352 }
3353 }
3354
3355 }
3356
3357 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3358 {
3359 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3360 }
3361
3362 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3363 {
3364 struct kvm_mmu_page *sp;
3365 int i;
3366
3367 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3368 u64 *pt = sp->spt;
3369
3370 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3371 continue;
3372
3373 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3374 u64 ent = pt[i];
3375
3376 if (!(ent & PT_PRESENT_MASK))
3377 continue;
3378 if (!(ent & PT_WRITABLE_MASK))
3379 continue;
3380 inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
3381 }
3382 }
3383 return;
3384 }
3385
3386 static void audit_rmap(struct kvm_vcpu *vcpu)
3387 {
3388 check_writable_mappings_rmap(vcpu);
3389 count_rmaps(vcpu);
3390 }
3391
3392 static void audit_write_protection(struct kvm_vcpu *vcpu)
3393 {
3394 struct kvm_mmu_page *sp;
3395 struct kvm_memory_slot *slot;
3396 unsigned long *rmapp;
3397 u64 *spte;
3398 gfn_t gfn;
3399
3400 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3401 if (sp->role.direct)
3402 continue;
3403 if (sp->unsync)
3404 continue;
3405
3406 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3407 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3408 rmapp = &slot->rmap[gfn - slot->base_gfn];
3409
3410 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3411 while (spte) {
3412 if (*spte & PT_WRITABLE_MASK)
3413 printk(KERN_ERR "%s: (%s) shadow page has "
3414 "writable mappings: gfn %lx role %x\n",
3415 __func__, audit_msg, sp->gfn,
3416 sp->role.word);
3417 spte = rmap_next(vcpu->kvm, rmapp, spte);
3418 }
3419 }
3420 }
3421
3422 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3423 {
3424 int olddbg = dbg;
3425
3426 dbg = 0;
3427 audit_msg = msg;
3428 audit_rmap(vcpu);
3429 audit_write_protection(vcpu);
3430 if (strcmp("pre pte write", audit_msg) != 0)
3431 audit_mappings(vcpu);
3432 audit_writable_sptes_have_rmaps(vcpu);
3433 dbg = olddbg;
3434 }
3435
3436 #endif
Linux kernel - Deliverables
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