KVM: MMU: collapse remote TLB flushes on root sync
[deliverable/linux.git] / arch / x86 / kvm / mmu.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
19
20 #include "mmu.h"
21
22 #include <linux/kvm_host.h>
23 #include <linux/types.h>
24 #include <linux/string.h>
25 #include <linux/mm.h>
26 #include <linux/highmem.h>
27 #include <linux/module.h>
28 #include <linux/swap.h>
29 #include <linux/hugetlb.h>
30 #include <linux/compiler.h>
31
32 #include <asm/page.h>
33 #include <asm/cmpxchg.h>
34 #include <asm/io.h>
35 #include <asm/vmx.h>
36
37 /*
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
43 */
44 bool tdp_enabled = false;
45
46 #undef MMU_DEBUG
47
48 #undef AUDIT
49
50 #ifdef AUDIT
51 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
52 #else
53 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
54 #endif
55
56 #ifdef MMU_DEBUG
57
58 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
60
61 #else
62
63 #define pgprintk(x...) do { } while (0)
64 #define rmap_printk(x...) do { } while (0)
65
66 #endif
67
68 #if defined(MMU_DEBUG) || defined(AUDIT)
69 static int dbg = 0;
70 module_param(dbg, bool, 0644);
71 #endif
72
73 static int oos_shadow = 1;
74 module_param(oos_shadow, bool, 0644);
75
76 #ifndef MMU_DEBUG
77 #define ASSERT(x) do { } while (0)
78 #else
79 #define ASSERT(x) \
80 if (!(x)) { \
81 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
82 __FILE__, __LINE__, #x); \
83 }
84 #endif
85
86 #define PT_FIRST_AVAIL_BITS_SHIFT 9
87 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
88
89 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
90
91 #define PT64_LEVEL_BITS 9
92
93 #define PT64_LEVEL_SHIFT(level) \
94 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
95
96 #define PT64_LEVEL_MASK(level) \
97 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
98
99 #define PT64_INDEX(address, level)\
100 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
101
102
103 #define PT32_LEVEL_BITS 10
104
105 #define PT32_LEVEL_SHIFT(level) \
106 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
107
108 #define PT32_LEVEL_MASK(level) \
109 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
110
111 #define PT32_INDEX(address, level)\
112 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
113
114
115 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
116 #define PT64_DIR_BASE_ADDR_MASK \
117 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
118
119 #define PT32_BASE_ADDR_MASK PAGE_MASK
120 #define PT32_DIR_BASE_ADDR_MASK \
121 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
122
123 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
124 | PT64_NX_MASK)
125
126 #define PFERR_PRESENT_MASK (1U << 0)
127 #define PFERR_WRITE_MASK (1U << 1)
128 #define PFERR_USER_MASK (1U << 2)
129 #define PFERR_FETCH_MASK (1U << 4)
130
131 #define PT_DIRECTORY_LEVEL 2
132 #define PT_PAGE_TABLE_LEVEL 1
133
134 #define RMAP_EXT 4
135
136 #define ACC_EXEC_MASK 1
137 #define ACC_WRITE_MASK PT_WRITABLE_MASK
138 #define ACC_USER_MASK PT_USER_MASK
139 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
140
141 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
142
143 struct kvm_rmap_desc {
144 u64 *shadow_ptes[RMAP_EXT];
145 struct kvm_rmap_desc *more;
146 };
147
148 struct kvm_shadow_walk {
149 int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu,
150 u64 addr, u64 *spte, int level);
151 };
152
153 struct kvm_unsync_walk {
154 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
155 };
156
157 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
158
159 static struct kmem_cache *pte_chain_cache;
160 static struct kmem_cache *rmap_desc_cache;
161 static struct kmem_cache *mmu_page_header_cache;
162
163 static u64 __read_mostly shadow_trap_nonpresent_pte;
164 static u64 __read_mostly shadow_notrap_nonpresent_pte;
165 static u64 __read_mostly shadow_base_present_pte;
166 static u64 __read_mostly shadow_nx_mask;
167 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
168 static u64 __read_mostly shadow_user_mask;
169 static u64 __read_mostly shadow_accessed_mask;
170 static u64 __read_mostly shadow_dirty_mask;
171 static u64 __read_mostly shadow_mt_mask;
172
173 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
174 {
175 shadow_trap_nonpresent_pte = trap_pte;
176 shadow_notrap_nonpresent_pte = notrap_pte;
177 }
178 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
179
180 void kvm_mmu_set_base_ptes(u64 base_pte)
181 {
182 shadow_base_present_pte = base_pte;
183 }
184 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
185
186 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
187 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask)
188 {
189 shadow_user_mask = user_mask;
190 shadow_accessed_mask = accessed_mask;
191 shadow_dirty_mask = dirty_mask;
192 shadow_nx_mask = nx_mask;
193 shadow_x_mask = x_mask;
194 shadow_mt_mask = mt_mask;
195 }
196 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
197
198 static int is_write_protection(struct kvm_vcpu *vcpu)
199 {
200 return vcpu->arch.cr0 & X86_CR0_WP;
201 }
202
203 static int is_cpuid_PSE36(void)
204 {
205 return 1;
206 }
207
208 static int is_nx(struct kvm_vcpu *vcpu)
209 {
210 return vcpu->arch.shadow_efer & EFER_NX;
211 }
212
213 static int is_present_pte(unsigned long pte)
214 {
215 return pte & PT_PRESENT_MASK;
216 }
217
218 static int is_shadow_present_pte(u64 pte)
219 {
220 return pte != shadow_trap_nonpresent_pte
221 && pte != shadow_notrap_nonpresent_pte;
222 }
223
224 static int is_large_pte(u64 pte)
225 {
226 return pte & PT_PAGE_SIZE_MASK;
227 }
228
229 static int is_writeble_pte(unsigned long pte)
230 {
231 return pte & PT_WRITABLE_MASK;
232 }
233
234 static int is_dirty_pte(unsigned long pte)
235 {
236 return pte & shadow_dirty_mask;
237 }
238
239 static int is_rmap_pte(u64 pte)
240 {
241 return is_shadow_present_pte(pte);
242 }
243
244 static pfn_t spte_to_pfn(u64 pte)
245 {
246 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
247 }
248
249 static gfn_t pse36_gfn_delta(u32 gpte)
250 {
251 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
252
253 return (gpte & PT32_DIR_PSE36_MASK) << shift;
254 }
255
256 static void set_shadow_pte(u64 *sptep, u64 spte)
257 {
258 #ifdef CONFIG_X86_64
259 set_64bit((unsigned long *)sptep, spte);
260 #else
261 set_64bit((unsigned long long *)sptep, spte);
262 #endif
263 }
264
265 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
266 struct kmem_cache *base_cache, int min)
267 {
268 void *obj;
269
270 if (cache->nobjs >= min)
271 return 0;
272 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
273 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
274 if (!obj)
275 return -ENOMEM;
276 cache->objects[cache->nobjs++] = obj;
277 }
278 return 0;
279 }
280
281 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
282 {
283 while (mc->nobjs)
284 kfree(mc->objects[--mc->nobjs]);
285 }
286
287 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
288 int min)
289 {
290 struct page *page;
291
292 if (cache->nobjs >= min)
293 return 0;
294 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
295 page = alloc_page(GFP_KERNEL);
296 if (!page)
297 return -ENOMEM;
298 set_page_private(page, 0);
299 cache->objects[cache->nobjs++] = page_address(page);
300 }
301 return 0;
302 }
303
304 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
305 {
306 while (mc->nobjs)
307 free_page((unsigned long)mc->objects[--mc->nobjs]);
308 }
309
310 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
311 {
312 int r;
313
314 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
315 pte_chain_cache, 4);
316 if (r)
317 goto out;
318 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
319 rmap_desc_cache, 4);
320 if (r)
321 goto out;
322 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
323 if (r)
324 goto out;
325 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
326 mmu_page_header_cache, 4);
327 out:
328 return r;
329 }
330
331 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
332 {
333 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
334 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
335 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
336 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
337 }
338
339 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
340 size_t size)
341 {
342 void *p;
343
344 BUG_ON(!mc->nobjs);
345 p = mc->objects[--mc->nobjs];
346 memset(p, 0, size);
347 return p;
348 }
349
350 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
351 {
352 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
353 sizeof(struct kvm_pte_chain));
354 }
355
356 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
357 {
358 kfree(pc);
359 }
360
361 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
362 {
363 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
364 sizeof(struct kvm_rmap_desc));
365 }
366
367 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
368 {
369 kfree(rd);
370 }
371
372 /*
373 * Return the pointer to the largepage write count for a given
374 * gfn, handling slots that are not large page aligned.
375 */
376 static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
377 {
378 unsigned long idx;
379
380 idx = (gfn / KVM_PAGES_PER_HPAGE) -
381 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
382 return &slot->lpage_info[idx].write_count;
383 }
384
385 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
386 {
387 int *write_count;
388
389 gfn = unalias_gfn(kvm, gfn);
390 write_count = slot_largepage_idx(gfn,
391 gfn_to_memslot_unaliased(kvm, gfn));
392 *write_count += 1;
393 }
394
395 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
396 {
397 int *write_count;
398
399 gfn = unalias_gfn(kvm, gfn);
400 write_count = slot_largepage_idx(gfn,
401 gfn_to_memslot_unaliased(kvm, gfn));
402 *write_count -= 1;
403 WARN_ON(*write_count < 0);
404 }
405
406 static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
407 {
408 struct kvm_memory_slot *slot;
409 int *largepage_idx;
410
411 gfn = unalias_gfn(kvm, gfn);
412 slot = gfn_to_memslot_unaliased(kvm, gfn);
413 if (slot) {
414 largepage_idx = slot_largepage_idx(gfn, slot);
415 return *largepage_idx;
416 }
417
418 return 1;
419 }
420
421 static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
422 {
423 struct vm_area_struct *vma;
424 unsigned long addr;
425 int ret = 0;
426
427 addr = gfn_to_hva(kvm, gfn);
428 if (kvm_is_error_hva(addr))
429 return ret;
430
431 down_read(&current->mm->mmap_sem);
432 vma = find_vma(current->mm, addr);
433 if (vma && is_vm_hugetlb_page(vma))
434 ret = 1;
435 up_read(&current->mm->mmap_sem);
436
437 return ret;
438 }
439
440 static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
441 {
442 struct kvm_memory_slot *slot;
443
444 if (has_wrprotected_page(vcpu->kvm, large_gfn))
445 return 0;
446
447 if (!host_largepage_backed(vcpu->kvm, large_gfn))
448 return 0;
449
450 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
451 if (slot && slot->dirty_bitmap)
452 return 0;
453
454 return 1;
455 }
456
457 /*
458 * Take gfn and return the reverse mapping to it.
459 * Note: gfn must be unaliased before this function get called
460 */
461
462 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
463 {
464 struct kvm_memory_slot *slot;
465 unsigned long idx;
466
467 slot = gfn_to_memslot(kvm, gfn);
468 if (!lpage)
469 return &slot->rmap[gfn - slot->base_gfn];
470
471 idx = (gfn / KVM_PAGES_PER_HPAGE) -
472 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
473
474 return &slot->lpage_info[idx].rmap_pde;
475 }
476
477 /*
478 * Reverse mapping data structures:
479 *
480 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
481 * that points to page_address(page).
482 *
483 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
484 * containing more mappings.
485 */
486 static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
487 {
488 struct kvm_mmu_page *sp;
489 struct kvm_rmap_desc *desc;
490 unsigned long *rmapp;
491 int i;
492
493 if (!is_rmap_pte(*spte))
494 return;
495 gfn = unalias_gfn(vcpu->kvm, gfn);
496 sp = page_header(__pa(spte));
497 sp->gfns[spte - sp->spt] = gfn;
498 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
499 if (!*rmapp) {
500 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
501 *rmapp = (unsigned long)spte;
502 } else if (!(*rmapp & 1)) {
503 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
504 desc = mmu_alloc_rmap_desc(vcpu);
505 desc->shadow_ptes[0] = (u64 *)*rmapp;
506 desc->shadow_ptes[1] = spte;
507 *rmapp = (unsigned long)desc | 1;
508 } else {
509 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
510 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
511 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
512 desc = desc->more;
513 if (desc->shadow_ptes[RMAP_EXT-1]) {
514 desc->more = mmu_alloc_rmap_desc(vcpu);
515 desc = desc->more;
516 }
517 for (i = 0; desc->shadow_ptes[i]; ++i)
518 ;
519 desc->shadow_ptes[i] = spte;
520 }
521 }
522
523 static void rmap_desc_remove_entry(unsigned long *rmapp,
524 struct kvm_rmap_desc *desc,
525 int i,
526 struct kvm_rmap_desc *prev_desc)
527 {
528 int j;
529
530 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
531 ;
532 desc->shadow_ptes[i] = desc->shadow_ptes[j];
533 desc->shadow_ptes[j] = NULL;
534 if (j != 0)
535 return;
536 if (!prev_desc && !desc->more)
537 *rmapp = (unsigned long)desc->shadow_ptes[0];
538 else
539 if (prev_desc)
540 prev_desc->more = desc->more;
541 else
542 *rmapp = (unsigned long)desc->more | 1;
543 mmu_free_rmap_desc(desc);
544 }
545
546 static void rmap_remove(struct kvm *kvm, u64 *spte)
547 {
548 struct kvm_rmap_desc *desc;
549 struct kvm_rmap_desc *prev_desc;
550 struct kvm_mmu_page *sp;
551 pfn_t pfn;
552 unsigned long *rmapp;
553 int i;
554
555 if (!is_rmap_pte(*spte))
556 return;
557 sp = page_header(__pa(spte));
558 pfn = spte_to_pfn(*spte);
559 if (*spte & shadow_accessed_mask)
560 kvm_set_pfn_accessed(pfn);
561 if (is_writeble_pte(*spte))
562 kvm_release_pfn_dirty(pfn);
563 else
564 kvm_release_pfn_clean(pfn);
565 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
566 if (!*rmapp) {
567 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
568 BUG();
569 } else if (!(*rmapp & 1)) {
570 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
571 if ((u64 *)*rmapp != spte) {
572 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
573 spte, *spte);
574 BUG();
575 }
576 *rmapp = 0;
577 } else {
578 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
579 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
580 prev_desc = NULL;
581 while (desc) {
582 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
583 if (desc->shadow_ptes[i] == spte) {
584 rmap_desc_remove_entry(rmapp,
585 desc, i,
586 prev_desc);
587 return;
588 }
589 prev_desc = desc;
590 desc = desc->more;
591 }
592 BUG();
593 }
594 }
595
596 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
597 {
598 struct kvm_rmap_desc *desc;
599 struct kvm_rmap_desc *prev_desc;
600 u64 *prev_spte;
601 int i;
602
603 if (!*rmapp)
604 return NULL;
605 else if (!(*rmapp & 1)) {
606 if (!spte)
607 return (u64 *)*rmapp;
608 return NULL;
609 }
610 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
611 prev_desc = NULL;
612 prev_spte = NULL;
613 while (desc) {
614 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
615 if (prev_spte == spte)
616 return desc->shadow_ptes[i];
617 prev_spte = desc->shadow_ptes[i];
618 }
619 desc = desc->more;
620 }
621 return NULL;
622 }
623
624 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
625 {
626 unsigned long *rmapp;
627 u64 *spte;
628 int write_protected = 0;
629
630 gfn = unalias_gfn(kvm, gfn);
631 rmapp = gfn_to_rmap(kvm, gfn, 0);
632
633 spte = rmap_next(kvm, rmapp, NULL);
634 while (spte) {
635 BUG_ON(!spte);
636 BUG_ON(!(*spte & PT_PRESENT_MASK));
637 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
638 if (is_writeble_pte(*spte)) {
639 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
640 write_protected = 1;
641 }
642 spte = rmap_next(kvm, rmapp, spte);
643 }
644 if (write_protected) {
645 pfn_t pfn;
646
647 spte = rmap_next(kvm, rmapp, NULL);
648 pfn = spte_to_pfn(*spte);
649 kvm_set_pfn_dirty(pfn);
650 }
651
652 /* check for huge page mappings */
653 rmapp = gfn_to_rmap(kvm, gfn, 1);
654 spte = rmap_next(kvm, rmapp, NULL);
655 while (spte) {
656 BUG_ON(!spte);
657 BUG_ON(!(*spte & PT_PRESENT_MASK));
658 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
659 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
660 if (is_writeble_pte(*spte)) {
661 rmap_remove(kvm, spte);
662 --kvm->stat.lpages;
663 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
664 spte = NULL;
665 write_protected = 1;
666 }
667 spte = rmap_next(kvm, rmapp, spte);
668 }
669
670 return write_protected;
671 }
672
673 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
674 {
675 u64 *spte;
676 int need_tlb_flush = 0;
677
678 while ((spte = rmap_next(kvm, rmapp, NULL))) {
679 BUG_ON(!(*spte & PT_PRESENT_MASK));
680 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
681 rmap_remove(kvm, spte);
682 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
683 need_tlb_flush = 1;
684 }
685 return need_tlb_flush;
686 }
687
688 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
689 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
690 {
691 int i;
692 int retval = 0;
693
694 /*
695 * If mmap_sem isn't taken, we can look the memslots with only
696 * the mmu_lock by skipping over the slots with userspace_addr == 0.
697 */
698 for (i = 0; i < kvm->nmemslots; i++) {
699 struct kvm_memory_slot *memslot = &kvm->memslots[i];
700 unsigned long start = memslot->userspace_addr;
701 unsigned long end;
702
703 /* mmu_lock protects userspace_addr */
704 if (!start)
705 continue;
706
707 end = start + (memslot->npages << PAGE_SHIFT);
708 if (hva >= start && hva < end) {
709 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
710 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
711 retval |= handler(kvm,
712 &memslot->lpage_info[
713 gfn_offset /
714 KVM_PAGES_PER_HPAGE].rmap_pde);
715 }
716 }
717
718 return retval;
719 }
720
721 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
722 {
723 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
724 }
725
726 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
727 {
728 u64 *spte;
729 int young = 0;
730
731 /* always return old for EPT */
732 if (!shadow_accessed_mask)
733 return 0;
734
735 spte = rmap_next(kvm, rmapp, NULL);
736 while (spte) {
737 int _young;
738 u64 _spte = *spte;
739 BUG_ON(!(_spte & PT_PRESENT_MASK));
740 _young = _spte & PT_ACCESSED_MASK;
741 if (_young) {
742 young = 1;
743 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
744 }
745 spte = rmap_next(kvm, rmapp, spte);
746 }
747 return young;
748 }
749
750 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
751 {
752 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
753 }
754
755 #ifdef MMU_DEBUG
756 static int is_empty_shadow_page(u64 *spt)
757 {
758 u64 *pos;
759 u64 *end;
760
761 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
762 if (is_shadow_present_pte(*pos)) {
763 printk(KERN_ERR "%s: %p %llx\n", __func__,
764 pos, *pos);
765 return 0;
766 }
767 return 1;
768 }
769 #endif
770
771 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
772 {
773 ASSERT(is_empty_shadow_page(sp->spt));
774 list_del(&sp->link);
775 __free_page(virt_to_page(sp->spt));
776 __free_page(virt_to_page(sp->gfns));
777 kfree(sp);
778 ++kvm->arch.n_free_mmu_pages;
779 }
780
781 static unsigned kvm_page_table_hashfn(gfn_t gfn)
782 {
783 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
784 }
785
786 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
787 u64 *parent_pte)
788 {
789 struct kvm_mmu_page *sp;
790
791 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
792 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
793 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
794 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
795 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
796 ASSERT(is_empty_shadow_page(sp->spt));
797 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
798 sp->multimapped = 0;
799 sp->parent_pte = parent_pte;
800 --vcpu->kvm->arch.n_free_mmu_pages;
801 return sp;
802 }
803
804 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
805 struct kvm_mmu_page *sp, u64 *parent_pte)
806 {
807 struct kvm_pte_chain *pte_chain;
808 struct hlist_node *node;
809 int i;
810
811 if (!parent_pte)
812 return;
813 if (!sp->multimapped) {
814 u64 *old = sp->parent_pte;
815
816 if (!old) {
817 sp->parent_pte = parent_pte;
818 return;
819 }
820 sp->multimapped = 1;
821 pte_chain = mmu_alloc_pte_chain(vcpu);
822 INIT_HLIST_HEAD(&sp->parent_ptes);
823 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
824 pte_chain->parent_ptes[0] = old;
825 }
826 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
827 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
828 continue;
829 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
830 if (!pte_chain->parent_ptes[i]) {
831 pte_chain->parent_ptes[i] = parent_pte;
832 return;
833 }
834 }
835 pte_chain = mmu_alloc_pte_chain(vcpu);
836 BUG_ON(!pte_chain);
837 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
838 pte_chain->parent_ptes[0] = parent_pte;
839 }
840
841 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
842 u64 *parent_pte)
843 {
844 struct kvm_pte_chain *pte_chain;
845 struct hlist_node *node;
846 int i;
847
848 if (!sp->multimapped) {
849 BUG_ON(sp->parent_pte != parent_pte);
850 sp->parent_pte = NULL;
851 return;
852 }
853 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
854 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
855 if (!pte_chain->parent_ptes[i])
856 break;
857 if (pte_chain->parent_ptes[i] != parent_pte)
858 continue;
859 while (i + 1 < NR_PTE_CHAIN_ENTRIES
860 && pte_chain->parent_ptes[i + 1]) {
861 pte_chain->parent_ptes[i]
862 = pte_chain->parent_ptes[i + 1];
863 ++i;
864 }
865 pte_chain->parent_ptes[i] = NULL;
866 if (i == 0) {
867 hlist_del(&pte_chain->link);
868 mmu_free_pte_chain(pte_chain);
869 if (hlist_empty(&sp->parent_ptes)) {
870 sp->multimapped = 0;
871 sp->parent_pte = NULL;
872 }
873 }
874 return;
875 }
876 BUG();
877 }
878
879
880 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
881 mmu_parent_walk_fn fn)
882 {
883 struct kvm_pte_chain *pte_chain;
884 struct hlist_node *node;
885 struct kvm_mmu_page *parent_sp;
886 int i;
887
888 if (!sp->multimapped && sp->parent_pte) {
889 parent_sp = page_header(__pa(sp->parent_pte));
890 fn(vcpu, parent_sp);
891 mmu_parent_walk(vcpu, parent_sp, fn);
892 return;
893 }
894 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
895 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
896 if (!pte_chain->parent_ptes[i])
897 break;
898 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
899 fn(vcpu, parent_sp);
900 mmu_parent_walk(vcpu, parent_sp, fn);
901 }
902 }
903
904 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
905 {
906 unsigned int index;
907 struct kvm_mmu_page *sp = page_header(__pa(spte));
908
909 index = spte - sp->spt;
910 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
911 sp->unsync_children++;
912 WARN_ON(!sp->unsync_children);
913 }
914
915 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
916 {
917 struct kvm_pte_chain *pte_chain;
918 struct hlist_node *node;
919 int i;
920
921 if (!sp->parent_pte)
922 return;
923
924 if (!sp->multimapped) {
925 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
926 return;
927 }
928
929 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
930 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
931 if (!pte_chain->parent_ptes[i])
932 break;
933 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
934 }
935 }
936
937 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
938 {
939 kvm_mmu_update_parents_unsync(sp);
940 return 1;
941 }
942
943 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
944 struct kvm_mmu_page *sp)
945 {
946 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
947 kvm_mmu_update_parents_unsync(sp);
948 }
949
950 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
951 struct kvm_mmu_page *sp)
952 {
953 int i;
954
955 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
956 sp->spt[i] = shadow_trap_nonpresent_pte;
957 }
958
959 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
960 struct kvm_mmu_page *sp)
961 {
962 return 1;
963 }
964
965 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
966 {
967 }
968
969 #define KVM_PAGE_ARRAY_NR 16
970
971 struct kvm_mmu_pages {
972 struct mmu_page_and_offset {
973 struct kvm_mmu_page *sp;
974 unsigned int idx;
975 } page[KVM_PAGE_ARRAY_NR];
976 unsigned int nr;
977 };
978
979 #define for_each_unsync_children(bitmap, idx) \
980 for (idx = find_first_bit(bitmap, 512); \
981 idx < 512; \
982 idx = find_next_bit(bitmap, 512, idx+1))
983
984 int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
985 int idx)
986 {
987 int i;
988
989 if (sp->unsync)
990 for (i=0; i < pvec->nr; i++)
991 if (pvec->page[i].sp == sp)
992 return 0;
993
994 pvec->page[pvec->nr].sp = sp;
995 pvec->page[pvec->nr].idx = idx;
996 pvec->nr++;
997 return (pvec->nr == KVM_PAGE_ARRAY_NR);
998 }
999
1000 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1001 struct kvm_mmu_pages *pvec)
1002 {
1003 int i, ret, nr_unsync_leaf = 0;
1004
1005 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1006 u64 ent = sp->spt[i];
1007
1008 if (is_shadow_present_pte(ent)) {
1009 struct kvm_mmu_page *child;
1010 child = page_header(ent & PT64_BASE_ADDR_MASK);
1011
1012 if (child->unsync_children) {
1013 if (mmu_pages_add(pvec, child, i))
1014 return -ENOSPC;
1015
1016 ret = __mmu_unsync_walk(child, pvec);
1017 if (!ret)
1018 __clear_bit(i, sp->unsync_child_bitmap);
1019 else if (ret > 0)
1020 nr_unsync_leaf += ret;
1021 else
1022 return ret;
1023 }
1024
1025 if (child->unsync) {
1026 nr_unsync_leaf++;
1027 if (mmu_pages_add(pvec, child, i))
1028 return -ENOSPC;
1029 }
1030 }
1031 }
1032
1033 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1034 sp->unsync_children = 0;
1035
1036 return nr_unsync_leaf;
1037 }
1038
1039 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1040 struct kvm_mmu_pages *pvec)
1041 {
1042 if (!sp->unsync_children)
1043 return 0;
1044
1045 mmu_pages_add(pvec, sp, 0);
1046 return __mmu_unsync_walk(sp, pvec);
1047 }
1048
1049 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1050 {
1051 unsigned index;
1052 struct hlist_head *bucket;
1053 struct kvm_mmu_page *sp;
1054 struct hlist_node *node;
1055
1056 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1057 index = kvm_page_table_hashfn(gfn);
1058 bucket = &kvm->arch.mmu_page_hash[index];
1059 hlist_for_each_entry(sp, node, bucket, hash_link)
1060 if (sp->gfn == gfn && !sp->role.metaphysical
1061 && !sp->role.invalid) {
1062 pgprintk("%s: found role %x\n",
1063 __func__, sp->role.word);
1064 return sp;
1065 }
1066 return NULL;
1067 }
1068
1069 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1070 {
1071 WARN_ON(!sp->unsync);
1072 sp->unsync = 0;
1073 --kvm->stat.mmu_unsync;
1074 }
1075
1076 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1077
1078 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1079 {
1080 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1081 kvm_mmu_zap_page(vcpu->kvm, sp);
1082 return 1;
1083 }
1084
1085 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1086 kvm_flush_remote_tlbs(vcpu->kvm);
1087 kvm_unlink_unsync_page(vcpu->kvm, sp);
1088 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1089 kvm_mmu_zap_page(vcpu->kvm, sp);
1090 return 1;
1091 }
1092
1093 kvm_mmu_flush_tlb(vcpu);
1094 return 0;
1095 }
1096
1097 struct mmu_page_path {
1098 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1099 unsigned int idx[PT64_ROOT_LEVEL-1];
1100 };
1101
1102 #define for_each_sp(pvec, sp, parents, i) \
1103 for (i = mmu_pages_next(&pvec, &parents, -1), \
1104 sp = pvec.page[i].sp; \
1105 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1106 i = mmu_pages_next(&pvec, &parents, i))
1107
1108 int mmu_pages_next(struct kvm_mmu_pages *pvec, struct mmu_page_path *parents,
1109 int i)
1110 {
1111 int n;
1112
1113 for (n = i+1; n < pvec->nr; n++) {
1114 struct kvm_mmu_page *sp = pvec->page[n].sp;
1115
1116 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1117 parents->idx[0] = pvec->page[n].idx;
1118 return n;
1119 }
1120
1121 parents->parent[sp->role.level-2] = sp;
1122 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1123 }
1124
1125 return n;
1126 }
1127
1128 void mmu_pages_clear_parents(struct mmu_page_path *parents)
1129 {
1130 struct kvm_mmu_page *sp;
1131 unsigned int level = 0;
1132
1133 do {
1134 unsigned int idx = parents->idx[level];
1135
1136 sp = parents->parent[level];
1137 if (!sp)
1138 return;
1139
1140 --sp->unsync_children;
1141 WARN_ON((int)sp->unsync_children < 0);
1142 __clear_bit(idx, sp->unsync_child_bitmap);
1143 level++;
1144 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1145 }
1146
1147 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1148 struct mmu_page_path *parents,
1149 struct kvm_mmu_pages *pvec)
1150 {
1151 parents->parent[parent->role.level-1] = NULL;
1152 pvec->nr = 0;
1153 }
1154
1155 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1156 struct kvm_mmu_page *parent)
1157 {
1158 int i;
1159 struct kvm_mmu_page *sp;
1160 struct mmu_page_path parents;
1161 struct kvm_mmu_pages pages;
1162
1163 kvm_mmu_pages_init(parent, &parents, &pages);
1164 while (mmu_unsync_walk(parent, &pages)) {
1165 int protected = 0;
1166
1167 for_each_sp(pages, sp, parents, i)
1168 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1169
1170 if (protected)
1171 kvm_flush_remote_tlbs(vcpu->kvm);
1172
1173 for_each_sp(pages, sp, parents, i) {
1174 kvm_sync_page(vcpu, sp);
1175 mmu_pages_clear_parents(&parents);
1176 }
1177 cond_resched_lock(&vcpu->kvm->mmu_lock);
1178 kvm_mmu_pages_init(parent, &parents, &pages);
1179 }
1180 }
1181
1182 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1183 gfn_t gfn,
1184 gva_t gaddr,
1185 unsigned level,
1186 int metaphysical,
1187 unsigned access,
1188 u64 *parent_pte)
1189 {
1190 union kvm_mmu_page_role role;
1191 unsigned index;
1192 unsigned quadrant;
1193 struct hlist_head *bucket;
1194 struct kvm_mmu_page *sp;
1195 struct hlist_node *node, *tmp;
1196
1197 role.word = 0;
1198 role.glevels = vcpu->arch.mmu.root_level;
1199 role.level = level;
1200 role.metaphysical = metaphysical;
1201 role.access = access;
1202 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1203 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1204 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1205 role.quadrant = quadrant;
1206 }
1207 pgprintk("%s: looking gfn %lx role %x\n", __func__,
1208 gfn, role.word);
1209 index = kvm_page_table_hashfn(gfn);
1210 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1211 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1212 if (sp->gfn == gfn) {
1213 if (sp->unsync)
1214 if (kvm_sync_page(vcpu, sp))
1215 continue;
1216
1217 if (sp->role.word != role.word)
1218 continue;
1219
1220 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1221 if (sp->unsync_children) {
1222 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1223 kvm_mmu_mark_parents_unsync(vcpu, sp);
1224 }
1225 pgprintk("%s: found\n", __func__);
1226 return sp;
1227 }
1228 ++vcpu->kvm->stat.mmu_cache_miss;
1229 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1230 if (!sp)
1231 return sp;
1232 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
1233 sp->gfn = gfn;
1234 sp->role = role;
1235 hlist_add_head(&sp->hash_link, bucket);
1236 if (!metaphysical) {
1237 if (rmap_write_protect(vcpu->kvm, gfn))
1238 kvm_flush_remote_tlbs(vcpu->kvm);
1239 account_shadowed(vcpu->kvm, gfn);
1240 }
1241 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1242 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1243 else
1244 nonpaging_prefetch_page(vcpu, sp);
1245 return sp;
1246 }
1247
1248 static int walk_shadow(struct kvm_shadow_walk *walker,
1249 struct kvm_vcpu *vcpu, u64 addr)
1250 {
1251 hpa_t shadow_addr;
1252 int level;
1253 int r;
1254 u64 *sptep;
1255 unsigned index;
1256
1257 shadow_addr = vcpu->arch.mmu.root_hpa;
1258 level = vcpu->arch.mmu.shadow_root_level;
1259 if (level == PT32E_ROOT_LEVEL) {
1260 shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1261 shadow_addr &= PT64_BASE_ADDR_MASK;
1262 --level;
1263 }
1264
1265 while (level >= PT_PAGE_TABLE_LEVEL) {
1266 index = SHADOW_PT_INDEX(addr, level);
1267 sptep = ((u64 *)__va(shadow_addr)) + index;
1268 r = walker->entry(walker, vcpu, addr, sptep, level);
1269 if (r)
1270 return r;
1271 shadow_addr = *sptep & PT64_BASE_ADDR_MASK;
1272 --level;
1273 }
1274 return 0;
1275 }
1276
1277 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1278 struct kvm_mmu_page *sp)
1279 {
1280 unsigned i;
1281 u64 *pt;
1282 u64 ent;
1283
1284 pt = sp->spt;
1285
1286 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1287 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1288 if (is_shadow_present_pte(pt[i]))
1289 rmap_remove(kvm, &pt[i]);
1290 pt[i] = shadow_trap_nonpresent_pte;
1291 }
1292 return;
1293 }
1294
1295 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1296 ent = pt[i];
1297
1298 if (is_shadow_present_pte(ent)) {
1299 if (!is_large_pte(ent)) {
1300 ent &= PT64_BASE_ADDR_MASK;
1301 mmu_page_remove_parent_pte(page_header(ent),
1302 &pt[i]);
1303 } else {
1304 --kvm->stat.lpages;
1305 rmap_remove(kvm, &pt[i]);
1306 }
1307 }
1308 pt[i] = shadow_trap_nonpresent_pte;
1309 }
1310 }
1311
1312 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1313 {
1314 mmu_page_remove_parent_pte(sp, parent_pte);
1315 }
1316
1317 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1318 {
1319 int i;
1320
1321 for (i = 0; i < KVM_MAX_VCPUS; ++i)
1322 if (kvm->vcpus[i])
1323 kvm->vcpus[i]->arch.last_pte_updated = NULL;
1324 }
1325
1326 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1327 {
1328 u64 *parent_pte;
1329
1330 while (sp->multimapped || sp->parent_pte) {
1331 if (!sp->multimapped)
1332 parent_pte = sp->parent_pte;
1333 else {
1334 struct kvm_pte_chain *chain;
1335
1336 chain = container_of(sp->parent_ptes.first,
1337 struct kvm_pte_chain, link);
1338 parent_pte = chain->parent_ptes[0];
1339 }
1340 BUG_ON(!parent_pte);
1341 kvm_mmu_put_page(sp, parent_pte);
1342 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
1343 }
1344 }
1345
1346 static int mmu_zap_unsync_children(struct kvm *kvm,
1347 struct kvm_mmu_page *parent)
1348 {
1349 int i, zapped = 0;
1350 struct mmu_page_path parents;
1351 struct kvm_mmu_pages pages;
1352
1353 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1354 return 0;
1355
1356 kvm_mmu_pages_init(parent, &parents, &pages);
1357 while (mmu_unsync_walk(parent, &pages)) {
1358 struct kvm_mmu_page *sp;
1359
1360 for_each_sp(pages, sp, parents, i) {
1361 kvm_mmu_zap_page(kvm, sp);
1362 mmu_pages_clear_parents(&parents);
1363 }
1364 zapped += pages.nr;
1365 kvm_mmu_pages_init(parent, &parents, &pages);
1366 }
1367
1368 return zapped;
1369 }
1370
1371 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1372 {
1373 int ret;
1374 ++kvm->stat.mmu_shadow_zapped;
1375 ret = mmu_zap_unsync_children(kvm, sp);
1376 kvm_mmu_page_unlink_children(kvm, sp);
1377 kvm_mmu_unlink_parents(kvm, sp);
1378 kvm_flush_remote_tlbs(kvm);
1379 if (!sp->role.invalid && !sp->role.metaphysical)
1380 unaccount_shadowed(kvm, sp->gfn);
1381 if (sp->unsync)
1382 kvm_unlink_unsync_page(kvm, sp);
1383 if (!sp->root_count) {
1384 hlist_del(&sp->hash_link);
1385 kvm_mmu_free_page(kvm, sp);
1386 } else {
1387 sp->role.invalid = 1;
1388 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1389 kvm_reload_remote_mmus(kvm);
1390 }
1391 kvm_mmu_reset_last_pte_updated(kvm);
1392 return ret;
1393 }
1394
1395 /*
1396 * Changing the number of mmu pages allocated to the vm
1397 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1398 */
1399 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1400 {
1401 /*
1402 * If we set the number of mmu pages to be smaller be than the
1403 * number of actived pages , we must to free some mmu pages before we
1404 * change the value
1405 */
1406
1407 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
1408 kvm_nr_mmu_pages) {
1409 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
1410 - kvm->arch.n_free_mmu_pages;
1411
1412 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
1413 struct kvm_mmu_page *page;
1414
1415 page = container_of(kvm->arch.active_mmu_pages.prev,
1416 struct kvm_mmu_page, link);
1417 kvm_mmu_zap_page(kvm, page);
1418 n_used_mmu_pages--;
1419 }
1420 kvm->arch.n_free_mmu_pages = 0;
1421 }
1422 else
1423 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1424 - kvm->arch.n_alloc_mmu_pages;
1425
1426 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1427 }
1428
1429 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1430 {
1431 unsigned index;
1432 struct hlist_head *bucket;
1433 struct kvm_mmu_page *sp;
1434 struct hlist_node *node, *n;
1435 int r;
1436
1437 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1438 r = 0;
1439 index = kvm_page_table_hashfn(gfn);
1440 bucket = &kvm->arch.mmu_page_hash[index];
1441 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1442 if (sp->gfn == gfn && !sp->role.metaphysical) {
1443 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1444 sp->role.word);
1445 r = 1;
1446 if (kvm_mmu_zap_page(kvm, sp))
1447 n = bucket->first;
1448 }
1449 return r;
1450 }
1451
1452 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1453 {
1454 struct kvm_mmu_page *sp;
1455
1456 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
1457 pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
1458 kvm_mmu_zap_page(kvm, sp);
1459 }
1460 }
1461
1462 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1463 {
1464 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
1465 struct kvm_mmu_page *sp = page_header(__pa(pte));
1466
1467 __set_bit(slot, sp->slot_bitmap);
1468 }
1469
1470 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1471 {
1472 int i;
1473 u64 *pt = sp->spt;
1474
1475 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1476 return;
1477
1478 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1479 if (pt[i] == shadow_notrap_nonpresent_pte)
1480 set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
1481 }
1482 }
1483
1484 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1485 {
1486 struct page *page;
1487
1488 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1489
1490 if (gpa == UNMAPPED_GVA)
1491 return NULL;
1492
1493 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1494
1495 return page;
1496 }
1497
1498 /*
1499 * The function is based on mtrr_type_lookup() in
1500 * arch/x86/kernel/cpu/mtrr/generic.c
1501 */
1502 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1503 u64 start, u64 end)
1504 {
1505 int i;
1506 u64 base, mask;
1507 u8 prev_match, curr_match;
1508 int num_var_ranges = KVM_NR_VAR_MTRR;
1509
1510 if (!mtrr_state->enabled)
1511 return 0xFF;
1512
1513 /* Make end inclusive end, instead of exclusive */
1514 end--;
1515
1516 /* Look in fixed ranges. Just return the type as per start */
1517 if (mtrr_state->have_fixed && (start < 0x100000)) {
1518 int idx;
1519
1520 if (start < 0x80000) {
1521 idx = 0;
1522 idx += (start >> 16);
1523 return mtrr_state->fixed_ranges[idx];
1524 } else if (start < 0xC0000) {
1525 idx = 1 * 8;
1526 idx += ((start - 0x80000) >> 14);
1527 return mtrr_state->fixed_ranges[idx];
1528 } else if (start < 0x1000000) {
1529 idx = 3 * 8;
1530 idx += ((start - 0xC0000) >> 12);
1531 return mtrr_state->fixed_ranges[idx];
1532 }
1533 }
1534
1535 /*
1536 * Look in variable ranges
1537 * Look of multiple ranges matching this address and pick type
1538 * as per MTRR precedence
1539 */
1540 if (!(mtrr_state->enabled & 2))
1541 return mtrr_state->def_type;
1542
1543 prev_match = 0xFF;
1544 for (i = 0; i < num_var_ranges; ++i) {
1545 unsigned short start_state, end_state;
1546
1547 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1548 continue;
1549
1550 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1551 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1552 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1553 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1554
1555 start_state = ((start & mask) == (base & mask));
1556 end_state = ((end & mask) == (base & mask));
1557 if (start_state != end_state)
1558 return 0xFE;
1559
1560 if ((start & mask) != (base & mask))
1561 continue;
1562
1563 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1564 if (prev_match == 0xFF) {
1565 prev_match = curr_match;
1566 continue;
1567 }
1568
1569 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1570 curr_match == MTRR_TYPE_UNCACHABLE)
1571 return MTRR_TYPE_UNCACHABLE;
1572
1573 if ((prev_match == MTRR_TYPE_WRBACK &&
1574 curr_match == MTRR_TYPE_WRTHROUGH) ||
1575 (prev_match == MTRR_TYPE_WRTHROUGH &&
1576 curr_match == MTRR_TYPE_WRBACK)) {
1577 prev_match = MTRR_TYPE_WRTHROUGH;
1578 curr_match = MTRR_TYPE_WRTHROUGH;
1579 }
1580
1581 if (prev_match != curr_match)
1582 return MTRR_TYPE_UNCACHABLE;
1583 }
1584
1585 if (prev_match != 0xFF)
1586 return prev_match;
1587
1588 return mtrr_state->def_type;
1589 }
1590
1591 static u8 get_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1592 {
1593 u8 mtrr;
1594
1595 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1596 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1597 if (mtrr == 0xfe || mtrr == 0xff)
1598 mtrr = MTRR_TYPE_WRBACK;
1599 return mtrr;
1600 }
1601
1602 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1603 {
1604 unsigned index;
1605 struct hlist_head *bucket;
1606 struct kvm_mmu_page *s;
1607 struct hlist_node *node, *n;
1608
1609 index = kvm_page_table_hashfn(sp->gfn);
1610 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1611 /* don't unsync if pagetable is shadowed with multiple roles */
1612 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1613 if (s->gfn != sp->gfn || s->role.metaphysical)
1614 continue;
1615 if (s->role.word != sp->role.word)
1616 return 1;
1617 }
1618 kvm_mmu_mark_parents_unsync(vcpu, sp);
1619 ++vcpu->kvm->stat.mmu_unsync;
1620 sp->unsync = 1;
1621 mmu_convert_notrap(sp);
1622 return 0;
1623 }
1624
1625 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1626 bool can_unsync)
1627 {
1628 struct kvm_mmu_page *shadow;
1629
1630 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1631 if (shadow) {
1632 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1633 return 1;
1634 if (shadow->unsync)
1635 return 0;
1636 if (can_unsync && oos_shadow)
1637 return kvm_unsync_page(vcpu, shadow);
1638 return 1;
1639 }
1640 return 0;
1641 }
1642
1643 static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1644 unsigned pte_access, int user_fault,
1645 int write_fault, int dirty, int largepage,
1646 gfn_t gfn, pfn_t pfn, bool speculative,
1647 bool can_unsync)
1648 {
1649 u64 spte;
1650 int ret = 0;
1651 u64 mt_mask = shadow_mt_mask;
1652
1653 /*
1654 * We don't set the accessed bit, since we sometimes want to see
1655 * whether the guest actually used the pte (in order to detect
1656 * demand paging).
1657 */
1658 spte = shadow_base_present_pte | shadow_dirty_mask;
1659 if (!speculative)
1660 spte |= shadow_accessed_mask;
1661 if (!dirty)
1662 pte_access &= ~ACC_WRITE_MASK;
1663 if (pte_access & ACC_EXEC_MASK)
1664 spte |= shadow_x_mask;
1665 else
1666 spte |= shadow_nx_mask;
1667 if (pte_access & ACC_USER_MASK)
1668 spte |= shadow_user_mask;
1669 if (largepage)
1670 spte |= PT_PAGE_SIZE_MASK;
1671 if (mt_mask) {
1672 mt_mask = get_memory_type(vcpu, gfn) <<
1673 kvm_x86_ops->get_mt_mask_shift();
1674 spte |= mt_mask;
1675 }
1676
1677 spte |= (u64)pfn << PAGE_SHIFT;
1678
1679 if ((pte_access & ACC_WRITE_MASK)
1680 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1681
1682 if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
1683 ret = 1;
1684 spte = shadow_trap_nonpresent_pte;
1685 goto set_pte;
1686 }
1687
1688 spte |= PT_WRITABLE_MASK;
1689
1690 /*
1691 * Optimization: for pte sync, if spte was writable the hash
1692 * lookup is unnecessary (and expensive). Write protection
1693 * is responsibility of mmu_get_page / kvm_sync_page.
1694 * Same reasoning can be applied to dirty page accounting.
1695 */
1696 if (!can_unsync && is_writeble_pte(*shadow_pte))
1697 goto set_pte;
1698
1699 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1700 pgprintk("%s: found shadow page for %lx, marking ro\n",
1701 __func__, gfn);
1702 ret = 1;
1703 pte_access &= ~ACC_WRITE_MASK;
1704 if (is_writeble_pte(spte))
1705 spte &= ~PT_WRITABLE_MASK;
1706 }
1707 }
1708
1709 if (pte_access & ACC_WRITE_MASK)
1710 mark_page_dirty(vcpu->kvm, gfn);
1711
1712 set_pte:
1713 set_shadow_pte(shadow_pte, spte);
1714 return ret;
1715 }
1716
1717 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1718 unsigned pt_access, unsigned pte_access,
1719 int user_fault, int write_fault, int dirty,
1720 int *ptwrite, int largepage, gfn_t gfn,
1721 pfn_t pfn, bool speculative)
1722 {
1723 int was_rmapped = 0;
1724 int was_writeble = is_writeble_pte(*shadow_pte);
1725
1726 pgprintk("%s: spte %llx access %x write_fault %d"
1727 " user_fault %d gfn %lx\n",
1728 __func__, *shadow_pte, pt_access,
1729 write_fault, user_fault, gfn);
1730
1731 if (is_rmap_pte(*shadow_pte)) {
1732 /*
1733 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1734 * the parent of the now unreachable PTE.
1735 */
1736 if (largepage && !is_large_pte(*shadow_pte)) {
1737 struct kvm_mmu_page *child;
1738 u64 pte = *shadow_pte;
1739
1740 child = page_header(pte & PT64_BASE_ADDR_MASK);
1741 mmu_page_remove_parent_pte(child, shadow_pte);
1742 } else if (pfn != spte_to_pfn(*shadow_pte)) {
1743 pgprintk("hfn old %lx new %lx\n",
1744 spte_to_pfn(*shadow_pte), pfn);
1745 rmap_remove(vcpu->kvm, shadow_pte);
1746 } else {
1747 if (largepage)
1748 was_rmapped = is_large_pte(*shadow_pte);
1749 else
1750 was_rmapped = 1;
1751 }
1752 }
1753 if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
1754 dirty, largepage, gfn, pfn, speculative, true)) {
1755 if (write_fault)
1756 *ptwrite = 1;
1757 kvm_x86_ops->tlb_flush(vcpu);
1758 }
1759
1760 pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
1761 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1762 is_large_pte(*shadow_pte)? "2MB" : "4kB",
1763 is_present_pte(*shadow_pte)?"RW":"R", gfn,
1764 *shadow_pte, shadow_pte);
1765 if (!was_rmapped && is_large_pte(*shadow_pte))
1766 ++vcpu->kvm->stat.lpages;
1767
1768 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1769 if (!was_rmapped) {
1770 rmap_add(vcpu, shadow_pte, gfn, largepage);
1771 if (!is_rmap_pte(*shadow_pte))
1772 kvm_release_pfn_clean(pfn);
1773 } else {
1774 if (was_writeble)
1775 kvm_release_pfn_dirty(pfn);
1776 else
1777 kvm_release_pfn_clean(pfn);
1778 }
1779 if (speculative) {
1780 vcpu->arch.last_pte_updated = shadow_pte;
1781 vcpu->arch.last_pte_gfn = gfn;
1782 }
1783 }
1784
1785 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1786 {
1787 }
1788
1789 struct direct_shadow_walk {
1790 struct kvm_shadow_walk walker;
1791 pfn_t pfn;
1792 int write;
1793 int largepage;
1794 int pt_write;
1795 };
1796
1797 static int direct_map_entry(struct kvm_shadow_walk *_walk,
1798 struct kvm_vcpu *vcpu,
1799 u64 addr, u64 *sptep, int level)
1800 {
1801 struct direct_shadow_walk *walk =
1802 container_of(_walk, struct direct_shadow_walk, walker);
1803 struct kvm_mmu_page *sp;
1804 gfn_t pseudo_gfn;
1805 gfn_t gfn = addr >> PAGE_SHIFT;
1806
1807 if (level == PT_PAGE_TABLE_LEVEL
1808 || (walk->largepage && level == PT_DIRECTORY_LEVEL)) {
1809 mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL,
1810 0, walk->write, 1, &walk->pt_write,
1811 walk->largepage, gfn, walk->pfn, false);
1812 ++vcpu->stat.pf_fixed;
1813 return 1;
1814 }
1815
1816 if (*sptep == shadow_trap_nonpresent_pte) {
1817 pseudo_gfn = (addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1818 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, (gva_t)addr, level - 1,
1819 1, ACC_ALL, sptep);
1820 if (!sp) {
1821 pgprintk("nonpaging_map: ENOMEM\n");
1822 kvm_release_pfn_clean(walk->pfn);
1823 return -ENOMEM;
1824 }
1825
1826 set_shadow_pte(sptep,
1827 __pa(sp->spt)
1828 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1829 | shadow_user_mask | shadow_x_mask);
1830 }
1831 return 0;
1832 }
1833
1834 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1835 int largepage, gfn_t gfn, pfn_t pfn)
1836 {
1837 int r;
1838 struct direct_shadow_walk walker = {
1839 .walker = { .entry = direct_map_entry, },
1840 .pfn = pfn,
1841 .largepage = largepage,
1842 .write = write,
1843 .pt_write = 0,
1844 };
1845
1846 r = walk_shadow(&walker.walker, vcpu, gfn << PAGE_SHIFT);
1847 if (r < 0)
1848 return r;
1849 return walker.pt_write;
1850 }
1851
1852 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1853 {
1854 int r;
1855 int largepage = 0;
1856 pfn_t pfn;
1857 unsigned long mmu_seq;
1858
1859 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1860 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1861 largepage = 1;
1862 }
1863
1864 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1865 smp_rmb();
1866 pfn = gfn_to_pfn(vcpu->kvm, gfn);
1867
1868 /* mmio */
1869 if (is_error_pfn(pfn)) {
1870 kvm_release_pfn_clean(pfn);
1871 return 1;
1872 }
1873
1874 spin_lock(&vcpu->kvm->mmu_lock);
1875 if (mmu_notifier_retry(vcpu, mmu_seq))
1876 goto out_unlock;
1877 kvm_mmu_free_some_pages(vcpu);
1878 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
1879 spin_unlock(&vcpu->kvm->mmu_lock);
1880
1881
1882 return r;
1883
1884 out_unlock:
1885 spin_unlock(&vcpu->kvm->mmu_lock);
1886 kvm_release_pfn_clean(pfn);
1887 return 0;
1888 }
1889
1890
1891 static void mmu_free_roots(struct kvm_vcpu *vcpu)
1892 {
1893 int i;
1894 struct kvm_mmu_page *sp;
1895
1896 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1897 return;
1898 spin_lock(&vcpu->kvm->mmu_lock);
1899 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1900 hpa_t root = vcpu->arch.mmu.root_hpa;
1901
1902 sp = page_header(root);
1903 --sp->root_count;
1904 if (!sp->root_count && sp->role.invalid)
1905 kvm_mmu_zap_page(vcpu->kvm, sp);
1906 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1907 spin_unlock(&vcpu->kvm->mmu_lock);
1908 return;
1909 }
1910 for (i = 0; i < 4; ++i) {
1911 hpa_t root = vcpu->arch.mmu.pae_root[i];
1912
1913 if (root) {
1914 root &= PT64_BASE_ADDR_MASK;
1915 sp = page_header(root);
1916 --sp->root_count;
1917 if (!sp->root_count && sp->role.invalid)
1918 kvm_mmu_zap_page(vcpu->kvm, sp);
1919 }
1920 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
1921 }
1922 spin_unlock(&vcpu->kvm->mmu_lock);
1923 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1924 }
1925
1926 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1927 {
1928 int i;
1929 gfn_t root_gfn;
1930 struct kvm_mmu_page *sp;
1931 int metaphysical = 0;
1932
1933 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
1934
1935 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1936 hpa_t root = vcpu->arch.mmu.root_hpa;
1937
1938 ASSERT(!VALID_PAGE(root));
1939 if (tdp_enabled)
1940 metaphysical = 1;
1941 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
1942 PT64_ROOT_LEVEL, metaphysical,
1943 ACC_ALL, NULL);
1944 root = __pa(sp->spt);
1945 ++sp->root_count;
1946 vcpu->arch.mmu.root_hpa = root;
1947 return;
1948 }
1949 metaphysical = !is_paging(vcpu);
1950 if (tdp_enabled)
1951 metaphysical = 1;
1952 for (i = 0; i < 4; ++i) {
1953 hpa_t root = vcpu->arch.mmu.pae_root[i];
1954
1955 ASSERT(!VALID_PAGE(root));
1956 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1957 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1958 vcpu->arch.mmu.pae_root[i] = 0;
1959 continue;
1960 }
1961 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1962 } else if (vcpu->arch.mmu.root_level == 0)
1963 root_gfn = 0;
1964 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
1965 PT32_ROOT_LEVEL, metaphysical,
1966 ACC_ALL, NULL);
1967 root = __pa(sp->spt);
1968 ++sp->root_count;
1969 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
1970 }
1971 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
1972 }
1973
1974 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
1975 {
1976 int i;
1977 struct kvm_mmu_page *sp;
1978
1979 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1980 return;
1981 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1982 hpa_t root = vcpu->arch.mmu.root_hpa;
1983 sp = page_header(root);
1984 mmu_sync_children(vcpu, sp);
1985 return;
1986 }
1987 for (i = 0; i < 4; ++i) {
1988 hpa_t root = vcpu->arch.mmu.pae_root[i];
1989
1990 if (root) {
1991 root &= PT64_BASE_ADDR_MASK;
1992 sp = page_header(root);
1993 mmu_sync_children(vcpu, sp);
1994 }
1995 }
1996 }
1997
1998 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
1999 {
2000 spin_lock(&vcpu->kvm->mmu_lock);
2001 mmu_sync_roots(vcpu);
2002 spin_unlock(&vcpu->kvm->mmu_lock);
2003 }
2004
2005 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2006 {
2007 return vaddr;
2008 }
2009
2010 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2011 u32 error_code)
2012 {
2013 gfn_t gfn;
2014 int r;
2015
2016 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2017 r = mmu_topup_memory_caches(vcpu);
2018 if (r)
2019 return r;
2020
2021 ASSERT(vcpu);
2022 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2023
2024 gfn = gva >> PAGE_SHIFT;
2025
2026 return nonpaging_map(vcpu, gva & PAGE_MASK,
2027 error_code & PFERR_WRITE_MASK, gfn);
2028 }
2029
2030 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2031 u32 error_code)
2032 {
2033 pfn_t pfn;
2034 int r;
2035 int largepage = 0;
2036 gfn_t gfn = gpa >> PAGE_SHIFT;
2037 unsigned long mmu_seq;
2038
2039 ASSERT(vcpu);
2040 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2041
2042 r = mmu_topup_memory_caches(vcpu);
2043 if (r)
2044 return r;
2045
2046 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
2047 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2048 largepage = 1;
2049 }
2050 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2051 smp_rmb();
2052 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2053 if (is_error_pfn(pfn)) {
2054 kvm_release_pfn_clean(pfn);
2055 return 1;
2056 }
2057 spin_lock(&vcpu->kvm->mmu_lock);
2058 if (mmu_notifier_retry(vcpu, mmu_seq))
2059 goto out_unlock;
2060 kvm_mmu_free_some_pages(vcpu);
2061 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2062 largepage, gfn, pfn);
2063 spin_unlock(&vcpu->kvm->mmu_lock);
2064
2065 return r;
2066
2067 out_unlock:
2068 spin_unlock(&vcpu->kvm->mmu_lock);
2069 kvm_release_pfn_clean(pfn);
2070 return 0;
2071 }
2072
2073 static void nonpaging_free(struct kvm_vcpu *vcpu)
2074 {
2075 mmu_free_roots(vcpu);
2076 }
2077
2078 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2079 {
2080 struct kvm_mmu *context = &vcpu->arch.mmu;
2081
2082 context->new_cr3 = nonpaging_new_cr3;
2083 context->page_fault = nonpaging_page_fault;
2084 context->gva_to_gpa = nonpaging_gva_to_gpa;
2085 context->free = nonpaging_free;
2086 context->prefetch_page = nonpaging_prefetch_page;
2087 context->sync_page = nonpaging_sync_page;
2088 context->invlpg = nonpaging_invlpg;
2089 context->root_level = 0;
2090 context->shadow_root_level = PT32E_ROOT_LEVEL;
2091 context->root_hpa = INVALID_PAGE;
2092 return 0;
2093 }
2094
2095 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2096 {
2097 ++vcpu->stat.tlb_flush;
2098 kvm_x86_ops->tlb_flush(vcpu);
2099 }
2100
2101 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2102 {
2103 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2104 mmu_free_roots(vcpu);
2105 }
2106
2107 static void inject_page_fault(struct kvm_vcpu *vcpu,
2108 u64 addr,
2109 u32 err_code)
2110 {
2111 kvm_inject_page_fault(vcpu, addr, err_code);
2112 }
2113
2114 static void paging_free(struct kvm_vcpu *vcpu)
2115 {
2116 nonpaging_free(vcpu);
2117 }
2118
2119 #define PTTYPE 64
2120 #include "paging_tmpl.h"
2121 #undef PTTYPE
2122
2123 #define PTTYPE 32
2124 #include "paging_tmpl.h"
2125 #undef PTTYPE
2126
2127 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2128 {
2129 struct kvm_mmu *context = &vcpu->arch.mmu;
2130
2131 ASSERT(is_pae(vcpu));
2132 context->new_cr3 = paging_new_cr3;
2133 context->page_fault = paging64_page_fault;
2134 context->gva_to_gpa = paging64_gva_to_gpa;
2135 context->prefetch_page = paging64_prefetch_page;
2136 context->sync_page = paging64_sync_page;
2137 context->invlpg = paging64_invlpg;
2138 context->free = paging_free;
2139 context->root_level = level;
2140 context->shadow_root_level = level;
2141 context->root_hpa = INVALID_PAGE;
2142 return 0;
2143 }
2144
2145 static int paging64_init_context(struct kvm_vcpu *vcpu)
2146 {
2147 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2148 }
2149
2150 static int paging32_init_context(struct kvm_vcpu *vcpu)
2151 {
2152 struct kvm_mmu *context = &vcpu->arch.mmu;
2153
2154 context->new_cr3 = paging_new_cr3;
2155 context->page_fault = paging32_page_fault;
2156 context->gva_to_gpa = paging32_gva_to_gpa;
2157 context->free = paging_free;
2158 context->prefetch_page = paging32_prefetch_page;
2159 context->sync_page = paging32_sync_page;
2160 context->invlpg = paging32_invlpg;
2161 context->root_level = PT32_ROOT_LEVEL;
2162 context->shadow_root_level = PT32E_ROOT_LEVEL;
2163 context->root_hpa = INVALID_PAGE;
2164 return 0;
2165 }
2166
2167 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2168 {
2169 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2170 }
2171
2172 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2173 {
2174 struct kvm_mmu *context = &vcpu->arch.mmu;
2175
2176 context->new_cr3 = nonpaging_new_cr3;
2177 context->page_fault = tdp_page_fault;
2178 context->free = nonpaging_free;
2179 context->prefetch_page = nonpaging_prefetch_page;
2180 context->sync_page = nonpaging_sync_page;
2181 context->invlpg = nonpaging_invlpg;
2182 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2183 context->root_hpa = INVALID_PAGE;
2184
2185 if (!is_paging(vcpu)) {
2186 context->gva_to_gpa = nonpaging_gva_to_gpa;
2187 context->root_level = 0;
2188 } else if (is_long_mode(vcpu)) {
2189 context->gva_to_gpa = paging64_gva_to_gpa;
2190 context->root_level = PT64_ROOT_LEVEL;
2191 } else if (is_pae(vcpu)) {
2192 context->gva_to_gpa = paging64_gva_to_gpa;
2193 context->root_level = PT32E_ROOT_LEVEL;
2194 } else {
2195 context->gva_to_gpa = paging32_gva_to_gpa;
2196 context->root_level = PT32_ROOT_LEVEL;
2197 }
2198
2199 return 0;
2200 }
2201
2202 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2203 {
2204 ASSERT(vcpu);
2205 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2206
2207 if (!is_paging(vcpu))
2208 return nonpaging_init_context(vcpu);
2209 else if (is_long_mode(vcpu))
2210 return paging64_init_context(vcpu);
2211 else if (is_pae(vcpu))
2212 return paging32E_init_context(vcpu);
2213 else
2214 return paging32_init_context(vcpu);
2215 }
2216
2217 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2218 {
2219 vcpu->arch.update_pte.pfn = bad_pfn;
2220
2221 if (tdp_enabled)
2222 return init_kvm_tdp_mmu(vcpu);
2223 else
2224 return init_kvm_softmmu(vcpu);
2225 }
2226
2227 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2228 {
2229 ASSERT(vcpu);
2230 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2231 vcpu->arch.mmu.free(vcpu);
2232 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2233 }
2234 }
2235
2236 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2237 {
2238 destroy_kvm_mmu(vcpu);
2239 return init_kvm_mmu(vcpu);
2240 }
2241 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2242
2243 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2244 {
2245 int r;
2246
2247 r = mmu_topup_memory_caches(vcpu);
2248 if (r)
2249 goto out;
2250 spin_lock(&vcpu->kvm->mmu_lock);
2251 kvm_mmu_free_some_pages(vcpu);
2252 mmu_alloc_roots(vcpu);
2253 mmu_sync_roots(vcpu);
2254 spin_unlock(&vcpu->kvm->mmu_lock);
2255 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2256 kvm_mmu_flush_tlb(vcpu);
2257 out:
2258 return r;
2259 }
2260 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2261
2262 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2263 {
2264 mmu_free_roots(vcpu);
2265 }
2266
2267 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2268 struct kvm_mmu_page *sp,
2269 u64 *spte)
2270 {
2271 u64 pte;
2272 struct kvm_mmu_page *child;
2273
2274 pte = *spte;
2275 if (is_shadow_present_pte(pte)) {
2276 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
2277 is_large_pte(pte))
2278 rmap_remove(vcpu->kvm, spte);
2279 else {
2280 child = page_header(pte & PT64_BASE_ADDR_MASK);
2281 mmu_page_remove_parent_pte(child, spte);
2282 }
2283 }
2284 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
2285 if (is_large_pte(pte))
2286 --vcpu->kvm->stat.lpages;
2287 }
2288
2289 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2290 struct kvm_mmu_page *sp,
2291 u64 *spte,
2292 const void *new)
2293 {
2294 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2295 if (!vcpu->arch.update_pte.largepage ||
2296 sp->role.glevels == PT32_ROOT_LEVEL) {
2297 ++vcpu->kvm->stat.mmu_pde_zapped;
2298 return;
2299 }
2300 }
2301
2302 ++vcpu->kvm->stat.mmu_pte_updated;
2303 if (sp->role.glevels == PT32_ROOT_LEVEL)
2304 paging32_update_pte(vcpu, sp, spte, new);
2305 else
2306 paging64_update_pte(vcpu, sp, spte, new);
2307 }
2308
2309 static bool need_remote_flush(u64 old, u64 new)
2310 {
2311 if (!is_shadow_present_pte(old))
2312 return false;
2313 if (!is_shadow_present_pte(new))
2314 return true;
2315 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2316 return true;
2317 old ^= PT64_NX_MASK;
2318 new ^= PT64_NX_MASK;
2319 return (old & ~new & PT64_PERM_MASK) != 0;
2320 }
2321
2322 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2323 {
2324 if (need_remote_flush(old, new))
2325 kvm_flush_remote_tlbs(vcpu->kvm);
2326 else
2327 kvm_mmu_flush_tlb(vcpu);
2328 }
2329
2330 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2331 {
2332 u64 *spte = vcpu->arch.last_pte_updated;
2333
2334 return !!(spte && (*spte & shadow_accessed_mask));
2335 }
2336
2337 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2338 const u8 *new, int bytes)
2339 {
2340 gfn_t gfn;
2341 int r;
2342 u64 gpte = 0;
2343 pfn_t pfn;
2344
2345 vcpu->arch.update_pte.largepage = 0;
2346
2347 if (bytes != 4 && bytes != 8)
2348 return;
2349
2350 /*
2351 * Assume that the pte write on a page table of the same type
2352 * as the current vcpu paging mode. This is nearly always true
2353 * (might be false while changing modes). Note it is verified later
2354 * by update_pte().
2355 */
2356 if (is_pae(vcpu)) {
2357 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2358 if ((bytes == 4) && (gpa % 4 == 0)) {
2359 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2360 if (r)
2361 return;
2362 memcpy((void *)&gpte + (gpa % 8), new, 4);
2363 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2364 memcpy((void *)&gpte, new, 8);
2365 }
2366 } else {
2367 if ((bytes == 4) && (gpa % 4 == 0))
2368 memcpy((void *)&gpte, new, 4);
2369 }
2370 if (!is_present_pte(gpte))
2371 return;
2372 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2373
2374 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
2375 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2376 vcpu->arch.update_pte.largepage = 1;
2377 }
2378 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2379 smp_rmb();
2380 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2381
2382 if (is_error_pfn(pfn)) {
2383 kvm_release_pfn_clean(pfn);
2384 return;
2385 }
2386 vcpu->arch.update_pte.gfn = gfn;
2387 vcpu->arch.update_pte.pfn = pfn;
2388 }
2389
2390 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2391 {
2392 u64 *spte = vcpu->arch.last_pte_updated;
2393
2394 if (spte
2395 && vcpu->arch.last_pte_gfn == gfn
2396 && shadow_accessed_mask
2397 && !(*spte & shadow_accessed_mask)
2398 && is_shadow_present_pte(*spte))
2399 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2400 }
2401
2402 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2403 const u8 *new, int bytes)
2404 {
2405 gfn_t gfn = gpa >> PAGE_SHIFT;
2406 struct kvm_mmu_page *sp;
2407 struct hlist_node *node, *n;
2408 struct hlist_head *bucket;
2409 unsigned index;
2410 u64 entry, gentry;
2411 u64 *spte;
2412 unsigned offset = offset_in_page(gpa);
2413 unsigned pte_size;
2414 unsigned page_offset;
2415 unsigned misaligned;
2416 unsigned quadrant;
2417 int level;
2418 int flooded = 0;
2419 int npte;
2420 int r;
2421
2422 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2423 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
2424 spin_lock(&vcpu->kvm->mmu_lock);
2425 kvm_mmu_access_page(vcpu, gfn);
2426 kvm_mmu_free_some_pages(vcpu);
2427 ++vcpu->kvm->stat.mmu_pte_write;
2428 kvm_mmu_audit(vcpu, "pre pte write");
2429 if (gfn == vcpu->arch.last_pt_write_gfn
2430 && !last_updated_pte_accessed(vcpu)) {
2431 ++vcpu->arch.last_pt_write_count;
2432 if (vcpu->arch.last_pt_write_count >= 3)
2433 flooded = 1;
2434 } else {
2435 vcpu->arch.last_pt_write_gfn = gfn;
2436 vcpu->arch.last_pt_write_count = 1;
2437 vcpu->arch.last_pte_updated = NULL;
2438 }
2439 index = kvm_page_table_hashfn(gfn);
2440 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2441 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2442 if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
2443 continue;
2444 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2445 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2446 misaligned |= bytes < 4;
2447 if (misaligned || flooded) {
2448 /*
2449 * Misaligned accesses are too much trouble to fix
2450 * up; also, they usually indicate a page is not used
2451 * as a page table.
2452 *
2453 * If we're seeing too many writes to a page,
2454 * it may no longer be a page table, or we may be
2455 * forking, in which case it is better to unmap the
2456 * page.
2457 */
2458 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2459 gpa, bytes, sp->role.word);
2460 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2461 n = bucket->first;
2462 ++vcpu->kvm->stat.mmu_flooded;
2463 continue;
2464 }
2465 page_offset = offset;
2466 level = sp->role.level;
2467 npte = 1;
2468 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2469 page_offset <<= 1; /* 32->64 */
2470 /*
2471 * A 32-bit pde maps 4MB while the shadow pdes map
2472 * only 2MB. So we need to double the offset again
2473 * and zap two pdes instead of one.
2474 */
2475 if (level == PT32_ROOT_LEVEL) {
2476 page_offset &= ~7; /* kill rounding error */
2477 page_offset <<= 1;
2478 npte = 2;
2479 }
2480 quadrant = page_offset >> PAGE_SHIFT;
2481 page_offset &= ~PAGE_MASK;
2482 if (quadrant != sp->role.quadrant)
2483 continue;
2484 }
2485 spte = &sp->spt[page_offset / sizeof(*spte)];
2486 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2487 gentry = 0;
2488 r = kvm_read_guest_atomic(vcpu->kvm,
2489 gpa & ~(u64)(pte_size - 1),
2490 &gentry, pte_size);
2491 new = (const void *)&gentry;
2492 if (r < 0)
2493 new = NULL;
2494 }
2495 while (npte--) {
2496 entry = *spte;
2497 mmu_pte_write_zap_pte(vcpu, sp, spte);
2498 if (new)
2499 mmu_pte_write_new_pte(vcpu, sp, spte, new);
2500 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2501 ++spte;
2502 }
2503 }
2504 kvm_mmu_audit(vcpu, "post pte write");
2505 spin_unlock(&vcpu->kvm->mmu_lock);
2506 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2507 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2508 vcpu->arch.update_pte.pfn = bad_pfn;
2509 }
2510 }
2511
2512 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2513 {
2514 gpa_t gpa;
2515 int r;
2516
2517 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
2518
2519 spin_lock(&vcpu->kvm->mmu_lock);
2520 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2521 spin_unlock(&vcpu->kvm->mmu_lock);
2522 return r;
2523 }
2524 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2525
2526 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2527 {
2528 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
2529 struct kvm_mmu_page *sp;
2530
2531 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2532 struct kvm_mmu_page, link);
2533 kvm_mmu_zap_page(vcpu->kvm, sp);
2534 ++vcpu->kvm->stat.mmu_recycled;
2535 }
2536 }
2537
2538 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2539 {
2540 int r;
2541 enum emulation_result er;
2542
2543 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2544 if (r < 0)
2545 goto out;
2546
2547 if (!r) {
2548 r = 1;
2549 goto out;
2550 }
2551
2552 r = mmu_topup_memory_caches(vcpu);
2553 if (r)
2554 goto out;
2555
2556 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
2557
2558 switch (er) {
2559 case EMULATE_DONE:
2560 return 1;
2561 case EMULATE_DO_MMIO:
2562 ++vcpu->stat.mmio_exits;
2563 return 0;
2564 case EMULATE_FAIL:
2565 kvm_report_emulation_failure(vcpu, "pagetable");
2566 return 1;
2567 default:
2568 BUG();
2569 }
2570 out:
2571 return r;
2572 }
2573 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2574
2575 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2576 {
2577 spin_lock(&vcpu->kvm->mmu_lock);
2578 vcpu->arch.mmu.invlpg(vcpu, gva);
2579 spin_unlock(&vcpu->kvm->mmu_lock);
2580 kvm_mmu_flush_tlb(vcpu);
2581 ++vcpu->stat.invlpg;
2582 }
2583 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2584
2585 void kvm_enable_tdp(void)
2586 {
2587 tdp_enabled = true;
2588 }
2589 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2590
2591 void kvm_disable_tdp(void)
2592 {
2593 tdp_enabled = false;
2594 }
2595 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2596
2597 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2598 {
2599 struct kvm_mmu_page *sp;
2600
2601 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2602 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
2603 struct kvm_mmu_page, link);
2604 kvm_mmu_zap_page(vcpu->kvm, sp);
2605 cond_resched();
2606 }
2607 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2608 }
2609
2610 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2611 {
2612 struct page *page;
2613 int i;
2614
2615 ASSERT(vcpu);
2616
2617 if (vcpu->kvm->arch.n_requested_mmu_pages)
2618 vcpu->kvm->arch.n_free_mmu_pages =
2619 vcpu->kvm->arch.n_requested_mmu_pages;
2620 else
2621 vcpu->kvm->arch.n_free_mmu_pages =
2622 vcpu->kvm->arch.n_alloc_mmu_pages;
2623 /*
2624 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2625 * Therefore we need to allocate shadow page tables in the first
2626 * 4GB of memory, which happens to fit the DMA32 zone.
2627 */
2628 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2629 if (!page)
2630 goto error_1;
2631 vcpu->arch.mmu.pae_root = page_address(page);
2632 for (i = 0; i < 4; ++i)
2633 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2634
2635 return 0;
2636
2637 error_1:
2638 free_mmu_pages(vcpu);
2639 return -ENOMEM;
2640 }
2641
2642 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2643 {
2644 ASSERT(vcpu);
2645 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2646
2647 return alloc_mmu_pages(vcpu);
2648 }
2649
2650 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2651 {
2652 ASSERT(vcpu);
2653 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2654
2655 return init_kvm_mmu(vcpu);
2656 }
2657
2658 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2659 {
2660 ASSERT(vcpu);
2661
2662 destroy_kvm_mmu(vcpu);
2663 free_mmu_pages(vcpu);
2664 mmu_free_memory_caches(vcpu);
2665 }
2666
2667 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2668 {
2669 struct kvm_mmu_page *sp;
2670
2671 spin_lock(&kvm->mmu_lock);
2672 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2673 int i;
2674 u64 *pt;
2675
2676 if (!test_bit(slot, sp->slot_bitmap))
2677 continue;
2678
2679 pt = sp->spt;
2680 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2681 /* avoid RMW */
2682 if (pt[i] & PT_WRITABLE_MASK)
2683 pt[i] &= ~PT_WRITABLE_MASK;
2684 }
2685 kvm_flush_remote_tlbs(kvm);
2686 spin_unlock(&kvm->mmu_lock);
2687 }
2688
2689 void kvm_mmu_zap_all(struct kvm *kvm)
2690 {
2691 struct kvm_mmu_page *sp, *node;
2692
2693 spin_lock(&kvm->mmu_lock);
2694 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2695 if (kvm_mmu_zap_page(kvm, sp))
2696 node = container_of(kvm->arch.active_mmu_pages.next,
2697 struct kvm_mmu_page, link);
2698 spin_unlock(&kvm->mmu_lock);
2699
2700 kvm_flush_remote_tlbs(kvm);
2701 }
2702
2703 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2704 {
2705 struct kvm_mmu_page *page;
2706
2707 page = container_of(kvm->arch.active_mmu_pages.prev,
2708 struct kvm_mmu_page, link);
2709 kvm_mmu_zap_page(kvm, page);
2710 }
2711
2712 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2713 {
2714 struct kvm *kvm;
2715 struct kvm *kvm_freed = NULL;
2716 int cache_count = 0;
2717
2718 spin_lock(&kvm_lock);
2719
2720 list_for_each_entry(kvm, &vm_list, vm_list) {
2721 int npages;
2722
2723 if (!down_read_trylock(&kvm->slots_lock))
2724 continue;
2725 spin_lock(&kvm->mmu_lock);
2726 npages = kvm->arch.n_alloc_mmu_pages -
2727 kvm->arch.n_free_mmu_pages;
2728 cache_count += npages;
2729 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2730 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2731 cache_count--;
2732 kvm_freed = kvm;
2733 }
2734 nr_to_scan--;
2735
2736 spin_unlock(&kvm->mmu_lock);
2737 up_read(&kvm->slots_lock);
2738 }
2739 if (kvm_freed)
2740 list_move_tail(&kvm_freed->vm_list, &vm_list);
2741
2742 spin_unlock(&kvm_lock);
2743
2744 return cache_count;
2745 }
2746
2747 static struct shrinker mmu_shrinker = {
2748 .shrink = mmu_shrink,
2749 .seeks = DEFAULT_SEEKS * 10,
2750 };
2751
2752 static void mmu_destroy_caches(void)
2753 {
2754 if (pte_chain_cache)
2755 kmem_cache_destroy(pte_chain_cache);
2756 if (rmap_desc_cache)
2757 kmem_cache_destroy(rmap_desc_cache);
2758 if (mmu_page_header_cache)
2759 kmem_cache_destroy(mmu_page_header_cache);
2760 }
2761
2762 void kvm_mmu_module_exit(void)
2763 {
2764 mmu_destroy_caches();
2765 unregister_shrinker(&mmu_shrinker);
2766 }
2767
2768 int kvm_mmu_module_init(void)
2769 {
2770 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2771 sizeof(struct kvm_pte_chain),
2772 0, 0, NULL);
2773 if (!pte_chain_cache)
2774 goto nomem;
2775 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2776 sizeof(struct kvm_rmap_desc),
2777 0, 0, NULL);
2778 if (!rmap_desc_cache)
2779 goto nomem;
2780
2781 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2782 sizeof(struct kvm_mmu_page),
2783 0, 0, NULL);
2784 if (!mmu_page_header_cache)
2785 goto nomem;
2786
2787 register_shrinker(&mmu_shrinker);
2788
2789 return 0;
2790
2791 nomem:
2792 mmu_destroy_caches();
2793 return -ENOMEM;
2794 }
2795
2796 /*
2797 * Caculate mmu pages needed for kvm.
2798 */
2799 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2800 {
2801 int i;
2802 unsigned int nr_mmu_pages;
2803 unsigned int nr_pages = 0;
2804
2805 for (i = 0; i < kvm->nmemslots; i++)
2806 nr_pages += kvm->memslots[i].npages;
2807
2808 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2809 nr_mmu_pages = max(nr_mmu_pages,
2810 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2811
2812 return nr_mmu_pages;
2813 }
2814
2815 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2816 unsigned len)
2817 {
2818 if (len > buffer->len)
2819 return NULL;
2820 return buffer->ptr;
2821 }
2822
2823 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2824 unsigned len)
2825 {
2826 void *ret;
2827
2828 ret = pv_mmu_peek_buffer(buffer, len);
2829 if (!ret)
2830 return ret;
2831 buffer->ptr += len;
2832 buffer->len -= len;
2833 buffer->processed += len;
2834 return ret;
2835 }
2836
2837 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2838 gpa_t addr, gpa_t value)
2839 {
2840 int bytes = 8;
2841 int r;
2842
2843 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2844 bytes = 4;
2845
2846 r = mmu_topup_memory_caches(vcpu);
2847 if (r)
2848 return r;
2849
2850 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2851 return -EFAULT;
2852
2853 return 1;
2854 }
2855
2856 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2857 {
2858 kvm_x86_ops->tlb_flush(vcpu);
2859 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
2860 return 1;
2861 }
2862
2863 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2864 {
2865 spin_lock(&vcpu->kvm->mmu_lock);
2866 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2867 spin_unlock(&vcpu->kvm->mmu_lock);
2868 return 1;
2869 }
2870
2871 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2872 struct kvm_pv_mmu_op_buffer *buffer)
2873 {
2874 struct kvm_mmu_op_header *header;
2875
2876 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2877 if (!header)
2878 return 0;
2879 switch (header->op) {
2880 case KVM_MMU_OP_WRITE_PTE: {
2881 struct kvm_mmu_op_write_pte *wpte;
2882
2883 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2884 if (!wpte)
2885 return 0;
2886 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2887 wpte->pte_val);
2888 }
2889 case KVM_MMU_OP_FLUSH_TLB: {
2890 struct kvm_mmu_op_flush_tlb *ftlb;
2891
2892 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2893 if (!ftlb)
2894 return 0;
2895 return kvm_pv_mmu_flush_tlb(vcpu);
2896 }
2897 case KVM_MMU_OP_RELEASE_PT: {
2898 struct kvm_mmu_op_release_pt *rpt;
2899
2900 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2901 if (!rpt)
2902 return 0;
2903 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2904 }
2905 default: return 0;
2906 }
2907 }
2908
2909 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2910 gpa_t addr, unsigned long *ret)
2911 {
2912 int r;
2913 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2914
2915 buffer->ptr = buffer->buf;
2916 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
2917 buffer->processed = 0;
2918
2919 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2920 if (r)
2921 goto out;
2922
2923 while (buffer->len) {
2924 r = kvm_pv_mmu_op_one(vcpu, buffer);
2925 if (r < 0)
2926 goto out;
2927 if (r == 0)
2928 break;
2929 }
2930
2931 r = 1;
2932 out:
2933 *ret = buffer->processed;
2934 return r;
2935 }
2936
2937 #ifdef AUDIT
2938
2939 static const char *audit_msg;
2940
2941 static gva_t canonicalize(gva_t gva)
2942 {
2943 #ifdef CONFIG_X86_64
2944 gva = (long long)(gva << 16) >> 16;
2945 #endif
2946 return gva;
2947 }
2948
2949 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
2950 gva_t va, int level)
2951 {
2952 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
2953 int i;
2954 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
2955
2956 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
2957 u64 ent = pt[i];
2958
2959 if (ent == shadow_trap_nonpresent_pte)
2960 continue;
2961
2962 va = canonicalize(va);
2963 if (level > 1) {
2964 if (ent == shadow_notrap_nonpresent_pte)
2965 printk(KERN_ERR "audit: (%s) nontrapping pte"
2966 " in nonleaf level: levels %d gva %lx"
2967 " level %d pte %llx\n", audit_msg,
2968 vcpu->arch.mmu.root_level, va, level, ent);
2969
2970 audit_mappings_page(vcpu, ent, va, level - 1);
2971 } else {
2972 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
2973 hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
2974
2975 if (is_shadow_present_pte(ent)
2976 && (ent & PT64_BASE_ADDR_MASK) != hpa)
2977 printk(KERN_ERR "xx audit error: (%s) levels %d"
2978 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
2979 audit_msg, vcpu->arch.mmu.root_level,
2980 va, gpa, hpa, ent,
2981 is_shadow_present_pte(ent));
2982 else if (ent == shadow_notrap_nonpresent_pte
2983 && !is_error_hpa(hpa))
2984 printk(KERN_ERR "audit: (%s) notrap shadow,"
2985 " valid guest gva %lx\n", audit_msg, va);
2986 kvm_release_pfn_clean(pfn);
2987
2988 }
2989 }
2990 }
2991
2992 static void audit_mappings(struct kvm_vcpu *vcpu)
2993 {
2994 unsigned i;
2995
2996 if (vcpu->arch.mmu.root_level == 4)
2997 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
2998 else
2999 for (i = 0; i < 4; ++i)
3000 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3001 audit_mappings_page(vcpu,
3002 vcpu->arch.mmu.pae_root[i],
3003 i << 30,
3004 2);
3005 }
3006
3007 static int count_rmaps(struct kvm_vcpu *vcpu)
3008 {
3009 int nmaps = 0;
3010 int i, j, k;
3011
3012 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3013 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3014 struct kvm_rmap_desc *d;
3015
3016 for (j = 0; j < m->npages; ++j) {
3017 unsigned long *rmapp = &m->rmap[j];
3018
3019 if (!*rmapp)
3020 continue;
3021 if (!(*rmapp & 1)) {
3022 ++nmaps;
3023 continue;
3024 }
3025 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3026 while (d) {
3027 for (k = 0; k < RMAP_EXT; ++k)
3028 if (d->shadow_ptes[k])
3029 ++nmaps;
3030 else
3031 break;
3032 d = d->more;
3033 }
3034 }
3035 }
3036 return nmaps;
3037 }
3038
3039 static int count_writable_mappings(struct kvm_vcpu *vcpu)
3040 {
3041 int nmaps = 0;
3042 struct kvm_mmu_page *sp;
3043 int i;
3044
3045 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3046 u64 *pt = sp->spt;
3047
3048 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3049 continue;
3050
3051 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3052 u64 ent = pt[i];
3053
3054 if (!(ent & PT_PRESENT_MASK))
3055 continue;
3056 if (!(ent & PT_WRITABLE_MASK))
3057 continue;
3058 ++nmaps;
3059 }
3060 }
3061 return nmaps;
3062 }
3063
3064 static void audit_rmap(struct kvm_vcpu *vcpu)
3065 {
3066 int n_rmap = count_rmaps(vcpu);
3067 int n_actual = count_writable_mappings(vcpu);
3068
3069 if (n_rmap != n_actual)
3070 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
3071 __func__, audit_msg, n_rmap, n_actual);
3072 }
3073
3074 static void audit_write_protection(struct kvm_vcpu *vcpu)
3075 {
3076 struct kvm_mmu_page *sp;
3077 struct kvm_memory_slot *slot;
3078 unsigned long *rmapp;
3079 gfn_t gfn;
3080
3081 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3082 if (sp->role.metaphysical)
3083 continue;
3084
3085 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3086 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3087 rmapp = &slot->rmap[gfn - slot->base_gfn];
3088 if (*rmapp)
3089 printk(KERN_ERR "%s: (%s) shadow page has writable"
3090 " mappings: gfn %lx role %x\n",
3091 __func__, audit_msg, sp->gfn,
3092 sp->role.word);
3093 }
3094 }
3095
3096 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3097 {
3098 int olddbg = dbg;
3099
3100 dbg = 0;
3101 audit_msg = msg;
3102 audit_rmap(vcpu);
3103 audit_write_protection(vcpu);
3104 audit_mappings(vcpu);
3105 dbg = olddbg;
3106 }
3107
3108 #endif
This page took 0.094611 seconds and 6 git commands to generate.