2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
24 #include "kvm_cache_regs.h"
27 #include <linux/kvm_host.h>
28 #include <linux/types.h>
29 #include <linux/string.h>
31 #include <linux/highmem.h>
32 #include <linux/module.h>
33 #include <linux/swap.h>
34 #include <linux/hugetlb.h>
35 #include <linux/compiler.h>
36 #include <linux/srcu.h>
37 #include <linux/slab.h>
38 #include <linux/uaccess.h>
41 #include <asm/cmpxchg.h>
46 * When setting this variable to true it enables Two-Dimensional-Paging
47 * where the hardware walks 2 page tables:
48 * 1. the guest-virtual to guest-physical
49 * 2. while doing 1. it walks guest-physical to host-physical
50 * If the hardware supports that we don't need to do shadow paging.
52 bool tdp_enabled
= false;
56 AUDIT_POST_PAGE_FAULT
,
67 module_param(dbg
, bool, 0644);
69 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
70 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
71 #define MMU_WARN_ON(x) WARN_ON(x)
73 #define pgprintk(x...) do { } while (0)
74 #define rmap_printk(x...) do { } while (0)
75 #define MMU_WARN_ON(x) do { } while (0)
78 #define PTE_PREFETCH_NUM 8
80 #define PT_FIRST_AVAIL_BITS_SHIFT 10
81 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
83 #define PT64_LEVEL_BITS 9
85 #define PT64_LEVEL_SHIFT(level) \
86 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
88 #define PT64_INDEX(address, level)\
89 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
92 #define PT32_LEVEL_BITS 10
94 #define PT32_LEVEL_SHIFT(level) \
95 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
97 #define PT32_LVL_OFFSET_MASK(level) \
98 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
99 * PT32_LEVEL_BITS))) - 1))
101 #define PT32_INDEX(address, level)\
102 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
105 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
106 #define PT64_DIR_BASE_ADDR_MASK \
107 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
108 #define PT64_LVL_ADDR_MASK(level) \
109 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
110 * PT64_LEVEL_BITS))) - 1))
111 #define PT64_LVL_OFFSET_MASK(level) \
112 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
113 * PT64_LEVEL_BITS))) - 1))
115 #define PT32_BASE_ADDR_MASK PAGE_MASK
116 #define PT32_DIR_BASE_ADDR_MASK \
117 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
118 #define PT32_LVL_ADDR_MASK(level) \
119 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
120 * PT32_LEVEL_BITS))) - 1))
122 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | shadow_user_mask \
123 | shadow_x_mask | shadow_nx_mask)
125 #define ACC_EXEC_MASK 1
126 #define ACC_WRITE_MASK PT_WRITABLE_MASK
127 #define ACC_USER_MASK PT_USER_MASK
128 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
130 #include <trace/events/kvm.h>
132 #define CREATE_TRACE_POINTS
133 #include "mmutrace.h"
135 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
136 #define SPTE_MMU_WRITEABLE (1ULL << (PT_FIRST_AVAIL_BITS_SHIFT + 1))
138 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
140 /* make pte_list_desc fit well in cache line */
141 #define PTE_LIST_EXT 3
143 struct pte_list_desc
{
144 u64
*sptes
[PTE_LIST_EXT
];
145 struct pte_list_desc
*more
;
148 struct kvm_shadow_walk_iterator
{
156 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
157 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
158 shadow_walk_okay(&(_walker)); \
159 shadow_walk_next(&(_walker)))
161 #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \
162 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
163 shadow_walk_okay(&(_walker)) && \
164 ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \
165 __shadow_walk_next(&(_walker), spte))
167 static struct kmem_cache
*pte_list_desc_cache
;
168 static struct kmem_cache
*mmu_page_header_cache
;
169 static struct percpu_counter kvm_total_used_mmu_pages
;
171 static u64 __read_mostly shadow_nx_mask
;
172 static u64 __read_mostly shadow_x_mask
; /* mutual exclusive with nx_mask */
173 static u64 __read_mostly shadow_user_mask
;
174 static u64 __read_mostly shadow_accessed_mask
;
175 static u64 __read_mostly shadow_dirty_mask
;
176 static u64 __read_mostly shadow_mmio_mask
;
178 static void mmu_spte_set(u64
*sptep
, u64 spte
);
179 static void mmu_free_roots(struct kvm_vcpu
*vcpu
);
181 void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask
)
183 shadow_mmio_mask
= mmio_mask
;
185 EXPORT_SYMBOL_GPL(kvm_mmu_set_mmio_spte_mask
);
188 * the low bit of the generation number is always presumed to be zero.
189 * This disables mmio caching during memslot updates. The concept is
190 * similar to a seqcount but instead of retrying the access we just punt
191 * and ignore the cache.
193 * spte bits 3-11 are used as bits 1-9 of the generation number,
194 * the bits 52-61 are used as bits 10-19 of the generation number.
196 #define MMIO_SPTE_GEN_LOW_SHIFT 2
197 #define MMIO_SPTE_GEN_HIGH_SHIFT 52
199 #define MMIO_GEN_SHIFT 20
200 #define MMIO_GEN_LOW_SHIFT 10
201 #define MMIO_GEN_LOW_MASK ((1 << MMIO_GEN_LOW_SHIFT) - 2)
202 #define MMIO_GEN_MASK ((1 << MMIO_GEN_SHIFT) - 1)
204 static u64
generation_mmio_spte_mask(unsigned int gen
)
208 WARN_ON(gen
& ~MMIO_GEN_MASK
);
210 mask
= (gen
& MMIO_GEN_LOW_MASK
) << MMIO_SPTE_GEN_LOW_SHIFT
;
211 mask
|= ((u64
)gen
>> MMIO_GEN_LOW_SHIFT
) << MMIO_SPTE_GEN_HIGH_SHIFT
;
215 static unsigned int get_mmio_spte_generation(u64 spte
)
219 spte
&= ~shadow_mmio_mask
;
221 gen
= (spte
>> MMIO_SPTE_GEN_LOW_SHIFT
) & MMIO_GEN_LOW_MASK
;
222 gen
|= (spte
>> MMIO_SPTE_GEN_HIGH_SHIFT
) << MMIO_GEN_LOW_SHIFT
;
226 static unsigned int kvm_current_mmio_generation(struct kvm_vcpu
*vcpu
)
228 return kvm_vcpu_memslots(vcpu
)->generation
& MMIO_GEN_MASK
;
231 static void mark_mmio_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
, u64 gfn
,
234 unsigned int gen
= kvm_current_mmio_generation(vcpu
);
235 u64 mask
= generation_mmio_spte_mask(gen
);
237 access
&= ACC_WRITE_MASK
| ACC_USER_MASK
;
238 mask
|= shadow_mmio_mask
| access
| gfn
<< PAGE_SHIFT
;
240 trace_mark_mmio_spte(sptep
, gfn
, access
, gen
);
241 mmu_spte_set(sptep
, mask
);
244 static bool is_mmio_spte(u64 spte
)
246 return (spte
& shadow_mmio_mask
) == shadow_mmio_mask
;
249 static gfn_t
get_mmio_spte_gfn(u64 spte
)
251 u64 mask
= generation_mmio_spte_mask(MMIO_GEN_MASK
) | shadow_mmio_mask
;
252 return (spte
& ~mask
) >> PAGE_SHIFT
;
255 static unsigned get_mmio_spte_access(u64 spte
)
257 u64 mask
= generation_mmio_spte_mask(MMIO_GEN_MASK
) | shadow_mmio_mask
;
258 return (spte
& ~mask
) & ~PAGE_MASK
;
261 static bool set_mmio_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
, gfn_t gfn
,
262 pfn_t pfn
, unsigned access
)
264 if (unlikely(is_noslot_pfn(pfn
))) {
265 mark_mmio_spte(vcpu
, sptep
, gfn
, access
);
272 static bool check_mmio_spte(struct kvm_vcpu
*vcpu
, u64 spte
)
274 unsigned int kvm_gen
, spte_gen
;
276 kvm_gen
= kvm_current_mmio_generation(vcpu
);
277 spte_gen
= get_mmio_spte_generation(spte
);
279 trace_check_mmio_spte(spte
, kvm_gen
, spte_gen
);
280 return likely(kvm_gen
== spte_gen
);
283 void kvm_mmu_set_mask_ptes(u64 user_mask
, u64 accessed_mask
,
284 u64 dirty_mask
, u64 nx_mask
, u64 x_mask
)
286 shadow_user_mask
= user_mask
;
287 shadow_accessed_mask
= accessed_mask
;
288 shadow_dirty_mask
= dirty_mask
;
289 shadow_nx_mask
= nx_mask
;
290 shadow_x_mask
= x_mask
;
292 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes
);
294 static int is_cpuid_PSE36(void)
299 static int is_nx(struct kvm_vcpu
*vcpu
)
301 return vcpu
->arch
.efer
& EFER_NX
;
304 static int is_shadow_present_pte(u64 pte
)
306 return pte
& PT_PRESENT_MASK
&& !is_mmio_spte(pte
);
309 static int is_large_pte(u64 pte
)
311 return pte
& PT_PAGE_SIZE_MASK
;
314 static int is_rmap_spte(u64 pte
)
316 return is_shadow_present_pte(pte
);
319 static int is_last_spte(u64 pte
, int level
)
321 if (level
== PT_PAGE_TABLE_LEVEL
)
323 if (is_large_pte(pte
))
328 static pfn_t
spte_to_pfn(u64 pte
)
330 return (pte
& PT64_BASE_ADDR_MASK
) >> PAGE_SHIFT
;
333 static gfn_t
pse36_gfn_delta(u32 gpte
)
335 int shift
= 32 - PT32_DIR_PSE36_SHIFT
- PAGE_SHIFT
;
337 return (gpte
& PT32_DIR_PSE36_MASK
) << shift
;
341 static void __set_spte(u64
*sptep
, u64 spte
)
346 static void __update_clear_spte_fast(u64
*sptep
, u64 spte
)
351 static u64
__update_clear_spte_slow(u64
*sptep
, u64 spte
)
353 return xchg(sptep
, spte
);
356 static u64
__get_spte_lockless(u64
*sptep
)
358 return ACCESS_ONCE(*sptep
);
369 static void count_spte_clear(u64
*sptep
, u64 spte
)
371 struct kvm_mmu_page
*sp
= page_header(__pa(sptep
));
373 if (is_shadow_present_pte(spte
))
376 /* Ensure the spte is completely set before we increase the count */
378 sp
->clear_spte_count
++;
381 static void __set_spte(u64
*sptep
, u64 spte
)
383 union split_spte
*ssptep
, sspte
;
385 ssptep
= (union split_spte
*)sptep
;
386 sspte
= (union split_spte
)spte
;
388 ssptep
->spte_high
= sspte
.spte_high
;
391 * If we map the spte from nonpresent to present, We should store
392 * the high bits firstly, then set present bit, so cpu can not
393 * fetch this spte while we are setting the spte.
397 ssptep
->spte_low
= sspte
.spte_low
;
400 static void __update_clear_spte_fast(u64
*sptep
, u64 spte
)
402 union split_spte
*ssptep
, sspte
;
404 ssptep
= (union split_spte
*)sptep
;
405 sspte
= (union split_spte
)spte
;
407 ssptep
->spte_low
= sspte
.spte_low
;
410 * If we map the spte from present to nonpresent, we should clear
411 * present bit firstly to avoid vcpu fetch the old high bits.
415 ssptep
->spte_high
= sspte
.spte_high
;
416 count_spte_clear(sptep
, spte
);
419 static u64
__update_clear_spte_slow(u64
*sptep
, u64 spte
)
421 union split_spte
*ssptep
, sspte
, orig
;
423 ssptep
= (union split_spte
*)sptep
;
424 sspte
= (union split_spte
)spte
;
426 /* xchg acts as a barrier before the setting of the high bits */
427 orig
.spte_low
= xchg(&ssptep
->spte_low
, sspte
.spte_low
);
428 orig
.spte_high
= ssptep
->spte_high
;
429 ssptep
->spte_high
= sspte
.spte_high
;
430 count_spte_clear(sptep
, spte
);
436 * The idea using the light way get the spte on x86_32 guest is from
437 * gup_get_pte(arch/x86/mm/gup.c).
439 * An spte tlb flush may be pending, because kvm_set_pte_rmapp
440 * coalesces them and we are running out of the MMU lock. Therefore
441 * we need to protect against in-progress updates of the spte.
443 * Reading the spte while an update is in progress may get the old value
444 * for the high part of the spte. The race is fine for a present->non-present
445 * change (because the high part of the spte is ignored for non-present spte),
446 * but for a present->present change we must reread the spte.
448 * All such changes are done in two steps (present->non-present and
449 * non-present->present), hence it is enough to count the number of
450 * present->non-present updates: if it changed while reading the spte,
451 * we might have hit the race. This is done using clear_spte_count.
453 static u64
__get_spte_lockless(u64
*sptep
)
455 struct kvm_mmu_page
*sp
= page_header(__pa(sptep
));
456 union split_spte spte
, *orig
= (union split_spte
*)sptep
;
460 count
= sp
->clear_spte_count
;
463 spte
.spte_low
= orig
->spte_low
;
466 spte
.spte_high
= orig
->spte_high
;
469 if (unlikely(spte
.spte_low
!= orig
->spte_low
||
470 count
!= sp
->clear_spte_count
))
477 static bool spte_is_locklessly_modifiable(u64 spte
)
479 return (spte
& (SPTE_HOST_WRITEABLE
| SPTE_MMU_WRITEABLE
)) ==
480 (SPTE_HOST_WRITEABLE
| SPTE_MMU_WRITEABLE
);
483 static bool spte_has_volatile_bits(u64 spte
)
486 * Always atomicly update spte if it can be updated
487 * out of mmu-lock, it can ensure dirty bit is not lost,
488 * also, it can help us to get a stable is_writable_pte()
489 * to ensure tlb flush is not missed.
491 if (spte_is_locklessly_modifiable(spte
))
494 if (!shadow_accessed_mask
)
497 if (!is_shadow_present_pte(spte
))
500 if ((spte
& shadow_accessed_mask
) &&
501 (!is_writable_pte(spte
) || (spte
& shadow_dirty_mask
)))
507 static bool spte_is_bit_cleared(u64 old_spte
, u64 new_spte
, u64 bit_mask
)
509 return (old_spte
& bit_mask
) && !(new_spte
& bit_mask
);
512 static bool spte_is_bit_changed(u64 old_spte
, u64 new_spte
, u64 bit_mask
)
514 return (old_spte
& bit_mask
) != (new_spte
& bit_mask
);
517 /* Rules for using mmu_spte_set:
518 * Set the sptep from nonpresent to present.
519 * Note: the sptep being assigned *must* be either not present
520 * or in a state where the hardware will not attempt to update
523 static void mmu_spte_set(u64
*sptep
, u64 new_spte
)
525 WARN_ON(is_shadow_present_pte(*sptep
));
526 __set_spte(sptep
, new_spte
);
529 /* Rules for using mmu_spte_update:
530 * Update the state bits, it means the mapped pfn is not changged.
532 * Whenever we overwrite a writable spte with a read-only one we
533 * should flush remote TLBs. Otherwise rmap_write_protect
534 * will find a read-only spte, even though the writable spte
535 * might be cached on a CPU's TLB, the return value indicates this
538 static bool mmu_spte_update(u64
*sptep
, u64 new_spte
)
540 u64 old_spte
= *sptep
;
543 WARN_ON(!is_rmap_spte(new_spte
));
545 if (!is_shadow_present_pte(old_spte
)) {
546 mmu_spte_set(sptep
, new_spte
);
550 if (!spte_has_volatile_bits(old_spte
))
551 __update_clear_spte_fast(sptep
, new_spte
);
553 old_spte
= __update_clear_spte_slow(sptep
, new_spte
);
556 * For the spte updated out of mmu-lock is safe, since
557 * we always atomicly update it, see the comments in
558 * spte_has_volatile_bits().
560 if (spte_is_locklessly_modifiable(old_spte
) &&
561 !is_writable_pte(new_spte
))
564 if (!shadow_accessed_mask
)
568 * Flush TLB when accessed/dirty bits are changed in the page tables,
569 * to guarantee consistency between TLB and page tables.
571 if (spte_is_bit_changed(old_spte
, new_spte
,
572 shadow_accessed_mask
| shadow_dirty_mask
))
575 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_accessed_mask
))
576 kvm_set_pfn_accessed(spte_to_pfn(old_spte
));
577 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_dirty_mask
))
578 kvm_set_pfn_dirty(spte_to_pfn(old_spte
));
584 * Rules for using mmu_spte_clear_track_bits:
585 * It sets the sptep from present to nonpresent, and track the
586 * state bits, it is used to clear the last level sptep.
588 static int mmu_spte_clear_track_bits(u64
*sptep
)
591 u64 old_spte
= *sptep
;
593 if (!spte_has_volatile_bits(old_spte
))
594 __update_clear_spte_fast(sptep
, 0ull);
596 old_spte
= __update_clear_spte_slow(sptep
, 0ull);
598 if (!is_rmap_spte(old_spte
))
601 pfn
= spte_to_pfn(old_spte
);
604 * KVM does not hold the refcount of the page used by
605 * kvm mmu, before reclaiming the page, we should
606 * unmap it from mmu first.
608 WARN_ON(!kvm_is_reserved_pfn(pfn
) && !page_count(pfn_to_page(pfn
)));
610 if (!shadow_accessed_mask
|| old_spte
& shadow_accessed_mask
)
611 kvm_set_pfn_accessed(pfn
);
612 if (!shadow_dirty_mask
|| (old_spte
& shadow_dirty_mask
))
613 kvm_set_pfn_dirty(pfn
);
618 * Rules for using mmu_spte_clear_no_track:
619 * Directly clear spte without caring the state bits of sptep,
620 * it is used to set the upper level spte.
622 static void mmu_spte_clear_no_track(u64
*sptep
)
624 __update_clear_spte_fast(sptep
, 0ull);
627 static u64
mmu_spte_get_lockless(u64
*sptep
)
629 return __get_spte_lockless(sptep
);
632 static void walk_shadow_page_lockless_begin(struct kvm_vcpu
*vcpu
)
635 * Prevent page table teardown by making any free-er wait during
636 * kvm_flush_remote_tlbs() IPI to all active vcpus.
639 vcpu
->mode
= READING_SHADOW_PAGE_TABLES
;
641 * Make sure a following spte read is not reordered ahead of the write
647 static void walk_shadow_page_lockless_end(struct kvm_vcpu
*vcpu
)
650 * Make sure the write to vcpu->mode is not reordered in front of
651 * reads to sptes. If it does, kvm_commit_zap_page() can see us
652 * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
655 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
659 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache
*cache
,
660 struct kmem_cache
*base_cache
, int min
)
664 if (cache
->nobjs
>= min
)
666 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
667 obj
= kmem_cache_zalloc(base_cache
, GFP_KERNEL
);
670 cache
->objects
[cache
->nobjs
++] = obj
;
675 static int mmu_memory_cache_free_objects(struct kvm_mmu_memory_cache
*cache
)
680 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache
*mc
,
681 struct kmem_cache
*cache
)
684 kmem_cache_free(cache
, mc
->objects
[--mc
->nobjs
]);
687 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache
*cache
,
692 if (cache
->nobjs
>= min
)
694 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
695 page
= (void *)__get_free_page(GFP_KERNEL
);
698 cache
->objects
[cache
->nobjs
++] = page
;
703 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache
*mc
)
706 free_page((unsigned long)mc
->objects
[--mc
->nobjs
]);
709 static int mmu_topup_memory_caches(struct kvm_vcpu
*vcpu
)
713 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_pte_list_desc_cache
,
714 pte_list_desc_cache
, 8 + PTE_PREFETCH_NUM
);
717 r
= mmu_topup_memory_cache_page(&vcpu
->arch
.mmu_page_cache
, 8);
720 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
721 mmu_page_header_cache
, 4);
726 static void mmu_free_memory_caches(struct kvm_vcpu
*vcpu
)
728 mmu_free_memory_cache(&vcpu
->arch
.mmu_pte_list_desc_cache
,
729 pte_list_desc_cache
);
730 mmu_free_memory_cache_page(&vcpu
->arch
.mmu_page_cache
);
731 mmu_free_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
732 mmu_page_header_cache
);
735 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache
*mc
)
740 p
= mc
->objects
[--mc
->nobjs
];
744 static struct pte_list_desc
*mmu_alloc_pte_list_desc(struct kvm_vcpu
*vcpu
)
746 return mmu_memory_cache_alloc(&vcpu
->arch
.mmu_pte_list_desc_cache
);
749 static void mmu_free_pte_list_desc(struct pte_list_desc
*pte_list_desc
)
751 kmem_cache_free(pte_list_desc_cache
, pte_list_desc
);
754 static gfn_t
kvm_mmu_page_get_gfn(struct kvm_mmu_page
*sp
, int index
)
756 if (!sp
->role
.direct
)
757 return sp
->gfns
[index
];
759 return sp
->gfn
+ (index
<< ((sp
->role
.level
- 1) * PT64_LEVEL_BITS
));
762 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page
*sp
, int index
, gfn_t gfn
)
765 BUG_ON(gfn
!= kvm_mmu_page_get_gfn(sp
, index
));
767 sp
->gfns
[index
] = gfn
;
771 * Return the pointer to the large page information for a given gfn,
772 * handling slots that are not large page aligned.
774 static struct kvm_lpage_info
*lpage_info_slot(gfn_t gfn
,
775 struct kvm_memory_slot
*slot
,
780 idx
= gfn_to_index(gfn
, slot
->base_gfn
, level
);
781 return &slot
->arch
.lpage_info
[level
- 2][idx
];
784 static void account_shadowed(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
786 struct kvm_memslots
*slots
;
787 struct kvm_memory_slot
*slot
;
788 struct kvm_lpage_info
*linfo
;
793 slots
= kvm_memslots_for_spte_role(kvm
, sp
->role
);
794 slot
= __gfn_to_memslot(slots
, gfn
);
795 for (i
= PT_DIRECTORY_LEVEL
; i
<= PT_MAX_HUGEPAGE_LEVEL
; ++i
) {
796 linfo
= lpage_info_slot(gfn
, slot
, i
);
797 linfo
->write_count
+= 1;
799 kvm
->arch
.indirect_shadow_pages
++;
802 static void unaccount_shadowed(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
804 struct kvm_memslots
*slots
;
805 struct kvm_memory_slot
*slot
;
806 struct kvm_lpage_info
*linfo
;
811 slots
= kvm_memslots_for_spte_role(kvm
, sp
->role
);
812 slot
= __gfn_to_memslot(slots
, gfn
);
813 for (i
= PT_DIRECTORY_LEVEL
; i
<= PT_MAX_HUGEPAGE_LEVEL
; ++i
) {
814 linfo
= lpage_info_slot(gfn
, slot
, i
);
815 linfo
->write_count
-= 1;
816 WARN_ON(linfo
->write_count
< 0);
818 kvm
->arch
.indirect_shadow_pages
--;
821 static int has_wrprotected_page(struct kvm_vcpu
*vcpu
,
825 struct kvm_memory_slot
*slot
;
826 struct kvm_lpage_info
*linfo
;
828 slot
= kvm_vcpu_gfn_to_memslot(vcpu
, gfn
);
830 linfo
= lpage_info_slot(gfn
, slot
, level
);
831 return linfo
->write_count
;
837 static int host_mapping_level(struct kvm
*kvm
, gfn_t gfn
)
839 unsigned long page_size
;
842 page_size
= kvm_host_page_size(kvm
, gfn
);
844 for (i
= PT_PAGE_TABLE_LEVEL
; i
<= PT_MAX_HUGEPAGE_LEVEL
; ++i
) {
845 if (page_size
>= KVM_HPAGE_SIZE(i
))
854 static struct kvm_memory_slot
*
855 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
858 struct kvm_memory_slot
*slot
;
860 slot
= kvm_vcpu_gfn_to_memslot(vcpu
, gfn
);
861 if (!slot
|| slot
->flags
& KVM_MEMSLOT_INVALID
||
862 (no_dirty_log
&& slot
->dirty_bitmap
))
868 static bool mapping_level_dirty_bitmap(struct kvm_vcpu
*vcpu
, gfn_t large_gfn
)
870 return !gfn_to_memslot_dirty_bitmap(vcpu
, large_gfn
, true);
873 static int mapping_level(struct kvm_vcpu
*vcpu
, gfn_t large_gfn
,
874 bool *force_pt_level
)
876 int host_level
, level
, max_level
;
878 if (likely(!*force_pt_level
))
879 *force_pt_level
= mapping_level_dirty_bitmap(vcpu
, large_gfn
);
880 if (unlikely(*force_pt_level
))
881 return PT_PAGE_TABLE_LEVEL
;
883 host_level
= host_mapping_level(vcpu
->kvm
, large_gfn
);
885 if (host_level
== PT_PAGE_TABLE_LEVEL
)
888 max_level
= min(kvm_x86_ops
->get_lpage_level(), host_level
);
890 for (level
= PT_DIRECTORY_LEVEL
; level
<= max_level
; ++level
)
891 if (has_wrprotected_page(vcpu
, large_gfn
, level
))
898 * Pte mapping structures:
900 * If pte_list bit zero is zero, then pte_list point to the spte.
902 * If pte_list bit zero is one, (then pte_list & ~1) points to a struct
903 * pte_list_desc containing more mappings.
905 * Returns the number of pte entries before the spte was added or zero if
906 * the spte was not added.
909 static int pte_list_add(struct kvm_vcpu
*vcpu
, u64
*spte
,
910 unsigned long *pte_list
)
912 struct pte_list_desc
*desc
;
916 rmap_printk("pte_list_add: %p %llx 0->1\n", spte
, *spte
);
917 *pte_list
= (unsigned long)spte
;
918 } else if (!(*pte_list
& 1)) {
919 rmap_printk("pte_list_add: %p %llx 1->many\n", spte
, *spte
);
920 desc
= mmu_alloc_pte_list_desc(vcpu
);
921 desc
->sptes
[0] = (u64
*)*pte_list
;
922 desc
->sptes
[1] = spte
;
923 *pte_list
= (unsigned long)desc
| 1;
926 rmap_printk("pte_list_add: %p %llx many->many\n", spte
, *spte
);
927 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
928 while (desc
->sptes
[PTE_LIST_EXT
-1] && desc
->more
) {
930 count
+= PTE_LIST_EXT
;
932 if (desc
->sptes
[PTE_LIST_EXT
-1]) {
933 desc
->more
= mmu_alloc_pte_list_desc(vcpu
);
936 for (i
= 0; desc
->sptes
[i
]; ++i
)
938 desc
->sptes
[i
] = spte
;
944 pte_list_desc_remove_entry(unsigned long *pte_list
, struct pte_list_desc
*desc
,
945 int i
, struct pte_list_desc
*prev_desc
)
949 for (j
= PTE_LIST_EXT
- 1; !desc
->sptes
[j
] && j
> i
; --j
)
951 desc
->sptes
[i
] = desc
->sptes
[j
];
952 desc
->sptes
[j
] = NULL
;
955 if (!prev_desc
&& !desc
->more
)
956 *pte_list
= (unsigned long)desc
->sptes
[0];
959 prev_desc
->more
= desc
->more
;
961 *pte_list
= (unsigned long)desc
->more
| 1;
962 mmu_free_pte_list_desc(desc
);
965 static void pte_list_remove(u64
*spte
, unsigned long *pte_list
)
967 struct pte_list_desc
*desc
;
968 struct pte_list_desc
*prev_desc
;
972 printk(KERN_ERR
"pte_list_remove: %p 0->BUG\n", spte
);
974 } else if (!(*pte_list
& 1)) {
975 rmap_printk("pte_list_remove: %p 1->0\n", spte
);
976 if ((u64
*)*pte_list
!= spte
) {
977 printk(KERN_ERR
"pte_list_remove: %p 1->BUG\n", spte
);
982 rmap_printk("pte_list_remove: %p many->many\n", spte
);
983 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
986 for (i
= 0; i
< PTE_LIST_EXT
&& desc
->sptes
[i
]; ++i
)
987 if (desc
->sptes
[i
] == spte
) {
988 pte_list_desc_remove_entry(pte_list
,
996 pr_err("pte_list_remove: %p many->many\n", spte
);
1001 typedef void (*pte_list_walk_fn
) (u64
*spte
);
1002 static void pte_list_walk(unsigned long *pte_list
, pte_list_walk_fn fn
)
1004 struct pte_list_desc
*desc
;
1010 if (!(*pte_list
& 1))
1011 return fn((u64
*)*pte_list
);
1013 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
1015 for (i
= 0; i
< PTE_LIST_EXT
&& desc
->sptes
[i
]; ++i
)
1021 static unsigned long *__gfn_to_rmap(gfn_t gfn
, int level
,
1022 struct kvm_memory_slot
*slot
)
1026 idx
= gfn_to_index(gfn
, slot
->base_gfn
, level
);
1027 return &slot
->arch
.rmap
[level
- PT_PAGE_TABLE_LEVEL
][idx
];
1031 * Take gfn and return the reverse mapping to it.
1033 static unsigned long *gfn_to_rmap(struct kvm
*kvm
, gfn_t gfn
, struct kvm_mmu_page
*sp
)
1035 struct kvm_memslots
*slots
;
1036 struct kvm_memory_slot
*slot
;
1038 slots
= kvm_memslots_for_spte_role(kvm
, sp
->role
);
1039 slot
= __gfn_to_memslot(slots
, gfn
);
1040 return __gfn_to_rmap(gfn
, sp
->role
.level
, slot
);
1043 static bool rmap_can_add(struct kvm_vcpu
*vcpu
)
1045 struct kvm_mmu_memory_cache
*cache
;
1047 cache
= &vcpu
->arch
.mmu_pte_list_desc_cache
;
1048 return mmu_memory_cache_free_objects(cache
);
1051 static int rmap_add(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
1053 struct kvm_mmu_page
*sp
;
1054 unsigned long *rmapp
;
1056 sp
= page_header(__pa(spte
));
1057 kvm_mmu_page_set_gfn(sp
, spte
- sp
->spt
, gfn
);
1058 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
);
1059 return pte_list_add(vcpu
, spte
, rmapp
);
1062 static void rmap_remove(struct kvm
*kvm
, u64
*spte
)
1064 struct kvm_mmu_page
*sp
;
1066 unsigned long *rmapp
;
1068 sp
= page_header(__pa(spte
));
1069 gfn
= kvm_mmu_page_get_gfn(sp
, spte
- sp
->spt
);
1070 rmapp
= gfn_to_rmap(kvm
, gfn
, sp
);
1071 pte_list_remove(spte
, rmapp
);
1075 * Used by the following functions to iterate through the sptes linked by a
1076 * rmap. All fields are private and not assumed to be used outside.
1078 struct rmap_iterator
{
1079 /* private fields */
1080 struct pte_list_desc
*desc
; /* holds the sptep if not NULL */
1081 int pos
; /* index of the sptep */
1085 * Iteration must be started by this function. This should also be used after
1086 * removing/dropping sptes from the rmap link because in such cases the
1087 * information in the itererator may not be valid.
1089 * Returns sptep if found, NULL otherwise.
1091 static u64
*rmap_get_first(unsigned long rmap
, struct rmap_iterator
*iter
)
1101 iter
->desc
= (struct pte_list_desc
*)(rmap
& ~1ul);
1103 return iter
->desc
->sptes
[iter
->pos
];
1107 * Must be used with a valid iterator: e.g. after rmap_get_first().
1109 * Returns sptep if found, NULL otherwise.
1111 static u64
*rmap_get_next(struct rmap_iterator
*iter
)
1114 if (iter
->pos
< PTE_LIST_EXT
- 1) {
1118 sptep
= iter
->desc
->sptes
[iter
->pos
];
1123 iter
->desc
= iter
->desc
->more
;
1127 /* desc->sptes[0] cannot be NULL */
1128 return iter
->desc
->sptes
[iter
->pos
];
1135 #define for_each_rmap_spte(_rmap_, _iter_, _spte_) \
1136 for (_spte_ = rmap_get_first(*_rmap_, _iter_); \
1137 _spte_ && ({BUG_ON(!is_shadow_present_pte(*_spte_)); 1;}); \
1138 _spte_ = rmap_get_next(_iter_))
1140 static void drop_spte(struct kvm
*kvm
, u64
*sptep
)
1142 if (mmu_spte_clear_track_bits(sptep
))
1143 rmap_remove(kvm
, sptep
);
1147 static bool __drop_large_spte(struct kvm
*kvm
, u64
*sptep
)
1149 if (is_large_pte(*sptep
)) {
1150 WARN_ON(page_header(__pa(sptep
))->role
.level
==
1151 PT_PAGE_TABLE_LEVEL
);
1152 drop_spte(kvm
, sptep
);
1160 static void drop_large_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
)
1162 if (__drop_large_spte(vcpu
->kvm
, sptep
))
1163 kvm_flush_remote_tlbs(vcpu
->kvm
);
1167 * Write-protect on the specified @sptep, @pt_protect indicates whether
1168 * spte write-protection is caused by protecting shadow page table.
1170 * Note: write protection is difference between dirty logging and spte
1172 * - for dirty logging, the spte can be set to writable at anytime if
1173 * its dirty bitmap is properly set.
1174 * - for spte protection, the spte can be writable only after unsync-ing
1177 * Return true if tlb need be flushed.
1179 static bool spte_write_protect(struct kvm
*kvm
, u64
*sptep
, bool pt_protect
)
1183 if (!is_writable_pte(spte
) &&
1184 !(pt_protect
&& spte_is_locklessly_modifiable(spte
)))
1187 rmap_printk("rmap_write_protect: spte %p %llx\n", sptep
, *sptep
);
1190 spte
&= ~SPTE_MMU_WRITEABLE
;
1191 spte
= spte
& ~PT_WRITABLE_MASK
;
1193 return mmu_spte_update(sptep
, spte
);
1196 static bool __rmap_write_protect(struct kvm
*kvm
, unsigned long *rmapp
,
1200 struct rmap_iterator iter
;
1203 for_each_rmap_spte(rmapp
, &iter
, sptep
)
1204 flush
|= spte_write_protect(kvm
, sptep
, pt_protect
);
1209 static bool spte_clear_dirty(struct kvm
*kvm
, u64
*sptep
)
1213 rmap_printk("rmap_clear_dirty: spte %p %llx\n", sptep
, *sptep
);
1215 spte
&= ~shadow_dirty_mask
;
1217 return mmu_spte_update(sptep
, spte
);
1220 static bool __rmap_clear_dirty(struct kvm
*kvm
, unsigned long *rmapp
)
1223 struct rmap_iterator iter
;
1226 for_each_rmap_spte(rmapp
, &iter
, sptep
)
1227 flush
|= spte_clear_dirty(kvm
, sptep
);
1232 static bool spte_set_dirty(struct kvm
*kvm
, u64
*sptep
)
1236 rmap_printk("rmap_set_dirty: spte %p %llx\n", sptep
, *sptep
);
1238 spte
|= shadow_dirty_mask
;
1240 return mmu_spte_update(sptep
, spte
);
1243 static bool __rmap_set_dirty(struct kvm
*kvm
, unsigned long *rmapp
)
1246 struct rmap_iterator iter
;
1249 for_each_rmap_spte(rmapp
, &iter
, sptep
)
1250 flush
|= spte_set_dirty(kvm
, sptep
);
1256 * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1257 * @kvm: kvm instance
1258 * @slot: slot to protect
1259 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1260 * @mask: indicates which pages we should protect
1262 * Used when we do not need to care about huge page mappings: e.g. during dirty
1263 * logging we do not have any such mappings.
1265 static void kvm_mmu_write_protect_pt_masked(struct kvm
*kvm
,
1266 struct kvm_memory_slot
*slot
,
1267 gfn_t gfn_offset
, unsigned long mask
)
1269 unsigned long *rmapp
;
1272 rmapp
= __gfn_to_rmap(slot
->base_gfn
+ gfn_offset
+ __ffs(mask
),
1273 PT_PAGE_TABLE_LEVEL
, slot
);
1274 __rmap_write_protect(kvm
, rmapp
, false);
1276 /* clear the first set bit */
1282 * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages
1283 * @kvm: kvm instance
1284 * @slot: slot to clear D-bit
1285 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1286 * @mask: indicates which pages we should clear D-bit
1288 * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap.
1290 void kvm_mmu_clear_dirty_pt_masked(struct kvm
*kvm
,
1291 struct kvm_memory_slot
*slot
,
1292 gfn_t gfn_offset
, unsigned long mask
)
1294 unsigned long *rmapp
;
1297 rmapp
= __gfn_to_rmap(slot
->base_gfn
+ gfn_offset
+ __ffs(mask
),
1298 PT_PAGE_TABLE_LEVEL
, slot
);
1299 __rmap_clear_dirty(kvm
, rmapp
);
1301 /* clear the first set bit */
1305 EXPORT_SYMBOL_GPL(kvm_mmu_clear_dirty_pt_masked
);
1308 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1311 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1312 * enable dirty logging for them.
1314 * Used when we do not need to care about huge page mappings: e.g. during dirty
1315 * logging we do not have any such mappings.
1317 void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm
*kvm
,
1318 struct kvm_memory_slot
*slot
,
1319 gfn_t gfn_offset
, unsigned long mask
)
1321 if (kvm_x86_ops
->enable_log_dirty_pt_masked
)
1322 kvm_x86_ops
->enable_log_dirty_pt_masked(kvm
, slot
, gfn_offset
,
1325 kvm_mmu_write_protect_pt_masked(kvm
, slot
, gfn_offset
, mask
);
1328 static bool rmap_write_protect(struct kvm_vcpu
*vcpu
, u64 gfn
)
1330 struct kvm_memory_slot
*slot
;
1331 unsigned long *rmapp
;
1333 bool write_protected
= false;
1335 slot
= kvm_vcpu_gfn_to_memslot(vcpu
, gfn
);
1337 for (i
= PT_PAGE_TABLE_LEVEL
; i
<= PT_MAX_HUGEPAGE_LEVEL
; ++i
) {
1338 rmapp
= __gfn_to_rmap(gfn
, i
, slot
);
1339 write_protected
|= __rmap_write_protect(vcpu
->kvm
, rmapp
, true);
1342 return write_protected
;
1345 static bool kvm_zap_rmapp(struct kvm
*kvm
, unsigned long *rmapp
)
1348 struct rmap_iterator iter
;
1351 while ((sptep
= rmap_get_first(*rmapp
, &iter
))) {
1352 BUG_ON(!(*sptep
& PT_PRESENT_MASK
));
1353 rmap_printk("%s: spte %p %llx.\n", __func__
, sptep
, *sptep
);
1355 drop_spte(kvm
, sptep
);
1362 static int kvm_unmap_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1363 struct kvm_memory_slot
*slot
, gfn_t gfn
, int level
,
1366 return kvm_zap_rmapp(kvm
, rmapp
);
1369 static int kvm_set_pte_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1370 struct kvm_memory_slot
*slot
, gfn_t gfn
, int level
,
1374 struct rmap_iterator iter
;
1377 pte_t
*ptep
= (pte_t
*)data
;
1380 WARN_ON(pte_huge(*ptep
));
1381 new_pfn
= pte_pfn(*ptep
);
1384 for_each_rmap_spte(rmapp
, &iter
, sptep
) {
1385 rmap_printk("kvm_set_pte_rmapp: spte %p %llx gfn %llx (%d)\n",
1386 sptep
, *sptep
, gfn
, level
);
1390 if (pte_write(*ptep
)) {
1391 drop_spte(kvm
, sptep
);
1394 new_spte
= *sptep
& ~PT64_BASE_ADDR_MASK
;
1395 new_spte
|= (u64
)new_pfn
<< PAGE_SHIFT
;
1397 new_spte
&= ~PT_WRITABLE_MASK
;
1398 new_spte
&= ~SPTE_HOST_WRITEABLE
;
1399 new_spte
&= ~shadow_accessed_mask
;
1401 mmu_spte_clear_track_bits(sptep
);
1402 mmu_spte_set(sptep
, new_spte
);
1407 kvm_flush_remote_tlbs(kvm
);
1412 struct slot_rmap_walk_iterator
{
1414 struct kvm_memory_slot
*slot
;
1420 /* output fields. */
1422 unsigned long *rmap
;
1425 /* private field. */
1426 unsigned long *end_rmap
;
1430 rmap_walk_init_level(struct slot_rmap_walk_iterator
*iterator
, int level
)
1432 iterator
->level
= level
;
1433 iterator
->gfn
= iterator
->start_gfn
;
1434 iterator
->rmap
= __gfn_to_rmap(iterator
->gfn
, level
, iterator
->slot
);
1435 iterator
->end_rmap
= __gfn_to_rmap(iterator
->end_gfn
, level
,
1440 slot_rmap_walk_init(struct slot_rmap_walk_iterator
*iterator
,
1441 struct kvm_memory_slot
*slot
, int start_level
,
1442 int end_level
, gfn_t start_gfn
, gfn_t end_gfn
)
1444 iterator
->slot
= slot
;
1445 iterator
->start_level
= start_level
;
1446 iterator
->end_level
= end_level
;
1447 iterator
->start_gfn
= start_gfn
;
1448 iterator
->end_gfn
= end_gfn
;
1450 rmap_walk_init_level(iterator
, iterator
->start_level
);
1453 static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator
*iterator
)
1455 return !!iterator
->rmap
;
1458 static void slot_rmap_walk_next(struct slot_rmap_walk_iterator
*iterator
)
1460 if (++iterator
->rmap
<= iterator
->end_rmap
) {
1461 iterator
->gfn
+= (1UL << KVM_HPAGE_GFN_SHIFT(iterator
->level
));
1465 if (++iterator
->level
> iterator
->end_level
) {
1466 iterator
->rmap
= NULL
;
1470 rmap_walk_init_level(iterator
, iterator
->level
);
1473 #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \
1474 _start_gfn, _end_gfn, _iter_) \
1475 for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \
1476 _end_level_, _start_gfn, _end_gfn); \
1477 slot_rmap_walk_okay(_iter_); \
1478 slot_rmap_walk_next(_iter_))
1480 static int kvm_handle_hva_range(struct kvm
*kvm
,
1481 unsigned long start
,
1484 int (*handler
)(struct kvm
*kvm
,
1485 unsigned long *rmapp
,
1486 struct kvm_memory_slot
*slot
,
1489 unsigned long data
))
1491 struct kvm_memslots
*slots
;
1492 struct kvm_memory_slot
*memslot
;
1493 struct slot_rmap_walk_iterator iterator
;
1497 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
1498 slots
= __kvm_memslots(kvm
, i
);
1499 kvm_for_each_memslot(memslot
, slots
) {
1500 unsigned long hva_start
, hva_end
;
1501 gfn_t gfn_start
, gfn_end
;
1503 hva_start
= max(start
, memslot
->userspace_addr
);
1504 hva_end
= min(end
, memslot
->userspace_addr
+
1505 (memslot
->npages
<< PAGE_SHIFT
));
1506 if (hva_start
>= hva_end
)
1509 * {gfn(page) | page intersects with [hva_start, hva_end)} =
1510 * {gfn_start, gfn_start+1, ..., gfn_end-1}.
1512 gfn_start
= hva_to_gfn_memslot(hva_start
, memslot
);
1513 gfn_end
= hva_to_gfn_memslot(hva_end
+ PAGE_SIZE
- 1, memslot
);
1515 for_each_slot_rmap_range(memslot
, PT_PAGE_TABLE_LEVEL
,
1516 PT_MAX_HUGEPAGE_LEVEL
,
1517 gfn_start
, gfn_end
- 1,
1519 ret
|= handler(kvm
, iterator
.rmap
, memslot
,
1520 iterator
.gfn
, iterator
.level
, data
);
1527 static int kvm_handle_hva(struct kvm
*kvm
, unsigned long hva
,
1529 int (*handler
)(struct kvm
*kvm
, unsigned long *rmapp
,
1530 struct kvm_memory_slot
*slot
,
1531 gfn_t gfn
, int level
,
1532 unsigned long data
))
1534 return kvm_handle_hva_range(kvm
, hva
, hva
+ 1, data
, handler
);
1537 int kvm_unmap_hva(struct kvm
*kvm
, unsigned long hva
)
1539 return kvm_handle_hva(kvm
, hva
, 0, kvm_unmap_rmapp
);
1542 int kvm_unmap_hva_range(struct kvm
*kvm
, unsigned long start
, unsigned long end
)
1544 return kvm_handle_hva_range(kvm
, start
, end
, 0, kvm_unmap_rmapp
);
1547 void kvm_set_spte_hva(struct kvm
*kvm
, unsigned long hva
, pte_t pte
)
1549 kvm_handle_hva(kvm
, hva
, (unsigned long)&pte
, kvm_set_pte_rmapp
);
1552 static int kvm_age_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1553 struct kvm_memory_slot
*slot
, gfn_t gfn
, int level
,
1557 struct rmap_iterator
uninitialized_var(iter
);
1560 BUG_ON(!shadow_accessed_mask
);
1562 for_each_rmap_spte(rmapp
, &iter
, sptep
)
1563 if (*sptep
& shadow_accessed_mask
) {
1565 clear_bit((ffs(shadow_accessed_mask
) - 1),
1566 (unsigned long *)sptep
);
1569 trace_kvm_age_page(gfn
, level
, slot
, young
);
1573 static int kvm_test_age_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1574 struct kvm_memory_slot
*slot
, gfn_t gfn
,
1575 int level
, unsigned long data
)
1578 struct rmap_iterator iter
;
1582 * If there's no access bit in the secondary pte set by the
1583 * hardware it's up to gup-fast/gup to set the access bit in
1584 * the primary pte or in the page structure.
1586 if (!shadow_accessed_mask
)
1589 for_each_rmap_spte(rmapp
, &iter
, sptep
)
1590 if (*sptep
& shadow_accessed_mask
) {
1598 #define RMAP_RECYCLE_THRESHOLD 1000
1600 static void rmap_recycle(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
1602 unsigned long *rmapp
;
1603 struct kvm_mmu_page
*sp
;
1605 sp
= page_header(__pa(spte
));
1607 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
);
1609 kvm_unmap_rmapp(vcpu
->kvm
, rmapp
, NULL
, gfn
, sp
->role
.level
, 0);
1610 kvm_flush_remote_tlbs(vcpu
->kvm
);
1613 int kvm_age_hva(struct kvm
*kvm
, unsigned long start
, unsigned long end
)
1616 * In case of absence of EPT Access and Dirty Bits supports,
1617 * emulate the accessed bit for EPT, by checking if this page has
1618 * an EPT mapping, and clearing it if it does. On the next access,
1619 * a new EPT mapping will be established.
1620 * This has some overhead, but not as much as the cost of swapping
1621 * out actively used pages or breaking up actively used hugepages.
1623 if (!shadow_accessed_mask
) {
1625 * We are holding the kvm->mmu_lock, and we are blowing up
1626 * shadow PTEs. MMU notifier consumers need to be kept at bay.
1627 * This is correct as long as we don't decouple the mmu_lock
1628 * protected regions (like invalidate_range_start|end does).
1630 kvm
->mmu_notifier_seq
++;
1631 return kvm_handle_hva_range(kvm
, start
, end
, 0,
1635 return kvm_handle_hva_range(kvm
, start
, end
, 0, kvm_age_rmapp
);
1638 int kvm_test_age_hva(struct kvm
*kvm
, unsigned long hva
)
1640 return kvm_handle_hva(kvm
, hva
, 0, kvm_test_age_rmapp
);
1644 static int is_empty_shadow_page(u64
*spt
)
1649 for (pos
= spt
, end
= pos
+ PAGE_SIZE
/ sizeof(u64
); pos
!= end
; pos
++)
1650 if (is_shadow_present_pte(*pos
)) {
1651 printk(KERN_ERR
"%s: %p %llx\n", __func__
,
1660 * This value is the sum of all of the kvm instances's
1661 * kvm->arch.n_used_mmu_pages values. We need a global,
1662 * aggregate version in order to make the slab shrinker
1665 static inline void kvm_mod_used_mmu_pages(struct kvm
*kvm
, int nr
)
1667 kvm
->arch
.n_used_mmu_pages
+= nr
;
1668 percpu_counter_add(&kvm_total_used_mmu_pages
, nr
);
1671 static void kvm_mmu_free_page(struct kvm_mmu_page
*sp
)
1673 MMU_WARN_ON(!is_empty_shadow_page(sp
->spt
));
1674 hlist_del(&sp
->hash_link
);
1675 list_del(&sp
->link
);
1676 free_page((unsigned long)sp
->spt
);
1677 if (!sp
->role
.direct
)
1678 free_page((unsigned long)sp
->gfns
);
1679 kmem_cache_free(mmu_page_header_cache
, sp
);
1682 static unsigned kvm_page_table_hashfn(gfn_t gfn
)
1684 return gfn
& ((1 << KVM_MMU_HASH_SHIFT
) - 1);
1687 static void mmu_page_add_parent_pte(struct kvm_vcpu
*vcpu
,
1688 struct kvm_mmu_page
*sp
, u64
*parent_pte
)
1693 pte_list_add(vcpu
, parent_pte
, &sp
->parent_ptes
);
1696 static void mmu_page_remove_parent_pte(struct kvm_mmu_page
*sp
,
1699 pte_list_remove(parent_pte
, &sp
->parent_ptes
);
1702 static void drop_parent_pte(struct kvm_mmu_page
*sp
,
1705 mmu_page_remove_parent_pte(sp
, parent_pte
);
1706 mmu_spte_clear_no_track(parent_pte
);
1709 static struct kvm_mmu_page
*kvm_mmu_alloc_page(struct kvm_vcpu
*vcpu
,
1710 u64
*parent_pte
, int direct
)
1712 struct kvm_mmu_page
*sp
;
1714 sp
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_header_cache
);
1715 sp
->spt
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
);
1717 sp
->gfns
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
);
1718 set_page_private(virt_to_page(sp
->spt
), (unsigned long)sp
);
1721 * The active_mmu_pages list is the FIFO list, do not move the
1722 * page until it is zapped. kvm_zap_obsolete_pages depends on
1723 * this feature. See the comments in kvm_zap_obsolete_pages().
1725 list_add(&sp
->link
, &vcpu
->kvm
->arch
.active_mmu_pages
);
1726 sp
->parent_ptes
= 0;
1727 mmu_page_add_parent_pte(vcpu
, sp
, parent_pte
);
1728 kvm_mod_used_mmu_pages(vcpu
->kvm
, +1);
1732 static void mark_unsync(u64
*spte
);
1733 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page
*sp
)
1735 pte_list_walk(&sp
->parent_ptes
, mark_unsync
);
1738 static void mark_unsync(u64
*spte
)
1740 struct kvm_mmu_page
*sp
;
1743 sp
= page_header(__pa(spte
));
1744 index
= spte
- sp
->spt
;
1745 if (__test_and_set_bit(index
, sp
->unsync_child_bitmap
))
1747 if (sp
->unsync_children
++)
1749 kvm_mmu_mark_parents_unsync(sp
);
1752 static int nonpaging_sync_page(struct kvm_vcpu
*vcpu
,
1753 struct kvm_mmu_page
*sp
)
1758 static void nonpaging_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
1762 static void nonpaging_update_pte(struct kvm_vcpu
*vcpu
,
1763 struct kvm_mmu_page
*sp
, u64
*spte
,
1769 #define KVM_PAGE_ARRAY_NR 16
1771 struct kvm_mmu_pages
{
1772 struct mmu_page_and_offset
{
1773 struct kvm_mmu_page
*sp
;
1775 } page
[KVM_PAGE_ARRAY_NR
];
1779 static int mmu_pages_add(struct kvm_mmu_pages
*pvec
, struct kvm_mmu_page
*sp
,
1785 for (i
=0; i
< pvec
->nr
; i
++)
1786 if (pvec
->page
[i
].sp
== sp
)
1789 pvec
->page
[pvec
->nr
].sp
= sp
;
1790 pvec
->page
[pvec
->nr
].idx
= idx
;
1792 return (pvec
->nr
== KVM_PAGE_ARRAY_NR
);
1795 static int __mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1796 struct kvm_mmu_pages
*pvec
)
1798 int i
, ret
, nr_unsync_leaf
= 0;
1800 for_each_set_bit(i
, sp
->unsync_child_bitmap
, 512) {
1801 struct kvm_mmu_page
*child
;
1802 u64 ent
= sp
->spt
[i
];
1804 if (!is_shadow_present_pte(ent
) || is_large_pte(ent
))
1805 goto clear_child_bitmap
;
1807 child
= page_header(ent
& PT64_BASE_ADDR_MASK
);
1809 if (child
->unsync_children
) {
1810 if (mmu_pages_add(pvec
, child
, i
))
1813 ret
= __mmu_unsync_walk(child
, pvec
);
1815 goto clear_child_bitmap
;
1817 nr_unsync_leaf
+= ret
;
1820 } else if (child
->unsync
) {
1822 if (mmu_pages_add(pvec
, child
, i
))
1825 goto clear_child_bitmap
;
1830 __clear_bit(i
, sp
->unsync_child_bitmap
);
1831 sp
->unsync_children
--;
1832 WARN_ON((int)sp
->unsync_children
< 0);
1836 return nr_unsync_leaf
;
1839 static int mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1840 struct kvm_mmu_pages
*pvec
)
1842 if (!sp
->unsync_children
)
1845 mmu_pages_add(pvec
, sp
, 0);
1846 return __mmu_unsync_walk(sp
, pvec
);
1849 static void kvm_unlink_unsync_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1851 WARN_ON(!sp
->unsync
);
1852 trace_kvm_mmu_sync_page(sp
);
1854 --kvm
->stat
.mmu_unsync
;
1857 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
1858 struct list_head
*invalid_list
);
1859 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
1860 struct list_head
*invalid_list
);
1863 * NOTE: we should pay more attention on the zapped-obsolete page
1864 * (is_obsolete_sp(sp) && sp->role.invalid) when you do hash list walk
1865 * since it has been deleted from active_mmu_pages but still can be found
1868 * for_each_gfn_indirect_valid_sp has skipped that kind of page and
1869 * kvm_mmu_get_page(), the only user of for_each_gfn_sp(), has skipped
1870 * all the obsolete pages.
1872 #define for_each_gfn_sp(_kvm, _sp, _gfn) \
1873 hlist_for_each_entry(_sp, \
1874 &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)], hash_link) \
1875 if ((_sp)->gfn != (_gfn)) {} else
1877 #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \
1878 for_each_gfn_sp(_kvm, _sp, _gfn) \
1879 if ((_sp)->role.direct || (_sp)->role.invalid) {} else
1881 /* @sp->gfn should be write-protected at the call site */
1882 static int __kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1883 struct list_head
*invalid_list
, bool clear_unsync
)
1885 if (sp
->role
.cr4_pae
!= !!is_pae(vcpu
)) {
1886 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1891 kvm_unlink_unsync_page(vcpu
->kvm
, sp
);
1893 if (vcpu
->arch
.mmu
.sync_page(vcpu
, sp
)) {
1894 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1898 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
1902 static int kvm_sync_page_transient(struct kvm_vcpu
*vcpu
,
1903 struct kvm_mmu_page
*sp
)
1905 LIST_HEAD(invalid_list
);
1908 ret
= __kvm_sync_page(vcpu
, sp
, &invalid_list
, false);
1910 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1915 #ifdef CONFIG_KVM_MMU_AUDIT
1916 #include "mmu_audit.c"
1918 static void kvm_mmu_audit(struct kvm_vcpu
*vcpu
, int point
) { }
1919 static void mmu_audit_disable(void) { }
1922 static int kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1923 struct list_head
*invalid_list
)
1925 return __kvm_sync_page(vcpu
, sp
, invalid_list
, true);
1928 /* @gfn should be write-protected at the call site */
1929 static void kvm_sync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
1931 struct kvm_mmu_page
*s
;
1932 LIST_HEAD(invalid_list
);
1935 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
) {
1939 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
1940 kvm_unlink_unsync_page(vcpu
->kvm
, s
);
1941 if ((s
->role
.cr4_pae
!= !!is_pae(vcpu
)) ||
1942 (vcpu
->arch
.mmu
.sync_page(vcpu
, s
))) {
1943 kvm_mmu_prepare_zap_page(vcpu
->kvm
, s
, &invalid_list
);
1949 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1951 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
1954 struct mmu_page_path
{
1955 struct kvm_mmu_page
*parent
[PT64_ROOT_LEVEL
-1];
1956 unsigned int idx
[PT64_ROOT_LEVEL
-1];
1959 #define for_each_sp(pvec, sp, parents, i) \
1960 for (i = mmu_pages_next(&pvec, &parents, -1), \
1961 sp = pvec.page[i].sp; \
1962 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1963 i = mmu_pages_next(&pvec, &parents, i))
1965 static int mmu_pages_next(struct kvm_mmu_pages
*pvec
,
1966 struct mmu_page_path
*parents
,
1971 for (n
= i
+1; n
< pvec
->nr
; n
++) {
1972 struct kvm_mmu_page
*sp
= pvec
->page
[n
].sp
;
1974 if (sp
->role
.level
== PT_PAGE_TABLE_LEVEL
) {
1975 parents
->idx
[0] = pvec
->page
[n
].idx
;
1979 parents
->parent
[sp
->role
.level
-2] = sp
;
1980 parents
->idx
[sp
->role
.level
-1] = pvec
->page
[n
].idx
;
1986 static void mmu_pages_clear_parents(struct mmu_page_path
*parents
)
1988 struct kvm_mmu_page
*sp
;
1989 unsigned int level
= 0;
1992 unsigned int idx
= parents
->idx
[level
];
1994 sp
= parents
->parent
[level
];
1998 --sp
->unsync_children
;
1999 WARN_ON((int)sp
->unsync_children
< 0);
2000 __clear_bit(idx
, sp
->unsync_child_bitmap
);
2002 } while (level
< PT64_ROOT_LEVEL
-1 && !sp
->unsync_children
);
2005 static void kvm_mmu_pages_init(struct kvm_mmu_page
*parent
,
2006 struct mmu_page_path
*parents
,
2007 struct kvm_mmu_pages
*pvec
)
2009 parents
->parent
[parent
->role
.level
-1] = NULL
;
2013 static void mmu_sync_children(struct kvm_vcpu
*vcpu
,
2014 struct kvm_mmu_page
*parent
)
2017 struct kvm_mmu_page
*sp
;
2018 struct mmu_page_path parents
;
2019 struct kvm_mmu_pages pages
;
2020 LIST_HEAD(invalid_list
);
2022 kvm_mmu_pages_init(parent
, &parents
, &pages
);
2023 while (mmu_unsync_walk(parent
, &pages
)) {
2024 bool protected = false;
2026 for_each_sp(pages
, sp
, parents
, i
)
2027 protected |= rmap_write_protect(vcpu
, sp
->gfn
);
2030 kvm_flush_remote_tlbs(vcpu
->kvm
);
2032 for_each_sp(pages
, sp
, parents
, i
) {
2033 kvm_sync_page(vcpu
, sp
, &invalid_list
);
2034 mmu_pages_clear_parents(&parents
);
2036 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
2037 cond_resched_lock(&vcpu
->kvm
->mmu_lock
);
2038 kvm_mmu_pages_init(parent
, &parents
, &pages
);
2042 static void init_shadow_page_table(struct kvm_mmu_page
*sp
)
2046 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
2050 static void __clear_sp_write_flooding_count(struct kvm_mmu_page
*sp
)
2052 sp
->write_flooding_count
= 0;
2055 static void clear_sp_write_flooding_count(u64
*spte
)
2057 struct kvm_mmu_page
*sp
= page_header(__pa(spte
));
2059 __clear_sp_write_flooding_count(sp
);
2062 static bool is_obsolete_sp(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
2064 return unlikely(sp
->mmu_valid_gen
!= kvm
->arch
.mmu_valid_gen
);
2067 static struct kvm_mmu_page
*kvm_mmu_get_page(struct kvm_vcpu
*vcpu
,
2075 union kvm_mmu_page_role role
;
2077 struct kvm_mmu_page
*sp
;
2078 bool need_sync
= false;
2080 role
= vcpu
->arch
.mmu
.base_role
;
2082 role
.direct
= direct
;
2085 role
.access
= access
;
2086 if (!vcpu
->arch
.mmu
.direct_map
2087 && vcpu
->arch
.mmu
.root_level
<= PT32_ROOT_LEVEL
) {
2088 quadrant
= gaddr
>> (PAGE_SHIFT
+ (PT64_PT_BITS
* level
));
2089 quadrant
&= (1 << ((PT32_PT_BITS
- PT64_PT_BITS
) * level
)) - 1;
2090 role
.quadrant
= quadrant
;
2092 for_each_gfn_sp(vcpu
->kvm
, sp
, gfn
) {
2093 if (is_obsolete_sp(vcpu
->kvm
, sp
))
2096 if (!need_sync
&& sp
->unsync
)
2099 if (sp
->role
.word
!= role
.word
)
2102 if (sp
->unsync
&& kvm_sync_page_transient(vcpu
, sp
))
2105 mmu_page_add_parent_pte(vcpu
, sp
, parent_pte
);
2106 if (sp
->unsync_children
) {
2107 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
2108 kvm_mmu_mark_parents_unsync(sp
);
2109 } else if (sp
->unsync
)
2110 kvm_mmu_mark_parents_unsync(sp
);
2112 __clear_sp_write_flooding_count(sp
);
2113 trace_kvm_mmu_get_page(sp
, false);
2116 ++vcpu
->kvm
->stat
.mmu_cache_miss
;
2117 sp
= kvm_mmu_alloc_page(vcpu
, parent_pte
, direct
);
2122 hlist_add_head(&sp
->hash_link
,
2123 &vcpu
->kvm
->arch
.mmu_page_hash
[kvm_page_table_hashfn(gfn
)]);
2125 if (rmap_write_protect(vcpu
, gfn
))
2126 kvm_flush_remote_tlbs(vcpu
->kvm
);
2127 if (level
> PT_PAGE_TABLE_LEVEL
&& need_sync
)
2128 kvm_sync_pages(vcpu
, gfn
);
2130 account_shadowed(vcpu
->kvm
, sp
);
2132 sp
->mmu_valid_gen
= vcpu
->kvm
->arch
.mmu_valid_gen
;
2133 init_shadow_page_table(sp
);
2134 trace_kvm_mmu_get_page(sp
, true);
2138 static void shadow_walk_init(struct kvm_shadow_walk_iterator
*iterator
,
2139 struct kvm_vcpu
*vcpu
, u64 addr
)
2141 iterator
->addr
= addr
;
2142 iterator
->shadow_addr
= vcpu
->arch
.mmu
.root_hpa
;
2143 iterator
->level
= vcpu
->arch
.mmu
.shadow_root_level
;
2145 if (iterator
->level
== PT64_ROOT_LEVEL
&&
2146 vcpu
->arch
.mmu
.root_level
< PT64_ROOT_LEVEL
&&
2147 !vcpu
->arch
.mmu
.direct_map
)
2150 if (iterator
->level
== PT32E_ROOT_LEVEL
) {
2151 iterator
->shadow_addr
2152 = vcpu
->arch
.mmu
.pae_root
[(addr
>> 30) & 3];
2153 iterator
->shadow_addr
&= PT64_BASE_ADDR_MASK
;
2155 if (!iterator
->shadow_addr
)
2156 iterator
->level
= 0;
2160 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator
*iterator
)
2162 if (iterator
->level
< PT_PAGE_TABLE_LEVEL
)
2165 iterator
->index
= SHADOW_PT_INDEX(iterator
->addr
, iterator
->level
);
2166 iterator
->sptep
= ((u64
*)__va(iterator
->shadow_addr
)) + iterator
->index
;
2170 static void __shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
,
2173 if (is_last_spte(spte
, iterator
->level
)) {
2174 iterator
->level
= 0;
2178 iterator
->shadow_addr
= spte
& PT64_BASE_ADDR_MASK
;
2182 static void shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
)
2184 return __shadow_walk_next(iterator
, *iterator
->sptep
);
2187 static void link_shadow_page(u64
*sptep
, struct kvm_mmu_page
*sp
, bool accessed
)
2191 BUILD_BUG_ON(VMX_EPT_READABLE_MASK
!= PT_PRESENT_MASK
||
2192 VMX_EPT_WRITABLE_MASK
!= PT_WRITABLE_MASK
);
2194 spte
= __pa(sp
->spt
) | PT_PRESENT_MASK
| PT_WRITABLE_MASK
|
2195 shadow_user_mask
| shadow_x_mask
;
2198 spte
|= shadow_accessed_mask
;
2200 mmu_spte_set(sptep
, spte
);
2203 static void validate_direct_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2204 unsigned direct_access
)
2206 if (is_shadow_present_pte(*sptep
) && !is_large_pte(*sptep
)) {
2207 struct kvm_mmu_page
*child
;
2210 * For the direct sp, if the guest pte's dirty bit
2211 * changed form clean to dirty, it will corrupt the
2212 * sp's access: allow writable in the read-only sp,
2213 * so we should update the spte at this point to get
2214 * a new sp with the correct access.
2216 child
= page_header(*sptep
& PT64_BASE_ADDR_MASK
);
2217 if (child
->role
.access
== direct_access
)
2220 drop_parent_pte(child
, sptep
);
2221 kvm_flush_remote_tlbs(vcpu
->kvm
);
2225 static bool mmu_page_zap_pte(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
2229 struct kvm_mmu_page
*child
;
2232 if (is_shadow_present_pte(pte
)) {
2233 if (is_last_spte(pte
, sp
->role
.level
)) {
2234 drop_spte(kvm
, spte
);
2235 if (is_large_pte(pte
))
2238 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
2239 drop_parent_pte(child
, spte
);
2244 if (is_mmio_spte(pte
))
2245 mmu_spte_clear_no_track(spte
);
2250 static void kvm_mmu_page_unlink_children(struct kvm
*kvm
,
2251 struct kvm_mmu_page
*sp
)
2255 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
2256 mmu_page_zap_pte(kvm
, sp
, sp
->spt
+ i
);
2259 static void kvm_mmu_put_page(struct kvm_mmu_page
*sp
, u64
*parent_pte
)
2261 mmu_page_remove_parent_pte(sp
, parent_pte
);
2264 static void kvm_mmu_unlink_parents(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
2267 struct rmap_iterator iter
;
2269 while ((sptep
= rmap_get_first(sp
->parent_ptes
, &iter
)))
2270 drop_parent_pte(sp
, sptep
);
2273 static int mmu_zap_unsync_children(struct kvm
*kvm
,
2274 struct kvm_mmu_page
*parent
,
2275 struct list_head
*invalid_list
)
2278 struct mmu_page_path parents
;
2279 struct kvm_mmu_pages pages
;
2281 if (parent
->role
.level
== PT_PAGE_TABLE_LEVEL
)
2284 kvm_mmu_pages_init(parent
, &parents
, &pages
);
2285 while (mmu_unsync_walk(parent
, &pages
)) {
2286 struct kvm_mmu_page
*sp
;
2288 for_each_sp(pages
, sp
, parents
, i
) {
2289 kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
);
2290 mmu_pages_clear_parents(&parents
);
2293 kvm_mmu_pages_init(parent
, &parents
, &pages
);
2299 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
2300 struct list_head
*invalid_list
)
2304 trace_kvm_mmu_prepare_zap_page(sp
);
2305 ++kvm
->stat
.mmu_shadow_zapped
;
2306 ret
= mmu_zap_unsync_children(kvm
, sp
, invalid_list
);
2307 kvm_mmu_page_unlink_children(kvm
, sp
);
2308 kvm_mmu_unlink_parents(kvm
, sp
);
2310 if (!sp
->role
.invalid
&& !sp
->role
.direct
)
2311 unaccount_shadowed(kvm
, sp
);
2314 kvm_unlink_unsync_page(kvm
, sp
);
2315 if (!sp
->root_count
) {
2318 list_move(&sp
->link
, invalid_list
);
2319 kvm_mod_used_mmu_pages(kvm
, -1);
2321 list_move(&sp
->link
, &kvm
->arch
.active_mmu_pages
);
2324 * The obsolete pages can not be used on any vcpus.
2325 * See the comments in kvm_mmu_invalidate_zap_all_pages().
2327 if (!sp
->role
.invalid
&& !is_obsolete_sp(kvm
, sp
))
2328 kvm_reload_remote_mmus(kvm
);
2331 sp
->role
.invalid
= 1;
2335 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
2336 struct list_head
*invalid_list
)
2338 struct kvm_mmu_page
*sp
, *nsp
;
2340 if (list_empty(invalid_list
))
2344 * wmb: make sure everyone sees our modifications to the page tables
2345 * rmb: make sure we see changes to vcpu->mode
2350 * Wait for all vcpus to exit guest mode and/or lockless shadow
2353 kvm_flush_remote_tlbs(kvm
);
2355 list_for_each_entry_safe(sp
, nsp
, invalid_list
, link
) {
2356 WARN_ON(!sp
->role
.invalid
|| sp
->root_count
);
2357 kvm_mmu_free_page(sp
);
2361 static bool prepare_zap_oldest_mmu_page(struct kvm
*kvm
,
2362 struct list_head
*invalid_list
)
2364 struct kvm_mmu_page
*sp
;
2366 if (list_empty(&kvm
->arch
.active_mmu_pages
))
2369 sp
= list_entry(kvm
->arch
.active_mmu_pages
.prev
,
2370 struct kvm_mmu_page
, link
);
2371 kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
);
2377 * Changing the number of mmu pages allocated to the vm
2378 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
2380 void kvm_mmu_change_mmu_pages(struct kvm
*kvm
, unsigned int goal_nr_mmu_pages
)
2382 LIST_HEAD(invalid_list
);
2384 spin_lock(&kvm
->mmu_lock
);
2386 if (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
) {
2387 /* Need to free some mmu pages to achieve the goal. */
2388 while (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
)
2389 if (!prepare_zap_oldest_mmu_page(kvm
, &invalid_list
))
2392 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
2393 goal_nr_mmu_pages
= kvm
->arch
.n_used_mmu_pages
;
2396 kvm
->arch
.n_max_mmu_pages
= goal_nr_mmu_pages
;
2398 spin_unlock(&kvm
->mmu_lock
);
2401 int kvm_mmu_unprotect_page(struct kvm
*kvm
, gfn_t gfn
)
2403 struct kvm_mmu_page
*sp
;
2404 LIST_HEAD(invalid_list
);
2407 pgprintk("%s: looking for gfn %llx\n", __func__
, gfn
);
2409 spin_lock(&kvm
->mmu_lock
);
2410 for_each_gfn_indirect_valid_sp(kvm
, sp
, gfn
) {
2411 pgprintk("%s: gfn %llx role %x\n", __func__
, gfn
,
2414 kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
);
2416 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
2417 spin_unlock(&kvm
->mmu_lock
);
2421 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page
);
2423 static void __kvm_unsync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
)
2425 trace_kvm_mmu_unsync_page(sp
);
2426 ++vcpu
->kvm
->stat
.mmu_unsync
;
2429 kvm_mmu_mark_parents_unsync(sp
);
2432 static void kvm_unsync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
2434 struct kvm_mmu_page
*s
;
2436 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
) {
2439 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
2440 __kvm_unsync_page(vcpu
, s
);
2444 static int mmu_need_write_protect(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2447 struct kvm_mmu_page
*s
;
2448 bool need_unsync
= false;
2450 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
) {
2454 if (s
->role
.level
!= PT_PAGE_TABLE_LEVEL
)
2461 kvm_unsync_pages(vcpu
, gfn
);
2465 static bool kvm_is_mmio_pfn(pfn_t pfn
)
2468 return !is_zero_pfn(pfn
) && PageReserved(pfn_to_page(pfn
));
2473 static int set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2474 unsigned pte_access
, int level
,
2475 gfn_t gfn
, pfn_t pfn
, bool speculative
,
2476 bool can_unsync
, bool host_writable
)
2481 if (set_mmio_spte(vcpu
, sptep
, gfn
, pfn
, pte_access
))
2484 spte
= PT_PRESENT_MASK
;
2486 spte
|= shadow_accessed_mask
;
2488 if (pte_access
& ACC_EXEC_MASK
)
2489 spte
|= shadow_x_mask
;
2491 spte
|= shadow_nx_mask
;
2493 if (pte_access
& ACC_USER_MASK
)
2494 spte
|= shadow_user_mask
;
2496 if (level
> PT_PAGE_TABLE_LEVEL
)
2497 spte
|= PT_PAGE_SIZE_MASK
;
2499 spte
|= kvm_x86_ops
->get_mt_mask(vcpu
, gfn
,
2500 kvm_is_mmio_pfn(pfn
));
2503 spte
|= SPTE_HOST_WRITEABLE
;
2505 pte_access
&= ~ACC_WRITE_MASK
;
2507 spte
|= (u64
)pfn
<< PAGE_SHIFT
;
2509 if (pte_access
& ACC_WRITE_MASK
) {
2512 * Other vcpu creates new sp in the window between
2513 * mapping_level() and acquiring mmu-lock. We can
2514 * allow guest to retry the access, the mapping can
2515 * be fixed if guest refault.
2517 if (level
> PT_PAGE_TABLE_LEVEL
&&
2518 has_wrprotected_page(vcpu
, gfn
, level
))
2521 spte
|= PT_WRITABLE_MASK
| SPTE_MMU_WRITEABLE
;
2524 * Optimization: for pte sync, if spte was writable the hash
2525 * lookup is unnecessary (and expensive). Write protection
2526 * is responsibility of mmu_get_page / kvm_sync_page.
2527 * Same reasoning can be applied to dirty page accounting.
2529 if (!can_unsync
&& is_writable_pte(*sptep
))
2532 if (mmu_need_write_protect(vcpu
, gfn
, can_unsync
)) {
2533 pgprintk("%s: found shadow page for %llx, marking ro\n",
2536 pte_access
&= ~ACC_WRITE_MASK
;
2537 spte
&= ~(PT_WRITABLE_MASK
| SPTE_MMU_WRITEABLE
);
2541 if (pte_access
& ACC_WRITE_MASK
) {
2542 kvm_vcpu_mark_page_dirty(vcpu
, gfn
);
2543 spte
|= shadow_dirty_mask
;
2547 if (mmu_spte_update(sptep
, spte
))
2548 kvm_flush_remote_tlbs(vcpu
->kvm
);
2553 static void mmu_set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2554 unsigned pte_access
, int write_fault
, int *emulate
,
2555 int level
, gfn_t gfn
, pfn_t pfn
, bool speculative
,
2558 int was_rmapped
= 0;
2561 pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__
,
2562 *sptep
, write_fault
, gfn
);
2564 if (is_rmap_spte(*sptep
)) {
2566 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2567 * the parent of the now unreachable PTE.
2569 if (level
> PT_PAGE_TABLE_LEVEL
&&
2570 !is_large_pte(*sptep
)) {
2571 struct kvm_mmu_page
*child
;
2574 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
2575 drop_parent_pte(child
, sptep
);
2576 kvm_flush_remote_tlbs(vcpu
->kvm
);
2577 } else if (pfn
!= spte_to_pfn(*sptep
)) {
2578 pgprintk("hfn old %llx new %llx\n",
2579 spte_to_pfn(*sptep
), pfn
);
2580 drop_spte(vcpu
->kvm
, sptep
);
2581 kvm_flush_remote_tlbs(vcpu
->kvm
);
2586 if (set_spte(vcpu
, sptep
, pte_access
, level
, gfn
, pfn
, speculative
,
2587 true, host_writable
)) {
2590 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
2593 if (unlikely(is_mmio_spte(*sptep
) && emulate
))
2596 pgprintk("%s: setting spte %llx\n", __func__
, *sptep
);
2597 pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2598 is_large_pte(*sptep
)? "2MB" : "4kB",
2599 *sptep
& PT_PRESENT_MASK
?"RW":"R", gfn
,
2601 if (!was_rmapped
&& is_large_pte(*sptep
))
2602 ++vcpu
->kvm
->stat
.lpages
;
2604 if (is_shadow_present_pte(*sptep
)) {
2606 rmap_count
= rmap_add(vcpu
, sptep
, gfn
);
2607 if (rmap_count
> RMAP_RECYCLE_THRESHOLD
)
2608 rmap_recycle(vcpu
, sptep
, gfn
);
2612 kvm_release_pfn_clean(pfn
);
2615 static pfn_t
pte_prefetch_gfn_to_pfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2618 struct kvm_memory_slot
*slot
;
2620 slot
= gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, no_dirty_log
);
2622 return KVM_PFN_ERR_FAULT
;
2624 return gfn_to_pfn_memslot_atomic(slot
, gfn
);
2627 static int direct_pte_prefetch_many(struct kvm_vcpu
*vcpu
,
2628 struct kvm_mmu_page
*sp
,
2629 u64
*start
, u64
*end
)
2631 struct page
*pages
[PTE_PREFETCH_NUM
];
2632 struct kvm_memory_slot
*slot
;
2633 unsigned access
= sp
->role
.access
;
2637 gfn
= kvm_mmu_page_get_gfn(sp
, start
- sp
->spt
);
2638 slot
= gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, access
& ACC_WRITE_MASK
);
2642 ret
= gfn_to_page_many_atomic(slot
, gfn
, pages
, end
- start
);
2646 for (i
= 0; i
< ret
; i
++, gfn
++, start
++)
2647 mmu_set_spte(vcpu
, start
, access
, 0, NULL
,
2648 sp
->role
.level
, gfn
, page_to_pfn(pages
[i
]),
2654 static void __direct_pte_prefetch(struct kvm_vcpu
*vcpu
,
2655 struct kvm_mmu_page
*sp
, u64
*sptep
)
2657 u64
*spte
, *start
= NULL
;
2660 WARN_ON(!sp
->role
.direct
);
2662 i
= (sptep
- sp
->spt
) & ~(PTE_PREFETCH_NUM
- 1);
2665 for (i
= 0; i
< PTE_PREFETCH_NUM
; i
++, spte
++) {
2666 if (is_shadow_present_pte(*spte
) || spte
== sptep
) {
2669 if (direct_pte_prefetch_many(vcpu
, sp
, start
, spte
) < 0)
2677 static void direct_pte_prefetch(struct kvm_vcpu
*vcpu
, u64
*sptep
)
2679 struct kvm_mmu_page
*sp
;
2682 * Since it's no accessed bit on EPT, it's no way to
2683 * distinguish between actually accessed translations
2684 * and prefetched, so disable pte prefetch if EPT is
2687 if (!shadow_accessed_mask
)
2690 sp
= page_header(__pa(sptep
));
2691 if (sp
->role
.level
> PT_PAGE_TABLE_LEVEL
)
2694 __direct_pte_prefetch(vcpu
, sp
, sptep
);
2697 static int __direct_map(struct kvm_vcpu
*vcpu
, gpa_t v
, int write
,
2698 int map_writable
, int level
, gfn_t gfn
, pfn_t pfn
,
2701 struct kvm_shadow_walk_iterator iterator
;
2702 struct kvm_mmu_page
*sp
;
2706 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2709 for_each_shadow_entry(vcpu
, (u64
)gfn
<< PAGE_SHIFT
, iterator
) {
2710 if (iterator
.level
== level
) {
2711 mmu_set_spte(vcpu
, iterator
.sptep
, ACC_ALL
,
2712 write
, &emulate
, level
, gfn
, pfn
,
2713 prefault
, map_writable
);
2714 direct_pte_prefetch(vcpu
, iterator
.sptep
);
2715 ++vcpu
->stat
.pf_fixed
;
2719 drop_large_spte(vcpu
, iterator
.sptep
);
2720 if (!is_shadow_present_pte(*iterator
.sptep
)) {
2721 u64 base_addr
= iterator
.addr
;
2723 base_addr
&= PT64_LVL_ADDR_MASK(iterator
.level
);
2724 pseudo_gfn
= base_addr
>> PAGE_SHIFT
;
2725 sp
= kvm_mmu_get_page(vcpu
, pseudo_gfn
, iterator
.addr
,
2727 1, ACC_ALL
, iterator
.sptep
);
2729 link_shadow_page(iterator
.sptep
, sp
, true);
2735 static void kvm_send_hwpoison_signal(unsigned long address
, struct task_struct
*tsk
)
2739 info
.si_signo
= SIGBUS
;
2741 info
.si_code
= BUS_MCEERR_AR
;
2742 info
.si_addr
= (void __user
*)address
;
2743 info
.si_addr_lsb
= PAGE_SHIFT
;
2745 send_sig_info(SIGBUS
, &info
, tsk
);
2748 static int kvm_handle_bad_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
, pfn_t pfn
)
2751 * Do not cache the mmio info caused by writing the readonly gfn
2752 * into the spte otherwise read access on readonly gfn also can
2753 * caused mmio page fault and treat it as mmio access.
2754 * Return 1 to tell kvm to emulate it.
2756 if (pfn
== KVM_PFN_ERR_RO_FAULT
)
2759 if (pfn
== KVM_PFN_ERR_HWPOISON
) {
2760 kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu
, gfn
), current
);
2767 static void transparent_hugepage_adjust(struct kvm_vcpu
*vcpu
,
2768 gfn_t
*gfnp
, pfn_t
*pfnp
, int *levelp
)
2772 int level
= *levelp
;
2775 * Check if it's a transparent hugepage. If this would be an
2776 * hugetlbfs page, level wouldn't be set to
2777 * PT_PAGE_TABLE_LEVEL and there would be no adjustment done
2780 if (!is_error_noslot_pfn(pfn
) && !kvm_is_reserved_pfn(pfn
) &&
2781 level
== PT_PAGE_TABLE_LEVEL
&&
2782 PageTransCompound(pfn_to_page(pfn
)) &&
2783 !has_wrprotected_page(vcpu
, gfn
, PT_DIRECTORY_LEVEL
)) {
2786 * mmu_notifier_retry was successful and we hold the
2787 * mmu_lock here, so the pmd can't become splitting
2788 * from under us, and in turn
2789 * __split_huge_page_refcount() can't run from under
2790 * us and we can safely transfer the refcount from
2791 * PG_tail to PG_head as we switch the pfn to tail to
2794 *levelp
= level
= PT_DIRECTORY_LEVEL
;
2795 mask
= KVM_PAGES_PER_HPAGE(level
) - 1;
2796 VM_BUG_ON((gfn
& mask
) != (pfn
& mask
));
2800 kvm_release_pfn_clean(pfn
);
2808 static bool handle_abnormal_pfn(struct kvm_vcpu
*vcpu
, gva_t gva
, gfn_t gfn
,
2809 pfn_t pfn
, unsigned access
, int *ret_val
)
2813 /* The pfn is invalid, report the error! */
2814 if (unlikely(is_error_pfn(pfn
))) {
2815 *ret_val
= kvm_handle_bad_page(vcpu
, gfn
, pfn
);
2819 if (unlikely(is_noslot_pfn(pfn
)))
2820 vcpu_cache_mmio_info(vcpu
, gva
, gfn
, access
);
2827 static bool page_fault_can_be_fast(u32 error_code
)
2830 * Do not fix the mmio spte with invalid generation number which
2831 * need to be updated by slow page fault path.
2833 if (unlikely(error_code
& PFERR_RSVD_MASK
))
2837 * #PF can be fast only if the shadow page table is present and it
2838 * is caused by write-protect, that means we just need change the
2839 * W bit of the spte which can be done out of mmu-lock.
2841 if (!(error_code
& PFERR_PRESENT_MASK
) ||
2842 !(error_code
& PFERR_WRITE_MASK
))
2849 fast_pf_fix_direct_spte(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
2850 u64
*sptep
, u64 spte
)
2854 WARN_ON(!sp
->role
.direct
);
2857 * The gfn of direct spte is stable since it is calculated
2860 gfn
= kvm_mmu_page_get_gfn(sp
, sptep
- sp
->spt
);
2863 * Theoretically we could also set dirty bit (and flush TLB) here in
2864 * order to eliminate unnecessary PML logging. See comments in
2865 * set_spte. But fast_page_fault is very unlikely to happen with PML
2866 * enabled, so we do not do this. This might result in the same GPA
2867 * to be logged in PML buffer again when the write really happens, and
2868 * eventually to be called by mark_page_dirty twice. But it's also no
2869 * harm. This also avoids the TLB flush needed after setting dirty bit
2870 * so non-PML cases won't be impacted.
2872 * Compare with set_spte where instead shadow_dirty_mask is set.
2874 if (cmpxchg64(sptep
, spte
, spte
| PT_WRITABLE_MASK
) == spte
)
2875 kvm_vcpu_mark_page_dirty(vcpu
, gfn
);
2882 * - true: let the vcpu to access on the same address again.
2883 * - false: let the real page fault path to fix it.
2885 static bool fast_page_fault(struct kvm_vcpu
*vcpu
, gva_t gva
, int level
,
2888 struct kvm_shadow_walk_iterator iterator
;
2889 struct kvm_mmu_page
*sp
;
2893 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2896 if (!page_fault_can_be_fast(error_code
))
2899 walk_shadow_page_lockless_begin(vcpu
);
2900 for_each_shadow_entry_lockless(vcpu
, gva
, iterator
, spte
)
2901 if (!is_shadow_present_pte(spte
) || iterator
.level
< level
)
2905 * If the mapping has been changed, let the vcpu fault on the
2906 * same address again.
2908 if (!is_rmap_spte(spte
)) {
2913 sp
= page_header(__pa(iterator
.sptep
));
2914 if (!is_last_spte(spte
, sp
->role
.level
))
2918 * Check if it is a spurious fault caused by TLB lazily flushed.
2920 * Need not check the access of upper level table entries since
2921 * they are always ACC_ALL.
2923 if (is_writable_pte(spte
)) {
2929 * Currently, to simplify the code, only the spte write-protected
2930 * by dirty-log can be fast fixed.
2932 if (!spte_is_locklessly_modifiable(spte
))
2936 * Do not fix write-permission on the large spte since we only dirty
2937 * the first page into the dirty-bitmap in fast_pf_fix_direct_spte()
2938 * that means other pages are missed if its slot is dirty-logged.
2940 * Instead, we let the slow page fault path create a normal spte to
2943 * See the comments in kvm_arch_commit_memory_region().
2945 if (sp
->role
.level
> PT_PAGE_TABLE_LEVEL
)
2949 * Currently, fast page fault only works for direct mapping since
2950 * the gfn is not stable for indirect shadow page.
2951 * See Documentation/virtual/kvm/locking.txt to get more detail.
2953 ret
= fast_pf_fix_direct_spte(vcpu
, sp
, iterator
.sptep
, spte
);
2955 trace_fast_page_fault(vcpu
, gva
, error_code
, iterator
.sptep
,
2957 walk_shadow_page_lockless_end(vcpu
);
2962 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
2963 gva_t gva
, pfn_t
*pfn
, bool write
, bool *writable
);
2964 static void make_mmu_pages_available(struct kvm_vcpu
*vcpu
);
2966 static int nonpaging_map(struct kvm_vcpu
*vcpu
, gva_t v
, u32 error_code
,
2967 gfn_t gfn
, bool prefault
)
2971 bool force_pt_level
= false;
2973 unsigned long mmu_seq
;
2974 bool map_writable
, write
= error_code
& PFERR_WRITE_MASK
;
2976 level
= mapping_level(vcpu
, gfn
, &force_pt_level
);
2977 if (likely(!force_pt_level
)) {
2979 * This path builds a PAE pagetable - so we can map
2980 * 2mb pages at maximum. Therefore check if the level
2981 * is larger than that.
2983 if (level
> PT_DIRECTORY_LEVEL
)
2984 level
= PT_DIRECTORY_LEVEL
;
2986 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
2989 if (fast_page_fault(vcpu
, v
, level
, error_code
))
2992 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
2995 if (try_async_pf(vcpu
, prefault
, gfn
, v
, &pfn
, write
, &map_writable
))
2998 if (handle_abnormal_pfn(vcpu
, v
, gfn
, pfn
, ACC_ALL
, &r
))
3001 spin_lock(&vcpu
->kvm
->mmu_lock
);
3002 if (mmu_notifier_retry(vcpu
->kvm
, mmu_seq
))
3004 make_mmu_pages_available(vcpu
);
3005 if (likely(!force_pt_level
))
3006 transparent_hugepage_adjust(vcpu
, &gfn
, &pfn
, &level
);
3007 r
= __direct_map(vcpu
, v
, write
, map_writable
, level
, gfn
, pfn
,
3009 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3015 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3016 kvm_release_pfn_clean(pfn
);
3021 static void mmu_free_roots(struct kvm_vcpu
*vcpu
)
3024 struct kvm_mmu_page
*sp
;
3025 LIST_HEAD(invalid_list
);
3027 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
3030 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
&&
3031 (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
||
3032 vcpu
->arch
.mmu
.direct_map
)) {
3033 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
3035 spin_lock(&vcpu
->kvm
->mmu_lock
);
3036 sp
= page_header(root
);
3038 if (!sp
->root_count
&& sp
->role
.invalid
) {
3039 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, &invalid_list
);
3040 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
3042 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3043 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
3047 spin_lock(&vcpu
->kvm
->mmu_lock
);
3048 for (i
= 0; i
< 4; ++i
) {
3049 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
3052 root
&= PT64_BASE_ADDR_MASK
;
3053 sp
= page_header(root
);
3055 if (!sp
->root_count
&& sp
->role
.invalid
)
3056 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
3059 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
3061 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
3062 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3063 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
3066 static int mmu_check_root(struct kvm_vcpu
*vcpu
, gfn_t root_gfn
)
3070 if (!kvm_is_visible_gfn(vcpu
->kvm
, root_gfn
)) {
3071 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3078 static int mmu_alloc_direct_roots(struct kvm_vcpu
*vcpu
)
3080 struct kvm_mmu_page
*sp
;
3083 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
3084 spin_lock(&vcpu
->kvm
->mmu_lock
);
3085 make_mmu_pages_available(vcpu
);
3086 sp
= kvm_mmu_get_page(vcpu
, 0, 0, PT64_ROOT_LEVEL
,
3089 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3090 vcpu
->arch
.mmu
.root_hpa
= __pa(sp
->spt
);
3091 } else if (vcpu
->arch
.mmu
.shadow_root_level
== PT32E_ROOT_LEVEL
) {
3092 for (i
= 0; i
< 4; ++i
) {
3093 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
3095 MMU_WARN_ON(VALID_PAGE(root
));
3096 spin_lock(&vcpu
->kvm
->mmu_lock
);
3097 make_mmu_pages_available(vcpu
);
3098 sp
= kvm_mmu_get_page(vcpu
, i
<< (30 - PAGE_SHIFT
),
3100 PT32_ROOT_LEVEL
, 1, ACC_ALL
,
3102 root
= __pa(sp
->spt
);
3104 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3105 vcpu
->arch
.mmu
.pae_root
[i
] = root
| PT_PRESENT_MASK
;
3107 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
3114 static int mmu_alloc_shadow_roots(struct kvm_vcpu
*vcpu
)
3116 struct kvm_mmu_page
*sp
;
3121 root_gfn
= vcpu
->arch
.mmu
.get_cr3(vcpu
) >> PAGE_SHIFT
;
3123 if (mmu_check_root(vcpu
, root_gfn
))
3127 * Do we shadow a long mode page table? If so we need to
3128 * write-protect the guests page table root.
3130 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
3131 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
3133 MMU_WARN_ON(VALID_PAGE(root
));
3135 spin_lock(&vcpu
->kvm
->mmu_lock
);
3136 make_mmu_pages_available(vcpu
);
3137 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, 0, PT64_ROOT_LEVEL
,
3139 root
= __pa(sp
->spt
);
3141 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3142 vcpu
->arch
.mmu
.root_hpa
= root
;
3147 * We shadow a 32 bit page table. This may be a legacy 2-level
3148 * or a PAE 3-level page table. In either case we need to be aware that
3149 * the shadow page table may be a PAE or a long mode page table.
3151 pm_mask
= PT_PRESENT_MASK
;
3152 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
)
3153 pm_mask
|= PT_ACCESSED_MASK
| PT_WRITABLE_MASK
| PT_USER_MASK
;
3155 for (i
= 0; i
< 4; ++i
) {
3156 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
3158 MMU_WARN_ON(VALID_PAGE(root
));
3159 if (vcpu
->arch
.mmu
.root_level
== PT32E_ROOT_LEVEL
) {
3160 pdptr
= vcpu
->arch
.mmu
.get_pdptr(vcpu
, i
);
3161 if (!is_present_gpte(pdptr
)) {
3162 vcpu
->arch
.mmu
.pae_root
[i
] = 0;
3165 root_gfn
= pdptr
>> PAGE_SHIFT
;
3166 if (mmu_check_root(vcpu
, root_gfn
))
3169 spin_lock(&vcpu
->kvm
->mmu_lock
);
3170 make_mmu_pages_available(vcpu
);
3171 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, i
<< 30,
3174 root
= __pa(sp
->spt
);
3176 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3178 vcpu
->arch
.mmu
.pae_root
[i
] = root
| pm_mask
;
3180 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
3183 * If we shadow a 32 bit page table with a long mode page
3184 * table we enter this path.
3186 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
3187 if (vcpu
->arch
.mmu
.lm_root
== NULL
) {
3189 * The additional page necessary for this is only
3190 * allocated on demand.
3195 lm_root
= (void*)get_zeroed_page(GFP_KERNEL
);
3196 if (lm_root
== NULL
)
3199 lm_root
[0] = __pa(vcpu
->arch
.mmu
.pae_root
) | pm_mask
;
3201 vcpu
->arch
.mmu
.lm_root
= lm_root
;
3204 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.lm_root
);
3210 static int mmu_alloc_roots(struct kvm_vcpu
*vcpu
)
3212 if (vcpu
->arch
.mmu
.direct_map
)
3213 return mmu_alloc_direct_roots(vcpu
);
3215 return mmu_alloc_shadow_roots(vcpu
);
3218 static void mmu_sync_roots(struct kvm_vcpu
*vcpu
)
3221 struct kvm_mmu_page
*sp
;
3223 if (vcpu
->arch
.mmu
.direct_map
)
3226 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
3229 vcpu_clear_mmio_info(vcpu
, MMIO_GVA_ANY
);
3230 kvm_mmu_audit(vcpu
, AUDIT_PRE_SYNC
);
3231 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
3232 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
3233 sp
= page_header(root
);
3234 mmu_sync_children(vcpu
, sp
);
3235 kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
3238 for (i
= 0; i
< 4; ++i
) {
3239 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
3241 if (root
&& VALID_PAGE(root
)) {
3242 root
&= PT64_BASE_ADDR_MASK
;
3243 sp
= page_header(root
);
3244 mmu_sync_children(vcpu
, sp
);
3247 kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
3250 void kvm_mmu_sync_roots(struct kvm_vcpu
*vcpu
)
3252 spin_lock(&vcpu
->kvm
->mmu_lock
);
3253 mmu_sync_roots(vcpu
);
3254 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3256 EXPORT_SYMBOL_GPL(kvm_mmu_sync_roots
);
3258 static gpa_t
nonpaging_gva_to_gpa(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
3259 u32 access
, struct x86_exception
*exception
)
3262 exception
->error_code
= 0;
3266 static gpa_t
nonpaging_gva_to_gpa_nested(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
3268 struct x86_exception
*exception
)
3271 exception
->error_code
= 0;
3272 return vcpu
->arch
.nested_mmu
.translate_gpa(vcpu
, vaddr
, access
, exception
);
3276 __is_rsvd_bits_set(struct rsvd_bits_validate
*rsvd_check
, u64 pte
, int level
)
3278 int bit7
= (pte
>> 7) & 1, low6
= pte
& 0x3f;
3280 return (pte
& rsvd_check
->rsvd_bits_mask
[bit7
][level
-1]) |
3281 ((rsvd_check
->bad_mt_xwr
& (1ull << low6
)) != 0);
3284 static bool is_rsvd_bits_set(struct kvm_mmu
*mmu
, u64 gpte
, int level
)
3286 return __is_rsvd_bits_set(&mmu
->guest_rsvd_check
, gpte
, level
);
3289 static bool is_shadow_zero_bits_set(struct kvm_mmu
*mmu
, u64 spte
, int level
)
3291 return __is_rsvd_bits_set(&mmu
->shadow_zero_check
, spte
, level
);
3294 static bool quickly_check_mmio_pf(struct kvm_vcpu
*vcpu
, u64 addr
, bool direct
)
3297 return vcpu_match_mmio_gpa(vcpu
, addr
);
3299 return vcpu_match_mmio_gva(vcpu
, addr
);
3302 /* return true if reserved bit is detected on spte. */
3304 walk_shadow_page_get_mmio_spte(struct kvm_vcpu
*vcpu
, u64 addr
, u64
*sptep
)
3306 struct kvm_shadow_walk_iterator iterator
;
3307 u64 sptes
[PT64_ROOT_LEVEL
], spte
= 0ull;
3309 bool reserved
= false;
3311 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
3314 walk_shadow_page_lockless_begin(vcpu
);
3316 for (shadow_walk_init(&iterator
, vcpu
, addr
),
3317 leaf
= root
= iterator
.level
;
3318 shadow_walk_okay(&iterator
);
3319 __shadow_walk_next(&iterator
, spte
)) {
3320 spte
= mmu_spte_get_lockless(iterator
.sptep
);
3322 sptes
[leaf
- 1] = spte
;
3325 if (!is_shadow_present_pte(spte
))
3328 reserved
|= is_shadow_zero_bits_set(&vcpu
->arch
.mmu
, spte
,
3332 walk_shadow_page_lockless_end(vcpu
);
3335 pr_err("%s: detect reserved bits on spte, addr 0x%llx, dump hierarchy:\n",
3337 while (root
> leaf
) {
3338 pr_err("------ spte 0x%llx level %d.\n",
3339 sptes
[root
- 1], root
);
3348 int handle_mmio_page_fault_common(struct kvm_vcpu
*vcpu
, u64 addr
, bool direct
)
3353 if (quickly_check_mmio_pf(vcpu
, addr
, direct
))
3354 return RET_MMIO_PF_EMULATE
;
3356 reserved
= walk_shadow_page_get_mmio_spte(vcpu
, addr
, &spte
);
3357 if (unlikely(reserved
))
3358 return RET_MMIO_PF_BUG
;
3360 if (is_mmio_spte(spte
)) {
3361 gfn_t gfn
= get_mmio_spte_gfn(spte
);
3362 unsigned access
= get_mmio_spte_access(spte
);
3364 if (!check_mmio_spte(vcpu
, spte
))
3365 return RET_MMIO_PF_INVALID
;
3370 trace_handle_mmio_page_fault(addr
, gfn
, access
);
3371 vcpu_cache_mmio_info(vcpu
, addr
, gfn
, access
);
3372 return RET_MMIO_PF_EMULATE
;
3376 * If the page table is zapped by other cpus, let CPU fault again on
3379 return RET_MMIO_PF_RETRY
;
3381 EXPORT_SYMBOL_GPL(handle_mmio_page_fault_common
);
3383 static int handle_mmio_page_fault(struct kvm_vcpu
*vcpu
, u64 addr
,
3384 u32 error_code
, bool direct
)
3388 ret
= handle_mmio_page_fault_common(vcpu
, addr
, direct
);
3389 WARN_ON(ret
== RET_MMIO_PF_BUG
);
3393 static int nonpaging_page_fault(struct kvm_vcpu
*vcpu
, gva_t gva
,
3394 u32 error_code
, bool prefault
)
3399 pgprintk("%s: gva %lx error %x\n", __func__
, gva
, error_code
);
3401 if (unlikely(error_code
& PFERR_RSVD_MASK
)) {
3402 r
= handle_mmio_page_fault(vcpu
, gva
, error_code
, true);
3404 if (likely(r
!= RET_MMIO_PF_INVALID
))
3408 r
= mmu_topup_memory_caches(vcpu
);
3412 MMU_WARN_ON(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3414 gfn
= gva
>> PAGE_SHIFT
;
3416 return nonpaging_map(vcpu
, gva
& PAGE_MASK
,
3417 error_code
, gfn
, prefault
);
3420 static int kvm_arch_setup_async_pf(struct kvm_vcpu
*vcpu
, gva_t gva
, gfn_t gfn
)
3422 struct kvm_arch_async_pf arch
;
3424 arch
.token
= (vcpu
->arch
.apf
.id
++ << 12) | vcpu
->vcpu_id
;
3426 arch
.direct_map
= vcpu
->arch
.mmu
.direct_map
;
3427 arch
.cr3
= vcpu
->arch
.mmu
.get_cr3(vcpu
);
3429 return kvm_setup_async_pf(vcpu
, gva
, kvm_vcpu_gfn_to_hva(vcpu
, gfn
), &arch
);
3432 static bool can_do_async_pf(struct kvm_vcpu
*vcpu
)
3434 if (unlikely(!lapic_in_kernel(vcpu
) ||
3435 kvm_event_needs_reinjection(vcpu
)))
3438 return kvm_x86_ops
->interrupt_allowed(vcpu
);
3441 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
3442 gva_t gva
, pfn_t
*pfn
, bool write
, bool *writable
)
3444 struct kvm_memory_slot
*slot
;
3447 slot
= kvm_vcpu_gfn_to_memslot(vcpu
, gfn
);
3449 *pfn
= __gfn_to_pfn_memslot(slot
, gfn
, false, &async
, write
, writable
);
3451 return false; /* *pfn has correct page already */
3453 if (!prefault
&& can_do_async_pf(vcpu
)) {
3454 trace_kvm_try_async_get_page(gva
, gfn
);
3455 if (kvm_find_async_pf_gfn(vcpu
, gfn
)) {
3456 trace_kvm_async_pf_doublefault(gva
, gfn
);
3457 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
3459 } else if (kvm_arch_setup_async_pf(vcpu
, gva
, gfn
))
3463 *pfn
= __gfn_to_pfn_memslot(slot
, gfn
, false, NULL
, write
, writable
);
3468 check_hugepage_cache_consistency(struct kvm_vcpu
*vcpu
, gfn_t gfn
, int level
)
3470 int page_num
= KVM_PAGES_PER_HPAGE(level
);
3472 gfn
&= ~(page_num
- 1);
3474 return kvm_mtrr_check_gfn_range_consistency(vcpu
, gfn
, page_num
);
3477 static int tdp_page_fault(struct kvm_vcpu
*vcpu
, gva_t gpa
, u32 error_code
,
3483 bool force_pt_level
;
3484 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
3485 unsigned long mmu_seq
;
3486 int write
= error_code
& PFERR_WRITE_MASK
;
3489 MMU_WARN_ON(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3491 if (unlikely(error_code
& PFERR_RSVD_MASK
)) {
3492 r
= handle_mmio_page_fault(vcpu
, gpa
, error_code
, true);
3494 if (likely(r
!= RET_MMIO_PF_INVALID
))
3498 r
= mmu_topup_memory_caches(vcpu
);
3502 force_pt_level
= !check_hugepage_cache_consistency(vcpu
, gfn
,
3503 PT_DIRECTORY_LEVEL
);
3504 level
= mapping_level(vcpu
, gfn
, &force_pt_level
);
3505 if (likely(!force_pt_level
)) {
3506 if (level
> PT_DIRECTORY_LEVEL
&&
3507 !check_hugepage_cache_consistency(vcpu
, gfn
, level
))
3508 level
= PT_DIRECTORY_LEVEL
;
3509 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
3512 if (fast_page_fault(vcpu
, gpa
, level
, error_code
))
3515 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
3518 if (try_async_pf(vcpu
, prefault
, gfn
, gpa
, &pfn
, write
, &map_writable
))
3521 if (handle_abnormal_pfn(vcpu
, 0, gfn
, pfn
, ACC_ALL
, &r
))
3524 spin_lock(&vcpu
->kvm
->mmu_lock
);
3525 if (mmu_notifier_retry(vcpu
->kvm
, mmu_seq
))
3527 make_mmu_pages_available(vcpu
);
3528 if (likely(!force_pt_level
))
3529 transparent_hugepage_adjust(vcpu
, &gfn
, &pfn
, &level
);
3530 r
= __direct_map(vcpu
, gpa
, write
, map_writable
,
3531 level
, gfn
, pfn
, prefault
);
3532 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3537 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3538 kvm_release_pfn_clean(pfn
);
3542 static void nonpaging_init_context(struct kvm_vcpu
*vcpu
,
3543 struct kvm_mmu
*context
)
3545 context
->page_fault
= nonpaging_page_fault
;
3546 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
3547 context
->sync_page
= nonpaging_sync_page
;
3548 context
->invlpg
= nonpaging_invlpg
;
3549 context
->update_pte
= nonpaging_update_pte
;
3550 context
->root_level
= 0;
3551 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
3552 context
->root_hpa
= INVALID_PAGE
;
3553 context
->direct_map
= true;
3554 context
->nx
= false;
3557 void kvm_mmu_new_cr3(struct kvm_vcpu
*vcpu
)
3559 mmu_free_roots(vcpu
);
3562 static unsigned long get_cr3(struct kvm_vcpu
*vcpu
)
3564 return kvm_read_cr3(vcpu
);
3567 static void inject_page_fault(struct kvm_vcpu
*vcpu
,
3568 struct x86_exception
*fault
)
3570 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
3573 static bool sync_mmio_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
, gfn_t gfn
,
3574 unsigned access
, int *nr_present
)
3576 if (unlikely(is_mmio_spte(*sptep
))) {
3577 if (gfn
!= get_mmio_spte_gfn(*sptep
)) {
3578 mmu_spte_clear_no_track(sptep
);
3583 mark_mmio_spte(vcpu
, sptep
, gfn
, access
);
3590 static inline bool is_last_gpte(struct kvm_mmu
*mmu
, unsigned level
, unsigned gpte
)
3595 index
|= (gpte
& PT_PAGE_SIZE_MASK
) >> (PT_PAGE_SIZE_SHIFT
- 2);
3596 return mmu
->last_pte_bitmap
& (1 << index
);
3599 #define PTTYPE_EPT 18 /* arbitrary */
3600 #define PTTYPE PTTYPE_EPT
3601 #include "paging_tmpl.h"
3605 #include "paging_tmpl.h"
3609 #include "paging_tmpl.h"
3613 __reset_rsvds_bits_mask(struct kvm_vcpu
*vcpu
,
3614 struct rsvd_bits_validate
*rsvd_check
,
3615 int maxphyaddr
, int level
, bool nx
, bool gbpages
,
3618 u64 exb_bit_rsvd
= 0;
3619 u64 gbpages_bit_rsvd
= 0;
3620 u64 nonleaf_bit8_rsvd
= 0;
3622 rsvd_check
->bad_mt_xwr
= 0;
3625 exb_bit_rsvd
= rsvd_bits(63, 63);
3627 gbpages_bit_rsvd
= rsvd_bits(7, 7);
3630 * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for
3631 * leaf entries) on AMD CPUs only.
3634 nonleaf_bit8_rsvd
= rsvd_bits(8, 8);
3637 case PT32_ROOT_LEVEL
:
3638 /* no rsvd bits for 2 level 4K page table entries */
3639 rsvd_check
->rsvd_bits_mask
[0][1] = 0;
3640 rsvd_check
->rsvd_bits_mask
[0][0] = 0;
3641 rsvd_check
->rsvd_bits_mask
[1][0] =
3642 rsvd_check
->rsvd_bits_mask
[0][0];
3645 rsvd_check
->rsvd_bits_mask
[1][1] = 0;
3649 if (is_cpuid_PSE36())
3650 /* 36bits PSE 4MB page */
3651 rsvd_check
->rsvd_bits_mask
[1][1] = rsvd_bits(17, 21);
3653 /* 32 bits PSE 4MB page */
3654 rsvd_check
->rsvd_bits_mask
[1][1] = rsvd_bits(13, 21);
3656 case PT32E_ROOT_LEVEL
:
3657 rsvd_check
->rsvd_bits_mask
[0][2] =
3658 rsvd_bits(maxphyaddr
, 63) |
3659 rsvd_bits(5, 8) | rsvd_bits(1, 2); /* PDPTE */
3660 rsvd_check
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
3661 rsvd_bits(maxphyaddr
, 62); /* PDE */
3662 rsvd_check
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
3663 rsvd_bits(maxphyaddr
, 62); /* PTE */
3664 rsvd_check
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
3665 rsvd_bits(maxphyaddr
, 62) |
3666 rsvd_bits(13, 20); /* large page */
3667 rsvd_check
->rsvd_bits_mask
[1][0] =
3668 rsvd_check
->rsvd_bits_mask
[0][0];
3670 case PT64_ROOT_LEVEL
:
3671 rsvd_check
->rsvd_bits_mask
[0][3] = exb_bit_rsvd
|
3672 nonleaf_bit8_rsvd
| rsvd_bits(7, 7) |
3673 rsvd_bits(maxphyaddr
, 51);
3674 rsvd_check
->rsvd_bits_mask
[0][2] = exb_bit_rsvd
|
3675 nonleaf_bit8_rsvd
| gbpages_bit_rsvd
|
3676 rsvd_bits(maxphyaddr
, 51);
3677 rsvd_check
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
3678 rsvd_bits(maxphyaddr
, 51);
3679 rsvd_check
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
3680 rsvd_bits(maxphyaddr
, 51);
3681 rsvd_check
->rsvd_bits_mask
[1][3] =
3682 rsvd_check
->rsvd_bits_mask
[0][3];
3683 rsvd_check
->rsvd_bits_mask
[1][2] = exb_bit_rsvd
|
3684 gbpages_bit_rsvd
| rsvd_bits(maxphyaddr
, 51) |
3686 rsvd_check
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
3687 rsvd_bits(maxphyaddr
, 51) |
3688 rsvd_bits(13, 20); /* large page */
3689 rsvd_check
->rsvd_bits_mask
[1][0] =
3690 rsvd_check
->rsvd_bits_mask
[0][0];
3695 static void reset_rsvds_bits_mask(struct kvm_vcpu
*vcpu
,
3696 struct kvm_mmu
*context
)
3698 __reset_rsvds_bits_mask(vcpu
, &context
->guest_rsvd_check
,
3699 cpuid_maxphyaddr(vcpu
), context
->root_level
,
3700 context
->nx
, guest_cpuid_has_gbpages(vcpu
),
3701 is_pse(vcpu
), guest_cpuid_is_amd(vcpu
));
3705 __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate
*rsvd_check
,
3706 int maxphyaddr
, bool execonly
)
3710 rsvd_check
->rsvd_bits_mask
[0][3] =
3711 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(3, 7);
3712 rsvd_check
->rsvd_bits_mask
[0][2] =
3713 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(3, 6);
3714 rsvd_check
->rsvd_bits_mask
[0][1] =
3715 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(3, 6);
3716 rsvd_check
->rsvd_bits_mask
[0][0] = rsvd_bits(maxphyaddr
, 51);
3719 rsvd_check
->rsvd_bits_mask
[1][3] = rsvd_check
->rsvd_bits_mask
[0][3];
3720 rsvd_check
->rsvd_bits_mask
[1][2] =
3721 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(12, 29);
3722 rsvd_check
->rsvd_bits_mask
[1][1] =
3723 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(12, 20);
3724 rsvd_check
->rsvd_bits_mask
[1][0] = rsvd_check
->rsvd_bits_mask
[0][0];
3726 bad_mt_xwr
= 0xFFull
<< (2 * 8); /* bits 3..5 must not be 2 */
3727 bad_mt_xwr
|= 0xFFull
<< (3 * 8); /* bits 3..5 must not be 3 */
3728 bad_mt_xwr
|= 0xFFull
<< (7 * 8); /* bits 3..5 must not be 7 */
3729 bad_mt_xwr
|= REPEAT_BYTE(1ull << 2); /* bits 0..2 must not be 010 */
3730 bad_mt_xwr
|= REPEAT_BYTE(1ull << 6); /* bits 0..2 must not be 110 */
3732 /* bits 0..2 must not be 100 unless VMX capabilities allow it */
3733 bad_mt_xwr
|= REPEAT_BYTE(1ull << 4);
3735 rsvd_check
->bad_mt_xwr
= bad_mt_xwr
;
3738 static void reset_rsvds_bits_mask_ept(struct kvm_vcpu
*vcpu
,
3739 struct kvm_mmu
*context
, bool execonly
)
3741 __reset_rsvds_bits_mask_ept(&context
->guest_rsvd_check
,
3742 cpuid_maxphyaddr(vcpu
), execonly
);
3746 * the page table on host is the shadow page table for the page
3747 * table in guest or amd nested guest, its mmu features completely
3748 * follow the features in guest.
3751 reset_shadow_zero_bits_mask(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*context
)
3754 * Passing "true" to the last argument is okay; it adds a check
3755 * on bit 8 of the SPTEs which KVM doesn't use anyway.
3757 __reset_rsvds_bits_mask(vcpu
, &context
->shadow_zero_check
,
3758 boot_cpu_data
.x86_phys_bits
,
3759 context
->shadow_root_level
, context
->nx
,
3760 guest_cpuid_has_gbpages(vcpu
), is_pse(vcpu
),
3763 EXPORT_SYMBOL_GPL(reset_shadow_zero_bits_mask
);
3765 static inline bool boot_cpu_is_amd(void)
3767 WARN_ON_ONCE(!tdp_enabled
);
3768 return shadow_x_mask
== 0;
3772 * the direct page table on host, use as much mmu features as
3773 * possible, however, kvm currently does not do execution-protection.
3776 reset_tdp_shadow_zero_bits_mask(struct kvm_vcpu
*vcpu
,
3777 struct kvm_mmu
*context
)
3779 if (boot_cpu_is_amd())
3780 __reset_rsvds_bits_mask(vcpu
, &context
->shadow_zero_check
,
3781 boot_cpu_data
.x86_phys_bits
,
3782 context
->shadow_root_level
, false,
3783 cpu_has_gbpages
, true, true);
3785 __reset_rsvds_bits_mask_ept(&context
->shadow_zero_check
,
3786 boot_cpu_data
.x86_phys_bits
,
3792 * as the comments in reset_shadow_zero_bits_mask() except it
3793 * is the shadow page table for intel nested guest.
3796 reset_ept_shadow_zero_bits_mask(struct kvm_vcpu
*vcpu
,
3797 struct kvm_mmu
*context
, bool execonly
)
3799 __reset_rsvds_bits_mask_ept(&context
->shadow_zero_check
,
3800 boot_cpu_data
.x86_phys_bits
, execonly
);
3803 static void update_permission_bitmask(struct kvm_vcpu
*vcpu
,
3804 struct kvm_mmu
*mmu
, bool ept
)
3806 unsigned bit
, byte
, pfec
;
3808 bool fault
, x
, w
, u
, wf
, uf
, ff
, smapf
, cr4_smap
, cr4_smep
, smap
= 0;
3810 cr4_smep
= kvm_read_cr4_bits(vcpu
, X86_CR4_SMEP
);
3811 cr4_smap
= kvm_read_cr4_bits(vcpu
, X86_CR4_SMAP
);
3812 for (byte
= 0; byte
< ARRAY_SIZE(mmu
->permissions
); ++byte
) {
3815 wf
= pfec
& PFERR_WRITE_MASK
;
3816 uf
= pfec
& PFERR_USER_MASK
;
3817 ff
= pfec
& PFERR_FETCH_MASK
;
3819 * PFERR_RSVD_MASK bit is set in PFEC if the access is not
3820 * subject to SMAP restrictions, and cleared otherwise. The
3821 * bit is only meaningful if the SMAP bit is set in CR4.
3823 smapf
= !(pfec
& PFERR_RSVD_MASK
);
3824 for (bit
= 0; bit
< 8; ++bit
) {
3825 x
= bit
& ACC_EXEC_MASK
;
3826 w
= bit
& ACC_WRITE_MASK
;
3827 u
= bit
& ACC_USER_MASK
;
3830 /* Not really needed: !nx will cause pte.nx to fault */
3832 /* Allow supervisor writes if !cr0.wp */
3833 w
|= !is_write_protection(vcpu
) && !uf
;
3834 /* Disallow supervisor fetches of user code if cr4.smep */
3835 x
&= !(cr4_smep
&& u
&& !uf
);
3838 * SMAP:kernel-mode data accesses from user-mode
3839 * mappings should fault. A fault is considered
3840 * as a SMAP violation if all of the following
3841 * conditions are ture:
3842 * - X86_CR4_SMAP is set in CR4
3843 * - An user page is accessed
3844 * - Page fault in kernel mode
3845 * - if CPL = 3 or X86_EFLAGS_AC is clear
3847 * Here, we cover the first three conditions.
3848 * The fourth is computed dynamically in
3849 * permission_fault() and is in smapf.
3851 * Also, SMAP does not affect instruction
3852 * fetches, add the !ff check here to make it
3855 smap
= cr4_smap
&& u
&& !uf
&& !ff
;
3857 /* Not really needed: no U/S accesses on ept */
3860 fault
= (ff
&& !x
) || (uf
&& !u
) || (wf
&& !w
) ||
3862 map
|= fault
<< bit
;
3864 mmu
->permissions
[byte
] = map
;
3868 static void update_last_pte_bitmap(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
)
3871 unsigned level
, root_level
= mmu
->root_level
;
3872 const unsigned ps_set_index
= 1 << 2; /* bit 2 of index: ps */
3874 if (root_level
== PT32E_ROOT_LEVEL
)
3876 /* PT_PAGE_TABLE_LEVEL always terminates */
3877 map
= 1 | (1 << ps_set_index
);
3878 for (level
= PT_DIRECTORY_LEVEL
; level
<= root_level
; ++level
) {
3879 if (level
<= PT_PDPE_LEVEL
3880 && (mmu
->root_level
>= PT32E_ROOT_LEVEL
|| is_pse(vcpu
)))
3881 map
|= 1 << (ps_set_index
| (level
- 1));
3883 mmu
->last_pte_bitmap
= map
;
3886 static void paging64_init_context_common(struct kvm_vcpu
*vcpu
,
3887 struct kvm_mmu
*context
,
3890 context
->nx
= is_nx(vcpu
);
3891 context
->root_level
= level
;
3893 reset_rsvds_bits_mask(vcpu
, context
);
3894 update_permission_bitmask(vcpu
, context
, false);
3895 update_last_pte_bitmap(vcpu
, context
);
3897 MMU_WARN_ON(!is_pae(vcpu
));
3898 context
->page_fault
= paging64_page_fault
;
3899 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3900 context
->sync_page
= paging64_sync_page
;
3901 context
->invlpg
= paging64_invlpg
;
3902 context
->update_pte
= paging64_update_pte
;
3903 context
->shadow_root_level
= level
;
3904 context
->root_hpa
= INVALID_PAGE
;
3905 context
->direct_map
= false;
3908 static void paging64_init_context(struct kvm_vcpu
*vcpu
,
3909 struct kvm_mmu
*context
)
3911 paging64_init_context_common(vcpu
, context
, PT64_ROOT_LEVEL
);
3914 static void paging32_init_context(struct kvm_vcpu
*vcpu
,
3915 struct kvm_mmu
*context
)
3917 context
->nx
= false;
3918 context
->root_level
= PT32_ROOT_LEVEL
;
3920 reset_rsvds_bits_mask(vcpu
, context
);
3921 update_permission_bitmask(vcpu
, context
, false);
3922 update_last_pte_bitmap(vcpu
, context
);
3924 context
->page_fault
= paging32_page_fault
;
3925 context
->gva_to_gpa
= paging32_gva_to_gpa
;
3926 context
->sync_page
= paging32_sync_page
;
3927 context
->invlpg
= paging32_invlpg
;
3928 context
->update_pte
= paging32_update_pte
;
3929 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
3930 context
->root_hpa
= INVALID_PAGE
;
3931 context
->direct_map
= false;
3934 static void paging32E_init_context(struct kvm_vcpu
*vcpu
,
3935 struct kvm_mmu
*context
)
3937 paging64_init_context_common(vcpu
, context
, PT32E_ROOT_LEVEL
);
3940 static void init_kvm_tdp_mmu(struct kvm_vcpu
*vcpu
)
3942 struct kvm_mmu
*context
= &vcpu
->arch
.mmu
;
3944 context
->base_role
.word
= 0;
3945 context
->base_role
.smm
= is_smm(vcpu
);
3946 context
->page_fault
= tdp_page_fault
;
3947 context
->sync_page
= nonpaging_sync_page
;
3948 context
->invlpg
= nonpaging_invlpg
;
3949 context
->update_pte
= nonpaging_update_pte
;
3950 context
->shadow_root_level
= kvm_x86_ops
->get_tdp_level();
3951 context
->root_hpa
= INVALID_PAGE
;
3952 context
->direct_map
= true;
3953 context
->set_cr3
= kvm_x86_ops
->set_tdp_cr3
;
3954 context
->get_cr3
= get_cr3
;
3955 context
->get_pdptr
= kvm_pdptr_read
;
3956 context
->inject_page_fault
= kvm_inject_page_fault
;
3958 if (!is_paging(vcpu
)) {
3959 context
->nx
= false;
3960 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
3961 context
->root_level
= 0;
3962 } else if (is_long_mode(vcpu
)) {
3963 context
->nx
= is_nx(vcpu
);
3964 context
->root_level
= PT64_ROOT_LEVEL
;
3965 reset_rsvds_bits_mask(vcpu
, context
);
3966 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3967 } else if (is_pae(vcpu
)) {
3968 context
->nx
= is_nx(vcpu
);
3969 context
->root_level
= PT32E_ROOT_LEVEL
;
3970 reset_rsvds_bits_mask(vcpu
, context
);
3971 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3973 context
->nx
= false;
3974 context
->root_level
= PT32_ROOT_LEVEL
;
3975 reset_rsvds_bits_mask(vcpu
, context
);
3976 context
->gva_to_gpa
= paging32_gva_to_gpa
;
3979 update_permission_bitmask(vcpu
, context
, false);
3980 update_last_pte_bitmap(vcpu
, context
);
3981 reset_tdp_shadow_zero_bits_mask(vcpu
, context
);
3984 void kvm_init_shadow_mmu(struct kvm_vcpu
*vcpu
)
3986 bool smep
= kvm_read_cr4_bits(vcpu
, X86_CR4_SMEP
);
3987 bool smap
= kvm_read_cr4_bits(vcpu
, X86_CR4_SMAP
);
3988 struct kvm_mmu
*context
= &vcpu
->arch
.mmu
;
3990 MMU_WARN_ON(VALID_PAGE(context
->root_hpa
));
3992 if (!is_paging(vcpu
))
3993 nonpaging_init_context(vcpu
, context
);
3994 else if (is_long_mode(vcpu
))
3995 paging64_init_context(vcpu
, context
);
3996 else if (is_pae(vcpu
))
3997 paging32E_init_context(vcpu
, context
);
3999 paging32_init_context(vcpu
, context
);
4001 context
->base_role
.nxe
= is_nx(vcpu
);
4002 context
->base_role
.cr4_pae
= !!is_pae(vcpu
);
4003 context
->base_role
.cr0_wp
= is_write_protection(vcpu
);
4004 context
->base_role
.smep_andnot_wp
4005 = smep
&& !is_write_protection(vcpu
);
4006 context
->base_role
.smap_andnot_wp
4007 = smap
&& !is_write_protection(vcpu
);
4008 context
->base_role
.smm
= is_smm(vcpu
);
4009 reset_shadow_zero_bits_mask(vcpu
, context
);
4011 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu
);
4013 void kvm_init_shadow_ept_mmu(struct kvm_vcpu
*vcpu
, bool execonly
)
4015 struct kvm_mmu
*context
= &vcpu
->arch
.mmu
;
4017 MMU_WARN_ON(VALID_PAGE(context
->root_hpa
));
4019 context
->shadow_root_level
= kvm_x86_ops
->get_tdp_level();
4022 context
->page_fault
= ept_page_fault
;
4023 context
->gva_to_gpa
= ept_gva_to_gpa
;
4024 context
->sync_page
= ept_sync_page
;
4025 context
->invlpg
= ept_invlpg
;
4026 context
->update_pte
= ept_update_pte
;
4027 context
->root_level
= context
->shadow_root_level
;
4028 context
->root_hpa
= INVALID_PAGE
;
4029 context
->direct_map
= false;
4031 update_permission_bitmask(vcpu
, context
, true);
4032 reset_rsvds_bits_mask_ept(vcpu
, context
, execonly
);
4033 reset_ept_shadow_zero_bits_mask(vcpu
, context
, execonly
);
4035 EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu
);
4037 static void init_kvm_softmmu(struct kvm_vcpu
*vcpu
)
4039 struct kvm_mmu
*context
= &vcpu
->arch
.mmu
;
4041 kvm_init_shadow_mmu(vcpu
);
4042 context
->set_cr3
= kvm_x86_ops
->set_cr3
;
4043 context
->get_cr3
= get_cr3
;
4044 context
->get_pdptr
= kvm_pdptr_read
;
4045 context
->inject_page_fault
= kvm_inject_page_fault
;
4048 static void init_kvm_nested_mmu(struct kvm_vcpu
*vcpu
)
4050 struct kvm_mmu
*g_context
= &vcpu
->arch
.nested_mmu
;
4052 g_context
->get_cr3
= get_cr3
;
4053 g_context
->get_pdptr
= kvm_pdptr_read
;
4054 g_context
->inject_page_fault
= kvm_inject_page_fault
;
4057 * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
4058 * translation of l2_gpa to l1_gpa addresses is done using the
4059 * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
4060 * functions between mmu and nested_mmu are swapped.
4062 if (!is_paging(vcpu
)) {
4063 g_context
->nx
= false;
4064 g_context
->root_level
= 0;
4065 g_context
->gva_to_gpa
= nonpaging_gva_to_gpa_nested
;
4066 } else if (is_long_mode(vcpu
)) {
4067 g_context
->nx
= is_nx(vcpu
);
4068 g_context
->root_level
= PT64_ROOT_LEVEL
;
4069 reset_rsvds_bits_mask(vcpu
, g_context
);
4070 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
4071 } else if (is_pae(vcpu
)) {
4072 g_context
->nx
= is_nx(vcpu
);
4073 g_context
->root_level
= PT32E_ROOT_LEVEL
;
4074 reset_rsvds_bits_mask(vcpu
, g_context
);
4075 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
4077 g_context
->nx
= false;
4078 g_context
->root_level
= PT32_ROOT_LEVEL
;
4079 reset_rsvds_bits_mask(vcpu
, g_context
);
4080 g_context
->gva_to_gpa
= paging32_gva_to_gpa_nested
;
4083 update_permission_bitmask(vcpu
, g_context
, false);
4084 update_last_pte_bitmap(vcpu
, g_context
);
4087 static void init_kvm_mmu(struct kvm_vcpu
*vcpu
)
4089 if (mmu_is_nested(vcpu
))
4090 init_kvm_nested_mmu(vcpu
);
4091 else if (tdp_enabled
)
4092 init_kvm_tdp_mmu(vcpu
);
4094 init_kvm_softmmu(vcpu
);
4097 void kvm_mmu_reset_context(struct kvm_vcpu
*vcpu
)
4099 kvm_mmu_unload(vcpu
);
4102 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context
);
4104 int kvm_mmu_load(struct kvm_vcpu
*vcpu
)
4108 r
= mmu_topup_memory_caches(vcpu
);
4111 r
= mmu_alloc_roots(vcpu
);
4112 kvm_mmu_sync_roots(vcpu
);
4115 /* set_cr3() should ensure TLB has been flushed */
4116 vcpu
->arch
.mmu
.set_cr3(vcpu
, vcpu
->arch
.mmu
.root_hpa
);
4120 EXPORT_SYMBOL_GPL(kvm_mmu_load
);
4122 void kvm_mmu_unload(struct kvm_vcpu
*vcpu
)
4124 mmu_free_roots(vcpu
);
4125 WARN_ON(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
4127 EXPORT_SYMBOL_GPL(kvm_mmu_unload
);
4129 static void mmu_pte_write_new_pte(struct kvm_vcpu
*vcpu
,
4130 struct kvm_mmu_page
*sp
, u64
*spte
,
4133 if (sp
->role
.level
!= PT_PAGE_TABLE_LEVEL
) {
4134 ++vcpu
->kvm
->stat
.mmu_pde_zapped
;
4138 ++vcpu
->kvm
->stat
.mmu_pte_updated
;
4139 vcpu
->arch
.mmu
.update_pte(vcpu
, sp
, spte
, new);
4142 static bool need_remote_flush(u64 old
, u64
new)
4144 if (!is_shadow_present_pte(old
))
4146 if (!is_shadow_present_pte(new))
4148 if ((old
^ new) & PT64_BASE_ADDR_MASK
)
4150 old
^= shadow_nx_mask
;
4151 new ^= shadow_nx_mask
;
4152 return (old
& ~new & PT64_PERM_MASK
) != 0;
4155 static void mmu_pte_write_flush_tlb(struct kvm_vcpu
*vcpu
, bool zap_page
,
4156 bool remote_flush
, bool local_flush
)
4162 kvm_flush_remote_tlbs(vcpu
->kvm
);
4163 else if (local_flush
)
4164 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
4167 static u64
mmu_pte_write_fetch_gpte(struct kvm_vcpu
*vcpu
, gpa_t
*gpa
,
4168 const u8
*new, int *bytes
)
4174 * Assume that the pte write on a page table of the same type
4175 * as the current vcpu paging mode since we update the sptes only
4176 * when they have the same mode.
4178 if (is_pae(vcpu
) && *bytes
== 4) {
4179 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
4182 r
= kvm_vcpu_read_guest(vcpu
, *gpa
, &gentry
, 8);
4185 new = (const u8
*)&gentry
;
4190 gentry
= *(const u32
*)new;
4193 gentry
= *(const u64
*)new;
4204 * If we're seeing too many writes to a page, it may no longer be a page table,
4205 * or we may be forking, in which case it is better to unmap the page.
4207 static bool detect_write_flooding(struct kvm_mmu_page
*sp
)
4210 * Skip write-flooding detected for the sp whose level is 1, because
4211 * it can become unsync, then the guest page is not write-protected.
4213 if (sp
->role
.level
== PT_PAGE_TABLE_LEVEL
)
4216 return ++sp
->write_flooding_count
>= 3;
4220 * Misaligned accesses are too much trouble to fix up; also, they usually
4221 * indicate a page is not used as a page table.
4223 static bool detect_write_misaligned(struct kvm_mmu_page
*sp
, gpa_t gpa
,
4226 unsigned offset
, pte_size
, misaligned
;
4228 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4229 gpa
, bytes
, sp
->role
.word
);
4231 offset
= offset_in_page(gpa
);
4232 pte_size
= sp
->role
.cr4_pae
? 8 : 4;
4235 * Sometimes, the OS only writes the last one bytes to update status
4236 * bits, for example, in linux, andb instruction is used in clear_bit().
4238 if (!(offset
& (pte_size
- 1)) && bytes
== 1)
4241 misaligned
= (offset
^ (offset
+ bytes
- 1)) & ~(pte_size
- 1);
4242 misaligned
|= bytes
< 4;
4247 static u64
*get_written_sptes(struct kvm_mmu_page
*sp
, gpa_t gpa
, int *nspte
)
4249 unsigned page_offset
, quadrant
;
4253 page_offset
= offset_in_page(gpa
);
4254 level
= sp
->role
.level
;
4256 if (!sp
->role
.cr4_pae
) {
4257 page_offset
<<= 1; /* 32->64 */
4259 * A 32-bit pde maps 4MB while the shadow pdes map
4260 * only 2MB. So we need to double the offset again
4261 * and zap two pdes instead of one.
4263 if (level
== PT32_ROOT_LEVEL
) {
4264 page_offset
&= ~7; /* kill rounding error */
4268 quadrant
= page_offset
>> PAGE_SHIFT
;
4269 page_offset
&= ~PAGE_MASK
;
4270 if (quadrant
!= sp
->role
.quadrant
)
4274 spte
= &sp
->spt
[page_offset
/ sizeof(*spte
)];
4278 void kvm_mmu_pte_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4279 const u8
*new, int bytes
)
4281 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
4282 struct kvm_mmu_page
*sp
;
4283 LIST_HEAD(invalid_list
);
4284 u64 entry
, gentry
, *spte
;
4286 bool remote_flush
, local_flush
, zap_page
;
4287 union kvm_mmu_page_role mask
= { };
4292 mask
.smep_andnot_wp
= 1;
4293 mask
.smap_andnot_wp
= 1;
4297 * If we don't have indirect shadow pages, it means no page is
4298 * write-protected, so we can exit simply.
4300 if (!ACCESS_ONCE(vcpu
->kvm
->arch
.indirect_shadow_pages
))
4303 zap_page
= remote_flush
= local_flush
= false;
4305 pgprintk("%s: gpa %llx bytes %d\n", __func__
, gpa
, bytes
);
4307 gentry
= mmu_pte_write_fetch_gpte(vcpu
, &gpa
, new, &bytes
);
4310 * No need to care whether allocation memory is successful
4311 * or not since pte prefetch is skiped if it does not have
4312 * enough objects in the cache.
4314 mmu_topup_memory_caches(vcpu
);
4316 spin_lock(&vcpu
->kvm
->mmu_lock
);
4317 ++vcpu
->kvm
->stat
.mmu_pte_write
;
4318 kvm_mmu_audit(vcpu
, AUDIT_PRE_PTE_WRITE
);
4320 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, sp
, gfn
) {
4321 if (detect_write_misaligned(sp
, gpa
, bytes
) ||
4322 detect_write_flooding(sp
)) {
4323 zap_page
|= !!kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
4325 ++vcpu
->kvm
->stat
.mmu_flooded
;
4329 spte
= get_written_sptes(sp
, gpa
, &npte
);
4336 mmu_page_zap_pte(vcpu
->kvm
, sp
, spte
);
4338 !((sp
->role
.word
^ vcpu
->arch
.mmu
.base_role
.word
)
4339 & mask
.word
) && rmap_can_add(vcpu
))
4340 mmu_pte_write_new_pte(vcpu
, sp
, spte
, &gentry
);
4341 if (need_remote_flush(entry
, *spte
))
4342 remote_flush
= true;
4346 mmu_pte_write_flush_tlb(vcpu
, zap_page
, remote_flush
, local_flush
);
4347 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
4348 kvm_mmu_audit(vcpu
, AUDIT_POST_PTE_WRITE
);
4349 spin_unlock(&vcpu
->kvm
->mmu_lock
);
4352 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu
*vcpu
, gva_t gva
)
4357 if (vcpu
->arch
.mmu
.direct_map
)
4360 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, gva
, NULL
);
4362 r
= kvm_mmu_unprotect_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4366 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt
);
4368 static void make_mmu_pages_available(struct kvm_vcpu
*vcpu
)
4370 LIST_HEAD(invalid_list
);
4372 if (likely(kvm_mmu_available_pages(vcpu
->kvm
) >= KVM_MIN_FREE_MMU_PAGES
))
4375 while (kvm_mmu_available_pages(vcpu
->kvm
) < KVM_REFILL_PAGES
) {
4376 if (!prepare_zap_oldest_mmu_page(vcpu
->kvm
, &invalid_list
))
4379 ++vcpu
->kvm
->stat
.mmu_recycled
;
4381 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
4384 static bool is_mmio_page_fault(struct kvm_vcpu
*vcpu
, gva_t addr
)
4386 if (vcpu
->arch
.mmu
.direct_map
|| mmu_is_nested(vcpu
))
4387 return vcpu_match_mmio_gpa(vcpu
, addr
);
4389 return vcpu_match_mmio_gva(vcpu
, addr
);
4392 int kvm_mmu_page_fault(struct kvm_vcpu
*vcpu
, gva_t cr2
, u32 error_code
,
4393 void *insn
, int insn_len
)
4395 int r
, emulation_type
= EMULTYPE_RETRY
;
4396 enum emulation_result er
;
4398 r
= vcpu
->arch
.mmu
.page_fault(vcpu
, cr2
, error_code
, false);
4407 if (is_mmio_page_fault(vcpu
, cr2
))
4410 er
= x86_emulate_instruction(vcpu
, cr2
, emulation_type
, insn
, insn_len
);
4415 case EMULATE_USER_EXIT
:
4416 ++vcpu
->stat
.mmio_exits
;
4426 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault
);
4428 void kvm_mmu_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
4430 vcpu
->arch
.mmu
.invlpg(vcpu
, gva
);
4431 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
4432 ++vcpu
->stat
.invlpg
;
4434 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg
);
4436 void kvm_enable_tdp(void)
4440 EXPORT_SYMBOL_GPL(kvm_enable_tdp
);
4442 void kvm_disable_tdp(void)
4444 tdp_enabled
= false;
4446 EXPORT_SYMBOL_GPL(kvm_disable_tdp
);
4448 static void free_mmu_pages(struct kvm_vcpu
*vcpu
)
4450 free_page((unsigned long)vcpu
->arch
.mmu
.pae_root
);
4451 if (vcpu
->arch
.mmu
.lm_root
!= NULL
)
4452 free_page((unsigned long)vcpu
->arch
.mmu
.lm_root
);
4455 static int alloc_mmu_pages(struct kvm_vcpu
*vcpu
)
4461 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
4462 * Therefore we need to allocate shadow page tables in the first
4463 * 4GB of memory, which happens to fit the DMA32 zone.
4465 page
= alloc_page(GFP_KERNEL
| __GFP_DMA32
);
4469 vcpu
->arch
.mmu
.pae_root
= page_address(page
);
4470 for (i
= 0; i
< 4; ++i
)
4471 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
4476 int kvm_mmu_create(struct kvm_vcpu
*vcpu
)
4478 vcpu
->arch
.walk_mmu
= &vcpu
->arch
.mmu
;
4479 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
4480 vcpu
->arch
.mmu
.translate_gpa
= translate_gpa
;
4481 vcpu
->arch
.nested_mmu
.translate_gpa
= translate_nested_gpa
;
4483 return alloc_mmu_pages(vcpu
);
4486 void kvm_mmu_setup(struct kvm_vcpu
*vcpu
)
4488 MMU_WARN_ON(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
4493 /* The return value indicates if tlb flush on all vcpus is needed. */
4494 typedef bool (*slot_level_handler
) (struct kvm
*kvm
, unsigned long *rmap
);
4496 /* The caller should hold mmu-lock before calling this function. */
4498 slot_handle_level_range(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
,
4499 slot_level_handler fn
, int start_level
, int end_level
,
4500 gfn_t start_gfn
, gfn_t end_gfn
, bool lock_flush_tlb
)
4502 struct slot_rmap_walk_iterator iterator
;
4505 for_each_slot_rmap_range(memslot
, start_level
, end_level
, start_gfn
,
4506 end_gfn
, &iterator
) {
4508 flush
|= fn(kvm
, iterator
.rmap
);
4510 if (need_resched() || spin_needbreak(&kvm
->mmu_lock
)) {
4511 if (flush
&& lock_flush_tlb
) {
4512 kvm_flush_remote_tlbs(kvm
);
4515 cond_resched_lock(&kvm
->mmu_lock
);
4519 if (flush
&& lock_flush_tlb
) {
4520 kvm_flush_remote_tlbs(kvm
);
4528 slot_handle_level(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
,
4529 slot_level_handler fn
, int start_level
, int end_level
,
4530 bool lock_flush_tlb
)
4532 return slot_handle_level_range(kvm
, memslot
, fn
, start_level
,
4533 end_level
, memslot
->base_gfn
,
4534 memslot
->base_gfn
+ memslot
->npages
- 1,
4539 slot_handle_all_level(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
,
4540 slot_level_handler fn
, bool lock_flush_tlb
)
4542 return slot_handle_level(kvm
, memslot
, fn
, PT_PAGE_TABLE_LEVEL
,
4543 PT_MAX_HUGEPAGE_LEVEL
, lock_flush_tlb
);
4547 slot_handle_large_level(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
,
4548 slot_level_handler fn
, bool lock_flush_tlb
)
4550 return slot_handle_level(kvm
, memslot
, fn
, PT_PAGE_TABLE_LEVEL
+ 1,
4551 PT_MAX_HUGEPAGE_LEVEL
, lock_flush_tlb
);
4555 slot_handle_leaf(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
,
4556 slot_level_handler fn
, bool lock_flush_tlb
)
4558 return slot_handle_level(kvm
, memslot
, fn
, PT_PAGE_TABLE_LEVEL
,
4559 PT_PAGE_TABLE_LEVEL
, lock_flush_tlb
);
4562 void kvm_zap_gfn_range(struct kvm
*kvm
, gfn_t gfn_start
, gfn_t gfn_end
)
4564 struct kvm_memslots
*slots
;
4565 struct kvm_memory_slot
*memslot
;
4568 spin_lock(&kvm
->mmu_lock
);
4569 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
4570 slots
= __kvm_memslots(kvm
, i
);
4571 kvm_for_each_memslot(memslot
, slots
) {
4574 start
= max(gfn_start
, memslot
->base_gfn
);
4575 end
= min(gfn_end
, memslot
->base_gfn
+ memslot
->npages
);
4579 slot_handle_level_range(kvm
, memslot
, kvm_zap_rmapp
,
4580 PT_PAGE_TABLE_LEVEL
, PT_MAX_HUGEPAGE_LEVEL
,
4581 start
, end
- 1, true);
4585 spin_unlock(&kvm
->mmu_lock
);
4588 static bool slot_rmap_write_protect(struct kvm
*kvm
, unsigned long *rmapp
)
4590 return __rmap_write_protect(kvm
, rmapp
, false);
4593 void kvm_mmu_slot_remove_write_access(struct kvm
*kvm
,
4594 struct kvm_memory_slot
*memslot
)
4598 spin_lock(&kvm
->mmu_lock
);
4599 flush
= slot_handle_all_level(kvm
, memslot
, slot_rmap_write_protect
,
4601 spin_unlock(&kvm
->mmu_lock
);
4604 * kvm_mmu_slot_remove_write_access() and kvm_vm_ioctl_get_dirty_log()
4605 * which do tlb flush out of mmu-lock should be serialized by
4606 * kvm->slots_lock otherwise tlb flush would be missed.
4608 lockdep_assert_held(&kvm
->slots_lock
);
4611 * We can flush all the TLBs out of the mmu lock without TLB
4612 * corruption since we just change the spte from writable to
4613 * readonly so that we only need to care the case of changing
4614 * spte from present to present (changing the spte from present
4615 * to nonpresent will flush all the TLBs immediately), in other
4616 * words, the only case we care is mmu_spte_update() where we
4617 * haved checked SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE
4618 * instead of PT_WRITABLE_MASK, that means it does not depend
4619 * on PT_WRITABLE_MASK anymore.
4622 kvm_flush_remote_tlbs(kvm
);
4625 static bool kvm_mmu_zap_collapsible_spte(struct kvm
*kvm
,
4626 unsigned long *rmapp
)
4629 struct rmap_iterator iter
;
4630 int need_tlb_flush
= 0;
4632 struct kvm_mmu_page
*sp
;
4635 for_each_rmap_spte(rmapp
, &iter
, sptep
) {
4636 sp
= page_header(__pa(sptep
));
4637 pfn
= spte_to_pfn(*sptep
);
4640 * We cannot do huge page mapping for indirect shadow pages,
4641 * which are found on the last rmap (level = 1) when not using
4642 * tdp; such shadow pages are synced with the page table in
4643 * the guest, and the guest page table is using 4K page size
4644 * mapping if the indirect sp has level = 1.
4646 if (sp
->role
.direct
&&
4647 !kvm_is_reserved_pfn(pfn
) &&
4648 PageTransCompound(pfn_to_page(pfn
))) {
4649 drop_spte(kvm
, sptep
);
4655 return need_tlb_flush
;
4658 void kvm_mmu_zap_collapsible_sptes(struct kvm
*kvm
,
4659 const struct kvm_memory_slot
*memslot
)
4661 /* FIXME: const-ify all uses of struct kvm_memory_slot. */
4662 spin_lock(&kvm
->mmu_lock
);
4663 slot_handle_leaf(kvm
, (struct kvm_memory_slot
*)memslot
,
4664 kvm_mmu_zap_collapsible_spte
, true);
4665 spin_unlock(&kvm
->mmu_lock
);
4668 void kvm_mmu_slot_leaf_clear_dirty(struct kvm
*kvm
,
4669 struct kvm_memory_slot
*memslot
)
4673 spin_lock(&kvm
->mmu_lock
);
4674 flush
= slot_handle_leaf(kvm
, memslot
, __rmap_clear_dirty
, false);
4675 spin_unlock(&kvm
->mmu_lock
);
4677 lockdep_assert_held(&kvm
->slots_lock
);
4680 * It's also safe to flush TLBs out of mmu lock here as currently this
4681 * function is only used for dirty logging, in which case flushing TLB
4682 * out of mmu lock also guarantees no dirty pages will be lost in
4686 kvm_flush_remote_tlbs(kvm
);
4688 EXPORT_SYMBOL_GPL(kvm_mmu_slot_leaf_clear_dirty
);
4690 void kvm_mmu_slot_largepage_remove_write_access(struct kvm
*kvm
,
4691 struct kvm_memory_slot
*memslot
)
4695 spin_lock(&kvm
->mmu_lock
);
4696 flush
= slot_handle_large_level(kvm
, memslot
, slot_rmap_write_protect
,
4698 spin_unlock(&kvm
->mmu_lock
);
4700 /* see kvm_mmu_slot_remove_write_access */
4701 lockdep_assert_held(&kvm
->slots_lock
);
4704 kvm_flush_remote_tlbs(kvm
);
4706 EXPORT_SYMBOL_GPL(kvm_mmu_slot_largepage_remove_write_access
);
4708 void kvm_mmu_slot_set_dirty(struct kvm
*kvm
,
4709 struct kvm_memory_slot
*memslot
)
4713 spin_lock(&kvm
->mmu_lock
);
4714 flush
= slot_handle_all_level(kvm
, memslot
, __rmap_set_dirty
, false);
4715 spin_unlock(&kvm
->mmu_lock
);
4717 lockdep_assert_held(&kvm
->slots_lock
);
4719 /* see kvm_mmu_slot_leaf_clear_dirty */
4721 kvm_flush_remote_tlbs(kvm
);
4723 EXPORT_SYMBOL_GPL(kvm_mmu_slot_set_dirty
);
4725 #define BATCH_ZAP_PAGES 10
4726 static void kvm_zap_obsolete_pages(struct kvm
*kvm
)
4728 struct kvm_mmu_page
*sp
, *node
;
4732 list_for_each_entry_safe_reverse(sp
, node
,
4733 &kvm
->arch
.active_mmu_pages
, link
) {
4737 * No obsolete page exists before new created page since
4738 * active_mmu_pages is the FIFO list.
4740 if (!is_obsolete_sp(kvm
, sp
))
4744 * Since we are reversely walking the list and the invalid
4745 * list will be moved to the head, skip the invalid page
4746 * can help us to avoid the infinity list walking.
4748 if (sp
->role
.invalid
)
4752 * Need not flush tlb since we only zap the sp with invalid
4753 * generation number.
4755 if (batch
>= BATCH_ZAP_PAGES
&&
4756 cond_resched_lock(&kvm
->mmu_lock
)) {
4761 ret
= kvm_mmu_prepare_zap_page(kvm
, sp
,
4762 &kvm
->arch
.zapped_obsolete_pages
);
4770 * Should flush tlb before free page tables since lockless-walking
4771 * may use the pages.
4773 kvm_mmu_commit_zap_page(kvm
, &kvm
->arch
.zapped_obsolete_pages
);
4777 * Fast invalidate all shadow pages and use lock-break technique
4778 * to zap obsolete pages.
4780 * It's required when memslot is being deleted or VM is being
4781 * destroyed, in these cases, we should ensure that KVM MMU does
4782 * not use any resource of the being-deleted slot or all slots
4783 * after calling the function.
4785 void kvm_mmu_invalidate_zap_all_pages(struct kvm
*kvm
)
4787 spin_lock(&kvm
->mmu_lock
);
4788 trace_kvm_mmu_invalidate_zap_all_pages(kvm
);
4789 kvm
->arch
.mmu_valid_gen
++;
4792 * Notify all vcpus to reload its shadow page table
4793 * and flush TLB. Then all vcpus will switch to new
4794 * shadow page table with the new mmu_valid_gen.
4796 * Note: we should do this under the protection of
4797 * mmu-lock, otherwise, vcpu would purge shadow page
4798 * but miss tlb flush.
4800 kvm_reload_remote_mmus(kvm
);
4802 kvm_zap_obsolete_pages(kvm
);
4803 spin_unlock(&kvm
->mmu_lock
);
4806 static bool kvm_has_zapped_obsolete_pages(struct kvm
*kvm
)
4808 return unlikely(!list_empty_careful(&kvm
->arch
.zapped_obsolete_pages
));
4811 void kvm_mmu_invalidate_mmio_sptes(struct kvm
*kvm
, struct kvm_memslots
*slots
)
4814 * The very rare case: if the generation-number is round,
4815 * zap all shadow pages.
4817 if (unlikely((slots
->generation
& MMIO_GEN_MASK
) == 0)) {
4818 printk_ratelimited(KERN_DEBUG
"kvm: zapping shadow pages for mmio generation wraparound\n");
4819 kvm_mmu_invalidate_zap_all_pages(kvm
);
4823 static unsigned long
4824 mmu_shrink_scan(struct shrinker
*shrink
, struct shrink_control
*sc
)
4827 int nr_to_scan
= sc
->nr_to_scan
;
4828 unsigned long freed
= 0;
4830 spin_lock(&kvm_lock
);
4832 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
4834 LIST_HEAD(invalid_list
);
4837 * Never scan more than sc->nr_to_scan VM instances.
4838 * Will not hit this condition practically since we do not try
4839 * to shrink more than one VM and it is very unlikely to see
4840 * !n_used_mmu_pages so many times.
4845 * n_used_mmu_pages is accessed without holding kvm->mmu_lock
4846 * here. We may skip a VM instance errorneosly, but we do not
4847 * want to shrink a VM that only started to populate its MMU
4850 if (!kvm
->arch
.n_used_mmu_pages
&&
4851 !kvm_has_zapped_obsolete_pages(kvm
))
4854 idx
= srcu_read_lock(&kvm
->srcu
);
4855 spin_lock(&kvm
->mmu_lock
);
4857 if (kvm_has_zapped_obsolete_pages(kvm
)) {
4858 kvm_mmu_commit_zap_page(kvm
,
4859 &kvm
->arch
.zapped_obsolete_pages
);
4863 if (prepare_zap_oldest_mmu_page(kvm
, &invalid_list
))
4865 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
4868 spin_unlock(&kvm
->mmu_lock
);
4869 srcu_read_unlock(&kvm
->srcu
, idx
);
4872 * unfair on small ones
4873 * per-vm shrinkers cry out
4874 * sadness comes quickly
4876 list_move_tail(&kvm
->vm_list
, &vm_list
);
4880 spin_unlock(&kvm_lock
);
4884 static unsigned long
4885 mmu_shrink_count(struct shrinker
*shrink
, struct shrink_control
*sc
)
4887 return percpu_counter_read_positive(&kvm_total_used_mmu_pages
);
4890 static struct shrinker mmu_shrinker
= {
4891 .count_objects
= mmu_shrink_count
,
4892 .scan_objects
= mmu_shrink_scan
,
4893 .seeks
= DEFAULT_SEEKS
* 10,
4896 static void mmu_destroy_caches(void)
4898 if (pte_list_desc_cache
)
4899 kmem_cache_destroy(pte_list_desc_cache
);
4900 if (mmu_page_header_cache
)
4901 kmem_cache_destroy(mmu_page_header_cache
);
4904 int kvm_mmu_module_init(void)
4906 pte_list_desc_cache
= kmem_cache_create("pte_list_desc",
4907 sizeof(struct pte_list_desc
),
4909 if (!pte_list_desc_cache
)
4912 mmu_page_header_cache
= kmem_cache_create("kvm_mmu_page_header",
4913 sizeof(struct kvm_mmu_page
),
4915 if (!mmu_page_header_cache
)
4918 if (percpu_counter_init(&kvm_total_used_mmu_pages
, 0, GFP_KERNEL
))
4921 register_shrinker(&mmu_shrinker
);
4926 mmu_destroy_caches();
4931 * Caculate mmu pages needed for kvm.
4933 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm
*kvm
)
4935 unsigned int nr_mmu_pages
;
4936 unsigned int nr_pages
= 0;
4937 struct kvm_memslots
*slots
;
4938 struct kvm_memory_slot
*memslot
;
4941 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
4942 slots
= __kvm_memslots(kvm
, i
);
4944 kvm_for_each_memslot(memslot
, slots
)
4945 nr_pages
+= memslot
->npages
;
4948 nr_mmu_pages
= nr_pages
* KVM_PERMILLE_MMU_PAGES
/ 1000;
4949 nr_mmu_pages
= max(nr_mmu_pages
,
4950 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES
);
4952 return nr_mmu_pages
;
4955 void kvm_mmu_destroy(struct kvm_vcpu
*vcpu
)
4957 kvm_mmu_unload(vcpu
);
4958 free_mmu_pages(vcpu
);
4959 mmu_free_memory_caches(vcpu
);
4962 void kvm_mmu_module_exit(void)
4964 mmu_destroy_caches();
4965 percpu_counter_destroy(&kvm_total_used_mmu_pages
);
4966 unregister_shrinker(&mmu_shrinker
);
4967 mmu_audit_disable();