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KVM: MMU: cache mmio info on page fault path
[deliverable/linux.git] / arch / x86 / kvm / paging_tmpl.h
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
11 *
12 * Authors:
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
15 *
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
18 *
19 */
20
21 /*
22 * We need the mmu code to access both 32-bit and 64-bit guest ptes,
23 * so the code in this file is compiled twice, once per pte size.
24 */
25
26 #if PTTYPE == 64
27 #define pt_element_t u64
28 #define guest_walker guest_walker64
29 #define FNAME(name) paging##64_##name
30 #define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK
31 #define PT_LVL_ADDR_MASK(lvl) PT64_LVL_ADDR_MASK(lvl)
32 #define PT_LVL_OFFSET_MASK(lvl) PT64_LVL_OFFSET_MASK(lvl)
33 #define PT_INDEX(addr, level) PT64_INDEX(addr, level)
34 #define PT_LEVEL_BITS PT64_LEVEL_BITS
35 #ifdef CONFIG_X86_64
36 #define PT_MAX_FULL_LEVELS 4
37 #define CMPXCHG cmpxchg
38 #else
39 #define CMPXCHG cmpxchg64
40 #define PT_MAX_FULL_LEVELS 2
41 #endif
42 #elif PTTYPE == 32
43 #define pt_element_t u32
44 #define guest_walker guest_walker32
45 #define FNAME(name) paging##32_##name
46 #define PT_BASE_ADDR_MASK PT32_BASE_ADDR_MASK
47 #define PT_LVL_ADDR_MASK(lvl) PT32_LVL_ADDR_MASK(lvl)
48 #define PT_LVL_OFFSET_MASK(lvl) PT32_LVL_OFFSET_MASK(lvl)
49 #define PT_INDEX(addr, level) PT32_INDEX(addr, level)
50 #define PT_LEVEL_BITS PT32_LEVEL_BITS
51 #define PT_MAX_FULL_LEVELS 2
52 #define CMPXCHG cmpxchg
53 #else
54 #error Invalid PTTYPE value
55 #endif
56
57 #define gpte_to_gfn_lvl FNAME(gpte_to_gfn_lvl)
58 #define gpte_to_gfn(pte) gpte_to_gfn_lvl((pte), PT_PAGE_TABLE_LEVEL)
59
60 /*
61 * The guest_walker structure emulates the behavior of the hardware page
62 * table walker.
63 */
64 struct guest_walker {
65 int level;
66 gfn_t table_gfn[PT_MAX_FULL_LEVELS];
67 pt_element_t ptes[PT_MAX_FULL_LEVELS];
68 pt_element_t prefetch_ptes[PTE_PREFETCH_NUM];
69 gpa_t pte_gpa[PT_MAX_FULL_LEVELS];
70 unsigned pt_access;
71 unsigned pte_access;
72 gfn_t gfn;
73 struct x86_exception fault;
74 };
75
76 static gfn_t gpte_to_gfn_lvl(pt_element_t gpte, int lvl)
77 {
78 return (gpte & PT_LVL_ADDR_MASK(lvl)) >> PAGE_SHIFT;
79 }
80
81 static int FNAME(cmpxchg_gpte)(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
82 pt_element_t __user *ptep_user, unsigned index,
83 pt_element_t orig_pte, pt_element_t new_pte)
84 {
85 int npages;
86 pt_element_t ret;
87 pt_element_t *table;
88 struct page *page;
89
90 npages = get_user_pages_fast((unsigned long)ptep_user, 1, 1, &page);
91 /* Check if the user is doing something meaningless. */
92 if (unlikely(npages != 1))
93 return -EFAULT;
94
95 table = kmap_atomic(page, KM_USER0);
96 ret = CMPXCHG(&table[index], orig_pte, new_pte);
97 kunmap_atomic(table, KM_USER0);
98
99 kvm_release_page_dirty(page);
100
101 return (ret != orig_pte);
102 }
103
104 static unsigned FNAME(gpte_access)(struct kvm_vcpu *vcpu, pt_element_t gpte)
105 {
106 unsigned access;
107
108 access = (gpte & (PT_WRITABLE_MASK | PT_USER_MASK)) | ACC_EXEC_MASK;
109 #if PTTYPE == 64
110 if (vcpu->arch.mmu.nx)
111 access &= ~(gpte >> PT64_NX_SHIFT);
112 #endif
113 return access;
114 }
115
116 static bool FNAME(is_last_gpte)(struct guest_walker *walker,
117 struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
118 pt_element_t gpte)
119 {
120 if (walker->level == PT_PAGE_TABLE_LEVEL)
121 return true;
122
123 if ((walker->level == PT_DIRECTORY_LEVEL) && is_large_pte(gpte) &&
124 (PTTYPE == 64 || is_pse(vcpu)))
125 return true;
126
127 if ((walker->level == PT_PDPE_LEVEL) && is_large_pte(gpte) &&
128 (mmu->root_level == PT64_ROOT_LEVEL))
129 return true;
130
131 return false;
132 }
133
134 /*
135 * Fetch a guest pte for a guest virtual address
136 */
137 static int FNAME(walk_addr_generic)(struct guest_walker *walker,
138 struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
139 gva_t addr, u32 access)
140 {
141 pt_element_t pte;
142 pt_element_t __user *uninitialized_var(ptep_user);
143 gfn_t table_gfn;
144 unsigned index, pt_access, uninitialized_var(pte_access);
145 gpa_t pte_gpa;
146 bool eperm;
147 int offset;
148 const int write_fault = access & PFERR_WRITE_MASK;
149 const int user_fault = access & PFERR_USER_MASK;
150 const int fetch_fault = access & PFERR_FETCH_MASK;
151 u16 errcode = 0;
152
153 trace_kvm_mmu_pagetable_walk(addr, write_fault, user_fault,
154 fetch_fault);
155 retry_walk:
156 eperm = false;
157 walker->level = mmu->root_level;
158 pte = mmu->get_cr3(vcpu);
159
160 #if PTTYPE == 64
161 if (walker->level == PT32E_ROOT_LEVEL) {
162 pte = kvm_pdptr_read_mmu(vcpu, mmu, (addr >> 30) & 3);
163 trace_kvm_mmu_paging_element(pte, walker->level);
164 if (!is_present_gpte(pte))
165 goto error;
166 --walker->level;
167 }
168 #endif
169 ASSERT((!is_long_mode(vcpu) && is_pae(vcpu)) ||
170 (mmu->get_cr3(vcpu) & CR3_NONPAE_RESERVED_BITS) == 0);
171
172 pt_access = ACC_ALL;
173
174 for (;;) {
175 gfn_t real_gfn;
176 unsigned long host_addr;
177
178 index = PT_INDEX(addr, walker->level);
179
180 table_gfn = gpte_to_gfn(pte);
181 offset = index * sizeof(pt_element_t);
182 pte_gpa = gfn_to_gpa(table_gfn) + offset;
183 walker->table_gfn[walker->level - 1] = table_gfn;
184 walker->pte_gpa[walker->level - 1] = pte_gpa;
185
186 real_gfn = mmu->translate_gpa(vcpu, gfn_to_gpa(table_gfn),
187 PFERR_USER_MASK|PFERR_WRITE_MASK);
188 if (unlikely(real_gfn == UNMAPPED_GVA))
189 goto error;
190 real_gfn = gpa_to_gfn(real_gfn);
191
192 host_addr = gfn_to_hva(vcpu->kvm, real_gfn);
193 if (unlikely(kvm_is_error_hva(host_addr)))
194 goto error;
195
196 ptep_user = (pt_element_t __user *)((void *)host_addr + offset);
197 if (unlikely(__copy_from_user(&pte, ptep_user, sizeof(pte))))
198 goto error;
199
200 trace_kvm_mmu_paging_element(pte, walker->level);
201
202 if (unlikely(!is_present_gpte(pte)))
203 goto error;
204
205 if (unlikely(is_rsvd_bits_set(&vcpu->arch.mmu, pte,
206 walker->level))) {
207 errcode |= PFERR_RSVD_MASK | PFERR_PRESENT_MASK;
208 goto error;
209 }
210
211 if (!check_write_user_access(vcpu, write_fault, user_fault,
212 pte))
213 eperm = true;
214
215 #if PTTYPE == 64
216 if (unlikely(fetch_fault && (pte & PT64_NX_MASK)))
217 eperm = true;
218 #endif
219
220 if (!eperm && unlikely(!(pte & PT_ACCESSED_MASK))) {
221 int ret;
222 trace_kvm_mmu_set_accessed_bit(table_gfn, index,
223 sizeof(pte));
224 ret = FNAME(cmpxchg_gpte)(vcpu, mmu, ptep_user, index,
225 pte, pte|PT_ACCESSED_MASK);
226 if (unlikely(ret < 0))
227 goto error;
228 else if (ret)
229 goto retry_walk;
230
231 mark_page_dirty(vcpu->kvm, table_gfn);
232 pte |= PT_ACCESSED_MASK;
233 }
234
235 pte_access = pt_access & FNAME(gpte_access)(vcpu, pte);
236
237 walker->ptes[walker->level - 1] = pte;
238
239 if (FNAME(is_last_gpte)(walker, vcpu, mmu, pte)) {
240 int lvl = walker->level;
241 gpa_t real_gpa;
242 gfn_t gfn;
243 u32 ac;
244
245 /* check if the kernel is fetching from user page */
246 if (unlikely(pte_access & PT_USER_MASK) &&
247 kvm_read_cr4_bits(vcpu, X86_CR4_SMEP))
248 if (fetch_fault && !user_fault)
249 eperm = true;
250
251 gfn = gpte_to_gfn_lvl(pte, lvl);
252 gfn += (addr & PT_LVL_OFFSET_MASK(lvl)) >> PAGE_SHIFT;
253
254 if (PTTYPE == 32 &&
255 walker->level == PT_DIRECTORY_LEVEL &&
256 is_cpuid_PSE36())
257 gfn += pse36_gfn_delta(pte);
258
259 ac = write_fault | fetch_fault | user_fault;
260
261 real_gpa = mmu->translate_gpa(vcpu, gfn_to_gpa(gfn),
262 ac);
263 if (real_gpa == UNMAPPED_GVA)
264 return 0;
265
266 walker->gfn = real_gpa >> PAGE_SHIFT;
267
268 break;
269 }
270
271 pt_access = pte_access;
272 --walker->level;
273 }
274
275 if (unlikely(eperm)) {
276 errcode |= PFERR_PRESENT_MASK;
277 goto error;
278 }
279
280 if (write_fault && unlikely(!is_dirty_gpte(pte))) {
281 int ret;
282
283 trace_kvm_mmu_set_dirty_bit(table_gfn, index, sizeof(pte));
284 ret = FNAME(cmpxchg_gpte)(vcpu, mmu, ptep_user, index,
285 pte, pte|PT_DIRTY_MASK);
286 if (unlikely(ret < 0))
287 goto error;
288 else if (ret)
289 goto retry_walk;
290
291 mark_page_dirty(vcpu->kvm, table_gfn);
292 pte |= PT_DIRTY_MASK;
293 walker->ptes[walker->level - 1] = pte;
294 }
295
296 walker->pt_access = pt_access;
297 walker->pte_access = pte_access;
298 pgprintk("%s: pte %llx pte_access %x pt_access %x\n",
299 __func__, (u64)pte, pte_access, pt_access);
300 return 1;
301
302 error:
303 errcode |= write_fault | user_fault;
304 if (fetch_fault && (mmu->nx ||
305 kvm_read_cr4_bits(vcpu, X86_CR4_SMEP)))
306 errcode |= PFERR_FETCH_MASK;
307
308 walker->fault.vector = PF_VECTOR;
309 walker->fault.error_code_valid = true;
310 walker->fault.error_code = errcode;
311 walker->fault.address = addr;
312 walker->fault.nested_page_fault = mmu != vcpu->arch.walk_mmu;
313
314 trace_kvm_mmu_walker_error(walker->fault.error_code);
315 return 0;
316 }
317
318 static int FNAME(walk_addr)(struct guest_walker *walker,
319 struct kvm_vcpu *vcpu, gva_t addr, u32 access)
320 {
321 return FNAME(walk_addr_generic)(walker, vcpu, &vcpu->arch.mmu, addr,
322 access);
323 }
324
325 static int FNAME(walk_addr_nested)(struct guest_walker *walker,
326 struct kvm_vcpu *vcpu, gva_t addr,
327 u32 access)
328 {
329 return FNAME(walk_addr_generic)(walker, vcpu, &vcpu->arch.nested_mmu,
330 addr, access);
331 }
332
333 static bool FNAME(prefetch_invalid_gpte)(struct kvm_vcpu *vcpu,
334 struct kvm_mmu_page *sp, u64 *spte,
335 pt_element_t gpte)
336 {
337 u64 nonpresent = shadow_trap_nonpresent_pte;
338
339 if (is_rsvd_bits_set(&vcpu->arch.mmu, gpte, PT_PAGE_TABLE_LEVEL))
340 goto no_present;
341
342 if (!is_present_gpte(gpte)) {
343 if (!sp->unsync)
344 nonpresent = shadow_notrap_nonpresent_pte;
345 goto no_present;
346 }
347
348 if (!(gpte & PT_ACCESSED_MASK))
349 goto no_present;
350
351 return false;
352
353 no_present:
354 drop_spte(vcpu->kvm, spte, nonpresent);
355 return true;
356 }
357
358 static void FNAME(update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
359 u64 *spte, const void *pte)
360 {
361 pt_element_t gpte;
362 unsigned pte_access;
363 pfn_t pfn;
364
365 gpte = *(const pt_element_t *)pte;
366 if (FNAME(prefetch_invalid_gpte)(vcpu, sp, spte, gpte))
367 return;
368
369 pgprintk("%s: gpte %llx spte %p\n", __func__, (u64)gpte, spte);
370 pte_access = sp->role.access & FNAME(gpte_access)(vcpu, gpte);
371 pfn = gfn_to_pfn_atomic(vcpu->kvm, gpte_to_gfn(gpte));
372 if (is_error_pfn(pfn)) {
373 kvm_release_pfn_clean(pfn);
374 return;
375 }
376
377 /*
378 * we call mmu_set_spte() with host_writable = true because that
379 * vcpu->arch.update_pte.pfn was fetched from get_user_pages(write = 1).
380 */
381 mmu_set_spte(vcpu, spte, sp->role.access, pte_access, 0, 0,
382 is_dirty_gpte(gpte), NULL, PT_PAGE_TABLE_LEVEL,
383 gpte_to_gfn(gpte), pfn, true, true);
384 }
385
386 static bool FNAME(gpte_changed)(struct kvm_vcpu *vcpu,
387 struct guest_walker *gw, int level)
388 {
389 pt_element_t curr_pte;
390 gpa_t base_gpa, pte_gpa = gw->pte_gpa[level - 1];
391 u64 mask;
392 int r, index;
393
394 if (level == PT_PAGE_TABLE_LEVEL) {
395 mask = PTE_PREFETCH_NUM * sizeof(pt_element_t) - 1;
396 base_gpa = pte_gpa & ~mask;
397 index = (pte_gpa - base_gpa) / sizeof(pt_element_t);
398
399 r = kvm_read_guest_atomic(vcpu->kvm, base_gpa,
400 gw->prefetch_ptes, sizeof(gw->prefetch_ptes));
401 curr_pte = gw->prefetch_ptes[index];
402 } else
403 r = kvm_read_guest_atomic(vcpu->kvm, pte_gpa,
404 &curr_pte, sizeof(curr_pte));
405
406 return r || curr_pte != gw->ptes[level - 1];
407 }
408
409 static void FNAME(pte_prefetch)(struct kvm_vcpu *vcpu, struct guest_walker *gw,
410 u64 *sptep)
411 {
412 struct kvm_mmu_page *sp;
413 pt_element_t *gptep = gw->prefetch_ptes;
414 u64 *spte;
415 int i;
416
417 sp = page_header(__pa(sptep));
418
419 if (sp->role.level > PT_PAGE_TABLE_LEVEL)
420 return;
421
422 if (sp->role.direct)
423 return __direct_pte_prefetch(vcpu, sp, sptep);
424
425 i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1);
426 spte = sp->spt + i;
427
428 for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) {
429 pt_element_t gpte;
430 unsigned pte_access;
431 gfn_t gfn;
432 pfn_t pfn;
433 bool dirty;
434
435 if (spte == sptep)
436 continue;
437
438 if (*spte != shadow_trap_nonpresent_pte)
439 continue;
440
441 gpte = gptep[i];
442
443 if (FNAME(prefetch_invalid_gpte)(vcpu, sp, spte, gpte))
444 continue;
445
446 pte_access = sp->role.access & FNAME(gpte_access)(vcpu, gpte);
447 gfn = gpte_to_gfn(gpte);
448 dirty = is_dirty_gpte(gpte);
449 pfn = pte_prefetch_gfn_to_pfn(vcpu, gfn,
450 (pte_access & ACC_WRITE_MASK) && dirty);
451 if (is_error_pfn(pfn)) {
452 kvm_release_pfn_clean(pfn);
453 break;
454 }
455
456 mmu_set_spte(vcpu, spte, sp->role.access, pte_access, 0, 0,
457 dirty, NULL, PT_PAGE_TABLE_LEVEL, gfn,
458 pfn, true, true);
459 }
460 }
461
462 /*
463 * Fetch a shadow pte for a specific level in the paging hierarchy.
464 */
465 static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
466 struct guest_walker *gw,
467 int user_fault, int write_fault, int hlevel,
468 int *ptwrite, pfn_t pfn, bool map_writable,
469 bool prefault)
470 {
471 unsigned access = gw->pt_access;
472 struct kvm_mmu_page *sp = NULL;
473 bool dirty = is_dirty_gpte(gw->ptes[gw->level - 1]);
474 int top_level;
475 unsigned direct_access;
476 struct kvm_shadow_walk_iterator it;
477
478 if (!is_present_gpte(gw->ptes[gw->level - 1]))
479 return NULL;
480
481 direct_access = gw->pt_access & gw->pte_access;
482 if (!dirty)
483 direct_access &= ~ACC_WRITE_MASK;
484
485 top_level = vcpu->arch.mmu.root_level;
486 if (top_level == PT32E_ROOT_LEVEL)
487 top_level = PT32_ROOT_LEVEL;
488 /*
489 * Verify that the top-level gpte is still there. Since the page
490 * is a root page, it is either write protected (and cannot be
491 * changed from now on) or it is invalid (in which case, we don't
492 * really care if it changes underneath us after this point).
493 */
494 if (FNAME(gpte_changed)(vcpu, gw, top_level))
495 goto out_gpte_changed;
496
497 for (shadow_walk_init(&it, vcpu, addr);
498 shadow_walk_okay(&it) && it.level > gw->level;
499 shadow_walk_next(&it)) {
500 gfn_t table_gfn;
501
502 drop_large_spte(vcpu, it.sptep);
503
504 sp = NULL;
505 if (!is_shadow_present_pte(*it.sptep)) {
506 table_gfn = gw->table_gfn[it.level - 2];
507 sp = kvm_mmu_get_page(vcpu, table_gfn, addr, it.level-1,
508 false, access, it.sptep);
509 }
510
511 /*
512 * Verify that the gpte in the page we've just write
513 * protected is still there.
514 */
515 if (FNAME(gpte_changed)(vcpu, gw, it.level - 1))
516 goto out_gpte_changed;
517
518 if (sp)
519 link_shadow_page(it.sptep, sp);
520 }
521
522 for (;
523 shadow_walk_okay(&it) && it.level > hlevel;
524 shadow_walk_next(&it)) {
525 gfn_t direct_gfn;
526
527 validate_direct_spte(vcpu, it.sptep, direct_access);
528
529 drop_large_spte(vcpu, it.sptep);
530
531 if (is_shadow_present_pte(*it.sptep))
532 continue;
533
534 direct_gfn = gw->gfn & ~(KVM_PAGES_PER_HPAGE(it.level) - 1);
535
536 sp = kvm_mmu_get_page(vcpu, direct_gfn, addr, it.level-1,
537 true, direct_access, it.sptep);
538 link_shadow_page(it.sptep, sp);
539 }
540
541 mmu_set_spte(vcpu, it.sptep, access, gw->pte_access & access,
542 user_fault, write_fault, dirty, ptwrite, it.level,
543 gw->gfn, pfn, prefault, map_writable);
544 FNAME(pte_prefetch)(vcpu, gw, it.sptep);
545
546 return it.sptep;
547
548 out_gpte_changed:
549 if (sp)
550 kvm_mmu_put_page(sp, it.sptep);
551 kvm_release_pfn_clean(pfn);
552 return NULL;
553 }
554
555 /*
556 * Page fault handler. There are several causes for a page fault:
557 * - there is no shadow pte for the guest pte
558 * - write access through a shadow pte marked read only so that we can set
559 * the dirty bit
560 * - write access to a shadow pte marked read only so we can update the page
561 * dirty bitmap, when userspace requests it
562 * - mmio access; in this case we will never install a present shadow pte
563 * - normal guest page fault due to the guest pte marked not present, not
564 * writable, or not executable
565 *
566 * Returns: 1 if we need to emulate the instruction, 0 otherwise, or
567 * a negative value on error.
568 */
569 static int FNAME(page_fault)(struct kvm_vcpu *vcpu, gva_t addr, u32 error_code,
570 bool prefault)
571 {
572 int write_fault = error_code & PFERR_WRITE_MASK;
573 int user_fault = error_code & PFERR_USER_MASK;
574 struct guest_walker walker;
575 u64 *sptep;
576 int write_pt = 0;
577 int r;
578 pfn_t pfn;
579 int level = PT_PAGE_TABLE_LEVEL;
580 int force_pt_level;
581 unsigned long mmu_seq;
582 bool map_writable;
583
584 pgprintk("%s: addr %lx err %x\n", __func__, addr, error_code);
585
586 r = mmu_topup_memory_caches(vcpu);
587 if (r)
588 return r;
589
590 /*
591 * Look up the guest pte for the faulting address.
592 */
593 r = FNAME(walk_addr)(&walker, vcpu, addr, error_code);
594
595 /*
596 * The page is not mapped by the guest. Let the guest handle it.
597 */
598 if (!r) {
599 pgprintk("%s: guest page fault\n", __func__);
600 if (!prefault) {
601 inject_page_fault(vcpu, &walker.fault);
602 /* reset fork detector */
603 vcpu->arch.last_pt_write_count = 0;
604 }
605 return 0;
606 }
607
608 if (walker.level >= PT_DIRECTORY_LEVEL)
609 force_pt_level = mapping_level_dirty_bitmap(vcpu, walker.gfn);
610 else
611 force_pt_level = 1;
612 if (!force_pt_level) {
613 level = min(walker.level, mapping_level(vcpu, walker.gfn));
614 walker.gfn = walker.gfn & ~(KVM_PAGES_PER_HPAGE(level) - 1);
615 }
616
617 mmu_seq = vcpu->kvm->mmu_notifier_seq;
618 smp_rmb();
619
620 if (try_async_pf(vcpu, prefault, walker.gfn, addr, &pfn, write_fault,
621 &map_writable))
622 return 0;
623
624 /* mmio */
625 if (is_error_pfn(pfn)) {
626 unsigned access = walker.pte_access;
627 bool dirty = is_dirty_gpte(walker.ptes[walker.level - 1]);
628
629 if (!dirty)
630 access &= ~ACC_WRITE_MASK;
631
632 return kvm_handle_bad_page(vcpu, mmu_is_nested(vcpu) ? 0 :
633 addr, access, walker.gfn, pfn);
634 }
635
636 spin_lock(&vcpu->kvm->mmu_lock);
637 if (mmu_notifier_retry(vcpu, mmu_seq))
638 goto out_unlock;
639
640 trace_kvm_mmu_audit(vcpu, AUDIT_PRE_PAGE_FAULT);
641 kvm_mmu_free_some_pages(vcpu);
642 if (!force_pt_level)
643 transparent_hugepage_adjust(vcpu, &walker.gfn, &pfn, &level);
644 sptep = FNAME(fetch)(vcpu, addr, &walker, user_fault, write_fault,
645 level, &write_pt, pfn, map_writable, prefault);
646 (void)sptep;
647 pgprintk("%s: shadow pte %p %llx ptwrite %d\n", __func__,
648 sptep, *sptep, write_pt);
649
650 if (!write_pt)
651 vcpu->arch.last_pt_write_count = 0; /* reset fork detector */
652
653 ++vcpu->stat.pf_fixed;
654 trace_kvm_mmu_audit(vcpu, AUDIT_POST_PAGE_FAULT);
655 spin_unlock(&vcpu->kvm->mmu_lock);
656
657 return write_pt;
658
659 out_unlock:
660 spin_unlock(&vcpu->kvm->mmu_lock);
661 kvm_release_pfn_clean(pfn);
662 return 0;
663 }
664
665 static void FNAME(invlpg)(struct kvm_vcpu *vcpu, gva_t gva)
666 {
667 struct kvm_shadow_walk_iterator iterator;
668 struct kvm_mmu_page *sp;
669 gpa_t pte_gpa = -1;
670 int level;
671 u64 *sptep;
672 int need_flush = 0;
673
674 vcpu_clear_mmio_info(vcpu, gva);
675
676 spin_lock(&vcpu->kvm->mmu_lock);
677
678 for_each_shadow_entry(vcpu, gva, iterator) {
679 level = iterator.level;
680 sptep = iterator.sptep;
681
682 sp = page_header(__pa(sptep));
683 if (is_last_spte(*sptep, level)) {
684 int offset, shift;
685
686 if (!sp->unsync)
687 break;
688
689 shift = PAGE_SHIFT -
690 (PT_LEVEL_BITS - PT64_LEVEL_BITS) * level;
691 offset = sp->role.quadrant << shift;
692
693 pte_gpa = (sp->gfn << PAGE_SHIFT) + offset;
694 pte_gpa += (sptep - sp->spt) * sizeof(pt_element_t);
695
696 if (is_shadow_present_pte(*sptep)) {
697 if (is_large_pte(*sptep))
698 --vcpu->kvm->stat.lpages;
699 drop_spte(vcpu->kvm, sptep,
700 shadow_trap_nonpresent_pte);
701 need_flush = 1;
702 } else
703 __set_spte(sptep, shadow_trap_nonpresent_pte);
704 break;
705 }
706
707 if (!is_shadow_present_pte(*sptep) || !sp->unsync_children)
708 break;
709 }
710
711 if (need_flush)
712 kvm_flush_remote_tlbs(vcpu->kvm);
713
714 atomic_inc(&vcpu->kvm->arch.invlpg_counter);
715
716 spin_unlock(&vcpu->kvm->mmu_lock);
717
718 if (pte_gpa == -1)
719 return;
720
721 if (mmu_topup_memory_caches(vcpu))
722 return;
723 kvm_mmu_pte_write(vcpu, pte_gpa, NULL, sizeof(pt_element_t), 0);
724 }
725
726 static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr, u32 access,
727 struct x86_exception *exception)
728 {
729 struct guest_walker walker;
730 gpa_t gpa = UNMAPPED_GVA;
731 int r;
732
733 r = FNAME(walk_addr)(&walker, vcpu, vaddr, access);
734
735 if (r) {
736 gpa = gfn_to_gpa(walker.gfn);
737 gpa |= vaddr & ~PAGE_MASK;
738 } else if (exception)
739 *exception = walker.fault;
740
741 return gpa;
742 }
743
744 static gpa_t FNAME(gva_to_gpa_nested)(struct kvm_vcpu *vcpu, gva_t vaddr,
745 u32 access,
746 struct x86_exception *exception)
747 {
748 struct guest_walker walker;
749 gpa_t gpa = UNMAPPED_GVA;
750 int r;
751
752 r = FNAME(walk_addr_nested)(&walker, vcpu, vaddr, access);
753
754 if (r) {
755 gpa = gfn_to_gpa(walker.gfn);
756 gpa |= vaddr & ~PAGE_MASK;
757 } else if (exception)
758 *exception = walker.fault;
759
760 return gpa;
761 }
762
763 static void FNAME(prefetch_page)(struct kvm_vcpu *vcpu,
764 struct kvm_mmu_page *sp)
765 {
766 int i, j, offset, r;
767 pt_element_t pt[256 / sizeof(pt_element_t)];
768 gpa_t pte_gpa;
769
770 if (sp->role.direct
771 || (PTTYPE == 32 && sp->role.level > PT_PAGE_TABLE_LEVEL)) {
772 nonpaging_prefetch_page(vcpu, sp);
773 return;
774 }
775
776 pte_gpa = gfn_to_gpa(sp->gfn);
777 if (PTTYPE == 32) {
778 offset = sp->role.quadrant << PT64_LEVEL_BITS;
779 pte_gpa += offset * sizeof(pt_element_t);
780 }
781
782 for (i = 0; i < PT64_ENT_PER_PAGE; i += ARRAY_SIZE(pt)) {
783 r = kvm_read_guest_atomic(vcpu->kvm, pte_gpa, pt, sizeof pt);
784 pte_gpa += ARRAY_SIZE(pt) * sizeof(pt_element_t);
785 for (j = 0; j < ARRAY_SIZE(pt); ++j)
786 if (r || is_present_gpte(pt[j]))
787 sp->spt[i+j] = shadow_trap_nonpresent_pte;
788 else
789 sp->spt[i+j] = shadow_notrap_nonpresent_pte;
790 }
791 }
792
793 /*
794 * Using the cached information from sp->gfns is safe because:
795 * - The spte has a reference to the struct page, so the pfn for a given gfn
796 * can't change unless all sptes pointing to it are nuked first.
797 *
798 * Note:
799 * We should flush all tlbs if spte is dropped even though guest is
800 * responsible for it. Since if we don't, kvm_mmu_notifier_invalidate_page
801 * and kvm_mmu_notifier_invalidate_range_start detect the mapping page isn't
802 * used by guest then tlbs are not flushed, so guest is allowed to access the
803 * freed pages.
804 * And we increase kvm->tlbs_dirty to delay tlbs flush in this case.
805 */
806 static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
807 {
808 int i, offset, nr_present;
809 bool host_writable;
810 gpa_t first_pte_gpa;
811
812 offset = nr_present = 0;
813
814 /* direct kvm_mmu_page can not be unsync. */
815 BUG_ON(sp->role.direct);
816
817 if (PTTYPE == 32)
818 offset = sp->role.quadrant << PT64_LEVEL_BITS;
819
820 first_pte_gpa = gfn_to_gpa(sp->gfn) + offset * sizeof(pt_element_t);
821
822 for (i = 0; i < PT64_ENT_PER_PAGE; i++) {
823 unsigned pte_access;
824 pt_element_t gpte;
825 gpa_t pte_gpa;
826 gfn_t gfn;
827
828 if (!is_shadow_present_pte(sp->spt[i]))
829 continue;
830
831 pte_gpa = first_pte_gpa + i * sizeof(pt_element_t);
832
833 if (kvm_read_guest_atomic(vcpu->kvm, pte_gpa, &gpte,
834 sizeof(pt_element_t)))
835 return -EINVAL;
836
837 gfn = gpte_to_gfn(gpte);
838
839 if (FNAME(prefetch_invalid_gpte)(vcpu, sp, &sp->spt[i], gpte)) {
840 vcpu->kvm->tlbs_dirty++;
841 continue;
842 }
843
844 if (gfn != sp->gfns[i]) {
845 drop_spte(vcpu->kvm, &sp->spt[i],
846 shadow_trap_nonpresent_pte);
847 vcpu->kvm->tlbs_dirty++;
848 continue;
849 }
850
851 nr_present++;
852 pte_access = sp->role.access & FNAME(gpte_access)(vcpu, gpte);
853 host_writable = sp->spt[i] & SPTE_HOST_WRITEABLE;
854
855 set_spte(vcpu, &sp->spt[i], pte_access, 0, 0,
856 is_dirty_gpte(gpte), PT_PAGE_TABLE_LEVEL, gfn,
857 spte_to_pfn(sp->spt[i]), true, false,
858 host_writable);
859 }
860
861 return !nr_present;
862 }
863
864 #undef pt_element_t
865 #undef guest_walker
866 #undef FNAME
867 #undef PT_BASE_ADDR_MASK
868 #undef PT_INDEX
869 #undef PT_LVL_ADDR_MASK
870 #undef PT_LVL_OFFSET_MASK
871 #undef PT_LEVEL_BITS
872 #undef PT_MAX_FULL_LEVELS
873 #undef gpte_to_gfn
874 #undef gpte_to_gfn_lvl
875 #undef CMPXCHG
Linux kernel - Deliverables
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