2 * Kernel-based Virtual Machine driver for Linux
6 * Copyright (C) 2006 Qumranet, Inc.
9 * Yaniv Kamay <yaniv@qumranet.com>
10 * Avi Kivity <avi@qumranet.com>
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
16 #include <linux/kvm_host.h>
22 #include <linux/module.h>
23 #include <linux/kernel.h>
24 #include <linux/vmalloc.h>
25 #include <linux/highmem.h>
26 #include <linux/sched.h>
30 MODULE_AUTHOR("Qumranet");
31 MODULE_LICENSE("GPL");
33 #define IOPM_ALLOC_ORDER 2
34 #define MSRPM_ALLOC_ORDER 1
40 #define DR7_GD_MASK (1 << 13)
41 #define DR6_BD_MASK (1 << 13)
43 #define SEG_TYPE_LDT 2
44 #define SEG_TYPE_BUSY_TSS16 3
46 #define SVM_FEATURE_NPT (1 << 0)
47 #define SVM_FEATURE_LBRV (1 << 1)
48 #define SVM_DEATURE_SVML (1 << 2)
50 static bool npt_enabled
= false;
52 static void kvm_reput_irq(struct vcpu_svm
*svm
);
54 static inline struct vcpu_svm
*to_svm(struct kvm_vcpu
*vcpu
)
56 return container_of(vcpu
, struct vcpu_svm
, vcpu
);
59 unsigned long iopm_base
;
60 unsigned long msrpm_base
;
62 struct kvm_ldttss_desc
{
65 unsigned base1
: 8, type
: 5, dpl
: 2, p
: 1;
66 unsigned limit1
: 4, zero0
: 3, g
: 1, base2
: 8;
69 } __attribute__((packed
));
77 struct kvm_ldttss_desc
*tss_desc
;
79 struct page
*save_area
;
82 static DEFINE_PER_CPU(struct svm_cpu_data
*, svm_data
);
83 static uint32_t svm_features
;
85 struct svm_init_data
{
90 static u32 msrpm_ranges
[] = {0, 0xc0000000, 0xc0010000};
92 #define NUM_MSR_MAPS ARRAY_SIZE(msrpm_ranges)
93 #define MSRS_RANGE_SIZE 2048
94 #define MSRS_IN_RANGE (MSRS_RANGE_SIZE * 8 / 2)
96 #define MAX_INST_SIZE 15
98 static inline u32
svm_has(u32 feat
)
100 return svm_features
& feat
;
103 static inline u8
pop_irq(struct kvm_vcpu
*vcpu
)
105 int word_index
= __ffs(vcpu
->arch
.irq_summary
);
106 int bit_index
= __ffs(vcpu
->arch
.irq_pending
[word_index
]);
107 int irq
= word_index
* BITS_PER_LONG
+ bit_index
;
109 clear_bit(bit_index
, &vcpu
->arch
.irq_pending
[word_index
]);
110 if (!vcpu
->arch
.irq_pending
[word_index
])
111 clear_bit(word_index
, &vcpu
->arch
.irq_summary
);
115 static inline void push_irq(struct kvm_vcpu
*vcpu
, u8 irq
)
117 set_bit(irq
, vcpu
->arch
.irq_pending
);
118 set_bit(irq
/ BITS_PER_LONG
, &vcpu
->arch
.irq_summary
);
121 static inline void clgi(void)
123 asm volatile (SVM_CLGI
);
126 static inline void stgi(void)
128 asm volatile (SVM_STGI
);
131 static inline void invlpga(unsigned long addr
, u32 asid
)
133 asm volatile (SVM_INVLPGA :: "a"(addr
), "c"(asid
));
136 static inline unsigned long kvm_read_cr2(void)
140 asm volatile ("mov %%cr2, %0" : "=r" (cr2
));
144 static inline void kvm_write_cr2(unsigned long val
)
146 asm volatile ("mov %0, %%cr2" :: "r" (val
));
149 static inline unsigned long read_dr6(void)
153 asm volatile ("mov %%dr6, %0" : "=r" (dr6
));
157 static inline void write_dr6(unsigned long val
)
159 asm volatile ("mov %0, %%dr6" :: "r" (val
));
162 static inline unsigned long read_dr7(void)
166 asm volatile ("mov %%dr7, %0" : "=r" (dr7
));
170 static inline void write_dr7(unsigned long val
)
172 asm volatile ("mov %0, %%dr7" :: "r" (val
));
175 static inline void force_new_asid(struct kvm_vcpu
*vcpu
)
177 to_svm(vcpu
)->asid_generation
--;
180 static inline void flush_guest_tlb(struct kvm_vcpu
*vcpu
)
182 force_new_asid(vcpu
);
185 static void svm_set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
187 if (!(efer
& EFER_LMA
))
190 to_svm(vcpu
)->vmcb
->save
.efer
= efer
| MSR_EFER_SVME_MASK
;
191 vcpu
->arch
.shadow_efer
= efer
;
194 static void svm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
,
195 bool has_error_code
, u32 error_code
)
197 struct vcpu_svm
*svm
= to_svm(vcpu
);
199 svm
->vmcb
->control
.event_inj
= nr
201 | (has_error_code
? SVM_EVTINJ_VALID_ERR
: 0)
202 | SVM_EVTINJ_TYPE_EXEPT
;
203 svm
->vmcb
->control
.event_inj_err
= error_code
;
206 static bool svm_exception_injected(struct kvm_vcpu
*vcpu
)
208 struct vcpu_svm
*svm
= to_svm(vcpu
);
210 return !(svm
->vmcb
->control
.exit_int_info
& SVM_EXITINTINFO_VALID
);
213 static int is_external_interrupt(u32 info
)
215 info
&= SVM_EVTINJ_TYPE_MASK
| SVM_EVTINJ_VALID
;
216 return info
== (SVM_EVTINJ_VALID
| SVM_EVTINJ_TYPE_INTR
);
219 static void skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
221 struct vcpu_svm
*svm
= to_svm(vcpu
);
223 if (!svm
->next_rip
) {
224 printk(KERN_DEBUG
"%s: NOP\n", __FUNCTION__
);
227 if (svm
->next_rip
- svm
->vmcb
->save
.rip
> MAX_INST_SIZE
)
228 printk(KERN_ERR
"%s: ip 0x%llx next 0x%llx\n",
233 vcpu
->arch
.rip
= svm
->vmcb
->save
.rip
= svm
->next_rip
;
234 svm
->vmcb
->control
.int_state
&= ~SVM_INTERRUPT_SHADOW_MASK
;
236 vcpu
->arch
.interrupt_window_open
= 1;
239 static int has_svm(void)
241 uint32_t eax
, ebx
, ecx
, edx
;
243 if (boot_cpu_data
.x86_vendor
!= X86_VENDOR_AMD
) {
244 printk(KERN_INFO
"has_svm: not amd\n");
248 cpuid(0x80000000, &eax
, &ebx
, &ecx
, &edx
);
249 if (eax
< SVM_CPUID_FUNC
) {
250 printk(KERN_INFO
"has_svm: can't execute cpuid_8000000a\n");
254 cpuid(0x80000001, &eax
, &ebx
, &ecx
, &edx
);
255 if (!(ecx
& (1 << SVM_CPUID_FEATURE_SHIFT
))) {
256 printk(KERN_DEBUG
"has_svm: svm not available\n");
262 static void svm_hardware_disable(void *garbage
)
264 struct svm_cpu_data
*svm_data
265 = per_cpu(svm_data
, raw_smp_processor_id());
270 wrmsrl(MSR_VM_HSAVE_PA
, 0);
271 rdmsrl(MSR_EFER
, efer
);
272 wrmsrl(MSR_EFER
, efer
& ~MSR_EFER_SVME_MASK
);
273 per_cpu(svm_data
, raw_smp_processor_id()) = NULL
;
274 __free_page(svm_data
->save_area
);
279 static void svm_hardware_enable(void *garbage
)
282 struct svm_cpu_data
*svm_data
;
285 struct desc_ptr gdt_descr
;
287 struct desc_ptr gdt_descr
;
289 struct desc_struct
*gdt
;
290 int me
= raw_smp_processor_id();
293 printk(KERN_ERR
"svm_cpu_init: err EOPNOTSUPP on %d\n", me
);
296 svm_data
= per_cpu(svm_data
, me
);
299 printk(KERN_ERR
"svm_cpu_init: svm_data is NULL on %d\n",
304 svm_data
->asid_generation
= 1;
305 svm_data
->max_asid
= cpuid_ebx(SVM_CPUID_FUNC
) - 1;
306 svm_data
->next_asid
= svm_data
->max_asid
+ 1;
308 asm volatile ("sgdt %0" : "=m"(gdt_descr
));
309 gdt
= (struct desc_struct
*)gdt_descr
.address
;
310 svm_data
->tss_desc
= (struct kvm_ldttss_desc
*)(gdt
+ GDT_ENTRY_TSS
);
312 rdmsrl(MSR_EFER
, efer
);
313 wrmsrl(MSR_EFER
, efer
| MSR_EFER_SVME_MASK
);
315 wrmsrl(MSR_VM_HSAVE_PA
,
316 page_to_pfn(svm_data
->save_area
) << PAGE_SHIFT
);
319 static int svm_cpu_init(int cpu
)
321 struct svm_cpu_data
*svm_data
;
324 svm_data
= kzalloc(sizeof(struct svm_cpu_data
), GFP_KERNEL
);
328 svm_data
->save_area
= alloc_page(GFP_KERNEL
);
330 if (!svm_data
->save_area
)
333 per_cpu(svm_data
, cpu
) = svm_data
;
343 static void set_msr_interception(u32
*msrpm
, unsigned msr
,
348 for (i
= 0; i
< NUM_MSR_MAPS
; i
++) {
349 if (msr
>= msrpm_ranges
[i
] &&
350 msr
< msrpm_ranges
[i
] + MSRS_IN_RANGE
) {
351 u32 msr_offset
= (i
* MSRS_IN_RANGE
+ msr
-
352 msrpm_ranges
[i
]) * 2;
354 u32
*base
= msrpm
+ (msr_offset
/ 32);
355 u32 msr_shift
= msr_offset
% 32;
356 u32 mask
= ((write
) ? 0 : 2) | ((read
) ? 0 : 1);
357 *base
= (*base
& ~(0x3 << msr_shift
)) |
365 static __init
int svm_hardware_setup(void)
368 struct page
*iopm_pages
;
369 struct page
*msrpm_pages
;
370 void *iopm_va
, *msrpm_va
;
373 iopm_pages
= alloc_pages(GFP_KERNEL
, IOPM_ALLOC_ORDER
);
378 iopm_va
= page_address(iopm_pages
);
379 memset(iopm_va
, 0xff, PAGE_SIZE
* (1 << IOPM_ALLOC_ORDER
));
380 clear_bit(0x80, iopm_va
); /* allow direct access to PC debug port */
381 iopm_base
= page_to_pfn(iopm_pages
) << PAGE_SHIFT
;
384 msrpm_pages
= alloc_pages(GFP_KERNEL
, MSRPM_ALLOC_ORDER
);
390 msrpm_va
= page_address(msrpm_pages
);
391 memset(msrpm_va
, 0xff, PAGE_SIZE
* (1 << MSRPM_ALLOC_ORDER
));
392 msrpm_base
= page_to_pfn(msrpm_pages
) << PAGE_SHIFT
;
395 set_msr_interception(msrpm_va
, MSR_GS_BASE
, 1, 1);
396 set_msr_interception(msrpm_va
, MSR_FS_BASE
, 1, 1);
397 set_msr_interception(msrpm_va
, MSR_KERNEL_GS_BASE
, 1, 1);
398 set_msr_interception(msrpm_va
, MSR_LSTAR
, 1, 1);
399 set_msr_interception(msrpm_va
, MSR_CSTAR
, 1, 1);
400 set_msr_interception(msrpm_va
, MSR_SYSCALL_MASK
, 1, 1);
402 set_msr_interception(msrpm_va
, MSR_K6_STAR
, 1, 1);
403 set_msr_interception(msrpm_va
, MSR_IA32_SYSENTER_CS
, 1, 1);
404 set_msr_interception(msrpm_va
, MSR_IA32_SYSENTER_ESP
, 1, 1);
405 set_msr_interception(msrpm_va
, MSR_IA32_SYSENTER_EIP
, 1, 1);
407 if (boot_cpu_has(X86_FEATURE_NX
))
408 kvm_enable_efer_bits(EFER_NX
);
410 for_each_online_cpu(cpu
) {
411 r
= svm_cpu_init(cpu
);
416 svm_features
= cpuid_edx(SVM_CPUID_FUNC
);
418 if (!svm_has(SVM_FEATURE_NPT
))
422 printk(KERN_INFO
"kvm: Nested Paging enabled\n");
427 __free_pages(msrpm_pages
, MSRPM_ALLOC_ORDER
);
430 __free_pages(iopm_pages
, IOPM_ALLOC_ORDER
);
435 static __exit
void svm_hardware_unsetup(void)
437 __free_pages(pfn_to_page(msrpm_base
>> PAGE_SHIFT
), MSRPM_ALLOC_ORDER
);
438 __free_pages(pfn_to_page(iopm_base
>> PAGE_SHIFT
), IOPM_ALLOC_ORDER
);
439 iopm_base
= msrpm_base
= 0;
442 static void init_seg(struct vmcb_seg
*seg
)
445 seg
->attrib
= SVM_SELECTOR_P_MASK
| SVM_SELECTOR_S_MASK
|
446 SVM_SELECTOR_WRITE_MASK
; /* Read/Write Data Segment */
451 static void init_sys_seg(struct vmcb_seg
*seg
, uint32_t type
)
454 seg
->attrib
= SVM_SELECTOR_P_MASK
| type
;
459 static void init_vmcb(struct vmcb
*vmcb
)
461 struct vmcb_control_area
*control
= &vmcb
->control
;
462 struct vmcb_save_area
*save
= &vmcb
->save
;
464 control
->intercept_cr_read
= INTERCEPT_CR0_MASK
|
469 control
->intercept_cr_write
= INTERCEPT_CR0_MASK
|
474 control
->intercept_dr_read
= INTERCEPT_DR0_MASK
|
479 control
->intercept_dr_write
= INTERCEPT_DR0_MASK
|
486 control
->intercept_exceptions
= (1 << PF_VECTOR
) |
490 control
->intercept
= (1ULL << INTERCEPT_INTR
) |
491 (1ULL << INTERCEPT_NMI
) |
492 (1ULL << INTERCEPT_SMI
) |
494 * selective cr0 intercept bug?
495 * 0: 0f 22 d8 mov %eax,%cr3
496 * 3: 0f 20 c0 mov %cr0,%eax
497 * 6: 0d 00 00 00 80 or $0x80000000,%eax
498 * b: 0f 22 c0 mov %eax,%cr0
499 * set cr3 ->interception
500 * get cr0 ->interception
501 * set cr0 -> no interception
503 /* (1ULL << INTERCEPT_SELECTIVE_CR0) | */
504 (1ULL << INTERCEPT_CPUID
) |
505 (1ULL << INTERCEPT_INVD
) |
506 (1ULL << INTERCEPT_HLT
) |
507 (1ULL << INTERCEPT_INVLPGA
) |
508 (1ULL << INTERCEPT_IOIO_PROT
) |
509 (1ULL << INTERCEPT_MSR_PROT
) |
510 (1ULL << INTERCEPT_TASK_SWITCH
) |
511 (1ULL << INTERCEPT_SHUTDOWN
) |
512 (1ULL << INTERCEPT_VMRUN
) |
513 (1ULL << INTERCEPT_VMMCALL
) |
514 (1ULL << INTERCEPT_VMLOAD
) |
515 (1ULL << INTERCEPT_VMSAVE
) |
516 (1ULL << INTERCEPT_STGI
) |
517 (1ULL << INTERCEPT_CLGI
) |
518 (1ULL << INTERCEPT_SKINIT
) |
519 (1ULL << INTERCEPT_WBINVD
) |
520 (1ULL << INTERCEPT_MONITOR
) |
521 (1ULL << INTERCEPT_MWAIT
);
523 control
->iopm_base_pa
= iopm_base
;
524 control
->msrpm_base_pa
= msrpm_base
;
525 control
->tsc_offset
= 0;
526 control
->int_ctl
= V_INTR_MASKING_MASK
;
534 save
->cs
.selector
= 0xf000;
535 /* Executable/Readable Code Segment */
536 save
->cs
.attrib
= SVM_SELECTOR_READ_MASK
| SVM_SELECTOR_P_MASK
|
537 SVM_SELECTOR_S_MASK
| SVM_SELECTOR_CODE_MASK
;
538 save
->cs
.limit
= 0xffff;
540 * cs.base should really be 0xffff0000, but vmx can't handle that, so
541 * be consistent with it.
543 * Replace when we have real mode working for vmx.
545 save
->cs
.base
= 0xf0000;
547 save
->gdtr
.limit
= 0xffff;
548 save
->idtr
.limit
= 0xffff;
550 init_sys_seg(&save
->ldtr
, SEG_TYPE_LDT
);
551 init_sys_seg(&save
->tr
, SEG_TYPE_BUSY_TSS16
);
553 save
->efer
= MSR_EFER_SVME_MASK
;
554 save
->dr6
= 0xffff0ff0;
557 save
->rip
= 0x0000fff0;
560 * cr0 val on cpu init should be 0x60000010, we enable cpu
561 * cache by default. the orderly way is to enable cache in bios.
563 save
->cr0
= 0x00000010 | X86_CR0_PG
| X86_CR0_WP
;
564 save
->cr4
= X86_CR4_PAE
;
568 static int svm_vcpu_reset(struct kvm_vcpu
*vcpu
)
570 struct vcpu_svm
*svm
= to_svm(vcpu
);
572 init_vmcb(svm
->vmcb
);
574 if (vcpu
->vcpu_id
!= 0) {
575 svm
->vmcb
->save
.rip
= 0;
576 svm
->vmcb
->save
.cs
.base
= svm
->vcpu
.arch
.sipi_vector
<< 12;
577 svm
->vmcb
->save
.cs
.selector
= svm
->vcpu
.arch
.sipi_vector
<< 8;
583 static struct kvm_vcpu
*svm_create_vcpu(struct kvm
*kvm
, unsigned int id
)
585 struct vcpu_svm
*svm
;
589 svm
= kmem_cache_zalloc(kvm_vcpu_cache
, GFP_KERNEL
);
595 err
= kvm_vcpu_init(&svm
->vcpu
, kvm
, id
);
599 page
= alloc_page(GFP_KERNEL
);
605 svm
->vmcb
= page_address(page
);
606 clear_page(svm
->vmcb
);
607 svm
->vmcb_pa
= page_to_pfn(page
) << PAGE_SHIFT
;
608 svm
->asid_generation
= 0;
609 memset(svm
->db_regs
, 0, sizeof(svm
->db_regs
));
610 init_vmcb(svm
->vmcb
);
613 svm
->vcpu
.fpu_active
= 1;
614 svm
->vcpu
.arch
.apic_base
= 0xfee00000 | MSR_IA32_APICBASE_ENABLE
;
615 if (svm
->vcpu
.vcpu_id
== 0)
616 svm
->vcpu
.arch
.apic_base
|= MSR_IA32_APICBASE_BSP
;
621 kvm_vcpu_uninit(&svm
->vcpu
);
623 kmem_cache_free(kvm_vcpu_cache
, svm
);
628 static void svm_free_vcpu(struct kvm_vcpu
*vcpu
)
630 struct vcpu_svm
*svm
= to_svm(vcpu
);
632 __free_page(pfn_to_page(svm
->vmcb_pa
>> PAGE_SHIFT
));
633 kvm_vcpu_uninit(vcpu
);
634 kmem_cache_free(kvm_vcpu_cache
, svm
);
637 static void svm_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
639 struct vcpu_svm
*svm
= to_svm(vcpu
);
642 if (unlikely(cpu
!= vcpu
->cpu
)) {
646 * Make sure that the guest sees a monotonically
650 delta
= vcpu
->arch
.host_tsc
- tsc_this
;
651 svm
->vmcb
->control
.tsc_offset
+= delta
;
653 kvm_migrate_apic_timer(vcpu
);
656 for (i
= 0; i
< NR_HOST_SAVE_USER_MSRS
; i
++)
657 rdmsrl(host_save_user_msrs
[i
], svm
->host_user_msrs
[i
]);
660 static void svm_vcpu_put(struct kvm_vcpu
*vcpu
)
662 struct vcpu_svm
*svm
= to_svm(vcpu
);
665 ++vcpu
->stat
.host_state_reload
;
666 for (i
= 0; i
< NR_HOST_SAVE_USER_MSRS
; i
++)
667 wrmsrl(host_save_user_msrs
[i
], svm
->host_user_msrs
[i
]);
669 rdtscll(vcpu
->arch
.host_tsc
);
672 static void svm_vcpu_decache(struct kvm_vcpu
*vcpu
)
676 static void svm_cache_regs(struct kvm_vcpu
*vcpu
)
678 struct vcpu_svm
*svm
= to_svm(vcpu
);
680 vcpu
->arch
.regs
[VCPU_REGS_RAX
] = svm
->vmcb
->save
.rax
;
681 vcpu
->arch
.regs
[VCPU_REGS_RSP
] = svm
->vmcb
->save
.rsp
;
682 vcpu
->arch
.rip
= svm
->vmcb
->save
.rip
;
685 static void svm_decache_regs(struct kvm_vcpu
*vcpu
)
687 struct vcpu_svm
*svm
= to_svm(vcpu
);
688 svm
->vmcb
->save
.rax
= vcpu
->arch
.regs
[VCPU_REGS_RAX
];
689 svm
->vmcb
->save
.rsp
= vcpu
->arch
.regs
[VCPU_REGS_RSP
];
690 svm
->vmcb
->save
.rip
= vcpu
->arch
.rip
;
693 static unsigned long svm_get_rflags(struct kvm_vcpu
*vcpu
)
695 return to_svm(vcpu
)->vmcb
->save
.rflags
;
698 static void svm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
700 to_svm(vcpu
)->vmcb
->save
.rflags
= rflags
;
703 static struct vmcb_seg
*svm_seg(struct kvm_vcpu
*vcpu
, int seg
)
705 struct vmcb_save_area
*save
= &to_svm(vcpu
)->vmcb
->save
;
708 case VCPU_SREG_CS
: return &save
->cs
;
709 case VCPU_SREG_DS
: return &save
->ds
;
710 case VCPU_SREG_ES
: return &save
->es
;
711 case VCPU_SREG_FS
: return &save
->fs
;
712 case VCPU_SREG_GS
: return &save
->gs
;
713 case VCPU_SREG_SS
: return &save
->ss
;
714 case VCPU_SREG_TR
: return &save
->tr
;
715 case VCPU_SREG_LDTR
: return &save
->ldtr
;
721 static u64
svm_get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
723 struct vmcb_seg
*s
= svm_seg(vcpu
, seg
);
728 static void svm_get_segment(struct kvm_vcpu
*vcpu
,
729 struct kvm_segment
*var
, int seg
)
731 struct vmcb_seg
*s
= svm_seg(vcpu
, seg
);
734 var
->limit
= s
->limit
;
735 var
->selector
= s
->selector
;
736 var
->type
= s
->attrib
& SVM_SELECTOR_TYPE_MASK
;
737 var
->s
= (s
->attrib
>> SVM_SELECTOR_S_SHIFT
) & 1;
738 var
->dpl
= (s
->attrib
>> SVM_SELECTOR_DPL_SHIFT
) & 3;
739 var
->present
= (s
->attrib
>> SVM_SELECTOR_P_SHIFT
) & 1;
740 var
->avl
= (s
->attrib
>> SVM_SELECTOR_AVL_SHIFT
) & 1;
741 var
->l
= (s
->attrib
>> SVM_SELECTOR_L_SHIFT
) & 1;
742 var
->db
= (s
->attrib
>> SVM_SELECTOR_DB_SHIFT
) & 1;
743 var
->g
= (s
->attrib
>> SVM_SELECTOR_G_SHIFT
) & 1;
744 var
->unusable
= !var
->present
;
747 static void svm_get_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
749 struct vcpu_svm
*svm
= to_svm(vcpu
);
751 dt
->limit
= svm
->vmcb
->save
.idtr
.limit
;
752 dt
->base
= svm
->vmcb
->save
.idtr
.base
;
755 static void svm_set_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
757 struct vcpu_svm
*svm
= to_svm(vcpu
);
759 svm
->vmcb
->save
.idtr
.limit
= dt
->limit
;
760 svm
->vmcb
->save
.idtr
.base
= dt
->base
;
763 static void svm_get_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
765 struct vcpu_svm
*svm
= to_svm(vcpu
);
767 dt
->limit
= svm
->vmcb
->save
.gdtr
.limit
;
768 dt
->base
= svm
->vmcb
->save
.gdtr
.base
;
771 static void svm_set_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
773 struct vcpu_svm
*svm
= to_svm(vcpu
);
775 svm
->vmcb
->save
.gdtr
.limit
= dt
->limit
;
776 svm
->vmcb
->save
.gdtr
.base
= dt
->base
;
779 static void svm_decache_cr4_guest_bits(struct kvm_vcpu
*vcpu
)
783 static void svm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
785 struct vcpu_svm
*svm
= to_svm(vcpu
);
788 if (vcpu
->arch
.shadow_efer
& EFER_LME
) {
789 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
790 vcpu
->arch
.shadow_efer
|= EFER_LMA
;
791 svm
->vmcb
->save
.efer
|= EFER_LMA
| EFER_LME
;
794 if (is_paging(vcpu
) && !(cr0
& X86_CR0_PG
)) {
795 vcpu
->arch
.shadow_efer
&= ~EFER_LMA
;
796 svm
->vmcb
->save
.efer
&= ~(EFER_LMA
| EFER_LME
);
800 if ((vcpu
->arch
.cr0
& X86_CR0_TS
) && !(cr0
& X86_CR0_TS
)) {
801 svm
->vmcb
->control
.intercept_exceptions
&= ~(1 << NM_VECTOR
);
802 vcpu
->fpu_active
= 1;
805 vcpu
->arch
.cr0
= cr0
;
806 cr0
|= X86_CR0_PG
| X86_CR0_WP
;
807 cr0
&= ~(X86_CR0_CD
| X86_CR0_NW
);
808 if (!vcpu
->fpu_active
) {
809 svm
->vmcb
->control
.intercept_exceptions
|= (1 << NM_VECTOR
);
812 svm
->vmcb
->save
.cr0
= cr0
;
815 static void svm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
817 vcpu
->arch
.cr4
= cr4
;
818 to_svm(vcpu
)->vmcb
->save
.cr4
= cr4
| X86_CR4_PAE
;
821 static void svm_set_segment(struct kvm_vcpu
*vcpu
,
822 struct kvm_segment
*var
, int seg
)
824 struct vcpu_svm
*svm
= to_svm(vcpu
);
825 struct vmcb_seg
*s
= svm_seg(vcpu
, seg
);
828 s
->limit
= var
->limit
;
829 s
->selector
= var
->selector
;
833 s
->attrib
= (var
->type
& SVM_SELECTOR_TYPE_MASK
);
834 s
->attrib
|= (var
->s
& 1) << SVM_SELECTOR_S_SHIFT
;
835 s
->attrib
|= (var
->dpl
& 3) << SVM_SELECTOR_DPL_SHIFT
;
836 s
->attrib
|= (var
->present
& 1) << SVM_SELECTOR_P_SHIFT
;
837 s
->attrib
|= (var
->avl
& 1) << SVM_SELECTOR_AVL_SHIFT
;
838 s
->attrib
|= (var
->l
& 1) << SVM_SELECTOR_L_SHIFT
;
839 s
->attrib
|= (var
->db
& 1) << SVM_SELECTOR_DB_SHIFT
;
840 s
->attrib
|= (var
->g
& 1) << SVM_SELECTOR_G_SHIFT
;
842 if (seg
== VCPU_SREG_CS
)
844 = (svm
->vmcb
->save
.cs
.attrib
845 >> SVM_SELECTOR_DPL_SHIFT
) & 3;
851 svm(vcpu)->vmcb->control.int_ctl &= ~V_TPR_MASK;
852 svm(vcpu)->vmcb->control.int_ctl |= (sregs->cr8 & V_TPR_MASK);
856 static int svm_guest_debug(struct kvm_vcpu
*vcpu
, struct kvm_debug_guest
*dbg
)
861 static int svm_get_irq(struct kvm_vcpu
*vcpu
)
863 struct vcpu_svm
*svm
= to_svm(vcpu
);
864 u32 exit_int_info
= svm
->vmcb
->control
.exit_int_info
;
866 if (is_external_interrupt(exit_int_info
))
867 return exit_int_info
& SVM_EVTINJ_VEC_MASK
;
871 static void load_host_msrs(struct kvm_vcpu
*vcpu
)
874 wrmsrl(MSR_GS_BASE
, to_svm(vcpu
)->host_gs_base
);
878 static void save_host_msrs(struct kvm_vcpu
*vcpu
)
881 rdmsrl(MSR_GS_BASE
, to_svm(vcpu
)->host_gs_base
);
885 static void new_asid(struct vcpu_svm
*svm
, struct svm_cpu_data
*svm_data
)
887 if (svm_data
->next_asid
> svm_data
->max_asid
) {
888 ++svm_data
->asid_generation
;
889 svm_data
->next_asid
= 1;
890 svm
->vmcb
->control
.tlb_ctl
= TLB_CONTROL_FLUSH_ALL_ASID
;
893 svm
->vcpu
.cpu
= svm_data
->cpu
;
894 svm
->asid_generation
= svm_data
->asid_generation
;
895 svm
->vmcb
->control
.asid
= svm_data
->next_asid
++;
898 static unsigned long svm_get_dr(struct kvm_vcpu
*vcpu
, int dr
)
900 return to_svm(vcpu
)->db_regs
[dr
];
903 static void svm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long value
,
906 struct vcpu_svm
*svm
= to_svm(vcpu
);
910 if (svm
->vmcb
->save
.dr7
& DR7_GD_MASK
) {
911 svm
->vmcb
->save
.dr7
&= ~DR7_GD_MASK
;
912 svm
->vmcb
->save
.dr6
|= DR6_BD_MASK
;
913 *exception
= DB_VECTOR
;
919 svm
->db_regs
[dr
] = value
;
922 if (vcpu
->arch
.cr4
& X86_CR4_DE
) {
923 *exception
= UD_VECTOR
;
927 if (value
& ~((1ULL << 32) - 1)) {
928 *exception
= GP_VECTOR
;
931 svm
->vmcb
->save
.dr7
= value
;
935 printk(KERN_DEBUG
"%s: unexpected dr %u\n",
937 *exception
= UD_VECTOR
;
942 static int pf_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
944 u32 exit_int_info
= svm
->vmcb
->control
.exit_int_info
;
945 struct kvm
*kvm
= svm
->vcpu
.kvm
;
949 if (!irqchip_in_kernel(kvm
) &&
950 is_external_interrupt(exit_int_info
))
951 push_irq(&svm
->vcpu
, exit_int_info
& SVM_EVTINJ_VEC_MASK
);
953 fault_address
= svm
->vmcb
->control
.exit_info_2
;
954 error_code
= svm
->vmcb
->control
.exit_info_1
;
955 return kvm_mmu_page_fault(&svm
->vcpu
, fault_address
, error_code
);
958 static int ud_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
962 er
= emulate_instruction(&svm
->vcpu
, kvm_run
, 0, 0, EMULTYPE_TRAP_UD
);
963 if (er
!= EMULATE_DONE
)
964 kvm_queue_exception(&svm
->vcpu
, UD_VECTOR
);
968 static int nm_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
970 svm
->vmcb
->control
.intercept_exceptions
&= ~(1 << NM_VECTOR
);
971 if (!(svm
->vcpu
.arch
.cr0
& X86_CR0_TS
))
972 svm
->vmcb
->save
.cr0
&= ~X86_CR0_TS
;
973 svm
->vcpu
.fpu_active
= 1;
978 static int shutdown_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
981 * VMCB is undefined after a SHUTDOWN intercept
982 * so reinitialize it.
984 clear_page(svm
->vmcb
);
985 init_vmcb(svm
->vmcb
);
987 kvm_run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
991 static int io_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
993 u32 io_info
= svm
->vmcb
->control
.exit_info_1
; /* address size bug? */
994 int size
, down
, in
, string
, rep
;
997 ++svm
->vcpu
.stat
.io_exits
;
999 svm
->next_rip
= svm
->vmcb
->control
.exit_info_2
;
1001 string
= (io_info
& SVM_IOIO_STR_MASK
) != 0;
1004 if (emulate_instruction(&svm
->vcpu
,
1005 kvm_run
, 0, 0, 0) == EMULATE_DO_MMIO
)
1010 in
= (io_info
& SVM_IOIO_TYPE_MASK
) != 0;
1011 port
= io_info
>> 16;
1012 size
= (io_info
& SVM_IOIO_SIZE_MASK
) >> SVM_IOIO_SIZE_SHIFT
;
1013 rep
= (io_info
& SVM_IOIO_REP_MASK
) != 0;
1014 down
= (svm
->vmcb
->save
.rflags
& X86_EFLAGS_DF
) != 0;
1016 return kvm_emulate_pio(&svm
->vcpu
, kvm_run
, in
, size
, port
);
1019 static int nop_on_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1024 static int halt_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1026 svm
->next_rip
= svm
->vmcb
->save
.rip
+ 1;
1027 skip_emulated_instruction(&svm
->vcpu
);
1028 return kvm_emulate_halt(&svm
->vcpu
);
1031 static int vmmcall_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1033 svm
->next_rip
= svm
->vmcb
->save
.rip
+ 3;
1034 skip_emulated_instruction(&svm
->vcpu
);
1035 kvm_emulate_hypercall(&svm
->vcpu
);
1039 static int invalid_op_interception(struct vcpu_svm
*svm
,
1040 struct kvm_run
*kvm_run
)
1042 kvm_queue_exception(&svm
->vcpu
, UD_VECTOR
);
1046 static int task_switch_interception(struct vcpu_svm
*svm
,
1047 struct kvm_run
*kvm_run
)
1049 pr_unimpl(&svm
->vcpu
, "%s: task switch is unsupported\n", __FUNCTION__
);
1050 kvm_run
->exit_reason
= KVM_EXIT_UNKNOWN
;
1054 static int cpuid_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1056 svm
->next_rip
= svm
->vmcb
->save
.rip
+ 2;
1057 kvm_emulate_cpuid(&svm
->vcpu
);
1061 static int emulate_on_interception(struct vcpu_svm
*svm
,
1062 struct kvm_run
*kvm_run
)
1064 if (emulate_instruction(&svm
->vcpu
, NULL
, 0, 0, 0) != EMULATE_DONE
)
1065 pr_unimpl(&svm
->vcpu
, "%s: failed\n", __FUNCTION__
);
1069 static int cr8_write_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1071 emulate_instruction(&svm
->vcpu
, NULL
, 0, 0, 0);
1072 if (irqchip_in_kernel(svm
->vcpu
.kvm
))
1074 kvm_run
->exit_reason
= KVM_EXIT_SET_TPR
;
1078 static int svm_get_msr(struct kvm_vcpu
*vcpu
, unsigned ecx
, u64
*data
)
1080 struct vcpu_svm
*svm
= to_svm(vcpu
);
1083 case MSR_IA32_TIME_STAMP_COUNTER
: {
1087 *data
= svm
->vmcb
->control
.tsc_offset
+ tsc
;
1091 *data
= svm
->vmcb
->save
.star
;
1093 #ifdef CONFIG_X86_64
1095 *data
= svm
->vmcb
->save
.lstar
;
1098 *data
= svm
->vmcb
->save
.cstar
;
1100 case MSR_KERNEL_GS_BASE
:
1101 *data
= svm
->vmcb
->save
.kernel_gs_base
;
1103 case MSR_SYSCALL_MASK
:
1104 *data
= svm
->vmcb
->save
.sfmask
;
1107 case MSR_IA32_SYSENTER_CS
:
1108 *data
= svm
->vmcb
->save
.sysenter_cs
;
1110 case MSR_IA32_SYSENTER_EIP
:
1111 *data
= svm
->vmcb
->save
.sysenter_eip
;
1113 case MSR_IA32_SYSENTER_ESP
:
1114 *data
= svm
->vmcb
->save
.sysenter_esp
;
1116 /* Nobody will change the following 5 values in the VMCB so
1117 we can safely return them on rdmsr. They will always be 0
1118 until LBRV is implemented. */
1119 case MSR_IA32_DEBUGCTLMSR
:
1120 *data
= svm
->vmcb
->save
.dbgctl
;
1122 case MSR_IA32_LASTBRANCHFROMIP
:
1123 *data
= svm
->vmcb
->save
.br_from
;
1125 case MSR_IA32_LASTBRANCHTOIP
:
1126 *data
= svm
->vmcb
->save
.br_to
;
1128 case MSR_IA32_LASTINTFROMIP
:
1129 *data
= svm
->vmcb
->save
.last_excp_from
;
1131 case MSR_IA32_LASTINTTOIP
:
1132 *data
= svm
->vmcb
->save
.last_excp_to
;
1135 return kvm_get_msr_common(vcpu
, ecx
, data
);
1140 static int rdmsr_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1142 u32 ecx
= svm
->vcpu
.arch
.regs
[VCPU_REGS_RCX
];
1145 if (svm_get_msr(&svm
->vcpu
, ecx
, &data
))
1146 kvm_inject_gp(&svm
->vcpu
, 0);
1148 svm
->vmcb
->save
.rax
= data
& 0xffffffff;
1149 svm
->vcpu
.arch
.regs
[VCPU_REGS_RDX
] = data
>> 32;
1150 svm
->next_rip
= svm
->vmcb
->save
.rip
+ 2;
1151 skip_emulated_instruction(&svm
->vcpu
);
1156 static int svm_set_msr(struct kvm_vcpu
*vcpu
, unsigned ecx
, u64 data
)
1158 struct vcpu_svm
*svm
= to_svm(vcpu
);
1161 case MSR_IA32_TIME_STAMP_COUNTER
: {
1165 svm
->vmcb
->control
.tsc_offset
= data
- tsc
;
1169 svm
->vmcb
->save
.star
= data
;
1171 #ifdef CONFIG_X86_64
1173 svm
->vmcb
->save
.lstar
= data
;
1176 svm
->vmcb
->save
.cstar
= data
;
1178 case MSR_KERNEL_GS_BASE
:
1179 svm
->vmcb
->save
.kernel_gs_base
= data
;
1181 case MSR_SYSCALL_MASK
:
1182 svm
->vmcb
->save
.sfmask
= data
;
1185 case MSR_IA32_SYSENTER_CS
:
1186 svm
->vmcb
->save
.sysenter_cs
= data
;
1188 case MSR_IA32_SYSENTER_EIP
:
1189 svm
->vmcb
->save
.sysenter_eip
= data
;
1191 case MSR_IA32_SYSENTER_ESP
:
1192 svm
->vmcb
->save
.sysenter_esp
= data
;
1194 case MSR_IA32_DEBUGCTLMSR
:
1195 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1196 __FUNCTION__
, data
);
1198 case MSR_K7_EVNTSEL0
:
1199 case MSR_K7_EVNTSEL1
:
1200 case MSR_K7_EVNTSEL2
:
1201 case MSR_K7_EVNTSEL3
:
1203 * only support writing 0 to the performance counters for now
1204 * to make Windows happy. Should be replaced by a real
1205 * performance counter emulation later.
1212 return kvm_set_msr_common(vcpu
, ecx
, data
);
1217 static int wrmsr_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1219 u32 ecx
= svm
->vcpu
.arch
.regs
[VCPU_REGS_RCX
];
1220 u64 data
= (svm
->vmcb
->save
.rax
& -1u)
1221 | ((u64
)(svm
->vcpu
.arch
.regs
[VCPU_REGS_RDX
] & -1u) << 32);
1222 svm
->next_rip
= svm
->vmcb
->save
.rip
+ 2;
1223 if (svm_set_msr(&svm
->vcpu
, ecx
, data
))
1224 kvm_inject_gp(&svm
->vcpu
, 0);
1226 skip_emulated_instruction(&svm
->vcpu
);
1230 static int msr_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1232 if (svm
->vmcb
->control
.exit_info_1
)
1233 return wrmsr_interception(svm
, kvm_run
);
1235 return rdmsr_interception(svm
, kvm_run
);
1238 static int interrupt_window_interception(struct vcpu_svm
*svm
,
1239 struct kvm_run
*kvm_run
)
1241 svm
->vmcb
->control
.intercept
&= ~(1ULL << INTERCEPT_VINTR
);
1242 svm
->vmcb
->control
.int_ctl
&= ~V_IRQ_MASK
;
1244 * If the user space waits to inject interrupts, exit as soon as
1247 if (kvm_run
->request_interrupt_window
&&
1248 !svm
->vcpu
.arch
.irq_summary
) {
1249 ++svm
->vcpu
.stat
.irq_window_exits
;
1250 kvm_run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
1257 static int (*svm_exit_handlers
[])(struct vcpu_svm
*svm
,
1258 struct kvm_run
*kvm_run
) = {
1259 [SVM_EXIT_READ_CR0
] = emulate_on_interception
,
1260 [SVM_EXIT_READ_CR3
] = emulate_on_interception
,
1261 [SVM_EXIT_READ_CR4
] = emulate_on_interception
,
1262 [SVM_EXIT_READ_CR8
] = emulate_on_interception
,
1264 [SVM_EXIT_WRITE_CR0
] = emulate_on_interception
,
1265 [SVM_EXIT_WRITE_CR3
] = emulate_on_interception
,
1266 [SVM_EXIT_WRITE_CR4
] = emulate_on_interception
,
1267 [SVM_EXIT_WRITE_CR8
] = cr8_write_interception
,
1268 [SVM_EXIT_READ_DR0
] = emulate_on_interception
,
1269 [SVM_EXIT_READ_DR1
] = emulate_on_interception
,
1270 [SVM_EXIT_READ_DR2
] = emulate_on_interception
,
1271 [SVM_EXIT_READ_DR3
] = emulate_on_interception
,
1272 [SVM_EXIT_WRITE_DR0
] = emulate_on_interception
,
1273 [SVM_EXIT_WRITE_DR1
] = emulate_on_interception
,
1274 [SVM_EXIT_WRITE_DR2
] = emulate_on_interception
,
1275 [SVM_EXIT_WRITE_DR3
] = emulate_on_interception
,
1276 [SVM_EXIT_WRITE_DR5
] = emulate_on_interception
,
1277 [SVM_EXIT_WRITE_DR7
] = emulate_on_interception
,
1278 [SVM_EXIT_EXCP_BASE
+ UD_VECTOR
] = ud_interception
,
1279 [SVM_EXIT_EXCP_BASE
+ PF_VECTOR
] = pf_interception
,
1280 [SVM_EXIT_EXCP_BASE
+ NM_VECTOR
] = nm_interception
,
1281 [SVM_EXIT_INTR
] = nop_on_interception
,
1282 [SVM_EXIT_NMI
] = nop_on_interception
,
1283 [SVM_EXIT_SMI
] = nop_on_interception
,
1284 [SVM_EXIT_INIT
] = nop_on_interception
,
1285 [SVM_EXIT_VINTR
] = interrupt_window_interception
,
1286 /* [SVM_EXIT_CR0_SEL_WRITE] = emulate_on_interception, */
1287 [SVM_EXIT_CPUID
] = cpuid_interception
,
1288 [SVM_EXIT_INVD
] = emulate_on_interception
,
1289 [SVM_EXIT_HLT
] = halt_interception
,
1290 [SVM_EXIT_INVLPG
] = emulate_on_interception
,
1291 [SVM_EXIT_INVLPGA
] = invalid_op_interception
,
1292 [SVM_EXIT_IOIO
] = io_interception
,
1293 [SVM_EXIT_MSR
] = msr_interception
,
1294 [SVM_EXIT_TASK_SWITCH
] = task_switch_interception
,
1295 [SVM_EXIT_SHUTDOWN
] = shutdown_interception
,
1296 [SVM_EXIT_VMRUN
] = invalid_op_interception
,
1297 [SVM_EXIT_VMMCALL
] = vmmcall_interception
,
1298 [SVM_EXIT_VMLOAD
] = invalid_op_interception
,
1299 [SVM_EXIT_VMSAVE
] = invalid_op_interception
,
1300 [SVM_EXIT_STGI
] = invalid_op_interception
,
1301 [SVM_EXIT_CLGI
] = invalid_op_interception
,
1302 [SVM_EXIT_SKINIT
] = invalid_op_interception
,
1303 [SVM_EXIT_WBINVD
] = emulate_on_interception
,
1304 [SVM_EXIT_MONITOR
] = invalid_op_interception
,
1305 [SVM_EXIT_MWAIT
] = invalid_op_interception
,
1309 static int handle_exit(struct kvm_run
*kvm_run
, struct kvm_vcpu
*vcpu
)
1311 struct vcpu_svm
*svm
= to_svm(vcpu
);
1312 u32 exit_code
= svm
->vmcb
->control
.exit_code
;
1316 if (svm
->vmcb
->control
.exit_code
== SVM_EXIT_ERR
) {
1317 kvm_run
->exit_reason
= KVM_EXIT_FAIL_ENTRY
;
1318 kvm_run
->fail_entry
.hardware_entry_failure_reason
1319 = svm
->vmcb
->control
.exit_code
;
1323 if (is_external_interrupt(svm
->vmcb
->control
.exit_int_info
) &&
1324 exit_code
!= SVM_EXIT_EXCP_BASE
+ PF_VECTOR
)
1325 printk(KERN_ERR
"%s: unexpected exit_ini_info 0x%x "
1327 __FUNCTION__
, svm
->vmcb
->control
.exit_int_info
,
1330 if (exit_code
>= ARRAY_SIZE(svm_exit_handlers
)
1331 || !svm_exit_handlers
[exit_code
]) {
1332 kvm_run
->exit_reason
= KVM_EXIT_UNKNOWN
;
1333 kvm_run
->hw
.hardware_exit_reason
= exit_code
;
1337 return svm_exit_handlers
[exit_code
](svm
, kvm_run
);
1340 static void reload_tss(struct kvm_vcpu
*vcpu
)
1342 int cpu
= raw_smp_processor_id();
1344 struct svm_cpu_data
*svm_data
= per_cpu(svm_data
, cpu
);
1345 svm_data
->tss_desc
->type
= 9; /* available 32/64-bit TSS */
1349 static void pre_svm_run(struct vcpu_svm
*svm
)
1351 int cpu
= raw_smp_processor_id();
1353 struct svm_cpu_data
*svm_data
= per_cpu(svm_data
, cpu
);
1355 svm
->vmcb
->control
.tlb_ctl
= TLB_CONTROL_DO_NOTHING
;
1356 if (svm
->vcpu
.cpu
!= cpu
||
1357 svm
->asid_generation
!= svm_data
->asid_generation
)
1358 new_asid(svm
, svm_data
);
1362 static inline void svm_inject_irq(struct vcpu_svm
*svm
, int irq
)
1364 struct vmcb_control_area
*control
;
1366 control
= &svm
->vmcb
->control
;
1367 control
->int_vector
= irq
;
1368 control
->int_ctl
&= ~V_INTR_PRIO_MASK
;
1369 control
->int_ctl
|= V_IRQ_MASK
|
1370 ((/*control->int_vector >> 4*/ 0xf) << V_INTR_PRIO_SHIFT
);
1373 static void svm_set_irq(struct kvm_vcpu
*vcpu
, int irq
)
1375 struct vcpu_svm
*svm
= to_svm(vcpu
);
1377 svm_inject_irq(svm
, irq
);
1380 static void svm_intr_assist(struct kvm_vcpu
*vcpu
)
1382 struct vcpu_svm
*svm
= to_svm(vcpu
);
1383 struct vmcb
*vmcb
= svm
->vmcb
;
1384 int intr_vector
= -1;
1386 if ((vmcb
->control
.exit_int_info
& SVM_EVTINJ_VALID
) &&
1387 ((vmcb
->control
.exit_int_info
& SVM_EVTINJ_TYPE_MASK
) == 0)) {
1388 intr_vector
= vmcb
->control
.exit_int_info
&
1389 SVM_EVTINJ_VEC_MASK
;
1390 vmcb
->control
.exit_int_info
= 0;
1391 svm_inject_irq(svm
, intr_vector
);
1395 if (vmcb
->control
.int_ctl
& V_IRQ_MASK
)
1398 if (!kvm_cpu_has_interrupt(vcpu
))
1401 if (!(vmcb
->save
.rflags
& X86_EFLAGS_IF
) ||
1402 (vmcb
->control
.int_state
& SVM_INTERRUPT_SHADOW_MASK
) ||
1403 (vmcb
->control
.event_inj
& SVM_EVTINJ_VALID
)) {
1404 /* unable to deliver irq, set pending irq */
1405 vmcb
->control
.intercept
|= (1ULL << INTERCEPT_VINTR
);
1406 svm_inject_irq(svm
, 0x0);
1409 /* Okay, we can deliver the interrupt: grab it and update PIC state. */
1410 intr_vector
= kvm_cpu_get_interrupt(vcpu
);
1411 svm_inject_irq(svm
, intr_vector
);
1412 kvm_timer_intr_post(vcpu
, intr_vector
);
1415 static void kvm_reput_irq(struct vcpu_svm
*svm
)
1417 struct vmcb_control_area
*control
= &svm
->vmcb
->control
;
1419 if ((control
->int_ctl
& V_IRQ_MASK
)
1420 && !irqchip_in_kernel(svm
->vcpu
.kvm
)) {
1421 control
->int_ctl
&= ~V_IRQ_MASK
;
1422 push_irq(&svm
->vcpu
, control
->int_vector
);
1425 svm
->vcpu
.arch
.interrupt_window_open
=
1426 !(control
->int_state
& SVM_INTERRUPT_SHADOW_MASK
);
1429 static void svm_do_inject_vector(struct vcpu_svm
*svm
)
1431 struct kvm_vcpu
*vcpu
= &svm
->vcpu
;
1432 int word_index
= __ffs(vcpu
->arch
.irq_summary
);
1433 int bit_index
= __ffs(vcpu
->arch
.irq_pending
[word_index
]);
1434 int irq
= word_index
* BITS_PER_LONG
+ bit_index
;
1436 clear_bit(bit_index
, &vcpu
->arch
.irq_pending
[word_index
]);
1437 if (!vcpu
->arch
.irq_pending
[word_index
])
1438 clear_bit(word_index
, &vcpu
->arch
.irq_summary
);
1439 svm_inject_irq(svm
, irq
);
1442 static void do_interrupt_requests(struct kvm_vcpu
*vcpu
,
1443 struct kvm_run
*kvm_run
)
1445 struct vcpu_svm
*svm
= to_svm(vcpu
);
1446 struct vmcb_control_area
*control
= &svm
->vmcb
->control
;
1448 svm
->vcpu
.arch
.interrupt_window_open
=
1449 (!(control
->int_state
& SVM_INTERRUPT_SHADOW_MASK
) &&
1450 (svm
->vmcb
->save
.rflags
& X86_EFLAGS_IF
));
1452 if (svm
->vcpu
.arch
.interrupt_window_open
&& svm
->vcpu
.arch
.irq_summary
)
1454 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1456 svm_do_inject_vector(svm
);
1459 * Interrupts blocked. Wait for unblock.
1461 if (!svm
->vcpu
.arch
.interrupt_window_open
&&
1462 (svm
->vcpu
.arch
.irq_summary
|| kvm_run
->request_interrupt_window
))
1463 control
->intercept
|= 1ULL << INTERCEPT_VINTR
;
1465 control
->intercept
&= ~(1ULL << INTERCEPT_VINTR
);
1468 static int svm_set_tss_addr(struct kvm
*kvm
, unsigned int addr
)
1473 static void save_db_regs(unsigned long *db_regs
)
1475 asm volatile ("mov %%dr0, %0" : "=r"(db_regs
[0]));
1476 asm volatile ("mov %%dr1, %0" : "=r"(db_regs
[1]));
1477 asm volatile ("mov %%dr2, %0" : "=r"(db_regs
[2]));
1478 asm volatile ("mov %%dr3, %0" : "=r"(db_regs
[3]));
1481 static void load_db_regs(unsigned long *db_regs
)
1483 asm volatile ("mov %0, %%dr0" : : "r"(db_regs
[0]));
1484 asm volatile ("mov %0, %%dr1" : : "r"(db_regs
[1]));
1485 asm volatile ("mov %0, %%dr2" : : "r"(db_regs
[2]));
1486 asm volatile ("mov %0, %%dr3" : : "r"(db_regs
[3]));
1489 static void svm_flush_tlb(struct kvm_vcpu
*vcpu
)
1491 force_new_asid(vcpu
);
1494 static void svm_prepare_guest_switch(struct kvm_vcpu
*vcpu
)
1498 static void svm_vcpu_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1500 struct vcpu_svm
*svm
= to_svm(vcpu
);
1507 save_host_msrs(vcpu
);
1508 fs_selector
= read_fs();
1509 gs_selector
= read_gs();
1510 ldt_selector
= read_ldt();
1511 svm
->host_cr2
= kvm_read_cr2();
1512 svm
->host_dr6
= read_dr6();
1513 svm
->host_dr7
= read_dr7();
1514 svm
->vmcb
->save
.cr2
= vcpu
->arch
.cr2
;
1516 if (svm
->vmcb
->save
.dr7
& 0xff) {
1518 save_db_regs(svm
->host_db_regs
);
1519 load_db_regs(svm
->db_regs
);
1527 #ifdef CONFIG_X86_64
1533 #ifdef CONFIG_X86_64
1534 "mov %c[rbx](%[svm]), %%rbx \n\t"
1535 "mov %c[rcx](%[svm]), %%rcx \n\t"
1536 "mov %c[rdx](%[svm]), %%rdx \n\t"
1537 "mov %c[rsi](%[svm]), %%rsi \n\t"
1538 "mov %c[rdi](%[svm]), %%rdi \n\t"
1539 "mov %c[rbp](%[svm]), %%rbp \n\t"
1540 "mov %c[r8](%[svm]), %%r8 \n\t"
1541 "mov %c[r9](%[svm]), %%r9 \n\t"
1542 "mov %c[r10](%[svm]), %%r10 \n\t"
1543 "mov %c[r11](%[svm]), %%r11 \n\t"
1544 "mov %c[r12](%[svm]), %%r12 \n\t"
1545 "mov %c[r13](%[svm]), %%r13 \n\t"
1546 "mov %c[r14](%[svm]), %%r14 \n\t"
1547 "mov %c[r15](%[svm]), %%r15 \n\t"
1549 "mov %c[rbx](%[svm]), %%ebx \n\t"
1550 "mov %c[rcx](%[svm]), %%ecx \n\t"
1551 "mov %c[rdx](%[svm]), %%edx \n\t"
1552 "mov %c[rsi](%[svm]), %%esi \n\t"
1553 "mov %c[rdi](%[svm]), %%edi \n\t"
1554 "mov %c[rbp](%[svm]), %%ebp \n\t"
1557 #ifdef CONFIG_X86_64
1558 /* Enter guest mode */
1560 "mov %c[vmcb](%[svm]), %%rax \n\t"
1566 /* Enter guest mode */
1568 "mov %c[vmcb](%[svm]), %%eax \n\t"
1575 /* Save guest registers, load host registers */
1576 #ifdef CONFIG_X86_64
1577 "mov %%rbx, %c[rbx](%[svm]) \n\t"
1578 "mov %%rcx, %c[rcx](%[svm]) \n\t"
1579 "mov %%rdx, %c[rdx](%[svm]) \n\t"
1580 "mov %%rsi, %c[rsi](%[svm]) \n\t"
1581 "mov %%rdi, %c[rdi](%[svm]) \n\t"
1582 "mov %%rbp, %c[rbp](%[svm]) \n\t"
1583 "mov %%r8, %c[r8](%[svm]) \n\t"
1584 "mov %%r9, %c[r9](%[svm]) \n\t"
1585 "mov %%r10, %c[r10](%[svm]) \n\t"
1586 "mov %%r11, %c[r11](%[svm]) \n\t"
1587 "mov %%r12, %c[r12](%[svm]) \n\t"
1588 "mov %%r13, %c[r13](%[svm]) \n\t"
1589 "mov %%r14, %c[r14](%[svm]) \n\t"
1590 "mov %%r15, %c[r15](%[svm]) \n\t"
1594 "mov %%ebx, %c[rbx](%[svm]) \n\t"
1595 "mov %%ecx, %c[rcx](%[svm]) \n\t"
1596 "mov %%edx, %c[rdx](%[svm]) \n\t"
1597 "mov %%esi, %c[rsi](%[svm]) \n\t"
1598 "mov %%edi, %c[rdi](%[svm]) \n\t"
1599 "mov %%ebp, %c[rbp](%[svm]) \n\t"
1605 [vmcb
]"i"(offsetof(struct vcpu_svm
, vmcb_pa
)),
1606 [rbx
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_RBX
])),
1607 [rcx
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_RCX
])),
1608 [rdx
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_RDX
])),
1609 [rsi
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_RSI
])),
1610 [rdi
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_RDI
])),
1611 [rbp
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_RBP
]))
1612 #ifdef CONFIG_X86_64
1613 , [r8
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_R8
])),
1614 [r9
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_R9
])),
1615 [r10
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_R10
])),
1616 [r11
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_R11
])),
1617 [r12
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_R12
])),
1618 [r13
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_R13
])),
1619 [r14
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_R14
])),
1620 [r15
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_R15
]))
1623 #ifdef CONFIG_X86_64
1624 , "rbx", "rcx", "rdx", "rsi", "rdi"
1625 , "r8", "r9", "r10", "r11" , "r12", "r13", "r14", "r15"
1627 , "ebx", "ecx", "edx" , "esi", "edi"
1631 if ((svm
->vmcb
->save
.dr7
& 0xff))
1632 load_db_regs(svm
->host_db_regs
);
1634 vcpu
->arch
.cr2
= svm
->vmcb
->save
.cr2
;
1636 write_dr6(svm
->host_dr6
);
1637 write_dr7(svm
->host_dr7
);
1638 kvm_write_cr2(svm
->host_cr2
);
1640 load_fs(fs_selector
);
1641 load_gs(gs_selector
);
1642 load_ldt(ldt_selector
);
1643 load_host_msrs(vcpu
);
1647 local_irq_disable();
1654 static void svm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long root
)
1656 struct vcpu_svm
*svm
= to_svm(vcpu
);
1658 svm
->vmcb
->save
.cr3
= root
;
1659 force_new_asid(vcpu
);
1661 if (vcpu
->fpu_active
) {
1662 svm
->vmcb
->control
.intercept_exceptions
|= (1 << NM_VECTOR
);
1663 svm
->vmcb
->save
.cr0
|= X86_CR0_TS
;
1664 vcpu
->fpu_active
= 0;
1668 static int is_disabled(void)
1672 rdmsrl(MSR_VM_CR
, vm_cr
);
1673 if (vm_cr
& (1 << SVM_VM_CR_SVM_DISABLE
))
1680 svm_patch_hypercall(struct kvm_vcpu
*vcpu
, unsigned char *hypercall
)
1683 * Patch in the VMMCALL instruction:
1685 hypercall
[0] = 0x0f;
1686 hypercall
[1] = 0x01;
1687 hypercall
[2] = 0xd9;
1690 static void svm_check_processor_compat(void *rtn
)
1695 static bool svm_cpu_has_accelerated_tpr(void)
1700 static struct kvm_x86_ops svm_x86_ops
= {
1701 .cpu_has_kvm_support
= has_svm
,
1702 .disabled_by_bios
= is_disabled
,
1703 .hardware_setup
= svm_hardware_setup
,
1704 .hardware_unsetup
= svm_hardware_unsetup
,
1705 .check_processor_compatibility
= svm_check_processor_compat
,
1706 .hardware_enable
= svm_hardware_enable
,
1707 .hardware_disable
= svm_hardware_disable
,
1708 .cpu_has_accelerated_tpr
= svm_cpu_has_accelerated_tpr
,
1710 .vcpu_create
= svm_create_vcpu
,
1711 .vcpu_free
= svm_free_vcpu
,
1712 .vcpu_reset
= svm_vcpu_reset
,
1714 .prepare_guest_switch
= svm_prepare_guest_switch
,
1715 .vcpu_load
= svm_vcpu_load
,
1716 .vcpu_put
= svm_vcpu_put
,
1717 .vcpu_decache
= svm_vcpu_decache
,
1719 .set_guest_debug
= svm_guest_debug
,
1720 .get_msr
= svm_get_msr
,
1721 .set_msr
= svm_set_msr
,
1722 .get_segment_base
= svm_get_segment_base
,
1723 .get_segment
= svm_get_segment
,
1724 .set_segment
= svm_set_segment
,
1725 .get_cs_db_l_bits
= kvm_get_cs_db_l_bits
,
1726 .decache_cr4_guest_bits
= svm_decache_cr4_guest_bits
,
1727 .set_cr0
= svm_set_cr0
,
1728 .set_cr3
= svm_set_cr3
,
1729 .set_cr4
= svm_set_cr4
,
1730 .set_efer
= svm_set_efer
,
1731 .get_idt
= svm_get_idt
,
1732 .set_idt
= svm_set_idt
,
1733 .get_gdt
= svm_get_gdt
,
1734 .set_gdt
= svm_set_gdt
,
1735 .get_dr
= svm_get_dr
,
1736 .set_dr
= svm_set_dr
,
1737 .cache_regs
= svm_cache_regs
,
1738 .decache_regs
= svm_decache_regs
,
1739 .get_rflags
= svm_get_rflags
,
1740 .set_rflags
= svm_set_rflags
,
1742 .tlb_flush
= svm_flush_tlb
,
1744 .run
= svm_vcpu_run
,
1745 .handle_exit
= handle_exit
,
1746 .skip_emulated_instruction
= skip_emulated_instruction
,
1747 .patch_hypercall
= svm_patch_hypercall
,
1748 .get_irq
= svm_get_irq
,
1749 .set_irq
= svm_set_irq
,
1750 .queue_exception
= svm_queue_exception
,
1751 .exception_injected
= svm_exception_injected
,
1752 .inject_pending_irq
= svm_intr_assist
,
1753 .inject_pending_vectors
= do_interrupt_requests
,
1755 .set_tss_addr
= svm_set_tss_addr
,
1758 static int __init
svm_init(void)
1760 return kvm_init(&svm_x86_ops
, sizeof(struct vcpu_svm
),
1764 static void __exit
svm_exit(void)
1769 module_init(svm_init
)
1770 module_exit(svm_exit
)