2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
7 * Copyright (C) 2006 Qumranet, Inc.
10 * Avi Kivity <avi@qumranet.com>
11 * Yaniv Kamay <yaniv@qumranet.com>
13 * This work is licensed under the terms of the GNU GPL, version 2. See
14 * the COPYING file in the top-level directory.
20 #include "segment_descriptor.h"
23 #include <linux/kvm_host.h>
24 #include <linux/module.h>
25 #include <linux/kernel.h>
27 #include <linux/highmem.h>
28 #include <linux/sched.h>
29 #include <linux/moduleparam.h>
34 MODULE_AUTHOR("Qumranet");
35 MODULE_LICENSE("GPL");
37 static int bypass_guest_pf
= 1;
38 module_param(bypass_guest_pf
, bool, 0);
50 u32 idt_vectoring_info
;
51 struct kvm_msr_entry
*guest_msrs
;
52 struct kvm_msr_entry
*host_msrs
;
57 int msr_offset_kernel_gs_base
;
62 u16 fs_sel
, gs_sel
, ldt_sel
;
63 int gs_ldt_reload_needed
;
65 int guest_efer_loaded
;
76 static inline struct vcpu_vmx
*to_vmx(struct kvm_vcpu
*vcpu
)
78 return container_of(vcpu
, struct vcpu_vmx
, vcpu
);
81 static int init_rmode_tss(struct kvm
*kvm
);
83 static DEFINE_PER_CPU(struct vmcs
*, vmxarea
);
84 static DEFINE_PER_CPU(struct vmcs
*, current_vmcs
);
86 static struct page
*vmx_io_bitmap_a
;
87 static struct page
*vmx_io_bitmap_b
;
89 static struct vmcs_config
{
93 u32 pin_based_exec_ctrl
;
94 u32 cpu_based_exec_ctrl
;
95 u32 cpu_based_2nd_exec_ctrl
;
100 #define VMX_SEGMENT_FIELD(seg) \
101 [VCPU_SREG_##seg] = { \
102 .selector = GUEST_##seg##_SELECTOR, \
103 .base = GUEST_##seg##_BASE, \
104 .limit = GUEST_##seg##_LIMIT, \
105 .ar_bytes = GUEST_##seg##_AR_BYTES, \
108 static struct kvm_vmx_segment_field
{
113 } kvm_vmx_segment_fields
[] = {
114 VMX_SEGMENT_FIELD(CS
),
115 VMX_SEGMENT_FIELD(DS
),
116 VMX_SEGMENT_FIELD(ES
),
117 VMX_SEGMENT_FIELD(FS
),
118 VMX_SEGMENT_FIELD(GS
),
119 VMX_SEGMENT_FIELD(SS
),
120 VMX_SEGMENT_FIELD(TR
),
121 VMX_SEGMENT_FIELD(LDTR
),
125 * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
126 * away by decrementing the array size.
128 static const u32 vmx_msr_index
[] = {
130 MSR_SYSCALL_MASK
, MSR_LSTAR
, MSR_CSTAR
, MSR_KERNEL_GS_BASE
,
132 MSR_EFER
, MSR_K6_STAR
,
134 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
136 static void load_msrs(struct kvm_msr_entry
*e
, int n
)
140 for (i
= 0; i
< n
; ++i
)
141 wrmsrl(e
[i
].index
, e
[i
].data
);
144 static void save_msrs(struct kvm_msr_entry
*e
, int n
)
148 for (i
= 0; i
< n
; ++i
)
149 rdmsrl(e
[i
].index
, e
[i
].data
);
152 static inline int is_page_fault(u32 intr_info
)
154 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
|
155 INTR_INFO_VALID_MASK
)) ==
156 (INTR_TYPE_EXCEPTION
| PF_VECTOR
| INTR_INFO_VALID_MASK
);
159 static inline int is_no_device(u32 intr_info
)
161 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
|
162 INTR_INFO_VALID_MASK
)) ==
163 (INTR_TYPE_EXCEPTION
| NM_VECTOR
| INTR_INFO_VALID_MASK
);
166 static inline int is_invalid_opcode(u32 intr_info
)
168 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
|
169 INTR_INFO_VALID_MASK
)) ==
170 (INTR_TYPE_EXCEPTION
| UD_VECTOR
| INTR_INFO_VALID_MASK
);
173 static inline int is_external_interrupt(u32 intr_info
)
175 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VALID_MASK
))
176 == (INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
179 static inline int cpu_has_vmx_tpr_shadow(void)
181 return (vmcs_config
.cpu_based_exec_ctrl
& CPU_BASED_TPR_SHADOW
);
184 static inline int vm_need_tpr_shadow(struct kvm
*kvm
)
186 return ((cpu_has_vmx_tpr_shadow()) && (irqchip_in_kernel(kvm
)));
189 static inline int cpu_has_secondary_exec_ctrls(void)
191 return (vmcs_config
.cpu_based_exec_ctrl
&
192 CPU_BASED_ACTIVATE_SECONDARY_CONTROLS
);
195 static inline bool cpu_has_vmx_virtualize_apic_accesses(void)
197 return (vmcs_config
.cpu_based_2nd_exec_ctrl
&
198 SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES
);
201 static inline int vm_need_virtualize_apic_accesses(struct kvm
*kvm
)
203 return ((cpu_has_vmx_virtualize_apic_accesses()) &&
204 (irqchip_in_kernel(kvm
)));
207 static int __find_msr_index(struct vcpu_vmx
*vmx
, u32 msr
)
211 for (i
= 0; i
< vmx
->nmsrs
; ++i
)
212 if (vmx
->guest_msrs
[i
].index
== msr
)
217 static struct kvm_msr_entry
*find_msr_entry(struct vcpu_vmx
*vmx
, u32 msr
)
221 i
= __find_msr_index(vmx
, msr
);
223 return &vmx
->guest_msrs
[i
];
227 static void vmcs_clear(struct vmcs
*vmcs
)
229 u64 phys_addr
= __pa(vmcs
);
232 asm volatile (ASM_VMX_VMCLEAR_RAX
"; setna %0"
233 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
236 printk(KERN_ERR
"kvm: vmclear fail: %p/%llx\n",
240 static void __vcpu_clear(void *arg
)
242 struct vcpu_vmx
*vmx
= arg
;
243 int cpu
= raw_smp_processor_id();
245 if (vmx
->vcpu
.cpu
== cpu
)
246 vmcs_clear(vmx
->vmcs
);
247 if (per_cpu(current_vmcs
, cpu
) == vmx
->vmcs
)
248 per_cpu(current_vmcs
, cpu
) = NULL
;
249 rdtscll(vmx
->vcpu
.arch
.host_tsc
);
252 static void vcpu_clear(struct vcpu_vmx
*vmx
)
254 if (vmx
->vcpu
.cpu
== -1)
256 smp_call_function_single(vmx
->vcpu
.cpu
, __vcpu_clear
, vmx
, 0, 1);
260 static unsigned long vmcs_readl(unsigned long field
)
264 asm volatile (ASM_VMX_VMREAD_RDX_RAX
265 : "=a"(value
) : "d"(field
) : "cc");
269 static u16
vmcs_read16(unsigned long field
)
271 return vmcs_readl(field
);
274 static u32
vmcs_read32(unsigned long field
)
276 return vmcs_readl(field
);
279 static u64
vmcs_read64(unsigned long field
)
282 return vmcs_readl(field
);
284 return vmcs_readl(field
) | ((u64
)vmcs_readl(field
+1) << 32);
288 static noinline
void vmwrite_error(unsigned long field
, unsigned long value
)
290 printk(KERN_ERR
"vmwrite error: reg %lx value %lx (err %d)\n",
291 field
, value
, vmcs_read32(VM_INSTRUCTION_ERROR
));
295 static void vmcs_writel(unsigned long field
, unsigned long value
)
299 asm volatile (ASM_VMX_VMWRITE_RAX_RDX
"; setna %0"
300 : "=q"(error
) : "a"(value
), "d"(field
) : "cc");
302 vmwrite_error(field
, value
);
305 static void vmcs_write16(unsigned long field
, u16 value
)
307 vmcs_writel(field
, value
);
310 static void vmcs_write32(unsigned long field
, u32 value
)
312 vmcs_writel(field
, value
);
315 static void vmcs_write64(unsigned long field
, u64 value
)
318 vmcs_writel(field
, value
);
320 vmcs_writel(field
, value
);
322 vmcs_writel(field
+1, value
>> 32);
326 static void vmcs_clear_bits(unsigned long field
, u32 mask
)
328 vmcs_writel(field
, vmcs_readl(field
) & ~mask
);
331 static void vmcs_set_bits(unsigned long field
, u32 mask
)
333 vmcs_writel(field
, vmcs_readl(field
) | mask
);
336 static void update_exception_bitmap(struct kvm_vcpu
*vcpu
)
340 eb
= (1u << PF_VECTOR
) | (1u << UD_VECTOR
);
341 if (!vcpu
->fpu_active
)
342 eb
|= 1u << NM_VECTOR
;
343 if (vcpu
->guest_debug
.enabled
)
345 if (vcpu
->arch
.rmode
.active
)
347 vmcs_write32(EXCEPTION_BITMAP
, eb
);
350 static void reload_tss(void)
353 * VT restores TR but not its size. Useless.
355 struct descriptor_table gdt
;
356 struct segment_descriptor
*descs
;
359 descs
= (void *)gdt
.base
;
360 descs
[GDT_ENTRY_TSS
].type
= 9; /* available TSS */
364 static void load_transition_efer(struct vcpu_vmx
*vmx
)
366 int efer_offset
= vmx
->msr_offset_efer
;
367 u64 host_efer
= vmx
->host_msrs
[efer_offset
].data
;
368 u64 guest_efer
= vmx
->guest_msrs
[efer_offset
].data
;
374 * NX is emulated; LMA and LME handled by hardware; SCE meaninless
377 ignore_bits
= EFER_NX
| EFER_SCE
;
379 ignore_bits
|= EFER_LMA
| EFER_LME
;
380 /* SCE is meaningful only in long mode on Intel */
381 if (guest_efer
& EFER_LMA
)
382 ignore_bits
&= ~(u64
)EFER_SCE
;
384 if ((guest_efer
& ~ignore_bits
) == (host_efer
& ~ignore_bits
))
387 vmx
->host_state
.guest_efer_loaded
= 1;
388 guest_efer
&= ~ignore_bits
;
389 guest_efer
|= host_efer
& ignore_bits
;
390 wrmsrl(MSR_EFER
, guest_efer
);
391 vmx
->vcpu
.stat
.efer_reload
++;
394 static void reload_host_efer(struct vcpu_vmx
*vmx
)
396 if (vmx
->host_state
.guest_efer_loaded
) {
397 vmx
->host_state
.guest_efer_loaded
= 0;
398 load_msrs(vmx
->host_msrs
+ vmx
->msr_offset_efer
, 1);
402 static void vmx_save_host_state(struct kvm_vcpu
*vcpu
)
404 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
406 if (vmx
->host_state
.loaded
)
409 vmx
->host_state
.loaded
= 1;
411 * Set host fs and gs selectors. Unfortunately, 22.2.3 does not
412 * allow segment selectors with cpl > 0 or ti == 1.
414 vmx
->host_state
.ldt_sel
= read_ldt();
415 vmx
->host_state
.gs_ldt_reload_needed
= vmx
->host_state
.ldt_sel
;
416 vmx
->host_state
.fs_sel
= read_fs();
417 if (!(vmx
->host_state
.fs_sel
& 7)) {
418 vmcs_write16(HOST_FS_SELECTOR
, vmx
->host_state
.fs_sel
);
419 vmx
->host_state
.fs_reload_needed
= 0;
421 vmcs_write16(HOST_FS_SELECTOR
, 0);
422 vmx
->host_state
.fs_reload_needed
= 1;
424 vmx
->host_state
.gs_sel
= read_gs();
425 if (!(vmx
->host_state
.gs_sel
& 7))
426 vmcs_write16(HOST_GS_SELECTOR
, vmx
->host_state
.gs_sel
);
428 vmcs_write16(HOST_GS_SELECTOR
, 0);
429 vmx
->host_state
.gs_ldt_reload_needed
= 1;
433 vmcs_writel(HOST_FS_BASE
, read_msr(MSR_FS_BASE
));
434 vmcs_writel(HOST_GS_BASE
, read_msr(MSR_GS_BASE
));
436 vmcs_writel(HOST_FS_BASE
, segment_base(vmx
->host_state
.fs_sel
));
437 vmcs_writel(HOST_GS_BASE
, segment_base(vmx
->host_state
.gs_sel
));
441 if (is_long_mode(&vmx
->vcpu
))
442 save_msrs(vmx
->host_msrs
+
443 vmx
->msr_offset_kernel_gs_base
, 1);
446 load_msrs(vmx
->guest_msrs
, vmx
->save_nmsrs
);
447 load_transition_efer(vmx
);
450 static void vmx_load_host_state(struct vcpu_vmx
*vmx
)
454 if (!vmx
->host_state
.loaded
)
457 ++vmx
->vcpu
.stat
.host_state_reload
;
458 vmx
->host_state
.loaded
= 0;
459 if (vmx
->host_state
.fs_reload_needed
)
460 load_fs(vmx
->host_state
.fs_sel
);
461 if (vmx
->host_state
.gs_ldt_reload_needed
) {
462 load_ldt(vmx
->host_state
.ldt_sel
);
464 * If we have to reload gs, we must take care to
465 * preserve our gs base.
467 local_irq_save(flags
);
468 load_gs(vmx
->host_state
.gs_sel
);
470 wrmsrl(MSR_GS_BASE
, vmcs_readl(HOST_GS_BASE
));
472 local_irq_restore(flags
);
475 save_msrs(vmx
->guest_msrs
, vmx
->save_nmsrs
);
476 load_msrs(vmx
->host_msrs
, vmx
->save_nmsrs
);
477 reload_host_efer(vmx
);
481 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
482 * vcpu mutex is already taken.
484 static void vmx_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
486 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
487 u64 phys_addr
= __pa(vmx
->vmcs
);
490 if (vcpu
->cpu
!= cpu
) {
492 kvm_migrate_apic_timer(vcpu
);
495 if (per_cpu(current_vmcs
, cpu
) != vmx
->vmcs
) {
498 per_cpu(current_vmcs
, cpu
) = vmx
->vmcs
;
499 asm volatile (ASM_VMX_VMPTRLD_RAX
"; setna %0"
500 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
503 printk(KERN_ERR
"kvm: vmptrld %p/%llx fail\n",
504 vmx
->vmcs
, phys_addr
);
507 if (vcpu
->cpu
!= cpu
) {
508 struct descriptor_table dt
;
509 unsigned long sysenter_esp
;
513 * Linux uses per-cpu TSS and GDT, so set these when switching
516 vmcs_writel(HOST_TR_BASE
, read_tr_base()); /* 22.2.4 */
518 vmcs_writel(HOST_GDTR_BASE
, dt
.base
); /* 22.2.4 */
520 rdmsrl(MSR_IA32_SYSENTER_ESP
, sysenter_esp
);
521 vmcs_writel(HOST_IA32_SYSENTER_ESP
, sysenter_esp
); /* 22.2.3 */
524 * Make sure the time stamp counter is monotonous.
527 delta
= vcpu
->arch
.host_tsc
- tsc_this
;
528 vmcs_write64(TSC_OFFSET
, vmcs_read64(TSC_OFFSET
) + delta
);
532 static void vmx_vcpu_put(struct kvm_vcpu
*vcpu
)
534 vmx_load_host_state(to_vmx(vcpu
));
537 static void vmx_fpu_activate(struct kvm_vcpu
*vcpu
)
539 if (vcpu
->fpu_active
)
541 vcpu
->fpu_active
= 1;
542 vmcs_clear_bits(GUEST_CR0
, X86_CR0_TS
);
543 if (vcpu
->arch
.cr0
& X86_CR0_TS
)
544 vmcs_set_bits(GUEST_CR0
, X86_CR0_TS
);
545 update_exception_bitmap(vcpu
);
548 static void vmx_fpu_deactivate(struct kvm_vcpu
*vcpu
)
550 if (!vcpu
->fpu_active
)
552 vcpu
->fpu_active
= 0;
553 vmcs_set_bits(GUEST_CR0
, X86_CR0_TS
);
554 update_exception_bitmap(vcpu
);
557 static void vmx_vcpu_decache(struct kvm_vcpu
*vcpu
)
559 vcpu_clear(to_vmx(vcpu
));
562 static unsigned long vmx_get_rflags(struct kvm_vcpu
*vcpu
)
564 return vmcs_readl(GUEST_RFLAGS
);
567 static void vmx_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
569 if (vcpu
->arch
.rmode
.active
)
570 rflags
|= X86_EFLAGS_IOPL
| X86_EFLAGS_VM
;
571 vmcs_writel(GUEST_RFLAGS
, rflags
);
574 static void skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
577 u32 interruptibility
;
579 rip
= vmcs_readl(GUEST_RIP
);
580 rip
+= vmcs_read32(VM_EXIT_INSTRUCTION_LEN
);
581 vmcs_writel(GUEST_RIP
, rip
);
584 * We emulated an instruction, so temporary interrupt blocking
585 * should be removed, if set.
587 interruptibility
= vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
);
588 if (interruptibility
& 3)
589 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
,
590 interruptibility
& ~3);
591 vcpu
->arch
.interrupt_window_open
= 1;
594 static void vmx_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
,
595 bool has_error_code
, u32 error_code
)
597 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
598 nr
| INTR_TYPE_EXCEPTION
599 | (has_error_code
? INTR_INFO_DELIEVER_CODE_MASK
: 0)
600 | INTR_INFO_VALID_MASK
);
602 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, error_code
);
605 static bool vmx_exception_injected(struct kvm_vcpu
*vcpu
)
607 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
609 return !(vmx
->idt_vectoring_info
& VECTORING_INFO_VALID_MASK
);
613 * Swap MSR entry in host/guest MSR entry array.
616 static void move_msr_up(struct vcpu_vmx
*vmx
, int from
, int to
)
618 struct kvm_msr_entry tmp
;
620 tmp
= vmx
->guest_msrs
[to
];
621 vmx
->guest_msrs
[to
] = vmx
->guest_msrs
[from
];
622 vmx
->guest_msrs
[from
] = tmp
;
623 tmp
= vmx
->host_msrs
[to
];
624 vmx
->host_msrs
[to
] = vmx
->host_msrs
[from
];
625 vmx
->host_msrs
[from
] = tmp
;
630 * Set up the vmcs to automatically save and restore system
631 * msrs. Don't touch the 64-bit msrs if the guest is in legacy
632 * mode, as fiddling with msrs is very expensive.
634 static void setup_msrs(struct vcpu_vmx
*vmx
)
638 vmx_load_host_state(vmx
);
641 if (is_long_mode(&vmx
->vcpu
)) {
644 index
= __find_msr_index(vmx
, MSR_SYSCALL_MASK
);
646 move_msr_up(vmx
, index
, save_nmsrs
++);
647 index
= __find_msr_index(vmx
, MSR_LSTAR
);
649 move_msr_up(vmx
, index
, save_nmsrs
++);
650 index
= __find_msr_index(vmx
, MSR_CSTAR
);
652 move_msr_up(vmx
, index
, save_nmsrs
++);
653 index
= __find_msr_index(vmx
, MSR_KERNEL_GS_BASE
);
655 move_msr_up(vmx
, index
, save_nmsrs
++);
657 * MSR_K6_STAR is only needed on long mode guests, and only
658 * if efer.sce is enabled.
660 index
= __find_msr_index(vmx
, MSR_K6_STAR
);
661 if ((index
>= 0) && (vmx
->vcpu
.arch
.shadow_efer
& EFER_SCE
))
662 move_msr_up(vmx
, index
, save_nmsrs
++);
665 vmx
->save_nmsrs
= save_nmsrs
;
668 vmx
->msr_offset_kernel_gs_base
=
669 __find_msr_index(vmx
, MSR_KERNEL_GS_BASE
);
671 vmx
->msr_offset_efer
= __find_msr_index(vmx
, MSR_EFER
);
675 * reads and returns guest's timestamp counter "register"
676 * guest_tsc = host_tsc + tsc_offset -- 21.3
678 static u64
guest_read_tsc(void)
680 u64 host_tsc
, tsc_offset
;
683 tsc_offset
= vmcs_read64(TSC_OFFSET
);
684 return host_tsc
+ tsc_offset
;
688 * writes 'guest_tsc' into guest's timestamp counter "register"
689 * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
691 static void guest_write_tsc(u64 guest_tsc
)
696 vmcs_write64(TSC_OFFSET
, guest_tsc
- host_tsc
);
700 * Reads an msr value (of 'msr_index') into 'pdata'.
701 * Returns 0 on success, non-0 otherwise.
702 * Assumes vcpu_load() was already called.
704 static int vmx_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
707 struct kvm_msr_entry
*msr
;
710 printk(KERN_ERR
"BUG: get_msr called with NULL pdata\n");
717 data
= vmcs_readl(GUEST_FS_BASE
);
720 data
= vmcs_readl(GUEST_GS_BASE
);
723 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
725 case MSR_IA32_TIME_STAMP_COUNTER
:
726 data
= guest_read_tsc();
728 case MSR_IA32_SYSENTER_CS
:
729 data
= vmcs_read32(GUEST_SYSENTER_CS
);
731 case MSR_IA32_SYSENTER_EIP
:
732 data
= vmcs_readl(GUEST_SYSENTER_EIP
);
734 case MSR_IA32_SYSENTER_ESP
:
735 data
= vmcs_readl(GUEST_SYSENTER_ESP
);
738 msr
= find_msr_entry(to_vmx(vcpu
), msr_index
);
743 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
751 * Writes msr value into into the appropriate "register".
752 * Returns 0 on success, non-0 otherwise.
753 * Assumes vcpu_load() was already called.
755 static int vmx_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
757 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
758 struct kvm_msr_entry
*msr
;
764 ret
= kvm_set_msr_common(vcpu
, msr_index
, data
);
765 if (vmx
->host_state
.loaded
) {
766 reload_host_efer(vmx
);
767 load_transition_efer(vmx
);
771 vmcs_writel(GUEST_FS_BASE
, data
);
774 vmcs_writel(GUEST_GS_BASE
, data
);
777 case MSR_IA32_SYSENTER_CS
:
778 vmcs_write32(GUEST_SYSENTER_CS
, data
);
780 case MSR_IA32_SYSENTER_EIP
:
781 vmcs_writel(GUEST_SYSENTER_EIP
, data
);
783 case MSR_IA32_SYSENTER_ESP
:
784 vmcs_writel(GUEST_SYSENTER_ESP
, data
);
786 case MSR_IA32_TIME_STAMP_COUNTER
:
787 guest_write_tsc(data
);
790 msr
= find_msr_entry(vmx
, msr_index
);
793 if (vmx
->host_state
.loaded
)
794 load_msrs(vmx
->guest_msrs
, vmx
->save_nmsrs
);
797 ret
= kvm_set_msr_common(vcpu
, msr_index
, data
);
804 * Sync the rsp and rip registers into the vcpu structure. This allows
805 * registers to be accessed by indexing vcpu->arch.regs.
807 static void vcpu_load_rsp_rip(struct kvm_vcpu
*vcpu
)
809 vcpu
->arch
.regs
[VCPU_REGS_RSP
] = vmcs_readl(GUEST_RSP
);
810 vcpu
->arch
.rip
= vmcs_readl(GUEST_RIP
);
814 * Syncs rsp and rip back into the vmcs. Should be called after possible
817 static void vcpu_put_rsp_rip(struct kvm_vcpu
*vcpu
)
819 vmcs_writel(GUEST_RSP
, vcpu
->arch
.regs
[VCPU_REGS_RSP
]);
820 vmcs_writel(GUEST_RIP
, vcpu
->arch
.rip
);
823 static int set_guest_debug(struct kvm_vcpu
*vcpu
, struct kvm_debug_guest
*dbg
)
825 unsigned long dr7
= 0x400;
828 old_singlestep
= vcpu
->guest_debug
.singlestep
;
830 vcpu
->guest_debug
.enabled
= dbg
->enabled
;
831 if (vcpu
->guest_debug
.enabled
) {
834 dr7
|= 0x200; /* exact */
835 for (i
= 0; i
< 4; ++i
) {
836 if (!dbg
->breakpoints
[i
].enabled
)
838 vcpu
->guest_debug
.bp
[i
] = dbg
->breakpoints
[i
].address
;
839 dr7
|= 2 << (i
*2); /* global enable */
840 dr7
|= 0 << (i
*4+16); /* execution breakpoint */
843 vcpu
->guest_debug
.singlestep
= dbg
->singlestep
;
845 vcpu
->guest_debug
.singlestep
= 0;
847 if (old_singlestep
&& !vcpu
->guest_debug
.singlestep
) {
850 flags
= vmcs_readl(GUEST_RFLAGS
);
851 flags
&= ~(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
852 vmcs_writel(GUEST_RFLAGS
, flags
);
855 update_exception_bitmap(vcpu
);
856 vmcs_writel(GUEST_DR7
, dr7
);
861 static int vmx_get_irq(struct kvm_vcpu
*vcpu
)
863 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
866 idtv_info_field
= vmx
->idt_vectoring_info
;
867 if (idtv_info_field
& INTR_INFO_VALID_MASK
) {
868 if (is_external_interrupt(idtv_info_field
))
869 return idtv_info_field
& VECTORING_INFO_VECTOR_MASK
;
871 printk(KERN_DEBUG
"pending exception: not handled yet\n");
876 static __init
int cpu_has_kvm_support(void)
878 unsigned long ecx
= cpuid_ecx(1);
879 return test_bit(5, &ecx
); /* CPUID.1:ECX.VMX[bit 5] -> VT */
882 static __init
int vmx_disabled_by_bios(void)
886 rdmsrl(MSR_IA32_FEATURE_CONTROL
, msr
);
887 return (msr
& (MSR_IA32_FEATURE_CONTROL_LOCKED
|
888 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED
))
889 == MSR_IA32_FEATURE_CONTROL_LOCKED
;
890 /* locked but not enabled */
893 static void hardware_enable(void *garbage
)
895 int cpu
= raw_smp_processor_id();
896 u64 phys_addr
= __pa(per_cpu(vmxarea
, cpu
));
899 rdmsrl(MSR_IA32_FEATURE_CONTROL
, old
);
900 if ((old
& (MSR_IA32_FEATURE_CONTROL_LOCKED
|
901 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED
))
902 != (MSR_IA32_FEATURE_CONTROL_LOCKED
|
903 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED
))
904 /* enable and lock */
905 wrmsrl(MSR_IA32_FEATURE_CONTROL
, old
|
906 MSR_IA32_FEATURE_CONTROL_LOCKED
|
907 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED
);
908 write_cr4(read_cr4() | X86_CR4_VMXE
); /* FIXME: not cpu hotplug safe */
909 asm volatile (ASM_VMX_VMXON_RAX
: : "a"(&phys_addr
), "m"(phys_addr
)
913 static void hardware_disable(void *garbage
)
915 asm volatile (ASM_VMX_VMXOFF
: : : "cc");
918 static __init
int adjust_vmx_controls(u32 ctl_min
, u32 ctl_opt
,
919 u32 msr
, u32
*result
)
921 u32 vmx_msr_low
, vmx_msr_high
;
922 u32 ctl
= ctl_min
| ctl_opt
;
924 rdmsr(msr
, vmx_msr_low
, vmx_msr_high
);
926 ctl
&= vmx_msr_high
; /* bit == 0 in high word ==> must be zero */
927 ctl
|= vmx_msr_low
; /* bit == 1 in low word ==> must be one */
929 /* Ensure minimum (required) set of control bits are supported. */
937 static __init
int setup_vmcs_config(struct vmcs_config
*vmcs_conf
)
939 u32 vmx_msr_low
, vmx_msr_high
;
941 u32 _pin_based_exec_control
= 0;
942 u32 _cpu_based_exec_control
= 0;
943 u32 _cpu_based_2nd_exec_control
= 0;
944 u32 _vmexit_control
= 0;
945 u32 _vmentry_control
= 0;
947 min
= PIN_BASED_EXT_INTR_MASK
| PIN_BASED_NMI_EXITING
;
949 if (adjust_vmx_controls(min
, opt
, MSR_IA32_VMX_PINBASED_CTLS
,
950 &_pin_based_exec_control
) < 0)
953 min
= CPU_BASED_HLT_EXITING
|
955 CPU_BASED_CR8_LOAD_EXITING
|
956 CPU_BASED_CR8_STORE_EXITING
|
958 CPU_BASED_USE_IO_BITMAPS
|
959 CPU_BASED_MOV_DR_EXITING
|
960 CPU_BASED_USE_TSC_OFFSETING
;
961 opt
= CPU_BASED_TPR_SHADOW
|
962 CPU_BASED_ACTIVATE_SECONDARY_CONTROLS
;
963 if (adjust_vmx_controls(min
, opt
, MSR_IA32_VMX_PROCBASED_CTLS
,
964 &_cpu_based_exec_control
) < 0)
967 if ((_cpu_based_exec_control
& CPU_BASED_TPR_SHADOW
))
968 _cpu_based_exec_control
&= ~CPU_BASED_CR8_LOAD_EXITING
&
969 ~CPU_BASED_CR8_STORE_EXITING
;
971 if (_cpu_based_exec_control
& CPU_BASED_ACTIVATE_SECONDARY_CONTROLS
) {
973 opt
= SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES
|
974 SECONDARY_EXEC_WBINVD_EXITING
;
975 if (adjust_vmx_controls(min
, opt
, MSR_IA32_VMX_PROCBASED_CTLS2
,
976 &_cpu_based_2nd_exec_control
) < 0)
979 #ifndef CONFIG_X86_64
980 if (!(_cpu_based_2nd_exec_control
&
981 SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES
))
982 _cpu_based_exec_control
&= ~CPU_BASED_TPR_SHADOW
;
987 min
|= VM_EXIT_HOST_ADDR_SPACE_SIZE
;
990 if (adjust_vmx_controls(min
, opt
, MSR_IA32_VMX_EXIT_CTLS
,
991 &_vmexit_control
) < 0)
995 if (adjust_vmx_controls(min
, opt
, MSR_IA32_VMX_ENTRY_CTLS
,
996 &_vmentry_control
) < 0)
999 rdmsr(MSR_IA32_VMX_BASIC
, vmx_msr_low
, vmx_msr_high
);
1001 /* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */
1002 if ((vmx_msr_high
& 0x1fff) > PAGE_SIZE
)
1005 #ifdef CONFIG_X86_64
1006 /* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */
1007 if (vmx_msr_high
& (1u<<16))
1011 /* Require Write-Back (WB) memory type for VMCS accesses. */
1012 if (((vmx_msr_high
>> 18) & 15) != 6)
1015 vmcs_conf
->size
= vmx_msr_high
& 0x1fff;
1016 vmcs_conf
->order
= get_order(vmcs_config
.size
);
1017 vmcs_conf
->revision_id
= vmx_msr_low
;
1019 vmcs_conf
->pin_based_exec_ctrl
= _pin_based_exec_control
;
1020 vmcs_conf
->cpu_based_exec_ctrl
= _cpu_based_exec_control
;
1021 vmcs_conf
->cpu_based_2nd_exec_ctrl
= _cpu_based_2nd_exec_control
;
1022 vmcs_conf
->vmexit_ctrl
= _vmexit_control
;
1023 vmcs_conf
->vmentry_ctrl
= _vmentry_control
;
1028 static struct vmcs
*alloc_vmcs_cpu(int cpu
)
1030 int node
= cpu_to_node(cpu
);
1034 pages
= alloc_pages_node(node
, GFP_KERNEL
, vmcs_config
.order
);
1037 vmcs
= page_address(pages
);
1038 memset(vmcs
, 0, vmcs_config
.size
);
1039 vmcs
->revision_id
= vmcs_config
.revision_id
; /* vmcs revision id */
1043 static struct vmcs
*alloc_vmcs(void)
1045 return alloc_vmcs_cpu(raw_smp_processor_id());
1048 static void free_vmcs(struct vmcs
*vmcs
)
1050 free_pages((unsigned long)vmcs
, vmcs_config
.order
);
1053 static void free_kvm_area(void)
1057 for_each_online_cpu(cpu
)
1058 free_vmcs(per_cpu(vmxarea
, cpu
));
1061 static __init
int alloc_kvm_area(void)
1065 for_each_online_cpu(cpu
) {
1068 vmcs
= alloc_vmcs_cpu(cpu
);
1074 per_cpu(vmxarea
, cpu
) = vmcs
;
1079 static __init
int hardware_setup(void)
1081 if (setup_vmcs_config(&vmcs_config
) < 0)
1083 return alloc_kvm_area();
1086 static __exit
void hardware_unsetup(void)
1091 static void fix_pmode_dataseg(int seg
, struct kvm_save_segment
*save
)
1093 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1095 if (vmcs_readl(sf
->base
) == save
->base
&& (save
->base
& AR_S_MASK
)) {
1096 vmcs_write16(sf
->selector
, save
->selector
);
1097 vmcs_writel(sf
->base
, save
->base
);
1098 vmcs_write32(sf
->limit
, save
->limit
);
1099 vmcs_write32(sf
->ar_bytes
, save
->ar
);
1101 u32 dpl
= (vmcs_read16(sf
->selector
) & SELECTOR_RPL_MASK
)
1103 vmcs_write32(sf
->ar_bytes
, 0x93 | dpl
);
1107 static void enter_pmode(struct kvm_vcpu
*vcpu
)
1109 unsigned long flags
;
1111 vcpu
->arch
.rmode
.active
= 0;
1113 vmcs_writel(GUEST_TR_BASE
, vcpu
->arch
.rmode
.tr
.base
);
1114 vmcs_write32(GUEST_TR_LIMIT
, vcpu
->arch
.rmode
.tr
.limit
);
1115 vmcs_write32(GUEST_TR_AR_BYTES
, vcpu
->arch
.rmode
.tr
.ar
);
1117 flags
= vmcs_readl(GUEST_RFLAGS
);
1118 flags
&= ~(X86_EFLAGS_IOPL
| X86_EFLAGS_VM
);
1119 flags
|= (vcpu
->arch
.rmode
.save_iopl
<< IOPL_SHIFT
);
1120 vmcs_writel(GUEST_RFLAGS
, flags
);
1122 vmcs_writel(GUEST_CR4
, (vmcs_readl(GUEST_CR4
) & ~X86_CR4_VME
) |
1123 (vmcs_readl(CR4_READ_SHADOW
) & X86_CR4_VME
));
1125 update_exception_bitmap(vcpu
);
1127 fix_pmode_dataseg(VCPU_SREG_ES
, &vcpu
->arch
.rmode
.es
);
1128 fix_pmode_dataseg(VCPU_SREG_DS
, &vcpu
->arch
.rmode
.ds
);
1129 fix_pmode_dataseg(VCPU_SREG_GS
, &vcpu
->arch
.rmode
.gs
);
1130 fix_pmode_dataseg(VCPU_SREG_FS
, &vcpu
->arch
.rmode
.fs
);
1132 vmcs_write16(GUEST_SS_SELECTOR
, 0);
1133 vmcs_write32(GUEST_SS_AR_BYTES
, 0x93);
1135 vmcs_write16(GUEST_CS_SELECTOR
,
1136 vmcs_read16(GUEST_CS_SELECTOR
) & ~SELECTOR_RPL_MASK
);
1137 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
1140 static gva_t
rmode_tss_base(struct kvm
*kvm
)
1142 if (!kvm
->arch
.tss_addr
) {
1143 gfn_t base_gfn
= kvm
->memslots
[0].base_gfn
+
1144 kvm
->memslots
[0].npages
- 3;
1145 return base_gfn
<< PAGE_SHIFT
;
1147 return kvm
->arch
.tss_addr
;
1150 static void fix_rmode_seg(int seg
, struct kvm_save_segment
*save
)
1152 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1154 save
->selector
= vmcs_read16(sf
->selector
);
1155 save
->base
= vmcs_readl(sf
->base
);
1156 save
->limit
= vmcs_read32(sf
->limit
);
1157 save
->ar
= vmcs_read32(sf
->ar_bytes
);
1158 vmcs_write16(sf
->selector
, save
->base
>> 4);
1159 vmcs_write32(sf
->base
, save
->base
& 0xfffff);
1160 vmcs_write32(sf
->limit
, 0xffff);
1161 vmcs_write32(sf
->ar_bytes
, 0xf3);
1164 static void enter_rmode(struct kvm_vcpu
*vcpu
)
1166 unsigned long flags
;
1168 vcpu
->arch
.rmode
.active
= 1;
1170 vcpu
->arch
.rmode
.tr
.base
= vmcs_readl(GUEST_TR_BASE
);
1171 vmcs_writel(GUEST_TR_BASE
, rmode_tss_base(vcpu
->kvm
));
1173 vcpu
->arch
.rmode
.tr
.limit
= vmcs_read32(GUEST_TR_LIMIT
);
1174 vmcs_write32(GUEST_TR_LIMIT
, RMODE_TSS_SIZE
- 1);
1176 vcpu
->arch
.rmode
.tr
.ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
1177 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
1179 flags
= vmcs_readl(GUEST_RFLAGS
);
1180 vcpu
->arch
.rmode
.save_iopl
1181 = (flags
& X86_EFLAGS_IOPL
) >> IOPL_SHIFT
;
1183 flags
|= X86_EFLAGS_IOPL
| X86_EFLAGS_VM
;
1185 vmcs_writel(GUEST_RFLAGS
, flags
);
1186 vmcs_writel(GUEST_CR4
, vmcs_readl(GUEST_CR4
) | X86_CR4_VME
);
1187 update_exception_bitmap(vcpu
);
1189 vmcs_write16(GUEST_SS_SELECTOR
, vmcs_readl(GUEST_SS_BASE
) >> 4);
1190 vmcs_write32(GUEST_SS_LIMIT
, 0xffff);
1191 vmcs_write32(GUEST_SS_AR_BYTES
, 0xf3);
1193 vmcs_write32(GUEST_CS_AR_BYTES
, 0xf3);
1194 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
1195 if (vmcs_readl(GUEST_CS_BASE
) == 0xffff0000)
1196 vmcs_writel(GUEST_CS_BASE
, 0xf0000);
1197 vmcs_write16(GUEST_CS_SELECTOR
, vmcs_readl(GUEST_CS_BASE
) >> 4);
1199 fix_rmode_seg(VCPU_SREG_ES
, &vcpu
->arch
.rmode
.es
);
1200 fix_rmode_seg(VCPU_SREG_DS
, &vcpu
->arch
.rmode
.ds
);
1201 fix_rmode_seg(VCPU_SREG_GS
, &vcpu
->arch
.rmode
.gs
);
1202 fix_rmode_seg(VCPU_SREG_FS
, &vcpu
->arch
.rmode
.fs
);
1204 kvm_mmu_reset_context(vcpu
);
1205 init_rmode_tss(vcpu
->kvm
);
1208 #ifdef CONFIG_X86_64
1210 static void enter_lmode(struct kvm_vcpu
*vcpu
)
1214 guest_tr_ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
1215 if ((guest_tr_ar
& AR_TYPE_MASK
) != AR_TYPE_BUSY_64_TSS
) {
1216 printk(KERN_DEBUG
"%s: tss fixup for long mode. \n",
1218 vmcs_write32(GUEST_TR_AR_BYTES
,
1219 (guest_tr_ar
& ~AR_TYPE_MASK
)
1220 | AR_TYPE_BUSY_64_TSS
);
1223 vcpu
->arch
.shadow_efer
|= EFER_LMA
;
1225 find_msr_entry(to_vmx(vcpu
), MSR_EFER
)->data
|= EFER_LMA
| EFER_LME
;
1226 vmcs_write32(VM_ENTRY_CONTROLS
,
1227 vmcs_read32(VM_ENTRY_CONTROLS
)
1228 | VM_ENTRY_IA32E_MODE
);
1231 static void exit_lmode(struct kvm_vcpu
*vcpu
)
1233 vcpu
->arch
.shadow_efer
&= ~EFER_LMA
;
1235 vmcs_write32(VM_ENTRY_CONTROLS
,
1236 vmcs_read32(VM_ENTRY_CONTROLS
)
1237 & ~VM_ENTRY_IA32E_MODE
);
1242 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu
*vcpu
)
1244 vcpu
->arch
.cr4
&= KVM_GUEST_CR4_MASK
;
1245 vcpu
->arch
.cr4
|= vmcs_readl(GUEST_CR4
) & ~KVM_GUEST_CR4_MASK
;
1248 static void vmx_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
1250 vmx_fpu_deactivate(vcpu
);
1252 if (vcpu
->arch
.rmode
.active
&& (cr0
& X86_CR0_PE
))
1255 if (!vcpu
->arch
.rmode
.active
&& !(cr0
& X86_CR0_PE
))
1258 #ifdef CONFIG_X86_64
1259 if (vcpu
->arch
.shadow_efer
& EFER_LME
) {
1260 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
))
1262 if (is_paging(vcpu
) && !(cr0
& X86_CR0_PG
))
1267 vmcs_writel(CR0_READ_SHADOW
, cr0
);
1268 vmcs_writel(GUEST_CR0
,
1269 (cr0
& ~KVM_GUEST_CR0_MASK
) | KVM_VM_CR0_ALWAYS_ON
);
1270 vcpu
->arch
.cr0
= cr0
;
1272 if (!(cr0
& X86_CR0_TS
) || !(cr0
& X86_CR0_PE
))
1273 vmx_fpu_activate(vcpu
);
1276 static void vmx_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
1278 vmcs_writel(GUEST_CR3
, cr3
);
1279 if (vcpu
->arch
.cr0
& X86_CR0_PE
)
1280 vmx_fpu_deactivate(vcpu
);
1283 static void vmx_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1285 vmcs_writel(CR4_READ_SHADOW
, cr4
);
1286 vmcs_writel(GUEST_CR4
, cr4
| (vcpu
->arch
.rmode
.active
?
1287 KVM_RMODE_VM_CR4_ALWAYS_ON
: KVM_PMODE_VM_CR4_ALWAYS_ON
));
1288 vcpu
->arch
.cr4
= cr4
;
1291 #ifdef CONFIG_X86_64
1293 static void vmx_set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1295 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
1296 struct kvm_msr_entry
*msr
= find_msr_entry(vmx
, MSR_EFER
);
1298 vcpu
->arch
.shadow_efer
= efer
;
1299 if (efer
& EFER_LMA
) {
1300 vmcs_write32(VM_ENTRY_CONTROLS
,
1301 vmcs_read32(VM_ENTRY_CONTROLS
) |
1302 VM_ENTRY_IA32E_MODE
);
1306 vmcs_write32(VM_ENTRY_CONTROLS
,
1307 vmcs_read32(VM_ENTRY_CONTROLS
) &
1308 ~VM_ENTRY_IA32E_MODE
);
1310 msr
->data
= efer
& ~EFER_LME
;
1317 static u64
vmx_get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
1319 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1321 return vmcs_readl(sf
->base
);
1324 static void vmx_get_segment(struct kvm_vcpu
*vcpu
,
1325 struct kvm_segment
*var
, int seg
)
1327 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1330 var
->base
= vmcs_readl(sf
->base
);
1331 var
->limit
= vmcs_read32(sf
->limit
);
1332 var
->selector
= vmcs_read16(sf
->selector
);
1333 ar
= vmcs_read32(sf
->ar_bytes
);
1334 if (ar
& AR_UNUSABLE_MASK
)
1336 var
->type
= ar
& 15;
1337 var
->s
= (ar
>> 4) & 1;
1338 var
->dpl
= (ar
>> 5) & 3;
1339 var
->present
= (ar
>> 7) & 1;
1340 var
->avl
= (ar
>> 12) & 1;
1341 var
->l
= (ar
>> 13) & 1;
1342 var
->db
= (ar
>> 14) & 1;
1343 var
->g
= (ar
>> 15) & 1;
1344 var
->unusable
= (ar
>> 16) & 1;
1347 static u32
vmx_segment_access_rights(struct kvm_segment
*var
)
1354 ar
= var
->type
& 15;
1355 ar
|= (var
->s
& 1) << 4;
1356 ar
|= (var
->dpl
& 3) << 5;
1357 ar
|= (var
->present
& 1) << 7;
1358 ar
|= (var
->avl
& 1) << 12;
1359 ar
|= (var
->l
& 1) << 13;
1360 ar
|= (var
->db
& 1) << 14;
1361 ar
|= (var
->g
& 1) << 15;
1363 if (ar
== 0) /* a 0 value means unusable */
1364 ar
= AR_UNUSABLE_MASK
;
1369 static void vmx_set_segment(struct kvm_vcpu
*vcpu
,
1370 struct kvm_segment
*var
, int seg
)
1372 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1375 if (vcpu
->arch
.rmode
.active
&& seg
== VCPU_SREG_TR
) {
1376 vcpu
->arch
.rmode
.tr
.selector
= var
->selector
;
1377 vcpu
->arch
.rmode
.tr
.base
= var
->base
;
1378 vcpu
->arch
.rmode
.tr
.limit
= var
->limit
;
1379 vcpu
->arch
.rmode
.tr
.ar
= vmx_segment_access_rights(var
);
1382 vmcs_writel(sf
->base
, var
->base
);
1383 vmcs_write32(sf
->limit
, var
->limit
);
1384 vmcs_write16(sf
->selector
, var
->selector
);
1385 if (vcpu
->arch
.rmode
.active
&& var
->s
) {
1387 * Hack real-mode segments into vm86 compatibility.
1389 if (var
->base
== 0xffff0000 && var
->selector
== 0xf000)
1390 vmcs_writel(sf
->base
, 0xf0000);
1393 ar
= vmx_segment_access_rights(var
);
1394 vmcs_write32(sf
->ar_bytes
, ar
);
1397 static void vmx_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
1399 u32 ar
= vmcs_read32(GUEST_CS_AR_BYTES
);
1401 *db
= (ar
>> 14) & 1;
1402 *l
= (ar
>> 13) & 1;
1405 static void vmx_get_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
1407 dt
->limit
= vmcs_read32(GUEST_IDTR_LIMIT
);
1408 dt
->base
= vmcs_readl(GUEST_IDTR_BASE
);
1411 static void vmx_set_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
1413 vmcs_write32(GUEST_IDTR_LIMIT
, dt
->limit
);
1414 vmcs_writel(GUEST_IDTR_BASE
, dt
->base
);
1417 static void vmx_get_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
1419 dt
->limit
= vmcs_read32(GUEST_GDTR_LIMIT
);
1420 dt
->base
= vmcs_readl(GUEST_GDTR_BASE
);
1423 static void vmx_set_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
1425 vmcs_write32(GUEST_GDTR_LIMIT
, dt
->limit
);
1426 vmcs_writel(GUEST_GDTR_BASE
, dt
->base
);
1429 static int init_rmode_tss(struct kvm
*kvm
)
1431 gfn_t fn
= rmode_tss_base(kvm
) >> PAGE_SHIFT
;
1436 down_read(&kvm
->slots_lock
);
1437 r
= kvm_clear_guest_page(kvm
, fn
, 0, PAGE_SIZE
);
1440 data
= TSS_BASE_SIZE
+ TSS_REDIRECTION_SIZE
;
1441 r
= kvm_write_guest_page(kvm
, fn
++, &data
, 0x66, sizeof(u16
));
1444 r
= kvm_clear_guest_page(kvm
, fn
++, 0, PAGE_SIZE
);
1447 r
= kvm_clear_guest_page(kvm
, fn
, 0, PAGE_SIZE
);
1451 r
= kvm_write_guest_page(kvm
, fn
, &data
,
1452 RMODE_TSS_SIZE
- 2 * PAGE_SIZE
- 1,
1459 up_read(&kvm
->slots_lock
);
1463 static void seg_setup(int seg
)
1465 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1467 vmcs_write16(sf
->selector
, 0);
1468 vmcs_writel(sf
->base
, 0);
1469 vmcs_write32(sf
->limit
, 0xffff);
1470 vmcs_write32(sf
->ar_bytes
, 0x93);
1473 static int alloc_apic_access_page(struct kvm
*kvm
)
1475 struct kvm_userspace_memory_region kvm_userspace_mem
;
1478 down_write(&kvm
->slots_lock
);
1479 if (kvm
->arch
.apic_access_page
)
1481 kvm_userspace_mem
.slot
= APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
;
1482 kvm_userspace_mem
.flags
= 0;
1483 kvm_userspace_mem
.guest_phys_addr
= 0xfee00000ULL
;
1484 kvm_userspace_mem
.memory_size
= PAGE_SIZE
;
1485 r
= __kvm_set_memory_region(kvm
, &kvm_userspace_mem
, 0);
1489 down_read(¤t
->mm
->mmap_sem
);
1490 kvm
->arch
.apic_access_page
= gfn_to_page(kvm
, 0xfee00);
1491 up_read(¤t
->mm
->mmap_sem
);
1493 up_write(&kvm
->slots_lock
);
1498 * Sets up the vmcs for emulated real mode.
1500 static int vmx_vcpu_setup(struct vcpu_vmx
*vmx
)
1502 u32 host_sysenter_cs
;
1505 struct descriptor_table dt
;
1507 unsigned long kvm_vmx_return
;
1511 vmcs_write64(IO_BITMAP_A
, page_to_phys(vmx_io_bitmap_a
));
1512 vmcs_write64(IO_BITMAP_B
, page_to_phys(vmx_io_bitmap_b
));
1514 vmcs_write64(VMCS_LINK_POINTER
, -1ull); /* 22.3.1.5 */
1517 vmcs_write32(PIN_BASED_VM_EXEC_CONTROL
,
1518 vmcs_config
.pin_based_exec_ctrl
);
1520 exec_control
= vmcs_config
.cpu_based_exec_ctrl
;
1521 if (!vm_need_tpr_shadow(vmx
->vcpu
.kvm
)) {
1522 exec_control
&= ~CPU_BASED_TPR_SHADOW
;
1523 #ifdef CONFIG_X86_64
1524 exec_control
|= CPU_BASED_CR8_STORE_EXITING
|
1525 CPU_BASED_CR8_LOAD_EXITING
;
1528 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL
, exec_control
);
1530 if (cpu_has_secondary_exec_ctrls()) {
1531 exec_control
= vmcs_config
.cpu_based_2nd_exec_ctrl
;
1532 if (!vm_need_virtualize_apic_accesses(vmx
->vcpu
.kvm
))
1534 ~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES
;
1535 vmcs_write32(SECONDARY_VM_EXEC_CONTROL
, exec_control
);
1538 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK
, !!bypass_guest_pf
);
1539 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH
, !!bypass_guest_pf
);
1540 vmcs_write32(CR3_TARGET_COUNT
, 0); /* 22.2.1 */
1542 vmcs_writel(HOST_CR0
, read_cr0()); /* 22.2.3 */
1543 vmcs_writel(HOST_CR4
, read_cr4()); /* 22.2.3, 22.2.5 */
1544 vmcs_writel(HOST_CR3
, read_cr3()); /* 22.2.3 FIXME: shadow tables */
1546 vmcs_write16(HOST_CS_SELECTOR
, __KERNEL_CS
); /* 22.2.4 */
1547 vmcs_write16(HOST_DS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1548 vmcs_write16(HOST_ES_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1549 vmcs_write16(HOST_FS_SELECTOR
, read_fs()); /* 22.2.4 */
1550 vmcs_write16(HOST_GS_SELECTOR
, read_gs()); /* 22.2.4 */
1551 vmcs_write16(HOST_SS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1552 #ifdef CONFIG_X86_64
1553 rdmsrl(MSR_FS_BASE
, a
);
1554 vmcs_writel(HOST_FS_BASE
, a
); /* 22.2.4 */
1555 rdmsrl(MSR_GS_BASE
, a
);
1556 vmcs_writel(HOST_GS_BASE
, a
); /* 22.2.4 */
1558 vmcs_writel(HOST_FS_BASE
, 0); /* 22.2.4 */
1559 vmcs_writel(HOST_GS_BASE
, 0); /* 22.2.4 */
1562 vmcs_write16(HOST_TR_SELECTOR
, GDT_ENTRY_TSS
*8); /* 22.2.4 */
1565 vmcs_writel(HOST_IDTR_BASE
, dt
.base
); /* 22.2.4 */
1567 asm("mov $.Lkvm_vmx_return, %0" : "=r"(kvm_vmx_return
));
1568 vmcs_writel(HOST_RIP
, kvm_vmx_return
); /* 22.2.5 */
1569 vmcs_write32(VM_EXIT_MSR_STORE_COUNT
, 0);
1570 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT
, 0);
1571 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT
, 0);
1573 rdmsr(MSR_IA32_SYSENTER_CS
, host_sysenter_cs
, junk
);
1574 vmcs_write32(HOST_IA32_SYSENTER_CS
, host_sysenter_cs
);
1575 rdmsrl(MSR_IA32_SYSENTER_ESP
, a
);
1576 vmcs_writel(HOST_IA32_SYSENTER_ESP
, a
); /* 22.2.3 */
1577 rdmsrl(MSR_IA32_SYSENTER_EIP
, a
);
1578 vmcs_writel(HOST_IA32_SYSENTER_EIP
, a
); /* 22.2.3 */
1580 for (i
= 0; i
< NR_VMX_MSR
; ++i
) {
1581 u32 index
= vmx_msr_index
[i
];
1582 u32 data_low
, data_high
;
1586 if (rdmsr_safe(index
, &data_low
, &data_high
) < 0)
1588 if (wrmsr_safe(index
, data_low
, data_high
) < 0)
1590 data
= data_low
| ((u64
)data_high
<< 32);
1591 vmx
->host_msrs
[j
].index
= index
;
1592 vmx
->host_msrs
[j
].reserved
= 0;
1593 vmx
->host_msrs
[j
].data
= data
;
1594 vmx
->guest_msrs
[j
] = vmx
->host_msrs
[j
];
1598 vmcs_write32(VM_EXIT_CONTROLS
, vmcs_config
.vmexit_ctrl
);
1600 /* 22.2.1, 20.8.1 */
1601 vmcs_write32(VM_ENTRY_CONTROLS
, vmcs_config
.vmentry_ctrl
);
1603 vmcs_writel(CR0_GUEST_HOST_MASK
, ~0UL);
1604 vmcs_writel(CR4_GUEST_HOST_MASK
, KVM_GUEST_CR4_MASK
);
1610 static int vmx_vcpu_reset(struct kvm_vcpu
*vcpu
)
1612 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
1616 if (!init_rmode_tss(vmx
->vcpu
.kvm
)) {
1621 vmx
->vcpu
.arch
.rmode
.active
= 0;
1623 vmx
->vcpu
.arch
.regs
[VCPU_REGS_RDX
] = get_rdx_init_val();
1624 set_cr8(&vmx
->vcpu
, 0);
1625 msr
= 0xfee00000 | MSR_IA32_APICBASE_ENABLE
;
1626 if (vmx
->vcpu
.vcpu_id
== 0)
1627 msr
|= MSR_IA32_APICBASE_BSP
;
1628 kvm_set_apic_base(&vmx
->vcpu
, msr
);
1630 fx_init(&vmx
->vcpu
);
1633 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1634 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh.
1636 if (vmx
->vcpu
.vcpu_id
== 0) {
1637 vmcs_write16(GUEST_CS_SELECTOR
, 0xf000);
1638 vmcs_writel(GUEST_CS_BASE
, 0x000f0000);
1640 vmcs_write16(GUEST_CS_SELECTOR
, vmx
->vcpu
.arch
.sipi_vector
<< 8);
1641 vmcs_writel(GUEST_CS_BASE
, vmx
->vcpu
.arch
.sipi_vector
<< 12);
1643 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
1644 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
1646 seg_setup(VCPU_SREG_DS
);
1647 seg_setup(VCPU_SREG_ES
);
1648 seg_setup(VCPU_SREG_FS
);
1649 seg_setup(VCPU_SREG_GS
);
1650 seg_setup(VCPU_SREG_SS
);
1652 vmcs_write16(GUEST_TR_SELECTOR
, 0);
1653 vmcs_writel(GUEST_TR_BASE
, 0);
1654 vmcs_write32(GUEST_TR_LIMIT
, 0xffff);
1655 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
1657 vmcs_write16(GUEST_LDTR_SELECTOR
, 0);
1658 vmcs_writel(GUEST_LDTR_BASE
, 0);
1659 vmcs_write32(GUEST_LDTR_LIMIT
, 0xffff);
1660 vmcs_write32(GUEST_LDTR_AR_BYTES
, 0x00082);
1662 vmcs_write32(GUEST_SYSENTER_CS
, 0);
1663 vmcs_writel(GUEST_SYSENTER_ESP
, 0);
1664 vmcs_writel(GUEST_SYSENTER_EIP
, 0);
1666 vmcs_writel(GUEST_RFLAGS
, 0x02);
1667 if (vmx
->vcpu
.vcpu_id
== 0)
1668 vmcs_writel(GUEST_RIP
, 0xfff0);
1670 vmcs_writel(GUEST_RIP
, 0);
1671 vmcs_writel(GUEST_RSP
, 0);
1673 /* todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0 */
1674 vmcs_writel(GUEST_DR7
, 0x400);
1676 vmcs_writel(GUEST_GDTR_BASE
, 0);
1677 vmcs_write32(GUEST_GDTR_LIMIT
, 0xffff);
1679 vmcs_writel(GUEST_IDTR_BASE
, 0);
1680 vmcs_write32(GUEST_IDTR_LIMIT
, 0xffff);
1682 vmcs_write32(GUEST_ACTIVITY_STATE
, 0);
1683 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
, 0);
1684 vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS
, 0);
1688 /* Special registers */
1689 vmcs_write64(GUEST_IA32_DEBUGCTL
, 0);
1693 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
, 0); /* 22.2.1 */
1695 if (cpu_has_vmx_tpr_shadow()) {
1696 vmcs_write64(VIRTUAL_APIC_PAGE_ADDR
, 0);
1697 if (vm_need_tpr_shadow(vmx
->vcpu
.kvm
))
1698 vmcs_write64(VIRTUAL_APIC_PAGE_ADDR
,
1699 page_to_phys(vmx
->vcpu
.arch
.apic
->regs_page
));
1700 vmcs_write32(TPR_THRESHOLD
, 0);
1703 if (vm_need_virtualize_apic_accesses(vmx
->vcpu
.kvm
))
1704 vmcs_write64(APIC_ACCESS_ADDR
,
1705 page_to_phys(vmx
->vcpu
.kvm
->arch
.apic_access_page
));
1707 vmx
->vcpu
.arch
.cr0
= 0x60000010;
1708 vmx_set_cr0(&vmx
->vcpu
, vmx
->vcpu
.arch
.cr0
); /* enter rmode */
1709 vmx_set_cr4(&vmx
->vcpu
, 0);
1710 #ifdef CONFIG_X86_64
1711 vmx_set_efer(&vmx
->vcpu
, 0);
1713 vmx_fpu_activate(&vmx
->vcpu
);
1714 update_exception_bitmap(&vmx
->vcpu
);
1722 static void vmx_inject_irq(struct kvm_vcpu
*vcpu
, int irq
)
1724 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
1726 if (vcpu
->arch
.rmode
.active
) {
1727 vmx
->rmode
.irq
.pending
= true;
1728 vmx
->rmode
.irq
.vector
= irq
;
1729 vmx
->rmode
.irq
.rip
= vmcs_readl(GUEST_RIP
);
1730 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1731 irq
| INTR_TYPE_SOFT_INTR
| INTR_INFO_VALID_MASK
);
1732 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN
, 1);
1733 vmcs_writel(GUEST_RIP
, vmx
->rmode
.irq
.rip
- 1);
1736 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1737 irq
| INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
1740 static void kvm_do_inject_irq(struct kvm_vcpu
*vcpu
)
1742 int word_index
= __ffs(vcpu
->arch
.irq_summary
);
1743 int bit_index
= __ffs(vcpu
->arch
.irq_pending
[word_index
]);
1744 int irq
= word_index
* BITS_PER_LONG
+ bit_index
;
1746 clear_bit(bit_index
, &vcpu
->arch
.irq_pending
[word_index
]);
1747 if (!vcpu
->arch
.irq_pending
[word_index
])
1748 clear_bit(word_index
, &vcpu
->arch
.irq_summary
);
1749 vmx_inject_irq(vcpu
, irq
);
1753 static void do_interrupt_requests(struct kvm_vcpu
*vcpu
,
1754 struct kvm_run
*kvm_run
)
1756 u32 cpu_based_vm_exec_control
;
1758 vcpu
->arch
.interrupt_window_open
=
1759 ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) &&
1760 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0);
1762 if (vcpu
->arch
.interrupt_window_open
&&
1763 vcpu
->arch
.irq_summary
&&
1764 !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD
) & INTR_INFO_VALID_MASK
))
1766 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1768 kvm_do_inject_irq(vcpu
);
1770 cpu_based_vm_exec_control
= vmcs_read32(CPU_BASED_VM_EXEC_CONTROL
);
1771 if (!vcpu
->arch
.interrupt_window_open
&&
1772 (vcpu
->arch
.irq_summary
|| kvm_run
->request_interrupt_window
))
1774 * Interrupts blocked. Wait for unblock.
1776 cpu_based_vm_exec_control
|= CPU_BASED_VIRTUAL_INTR_PENDING
;
1778 cpu_based_vm_exec_control
&= ~CPU_BASED_VIRTUAL_INTR_PENDING
;
1779 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL
, cpu_based_vm_exec_control
);
1782 static int vmx_set_tss_addr(struct kvm
*kvm
, unsigned int addr
)
1785 struct kvm_userspace_memory_region tss_mem
= {
1787 .guest_phys_addr
= addr
,
1788 .memory_size
= PAGE_SIZE
* 3,
1792 ret
= kvm_set_memory_region(kvm
, &tss_mem
, 0);
1795 kvm
->arch
.tss_addr
= addr
;
1799 static void kvm_guest_debug_pre(struct kvm_vcpu
*vcpu
)
1801 struct kvm_guest_debug
*dbg
= &vcpu
->guest_debug
;
1803 set_debugreg(dbg
->bp
[0], 0);
1804 set_debugreg(dbg
->bp
[1], 1);
1805 set_debugreg(dbg
->bp
[2], 2);
1806 set_debugreg(dbg
->bp
[3], 3);
1808 if (dbg
->singlestep
) {
1809 unsigned long flags
;
1811 flags
= vmcs_readl(GUEST_RFLAGS
);
1812 flags
|= X86_EFLAGS_TF
| X86_EFLAGS_RF
;
1813 vmcs_writel(GUEST_RFLAGS
, flags
);
1817 static int handle_rmode_exception(struct kvm_vcpu
*vcpu
,
1818 int vec
, u32 err_code
)
1820 if (!vcpu
->arch
.rmode
.active
)
1824 * Instruction with address size override prefix opcode 0x67
1825 * Cause the #SS fault with 0 error code in VM86 mode.
1827 if (((vec
== GP_VECTOR
) || (vec
== SS_VECTOR
)) && err_code
== 0)
1828 if (emulate_instruction(vcpu
, NULL
, 0, 0, 0) == EMULATE_DONE
)
1833 static int handle_exception(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1835 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
1836 u32 intr_info
, error_code
;
1837 unsigned long cr2
, rip
;
1839 enum emulation_result er
;
1841 vect_info
= vmx
->idt_vectoring_info
;
1842 intr_info
= vmcs_read32(VM_EXIT_INTR_INFO
);
1844 if ((vect_info
& VECTORING_INFO_VALID_MASK
) &&
1845 !is_page_fault(intr_info
))
1846 printk(KERN_ERR
"%s: unexpected, vectoring info 0x%x "
1847 "intr info 0x%x\n", __FUNCTION__
, vect_info
, intr_info
);
1849 if (!irqchip_in_kernel(vcpu
->kvm
) && is_external_interrupt(vect_info
)) {
1850 int irq
= vect_info
& VECTORING_INFO_VECTOR_MASK
;
1851 set_bit(irq
, vcpu
->arch
.irq_pending
);
1852 set_bit(irq
/ BITS_PER_LONG
, &vcpu
->arch
.irq_summary
);
1855 if ((intr_info
& INTR_INFO_INTR_TYPE_MASK
) == 0x200) /* nmi */
1856 return 1; /* already handled by vmx_vcpu_run() */
1858 if (is_no_device(intr_info
)) {
1859 vmx_fpu_activate(vcpu
);
1863 if (is_invalid_opcode(intr_info
)) {
1864 er
= emulate_instruction(vcpu
, kvm_run
, 0, 0, EMULTYPE_TRAP_UD
);
1865 if (er
!= EMULATE_DONE
)
1866 kvm_queue_exception(vcpu
, UD_VECTOR
);
1871 rip
= vmcs_readl(GUEST_RIP
);
1872 if (intr_info
& INTR_INFO_DELIEVER_CODE_MASK
)
1873 error_code
= vmcs_read32(VM_EXIT_INTR_ERROR_CODE
);
1874 if (is_page_fault(intr_info
)) {
1875 cr2
= vmcs_readl(EXIT_QUALIFICATION
);
1876 return kvm_mmu_page_fault(vcpu
, cr2
, error_code
);
1879 if (vcpu
->arch
.rmode
.active
&&
1880 handle_rmode_exception(vcpu
, intr_info
& INTR_INFO_VECTOR_MASK
,
1882 if (vcpu
->arch
.halt_request
) {
1883 vcpu
->arch
.halt_request
= 0;
1884 return kvm_emulate_halt(vcpu
);
1889 if ((intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
)) ==
1890 (INTR_TYPE_EXCEPTION
| 1)) {
1891 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
1894 kvm_run
->exit_reason
= KVM_EXIT_EXCEPTION
;
1895 kvm_run
->ex
.exception
= intr_info
& INTR_INFO_VECTOR_MASK
;
1896 kvm_run
->ex
.error_code
= error_code
;
1900 static int handle_external_interrupt(struct kvm_vcpu
*vcpu
,
1901 struct kvm_run
*kvm_run
)
1903 ++vcpu
->stat
.irq_exits
;
1907 static int handle_triple_fault(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1909 kvm_run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
1913 static int handle_io(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1915 unsigned long exit_qualification
;
1916 int size
, down
, in
, string
, rep
;
1919 ++vcpu
->stat
.io_exits
;
1920 exit_qualification
= vmcs_readl(EXIT_QUALIFICATION
);
1921 string
= (exit_qualification
& 16) != 0;
1924 if (emulate_instruction(vcpu
,
1925 kvm_run
, 0, 0, 0) == EMULATE_DO_MMIO
)
1930 size
= (exit_qualification
& 7) + 1;
1931 in
= (exit_qualification
& 8) != 0;
1932 down
= (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_DF
) != 0;
1933 rep
= (exit_qualification
& 32) != 0;
1934 port
= exit_qualification
>> 16;
1936 return kvm_emulate_pio(vcpu
, kvm_run
, in
, size
, port
);
1940 vmx_patch_hypercall(struct kvm_vcpu
*vcpu
, unsigned char *hypercall
)
1943 * Patch in the VMCALL instruction:
1945 hypercall
[0] = 0x0f;
1946 hypercall
[1] = 0x01;
1947 hypercall
[2] = 0xc1;
1950 static int handle_cr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1952 unsigned long exit_qualification
;
1956 exit_qualification
= vmcs_readl(EXIT_QUALIFICATION
);
1957 cr
= exit_qualification
& 15;
1958 reg
= (exit_qualification
>> 8) & 15;
1959 switch ((exit_qualification
>> 4) & 3) {
1960 case 0: /* mov to cr */
1963 vcpu_load_rsp_rip(vcpu
);
1964 set_cr0(vcpu
, vcpu
->arch
.regs
[reg
]);
1965 skip_emulated_instruction(vcpu
);
1968 vcpu_load_rsp_rip(vcpu
);
1969 set_cr3(vcpu
, vcpu
->arch
.regs
[reg
]);
1970 skip_emulated_instruction(vcpu
);
1973 vcpu_load_rsp_rip(vcpu
);
1974 set_cr4(vcpu
, vcpu
->arch
.regs
[reg
]);
1975 skip_emulated_instruction(vcpu
);
1978 vcpu_load_rsp_rip(vcpu
);
1979 set_cr8(vcpu
, vcpu
->arch
.regs
[reg
]);
1980 skip_emulated_instruction(vcpu
);
1981 if (irqchip_in_kernel(vcpu
->kvm
))
1983 kvm_run
->exit_reason
= KVM_EXIT_SET_TPR
;
1988 vcpu_load_rsp_rip(vcpu
);
1989 vmx_fpu_deactivate(vcpu
);
1990 vcpu
->arch
.cr0
&= ~X86_CR0_TS
;
1991 vmcs_writel(CR0_READ_SHADOW
, vcpu
->arch
.cr0
);
1992 vmx_fpu_activate(vcpu
);
1993 skip_emulated_instruction(vcpu
);
1995 case 1: /*mov from cr*/
1998 vcpu_load_rsp_rip(vcpu
);
1999 vcpu
->arch
.regs
[reg
] = vcpu
->arch
.cr3
;
2000 vcpu_put_rsp_rip(vcpu
);
2001 skip_emulated_instruction(vcpu
);
2004 vcpu_load_rsp_rip(vcpu
);
2005 vcpu
->arch
.regs
[reg
] = get_cr8(vcpu
);
2006 vcpu_put_rsp_rip(vcpu
);
2007 skip_emulated_instruction(vcpu
);
2012 lmsw(vcpu
, (exit_qualification
>> LMSW_SOURCE_DATA_SHIFT
) & 0x0f);
2014 skip_emulated_instruction(vcpu
);
2019 kvm_run
->exit_reason
= 0;
2020 pr_unimpl(vcpu
, "unhandled control register: op %d cr %d\n",
2021 (int)(exit_qualification
>> 4) & 3, cr
);
2025 static int handle_dr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2027 unsigned long exit_qualification
;
2032 * FIXME: this code assumes the host is debugging the guest.
2033 * need to deal with guest debugging itself too.
2035 exit_qualification
= vmcs_readl(EXIT_QUALIFICATION
);
2036 dr
= exit_qualification
& 7;
2037 reg
= (exit_qualification
>> 8) & 15;
2038 vcpu_load_rsp_rip(vcpu
);
2039 if (exit_qualification
& 16) {
2051 vcpu
->arch
.regs
[reg
] = val
;
2055 vcpu_put_rsp_rip(vcpu
);
2056 skip_emulated_instruction(vcpu
);
2060 static int handle_cpuid(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2062 kvm_emulate_cpuid(vcpu
);
2066 static int handle_rdmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2068 u32 ecx
= vcpu
->arch
.regs
[VCPU_REGS_RCX
];
2071 if (vmx_get_msr(vcpu
, ecx
, &data
)) {
2072 kvm_inject_gp(vcpu
, 0);
2076 /* FIXME: handling of bits 32:63 of rax, rdx */
2077 vcpu
->arch
.regs
[VCPU_REGS_RAX
] = data
& -1u;
2078 vcpu
->arch
.regs
[VCPU_REGS_RDX
] = (data
>> 32) & -1u;
2079 skip_emulated_instruction(vcpu
);
2083 static int handle_wrmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2085 u32 ecx
= vcpu
->arch
.regs
[VCPU_REGS_RCX
];
2086 u64 data
= (vcpu
->arch
.regs
[VCPU_REGS_RAX
] & -1u)
2087 | ((u64
)(vcpu
->arch
.regs
[VCPU_REGS_RDX
] & -1u) << 32);
2089 if (vmx_set_msr(vcpu
, ecx
, data
) != 0) {
2090 kvm_inject_gp(vcpu
, 0);
2094 skip_emulated_instruction(vcpu
);
2098 static int handle_tpr_below_threshold(struct kvm_vcpu
*vcpu
,
2099 struct kvm_run
*kvm_run
)
2104 static int handle_interrupt_window(struct kvm_vcpu
*vcpu
,
2105 struct kvm_run
*kvm_run
)
2107 u32 cpu_based_vm_exec_control
;
2109 /* clear pending irq */
2110 cpu_based_vm_exec_control
= vmcs_read32(CPU_BASED_VM_EXEC_CONTROL
);
2111 cpu_based_vm_exec_control
&= ~CPU_BASED_VIRTUAL_INTR_PENDING
;
2112 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL
, cpu_based_vm_exec_control
);
2114 * If the user space waits to inject interrupts, exit as soon as
2117 if (kvm_run
->request_interrupt_window
&&
2118 !vcpu
->arch
.irq_summary
) {
2119 kvm_run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
2120 ++vcpu
->stat
.irq_window_exits
;
2126 static int handle_halt(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2128 skip_emulated_instruction(vcpu
);
2129 return kvm_emulate_halt(vcpu
);
2132 static int handle_vmcall(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2134 skip_emulated_instruction(vcpu
);
2135 kvm_emulate_hypercall(vcpu
);
2139 static int handle_wbinvd(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2141 skip_emulated_instruction(vcpu
);
2142 /* TODO: Add support for VT-d/pass-through device */
2146 static int handle_apic_access(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2148 u64 exit_qualification
;
2149 enum emulation_result er
;
2150 unsigned long offset
;
2152 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
2153 offset
= exit_qualification
& 0xffful
;
2155 er
= emulate_instruction(vcpu
, kvm_run
, 0, 0, 0);
2157 if (er
!= EMULATE_DONE
) {
2159 "Fail to handle apic access vmexit! Offset is 0x%lx\n",
2167 * The exit handlers return 1 if the exit was handled fully and guest execution
2168 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
2169 * to be done to userspace and return 0.
2171 static int (*kvm_vmx_exit_handlers
[])(struct kvm_vcpu
*vcpu
,
2172 struct kvm_run
*kvm_run
) = {
2173 [EXIT_REASON_EXCEPTION_NMI
] = handle_exception
,
2174 [EXIT_REASON_EXTERNAL_INTERRUPT
] = handle_external_interrupt
,
2175 [EXIT_REASON_TRIPLE_FAULT
] = handle_triple_fault
,
2176 [EXIT_REASON_IO_INSTRUCTION
] = handle_io
,
2177 [EXIT_REASON_CR_ACCESS
] = handle_cr
,
2178 [EXIT_REASON_DR_ACCESS
] = handle_dr
,
2179 [EXIT_REASON_CPUID
] = handle_cpuid
,
2180 [EXIT_REASON_MSR_READ
] = handle_rdmsr
,
2181 [EXIT_REASON_MSR_WRITE
] = handle_wrmsr
,
2182 [EXIT_REASON_PENDING_INTERRUPT
] = handle_interrupt_window
,
2183 [EXIT_REASON_HLT
] = handle_halt
,
2184 [EXIT_REASON_VMCALL
] = handle_vmcall
,
2185 [EXIT_REASON_TPR_BELOW_THRESHOLD
] = handle_tpr_below_threshold
,
2186 [EXIT_REASON_APIC_ACCESS
] = handle_apic_access
,
2187 [EXIT_REASON_WBINVD
] = handle_wbinvd
,
2190 static const int kvm_vmx_max_exit_handlers
=
2191 ARRAY_SIZE(kvm_vmx_exit_handlers
);
2194 * The guest has exited. See if we can fix it or if we need userspace
2197 static int kvm_handle_exit(struct kvm_run
*kvm_run
, struct kvm_vcpu
*vcpu
)
2199 u32 exit_reason
= vmcs_read32(VM_EXIT_REASON
);
2200 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
2201 u32 vectoring_info
= vmx
->idt_vectoring_info
;
2203 if (unlikely(vmx
->fail
)) {
2204 kvm_run
->exit_reason
= KVM_EXIT_FAIL_ENTRY
;
2205 kvm_run
->fail_entry
.hardware_entry_failure_reason
2206 = vmcs_read32(VM_INSTRUCTION_ERROR
);
2210 if ((vectoring_info
& VECTORING_INFO_VALID_MASK
) &&
2211 exit_reason
!= EXIT_REASON_EXCEPTION_NMI
)
2212 printk(KERN_WARNING
"%s: unexpected, valid vectoring info and "
2213 "exit reason is 0x%x\n", __FUNCTION__
, exit_reason
);
2214 if (exit_reason
< kvm_vmx_max_exit_handlers
2215 && kvm_vmx_exit_handlers
[exit_reason
])
2216 return kvm_vmx_exit_handlers
[exit_reason
](vcpu
, kvm_run
);
2218 kvm_run
->exit_reason
= KVM_EXIT_UNKNOWN
;
2219 kvm_run
->hw
.hardware_exit_reason
= exit_reason
;
2224 static void vmx_flush_tlb(struct kvm_vcpu
*vcpu
)
2228 static void update_tpr_threshold(struct kvm_vcpu
*vcpu
)
2232 if (!vm_need_tpr_shadow(vcpu
->kvm
))
2235 if (!kvm_lapic_enabled(vcpu
) ||
2236 ((max_irr
= kvm_lapic_find_highest_irr(vcpu
)) == -1)) {
2237 vmcs_write32(TPR_THRESHOLD
, 0);
2241 tpr
= (kvm_lapic_get_cr8(vcpu
) & 0x0f) << 4;
2242 vmcs_write32(TPR_THRESHOLD
, (max_irr
> tpr
) ? tpr
>> 4 : max_irr
>> 4);
2245 static void enable_irq_window(struct kvm_vcpu
*vcpu
)
2247 u32 cpu_based_vm_exec_control
;
2249 cpu_based_vm_exec_control
= vmcs_read32(CPU_BASED_VM_EXEC_CONTROL
);
2250 cpu_based_vm_exec_control
|= CPU_BASED_VIRTUAL_INTR_PENDING
;
2251 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL
, cpu_based_vm_exec_control
);
2254 static void vmx_intr_assist(struct kvm_vcpu
*vcpu
)
2256 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
2257 u32 idtv_info_field
, intr_info_field
;
2258 int has_ext_irq
, interrupt_window_open
;
2261 update_tpr_threshold(vcpu
);
2263 has_ext_irq
= kvm_cpu_has_interrupt(vcpu
);
2264 intr_info_field
= vmcs_read32(VM_ENTRY_INTR_INFO_FIELD
);
2265 idtv_info_field
= vmx
->idt_vectoring_info
;
2266 if (intr_info_field
& INTR_INFO_VALID_MASK
) {
2267 if (idtv_info_field
& INTR_INFO_VALID_MASK
) {
2268 /* TODO: fault when IDT_Vectoring */
2269 if (printk_ratelimit())
2270 printk(KERN_ERR
"Fault when IDT_Vectoring\n");
2273 enable_irq_window(vcpu
);
2276 if (unlikely(idtv_info_field
& INTR_INFO_VALID_MASK
)) {
2277 if ((idtv_info_field
& VECTORING_INFO_TYPE_MASK
)
2278 == INTR_TYPE_EXT_INTR
2279 && vcpu
->arch
.rmode
.active
) {
2280 u8 vect
= idtv_info_field
& VECTORING_INFO_VECTOR_MASK
;
2282 vmx_inject_irq(vcpu
, vect
);
2283 if (unlikely(has_ext_irq
))
2284 enable_irq_window(vcpu
);
2288 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
, idtv_info_field
);
2289 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN
,
2290 vmcs_read32(VM_EXIT_INSTRUCTION_LEN
));
2292 if (unlikely(idtv_info_field
& INTR_INFO_DELIEVER_CODE_MASK
))
2293 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
,
2294 vmcs_read32(IDT_VECTORING_ERROR_CODE
));
2295 if (unlikely(has_ext_irq
))
2296 enable_irq_window(vcpu
);
2301 interrupt_window_open
=
2302 ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) &&
2303 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0);
2304 if (interrupt_window_open
) {
2305 vector
= kvm_cpu_get_interrupt(vcpu
);
2306 vmx_inject_irq(vcpu
, vector
);
2307 kvm_timer_intr_post(vcpu
, vector
);
2309 enable_irq_window(vcpu
);
2313 * Failure to inject an interrupt should give us the information
2314 * in IDT_VECTORING_INFO_FIELD. However, if the failure occurs
2315 * when fetching the interrupt redirection bitmap in the real-mode
2316 * tss, this doesn't happen. So we do it ourselves.
2318 static void fixup_rmode_irq(struct vcpu_vmx
*vmx
)
2320 vmx
->rmode
.irq
.pending
= 0;
2321 if (vmcs_readl(GUEST_RIP
) + 1 != vmx
->rmode
.irq
.rip
)
2323 vmcs_writel(GUEST_RIP
, vmx
->rmode
.irq
.rip
);
2324 if (vmx
->idt_vectoring_info
& VECTORING_INFO_VALID_MASK
) {
2325 vmx
->idt_vectoring_info
&= ~VECTORING_INFO_TYPE_MASK
;
2326 vmx
->idt_vectoring_info
|= INTR_TYPE_EXT_INTR
;
2329 vmx
->idt_vectoring_info
=
2330 VECTORING_INFO_VALID_MASK
2331 | INTR_TYPE_EXT_INTR
2332 | vmx
->rmode
.irq
.vector
;
2335 static void vmx_vcpu_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2337 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
2341 * Loading guest fpu may have cleared host cr0.ts
2343 vmcs_writel(HOST_CR0
, read_cr0());
2346 /* Store host registers */
2347 #ifdef CONFIG_X86_64
2348 "push %%rdx; push %%rbp;"
2351 "push %%edx; push %%ebp;"
2354 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
2355 /* Check if vmlaunch of vmresume is needed */
2356 "cmpl $0, %c[launched](%0) \n\t"
2357 /* Load guest registers. Don't clobber flags. */
2358 #ifdef CONFIG_X86_64
2359 "mov %c[cr2](%0), %%rax \n\t"
2360 "mov %%rax, %%cr2 \n\t"
2361 "mov %c[rax](%0), %%rax \n\t"
2362 "mov %c[rbx](%0), %%rbx \n\t"
2363 "mov %c[rdx](%0), %%rdx \n\t"
2364 "mov %c[rsi](%0), %%rsi \n\t"
2365 "mov %c[rdi](%0), %%rdi \n\t"
2366 "mov %c[rbp](%0), %%rbp \n\t"
2367 "mov %c[r8](%0), %%r8 \n\t"
2368 "mov %c[r9](%0), %%r9 \n\t"
2369 "mov %c[r10](%0), %%r10 \n\t"
2370 "mov %c[r11](%0), %%r11 \n\t"
2371 "mov %c[r12](%0), %%r12 \n\t"
2372 "mov %c[r13](%0), %%r13 \n\t"
2373 "mov %c[r14](%0), %%r14 \n\t"
2374 "mov %c[r15](%0), %%r15 \n\t"
2375 "mov %c[rcx](%0), %%rcx \n\t" /* kills %0 (rcx) */
2377 "mov %c[cr2](%0), %%eax \n\t"
2378 "mov %%eax, %%cr2 \n\t"
2379 "mov %c[rax](%0), %%eax \n\t"
2380 "mov %c[rbx](%0), %%ebx \n\t"
2381 "mov %c[rdx](%0), %%edx \n\t"
2382 "mov %c[rsi](%0), %%esi \n\t"
2383 "mov %c[rdi](%0), %%edi \n\t"
2384 "mov %c[rbp](%0), %%ebp \n\t"
2385 "mov %c[rcx](%0), %%ecx \n\t" /* kills %0 (ecx) */
2387 /* Enter guest mode */
2388 "jne .Llaunched \n\t"
2389 ASM_VMX_VMLAUNCH
"\n\t"
2390 "jmp .Lkvm_vmx_return \n\t"
2391 ".Llaunched: " ASM_VMX_VMRESUME
"\n\t"
2392 ".Lkvm_vmx_return: "
2393 /* Save guest registers, load host registers, keep flags */
2394 #ifdef CONFIG_X86_64
2395 "xchg %0, (%%rsp) \n\t"
2396 "mov %%rax, %c[rax](%0) \n\t"
2397 "mov %%rbx, %c[rbx](%0) \n\t"
2398 "pushq (%%rsp); popq %c[rcx](%0) \n\t"
2399 "mov %%rdx, %c[rdx](%0) \n\t"
2400 "mov %%rsi, %c[rsi](%0) \n\t"
2401 "mov %%rdi, %c[rdi](%0) \n\t"
2402 "mov %%rbp, %c[rbp](%0) \n\t"
2403 "mov %%r8, %c[r8](%0) \n\t"
2404 "mov %%r9, %c[r9](%0) \n\t"
2405 "mov %%r10, %c[r10](%0) \n\t"
2406 "mov %%r11, %c[r11](%0) \n\t"
2407 "mov %%r12, %c[r12](%0) \n\t"
2408 "mov %%r13, %c[r13](%0) \n\t"
2409 "mov %%r14, %c[r14](%0) \n\t"
2410 "mov %%r15, %c[r15](%0) \n\t"
2411 "mov %%cr2, %%rax \n\t"
2412 "mov %%rax, %c[cr2](%0) \n\t"
2414 "pop %%rbp; pop %%rbp; pop %%rdx \n\t"
2416 "xchg %0, (%%esp) \n\t"
2417 "mov %%eax, %c[rax](%0) \n\t"
2418 "mov %%ebx, %c[rbx](%0) \n\t"
2419 "pushl (%%esp); popl %c[rcx](%0) \n\t"
2420 "mov %%edx, %c[rdx](%0) \n\t"
2421 "mov %%esi, %c[rsi](%0) \n\t"
2422 "mov %%edi, %c[rdi](%0) \n\t"
2423 "mov %%ebp, %c[rbp](%0) \n\t"
2424 "mov %%cr2, %%eax \n\t"
2425 "mov %%eax, %c[cr2](%0) \n\t"
2427 "pop %%ebp; pop %%ebp; pop %%edx \n\t"
2429 "setbe %c[fail](%0) \n\t"
2430 : : "c"(vmx
), "d"((unsigned long)HOST_RSP
),
2431 [launched
]"i"(offsetof(struct vcpu_vmx
, launched
)),
2432 [fail
]"i"(offsetof(struct vcpu_vmx
, fail
)),
2433 [rax
]"i"(offsetof(struct vcpu_vmx
, vcpu
.arch
.regs
[VCPU_REGS_RAX
])),
2434 [rbx
]"i"(offsetof(struct vcpu_vmx
, vcpu
.arch
.regs
[VCPU_REGS_RBX
])),
2435 [rcx
]"i"(offsetof(struct vcpu_vmx
, vcpu
.arch
.regs
[VCPU_REGS_RCX
])),
2436 [rdx
]"i"(offsetof(struct vcpu_vmx
, vcpu
.arch
.regs
[VCPU_REGS_RDX
])),
2437 [rsi
]"i"(offsetof(struct vcpu_vmx
, vcpu
.arch
.regs
[VCPU_REGS_RSI
])),
2438 [rdi
]"i"(offsetof(struct vcpu_vmx
, vcpu
.arch
.regs
[VCPU_REGS_RDI
])),
2439 [rbp
]"i"(offsetof(struct vcpu_vmx
, vcpu
.arch
.regs
[VCPU_REGS_RBP
])),
2440 #ifdef CONFIG_X86_64
2441 [r8
]"i"(offsetof(struct vcpu_vmx
, vcpu
.arch
.regs
[VCPU_REGS_R8
])),
2442 [r9
]"i"(offsetof(struct vcpu_vmx
, vcpu
.arch
.regs
[VCPU_REGS_R9
])),
2443 [r10
]"i"(offsetof(struct vcpu_vmx
, vcpu
.arch
.regs
[VCPU_REGS_R10
])),
2444 [r11
]"i"(offsetof(struct vcpu_vmx
, vcpu
.arch
.regs
[VCPU_REGS_R11
])),
2445 [r12
]"i"(offsetof(struct vcpu_vmx
, vcpu
.arch
.regs
[VCPU_REGS_R12
])),
2446 [r13
]"i"(offsetof(struct vcpu_vmx
, vcpu
.arch
.regs
[VCPU_REGS_R13
])),
2447 [r14
]"i"(offsetof(struct vcpu_vmx
, vcpu
.arch
.regs
[VCPU_REGS_R14
])),
2448 [r15
]"i"(offsetof(struct vcpu_vmx
, vcpu
.arch
.regs
[VCPU_REGS_R15
])),
2450 [cr2
]"i"(offsetof(struct vcpu_vmx
, vcpu
.arch
.cr2
))
2452 #ifdef CONFIG_X86_64
2453 , "rbx", "rdi", "rsi"
2454 , "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2456 , "ebx", "edi", "rsi"
2460 vmx
->idt_vectoring_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
2461 if (vmx
->rmode
.irq
.pending
)
2462 fixup_rmode_irq(vmx
);
2464 vcpu
->arch
.interrupt_window_open
=
2465 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0;
2467 asm("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS
));
2470 intr_info
= vmcs_read32(VM_EXIT_INTR_INFO
);
2472 /* We need to handle NMIs before interrupts are enabled */
2473 if ((intr_info
& INTR_INFO_INTR_TYPE_MASK
) == 0x200) /* nmi */
2477 static void vmx_free_vmcs(struct kvm_vcpu
*vcpu
)
2479 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
2482 on_each_cpu(__vcpu_clear
, vmx
, 0, 1);
2483 free_vmcs(vmx
->vmcs
);
2488 static void vmx_free_vcpu(struct kvm_vcpu
*vcpu
)
2490 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
2492 vmx_free_vmcs(vcpu
);
2493 kfree(vmx
->host_msrs
);
2494 kfree(vmx
->guest_msrs
);
2495 kvm_vcpu_uninit(vcpu
);
2496 kmem_cache_free(kvm_vcpu_cache
, vmx
);
2499 static struct kvm_vcpu
*vmx_create_vcpu(struct kvm
*kvm
, unsigned int id
)
2502 struct vcpu_vmx
*vmx
= kmem_cache_zalloc(kvm_vcpu_cache
, GFP_KERNEL
);
2506 return ERR_PTR(-ENOMEM
);
2508 err
= kvm_vcpu_init(&vmx
->vcpu
, kvm
, id
);
2512 vmx
->guest_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
2513 if (!vmx
->guest_msrs
) {
2518 vmx
->host_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
2519 if (!vmx
->host_msrs
)
2520 goto free_guest_msrs
;
2522 vmx
->vmcs
= alloc_vmcs();
2526 vmcs_clear(vmx
->vmcs
);
2529 vmx_vcpu_load(&vmx
->vcpu
, cpu
);
2530 err
= vmx_vcpu_setup(vmx
);
2531 vmx_vcpu_put(&vmx
->vcpu
);
2535 if (vm_need_virtualize_apic_accesses(kvm
))
2536 if (alloc_apic_access_page(kvm
) != 0)
2542 free_vmcs(vmx
->vmcs
);
2544 kfree(vmx
->host_msrs
);
2546 kfree(vmx
->guest_msrs
);
2548 kvm_vcpu_uninit(&vmx
->vcpu
);
2550 kmem_cache_free(kvm_vcpu_cache
, vmx
);
2551 return ERR_PTR(err
);
2554 static void __init
vmx_check_processor_compat(void *rtn
)
2556 struct vmcs_config vmcs_conf
;
2559 if (setup_vmcs_config(&vmcs_conf
) < 0)
2561 if (memcmp(&vmcs_config
, &vmcs_conf
, sizeof(struct vmcs_config
)) != 0) {
2562 printk(KERN_ERR
"kvm: CPU %d feature inconsistency!\n",
2563 smp_processor_id());
2568 static struct kvm_x86_ops vmx_x86_ops
= {
2569 .cpu_has_kvm_support
= cpu_has_kvm_support
,
2570 .disabled_by_bios
= vmx_disabled_by_bios
,
2571 .hardware_setup
= hardware_setup
,
2572 .hardware_unsetup
= hardware_unsetup
,
2573 .check_processor_compatibility
= vmx_check_processor_compat
,
2574 .hardware_enable
= hardware_enable
,
2575 .hardware_disable
= hardware_disable
,
2576 .cpu_has_accelerated_tpr
= cpu_has_vmx_virtualize_apic_accesses
,
2578 .vcpu_create
= vmx_create_vcpu
,
2579 .vcpu_free
= vmx_free_vcpu
,
2580 .vcpu_reset
= vmx_vcpu_reset
,
2582 .prepare_guest_switch
= vmx_save_host_state
,
2583 .vcpu_load
= vmx_vcpu_load
,
2584 .vcpu_put
= vmx_vcpu_put
,
2585 .vcpu_decache
= vmx_vcpu_decache
,
2587 .set_guest_debug
= set_guest_debug
,
2588 .guest_debug_pre
= kvm_guest_debug_pre
,
2589 .get_msr
= vmx_get_msr
,
2590 .set_msr
= vmx_set_msr
,
2591 .get_segment_base
= vmx_get_segment_base
,
2592 .get_segment
= vmx_get_segment
,
2593 .set_segment
= vmx_set_segment
,
2594 .get_cs_db_l_bits
= vmx_get_cs_db_l_bits
,
2595 .decache_cr4_guest_bits
= vmx_decache_cr4_guest_bits
,
2596 .set_cr0
= vmx_set_cr0
,
2597 .set_cr3
= vmx_set_cr3
,
2598 .set_cr4
= vmx_set_cr4
,
2599 #ifdef CONFIG_X86_64
2600 .set_efer
= vmx_set_efer
,
2602 .get_idt
= vmx_get_idt
,
2603 .set_idt
= vmx_set_idt
,
2604 .get_gdt
= vmx_get_gdt
,
2605 .set_gdt
= vmx_set_gdt
,
2606 .cache_regs
= vcpu_load_rsp_rip
,
2607 .decache_regs
= vcpu_put_rsp_rip
,
2608 .get_rflags
= vmx_get_rflags
,
2609 .set_rflags
= vmx_set_rflags
,
2611 .tlb_flush
= vmx_flush_tlb
,
2613 .run
= vmx_vcpu_run
,
2614 .handle_exit
= kvm_handle_exit
,
2615 .skip_emulated_instruction
= skip_emulated_instruction
,
2616 .patch_hypercall
= vmx_patch_hypercall
,
2617 .get_irq
= vmx_get_irq
,
2618 .set_irq
= vmx_inject_irq
,
2619 .queue_exception
= vmx_queue_exception
,
2620 .exception_injected
= vmx_exception_injected
,
2621 .inject_pending_irq
= vmx_intr_assist
,
2622 .inject_pending_vectors
= do_interrupt_requests
,
2624 .set_tss_addr
= vmx_set_tss_addr
,
2627 static int __init
vmx_init(void)
2632 vmx_io_bitmap_a
= alloc_page(GFP_KERNEL
| __GFP_HIGHMEM
);
2633 if (!vmx_io_bitmap_a
)
2636 vmx_io_bitmap_b
= alloc_page(GFP_KERNEL
| __GFP_HIGHMEM
);
2637 if (!vmx_io_bitmap_b
) {
2643 * Allow direct access to the PC debug port (it is often used for I/O
2644 * delays, but the vmexits simply slow things down).
2646 iova
= kmap(vmx_io_bitmap_a
);
2647 memset(iova
, 0xff, PAGE_SIZE
);
2648 clear_bit(0x80, iova
);
2649 kunmap(vmx_io_bitmap_a
);
2651 iova
= kmap(vmx_io_bitmap_b
);
2652 memset(iova
, 0xff, PAGE_SIZE
);
2653 kunmap(vmx_io_bitmap_b
);
2655 r
= kvm_init(&vmx_x86_ops
, sizeof(struct vcpu_vmx
), THIS_MODULE
);
2659 if (bypass_guest_pf
)
2660 kvm_mmu_set_nonpresent_ptes(~0xffeull
, 0ull);
2665 __free_page(vmx_io_bitmap_b
);
2667 __free_page(vmx_io_bitmap_a
);
2671 static void __exit
vmx_exit(void)
2673 __free_page(vmx_io_bitmap_b
);
2674 __free_page(vmx_io_bitmap_a
);
2679 module_init(vmx_init
)
2680 module_exit(vmx_exit
)