2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
31 #include <linux/clocksource.h>
32 #include <linux/interrupt.h>
33 #include <linux/kvm.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/mman.h>
38 #include <linux/highmem.h>
39 #include <linux/iommu.h>
40 #include <linux/intel-iommu.h>
41 #include <linux/cpufreq.h>
42 #include <linux/user-return-notifier.h>
43 #include <linux/srcu.h>
44 #include <linux/slab.h>
45 #include <linux/perf_event.h>
46 #include <linux/uaccess.h>
47 #include <linux/hash.h>
48 #include <linux/pci.h>
49 #include <linux/timekeeper_internal.h>
50 #include <linux/pvclock_gtod.h>
51 #include <trace/events/kvm.h>
53 #define CREATE_TRACE_POINTS
56 #include <asm/debugreg.h>
62 #include <asm/fpu-internal.h> /* Ugh! */
64 #include <asm/pvclock.h>
65 #include <asm/div64.h>
67 #define MAX_IO_MSRS 256
68 #define KVM_MAX_MCE_BANKS 32
69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
71 #define emul_to_vcpu(ctxt) \
72 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
75 * - enable syscall per default because its emulated by KVM
76 * - enable LME and LMA per default on 64 bit KVM
80 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
82 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
88 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
89 static void process_nmi(struct kvm_vcpu
*vcpu
);
91 struct kvm_x86_ops
*kvm_x86_ops
;
92 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
94 static bool ignore_msrs
= 0;
95 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
97 unsigned int min_timer_period_us
= 500;
98 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
100 bool kvm_has_tsc_control
;
101 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
102 u32 kvm_max_guest_tsc_khz
;
103 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
105 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
106 static u32 tsc_tolerance_ppm
= 250;
107 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
109 #define KVM_NR_SHARED_MSRS 16
111 struct kvm_shared_msrs_global
{
113 u32 msrs
[KVM_NR_SHARED_MSRS
];
116 struct kvm_shared_msrs
{
117 struct user_return_notifier urn
;
119 struct kvm_shared_msr_values
{
122 } values
[KVM_NR_SHARED_MSRS
];
125 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
126 static struct kvm_shared_msrs __percpu
*shared_msrs
;
128 struct kvm_stats_debugfs_item debugfs_entries
[] = {
129 { "pf_fixed", VCPU_STAT(pf_fixed
) },
130 { "pf_guest", VCPU_STAT(pf_guest
) },
131 { "tlb_flush", VCPU_STAT(tlb_flush
) },
132 { "invlpg", VCPU_STAT(invlpg
) },
133 { "exits", VCPU_STAT(exits
) },
134 { "io_exits", VCPU_STAT(io_exits
) },
135 { "mmio_exits", VCPU_STAT(mmio_exits
) },
136 { "signal_exits", VCPU_STAT(signal_exits
) },
137 { "irq_window", VCPU_STAT(irq_window_exits
) },
138 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
139 { "halt_exits", VCPU_STAT(halt_exits
) },
140 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
141 { "hypercalls", VCPU_STAT(hypercalls
) },
142 { "request_irq", VCPU_STAT(request_irq_exits
) },
143 { "irq_exits", VCPU_STAT(irq_exits
) },
144 { "host_state_reload", VCPU_STAT(host_state_reload
) },
145 { "efer_reload", VCPU_STAT(efer_reload
) },
146 { "fpu_reload", VCPU_STAT(fpu_reload
) },
147 { "insn_emulation", VCPU_STAT(insn_emulation
) },
148 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
149 { "irq_injections", VCPU_STAT(irq_injections
) },
150 { "nmi_injections", VCPU_STAT(nmi_injections
) },
151 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
152 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
153 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
154 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
155 { "mmu_flooded", VM_STAT(mmu_flooded
) },
156 { "mmu_recycled", VM_STAT(mmu_recycled
) },
157 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
158 { "mmu_unsync", VM_STAT(mmu_unsync
) },
159 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
160 { "largepages", VM_STAT(lpages
) },
164 u64 __read_mostly host_xcr0
;
166 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
168 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
171 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
172 vcpu
->arch
.apf
.gfns
[i
] = ~0;
175 static void kvm_on_user_return(struct user_return_notifier
*urn
)
178 struct kvm_shared_msrs
*locals
179 = container_of(urn
, struct kvm_shared_msrs
, urn
);
180 struct kvm_shared_msr_values
*values
;
182 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
183 values
= &locals
->values
[slot
];
184 if (values
->host
!= values
->curr
) {
185 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
186 values
->curr
= values
->host
;
189 locals
->registered
= false;
190 user_return_notifier_unregister(urn
);
193 static void shared_msr_update(unsigned slot
, u32 msr
)
196 unsigned int cpu
= smp_processor_id();
197 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
199 /* only read, and nobody should modify it at this time,
200 * so don't need lock */
201 if (slot
>= shared_msrs_global
.nr
) {
202 printk(KERN_ERR
"kvm: invalid MSR slot!");
205 rdmsrl_safe(msr
, &value
);
206 smsr
->values
[slot
].host
= value
;
207 smsr
->values
[slot
].curr
= value
;
210 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
212 if (slot
>= shared_msrs_global
.nr
)
213 shared_msrs_global
.nr
= slot
+ 1;
214 shared_msrs_global
.msrs
[slot
] = msr
;
215 /* we need ensured the shared_msr_global have been updated */
218 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
220 static void kvm_shared_msr_cpu_online(void)
224 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
225 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
228 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
230 unsigned int cpu
= smp_processor_id();
231 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
233 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
235 smsr
->values
[slot
].curr
= value
;
236 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
237 if (!smsr
->registered
) {
238 smsr
->urn
.on_user_return
= kvm_on_user_return
;
239 user_return_notifier_register(&smsr
->urn
);
240 smsr
->registered
= true;
243 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
245 static void drop_user_return_notifiers(void *ignore
)
247 unsigned int cpu
= smp_processor_id();
248 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
250 if (smsr
->registered
)
251 kvm_on_user_return(&smsr
->urn
);
254 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
256 return vcpu
->arch
.apic_base
;
258 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
260 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
262 u64 old_state
= vcpu
->arch
.apic_base
&
263 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
264 u64 new_state
= msr_info
->data
&
265 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
266 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
267 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
269 if (!msr_info
->host_initiated
&&
270 ((msr_info
->data
& reserved_bits
) != 0 ||
271 new_state
== X2APIC_ENABLE
||
272 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
273 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
274 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
278 kvm_lapic_set_base(vcpu
, msr_info
->data
);
281 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
283 asmlinkage
void kvm_spurious_fault(void)
285 /* Fault while not rebooting. We want the trace. */
288 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
290 #define EXCPT_BENIGN 0
291 #define EXCPT_CONTRIBUTORY 1
294 static int exception_class(int vector
)
304 return EXCPT_CONTRIBUTORY
;
311 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
312 unsigned nr
, bool has_error
, u32 error_code
,
318 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
320 if (!vcpu
->arch
.exception
.pending
) {
322 vcpu
->arch
.exception
.pending
= true;
323 vcpu
->arch
.exception
.has_error_code
= has_error
;
324 vcpu
->arch
.exception
.nr
= nr
;
325 vcpu
->arch
.exception
.error_code
= error_code
;
326 vcpu
->arch
.exception
.reinject
= reinject
;
330 /* to check exception */
331 prev_nr
= vcpu
->arch
.exception
.nr
;
332 if (prev_nr
== DF_VECTOR
) {
333 /* triple fault -> shutdown */
334 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
337 class1
= exception_class(prev_nr
);
338 class2
= exception_class(nr
);
339 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
340 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
341 /* generate double fault per SDM Table 5-5 */
342 vcpu
->arch
.exception
.pending
= true;
343 vcpu
->arch
.exception
.has_error_code
= true;
344 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
345 vcpu
->arch
.exception
.error_code
= 0;
347 /* replace previous exception with a new one in a hope
348 that instruction re-execution will regenerate lost
353 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
355 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
357 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
359 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
361 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
363 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
365 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
368 kvm_inject_gp(vcpu
, 0);
370 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
372 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
374 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
376 ++vcpu
->stat
.pf_guest
;
377 vcpu
->arch
.cr2
= fault
->address
;
378 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
380 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
382 void kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
384 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
385 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
387 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
390 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
392 atomic_inc(&vcpu
->arch
.nmi_queued
);
393 kvm_make_request(KVM_REQ_NMI
, vcpu
);
395 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
397 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
399 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
401 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
403 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
405 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
407 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
410 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
411 * a #GP and return false.
413 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
415 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
417 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
420 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
423 * This function will be used to read from the physical memory of the currently
424 * running guest. The difference to kvm_read_guest_page is that this function
425 * can read from guest physical or from the guest's guest physical memory.
427 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
428 gfn_t ngfn
, void *data
, int offset
, int len
,
434 ngpa
= gfn_to_gpa(ngfn
);
435 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
);
436 if (real_gfn
== UNMAPPED_GVA
)
439 real_gfn
= gpa_to_gfn(real_gfn
);
441 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
443 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
445 int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
446 void *data
, int offset
, int len
, u32 access
)
448 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
449 data
, offset
, len
, access
);
453 * Load the pae pdptrs. Return true is they are all valid.
455 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
457 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
458 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
461 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
463 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
464 offset
* sizeof(u64
), sizeof(pdpte
),
465 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
470 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
471 if (is_present_gpte(pdpte
[i
]) &&
472 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
479 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
480 __set_bit(VCPU_EXREG_PDPTR
,
481 (unsigned long *)&vcpu
->arch
.regs_avail
);
482 __set_bit(VCPU_EXREG_PDPTR
,
483 (unsigned long *)&vcpu
->arch
.regs_dirty
);
488 EXPORT_SYMBOL_GPL(load_pdptrs
);
490 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
492 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
498 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
501 if (!test_bit(VCPU_EXREG_PDPTR
,
502 (unsigned long *)&vcpu
->arch
.regs_avail
))
505 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
506 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
507 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
508 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
511 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
517 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
519 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
520 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
521 X86_CR0_CD
| X86_CR0_NW
;
526 if (cr0
& 0xffffffff00000000UL
)
530 cr0
&= ~CR0_RESERVED_BITS
;
532 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
535 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
538 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
540 if ((vcpu
->arch
.efer
& EFER_LME
)) {
545 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
550 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
555 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
558 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
560 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
561 kvm_clear_async_pf_completion_queue(vcpu
);
562 kvm_async_pf_hash_reset(vcpu
);
565 if ((cr0
^ old_cr0
) & update_bits
)
566 kvm_mmu_reset_context(vcpu
);
569 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
571 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
573 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
575 EXPORT_SYMBOL_GPL(kvm_lmsw
);
577 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
579 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
580 !vcpu
->guest_xcr0_loaded
) {
581 /* kvm_set_xcr() also depends on this */
582 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
583 vcpu
->guest_xcr0_loaded
= 1;
587 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
589 if (vcpu
->guest_xcr0_loaded
) {
590 if (vcpu
->arch
.xcr0
!= host_xcr0
)
591 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
592 vcpu
->guest_xcr0_loaded
= 0;
596 int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
599 u64 old_xcr0
= vcpu
->arch
.xcr0
;
602 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
603 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
605 if (!(xcr0
& XSTATE_FP
))
607 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
611 * Do not allow the guest to set bits that we do not support
612 * saving. However, xcr0 bit 0 is always set, even if the
613 * emulated CPU does not support XSAVE (see fx_init).
615 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XSTATE_FP
;
616 if (xcr0
& ~valid_bits
)
619 kvm_put_guest_xcr0(vcpu
);
620 vcpu
->arch
.xcr0
= xcr0
;
622 if ((xcr0
^ old_xcr0
) & XSTATE_EXTEND_MASK
)
623 kvm_update_cpuid(vcpu
);
627 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
629 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
630 __kvm_set_xcr(vcpu
, index
, xcr
)) {
631 kvm_inject_gp(vcpu
, 0);
636 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
638 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
640 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
641 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
|
642 X86_CR4_PAE
| X86_CR4_SMEP
;
643 if (cr4
& CR4_RESERVED_BITS
)
646 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
649 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
652 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
655 if (is_long_mode(vcpu
)) {
656 if (!(cr4
& X86_CR4_PAE
))
658 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
659 && ((cr4
^ old_cr4
) & pdptr_bits
)
660 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
664 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
665 if (!guest_cpuid_has_pcid(vcpu
))
668 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
669 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
673 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
676 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
677 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
678 kvm_mmu_reset_context(vcpu
);
680 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
681 kvm_update_cpuid(vcpu
);
685 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
687 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
689 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
690 kvm_mmu_sync_roots(vcpu
);
691 kvm_mmu_flush_tlb(vcpu
);
695 if (is_long_mode(vcpu
)) {
696 if (kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
)) {
697 if (cr3
& CR3_PCID_ENABLED_RESERVED_BITS
)
700 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
704 if (cr3
& CR3_PAE_RESERVED_BITS
)
706 if (is_paging(vcpu
) &&
707 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
711 * We don't check reserved bits in nonpae mode, because
712 * this isn't enforced, and VMware depends on this.
716 vcpu
->arch
.cr3
= cr3
;
717 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
718 kvm_mmu_new_cr3(vcpu
);
721 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
723 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
725 if (cr8
& CR8_RESERVED_BITS
)
727 if (irqchip_in_kernel(vcpu
->kvm
))
728 kvm_lapic_set_tpr(vcpu
, cr8
);
730 vcpu
->arch
.cr8
= cr8
;
733 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
735 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
737 if (irqchip_in_kernel(vcpu
->kvm
))
738 return kvm_lapic_get_cr8(vcpu
);
740 return vcpu
->arch
.cr8
;
742 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
744 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
746 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
747 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
750 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
754 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
755 dr7
= vcpu
->arch
.guest_debug_dr7
;
757 dr7
= vcpu
->arch
.dr7
;
758 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
759 vcpu
->arch
.switch_db_regs
= (dr7
& DR7_BP_EN_MASK
);
762 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
766 vcpu
->arch
.db
[dr
] = val
;
767 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
768 vcpu
->arch
.eff_db
[dr
] = val
;
771 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
775 if (val
& 0xffffffff00000000ULL
)
777 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | DR6_FIXED_1
;
778 kvm_update_dr6(vcpu
);
781 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
785 if (val
& 0xffffffff00000000ULL
)
787 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
788 kvm_update_dr7(vcpu
);
795 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
799 res
= __kvm_set_dr(vcpu
, dr
, val
);
801 kvm_queue_exception(vcpu
, UD_VECTOR
);
803 kvm_inject_gp(vcpu
, 0);
807 EXPORT_SYMBOL_GPL(kvm_set_dr
);
809 static int _kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
813 *val
= vcpu
->arch
.db
[dr
];
816 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
820 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
821 *val
= vcpu
->arch
.dr6
;
823 *val
= kvm_x86_ops
->get_dr6(vcpu
);
826 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
830 *val
= vcpu
->arch
.dr7
;
837 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
839 if (_kvm_get_dr(vcpu
, dr
, val
)) {
840 kvm_queue_exception(vcpu
, UD_VECTOR
);
845 EXPORT_SYMBOL_GPL(kvm_get_dr
);
847 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
849 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
853 err
= kvm_pmu_read_pmc(vcpu
, ecx
, &data
);
856 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
857 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
860 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
863 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
864 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
866 * This list is modified at module load time to reflect the
867 * capabilities of the host cpu. This capabilities test skips MSRs that are
868 * kvm-specific. Those are put in the beginning of the list.
871 #define KVM_SAVE_MSRS_BEGIN 12
872 static u32 msrs_to_save
[] = {
873 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
874 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
875 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
876 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
877 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
879 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
882 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
884 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
885 MSR_IA32_FEATURE_CONTROL
888 static unsigned num_msrs_to_save
;
890 static const u32 emulated_msrs
[] = {
892 MSR_IA32_TSCDEADLINE
,
893 MSR_IA32_MISC_ENABLE
,
898 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
900 if (efer
& efer_reserved_bits
)
903 if (efer
& EFER_FFXSR
) {
904 struct kvm_cpuid_entry2
*feat
;
906 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
907 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
911 if (efer
& EFER_SVME
) {
912 struct kvm_cpuid_entry2
*feat
;
914 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
915 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
921 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
923 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
925 u64 old_efer
= vcpu
->arch
.efer
;
927 if (!kvm_valid_efer(vcpu
, efer
))
931 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
935 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
937 kvm_x86_ops
->set_efer(vcpu
, efer
);
939 /* Update reserved bits */
940 if ((efer
^ old_efer
) & EFER_NX
)
941 kvm_mmu_reset_context(vcpu
);
946 void kvm_enable_efer_bits(u64 mask
)
948 efer_reserved_bits
&= ~mask
;
950 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
954 * Writes msr value into into the appropriate "register".
955 * Returns 0 on success, non-0 otherwise.
956 * Assumes vcpu_load() was already called.
958 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
960 return kvm_x86_ops
->set_msr(vcpu
, msr
);
964 * Adapt set_msr() to msr_io()'s calling convention
966 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
972 msr
.host_initiated
= true;
973 return kvm_set_msr(vcpu
, &msr
);
977 struct pvclock_gtod_data
{
980 struct { /* extract of a clocksource struct */
988 /* open coded 'struct timespec' */
989 u64 monotonic_time_snsec
;
990 time_t monotonic_time_sec
;
993 static struct pvclock_gtod_data pvclock_gtod_data
;
995 static void update_pvclock_gtod(struct timekeeper
*tk
)
997 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
999 write_seqcount_begin(&vdata
->seq
);
1001 /* copy pvclock gtod data */
1002 vdata
->clock
.vclock_mode
= tk
->clock
->archdata
.vclock_mode
;
1003 vdata
->clock
.cycle_last
= tk
->clock
->cycle_last
;
1004 vdata
->clock
.mask
= tk
->clock
->mask
;
1005 vdata
->clock
.mult
= tk
->mult
;
1006 vdata
->clock
.shift
= tk
->shift
;
1008 vdata
->monotonic_time_sec
= tk
->xtime_sec
1009 + tk
->wall_to_monotonic
.tv_sec
;
1010 vdata
->monotonic_time_snsec
= tk
->xtime_nsec
1011 + (tk
->wall_to_monotonic
.tv_nsec
1013 while (vdata
->monotonic_time_snsec
>=
1014 (((u64
)NSEC_PER_SEC
) << tk
->shift
)) {
1015 vdata
->monotonic_time_snsec
-=
1016 ((u64
)NSEC_PER_SEC
) << tk
->shift
;
1017 vdata
->monotonic_time_sec
++;
1020 write_seqcount_end(&vdata
->seq
);
1025 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1029 struct pvclock_wall_clock wc
;
1030 struct timespec boot
;
1035 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1040 ++version
; /* first time write, random junk */
1044 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1047 * The guest calculates current wall clock time by adding
1048 * system time (updated by kvm_guest_time_update below) to the
1049 * wall clock specified here. guest system time equals host
1050 * system time for us, thus we must fill in host boot time here.
1054 if (kvm
->arch
.kvmclock_offset
) {
1055 struct timespec ts
= ns_to_timespec(kvm
->arch
.kvmclock_offset
);
1056 boot
= timespec_sub(boot
, ts
);
1058 wc
.sec
= boot
.tv_sec
;
1059 wc
.nsec
= boot
.tv_nsec
;
1060 wc
.version
= version
;
1062 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1065 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1068 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1070 uint32_t quotient
, remainder
;
1072 /* Don't try to replace with do_div(), this one calculates
1073 * "(dividend << 32) / divisor" */
1075 : "=a" (quotient
), "=d" (remainder
)
1076 : "0" (0), "1" (dividend
), "r" (divisor
) );
1080 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
1081 s8
*pshift
, u32
*pmultiplier
)
1088 tps64
= base_khz
* 1000LL;
1089 scaled64
= scaled_khz
* 1000LL;
1090 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1095 tps32
= (uint32_t)tps64
;
1096 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1097 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1105 *pmultiplier
= div_frac(scaled64
, tps32
);
1107 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1108 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
1111 static inline u64
get_kernel_ns(void)
1115 WARN_ON(preemptible());
1117 monotonic_to_bootbased(&ts
);
1118 return timespec_to_ns(&ts
);
1121 #ifdef CONFIG_X86_64
1122 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1125 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1126 unsigned long max_tsc_khz
;
1128 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1130 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1131 vcpu
->arch
.virtual_tsc_shift
);
1134 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1136 u64 v
= (u64
)khz
* (1000000 + ppm
);
1141 static void kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1143 u32 thresh_lo
, thresh_hi
;
1144 int use_scaling
= 0;
1146 /* tsc_khz can be zero if TSC calibration fails */
1147 if (this_tsc_khz
== 0)
1150 /* Compute a scale to convert nanoseconds in TSC cycles */
1151 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1152 &vcpu
->arch
.virtual_tsc_shift
,
1153 &vcpu
->arch
.virtual_tsc_mult
);
1154 vcpu
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1157 * Compute the variation in TSC rate which is acceptable
1158 * within the range of tolerance and decide if the
1159 * rate being applied is within that bounds of the hardware
1160 * rate. If so, no scaling or compensation need be done.
1162 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1163 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1164 if (this_tsc_khz
< thresh_lo
|| this_tsc_khz
> thresh_hi
) {
1165 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz
, thresh_lo
, thresh_hi
);
1168 kvm_x86_ops
->set_tsc_khz(vcpu
, this_tsc_khz
, use_scaling
);
1171 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1173 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1174 vcpu
->arch
.virtual_tsc_mult
,
1175 vcpu
->arch
.virtual_tsc_shift
);
1176 tsc
+= vcpu
->arch
.this_tsc_write
;
1180 void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1182 #ifdef CONFIG_X86_64
1184 bool do_request
= false;
1185 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1186 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1188 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1189 atomic_read(&vcpu
->kvm
->online_vcpus
));
1191 if (vcpus_matched
&& gtod
->clock
.vclock_mode
== VCLOCK_TSC
)
1192 if (!ka
->use_master_clock
)
1195 if (!vcpus_matched
&& ka
->use_master_clock
)
1199 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1201 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1202 atomic_read(&vcpu
->kvm
->online_vcpus
),
1203 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1207 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1209 u64 curr_offset
= kvm_x86_ops
->read_tsc_offset(vcpu
);
1210 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1213 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1215 struct kvm
*kvm
= vcpu
->kvm
;
1216 u64 offset
, ns
, elapsed
;
1217 unsigned long flags
;
1220 u64 data
= msr
->data
;
1222 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1223 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1224 ns
= get_kernel_ns();
1225 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1227 if (vcpu
->arch
.virtual_tsc_khz
) {
1230 /* n.b - signed multiplication and division required */
1231 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1232 #ifdef CONFIG_X86_64
1233 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1235 /* do_div() only does unsigned */
1236 asm("1: idivl %[divisor]\n"
1237 "2: xor %%edx, %%edx\n"
1238 " movl $0, %[faulted]\n"
1240 ".section .fixup,\"ax\"\n"
1241 "4: movl $1, %[faulted]\n"
1245 _ASM_EXTABLE(1b
, 4b
)
1247 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1248 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1251 do_div(elapsed
, 1000);
1256 /* idivl overflow => difference is larger than USEC_PER_SEC */
1258 usdiff
= USEC_PER_SEC
;
1260 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1263 * Special case: TSC write with a small delta (1 second) of virtual
1264 * cycle time against real time is interpreted as an attempt to
1265 * synchronize the CPU.
1267 * For a reliable TSC, we can match TSC offsets, and for an unstable
1268 * TSC, we add elapsed time in this computation. We could let the
1269 * compensation code attempt to catch up if we fall behind, but
1270 * it's better to try to match offsets from the beginning.
1272 if (usdiff
< USEC_PER_SEC
&&
1273 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1274 if (!check_tsc_unstable()) {
1275 offset
= kvm
->arch
.cur_tsc_offset
;
1276 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1278 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1280 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1281 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1286 * We split periods of matched TSC writes into generations.
1287 * For each generation, we track the original measured
1288 * nanosecond time, offset, and write, so if TSCs are in
1289 * sync, we can match exact offset, and if not, we can match
1290 * exact software computation in compute_guest_tsc()
1292 * These values are tracked in kvm->arch.cur_xxx variables.
1294 kvm
->arch
.cur_tsc_generation
++;
1295 kvm
->arch
.cur_tsc_nsec
= ns
;
1296 kvm
->arch
.cur_tsc_write
= data
;
1297 kvm
->arch
.cur_tsc_offset
= offset
;
1299 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1300 kvm
->arch
.cur_tsc_generation
, data
);
1304 * We also track th most recent recorded KHZ, write and time to
1305 * allow the matching interval to be extended at each write.
1307 kvm
->arch
.last_tsc_nsec
= ns
;
1308 kvm
->arch
.last_tsc_write
= data
;
1309 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1311 vcpu
->arch
.last_guest_tsc
= data
;
1313 /* Keep track of which generation this VCPU has synchronized to */
1314 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1315 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1316 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1318 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1319 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1320 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1321 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1323 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1325 kvm
->arch
.nr_vcpus_matched_tsc
++;
1327 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1329 kvm_track_tsc_matching(vcpu
);
1330 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1333 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1335 #ifdef CONFIG_X86_64
1337 static cycle_t
read_tsc(void)
1343 * Empirically, a fence (of type that depends on the CPU)
1344 * before rdtsc is enough to ensure that rdtsc is ordered
1345 * with respect to loads. The various CPU manuals are unclear
1346 * as to whether rdtsc can be reordered with later loads,
1347 * but no one has ever seen it happen.
1350 ret
= (cycle_t
)vget_cycles();
1352 last
= pvclock_gtod_data
.clock
.cycle_last
;
1354 if (likely(ret
>= last
))
1358 * GCC likes to generate cmov here, but this branch is extremely
1359 * predictable (it's just a funciton of time and the likely is
1360 * very likely) and there's a data dependence, so force GCC
1361 * to generate a branch instead. I don't barrier() because
1362 * we don't actually need a barrier, and if this function
1363 * ever gets inlined it will generate worse code.
1369 static inline u64
vgettsc(cycle_t
*cycle_now
)
1372 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1374 *cycle_now
= read_tsc();
1376 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1377 return v
* gtod
->clock
.mult
;
1380 static int do_monotonic(struct timespec
*ts
, cycle_t
*cycle_now
)
1385 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1389 seq
= read_seqcount_begin(>od
->seq
);
1390 mode
= gtod
->clock
.vclock_mode
;
1391 ts
->tv_sec
= gtod
->monotonic_time_sec
;
1392 ns
= gtod
->monotonic_time_snsec
;
1393 ns
+= vgettsc(cycle_now
);
1394 ns
>>= gtod
->clock
.shift
;
1395 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1396 timespec_add_ns(ts
, ns
);
1401 /* returns true if host is using tsc clocksource */
1402 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, cycle_t
*cycle_now
)
1406 /* checked again under seqlock below */
1407 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1410 if (do_monotonic(&ts
, cycle_now
) != VCLOCK_TSC
)
1413 monotonic_to_bootbased(&ts
);
1414 *kernel_ns
= timespec_to_ns(&ts
);
1422 * Assuming a stable TSC across physical CPUS, and a stable TSC
1423 * across virtual CPUs, the following condition is possible.
1424 * Each numbered line represents an event visible to both
1425 * CPUs at the next numbered event.
1427 * "timespecX" represents host monotonic time. "tscX" represents
1430 * VCPU0 on CPU0 | VCPU1 on CPU1
1432 * 1. read timespec0,tsc0
1433 * 2. | timespec1 = timespec0 + N
1435 * 3. transition to guest | transition to guest
1436 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1437 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1438 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1440 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1443 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1445 * - 0 < N - M => M < N
1447 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1448 * always the case (the difference between two distinct xtime instances
1449 * might be smaller then the difference between corresponding TSC reads,
1450 * when updating guest vcpus pvclock areas).
1452 * To avoid that problem, do not allow visibility of distinct
1453 * system_timestamp/tsc_timestamp values simultaneously: use a master
1454 * copy of host monotonic time values. Update that master copy
1457 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1461 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1463 #ifdef CONFIG_X86_64
1464 struct kvm_arch
*ka
= &kvm
->arch
;
1466 bool host_tsc_clocksource
, vcpus_matched
;
1468 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1469 atomic_read(&kvm
->online_vcpus
));
1472 * If the host uses TSC clock, then passthrough TSC as stable
1475 host_tsc_clocksource
= kvm_get_time_and_clockread(
1476 &ka
->master_kernel_ns
,
1477 &ka
->master_cycle_now
);
1479 ka
->use_master_clock
= host_tsc_clocksource
& vcpus_matched
;
1481 if (ka
->use_master_clock
)
1482 atomic_set(&kvm_guest_has_master_clock
, 1);
1484 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1485 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1490 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1492 #ifdef CONFIG_X86_64
1494 struct kvm_vcpu
*vcpu
;
1495 struct kvm_arch
*ka
= &kvm
->arch
;
1497 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1498 kvm_make_mclock_inprogress_request(kvm
);
1499 /* no guest entries from this point */
1500 pvclock_update_vm_gtod_copy(kvm
);
1502 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1503 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
1505 /* guest entries allowed */
1506 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1507 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1509 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1513 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1515 unsigned long flags
, this_tsc_khz
;
1516 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1517 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1519 u64 tsc_timestamp
, host_tsc
;
1520 struct pvclock_vcpu_time_info guest_hv_clock
;
1522 bool use_master_clock
;
1528 * If the host uses TSC clock, then passthrough TSC as stable
1531 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1532 use_master_clock
= ka
->use_master_clock
;
1533 if (use_master_clock
) {
1534 host_tsc
= ka
->master_cycle_now
;
1535 kernel_ns
= ka
->master_kernel_ns
;
1537 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1539 /* Keep irq disabled to prevent changes to the clock */
1540 local_irq_save(flags
);
1541 this_tsc_khz
= __get_cpu_var(cpu_tsc_khz
);
1542 if (unlikely(this_tsc_khz
== 0)) {
1543 local_irq_restore(flags
);
1544 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1547 if (!use_master_clock
) {
1548 host_tsc
= native_read_tsc();
1549 kernel_ns
= get_kernel_ns();
1552 tsc_timestamp
= kvm_x86_ops
->read_l1_tsc(v
, host_tsc
);
1555 * We may have to catch up the TSC to match elapsed wall clock
1556 * time for two reasons, even if kvmclock is used.
1557 * 1) CPU could have been running below the maximum TSC rate
1558 * 2) Broken TSC compensation resets the base at each VCPU
1559 * entry to avoid unknown leaps of TSC even when running
1560 * again on the same CPU. This may cause apparent elapsed
1561 * time to disappear, and the guest to stand still or run
1564 if (vcpu
->tsc_catchup
) {
1565 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1566 if (tsc
> tsc_timestamp
) {
1567 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1568 tsc_timestamp
= tsc
;
1572 local_irq_restore(flags
);
1574 if (!vcpu
->pv_time_enabled
)
1577 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1578 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1579 &vcpu
->hv_clock
.tsc_shift
,
1580 &vcpu
->hv_clock
.tsc_to_system_mul
);
1581 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1584 /* With all the info we got, fill in the values */
1585 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1586 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1587 vcpu
->last_guest_tsc
= tsc_timestamp
;
1590 * The interface expects us to write an even number signaling that the
1591 * update is finished. Since the guest won't see the intermediate
1592 * state, we just increase by 2 at the end.
1594 vcpu
->hv_clock
.version
+= 2;
1596 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1597 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1600 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1601 pvclock_flags
= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1603 if (vcpu
->pvclock_set_guest_stopped_request
) {
1604 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1605 vcpu
->pvclock_set_guest_stopped_request
= false;
1608 /* If the host uses TSC clocksource, then it is stable */
1609 if (use_master_clock
)
1610 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1612 vcpu
->hv_clock
.flags
= pvclock_flags
;
1614 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1616 sizeof(vcpu
->hv_clock
));
1621 * kvmclock updates which are isolated to a given vcpu, such as
1622 * vcpu->cpu migration, should not allow system_timestamp from
1623 * the rest of the vcpus to remain static. Otherwise ntp frequency
1624 * correction applies to one vcpu's system_timestamp but not
1627 * So in those cases, request a kvmclock update for all vcpus.
1628 * The worst case for a remote vcpu to update its kvmclock
1629 * is then bounded by maximum nohz sleep latency.
1632 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1635 struct kvm
*kvm
= v
->kvm
;
1636 struct kvm_vcpu
*vcpu
;
1638 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1639 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
1640 kvm_vcpu_kick(vcpu
);
1644 static bool msr_mtrr_valid(unsigned msr
)
1647 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1648 case MSR_MTRRfix64K_00000
:
1649 case MSR_MTRRfix16K_80000
:
1650 case MSR_MTRRfix16K_A0000
:
1651 case MSR_MTRRfix4K_C0000
:
1652 case MSR_MTRRfix4K_C8000
:
1653 case MSR_MTRRfix4K_D0000
:
1654 case MSR_MTRRfix4K_D8000
:
1655 case MSR_MTRRfix4K_E0000
:
1656 case MSR_MTRRfix4K_E8000
:
1657 case MSR_MTRRfix4K_F0000
:
1658 case MSR_MTRRfix4K_F8000
:
1659 case MSR_MTRRdefType
:
1660 case MSR_IA32_CR_PAT
:
1668 static bool valid_pat_type(unsigned t
)
1670 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1673 static bool valid_mtrr_type(unsigned t
)
1675 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1678 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1682 if (!msr_mtrr_valid(msr
))
1685 if (msr
== MSR_IA32_CR_PAT
) {
1686 for (i
= 0; i
< 8; i
++)
1687 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1690 } else if (msr
== MSR_MTRRdefType
) {
1693 return valid_mtrr_type(data
& 0xff);
1694 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1695 for (i
= 0; i
< 8 ; i
++)
1696 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1701 /* variable MTRRs */
1702 return valid_mtrr_type(data
& 0xff);
1705 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1707 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1709 if (!mtrr_valid(vcpu
, msr
, data
))
1712 if (msr
== MSR_MTRRdefType
) {
1713 vcpu
->arch
.mtrr_state
.def_type
= data
;
1714 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1715 } else if (msr
== MSR_MTRRfix64K_00000
)
1717 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1718 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1719 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1720 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1721 else if (msr
== MSR_IA32_CR_PAT
)
1722 vcpu
->arch
.pat
= data
;
1723 else { /* Variable MTRRs */
1724 int idx
, is_mtrr_mask
;
1727 idx
= (msr
- 0x200) / 2;
1728 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1731 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1734 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1738 kvm_mmu_reset_context(vcpu
);
1742 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1744 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1745 unsigned bank_num
= mcg_cap
& 0xff;
1748 case MSR_IA32_MCG_STATUS
:
1749 vcpu
->arch
.mcg_status
= data
;
1751 case MSR_IA32_MCG_CTL
:
1752 if (!(mcg_cap
& MCG_CTL_P
))
1754 if (data
!= 0 && data
!= ~(u64
)0)
1756 vcpu
->arch
.mcg_ctl
= data
;
1759 if (msr
>= MSR_IA32_MC0_CTL
&&
1760 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1761 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1762 /* only 0 or all 1s can be written to IA32_MCi_CTL
1763 * some Linux kernels though clear bit 10 in bank 4 to
1764 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1765 * this to avoid an uncatched #GP in the guest
1767 if ((offset
& 0x3) == 0 &&
1768 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1770 vcpu
->arch
.mce_banks
[offset
] = data
;
1778 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1780 struct kvm
*kvm
= vcpu
->kvm
;
1781 int lm
= is_long_mode(vcpu
);
1782 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1783 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1784 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1785 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1786 u32 page_num
= data
& ~PAGE_MASK
;
1787 u64 page_addr
= data
& PAGE_MASK
;
1792 if (page_num
>= blob_size
)
1795 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1800 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1809 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1811 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1814 static bool kvm_hv_msr_partition_wide(u32 msr
)
1818 case HV_X64_MSR_GUEST_OS_ID
:
1819 case HV_X64_MSR_HYPERCALL
:
1820 case HV_X64_MSR_REFERENCE_TSC
:
1821 case HV_X64_MSR_TIME_REF_COUNT
:
1829 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1831 struct kvm
*kvm
= vcpu
->kvm
;
1834 case HV_X64_MSR_GUEST_OS_ID
:
1835 kvm
->arch
.hv_guest_os_id
= data
;
1836 /* setting guest os id to zero disables hypercall page */
1837 if (!kvm
->arch
.hv_guest_os_id
)
1838 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1840 case HV_X64_MSR_HYPERCALL
: {
1845 /* if guest os id is not set hypercall should remain disabled */
1846 if (!kvm
->arch
.hv_guest_os_id
)
1848 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1849 kvm
->arch
.hv_hypercall
= data
;
1852 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1853 addr
= gfn_to_hva(kvm
, gfn
);
1854 if (kvm_is_error_hva(addr
))
1856 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1857 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1858 if (__copy_to_user((void __user
*)addr
, instructions
, 4))
1860 kvm
->arch
.hv_hypercall
= data
;
1861 mark_page_dirty(kvm
, gfn
);
1864 case HV_X64_MSR_REFERENCE_TSC
: {
1866 HV_REFERENCE_TSC_PAGE tsc_ref
;
1867 memset(&tsc_ref
, 0, sizeof(tsc_ref
));
1868 kvm
->arch
.hv_tsc_page
= data
;
1869 if (!(data
& HV_X64_MSR_TSC_REFERENCE_ENABLE
))
1871 gfn
= data
>> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT
;
1872 if (kvm_write_guest(kvm
, data
,
1873 &tsc_ref
, sizeof(tsc_ref
)))
1875 mark_page_dirty(kvm
, gfn
);
1879 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1880 "data 0x%llx\n", msr
, data
);
1886 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1889 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1893 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1894 vcpu
->arch
.hv_vapic
= data
;
1897 gfn
= data
>> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
;
1898 addr
= gfn_to_hva(vcpu
->kvm
, gfn
);
1899 if (kvm_is_error_hva(addr
))
1901 if (__clear_user((void __user
*)addr
, PAGE_SIZE
))
1903 vcpu
->arch
.hv_vapic
= data
;
1904 mark_page_dirty(vcpu
->kvm
, gfn
);
1907 case HV_X64_MSR_EOI
:
1908 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1909 case HV_X64_MSR_ICR
:
1910 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1911 case HV_X64_MSR_TPR
:
1912 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1914 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1915 "data 0x%llx\n", msr
, data
);
1922 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1924 gpa_t gpa
= data
& ~0x3f;
1926 /* Bits 2:5 are reserved, Should be zero */
1930 vcpu
->arch
.apf
.msr_val
= data
;
1932 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1933 kvm_clear_async_pf_completion_queue(vcpu
);
1934 kvm_async_pf_hash_reset(vcpu
);
1938 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
1942 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
1943 kvm_async_pf_wakeup_all(vcpu
);
1947 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
1949 vcpu
->arch
.pv_time_enabled
= false;
1952 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
1956 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1959 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
1960 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
1961 vcpu
->arch
.st
.accum_steal
= delta
;
1964 static void record_steal_time(struct kvm_vcpu
*vcpu
)
1966 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1969 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1970 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
1973 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
1974 vcpu
->arch
.st
.steal
.version
+= 2;
1975 vcpu
->arch
.st
.accum_steal
= 0;
1977 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1978 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
1981 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1984 u32 msr
= msr_info
->index
;
1985 u64 data
= msr_info
->data
;
1988 case MSR_AMD64_NB_CFG
:
1989 case MSR_IA32_UCODE_REV
:
1990 case MSR_IA32_UCODE_WRITE
:
1991 case MSR_VM_HSAVE_PA
:
1992 case MSR_AMD64_PATCH_LOADER
:
1993 case MSR_AMD64_BU_CFG2
:
1997 return set_efer(vcpu
, data
);
1999 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2000 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2001 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2003 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2008 case MSR_FAM10H_MMIO_CONF_BASE
:
2010 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2015 case MSR_IA32_DEBUGCTLMSR
:
2017 /* We support the non-activated case already */
2019 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2020 /* Values other than LBR and BTF are vendor-specific,
2021 thus reserved and should throw a #GP */
2024 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2027 case 0x200 ... 0x2ff:
2028 return set_msr_mtrr(vcpu
, msr
, data
);
2029 case MSR_IA32_APICBASE
:
2030 return kvm_set_apic_base(vcpu
, msr_info
);
2031 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2032 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2033 case MSR_IA32_TSCDEADLINE
:
2034 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2036 case MSR_IA32_TSC_ADJUST
:
2037 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2038 if (!msr_info
->host_initiated
) {
2039 u64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2040 kvm_x86_ops
->adjust_tsc_offset(vcpu
, adj
, true);
2042 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2045 case MSR_IA32_MISC_ENABLE
:
2046 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2048 case MSR_KVM_WALL_CLOCK_NEW
:
2049 case MSR_KVM_WALL_CLOCK
:
2050 vcpu
->kvm
->arch
.wall_clock
= data
;
2051 kvm_write_wall_clock(vcpu
->kvm
, data
);
2053 case MSR_KVM_SYSTEM_TIME_NEW
:
2054 case MSR_KVM_SYSTEM_TIME
: {
2056 kvmclock_reset(vcpu
);
2058 vcpu
->arch
.time
= data
;
2059 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2061 /* we verify if the enable bit is set... */
2065 gpa_offset
= data
& ~(PAGE_MASK
| 1);
2067 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2068 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2069 sizeof(struct pvclock_vcpu_time_info
)))
2070 vcpu
->arch
.pv_time_enabled
= false;
2072 vcpu
->arch
.pv_time_enabled
= true;
2076 case MSR_KVM_ASYNC_PF_EN
:
2077 if (kvm_pv_enable_async_pf(vcpu
, data
))
2080 case MSR_KVM_STEAL_TIME
:
2082 if (unlikely(!sched_info_on()))
2085 if (data
& KVM_STEAL_RESERVED_MASK
)
2088 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2089 data
& KVM_STEAL_VALID_BITS
,
2090 sizeof(struct kvm_steal_time
)))
2093 vcpu
->arch
.st
.msr_val
= data
;
2095 if (!(data
& KVM_MSR_ENABLED
))
2098 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2101 accumulate_steal_time(vcpu
);
2104 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2107 case MSR_KVM_PV_EOI_EN
:
2108 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2112 case MSR_IA32_MCG_CTL
:
2113 case MSR_IA32_MCG_STATUS
:
2114 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
2115 return set_msr_mce(vcpu
, msr
, data
);
2117 /* Performance counters are not protected by a CPUID bit,
2118 * so we should check all of them in the generic path for the sake of
2119 * cross vendor migration.
2120 * Writing a zero into the event select MSRs disables them,
2121 * which we perfectly emulate ;-). Any other value should be at least
2122 * reported, some guests depend on them.
2124 case MSR_K7_EVNTSEL0
:
2125 case MSR_K7_EVNTSEL1
:
2126 case MSR_K7_EVNTSEL2
:
2127 case MSR_K7_EVNTSEL3
:
2129 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2130 "0x%x data 0x%llx\n", msr
, data
);
2132 /* at least RHEL 4 unconditionally writes to the perfctr registers,
2133 * so we ignore writes to make it happy.
2135 case MSR_K7_PERFCTR0
:
2136 case MSR_K7_PERFCTR1
:
2137 case MSR_K7_PERFCTR2
:
2138 case MSR_K7_PERFCTR3
:
2139 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2140 "0x%x data 0x%llx\n", msr
, data
);
2142 case MSR_P6_PERFCTR0
:
2143 case MSR_P6_PERFCTR1
:
2145 case MSR_P6_EVNTSEL0
:
2146 case MSR_P6_EVNTSEL1
:
2147 if (kvm_pmu_msr(vcpu
, msr
))
2148 return kvm_pmu_set_msr(vcpu
, msr_info
);
2150 if (pr
|| data
!= 0)
2151 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2152 "0x%x data 0x%llx\n", msr
, data
);
2154 case MSR_K7_CLK_CTL
:
2156 * Ignore all writes to this no longer documented MSR.
2157 * Writes are only relevant for old K7 processors,
2158 * all pre-dating SVM, but a recommended workaround from
2159 * AMD for these chips. It is possible to specify the
2160 * affected processor models on the command line, hence
2161 * the need to ignore the workaround.
2164 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2165 if (kvm_hv_msr_partition_wide(msr
)) {
2167 mutex_lock(&vcpu
->kvm
->lock
);
2168 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
2169 mutex_unlock(&vcpu
->kvm
->lock
);
2172 return set_msr_hyperv(vcpu
, msr
, data
);
2174 case MSR_IA32_BBL_CR_CTL3
:
2175 /* Drop writes to this legacy MSR -- see rdmsr
2176 * counterpart for further detail.
2178 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
2180 case MSR_AMD64_OSVW_ID_LENGTH
:
2181 if (!guest_cpuid_has_osvw(vcpu
))
2183 vcpu
->arch
.osvw
.length
= data
;
2185 case MSR_AMD64_OSVW_STATUS
:
2186 if (!guest_cpuid_has_osvw(vcpu
))
2188 vcpu
->arch
.osvw
.status
= data
;
2191 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2192 return xen_hvm_config(vcpu
, data
);
2193 if (kvm_pmu_msr(vcpu
, msr
))
2194 return kvm_pmu_set_msr(vcpu
, msr_info
);
2196 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
2200 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
2207 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2211 * Reads an msr value (of 'msr_index') into 'pdata'.
2212 * Returns 0 on success, non-0 otherwise.
2213 * Assumes vcpu_load() was already called.
2215 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
2217 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
2220 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2222 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
2224 if (!msr_mtrr_valid(msr
))
2227 if (msr
== MSR_MTRRdefType
)
2228 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
2229 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
2230 else if (msr
== MSR_MTRRfix64K_00000
)
2232 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
2233 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
2234 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
2235 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
2236 else if (msr
== MSR_IA32_CR_PAT
)
2237 *pdata
= vcpu
->arch
.pat
;
2238 else { /* Variable MTRRs */
2239 int idx
, is_mtrr_mask
;
2242 idx
= (msr
- 0x200) / 2;
2243 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
2246 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
2249 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
2256 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2259 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2260 unsigned bank_num
= mcg_cap
& 0xff;
2263 case MSR_IA32_P5_MC_ADDR
:
2264 case MSR_IA32_P5_MC_TYPE
:
2267 case MSR_IA32_MCG_CAP
:
2268 data
= vcpu
->arch
.mcg_cap
;
2270 case MSR_IA32_MCG_CTL
:
2271 if (!(mcg_cap
& MCG_CTL_P
))
2273 data
= vcpu
->arch
.mcg_ctl
;
2275 case MSR_IA32_MCG_STATUS
:
2276 data
= vcpu
->arch
.mcg_status
;
2279 if (msr
>= MSR_IA32_MC0_CTL
&&
2280 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
2281 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2282 data
= vcpu
->arch
.mce_banks
[offset
];
2291 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2294 struct kvm
*kvm
= vcpu
->kvm
;
2297 case HV_X64_MSR_GUEST_OS_ID
:
2298 data
= kvm
->arch
.hv_guest_os_id
;
2300 case HV_X64_MSR_HYPERCALL
:
2301 data
= kvm
->arch
.hv_hypercall
;
2303 case HV_X64_MSR_TIME_REF_COUNT
: {
2305 div_u64(get_kernel_ns() + kvm
->arch
.kvmclock_offset
, 100);
2308 case HV_X64_MSR_REFERENCE_TSC
:
2309 data
= kvm
->arch
.hv_tsc_page
;
2312 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2320 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2325 case HV_X64_MSR_VP_INDEX
: {
2328 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
)
2333 case HV_X64_MSR_EOI
:
2334 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
2335 case HV_X64_MSR_ICR
:
2336 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
2337 case HV_X64_MSR_TPR
:
2338 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
2339 case HV_X64_MSR_APIC_ASSIST_PAGE
:
2340 data
= vcpu
->arch
.hv_vapic
;
2343 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2350 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2355 case MSR_IA32_PLATFORM_ID
:
2356 case MSR_IA32_EBL_CR_POWERON
:
2357 case MSR_IA32_DEBUGCTLMSR
:
2358 case MSR_IA32_LASTBRANCHFROMIP
:
2359 case MSR_IA32_LASTBRANCHTOIP
:
2360 case MSR_IA32_LASTINTFROMIP
:
2361 case MSR_IA32_LASTINTTOIP
:
2364 case MSR_VM_HSAVE_PA
:
2365 case MSR_K7_EVNTSEL0
:
2366 case MSR_K7_PERFCTR0
:
2367 case MSR_K8_INT_PENDING_MSG
:
2368 case MSR_AMD64_NB_CFG
:
2369 case MSR_FAM10H_MMIO_CONF_BASE
:
2370 case MSR_AMD64_BU_CFG2
:
2373 case MSR_P6_PERFCTR0
:
2374 case MSR_P6_PERFCTR1
:
2375 case MSR_P6_EVNTSEL0
:
2376 case MSR_P6_EVNTSEL1
:
2377 if (kvm_pmu_msr(vcpu
, msr
))
2378 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2381 case MSR_IA32_UCODE_REV
:
2382 data
= 0x100000000ULL
;
2385 data
= 0x500 | KVM_NR_VAR_MTRR
;
2387 case 0x200 ... 0x2ff:
2388 return get_msr_mtrr(vcpu
, msr
, pdata
);
2389 case 0xcd: /* fsb frequency */
2393 * MSR_EBC_FREQUENCY_ID
2394 * Conservative value valid for even the basic CPU models.
2395 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2396 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2397 * and 266MHz for model 3, or 4. Set Core Clock
2398 * Frequency to System Bus Frequency Ratio to 1 (bits
2399 * 31:24) even though these are only valid for CPU
2400 * models > 2, however guests may end up dividing or
2401 * multiplying by zero otherwise.
2403 case MSR_EBC_FREQUENCY_ID
:
2406 case MSR_IA32_APICBASE
:
2407 data
= kvm_get_apic_base(vcpu
);
2409 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2410 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
2412 case MSR_IA32_TSCDEADLINE
:
2413 data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2415 case MSR_IA32_TSC_ADJUST
:
2416 data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2418 case MSR_IA32_MISC_ENABLE
:
2419 data
= vcpu
->arch
.ia32_misc_enable_msr
;
2421 case MSR_IA32_PERF_STATUS
:
2422 /* TSC increment by tick */
2424 /* CPU multiplier */
2425 data
|= (((uint64_t)4ULL) << 40);
2428 data
= vcpu
->arch
.efer
;
2430 case MSR_KVM_WALL_CLOCK
:
2431 case MSR_KVM_WALL_CLOCK_NEW
:
2432 data
= vcpu
->kvm
->arch
.wall_clock
;
2434 case MSR_KVM_SYSTEM_TIME
:
2435 case MSR_KVM_SYSTEM_TIME_NEW
:
2436 data
= vcpu
->arch
.time
;
2438 case MSR_KVM_ASYNC_PF_EN
:
2439 data
= vcpu
->arch
.apf
.msr_val
;
2441 case MSR_KVM_STEAL_TIME
:
2442 data
= vcpu
->arch
.st
.msr_val
;
2444 case MSR_KVM_PV_EOI_EN
:
2445 data
= vcpu
->arch
.pv_eoi
.msr_val
;
2447 case MSR_IA32_P5_MC_ADDR
:
2448 case MSR_IA32_P5_MC_TYPE
:
2449 case MSR_IA32_MCG_CAP
:
2450 case MSR_IA32_MCG_CTL
:
2451 case MSR_IA32_MCG_STATUS
:
2452 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
2453 return get_msr_mce(vcpu
, msr
, pdata
);
2454 case MSR_K7_CLK_CTL
:
2456 * Provide expected ramp-up count for K7. All other
2457 * are set to zero, indicating minimum divisors for
2460 * This prevents guest kernels on AMD host with CPU
2461 * type 6, model 8 and higher from exploding due to
2462 * the rdmsr failing.
2466 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2467 if (kvm_hv_msr_partition_wide(msr
)) {
2469 mutex_lock(&vcpu
->kvm
->lock
);
2470 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
2471 mutex_unlock(&vcpu
->kvm
->lock
);
2474 return get_msr_hyperv(vcpu
, msr
, pdata
);
2476 case MSR_IA32_BBL_CR_CTL3
:
2477 /* This legacy MSR exists but isn't fully documented in current
2478 * silicon. It is however accessed by winxp in very narrow
2479 * scenarios where it sets bit #19, itself documented as
2480 * a "reserved" bit. Best effort attempt to source coherent
2481 * read data here should the balance of the register be
2482 * interpreted by the guest:
2484 * L2 cache control register 3: 64GB range, 256KB size,
2485 * enabled, latency 0x1, configured
2489 case MSR_AMD64_OSVW_ID_LENGTH
:
2490 if (!guest_cpuid_has_osvw(vcpu
))
2492 data
= vcpu
->arch
.osvw
.length
;
2494 case MSR_AMD64_OSVW_STATUS
:
2495 if (!guest_cpuid_has_osvw(vcpu
))
2497 data
= vcpu
->arch
.osvw
.status
;
2500 if (kvm_pmu_msr(vcpu
, msr
))
2501 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2503 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
2506 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
2514 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2517 * Read or write a bunch of msrs. All parameters are kernel addresses.
2519 * @return number of msrs set successfully.
2521 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2522 struct kvm_msr_entry
*entries
,
2523 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2524 unsigned index
, u64
*data
))
2528 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2529 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2530 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2532 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2538 * Read or write a bunch of msrs. Parameters are user addresses.
2540 * @return number of msrs set successfully.
2542 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2543 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2544 unsigned index
, u64
*data
),
2547 struct kvm_msrs msrs
;
2548 struct kvm_msr_entry
*entries
;
2553 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2557 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2560 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2561 entries
= memdup_user(user_msrs
->entries
, size
);
2562 if (IS_ERR(entries
)) {
2563 r
= PTR_ERR(entries
);
2567 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2572 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2583 int kvm_dev_ioctl_check_extension(long ext
)
2588 case KVM_CAP_IRQCHIP
:
2590 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2591 case KVM_CAP_SET_TSS_ADDR
:
2592 case KVM_CAP_EXT_CPUID
:
2593 case KVM_CAP_EXT_EMUL_CPUID
:
2594 case KVM_CAP_CLOCKSOURCE
:
2596 case KVM_CAP_NOP_IO_DELAY
:
2597 case KVM_CAP_MP_STATE
:
2598 case KVM_CAP_SYNC_MMU
:
2599 case KVM_CAP_USER_NMI
:
2600 case KVM_CAP_REINJECT_CONTROL
:
2601 case KVM_CAP_IRQ_INJECT_STATUS
:
2603 case KVM_CAP_IOEVENTFD
:
2605 case KVM_CAP_PIT_STATE2
:
2606 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2607 case KVM_CAP_XEN_HVM
:
2608 case KVM_CAP_ADJUST_CLOCK
:
2609 case KVM_CAP_VCPU_EVENTS
:
2610 case KVM_CAP_HYPERV
:
2611 case KVM_CAP_HYPERV_VAPIC
:
2612 case KVM_CAP_HYPERV_SPIN
:
2613 case KVM_CAP_PCI_SEGMENT
:
2614 case KVM_CAP_DEBUGREGS
:
2615 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2617 case KVM_CAP_ASYNC_PF
:
2618 case KVM_CAP_GET_TSC_KHZ
:
2619 case KVM_CAP_KVMCLOCK_CTRL
:
2620 case KVM_CAP_READONLY_MEM
:
2621 case KVM_CAP_HYPERV_TIME
:
2622 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2623 case KVM_CAP_ASSIGN_DEV_IRQ
:
2624 case KVM_CAP_PCI_2_3
:
2628 case KVM_CAP_COALESCED_MMIO
:
2629 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2632 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2634 case KVM_CAP_NR_VCPUS
:
2635 r
= KVM_SOFT_MAX_VCPUS
;
2637 case KVM_CAP_MAX_VCPUS
:
2640 case KVM_CAP_NR_MEMSLOTS
:
2641 r
= KVM_USER_MEM_SLOTS
;
2643 case KVM_CAP_PV_MMU
: /* obsolete */
2646 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2648 r
= iommu_present(&pci_bus_type
);
2652 r
= KVM_MAX_MCE_BANKS
;
2657 case KVM_CAP_TSC_CONTROL
:
2658 r
= kvm_has_tsc_control
;
2660 case KVM_CAP_TSC_DEADLINE_TIMER
:
2661 r
= boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER
);
2671 long kvm_arch_dev_ioctl(struct file
*filp
,
2672 unsigned int ioctl
, unsigned long arg
)
2674 void __user
*argp
= (void __user
*)arg
;
2678 case KVM_GET_MSR_INDEX_LIST
: {
2679 struct kvm_msr_list __user
*user_msr_list
= argp
;
2680 struct kvm_msr_list msr_list
;
2684 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2687 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
2688 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2691 if (n
< msr_list
.nmsrs
)
2694 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2695 num_msrs_to_save
* sizeof(u32
)))
2697 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2699 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
2704 case KVM_GET_SUPPORTED_CPUID
:
2705 case KVM_GET_EMULATED_CPUID
: {
2706 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2707 struct kvm_cpuid2 cpuid
;
2710 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2713 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2719 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2724 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2727 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2729 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2741 static void wbinvd_ipi(void *garbage
)
2746 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2748 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2751 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2753 /* Address WBINVD may be executed by guest */
2754 if (need_emulate_wbinvd(vcpu
)) {
2755 if (kvm_x86_ops
->has_wbinvd_exit())
2756 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2757 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2758 smp_call_function_single(vcpu
->cpu
,
2759 wbinvd_ipi
, NULL
, 1);
2762 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2764 /* Apply any externally detected TSC adjustments (due to suspend) */
2765 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2766 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2767 vcpu
->arch
.tsc_offset_adjustment
= 0;
2768 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
2771 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2772 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2773 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2775 mark_tsc_unstable("KVM discovered backwards TSC");
2776 if (check_tsc_unstable()) {
2777 u64 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
,
2778 vcpu
->arch
.last_guest_tsc
);
2779 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2780 vcpu
->arch
.tsc_catchup
= 1;
2783 * On a host with synchronized TSC, there is no need to update
2784 * kvmclock on vcpu->cpu migration
2786 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2787 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2788 if (vcpu
->cpu
!= cpu
)
2789 kvm_migrate_timers(vcpu
);
2793 accumulate_steal_time(vcpu
);
2794 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2797 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2799 kvm_x86_ops
->vcpu_put(vcpu
);
2800 kvm_put_guest_fpu(vcpu
);
2801 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2804 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2805 struct kvm_lapic_state
*s
)
2807 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2808 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2813 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2814 struct kvm_lapic_state
*s
)
2816 kvm_apic_post_state_restore(vcpu
, s
);
2817 update_cr8_intercept(vcpu
);
2822 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2823 struct kvm_interrupt
*irq
)
2825 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2827 if (irqchip_in_kernel(vcpu
->kvm
))
2830 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2831 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2836 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2838 kvm_inject_nmi(vcpu
);
2843 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2844 struct kvm_tpr_access_ctl
*tac
)
2848 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2852 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2856 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2859 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2861 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2864 vcpu
->arch
.mcg_cap
= mcg_cap
;
2865 /* Init IA32_MCG_CTL to all 1s */
2866 if (mcg_cap
& MCG_CTL_P
)
2867 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2868 /* Init IA32_MCi_CTL to all 1s */
2869 for (bank
= 0; bank
< bank_num
; bank
++)
2870 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2875 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2876 struct kvm_x86_mce
*mce
)
2878 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2879 unsigned bank_num
= mcg_cap
& 0xff;
2880 u64
*banks
= vcpu
->arch
.mce_banks
;
2882 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2885 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2886 * reporting is disabled
2888 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2889 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2891 banks
+= 4 * mce
->bank
;
2893 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2894 * reporting is disabled for the bank
2896 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2898 if (mce
->status
& MCI_STATUS_UC
) {
2899 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2900 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2901 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2904 if (banks
[1] & MCI_STATUS_VAL
)
2905 mce
->status
|= MCI_STATUS_OVER
;
2906 banks
[2] = mce
->addr
;
2907 banks
[3] = mce
->misc
;
2908 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2909 banks
[1] = mce
->status
;
2910 kvm_queue_exception(vcpu
, MC_VECTOR
);
2911 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2912 || !(banks
[1] & MCI_STATUS_UC
)) {
2913 if (banks
[1] & MCI_STATUS_VAL
)
2914 mce
->status
|= MCI_STATUS_OVER
;
2915 banks
[2] = mce
->addr
;
2916 banks
[3] = mce
->misc
;
2917 banks
[1] = mce
->status
;
2919 banks
[1] |= MCI_STATUS_OVER
;
2923 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2924 struct kvm_vcpu_events
*events
)
2927 events
->exception
.injected
=
2928 vcpu
->arch
.exception
.pending
&&
2929 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2930 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2931 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2932 events
->exception
.pad
= 0;
2933 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2935 events
->interrupt
.injected
=
2936 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2937 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2938 events
->interrupt
.soft
= 0;
2939 events
->interrupt
.shadow
=
2940 kvm_x86_ops
->get_interrupt_shadow(vcpu
,
2941 KVM_X86_SHADOW_INT_MOV_SS
| KVM_X86_SHADOW_INT_STI
);
2943 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2944 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
2945 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2946 events
->nmi
.pad
= 0;
2948 events
->sipi_vector
= 0; /* never valid when reporting to user space */
2950 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2951 | KVM_VCPUEVENT_VALID_SHADOW
);
2952 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2955 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2956 struct kvm_vcpu_events
*events
)
2958 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2959 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2960 | KVM_VCPUEVENT_VALID_SHADOW
))
2964 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2965 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2966 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2967 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2969 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2970 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2971 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2972 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2973 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2974 events
->interrupt
.shadow
);
2976 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2977 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2978 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2979 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2981 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
2982 kvm_vcpu_has_lapic(vcpu
))
2983 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
2985 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2990 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
2991 struct kvm_debugregs
*dbgregs
)
2995 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
2996 _kvm_get_dr(vcpu
, 6, &val
);
2998 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3000 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3003 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3004 struct kvm_debugregs
*dbgregs
)
3009 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3010 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3011 kvm_update_dr6(vcpu
);
3012 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3013 kvm_update_dr7(vcpu
);
3018 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3019 struct kvm_xsave
*guest_xsave
)
3021 if (cpu_has_xsave
) {
3022 memcpy(guest_xsave
->region
,
3023 &vcpu
->arch
.guest_fpu
.state
->xsave
,
3024 vcpu
->arch
.guest_xstate_size
);
3025 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] &=
3026 vcpu
->arch
.guest_supported_xcr0
| XSTATE_FPSSE
;
3028 memcpy(guest_xsave
->region
,
3029 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
3030 sizeof(struct i387_fxsave_struct
));
3031 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3036 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3037 struct kvm_xsave
*guest_xsave
)
3040 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3042 if (cpu_has_xsave
) {
3044 * Here we allow setting states that are not present in
3045 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3046 * with old userspace.
3048 if (xstate_bv
& ~KVM_SUPPORTED_XCR0
)
3050 if (xstate_bv
& ~host_xcr0
)
3052 memcpy(&vcpu
->arch
.guest_fpu
.state
->xsave
,
3053 guest_xsave
->region
, vcpu
->arch
.guest_xstate_size
);
3055 if (xstate_bv
& ~XSTATE_FPSSE
)
3057 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
3058 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
3063 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3064 struct kvm_xcrs
*guest_xcrs
)
3066 if (!cpu_has_xsave
) {
3067 guest_xcrs
->nr_xcrs
= 0;
3071 guest_xcrs
->nr_xcrs
= 1;
3072 guest_xcrs
->flags
= 0;
3073 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3074 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3077 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3078 struct kvm_xcrs
*guest_xcrs
)
3085 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3088 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3089 /* Only support XCR0 currently */
3090 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3091 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3092 guest_xcrs
->xcrs
[i
].value
);
3101 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3102 * stopped by the hypervisor. This function will be called from the host only.
3103 * EINVAL is returned when the host attempts to set the flag for a guest that
3104 * does not support pv clocks.
3106 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3108 if (!vcpu
->arch
.pv_time_enabled
)
3110 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3111 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3115 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3116 unsigned int ioctl
, unsigned long arg
)
3118 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3119 void __user
*argp
= (void __user
*)arg
;
3122 struct kvm_lapic_state
*lapic
;
3123 struct kvm_xsave
*xsave
;
3124 struct kvm_xcrs
*xcrs
;
3130 case KVM_GET_LAPIC
: {
3132 if (!vcpu
->arch
.apic
)
3134 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3139 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3143 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3148 case KVM_SET_LAPIC
: {
3150 if (!vcpu
->arch
.apic
)
3152 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3153 if (IS_ERR(u
.lapic
))
3154 return PTR_ERR(u
.lapic
);
3156 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3159 case KVM_INTERRUPT
: {
3160 struct kvm_interrupt irq
;
3163 if (copy_from_user(&irq
, argp
, sizeof irq
))
3165 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3169 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3172 case KVM_SET_CPUID
: {
3173 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3174 struct kvm_cpuid cpuid
;
3177 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3179 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3182 case KVM_SET_CPUID2
: {
3183 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3184 struct kvm_cpuid2 cpuid
;
3187 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3189 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3190 cpuid_arg
->entries
);
3193 case KVM_GET_CPUID2
: {
3194 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3195 struct kvm_cpuid2 cpuid
;
3198 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3200 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3201 cpuid_arg
->entries
);
3205 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3211 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
3214 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3216 case KVM_TPR_ACCESS_REPORTING
: {
3217 struct kvm_tpr_access_ctl tac
;
3220 if (copy_from_user(&tac
, argp
, sizeof tac
))
3222 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3226 if (copy_to_user(argp
, &tac
, sizeof tac
))
3231 case KVM_SET_VAPIC_ADDR
: {
3232 struct kvm_vapic_addr va
;
3235 if (!irqchip_in_kernel(vcpu
->kvm
))
3238 if (copy_from_user(&va
, argp
, sizeof va
))
3240 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3243 case KVM_X86_SETUP_MCE
: {
3247 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3249 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3252 case KVM_X86_SET_MCE
: {
3253 struct kvm_x86_mce mce
;
3256 if (copy_from_user(&mce
, argp
, sizeof mce
))
3258 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3261 case KVM_GET_VCPU_EVENTS
: {
3262 struct kvm_vcpu_events events
;
3264 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3267 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3272 case KVM_SET_VCPU_EVENTS
: {
3273 struct kvm_vcpu_events events
;
3276 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3279 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3282 case KVM_GET_DEBUGREGS
: {
3283 struct kvm_debugregs dbgregs
;
3285 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3288 if (copy_to_user(argp
, &dbgregs
,
3289 sizeof(struct kvm_debugregs
)))
3294 case KVM_SET_DEBUGREGS
: {
3295 struct kvm_debugregs dbgregs
;
3298 if (copy_from_user(&dbgregs
, argp
,
3299 sizeof(struct kvm_debugregs
)))
3302 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3305 case KVM_GET_XSAVE
: {
3306 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3311 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3314 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3319 case KVM_SET_XSAVE
: {
3320 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3321 if (IS_ERR(u
.xsave
))
3322 return PTR_ERR(u
.xsave
);
3324 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3327 case KVM_GET_XCRS
: {
3328 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3333 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3336 if (copy_to_user(argp
, u
.xcrs
,
3337 sizeof(struct kvm_xcrs
)))
3342 case KVM_SET_XCRS
: {
3343 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3345 return PTR_ERR(u
.xcrs
);
3347 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3350 case KVM_SET_TSC_KHZ
: {
3354 user_tsc_khz
= (u32
)arg
;
3356 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3359 if (user_tsc_khz
== 0)
3360 user_tsc_khz
= tsc_khz
;
3362 kvm_set_tsc_khz(vcpu
, user_tsc_khz
);
3367 case KVM_GET_TSC_KHZ
: {
3368 r
= vcpu
->arch
.virtual_tsc_khz
;
3371 case KVM_KVMCLOCK_CTRL
: {
3372 r
= kvm_set_guest_paused(vcpu
);
3383 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3385 return VM_FAULT_SIGBUS
;
3388 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3392 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3394 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3398 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3401 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3405 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3406 u32 kvm_nr_mmu_pages
)
3408 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3411 mutex_lock(&kvm
->slots_lock
);
3413 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3414 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3416 mutex_unlock(&kvm
->slots_lock
);
3420 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3422 return kvm
->arch
.n_max_mmu_pages
;
3425 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3430 switch (chip
->chip_id
) {
3431 case KVM_IRQCHIP_PIC_MASTER
:
3432 memcpy(&chip
->chip
.pic
,
3433 &pic_irqchip(kvm
)->pics
[0],
3434 sizeof(struct kvm_pic_state
));
3436 case KVM_IRQCHIP_PIC_SLAVE
:
3437 memcpy(&chip
->chip
.pic
,
3438 &pic_irqchip(kvm
)->pics
[1],
3439 sizeof(struct kvm_pic_state
));
3441 case KVM_IRQCHIP_IOAPIC
:
3442 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3451 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3456 switch (chip
->chip_id
) {
3457 case KVM_IRQCHIP_PIC_MASTER
:
3458 spin_lock(&pic_irqchip(kvm
)->lock
);
3459 memcpy(&pic_irqchip(kvm
)->pics
[0],
3461 sizeof(struct kvm_pic_state
));
3462 spin_unlock(&pic_irqchip(kvm
)->lock
);
3464 case KVM_IRQCHIP_PIC_SLAVE
:
3465 spin_lock(&pic_irqchip(kvm
)->lock
);
3466 memcpy(&pic_irqchip(kvm
)->pics
[1],
3468 sizeof(struct kvm_pic_state
));
3469 spin_unlock(&pic_irqchip(kvm
)->lock
);
3471 case KVM_IRQCHIP_IOAPIC
:
3472 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3478 kvm_pic_update_irq(pic_irqchip(kvm
));
3482 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3486 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3487 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3488 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3492 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3496 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3497 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3498 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3499 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3503 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3507 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3508 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3509 sizeof(ps
->channels
));
3510 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3511 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3512 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3516 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3518 int r
= 0, start
= 0;
3519 u32 prev_legacy
, cur_legacy
;
3520 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3521 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3522 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3523 if (!prev_legacy
&& cur_legacy
)
3525 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3526 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3527 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3528 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3529 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3533 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3534 struct kvm_reinject_control
*control
)
3536 if (!kvm
->arch
.vpit
)
3538 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3539 kvm
->arch
.vpit
->pit_state
.reinject
= control
->pit_reinject
;
3540 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3545 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3546 * @kvm: kvm instance
3547 * @log: slot id and address to which we copy the log
3549 * We need to keep it in mind that VCPU threads can write to the bitmap
3550 * concurrently. So, to avoid losing data, we keep the following order for
3553 * 1. Take a snapshot of the bit and clear it if needed.
3554 * 2. Write protect the corresponding page.
3555 * 3. Flush TLB's if needed.
3556 * 4. Copy the snapshot to the userspace.
3558 * Between 2 and 3, the guest may write to the page using the remaining TLB
3559 * entry. This is not a problem because the page will be reported dirty at
3560 * step 4 using the snapshot taken before and step 3 ensures that successive
3561 * writes will be logged for the next call.
3563 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3566 struct kvm_memory_slot
*memslot
;
3568 unsigned long *dirty_bitmap
;
3569 unsigned long *dirty_bitmap_buffer
;
3570 bool is_dirty
= false;
3572 mutex_lock(&kvm
->slots_lock
);
3575 if (log
->slot
>= KVM_USER_MEM_SLOTS
)
3578 memslot
= id_to_memslot(kvm
->memslots
, log
->slot
);
3580 dirty_bitmap
= memslot
->dirty_bitmap
;
3585 n
= kvm_dirty_bitmap_bytes(memslot
);
3587 dirty_bitmap_buffer
= dirty_bitmap
+ n
/ sizeof(long);
3588 memset(dirty_bitmap_buffer
, 0, n
);
3590 spin_lock(&kvm
->mmu_lock
);
3592 for (i
= 0; i
< n
/ sizeof(long); i
++) {
3596 if (!dirty_bitmap
[i
])
3601 mask
= xchg(&dirty_bitmap
[i
], 0);
3602 dirty_bitmap_buffer
[i
] = mask
;
3604 offset
= i
* BITS_PER_LONG
;
3605 kvm_mmu_write_protect_pt_masked(kvm
, memslot
, offset
, mask
);
3608 kvm_flush_remote_tlbs(kvm
);
3610 spin_unlock(&kvm
->mmu_lock
);
3613 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap_buffer
, n
))
3618 mutex_unlock(&kvm
->slots_lock
);
3622 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3625 if (!irqchip_in_kernel(kvm
))
3628 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3629 irq_event
->irq
, irq_event
->level
,
3634 long kvm_arch_vm_ioctl(struct file
*filp
,
3635 unsigned int ioctl
, unsigned long arg
)
3637 struct kvm
*kvm
= filp
->private_data
;
3638 void __user
*argp
= (void __user
*)arg
;
3641 * This union makes it completely explicit to gcc-3.x
3642 * that these two variables' stack usage should be
3643 * combined, not added together.
3646 struct kvm_pit_state ps
;
3647 struct kvm_pit_state2 ps2
;
3648 struct kvm_pit_config pit_config
;
3652 case KVM_SET_TSS_ADDR
:
3653 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3655 case KVM_SET_IDENTITY_MAP_ADDR
: {
3659 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3661 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3664 case KVM_SET_NR_MMU_PAGES
:
3665 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3667 case KVM_GET_NR_MMU_PAGES
:
3668 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3670 case KVM_CREATE_IRQCHIP
: {
3671 struct kvm_pic
*vpic
;
3673 mutex_lock(&kvm
->lock
);
3676 goto create_irqchip_unlock
;
3678 if (atomic_read(&kvm
->online_vcpus
))
3679 goto create_irqchip_unlock
;
3681 vpic
= kvm_create_pic(kvm
);
3683 r
= kvm_ioapic_init(kvm
);
3685 mutex_lock(&kvm
->slots_lock
);
3686 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3688 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3690 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3692 mutex_unlock(&kvm
->slots_lock
);
3694 goto create_irqchip_unlock
;
3697 goto create_irqchip_unlock
;
3699 kvm
->arch
.vpic
= vpic
;
3701 r
= kvm_setup_default_irq_routing(kvm
);
3703 mutex_lock(&kvm
->slots_lock
);
3704 mutex_lock(&kvm
->irq_lock
);
3705 kvm_ioapic_destroy(kvm
);
3706 kvm_destroy_pic(kvm
);
3707 mutex_unlock(&kvm
->irq_lock
);
3708 mutex_unlock(&kvm
->slots_lock
);
3710 create_irqchip_unlock
:
3711 mutex_unlock(&kvm
->lock
);
3714 case KVM_CREATE_PIT
:
3715 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3717 case KVM_CREATE_PIT2
:
3719 if (copy_from_user(&u
.pit_config
, argp
,
3720 sizeof(struct kvm_pit_config
)))
3723 mutex_lock(&kvm
->slots_lock
);
3726 goto create_pit_unlock
;
3728 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3732 mutex_unlock(&kvm
->slots_lock
);
3734 case KVM_GET_IRQCHIP
: {
3735 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3736 struct kvm_irqchip
*chip
;
3738 chip
= memdup_user(argp
, sizeof(*chip
));
3745 if (!irqchip_in_kernel(kvm
))
3746 goto get_irqchip_out
;
3747 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3749 goto get_irqchip_out
;
3751 if (copy_to_user(argp
, chip
, sizeof *chip
))
3752 goto get_irqchip_out
;
3758 case KVM_SET_IRQCHIP
: {
3759 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3760 struct kvm_irqchip
*chip
;
3762 chip
= memdup_user(argp
, sizeof(*chip
));
3769 if (!irqchip_in_kernel(kvm
))
3770 goto set_irqchip_out
;
3771 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3773 goto set_irqchip_out
;
3781 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3784 if (!kvm
->arch
.vpit
)
3786 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3790 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3797 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3800 if (!kvm
->arch
.vpit
)
3802 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3805 case KVM_GET_PIT2
: {
3807 if (!kvm
->arch
.vpit
)
3809 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3813 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3818 case KVM_SET_PIT2
: {
3820 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3823 if (!kvm
->arch
.vpit
)
3825 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3828 case KVM_REINJECT_CONTROL
: {
3829 struct kvm_reinject_control control
;
3831 if (copy_from_user(&control
, argp
, sizeof(control
)))
3833 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3836 case KVM_XEN_HVM_CONFIG
: {
3838 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3839 sizeof(struct kvm_xen_hvm_config
)))
3842 if (kvm
->arch
.xen_hvm_config
.flags
)
3847 case KVM_SET_CLOCK
: {
3848 struct kvm_clock_data user_ns
;
3853 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3861 local_irq_disable();
3862 now_ns
= get_kernel_ns();
3863 delta
= user_ns
.clock
- now_ns
;
3865 kvm
->arch
.kvmclock_offset
= delta
;
3866 kvm_gen_update_masterclock(kvm
);
3869 case KVM_GET_CLOCK
: {
3870 struct kvm_clock_data user_ns
;
3873 local_irq_disable();
3874 now_ns
= get_kernel_ns();
3875 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3878 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
3881 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3894 static void kvm_init_msr_list(void)
3899 /* skip the first msrs in the list. KVM-specific */
3900 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3901 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3904 msrs_to_save
[j
] = msrs_to_save
[i
];
3907 num_msrs_to_save
= j
;
3910 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3918 if (!(vcpu
->arch
.apic
&&
3919 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3920 && kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3931 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3938 if (!(vcpu
->arch
.apic
&&
3939 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3940 && kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3942 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
3952 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3953 struct kvm_segment
*var
, int seg
)
3955 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3958 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3959 struct kvm_segment
*var
, int seg
)
3961 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3964 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3967 struct x86_exception exception
;
3969 BUG_ON(!mmu_is_nested(vcpu
));
3971 /* NPT walks are always user-walks */
3972 access
|= PFERR_USER_MASK
;
3973 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, &exception
);
3978 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
3979 struct x86_exception
*exception
)
3981 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3982 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3985 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
3986 struct x86_exception
*exception
)
3988 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3989 access
|= PFERR_FETCH_MASK
;
3990 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3993 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
3994 struct x86_exception
*exception
)
3996 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3997 access
|= PFERR_WRITE_MASK
;
3998 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4001 /* uses this to access any guest's mapped memory without checking CPL */
4002 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4003 struct x86_exception
*exception
)
4005 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4008 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4009 struct kvm_vcpu
*vcpu
, u32 access
,
4010 struct x86_exception
*exception
)
4013 int r
= X86EMUL_CONTINUE
;
4016 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4018 unsigned offset
= addr
& (PAGE_SIZE
-1);
4019 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4022 if (gpa
== UNMAPPED_GVA
)
4023 return X86EMUL_PROPAGATE_FAULT
;
4024 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
4026 r
= X86EMUL_IO_NEEDED
;
4038 /* used for instruction fetching */
4039 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4040 gva_t addr
, void *val
, unsigned int bytes
,
4041 struct x86_exception
*exception
)
4043 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4044 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4046 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
,
4047 access
| PFERR_FETCH_MASK
,
4051 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4052 gva_t addr
, void *val
, unsigned int bytes
,
4053 struct x86_exception
*exception
)
4055 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4056 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4058 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4061 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4063 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4064 gva_t addr
, void *val
, unsigned int bytes
,
4065 struct x86_exception
*exception
)
4067 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4068 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4071 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4072 gva_t addr
, void *val
,
4074 struct x86_exception
*exception
)
4076 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4078 int r
= X86EMUL_CONTINUE
;
4081 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4084 unsigned offset
= addr
& (PAGE_SIZE
-1);
4085 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4088 if (gpa
== UNMAPPED_GVA
)
4089 return X86EMUL_PROPAGATE_FAULT
;
4090 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
4092 r
= X86EMUL_IO_NEEDED
;
4103 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4105 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4106 gpa_t
*gpa
, struct x86_exception
*exception
,
4109 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4110 | (write
? PFERR_WRITE_MASK
: 0);
4112 if (vcpu_match_mmio_gva(vcpu
, gva
)
4113 && !permission_fault(vcpu
->arch
.walk_mmu
, vcpu
->arch
.access
, access
)) {
4114 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4115 (gva
& (PAGE_SIZE
- 1));
4116 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4120 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4122 if (*gpa
== UNMAPPED_GVA
)
4125 /* For APIC access vmexit */
4126 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4129 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4130 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4137 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4138 const void *val
, int bytes
)
4142 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4145 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
);
4149 struct read_write_emulator_ops
{
4150 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4152 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4153 void *val
, int bytes
);
4154 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4155 int bytes
, void *val
);
4156 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4157 void *val
, int bytes
);
4161 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4163 if (vcpu
->mmio_read_completed
) {
4164 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4165 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4166 vcpu
->mmio_read_completed
= 0;
4173 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4174 void *val
, int bytes
)
4176 return !kvm_read_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4179 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4180 void *val
, int bytes
)
4182 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4185 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4187 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4188 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4191 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4192 void *val
, int bytes
)
4194 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4195 return X86EMUL_IO_NEEDED
;
4198 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4199 void *val
, int bytes
)
4201 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4203 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4204 return X86EMUL_CONTINUE
;
4207 static const struct read_write_emulator_ops read_emultor
= {
4208 .read_write_prepare
= read_prepare
,
4209 .read_write_emulate
= read_emulate
,
4210 .read_write_mmio
= vcpu_mmio_read
,
4211 .read_write_exit_mmio
= read_exit_mmio
,
4214 static const struct read_write_emulator_ops write_emultor
= {
4215 .read_write_emulate
= write_emulate
,
4216 .read_write_mmio
= write_mmio
,
4217 .read_write_exit_mmio
= write_exit_mmio
,
4221 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4223 struct x86_exception
*exception
,
4224 struct kvm_vcpu
*vcpu
,
4225 const struct read_write_emulator_ops
*ops
)
4229 bool write
= ops
->write
;
4230 struct kvm_mmio_fragment
*frag
;
4232 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4235 return X86EMUL_PROPAGATE_FAULT
;
4237 /* For APIC access vmexit */
4241 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4242 return X86EMUL_CONTINUE
;
4246 * Is this MMIO handled locally?
4248 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4249 if (handled
== bytes
)
4250 return X86EMUL_CONTINUE
;
4256 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4257 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4261 return X86EMUL_CONTINUE
;
4264 int emulator_read_write(struct x86_emulate_ctxt
*ctxt
, unsigned long addr
,
4265 void *val
, unsigned int bytes
,
4266 struct x86_exception
*exception
,
4267 const struct read_write_emulator_ops
*ops
)
4269 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4273 if (ops
->read_write_prepare
&&
4274 ops
->read_write_prepare(vcpu
, val
, bytes
))
4275 return X86EMUL_CONTINUE
;
4277 vcpu
->mmio_nr_fragments
= 0;
4279 /* Crossing a page boundary? */
4280 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4283 now
= -addr
& ~PAGE_MASK
;
4284 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4287 if (rc
!= X86EMUL_CONTINUE
)
4294 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4296 if (rc
!= X86EMUL_CONTINUE
)
4299 if (!vcpu
->mmio_nr_fragments
)
4302 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4304 vcpu
->mmio_needed
= 1;
4305 vcpu
->mmio_cur_fragment
= 0;
4307 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4308 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4309 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4310 vcpu
->run
->mmio
.phys_addr
= gpa
;
4312 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4315 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4319 struct x86_exception
*exception
)
4321 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4322 exception
, &read_emultor
);
4325 int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4329 struct x86_exception
*exception
)
4331 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4332 exception
, &write_emultor
);
4335 #define CMPXCHG_TYPE(t, ptr, old, new) \
4336 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4338 #ifdef CONFIG_X86_64
4339 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4341 # define CMPXCHG64(ptr, old, new) \
4342 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4345 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4350 struct x86_exception
*exception
)
4352 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4358 /* guests cmpxchg8b have to be emulated atomically */
4359 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4362 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4364 if (gpa
== UNMAPPED_GVA
||
4365 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4368 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4371 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4372 if (is_error_page(page
))
4375 kaddr
= kmap_atomic(page
);
4376 kaddr
+= offset_in_page(gpa
);
4379 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4382 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4385 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4388 exchanged
= CMPXCHG64(kaddr
, old
, new);
4393 kunmap_atomic(kaddr
);
4394 kvm_release_page_dirty(page
);
4397 return X86EMUL_CMPXCHG_FAILED
;
4399 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
);
4401 return X86EMUL_CONTINUE
;
4404 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4406 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4409 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4411 /* TODO: String I/O for in kernel device */
4414 if (vcpu
->arch
.pio
.in
)
4415 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4416 vcpu
->arch
.pio
.size
, pd
);
4418 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
4419 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4424 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4425 unsigned short port
, void *val
,
4426 unsigned int count
, bool in
)
4428 trace_kvm_pio(!in
, port
, size
, count
);
4430 vcpu
->arch
.pio
.port
= port
;
4431 vcpu
->arch
.pio
.in
= in
;
4432 vcpu
->arch
.pio
.count
= count
;
4433 vcpu
->arch
.pio
.size
= size
;
4435 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4436 vcpu
->arch
.pio
.count
= 0;
4440 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4441 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4442 vcpu
->run
->io
.size
= size
;
4443 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4444 vcpu
->run
->io
.count
= count
;
4445 vcpu
->run
->io
.port
= port
;
4450 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4451 int size
, unsigned short port
, void *val
,
4454 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4457 if (vcpu
->arch
.pio
.count
)
4460 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4463 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4464 vcpu
->arch
.pio
.count
= 0;
4471 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4472 int size
, unsigned short port
,
4473 const void *val
, unsigned int count
)
4475 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4477 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4478 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4481 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4483 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4486 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4488 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4491 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4493 if (!need_emulate_wbinvd(vcpu
))
4494 return X86EMUL_CONTINUE
;
4496 if (kvm_x86_ops
->has_wbinvd_exit()) {
4497 int cpu
= get_cpu();
4499 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4500 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4501 wbinvd_ipi
, NULL
, 1);
4503 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4506 return X86EMUL_CONTINUE
;
4508 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4510 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4512 kvm_emulate_wbinvd(emul_to_vcpu(ctxt
));
4515 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
4517 return _kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4520 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
4523 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4526 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4528 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4531 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4533 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4534 unsigned long value
;
4538 value
= kvm_read_cr0(vcpu
);
4541 value
= vcpu
->arch
.cr2
;
4544 value
= kvm_read_cr3(vcpu
);
4547 value
= kvm_read_cr4(vcpu
);
4550 value
= kvm_get_cr8(vcpu
);
4553 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4560 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4562 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4567 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4570 vcpu
->arch
.cr2
= val
;
4573 res
= kvm_set_cr3(vcpu
, val
);
4576 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4579 res
= kvm_set_cr8(vcpu
, val
);
4582 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4589 static void emulator_set_rflags(struct x86_emulate_ctxt
*ctxt
, ulong val
)
4591 kvm_set_rflags(emul_to_vcpu(ctxt
), val
);
4594 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4596 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4599 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4601 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4604 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4606 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4609 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4611 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4614 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4616 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4619 static unsigned long emulator_get_cached_segment_base(
4620 struct x86_emulate_ctxt
*ctxt
, int seg
)
4622 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4625 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4626 struct desc_struct
*desc
, u32
*base3
,
4629 struct kvm_segment var
;
4631 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4632 *selector
= var
.selector
;
4635 memset(desc
, 0, sizeof(*desc
));
4641 set_desc_limit(desc
, var
.limit
);
4642 set_desc_base(desc
, (unsigned long)var
.base
);
4643 #ifdef CONFIG_X86_64
4645 *base3
= var
.base
>> 32;
4647 desc
->type
= var
.type
;
4649 desc
->dpl
= var
.dpl
;
4650 desc
->p
= var
.present
;
4651 desc
->avl
= var
.avl
;
4659 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4660 struct desc_struct
*desc
, u32 base3
,
4663 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4664 struct kvm_segment var
;
4666 var
.selector
= selector
;
4667 var
.base
= get_desc_base(desc
);
4668 #ifdef CONFIG_X86_64
4669 var
.base
|= ((u64
)base3
) << 32;
4671 var
.limit
= get_desc_limit(desc
);
4673 var
.limit
= (var
.limit
<< 12) | 0xfff;
4674 var
.type
= desc
->type
;
4675 var
.present
= desc
->p
;
4676 var
.dpl
= desc
->dpl
;
4681 var
.avl
= desc
->avl
;
4682 var
.present
= desc
->p
;
4683 var
.unusable
= !var
.present
;
4686 kvm_set_segment(vcpu
, &var
, seg
);
4690 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4691 u32 msr_index
, u64
*pdata
)
4693 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
4696 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4697 u32 msr_index
, u64 data
)
4699 struct msr_data msr
;
4702 msr
.index
= msr_index
;
4703 msr
.host_initiated
= false;
4704 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
4707 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
4708 u32 pmc
, u64
*pdata
)
4710 return kvm_pmu_read_pmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
4713 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4715 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4718 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4721 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4723 * CR0.TS may reference the host fpu state, not the guest fpu state,
4724 * so it may be clear at this point.
4729 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4734 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4735 struct x86_instruction_info
*info
,
4736 enum x86_intercept_stage stage
)
4738 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
4741 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
4742 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
4744 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
4747 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
4749 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
4752 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
4754 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
4757 static const struct x86_emulate_ops emulate_ops
= {
4758 .read_gpr
= emulator_read_gpr
,
4759 .write_gpr
= emulator_write_gpr
,
4760 .read_std
= kvm_read_guest_virt_system
,
4761 .write_std
= kvm_write_guest_virt_system
,
4762 .fetch
= kvm_fetch_guest_virt
,
4763 .read_emulated
= emulator_read_emulated
,
4764 .write_emulated
= emulator_write_emulated
,
4765 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4766 .invlpg
= emulator_invlpg
,
4767 .pio_in_emulated
= emulator_pio_in_emulated
,
4768 .pio_out_emulated
= emulator_pio_out_emulated
,
4769 .get_segment
= emulator_get_segment
,
4770 .set_segment
= emulator_set_segment
,
4771 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4772 .get_gdt
= emulator_get_gdt
,
4773 .get_idt
= emulator_get_idt
,
4774 .set_gdt
= emulator_set_gdt
,
4775 .set_idt
= emulator_set_idt
,
4776 .get_cr
= emulator_get_cr
,
4777 .set_cr
= emulator_set_cr
,
4778 .set_rflags
= emulator_set_rflags
,
4779 .cpl
= emulator_get_cpl
,
4780 .get_dr
= emulator_get_dr
,
4781 .set_dr
= emulator_set_dr
,
4782 .set_msr
= emulator_set_msr
,
4783 .get_msr
= emulator_get_msr
,
4784 .read_pmc
= emulator_read_pmc
,
4785 .halt
= emulator_halt
,
4786 .wbinvd
= emulator_wbinvd
,
4787 .fix_hypercall
= emulator_fix_hypercall
,
4788 .get_fpu
= emulator_get_fpu
,
4789 .put_fpu
= emulator_put_fpu
,
4790 .intercept
= emulator_intercept
,
4791 .get_cpuid
= emulator_get_cpuid
,
4794 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4796 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
, mask
);
4798 * an sti; sti; sequence only disable interrupts for the first
4799 * instruction. So, if the last instruction, be it emulated or
4800 * not, left the system with the INT_STI flag enabled, it
4801 * means that the last instruction is an sti. We should not
4802 * leave the flag on in this case. The same goes for mov ss
4804 if (!(int_shadow
& mask
))
4805 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4808 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4810 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4811 if (ctxt
->exception
.vector
== PF_VECTOR
)
4812 kvm_propagate_fault(vcpu
, &ctxt
->exception
);
4813 else if (ctxt
->exception
.error_code_valid
)
4814 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
4815 ctxt
->exception
.error_code
);
4817 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
4820 static void init_decode_cache(struct x86_emulate_ctxt
*ctxt
)
4822 memset(&ctxt
->opcode_len
, 0,
4823 (void *)&ctxt
->_regs
- (void *)&ctxt
->opcode_len
);
4825 ctxt
->fetch
.start
= 0;
4826 ctxt
->fetch
.end
= 0;
4827 ctxt
->io_read
.pos
= 0;
4828 ctxt
->io_read
.end
= 0;
4829 ctxt
->mem_read
.pos
= 0;
4830 ctxt
->mem_read
.end
= 0;
4833 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4835 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4838 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4840 ctxt
->eflags
= kvm_get_rflags(vcpu
);
4841 ctxt
->eip
= kvm_rip_read(vcpu
);
4842 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4843 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
4844 cs_l
? X86EMUL_MODE_PROT64
:
4845 cs_db
? X86EMUL_MODE_PROT32
:
4846 X86EMUL_MODE_PROT16
;
4847 ctxt
->guest_mode
= is_guest_mode(vcpu
);
4849 init_decode_cache(ctxt
);
4850 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4853 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
4855 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4858 init_emulate_ctxt(vcpu
);
4862 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
4863 ret
= emulate_int_real(ctxt
, irq
);
4865 if (ret
!= X86EMUL_CONTINUE
)
4866 return EMULATE_FAIL
;
4868 ctxt
->eip
= ctxt
->_eip
;
4869 kvm_rip_write(vcpu
, ctxt
->eip
);
4870 kvm_set_rflags(vcpu
, ctxt
->eflags
);
4872 if (irq
== NMI_VECTOR
)
4873 vcpu
->arch
.nmi_pending
= 0;
4875 vcpu
->arch
.interrupt
.pending
= false;
4877 return EMULATE_DONE
;
4879 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4881 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4883 int r
= EMULATE_DONE
;
4885 ++vcpu
->stat
.insn_emulation_fail
;
4886 trace_kvm_emulate_insn_failed(vcpu
);
4887 if (!is_guest_mode(vcpu
)) {
4888 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4889 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4890 vcpu
->run
->internal
.ndata
= 0;
4893 kvm_queue_exception(vcpu
, UD_VECTOR
);
4898 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
4899 bool write_fault_to_shadow_pgtable
,
4905 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
4908 if (!vcpu
->arch
.mmu
.direct_map
) {
4910 * Write permission should be allowed since only
4911 * write access need to be emulated.
4913 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
4916 * If the mapping is invalid in guest, let cpu retry
4917 * it to generate fault.
4919 if (gpa
== UNMAPPED_GVA
)
4924 * Do not retry the unhandleable instruction if it faults on the
4925 * readonly host memory, otherwise it will goto a infinite loop:
4926 * retry instruction -> write #PF -> emulation fail -> retry
4927 * instruction -> ...
4929 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
4932 * If the instruction failed on the error pfn, it can not be fixed,
4933 * report the error to userspace.
4935 if (is_error_noslot_pfn(pfn
))
4938 kvm_release_pfn_clean(pfn
);
4940 /* The instructions are well-emulated on direct mmu. */
4941 if (vcpu
->arch
.mmu
.direct_map
) {
4942 unsigned int indirect_shadow_pages
;
4944 spin_lock(&vcpu
->kvm
->mmu_lock
);
4945 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
4946 spin_unlock(&vcpu
->kvm
->mmu_lock
);
4948 if (indirect_shadow_pages
)
4949 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
4955 * if emulation was due to access to shadowed page table
4956 * and it failed try to unshadow page and re-enter the
4957 * guest to let CPU execute the instruction.
4959 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
4962 * If the access faults on its page table, it can not
4963 * be fixed by unprotecting shadow page and it should
4964 * be reported to userspace.
4966 return !write_fault_to_shadow_pgtable
;
4969 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
4970 unsigned long cr2
, int emulation_type
)
4972 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4973 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
4975 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
4976 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
4979 * If the emulation is caused by #PF and it is non-page_table
4980 * writing instruction, it means the VM-EXIT is caused by shadow
4981 * page protected, we can zap the shadow page and retry this
4982 * instruction directly.
4984 * Note: if the guest uses a non-page-table modifying instruction
4985 * on the PDE that points to the instruction, then we will unmap
4986 * the instruction and go to an infinite loop. So, we cache the
4987 * last retried eip and the last fault address, if we meet the eip
4988 * and the address again, we can break out of the potential infinite
4991 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
4993 if (!(emulation_type
& EMULTYPE_RETRY
))
4996 if (x86_page_table_writing_insn(ctxt
))
4999 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5002 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5003 vcpu
->arch
.last_retry_addr
= cr2
;
5005 if (!vcpu
->arch
.mmu
.direct_map
)
5006 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5008 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5013 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5014 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5016 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5025 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5026 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5031 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, int *r
)
5033 struct kvm_run
*kvm_run
= vcpu
->run
;
5036 * Use the "raw" value to see if TF was passed to the processor.
5037 * Note that the new value of the flags has not been saved yet.
5039 * This is correct even for TF set by the guest, because "the
5040 * processor will not generate this exception after the instruction
5041 * that sets the TF flag".
5043 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5045 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5046 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5047 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
;
5048 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5049 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5050 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5051 *r
= EMULATE_USER_EXIT
;
5053 vcpu
->arch
.emulate_ctxt
.eflags
&= ~X86_EFLAGS_TF
;
5055 * "Certain debug exceptions may clear bit 0-3. The
5056 * remaining contents of the DR6 register are never
5057 * cleared by the processor".
5059 vcpu
->arch
.dr6
&= ~15;
5060 vcpu
->arch
.dr6
|= DR6_BS
;
5061 kvm_queue_exception(vcpu
, DB_VECTOR
);
5066 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5068 struct kvm_run
*kvm_run
= vcpu
->run
;
5069 unsigned long eip
= vcpu
->arch
.emulate_ctxt
.eip
;
5072 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5073 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5074 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5075 vcpu
->arch
.guest_debug_dr7
,
5079 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
;
5080 kvm_run
->debug
.arch
.pc
= kvm_rip_read(vcpu
) +
5081 get_segment_base(vcpu
, VCPU_SREG_CS
);
5083 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5084 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5085 *r
= EMULATE_USER_EXIT
;
5090 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
)) {
5091 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5096 vcpu
->arch
.dr6
&= ~15;
5097 vcpu
->arch
.dr6
|= dr6
;
5098 kvm_queue_exception(vcpu
, DB_VECTOR
);
5107 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5114 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5115 bool writeback
= true;
5116 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5119 * Clear write_fault_to_shadow_pgtable here to ensure it is
5122 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5123 kvm_clear_exception_queue(vcpu
);
5125 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5126 init_emulate_ctxt(vcpu
);
5129 * We will reenter on the same instruction since
5130 * we do not set complete_userspace_io. This does not
5131 * handle watchpoints yet, those would be handled in
5134 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5137 ctxt
->interruptibility
= 0;
5138 ctxt
->have_exception
= false;
5139 ctxt
->perm_ok
= false;
5141 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5143 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5145 trace_kvm_emulate_insn_start(vcpu
);
5146 ++vcpu
->stat
.insn_emulation
;
5147 if (r
!= EMULATION_OK
) {
5148 if (emulation_type
& EMULTYPE_TRAP_UD
)
5149 return EMULATE_FAIL
;
5150 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5152 return EMULATE_DONE
;
5153 if (emulation_type
& EMULTYPE_SKIP
)
5154 return EMULATE_FAIL
;
5155 return handle_emulation_failure(vcpu
);
5159 if (emulation_type
& EMULTYPE_SKIP
) {
5160 kvm_rip_write(vcpu
, ctxt
->_eip
);
5161 return EMULATE_DONE
;
5164 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5165 return EMULATE_DONE
;
5167 /* this is needed for vmware backdoor interface to work since it
5168 changes registers values during IO operation */
5169 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5170 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5171 emulator_invalidate_register_cache(ctxt
);
5175 r
= x86_emulate_insn(ctxt
);
5177 if (r
== EMULATION_INTERCEPTED
)
5178 return EMULATE_DONE
;
5180 if (r
== EMULATION_FAILED
) {
5181 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5183 return EMULATE_DONE
;
5185 return handle_emulation_failure(vcpu
);
5188 if (ctxt
->have_exception
) {
5189 inject_emulated_exception(vcpu
);
5191 } else if (vcpu
->arch
.pio
.count
) {
5192 if (!vcpu
->arch
.pio
.in
) {
5193 /* FIXME: return into emulator if single-stepping. */
5194 vcpu
->arch
.pio
.count
= 0;
5197 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5199 r
= EMULATE_USER_EXIT
;
5200 } else if (vcpu
->mmio_needed
) {
5201 if (!vcpu
->mmio_is_write
)
5203 r
= EMULATE_USER_EXIT
;
5204 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5205 } else if (r
== EMULATION_RESTART
)
5211 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5212 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5213 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5214 kvm_rip_write(vcpu
, ctxt
->eip
);
5215 if (r
== EMULATE_DONE
)
5216 kvm_vcpu_check_singlestep(vcpu
, &r
);
5217 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5219 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5223 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5225 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5227 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5228 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5229 size
, port
, &val
, 1);
5230 /* do not return to emulator after return from userspace */
5231 vcpu
->arch
.pio
.count
= 0;
5234 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5236 static void tsc_bad(void *info
)
5238 __this_cpu_write(cpu_tsc_khz
, 0);
5241 static void tsc_khz_changed(void *data
)
5243 struct cpufreq_freqs
*freq
= data
;
5244 unsigned long khz
= 0;
5248 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5249 khz
= cpufreq_quick_get(raw_smp_processor_id());
5252 __this_cpu_write(cpu_tsc_khz
, khz
);
5255 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5258 struct cpufreq_freqs
*freq
= data
;
5260 struct kvm_vcpu
*vcpu
;
5261 int i
, send_ipi
= 0;
5264 * We allow guests to temporarily run on slowing clocks,
5265 * provided we notify them after, or to run on accelerating
5266 * clocks, provided we notify them before. Thus time never
5269 * However, we have a problem. We can't atomically update
5270 * the frequency of a given CPU from this function; it is
5271 * merely a notifier, which can be called from any CPU.
5272 * Changing the TSC frequency at arbitrary points in time
5273 * requires a recomputation of local variables related to
5274 * the TSC for each VCPU. We must flag these local variables
5275 * to be updated and be sure the update takes place with the
5276 * new frequency before any guests proceed.
5278 * Unfortunately, the combination of hotplug CPU and frequency
5279 * change creates an intractable locking scenario; the order
5280 * of when these callouts happen is undefined with respect to
5281 * CPU hotplug, and they can race with each other. As such,
5282 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5283 * undefined; you can actually have a CPU frequency change take
5284 * place in between the computation of X and the setting of the
5285 * variable. To protect against this problem, all updates of
5286 * the per_cpu tsc_khz variable are done in an interrupt
5287 * protected IPI, and all callers wishing to update the value
5288 * must wait for a synchronous IPI to complete (which is trivial
5289 * if the caller is on the CPU already). This establishes the
5290 * necessary total order on variable updates.
5292 * Note that because a guest time update may take place
5293 * anytime after the setting of the VCPU's request bit, the
5294 * correct TSC value must be set before the request. However,
5295 * to ensure the update actually makes it to any guest which
5296 * starts running in hardware virtualization between the set
5297 * and the acquisition of the spinlock, we must also ping the
5298 * CPU after setting the request bit.
5302 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5304 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5307 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5309 spin_lock(&kvm_lock
);
5310 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5311 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5312 if (vcpu
->cpu
!= freq
->cpu
)
5314 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5315 if (vcpu
->cpu
!= smp_processor_id())
5319 spin_unlock(&kvm_lock
);
5321 if (freq
->old
< freq
->new && send_ipi
) {
5323 * We upscale the frequency. Must make the guest
5324 * doesn't see old kvmclock values while running with
5325 * the new frequency, otherwise we risk the guest sees
5326 * time go backwards.
5328 * In case we update the frequency for another cpu
5329 * (which might be in guest context) send an interrupt
5330 * to kick the cpu out of guest context. Next time
5331 * guest context is entered kvmclock will be updated,
5332 * so the guest will not see stale values.
5334 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5339 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5340 .notifier_call
= kvmclock_cpufreq_notifier
5343 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
5344 unsigned long action
, void *hcpu
)
5346 unsigned int cpu
= (unsigned long)hcpu
;
5350 case CPU_DOWN_FAILED
:
5351 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5353 case CPU_DOWN_PREPARE
:
5354 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
5360 static struct notifier_block kvmclock_cpu_notifier_block
= {
5361 .notifier_call
= kvmclock_cpu_notifier
,
5362 .priority
= -INT_MAX
5365 static void kvm_timer_init(void)
5369 max_tsc_khz
= tsc_khz
;
5370 register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5371 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5372 #ifdef CONFIG_CPU_FREQ
5373 struct cpufreq_policy policy
;
5374 memset(&policy
, 0, sizeof(policy
));
5376 cpufreq_get_policy(&policy
, cpu
);
5377 if (policy
.cpuinfo
.max_freq
)
5378 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5381 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5382 CPUFREQ_TRANSITION_NOTIFIER
);
5384 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5385 for_each_online_cpu(cpu
)
5386 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5389 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5391 int kvm_is_in_guest(void)
5393 return __this_cpu_read(current_vcpu
) != NULL
;
5396 static int kvm_is_user_mode(void)
5400 if (__this_cpu_read(current_vcpu
))
5401 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5403 return user_mode
!= 0;
5406 static unsigned long kvm_get_guest_ip(void)
5408 unsigned long ip
= 0;
5410 if (__this_cpu_read(current_vcpu
))
5411 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5416 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5417 .is_in_guest
= kvm_is_in_guest
,
5418 .is_user_mode
= kvm_is_user_mode
,
5419 .get_guest_ip
= kvm_get_guest_ip
,
5422 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5424 __this_cpu_write(current_vcpu
, vcpu
);
5426 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5428 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5430 __this_cpu_write(current_vcpu
, NULL
);
5432 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5434 static void kvm_set_mmio_spte_mask(void)
5437 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5440 * Set the reserved bits and the present bit of an paging-structure
5441 * entry to generate page fault with PFER.RSV = 1.
5443 /* Mask the reserved physical address bits. */
5444 mask
= ((1ull << (51 - maxphyaddr
+ 1)) - 1) << maxphyaddr
;
5446 /* Bit 62 is always reserved for 32bit host. */
5447 mask
|= 0x3ull
<< 62;
5449 /* Set the present bit. */
5452 #ifdef CONFIG_X86_64
5454 * If reserved bit is not supported, clear the present bit to disable
5457 if (maxphyaddr
== 52)
5461 kvm_mmu_set_mmio_spte_mask(mask
);
5464 #ifdef CONFIG_X86_64
5465 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5469 struct kvm_vcpu
*vcpu
;
5472 spin_lock(&kvm_lock
);
5473 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5474 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5475 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
, &vcpu
->requests
);
5476 atomic_set(&kvm_guest_has_master_clock
, 0);
5477 spin_unlock(&kvm_lock
);
5480 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5483 * Notification about pvclock gtod data update.
5485 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5488 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5489 struct timekeeper
*tk
= priv
;
5491 update_pvclock_gtod(tk
);
5493 /* disable master clock if host does not trust, or does not
5494 * use, TSC clocksource
5496 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5497 atomic_read(&kvm_guest_has_master_clock
) != 0)
5498 queue_work(system_long_wq
, &pvclock_gtod_work
);
5503 static struct notifier_block pvclock_gtod_notifier
= {
5504 .notifier_call
= pvclock_gtod_notify
,
5508 int kvm_arch_init(void *opaque
)
5511 struct kvm_x86_ops
*ops
= opaque
;
5514 printk(KERN_ERR
"kvm: already loaded the other module\n");
5519 if (!ops
->cpu_has_kvm_support()) {
5520 printk(KERN_ERR
"kvm: no hardware support\n");
5524 if (ops
->disabled_by_bios()) {
5525 printk(KERN_ERR
"kvm: disabled by bios\n");
5531 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
5533 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
5537 r
= kvm_mmu_module_init();
5539 goto out_free_percpu
;
5541 kvm_set_mmio_spte_mask();
5542 kvm_init_msr_list();
5545 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
5546 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
5550 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
5553 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
5556 #ifdef CONFIG_X86_64
5557 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
5563 free_percpu(shared_msrs
);
5568 void kvm_arch_exit(void)
5570 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
5572 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5573 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
5574 CPUFREQ_TRANSITION_NOTIFIER
);
5575 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5576 #ifdef CONFIG_X86_64
5577 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
5580 kvm_mmu_module_exit();
5581 free_percpu(shared_msrs
);
5584 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
5586 ++vcpu
->stat
.halt_exits
;
5587 if (irqchip_in_kernel(vcpu
->kvm
)) {
5588 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
5591 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
5595 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
5597 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
5599 u64 param
, ingpa
, outgpa
, ret
;
5600 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
5601 bool fast
, longmode
;
5605 * hypercall generates UD from non zero cpl and real mode
5608 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
5609 kvm_queue_exception(vcpu
, UD_VECTOR
);
5613 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5614 longmode
= is_long_mode(vcpu
) && cs_l
== 1;
5617 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
5618 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
5619 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
5620 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
5621 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
5622 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
5624 #ifdef CONFIG_X86_64
5626 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5627 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5628 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5632 code
= param
& 0xffff;
5633 fast
= (param
>> 16) & 0x1;
5634 rep_cnt
= (param
>> 32) & 0xfff;
5635 rep_idx
= (param
>> 48) & 0xfff;
5637 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
5640 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
5641 kvm_vcpu_on_spin(vcpu
);
5644 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
5648 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
5650 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5652 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
5653 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
5660 * kvm_pv_kick_cpu_op: Kick a vcpu.
5662 * @apicid - apicid of vcpu to be kicked.
5664 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
5666 struct kvm_lapic_irq lapic_irq
;
5668 lapic_irq
.shorthand
= 0;
5669 lapic_irq
.dest_mode
= 0;
5670 lapic_irq
.dest_id
= apicid
;
5672 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
5673 kvm_irq_delivery_to_apic(kvm
, 0, &lapic_irq
, NULL
);
5676 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5678 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5681 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5682 return kvm_hv_hypercall(vcpu
);
5684 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5685 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5686 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5687 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5688 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5690 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5692 if (!is_long_mode(vcpu
)) {
5700 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5706 case KVM_HC_VAPIC_POLL_IRQ
:
5709 case KVM_HC_KICK_CPU
:
5710 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
5718 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5719 ++vcpu
->stat
.hypercalls
;
5722 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
5724 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
5726 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5727 char instruction
[3];
5728 unsigned long rip
= kvm_rip_read(vcpu
);
5730 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
5732 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
5736 * Check if userspace requested an interrupt window, and that the
5737 * interrupt window is open.
5739 * No need to exit to userspace if we already have an interrupt queued.
5741 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5743 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
5744 vcpu
->run
->request_interrupt_window
&&
5745 kvm_arch_interrupt_allowed(vcpu
));
5748 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5750 struct kvm_run
*kvm_run
= vcpu
->run
;
5752 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5753 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
5754 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
5755 if (irqchip_in_kernel(vcpu
->kvm
))
5756 kvm_run
->ready_for_interrupt_injection
= 1;
5758 kvm_run
->ready_for_interrupt_injection
=
5759 kvm_arch_interrupt_allowed(vcpu
) &&
5760 !kvm_cpu_has_interrupt(vcpu
) &&
5761 !kvm_event_needs_reinjection(vcpu
);
5764 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5768 if (!kvm_x86_ops
->update_cr8_intercept
)
5771 if (!vcpu
->arch
.apic
)
5774 if (!vcpu
->arch
.apic
->vapic_addr
)
5775 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5782 tpr
= kvm_lapic_get_cr8(vcpu
);
5784 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5787 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
5789 /* try to reinject previous events if any */
5790 if (vcpu
->arch
.exception
.pending
) {
5791 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5792 vcpu
->arch
.exception
.has_error_code
,
5793 vcpu
->arch
.exception
.error_code
);
5794 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5795 vcpu
->arch
.exception
.has_error_code
,
5796 vcpu
->arch
.exception
.error_code
,
5797 vcpu
->arch
.exception
.reinject
);
5801 if (vcpu
->arch
.nmi_injected
) {
5802 kvm_x86_ops
->set_nmi(vcpu
);
5806 if (vcpu
->arch
.interrupt
.pending
) {
5807 kvm_x86_ops
->set_irq(vcpu
);
5811 /* try to inject new event if pending */
5812 if (vcpu
->arch
.nmi_pending
) {
5813 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5814 --vcpu
->arch
.nmi_pending
;
5815 vcpu
->arch
.nmi_injected
= true;
5816 kvm_x86_ops
->set_nmi(vcpu
);
5818 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
5819 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5820 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5822 kvm_x86_ops
->set_irq(vcpu
);
5827 static void process_nmi(struct kvm_vcpu
*vcpu
)
5832 * x86 is limited to one NMI running, and one NMI pending after it.
5833 * If an NMI is already in progress, limit further NMIs to just one.
5834 * Otherwise, allow two (and we'll inject the first one immediately).
5836 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
5839 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
5840 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
5841 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5844 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
5846 u64 eoi_exit_bitmap
[4];
5849 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
5852 memset(eoi_exit_bitmap
, 0, 32);
5855 kvm_ioapic_scan_entry(vcpu
, eoi_exit_bitmap
, tmr
);
5856 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
5857 kvm_apic_update_tmr(vcpu
, tmr
);
5861 * Returns 1 to let __vcpu_run() continue the guest execution loop without
5862 * exiting to the userspace. Otherwise, the value will be returned to the
5865 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
5868 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
5869 vcpu
->run
->request_interrupt_window
;
5870 bool req_immediate_exit
= false;
5872 if (vcpu
->requests
) {
5873 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
5874 kvm_mmu_unload(vcpu
);
5875 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
5876 __kvm_migrate_timers(vcpu
);
5877 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
5878 kvm_gen_update_masterclock(vcpu
->kvm
);
5879 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
5880 kvm_gen_kvmclock_update(vcpu
);
5881 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
5882 r
= kvm_guest_time_update(vcpu
);
5886 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
5887 kvm_mmu_sync_roots(vcpu
);
5888 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
5889 kvm_x86_ops
->tlb_flush(vcpu
);
5890 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
5891 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
5895 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
5896 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
5900 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
5901 vcpu
->fpu_active
= 0;
5902 kvm_x86_ops
->fpu_deactivate(vcpu
);
5904 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
5905 /* Page is swapped out. Do synthetic halt */
5906 vcpu
->arch
.apf
.halted
= true;
5910 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
5911 record_steal_time(vcpu
);
5912 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
5914 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
5915 kvm_handle_pmu_event(vcpu
);
5916 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
5917 kvm_deliver_pmi(vcpu
);
5918 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
5919 vcpu_scan_ioapic(vcpu
);
5922 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
5923 kvm_apic_accept_events(vcpu
);
5924 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
5929 inject_pending_event(vcpu
);
5931 /* enable NMI/IRQ window open exits if needed */
5932 if (vcpu
->arch
.nmi_pending
)
5933 req_immediate_exit
=
5934 kvm_x86_ops
->enable_nmi_window(vcpu
) != 0;
5935 else if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
5936 req_immediate_exit
=
5937 kvm_x86_ops
->enable_irq_window(vcpu
) != 0;
5939 if (kvm_lapic_enabled(vcpu
)) {
5941 * Update architecture specific hints for APIC
5942 * virtual interrupt delivery.
5944 if (kvm_x86_ops
->hwapic_irr_update
)
5945 kvm_x86_ops
->hwapic_irr_update(vcpu
,
5946 kvm_lapic_find_highest_irr(vcpu
));
5947 update_cr8_intercept(vcpu
);
5948 kvm_lapic_sync_to_vapic(vcpu
);
5952 r
= kvm_mmu_reload(vcpu
);
5954 goto cancel_injection
;
5959 kvm_x86_ops
->prepare_guest_switch(vcpu
);
5960 if (vcpu
->fpu_active
)
5961 kvm_load_guest_fpu(vcpu
);
5962 kvm_load_guest_xcr0(vcpu
);
5964 vcpu
->mode
= IN_GUEST_MODE
;
5966 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5968 /* We should set ->mode before check ->requests,
5969 * see the comment in make_all_cpus_request.
5971 smp_mb__after_srcu_read_unlock();
5973 local_irq_disable();
5975 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
5976 || need_resched() || signal_pending(current
)) {
5977 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
5981 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5983 goto cancel_injection
;
5986 if (req_immediate_exit
)
5987 smp_send_reschedule(vcpu
->cpu
);
5991 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
5993 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
5994 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
5995 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
5996 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
5999 trace_kvm_entry(vcpu
->vcpu_id
);
6000 kvm_x86_ops
->run(vcpu
);
6003 * If the guest has used debug registers, at least dr7
6004 * will be disabled while returning to the host.
6005 * If we don't have active breakpoints in the host, we don't
6006 * care about the messed up debug address registers. But if
6007 * we have some of them active, restore the old state.
6009 if (hw_breakpoint_active())
6010 hw_breakpoint_restore();
6012 vcpu
->arch
.last_guest_tsc
= kvm_x86_ops
->read_l1_tsc(vcpu
,
6015 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6018 /* Interrupt is enabled by handle_external_intr() */
6019 kvm_x86_ops
->handle_external_intr(vcpu
);
6024 * We must have an instruction between local_irq_enable() and
6025 * kvm_guest_exit(), so the timer interrupt isn't delayed by
6026 * the interrupt shadow. The stat.exits increment will do nicely.
6027 * But we need to prevent reordering, hence this barrier():
6035 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6038 * Profile KVM exit RIPs:
6040 if (unlikely(prof_on
== KVM_PROFILING
)) {
6041 unsigned long rip
= kvm_rip_read(vcpu
);
6042 profile_hit(KVM_PROFILING
, (void *)rip
);
6045 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6046 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6048 if (vcpu
->arch
.apic_attention
)
6049 kvm_lapic_sync_from_vapic(vcpu
);
6051 r
= kvm_x86_ops
->handle_exit(vcpu
);
6055 kvm_x86_ops
->cancel_injection(vcpu
);
6056 if (unlikely(vcpu
->arch
.apic_attention
))
6057 kvm_lapic_sync_from_vapic(vcpu
);
6063 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
6066 struct kvm
*kvm
= vcpu
->kvm
;
6068 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6072 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6073 !vcpu
->arch
.apf
.halted
)
6074 r
= vcpu_enter_guest(vcpu
);
6076 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6077 kvm_vcpu_block(vcpu
);
6078 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6079 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
)) {
6080 kvm_apic_accept_events(vcpu
);
6081 switch(vcpu
->arch
.mp_state
) {
6082 case KVM_MP_STATE_HALTED
:
6083 vcpu
->arch
.pv
.pv_unhalted
= false;
6084 vcpu
->arch
.mp_state
=
6085 KVM_MP_STATE_RUNNABLE
;
6086 case KVM_MP_STATE_RUNNABLE
:
6087 vcpu
->arch
.apf
.halted
= false;
6089 case KVM_MP_STATE_INIT_RECEIVED
:
6101 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
6102 if (kvm_cpu_has_pending_timer(vcpu
))
6103 kvm_inject_pending_timer_irqs(vcpu
);
6105 if (dm_request_for_irq_injection(vcpu
)) {
6107 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6108 ++vcpu
->stat
.request_irq_exits
;
6111 kvm_check_async_pf_completion(vcpu
);
6113 if (signal_pending(current
)) {
6115 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6116 ++vcpu
->stat
.signal_exits
;
6118 if (need_resched()) {
6119 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6121 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6125 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6130 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
6133 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6134 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
6135 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6136 if (r
!= EMULATE_DONE
)
6141 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
6143 BUG_ON(!vcpu
->arch
.pio
.count
);
6145 return complete_emulated_io(vcpu
);
6149 * Implements the following, as a state machine:
6153 * for each mmio piece in the fragment
6161 * for each mmio piece in the fragment
6166 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
6168 struct kvm_run
*run
= vcpu
->run
;
6169 struct kvm_mmio_fragment
*frag
;
6172 BUG_ON(!vcpu
->mmio_needed
);
6174 /* Complete previous fragment */
6175 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
6176 len
= min(8u, frag
->len
);
6177 if (!vcpu
->mmio_is_write
)
6178 memcpy(frag
->data
, run
->mmio
.data
, len
);
6180 if (frag
->len
<= 8) {
6181 /* Switch to the next fragment. */
6183 vcpu
->mmio_cur_fragment
++;
6185 /* Go forward to the next mmio piece. */
6191 if (vcpu
->mmio_cur_fragment
== vcpu
->mmio_nr_fragments
) {
6192 vcpu
->mmio_needed
= 0;
6194 /* FIXME: return into emulator if single-stepping. */
6195 if (vcpu
->mmio_is_write
)
6197 vcpu
->mmio_read_completed
= 1;
6198 return complete_emulated_io(vcpu
);
6201 run
->exit_reason
= KVM_EXIT_MMIO
;
6202 run
->mmio
.phys_addr
= frag
->gpa
;
6203 if (vcpu
->mmio_is_write
)
6204 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6205 run
->mmio
.len
= min(8u, frag
->len
);
6206 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
6207 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6212 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
6217 if (!tsk_used_math(current
) && init_fpu(current
))
6220 if (vcpu
->sigset_active
)
6221 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
6223 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
6224 kvm_vcpu_block(vcpu
);
6225 kvm_apic_accept_events(vcpu
);
6226 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
6231 /* re-sync apic's tpr */
6232 if (!irqchip_in_kernel(vcpu
->kvm
)) {
6233 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
6239 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
6240 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
6241 vcpu
->arch
.complete_userspace_io
= NULL
;
6246 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
6248 r
= __vcpu_run(vcpu
);
6251 post_kvm_run_save(vcpu
);
6252 if (vcpu
->sigset_active
)
6253 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
6258 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6260 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
6262 * We are here if userspace calls get_regs() in the middle of
6263 * instruction emulation. Registers state needs to be copied
6264 * back from emulation context to vcpu. Userspace shouldn't do
6265 * that usually, but some bad designed PV devices (vmware
6266 * backdoor interface) need this to work
6268 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
6269 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6271 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6272 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6273 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6274 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6275 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6276 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
6277 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
6278 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
6279 #ifdef CONFIG_X86_64
6280 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
6281 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
6282 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
6283 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
6284 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
6285 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
6286 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
6287 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
6290 regs
->rip
= kvm_rip_read(vcpu
);
6291 regs
->rflags
= kvm_get_rflags(vcpu
);
6296 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6298 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
6299 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6301 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
6302 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
6303 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
6304 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
6305 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
6306 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
6307 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
6308 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
6309 #ifdef CONFIG_X86_64
6310 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
6311 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
6312 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
6313 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
6314 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
6315 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
6316 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
6317 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
6320 kvm_rip_write(vcpu
, regs
->rip
);
6321 kvm_set_rflags(vcpu
, regs
->rflags
);
6323 vcpu
->arch
.exception
.pending
= false;
6325 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6330 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
6332 struct kvm_segment cs
;
6334 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6338 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
6340 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
6341 struct kvm_sregs
*sregs
)
6345 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6346 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6347 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6348 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6349 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6350 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6352 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6353 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6355 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6356 sregs
->idt
.limit
= dt
.size
;
6357 sregs
->idt
.base
= dt
.address
;
6358 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6359 sregs
->gdt
.limit
= dt
.size
;
6360 sregs
->gdt
.base
= dt
.address
;
6362 sregs
->cr0
= kvm_read_cr0(vcpu
);
6363 sregs
->cr2
= vcpu
->arch
.cr2
;
6364 sregs
->cr3
= kvm_read_cr3(vcpu
);
6365 sregs
->cr4
= kvm_read_cr4(vcpu
);
6366 sregs
->cr8
= kvm_get_cr8(vcpu
);
6367 sregs
->efer
= vcpu
->arch
.efer
;
6368 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
6370 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
6372 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
6373 set_bit(vcpu
->arch
.interrupt
.nr
,
6374 (unsigned long *)sregs
->interrupt_bitmap
);
6379 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
6380 struct kvm_mp_state
*mp_state
)
6382 kvm_apic_accept_events(vcpu
);
6383 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
6384 vcpu
->arch
.pv
.pv_unhalted
)
6385 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
6387 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
6392 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
6393 struct kvm_mp_state
*mp_state
)
6395 if (!kvm_vcpu_has_lapic(vcpu
) &&
6396 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
6399 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
6400 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
6401 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
6403 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
6404 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6408 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
6409 int reason
, bool has_error_code
, u32 error_code
)
6411 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
6414 init_emulate_ctxt(vcpu
);
6416 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
6417 has_error_code
, error_code
);
6420 return EMULATE_FAIL
;
6422 kvm_rip_write(vcpu
, ctxt
->eip
);
6423 kvm_set_rflags(vcpu
, ctxt
->eflags
);
6424 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6425 return EMULATE_DONE
;
6427 EXPORT_SYMBOL_GPL(kvm_task_switch
);
6429 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
6430 struct kvm_sregs
*sregs
)
6432 struct msr_data apic_base_msr
;
6433 int mmu_reset_needed
= 0;
6434 int pending_vec
, max_bits
, idx
;
6437 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
6440 dt
.size
= sregs
->idt
.limit
;
6441 dt
.address
= sregs
->idt
.base
;
6442 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6443 dt
.size
= sregs
->gdt
.limit
;
6444 dt
.address
= sregs
->gdt
.base
;
6445 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
6447 vcpu
->arch
.cr2
= sregs
->cr2
;
6448 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
6449 vcpu
->arch
.cr3
= sregs
->cr3
;
6450 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
6452 kvm_set_cr8(vcpu
, sregs
->cr8
);
6454 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
6455 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
6456 apic_base_msr
.data
= sregs
->apic_base
;
6457 apic_base_msr
.host_initiated
= true;
6458 kvm_set_apic_base(vcpu
, &apic_base_msr
);
6460 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
6461 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
6462 vcpu
->arch
.cr0
= sregs
->cr0
;
6464 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
6465 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
6466 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
6467 kvm_update_cpuid(vcpu
);
6469 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6470 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
6471 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
6472 mmu_reset_needed
= 1;
6474 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6476 if (mmu_reset_needed
)
6477 kvm_mmu_reset_context(vcpu
);
6479 max_bits
= KVM_NR_INTERRUPTS
;
6480 pending_vec
= find_first_bit(
6481 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
6482 if (pending_vec
< max_bits
) {
6483 kvm_queue_interrupt(vcpu
, pending_vec
, false);
6484 pr_debug("Set back pending irq %d\n", pending_vec
);
6487 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6488 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6489 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6490 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6491 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6492 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6494 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6495 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6497 update_cr8_intercept(vcpu
);
6499 /* Older userspace won't unhalt the vcpu on reset. */
6500 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
6501 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
6503 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6505 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6510 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
6511 struct kvm_guest_debug
*dbg
)
6513 unsigned long rflags
;
6516 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
6518 if (vcpu
->arch
.exception
.pending
)
6520 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
6521 kvm_queue_exception(vcpu
, DB_VECTOR
);
6523 kvm_queue_exception(vcpu
, BP_VECTOR
);
6527 * Read rflags as long as potentially injected trace flags are still
6530 rflags
= kvm_get_rflags(vcpu
);
6532 vcpu
->guest_debug
= dbg
->control
;
6533 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
6534 vcpu
->guest_debug
= 0;
6536 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
6537 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
6538 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
6539 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
6541 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6542 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6544 kvm_update_dr7(vcpu
);
6546 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6547 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
6548 get_segment_base(vcpu
, VCPU_SREG_CS
);
6551 * Trigger an rflags update that will inject or remove the trace
6554 kvm_set_rflags(vcpu
, rflags
);
6556 kvm_x86_ops
->update_db_bp_intercept(vcpu
);
6566 * Translate a guest virtual address to a guest physical address.
6568 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
6569 struct kvm_translation
*tr
)
6571 unsigned long vaddr
= tr
->linear_address
;
6575 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6576 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
6577 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6578 tr
->physical_address
= gpa
;
6579 tr
->valid
= gpa
!= UNMAPPED_GVA
;
6586 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6588 struct i387_fxsave_struct
*fxsave
=
6589 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6591 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
6592 fpu
->fcw
= fxsave
->cwd
;
6593 fpu
->fsw
= fxsave
->swd
;
6594 fpu
->ftwx
= fxsave
->twd
;
6595 fpu
->last_opcode
= fxsave
->fop
;
6596 fpu
->last_ip
= fxsave
->rip
;
6597 fpu
->last_dp
= fxsave
->rdp
;
6598 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
6603 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6605 struct i387_fxsave_struct
*fxsave
=
6606 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6608 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
6609 fxsave
->cwd
= fpu
->fcw
;
6610 fxsave
->swd
= fpu
->fsw
;
6611 fxsave
->twd
= fpu
->ftwx
;
6612 fxsave
->fop
= fpu
->last_opcode
;
6613 fxsave
->rip
= fpu
->last_ip
;
6614 fxsave
->rdp
= fpu
->last_dp
;
6615 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
6620 int fx_init(struct kvm_vcpu
*vcpu
)
6624 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
6628 fpu_finit(&vcpu
->arch
.guest_fpu
);
6631 * Ensure guest xcr0 is valid for loading
6633 vcpu
->arch
.xcr0
= XSTATE_FP
;
6635 vcpu
->arch
.cr0
|= X86_CR0_ET
;
6639 EXPORT_SYMBOL_GPL(fx_init
);
6641 static void fx_free(struct kvm_vcpu
*vcpu
)
6643 fpu_free(&vcpu
->arch
.guest_fpu
);
6646 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
6648 if (vcpu
->guest_fpu_loaded
)
6652 * Restore all possible states in the guest,
6653 * and assume host would use all available bits.
6654 * Guest xcr0 would be loaded later.
6656 kvm_put_guest_xcr0(vcpu
);
6657 vcpu
->guest_fpu_loaded
= 1;
6658 __kernel_fpu_begin();
6659 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
6663 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
6665 kvm_put_guest_xcr0(vcpu
);
6667 if (!vcpu
->guest_fpu_loaded
)
6670 vcpu
->guest_fpu_loaded
= 0;
6671 fpu_save_init(&vcpu
->arch
.guest_fpu
);
6673 ++vcpu
->stat
.fpu_reload
;
6674 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
6678 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
6680 kvmclock_reset(vcpu
);
6682 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
6684 kvm_x86_ops
->vcpu_free(vcpu
);
6687 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
6690 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
6691 printk_once(KERN_WARNING
6692 "kvm: SMP vm created on host with unstable TSC; "
6693 "guest TSC will not be reliable\n");
6694 return kvm_x86_ops
->vcpu_create(kvm
, id
);
6697 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
6701 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
6702 r
= vcpu_load(vcpu
);
6705 kvm_vcpu_reset(vcpu
);
6706 kvm_mmu_setup(vcpu
);
6712 int kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
6715 struct msr_data msr
;
6717 r
= vcpu_load(vcpu
);
6721 msr
.index
= MSR_IA32_TSC
;
6722 msr
.host_initiated
= true;
6723 kvm_write_tsc(vcpu
, &msr
);
6729 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
6732 vcpu
->arch
.apf
.msr_val
= 0;
6734 r
= vcpu_load(vcpu
);
6736 kvm_mmu_unload(vcpu
);
6740 kvm_x86_ops
->vcpu_free(vcpu
);
6743 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
)
6745 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
6746 vcpu
->arch
.nmi_pending
= 0;
6747 vcpu
->arch
.nmi_injected
= false;
6749 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
6750 vcpu
->arch
.dr6
= DR6_FIXED_1
;
6751 kvm_update_dr6(vcpu
);
6752 vcpu
->arch
.dr7
= DR7_FIXED_1
;
6753 kvm_update_dr7(vcpu
);
6755 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6756 vcpu
->arch
.apf
.msr_val
= 0;
6757 vcpu
->arch
.st
.msr_val
= 0;
6759 kvmclock_reset(vcpu
);
6761 kvm_clear_async_pf_completion_queue(vcpu
);
6762 kvm_async_pf_hash_reset(vcpu
);
6763 vcpu
->arch
.apf
.halted
= false;
6765 kvm_pmu_reset(vcpu
);
6767 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
6768 vcpu
->arch
.regs_avail
= ~0;
6769 vcpu
->arch
.regs_dirty
= ~0;
6771 kvm_x86_ops
->vcpu_reset(vcpu
);
6774 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, unsigned int vector
)
6776 struct kvm_segment cs
;
6778 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6779 cs
.selector
= vector
<< 8;
6780 cs
.base
= vector
<< 12;
6781 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6782 kvm_rip_write(vcpu
, 0);
6785 int kvm_arch_hardware_enable(void *garbage
)
6788 struct kvm_vcpu
*vcpu
;
6793 bool stable
, backwards_tsc
= false;
6795 kvm_shared_msr_cpu_online();
6796 ret
= kvm_x86_ops
->hardware_enable(garbage
);
6800 local_tsc
= native_read_tsc();
6801 stable
= !check_tsc_unstable();
6802 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6803 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6804 if (!stable
&& vcpu
->cpu
== smp_processor_id())
6805 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
6806 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
6807 backwards_tsc
= true;
6808 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
6809 max_tsc
= vcpu
->arch
.last_host_tsc
;
6815 * Sometimes, even reliable TSCs go backwards. This happens on
6816 * platforms that reset TSC during suspend or hibernate actions, but
6817 * maintain synchronization. We must compensate. Fortunately, we can
6818 * detect that condition here, which happens early in CPU bringup,
6819 * before any KVM threads can be running. Unfortunately, we can't
6820 * bring the TSCs fully up to date with real time, as we aren't yet far
6821 * enough into CPU bringup that we know how much real time has actually
6822 * elapsed; our helper function, get_kernel_ns() will be using boot
6823 * variables that haven't been updated yet.
6825 * So we simply find the maximum observed TSC above, then record the
6826 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
6827 * the adjustment will be applied. Note that we accumulate
6828 * adjustments, in case multiple suspend cycles happen before some VCPU
6829 * gets a chance to run again. In the event that no KVM threads get a
6830 * chance to run, we will miss the entire elapsed period, as we'll have
6831 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6832 * loose cycle time. This isn't too big a deal, since the loss will be
6833 * uniform across all VCPUs (not to mention the scenario is extremely
6834 * unlikely). It is possible that a second hibernate recovery happens
6835 * much faster than a first, causing the observed TSC here to be
6836 * smaller; this would require additional padding adjustment, which is
6837 * why we set last_host_tsc to the local tsc observed here.
6839 * N.B. - this code below runs only on platforms with reliable TSC,
6840 * as that is the only way backwards_tsc is set above. Also note
6841 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6842 * have the same delta_cyc adjustment applied if backwards_tsc
6843 * is detected. Note further, this adjustment is only done once,
6844 * as we reset last_host_tsc on all VCPUs to stop this from being
6845 * called multiple times (one for each physical CPU bringup).
6847 * Platforms with unreliable TSCs don't have to deal with this, they
6848 * will be compensated by the logic in vcpu_load, which sets the TSC to
6849 * catchup mode. This will catchup all VCPUs to real time, but cannot
6850 * guarantee that they stay in perfect synchronization.
6852 if (backwards_tsc
) {
6853 u64 delta_cyc
= max_tsc
- local_tsc
;
6854 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6855 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6856 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
6857 vcpu
->arch
.last_host_tsc
= local_tsc
;
6858 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
6863 * We have to disable TSC offset matching.. if you were
6864 * booting a VM while issuing an S4 host suspend....
6865 * you may have some problem. Solving this issue is
6866 * left as an exercise to the reader.
6868 kvm
->arch
.last_tsc_nsec
= 0;
6869 kvm
->arch
.last_tsc_write
= 0;
6876 void kvm_arch_hardware_disable(void *garbage
)
6878 kvm_x86_ops
->hardware_disable(garbage
);
6879 drop_user_return_notifiers(garbage
);
6882 int kvm_arch_hardware_setup(void)
6884 return kvm_x86_ops
->hardware_setup();
6887 void kvm_arch_hardware_unsetup(void)
6889 kvm_x86_ops
->hardware_unsetup();
6892 void kvm_arch_check_processor_compat(void *rtn
)
6894 kvm_x86_ops
->check_processor_compatibility(rtn
);
6897 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
6899 return irqchip_in_kernel(vcpu
->kvm
) == (vcpu
->arch
.apic
!= NULL
);
6902 struct static_key kvm_no_apic_vcpu __read_mostly
;
6904 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
6910 BUG_ON(vcpu
->kvm
== NULL
);
6913 vcpu
->arch
.pv
.pv_unhalted
= false;
6914 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
6915 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
6916 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6918 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
6920 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
6925 vcpu
->arch
.pio_data
= page_address(page
);
6927 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
6929 r
= kvm_mmu_create(vcpu
);
6931 goto fail_free_pio_data
;
6933 if (irqchip_in_kernel(kvm
)) {
6934 r
= kvm_create_lapic(vcpu
);
6936 goto fail_mmu_destroy
;
6938 static_key_slow_inc(&kvm_no_apic_vcpu
);
6940 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
6942 if (!vcpu
->arch
.mce_banks
) {
6944 goto fail_free_lapic
;
6946 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
6948 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
6950 goto fail_free_mce_banks
;
6955 goto fail_free_wbinvd_dirty_mask
;
6957 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
6958 vcpu
->arch
.pv_time_enabled
= false;
6960 vcpu
->arch
.guest_supported_xcr0
= 0;
6961 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
6963 kvm_async_pf_hash_reset(vcpu
);
6967 fail_free_wbinvd_dirty_mask
:
6968 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
6969 fail_free_mce_banks
:
6970 kfree(vcpu
->arch
.mce_banks
);
6972 kvm_free_lapic(vcpu
);
6974 kvm_mmu_destroy(vcpu
);
6976 free_page((unsigned long)vcpu
->arch
.pio_data
);
6981 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
6985 kvm_pmu_destroy(vcpu
);
6986 kfree(vcpu
->arch
.mce_banks
);
6987 kvm_free_lapic(vcpu
);
6988 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6989 kvm_mmu_destroy(vcpu
);
6990 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6991 free_page((unsigned long)vcpu
->arch
.pio_data
);
6992 if (!irqchip_in_kernel(vcpu
->kvm
))
6993 static_key_slow_dec(&kvm_no_apic_vcpu
);
6996 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
7001 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7002 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7003 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
7004 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
7006 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7007 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
7008 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7009 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
7010 &kvm
->arch
.irq_sources_bitmap
);
7012 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
7013 mutex_init(&kvm
->arch
.apic_map_lock
);
7014 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
7016 pvclock_update_vm_gtod_copy(kvm
);
7021 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
7024 r
= vcpu_load(vcpu
);
7026 kvm_mmu_unload(vcpu
);
7030 static void kvm_free_vcpus(struct kvm
*kvm
)
7033 struct kvm_vcpu
*vcpu
;
7036 * Unpin any mmu pages first.
7038 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7039 kvm_clear_async_pf_completion_queue(vcpu
);
7040 kvm_unload_vcpu_mmu(vcpu
);
7042 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7043 kvm_arch_vcpu_free(vcpu
);
7045 mutex_lock(&kvm
->lock
);
7046 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
7047 kvm
->vcpus
[i
] = NULL
;
7049 atomic_set(&kvm
->online_vcpus
, 0);
7050 mutex_unlock(&kvm
->lock
);
7053 void kvm_arch_sync_events(struct kvm
*kvm
)
7055 kvm_free_all_assigned_devices(kvm
);
7059 void kvm_arch_destroy_vm(struct kvm
*kvm
)
7061 if (current
->mm
== kvm
->mm
) {
7063 * Free memory regions allocated on behalf of userspace,
7064 * unless the the memory map has changed due to process exit
7067 struct kvm_userspace_memory_region mem
;
7068 memset(&mem
, 0, sizeof(mem
));
7069 mem
.slot
= APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
;
7070 kvm_set_memory_region(kvm
, &mem
);
7072 mem
.slot
= IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
;
7073 kvm_set_memory_region(kvm
, &mem
);
7075 mem
.slot
= TSS_PRIVATE_MEMSLOT
;
7076 kvm_set_memory_region(kvm
, &mem
);
7078 kvm_iommu_unmap_guest(kvm
);
7079 kfree(kvm
->arch
.vpic
);
7080 kfree(kvm
->arch
.vioapic
);
7081 kvm_free_vcpus(kvm
);
7082 if (kvm
->arch
.apic_access_page
)
7083 put_page(kvm
->arch
.apic_access_page
);
7084 if (kvm
->arch
.ept_identity_pagetable
)
7085 put_page(kvm
->arch
.ept_identity_pagetable
);
7086 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
7089 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
7090 struct kvm_memory_slot
*dont
)
7094 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7095 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
7096 kvm_kvfree(free
->arch
.rmap
[i
]);
7097 free
->arch
.rmap
[i
] = NULL
;
7102 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
7103 dont
->arch
.lpage_info
[i
- 1]) {
7104 kvm_kvfree(free
->arch
.lpage_info
[i
- 1]);
7105 free
->arch
.lpage_info
[i
- 1] = NULL
;
7110 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
7111 unsigned long npages
)
7115 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7120 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
7121 slot
->base_gfn
, level
) + 1;
7123 slot
->arch
.rmap
[i
] =
7124 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
7125 if (!slot
->arch
.rmap
[i
])
7130 slot
->arch
.lpage_info
[i
- 1] = kvm_kvzalloc(lpages
*
7131 sizeof(*slot
->arch
.lpage_info
[i
- 1]));
7132 if (!slot
->arch
.lpage_info
[i
- 1])
7135 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
7136 slot
->arch
.lpage_info
[i
- 1][0].write_count
= 1;
7137 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
7138 slot
->arch
.lpage_info
[i
- 1][lpages
- 1].write_count
= 1;
7139 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
7141 * If the gfn and userspace address are not aligned wrt each
7142 * other, or if explicitly asked to, disable large page
7143 * support for this slot
7145 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
7146 !kvm_largepages_enabled()) {
7149 for (j
= 0; j
< lpages
; ++j
)
7150 slot
->arch
.lpage_info
[i
- 1][j
].write_count
= 1;
7157 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7158 kvm_kvfree(slot
->arch
.rmap
[i
]);
7159 slot
->arch
.rmap
[i
] = NULL
;
7163 kvm_kvfree(slot
->arch
.lpage_info
[i
- 1]);
7164 slot
->arch
.lpage_info
[i
- 1] = NULL
;
7169 void kvm_arch_memslots_updated(struct kvm
*kvm
)
7172 * memslots->generation has been incremented.
7173 * mmio generation may have reached its maximum value.
7175 kvm_mmu_invalidate_mmio_sptes(kvm
);
7178 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
7179 struct kvm_memory_slot
*memslot
,
7180 struct kvm_userspace_memory_region
*mem
,
7181 enum kvm_mr_change change
)
7184 * Only private memory slots need to be mapped here since
7185 * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7187 if ((memslot
->id
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_CREATE
)) {
7188 unsigned long userspace_addr
;
7191 * MAP_SHARED to prevent internal slot pages from being moved
7194 userspace_addr
= vm_mmap(NULL
, 0, memslot
->npages
* PAGE_SIZE
,
7195 PROT_READ
| PROT_WRITE
,
7196 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7198 if (IS_ERR((void *)userspace_addr
))
7199 return PTR_ERR((void *)userspace_addr
);
7201 memslot
->userspace_addr
= userspace_addr
;
7207 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
7208 struct kvm_userspace_memory_region
*mem
,
7209 const struct kvm_memory_slot
*old
,
7210 enum kvm_mr_change change
)
7213 int nr_mmu_pages
= 0;
7215 if ((mem
->slot
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_DELETE
)) {
7218 ret
= vm_munmap(old
->userspace_addr
,
7219 old
->npages
* PAGE_SIZE
);
7222 "kvm_vm_ioctl_set_memory_region: "
7223 "failed to munmap memory\n");
7226 if (!kvm
->arch
.n_requested_mmu_pages
)
7227 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
7230 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
7232 * Write protect all pages for dirty logging.
7233 * Existing largepage mappings are destroyed here and new ones will
7234 * not be created until the end of the logging.
7236 if ((change
!= KVM_MR_DELETE
) && (mem
->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
7237 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
7240 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
7242 kvm_mmu_invalidate_zap_all_pages(kvm
);
7245 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
7246 struct kvm_memory_slot
*slot
)
7248 kvm_mmu_invalidate_zap_all_pages(kvm
);
7251 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
7253 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7254 !vcpu
->arch
.apf
.halted
)
7255 || !list_empty_careful(&vcpu
->async_pf
.done
)
7256 || kvm_apic_has_events(vcpu
)
7257 || vcpu
->arch
.pv
.pv_unhalted
7258 || atomic_read(&vcpu
->arch
.nmi_queued
) ||
7259 (kvm_arch_interrupt_allowed(vcpu
) &&
7260 kvm_cpu_has_interrupt(vcpu
));
7263 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
7265 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
7268 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
7270 return kvm_x86_ops
->interrupt_allowed(vcpu
);
7273 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
7275 unsigned long current_rip
= kvm_rip_read(vcpu
) +
7276 get_segment_base(vcpu
, VCPU_SREG_CS
);
7278 return current_rip
== linear_rip
;
7280 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
7282 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
7284 unsigned long rflags
;
7286 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
7287 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7288 rflags
&= ~X86_EFLAGS_TF
;
7291 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
7293 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7295 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
7296 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
7297 rflags
|= X86_EFLAGS_TF
;
7298 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
7299 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7301 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
7303 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
7307 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
7311 r
= kvm_mmu_reload(vcpu
);
7315 if (!vcpu
->arch
.mmu
.direct_map
&&
7316 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
7319 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
7322 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
7324 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
7327 static inline u32
kvm_async_pf_next_probe(u32 key
)
7329 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
7332 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7334 u32 key
= kvm_async_pf_hash_fn(gfn
);
7336 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
7337 key
= kvm_async_pf_next_probe(key
);
7339 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
7342 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7345 u32 key
= kvm_async_pf_hash_fn(gfn
);
7347 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
7348 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
7349 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
7350 key
= kvm_async_pf_next_probe(key
);
7355 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7357 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
7360 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7364 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
7366 vcpu
->arch
.apf
.gfns
[i
] = ~0;
7368 j
= kvm_async_pf_next_probe(j
);
7369 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
7371 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
7373 * k lies cyclically in ]i,j]
7375 * |....j i.k.| or |.k..j i...|
7377 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
7378 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
7383 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
7386 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
7390 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
7391 struct kvm_async_pf
*work
)
7393 struct x86_exception fault
;
7395 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
7396 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7398 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
7399 (vcpu
->arch
.apf
.send_user_only
&&
7400 kvm_x86_ops
->get_cpl(vcpu
) == 0))
7401 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
7402 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
7403 fault
.vector
= PF_VECTOR
;
7404 fault
.error_code_valid
= true;
7405 fault
.error_code
= 0;
7406 fault
.nested_page_fault
= false;
7407 fault
.address
= work
->arch
.token
;
7408 kvm_inject_page_fault(vcpu
, &fault
);
7412 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
7413 struct kvm_async_pf
*work
)
7415 struct x86_exception fault
;
7417 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
7418 if (work
->wakeup_all
)
7419 work
->arch
.token
= ~0; /* broadcast wakeup */
7421 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7423 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
7424 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
7425 fault
.vector
= PF_VECTOR
;
7426 fault
.error_code_valid
= true;
7427 fault
.error_code
= 0;
7428 fault
.nested_page_fault
= false;
7429 fault
.address
= work
->arch
.token
;
7430 kvm_inject_page_fault(vcpu
, &fault
);
7432 vcpu
->arch
.apf
.halted
= false;
7433 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7436 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
7438 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
7441 return !kvm_event_needs_reinjection(vcpu
) &&
7442 kvm_x86_ops
->interrupt_allowed(vcpu
);
7445 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
7447 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
7449 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
7451 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
7453 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
7455 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
7457 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
7459 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
7461 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
7463 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
7464 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
7465 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
7466 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
7467 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
7468 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
7469 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
7470 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
7471 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
7472 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
7473 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
7474 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
7475 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);