2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include "assigned-dev.h"
32 #include <linux/clocksource.h>
33 #include <linux/interrupt.h>
34 #include <linux/kvm.h>
36 #include <linux/vmalloc.h>
37 #include <linux/module.h>
38 #include <linux/mman.h>
39 #include <linux/highmem.h>
40 #include <linux/iommu.h>
41 #include <linux/intel-iommu.h>
42 #include <linux/cpufreq.h>
43 #include <linux/user-return-notifier.h>
44 #include <linux/srcu.h>
45 #include <linux/slab.h>
46 #include <linux/perf_event.h>
47 #include <linux/uaccess.h>
48 #include <linux/hash.h>
49 #include <linux/pci.h>
50 #include <linux/timekeeper_internal.h>
51 #include <linux/pvclock_gtod.h>
52 #include <trace/events/kvm.h>
54 #define CREATE_TRACE_POINTS
57 #include <asm/debugreg.h>
63 #include <asm/fpu-internal.h> /* Ugh! */
65 #include <asm/pvclock.h>
66 #include <asm/div64.h>
68 #define MAX_IO_MSRS 256
69 #define KVM_MAX_MCE_BANKS 32
70 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
72 #define emul_to_vcpu(ctxt) \
73 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
76 * - enable syscall per default because its emulated by KVM
77 * - enable LME and LMA per default on 64 bit KVM
81 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
83 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
89 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
90 static void process_nmi(struct kvm_vcpu
*vcpu
);
91 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
93 struct kvm_x86_ops
*kvm_x86_ops
;
94 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
96 static bool ignore_msrs
= 0;
97 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
99 unsigned int min_timer_period_us
= 500;
100 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
102 bool kvm_has_tsc_control
;
103 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
104 u32 kvm_max_guest_tsc_khz
;
105 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
107 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
108 static u32 tsc_tolerance_ppm
= 250;
109 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
111 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
112 unsigned int lapic_timer_advance_ns
= 0;
113 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
115 static bool backwards_tsc_observed
= false;
117 #define KVM_NR_SHARED_MSRS 16
119 struct kvm_shared_msrs_global
{
121 u32 msrs
[KVM_NR_SHARED_MSRS
];
124 struct kvm_shared_msrs
{
125 struct user_return_notifier urn
;
127 struct kvm_shared_msr_values
{
130 } values
[KVM_NR_SHARED_MSRS
];
133 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
134 static struct kvm_shared_msrs __percpu
*shared_msrs
;
136 struct kvm_stats_debugfs_item debugfs_entries
[] = {
137 { "pf_fixed", VCPU_STAT(pf_fixed
) },
138 { "pf_guest", VCPU_STAT(pf_guest
) },
139 { "tlb_flush", VCPU_STAT(tlb_flush
) },
140 { "invlpg", VCPU_STAT(invlpg
) },
141 { "exits", VCPU_STAT(exits
) },
142 { "io_exits", VCPU_STAT(io_exits
) },
143 { "mmio_exits", VCPU_STAT(mmio_exits
) },
144 { "signal_exits", VCPU_STAT(signal_exits
) },
145 { "irq_window", VCPU_STAT(irq_window_exits
) },
146 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
147 { "halt_exits", VCPU_STAT(halt_exits
) },
148 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
149 { "hypercalls", VCPU_STAT(hypercalls
) },
150 { "request_irq", VCPU_STAT(request_irq_exits
) },
151 { "irq_exits", VCPU_STAT(irq_exits
) },
152 { "host_state_reload", VCPU_STAT(host_state_reload
) },
153 { "efer_reload", VCPU_STAT(efer_reload
) },
154 { "fpu_reload", VCPU_STAT(fpu_reload
) },
155 { "insn_emulation", VCPU_STAT(insn_emulation
) },
156 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
157 { "irq_injections", VCPU_STAT(irq_injections
) },
158 { "nmi_injections", VCPU_STAT(nmi_injections
) },
159 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
160 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
161 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
162 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
163 { "mmu_flooded", VM_STAT(mmu_flooded
) },
164 { "mmu_recycled", VM_STAT(mmu_recycled
) },
165 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
166 { "mmu_unsync", VM_STAT(mmu_unsync
) },
167 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
168 { "largepages", VM_STAT(lpages
) },
172 u64 __read_mostly host_xcr0
;
174 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
176 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
179 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
180 vcpu
->arch
.apf
.gfns
[i
] = ~0;
183 static void kvm_on_user_return(struct user_return_notifier
*urn
)
186 struct kvm_shared_msrs
*locals
187 = container_of(urn
, struct kvm_shared_msrs
, urn
);
188 struct kvm_shared_msr_values
*values
;
190 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
191 values
= &locals
->values
[slot
];
192 if (values
->host
!= values
->curr
) {
193 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
194 values
->curr
= values
->host
;
197 locals
->registered
= false;
198 user_return_notifier_unregister(urn
);
201 static void shared_msr_update(unsigned slot
, u32 msr
)
204 unsigned int cpu
= smp_processor_id();
205 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
207 /* only read, and nobody should modify it at this time,
208 * so don't need lock */
209 if (slot
>= shared_msrs_global
.nr
) {
210 printk(KERN_ERR
"kvm: invalid MSR slot!");
213 rdmsrl_safe(msr
, &value
);
214 smsr
->values
[slot
].host
= value
;
215 smsr
->values
[slot
].curr
= value
;
218 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
220 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
221 if (slot
>= shared_msrs_global
.nr
)
222 shared_msrs_global
.nr
= slot
+ 1;
223 shared_msrs_global
.msrs
[slot
] = msr
;
224 /* we need ensured the shared_msr_global have been updated */
227 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
229 static void kvm_shared_msr_cpu_online(void)
233 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
234 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
237 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
239 unsigned int cpu
= smp_processor_id();
240 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
243 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
245 smsr
->values
[slot
].curr
= value
;
246 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
250 if (!smsr
->registered
) {
251 smsr
->urn
.on_user_return
= kvm_on_user_return
;
252 user_return_notifier_register(&smsr
->urn
);
253 smsr
->registered
= true;
257 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
259 static void drop_user_return_notifiers(void)
261 unsigned int cpu
= smp_processor_id();
262 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
264 if (smsr
->registered
)
265 kvm_on_user_return(&smsr
->urn
);
268 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
270 return vcpu
->arch
.apic_base
;
272 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
274 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
276 u64 old_state
= vcpu
->arch
.apic_base
&
277 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
278 u64 new_state
= msr_info
->data
&
279 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
280 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
281 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
283 if (!msr_info
->host_initiated
&&
284 ((msr_info
->data
& reserved_bits
) != 0 ||
285 new_state
== X2APIC_ENABLE
||
286 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
287 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
288 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
292 kvm_lapic_set_base(vcpu
, msr_info
->data
);
295 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
297 asmlinkage __visible
void kvm_spurious_fault(void)
299 /* Fault while not rebooting. We want the trace. */
302 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
304 #define EXCPT_BENIGN 0
305 #define EXCPT_CONTRIBUTORY 1
308 static int exception_class(int vector
)
318 return EXCPT_CONTRIBUTORY
;
325 #define EXCPT_FAULT 0
327 #define EXCPT_ABORT 2
328 #define EXCPT_INTERRUPT 3
330 static int exception_type(int vector
)
334 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
335 return EXCPT_INTERRUPT
;
339 /* #DB is trap, as instruction watchpoints are handled elsewhere */
340 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
343 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
346 /* Reserved exceptions will result in fault */
350 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
351 unsigned nr
, bool has_error
, u32 error_code
,
357 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
359 if (!vcpu
->arch
.exception
.pending
) {
361 if (has_error
&& !is_protmode(vcpu
))
363 vcpu
->arch
.exception
.pending
= true;
364 vcpu
->arch
.exception
.has_error_code
= has_error
;
365 vcpu
->arch
.exception
.nr
= nr
;
366 vcpu
->arch
.exception
.error_code
= error_code
;
367 vcpu
->arch
.exception
.reinject
= reinject
;
371 /* to check exception */
372 prev_nr
= vcpu
->arch
.exception
.nr
;
373 if (prev_nr
== DF_VECTOR
) {
374 /* triple fault -> shutdown */
375 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
378 class1
= exception_class(prev_nr
);
379 class2
= exception_class(nr
);
380 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
381 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
382 /* generate double fault per SDM Table 5-5 */
383 vcpu
->arch
.exception
.pending
= true;
384 vcpu
->arch
.exception
.has_error_code
= true;
385 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
386 vcpu
->arch
.exception
.error_code
= 0;
388 /* replace previous exception with a new one in a hope
389 that instruction re-execution will regenerate lost
394 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
396 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
398 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
400 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
402 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
404 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
406 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
409 kvm_inject_gp(vcpu
, 0);
411 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
413 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
415 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
417 ++vcpu
->stat
.pf_guest
;
418 vcpu
->arch
.cr2
= fault
->address
;
419 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
421 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
423 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
425 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
426 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
428 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
430 return fault
->nested_page_fault
;
433 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
435 atomic_inc(&vcpu
->arch
.nmi_queued
);
436 kvm_make_request(KVM_REQ_NMI
, vcpu
);
438 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
440 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
442 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
444 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
446 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
448 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
450 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
453 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
454 * a #GP and return false.
456 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
458 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
460 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
463 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
465 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
467 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
470 kvm_queue_exception(vcpu
, UD_VECTOR
);
473 EXPORT_SYMBOL_GPL(kvm_require_dr
);
476 * This function will be used to read from the physical memory of the currently
477 * running guest. The difference to kvm_read_guest_page is that this function
478 * can read from guest physical or from the guest's guest physical memory.
480 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
481 gfn_t ngfn
, void *data
, int offset
, int len
,
484 struct x86_exception exception
;
488 ngpa
= gfn_to_gpa(ngfn
);
489 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
490 if (real_gfn
== UNMAPPED_GVA
)
493 real_gfn
= gpa_to_gfn(real_gfn
);
495 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
497 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
499 int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
500 void *data
, int offset
, int len
, u32 access
)
502 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
503 data
, offset
, len
, access
);
507 * Load the pae pdptrs. Return true is they are all valid.
509 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
511 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
512 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
515 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
517 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
518 offset
* sizeof(u64
), sizeof(pdpte
),
519 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
524 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
525 if (is_present_gpte(pdpte
[i
]) &&
526 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
533 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
534 __set_bit(VCPU_EXREG_PDPTR
,
535 (unsigned long *)&vcpu
->arch
.regs_avail
);
536 __set_bit(VCPU_EXREG_PDPTR
,
537 (unsigned long *)&vcpu
->arch
.regs_dirty
);
542 EXPORT_SYMBOL_GPL(load_pdptrs
);
544 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
546 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
552 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
555 if (!test_bit(VCPU_EXREG_PDPTR
,
556 (unsigned long *)&vcpu
->arch
.regs_avail
))
559 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
560 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
561 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
562 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
565 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
571 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
573 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
574 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
575 X86_CR0_CD
| X86_CR0_NW
;
580 if (cr0
& 0xffffffff00000000UL
)
584 cr0
&= ~CR0_RESERVED_BITS
;
586 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
589 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
592 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
594 if ((vcpu
->arch
.efer
& EFER_LME
)) {
599 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
604 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
609 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
612 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
614 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
615 kvm_clear_async_pf_completion_queue(vcpu
);
616 kvm_async_pf_hash_reset(vcpu
);
619 if ((cr0
^ old_cr0
) & update_bits
)
620 kvm_mmu_reset_context(vcpu
);
623 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
625 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
627 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
629 EXPORT_SYMBOL_GPL(kvm_lmsw
);
631 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
633 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
634 !vcpu
->guest_xcr0_loaded
) {
635 /* kvm_set_xcr() also depends on this */
636 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
637 vcpu
->guest_xcr0_loaded
= 1;
641 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
643 if (vcpu
->guest_xcr0_loaded
) {
644 if (vcpu
->arch
.xcr0
!= host_xcr0
)
645 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
646 vcpu
->guest_xcr0_loaded
= 0;
650 int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
653 u64 old_xcr0
= vcpu
->arch
.xcr0
;
656 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
657 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
659 if (!(xcr0
& XSTATE_FP
))
661 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
665 * Do not allow the guest to set bits that we do not support
666 * saving. However, xcr0 bit 0 is always set, even if the
667 * emulated CPU does not support XSAVE (see fx_init).
669 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XSTATE_FP
;
670 if (xcr0
& ~valid_bits
)
673 if ((!(xcr0
& XSTATE_BNDREGS
)) != (!(xcr0
& XSTATE_BNDCSR
)))
676 if (xcr0
& XSTATE_AVX512
) {
677 if (!(xcr0
& XSTATE_YMM
))
679 if ((xcr0
& XSTATE_AVX512
) != XSTATE_AVX512
)
682 kvm_put_guest_xcr0(vcpu
);
683 vcpu
->arch
.xcr0
= xcr0
;
685 if ((xcr0
^ old_xcr0
) & XSTATE_EXTEND_MASK
)
686 kvm_update_cpuid(vcpu
);
690 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
692 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
693 __kvm_set_xcr(vcpu
, index
, xcr
)) {
694 kvm_inject_gp(vcpu
, 0);
699 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
701 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
703 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
704 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
|
705 X86_CR4_PAE
| X86_CR4_SMEP
;
706 if (cr4
& CR4_RESERVED_BITS
)
709 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
712 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
715 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
718 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
721 if (is_long_mode(vcpu
)) {
722 if (!(cr4
& X86_CR4_PAE
))
724 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
725 && ((cr4
^ old_cr4
) & pdptr_bits
)
726 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
730 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
731 if (!guest_cpuid_has_pcid(vcpu
))
734 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
735 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
739 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
742 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
743 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
744 kvm_mmu_reset_context(vcpu
);
746 if ((cr4
^ old_cr4
) & X86_CR4_SMAP
)
747 update_permission_bitmask(vcpu
, vcpu
->arch
.walk_mmu
, false);
749 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
750 kvm_update_cpuid(vcpu
);
754 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
756 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
759 cr3
&= ~CR3_PCID_INVD
;
762 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
763 kvm_mmu_sync_roots(vcpu
);
764 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
768 if (is_long_mode(vcpu
)) {
769 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
771 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
772 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
775 vcpu
->arch
.cr3
= cr3
;
776 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
777 kvm_mmu_new_cr3(vcpu
);
780 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
782 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
784 if (cr8
& CR8_RESERVED_BITS
)
786 if (irqchip_in_kernel(vcpu
->kvm
))
787 kvm_lapic_set_tpr(vcpu
, cr8
);
789 vcpu
->arch
.cr8
= cr8
;
792 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
794 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
796 if (irqchip_in_kernel(vcpu
->kvm
))
797 return kvm_lapic_get_cr8(vcpu
);
799 return vcpu
->arch
.cr8
;
801 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
803 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
805 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
806 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
809 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
813 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
814 dr7
= vcpu
->arch
.guest_debug_dr7
;
816 dr7
= vcpu
->arch
.dr7
;
817 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
818 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
819 if (dr7
& DR7_BP_EN_MASK
)
820 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
823 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
825 u64 fixed
= DR6_FIXED_1
;
827 if (!guest_cpuid_has_rtm(vcpu
))
832 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
836 vcpu
->arch
.db
[dr
] = val
;
837 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
838 vcpu
->arch
.eff_db
[dr
] = val
;
843 if (val
& 0xffffffff00000000ULL
)
845 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
846 kvm_update_dr6(vcpu
);
851 if (val
& 0xffffffff00000000ULL
)
853 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
854 kvm_update_dr7(vcpu
);
861 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
863 if (__kvm_set_dr(vcpu
, dr
, val
)) {
864 kvm_inject_gp(vcpu
, 0);
869 EXPORT_SYMBOL_GPL(kvm_set_dr
);
871 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
875 *val
= vcpu
->arch
.db
[dr
];
880 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
881 *val
= vcpu
->arch
.dr6
;
883 *val
= kvm_x86_ops
->get_dr6(vcpu
);
888 *val
= vcpu
->arch
.dr7
;
893 EXPORT_SYMBOL_GPL(kvm_get_dr
);
895 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
897 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
901 err
= kvm_pmu_read_pmc(vcpu
, ecx
, &data
);
904 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
905 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
908 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
911 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
912 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
914 * This list is modified at module load time to reflect the
915 * capabilities of the host cpu. This capabilities test skips MSRs that are
916 * kvm-specific. Those are put in the beginning of the list.
919 #define KVM_SAVE_MSRS_BEGIN 12
920 static u32 msrs_to_save
[] = {
921 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
922 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
923 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
924 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
925 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
927 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
930 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
932 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
933 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
936 static unsigned num_msrs_to_save
;
938 static const u32 emulated_msrs
[] = {
940 MSR_IA32_TSCDEADLINE
,
941 MSR_IA32_MISC_ENABLE
,
946 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
948 if (efer
& efer_reserved_bits
)
951 if (efer
& EFER_FFXSR
) {
952 struct kvm_cpuid_entry2
*feat
;
954 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
955 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
959 if (efer
& EFER_SVME
) {
960 struct kvm_cpuid_entry2
*feat
;
962 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
963 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
969 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
971 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
973 u64 old_efer
= vcpu
->arch
.efer
;
975 if (!kvm_valid_efer(vcpu
, efer
))
979 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
983 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
985 kvm_x86_ops
->set_efer(vcpu
, efer
);
987 /* Update reserved bits */
988 if ((efer
^ old_efer
) & EFER_NX
)
989 kvm_mmu_reset_context(vcpu
);
994 void kvm_enable_efer_bits(u64 mask
)
996 efer_reserved_bits
&= ~mask
;
998 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1001 * Writes msr value into into the appropriate "register".
1002 * Returns 0 on success, non-0 otherwise.
1003 * Assumes vcpu_load() was already called.
1005 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1007 switch (msr
->index
) {
1010 case MSR_KERNEL_GS_BASE
:
1013 if (is_noncanonical_address(msr
->data
))
1016 case MSR_IA32_SYSENTER_EIP
:
1017 case MSR_IA32_SYSENTER_ESP
:
1019 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1020 * non-canonical address is written on Intel but not on
1021 * AMD (which ignores the top 32-bits, because it does
1022 * not implement 64-bit SYSENTER).
1024 * 64-bit code should hence be able to write a non-canonical
1025 * value on AMD. Making the address canonical ensures that
1026 * vmentry does not fail on Intel after writing a non-canonical
1027 * value, and that something deterministic happens if the guest
1028 * invokes 64-bit SYSENTER.
1030 msr
->data
= get_canonical(msr
->data
);
1032 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1034 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1037 * Adapt set_msr() to msr_io()'s calling convention
1039 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1041 struct msr_data msr
;
1045 msr
.host_initiated
= true;
1046 return kvm_set_msr(vcpu
, &msr
);
1049 #ifdef CONFIG_X86_64
1050 struct pvclock_gtod_data
{
1053 struct { /* extract of a clocksource struct */
1065 static struct pvclock_gtod_data pvclock_gtod_data
;
1067 static void update_pvclock_gtod(struct timekeeper
*tk
)
1069 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1072 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr
.base_mono
, tk
->offs_boot
));
1074 write_seqcount_begin(&vdata
->seq
);
1076 /* copy pvclock gtod data */
1077 vdata
->clock
.vclock_mode
= tk
->tkr
.clock
->archdata
.vclock_mode
;
1078 vdata
->clock
.cycle_last
= tk
->tkr
.cycle_last
;
1079 vdata
->clock
.mask
= tk
->tkr
.mask
;
1080 vdata
->clock
.mult
= tk
->tkr
.mult
;
1081 vdata
->clock
.shift
= tk
->tkr
.shift
;
1083 vdata
->boot_ns
= boot_ns
;
1084 vdata
->nsec_base
= tk
->tkr
.xtime_nsec
;
1086 write_seqcount_end(&vdata
->seq
);
1091 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1095 struct pvclock_wall_clock wc
;
1096 struct timespec boot
;
1101 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1106 ++version
; /* first time write, random junk */
1110 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1113 * The guest calculates current wall clock time by adding
1114 * system time (updated by kvm_guest_time_update below) to the
1115 * wall clock specified here. guest system time equals host
1116 * system time for us, thus we must fill in host boot time here.
1120 if (kvm
->arch
.kvmclock_offset
) {
1121 struct timespec ts
= ns_to_timespec(kvm
->arch
.kvmclock_offset
);
1122 boot
= timespec_sub(boot
, ts
);
1124 wc
.sec
= boot
.tv_sec
;
1125 wc
.nsec
= boot
.tv_nsec
;
1126 wc
.version
= version
;
1128 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1131 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1134 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1136 uint32_t quotient
, remainder
;
1138 /* Don't try to replace with do_div(), this one calculates
1139 * "(dividend << 32) / divisor" */
1141 : "=a" (quotient
), "=d" (remainder
)
1142 : "0" (0), "1" (dividend
), "r" (divisor
) );
1146 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
1147 s8
*pshift
, u32
*pmultiplier
)
1154 tps64
= base_khz
* 1000LL;
1155 scaled64
= scaled_khz
* 1000LL;
1156 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1161 tps32
= (uint32_t)tps64
;
1162 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1163 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1171 *pmultiplier
= div_frac(scaled64
, tps32
);
1173 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1174 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
1177 static inline u64
get_kernel_ns(void)
1179 return ktime_get_boot_ns();
1182 #ifdef CONFIG_X86_64
1183 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1186 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1187 unsigned long max_tsc_khz
;
1189 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1191 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1192 vcpu
->arch
.virtual_tsc_shift
);
1195 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1197 u64 v
= (u64
)khz
* (1000000 + ppm
);
1202 static void kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1204 u32 thresh_lo
, thresh_hi
;
1205 int use_scaling
= 0;
1207 /* tsc_khz can be zero if TSC calibration fails */
1208 if (this_tsc_khz
== 0)
1211 /* Compute a scale to convert nanoseconds in TSC cycles */
1212 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1213 &vcpu
->arch
.virtual_tsc_shift
,
1214 &vcpu
->arch
.virtual_tsc_mult
);
1215 vcpu
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1218 * Compute the variation in TSC rate which is acceptable
1219 * within the range of tolerance and decide if the
1220 * rate being applied is within that bounds of the hardware
1221 * rate. If so, no scaling or compensation need be done.
1223 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1224 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1225 if (this_tsc_khz
< thresh_lo
|| this_tsc_khz
> thresh_hi
) {
1226 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz
, thresh_lo
, thresh_hi
);
1229 kvm_x86_ops
->set_tsc_khz(vcpu
, this_tsc_khz
, use_scaling
);
1232 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1234 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1235 vcpu
->arch
.virtual_tsc_mult
,
1236 vcpu
->arch
.virtual_tsc_shift
);
1237 tsc
+= vcpu
->arch
.this_tsc_write
;
1241 void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1243 #ifdef CONFIG_X86_64
1245 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1246 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1248 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1249 atomic_read(&vcpu
->kvm
->online_vcpus
));
1252 * Once the masterclock is enabled, always perform request in
1253 * order to update it.
1255 * In order to enable masterclock, the host clocksource must be TSC
1256 * and the vcpus need to have matched TSCs. When that happens,
1257 * perform request to enable masterclock.
1259 if (ka
->use_master_clock
||
1260 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1261 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1263 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1264 atomic_read(&vcpu
->kvm
->online_vcpus
),
1265 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1269 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1271 u64 curr_offset
= kvm_x86_ops
->read_tsc_offset(vcpu
);
1272 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1275 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1277 struct kvm
*kvm
= vcpu
->kvm
;
1278 u64 offset
, ns
, elapsed
;
1279 unsigned long flags
;
1282 bool already_matched
;
1283 u64 data
= msr
->data
;
1285 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1286 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1287 ns
= get_kernel_ns();
1288 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1290 if (vcpu
->arch
.virtual_tsc_khz
) {
1293 /* n.b - signed multiplication and division required */
1294 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1295 #ifdef CONFIG_X86_64
1296 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1298 /* do_div() only does unsigned */
1299 asm("1: idivl %[divisor]\n"
1300 "2: xor %%edx, %%edx\n"
1301 " movl $0, %[faulted]\n"
1303 ".section .fixup,\"ax\"\n"
1304 "4: movl $1, %[faulted]\n"
1308 _ASM_EXTABLE(1b
, 4b
)
1310 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1311 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1314 do_div(elapsed
, 1000);
1319 /* idivl overflow => difference is larger than USEC_PER_SEC */
1321 usdiff
= USEC_PER_SEC
;
1323 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1326 * Special case: TSC write with a small delta (1 second) of virtual
1327 * cycle time against real time is interpreted as an attempt to
1328 * synchronize the CPU.
1330 * For a reliable TSC, we can match TSC offsets, and for an unstable
1331 * TSC, we add elapsed time in this computation. We could let the
1332 * compensation code attempt to catch up if we fall behind, but
1333 * it's better to try to match offsets from the beginning.
1335 if (usdiff
< USEC_PER_SEC
&&
1336 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1337 if (!check_tsc_unstable()) {
1338 offset
= kvm
->arch
.cur_tsc_offset
;
1339 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1341 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1343 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1344 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1347 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1350 * We split periods of matched TSC writes into generations.
1351 * For each generation, we track the original measured
1352 * nanosecond time, offset, and write, so if TSCs are in
1353 * sync, we can match exact offset, and if not, we can match
1354 * exact software computation in compute_guest_tsc()
1356 * These values are tracked in kvm->arch.cur_xxx variables.
1358 kvm
->arch
.cur_tsc_generation
++;
1359 kvm
->arch
.cur_tsc_nsec
= ns
;
1360 kvm
->arch
.cur_tsc_write
= data
;
1361 kvm
->arch
.cur_tsc_offset
= offset
;
1363 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1364 kvm
->arch
.cur_tsc_generation
, data
);
1368 * We also track th most recent recorded KHZ, write and time to
1369 * allow the matching interval to be extended at each write.
1371 kvm
->arch
.last_tsc_nsec
= ns
;
1372 kvm
->arch
.last_tsc_write
= data
;
1373 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1375 vcpu
->arch
.last_guest_tsc
= data
;
1377 /* Keep track of which generation this VCPU has synchronized to */
1378 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1379 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1380 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1382 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1383 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1384 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1385 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1387 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1389 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1390 } else if (!already_matched
) {
1391 kvm
->arch
.nr_vcpus_matched_tsc
++;
1394 kvm_track_tsc_matching(vcpu
);
1395 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1398 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1400 #ifdef CONFIG_X86_64
1402 static cycle_t
read_tsc(void)
1408 * Empirically, a fence (of type that depends on the CPU)
1409 * before rdtsc is enough to ensure that rdtsc is ordered
1410 * with respect to loads. The various CPU manuals are unclear
1411 * as to whether rdtsc can be reordered with later loads,
1412 * but no one has ever seen it happen.
1415 ret
= (cycle_t
)vget_cycles();
1417 last
= pvclock_gtod_data
.clock
.cycle_last
;
1419 if (likely(ret
>= last
))
1423 * GCC likes to generate cmov here, but this branch is extremely
1424 * predictable (it's just a funciton of time and the likely is
1425 * very likely) and there's a data dependence, so force GCC
1426 * to generate a branch instead. I don't barrier() because
1427 * we don't actually need a barrier, and if this function
1428 * ever gets inlined it will generate worse code.
1434 static inline u64
vgettsc(cycle_t
*cycle_now
)
1437 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1439 *cycle_now
= read_tsc();
1441 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1442 return v
* gtod
->clock
.mult
;
1445 static int do_monotonic_boot(s64
*t
, cycle_t
*cycle_now
)
1447 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1453 seq
= read_seqcount_begin(>od
->seq
);
1454 mode
= gtod
->clock
.vclock_mode
;
1455 ns
= gtod
->nsec_base
;
1456 ns
+= vgettsc(cycle_now
);
1457 ns
>>= gtod
->clock
.shift
;
1458 ns
+= gtod
->boot_ns
;
1459 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1465 /* returns true if host is using tsc clocksource */
1466 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, cycle_t
*cycle_now
)
1468 /* checked again under seqlock below */
1469 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1472 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1478 * Assuming a stable TSC across physical CPUS, and a stable TSC
1479 * across virtual CPUs, the following condition is possible.
1480 * Each numbered line represents an event visible to both
1481 * CPUs at the next numbered event.
1483 * "timespecX" represents host monotonic time. "tscX" represents
1486 * VCPU0 on CPU0 | VCPU1 on CPU1
1488 * 1. read timespec0,tsc0
1489 * 2. | timespec1 = timespec0 + N
1491 * 3. transition to guest | transition to guest
1492 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1493 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1494 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1496 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1499 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1501 * - 0 < N - M => M < N
1503 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1504 * always the case (the difference between two distinct xtime instances
1505 * might be smaller then the difference between corresponding TSC reads,
1506 * when updating guest vcpus pvclock areas).
1508 * To avoid that problem, do not allow visibility of distinct
1509 * system_timestamp/tsc_timestamp values simultaneously: use a master
1510 * copy of host monotonic time values. Update that master copy
1513 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1517 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1519 #ifdef CONFIG_X86_64
1520 struct kvm_arch
*ka
= &kvm
->arch
;
1522 bool host_tsc_clocksource
, vcpus_matched
;
1524 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1525 atomic_read(&kvm
->online_vcpus
));
1528 * If the host uses TSC clock, then passthrough TSC as stable
1531 host_tsc_clocksource
= kvm_get_time_and_clockread(
1532 &ka
->master_kernel_ns
,
1533 &ka
->master_cycle_now
);
1535 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1536 && !backwards_tsc_observed
;
1538 if (ka
->use_master_clock
)
1539 atomic_set(&kvm_guest_has_master_clock
, 1);
1541 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1542 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1547 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1549 #ifdef CONFIG_X86_64
1551 struct kvm_vcpu
*vcpu
;
1552 struct kvm_arch
*ka
= &kvm
->arch
;
1554 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1555 kvm_make_mclock_inprogress_request(kvm
);
1556 /* no guest entries from this point */
1557 pvclock_update_vm_gtod_copy(kvm
);
1559 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1560 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1562 /* guest entries allowed */
1563 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1564 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1566 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1570 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1572 unsigned long flags
, this_tsc_khz
;
1573 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1574 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1576 u64 tsc_timestamp
, host_tsc
;
1577 struct pvclock_vcpu_time_info guest_hv_clock
;
1579 bool use_master_clock
;
1585 * If the host uses TSC clock, then passthrough TSC as stable
1588 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1589 use_master_clock
= ka
->use_master_clock
;
1590 if (use_master_clock
) {
1591 host_tsc
= ka
->master_cycle_now
;
1592 kernel_ns
= ka
->master_kernel_ns
;
1594 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1596 /* Keep irq disabled to prevent changes to the clock */
1597 local_irq_save(flags
);
1598 this_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1599 if (unlikely(this_tsc_khz
== 0)) {
1600 local_irq_restore(flags
);
1601 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1604 if (!use_master_clock
) {
1605 host_tsc
= native_read_tsc();
1606 kernel_ns
= get_kernel_ns();
1609 tsc_timestamp
= kvm_x86_ops
->read_l1_tsc(v
, host_tsc
);
1612 * We may have to catch up the TSC to match elapsed wall clock
1613 * time for two reasons, even if kvmclock is used.
1614 * 1) CPU could have been running below the maximum TSC rate
1615 * 2) Broken TSC compensation resets the base at each VCPU
1616 * entry to avoid unknown leaps of TSC even when running
1617 * again on the same CPU. This may cause apparent elapsed
1618 * time to disappear, and the guest to stand still or run
1621 if (vcpu
->tsc_catchup
) {
1622 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1623 if (tsc
> tsc_timestamp
) {
1624 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1625 tsc_timestamp
= tsc
;
1629 local_irq_restore(flags
);
1631 if (!vcpu
->pv_time_enabled
)
1634 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1635 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1636 &vcpu
->hv_clock
.tsc_shift
,
1637 &vcpu
->hv_clock
.tsc_to_system_mul
);
1638 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1641 /* With all the info we got, fill in the values */
1642 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1643 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1644 vcpu
->last_guest_tsc
= tsc_timestamp
;
1646 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1647 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1651 * The interface expects us to write an even number signaling that the
1652 * update is finished. Since the guest won't see the intermediate
1653 * state, we just increase by 2 at the end.
1655 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 2;
1657 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1658 pvclock_flags
= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1660 if (vcpu
->pvclock_set_guest_stopped_request
) {
1661 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1662 vcpu
->pvclock_set_guest_stopped_request
= false;
1665 /* If the host uses TSC clocksource, then it is stable */
1666 if (use_master_clock
)
1667 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1669 vcpu
->hv_clock
.flags
= pvclock_flags
;
1671 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1673 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1675 sizeof(vcpu
->hv_clock
));
1680 * kvmclock updates which are isolated to a given vcpu, such as
1681 * vcpu->cpu migration, should not allow system_timestamp from
1682 * the rest of the vcpus to remain static. Otherwise ntp frequency
1683 * correction applies to one vcpu's system_timestamp but not
1686 * So in those cases, request a kvmclock update for all vcpus.
1687 * We need to rate-limit these requests though, as they can
1688 * considerably slow guests that have a large number of vcpus.
1689 * The time for a remote vcpu to update its kvmclock is bound
1690 * by the delay we use to rate-limit the updates.
1693 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1695 static void kvmclock_update_fn(struct work_struct
*work
)
1698 struct delayed_work
*dwork
= to_delayed_work(work
);
1699 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1700 kvmclock_update_work
);
1701 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1702 struct kvm_vcpu
*vcpu
;
1704 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1705 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1706 kvm_vcpu_kick(vcpu
);
1710 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1712 struct kvm
*kvm
= v
->kvm
;
1714 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1715 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1716 KVMCLOCK_UPDATE_DELAY
);
1719 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1721 static void kvmclock_sync_fn(struct work_struct
*work
)
1723 struct delayed_work
*dwork
= to_delayed_work(work
);
1724 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1725 kvmclock_sync_work
);
1726 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1728 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1729 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1730 KVMCLOCK_SYNC_PERIOD
);
1733 static bool msr_mtrr_valid(unsigned msr
)
1736 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1737 case MSR_MTRRfix64K_00000
:
1738 case MSR_MTRRfix16K_80000
:
1739 case MSR_MTRRfix16K_A0000
:
1740 case MSR_MTRRfix4K_C0000
:
1741 case MSR_MTRRfix4K_C8000
:
1742 case MSR_MTRRfix4K_D0000
:
1743 case MSR_MTRRfix4K_D8000
:
1744 case MSR_MTRRfix4K_E0000
:
1745 case MSR_MTRRfix4K_E8000
:
1746 case MSR_MTRRfix4K_F0000
:
1747 case MSR_MTRRfix4K_F8000
:
1748 case MSR_MTRRdefType
:
1749 case MSR_IA32_CR_PAT
:
1757 static bool valid_pat_type(unsigned t
)
1759 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1762 static bool valid_mtrr_type(unsigned t
)
1764 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1767 bool kvm_mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1772 if (!msr_mtrr_valid(msr
))
1775 if (msr
== MSR_IA32_CR_PAT
) {
1776 for (i
= 0; i
< 8; i
++)
1777 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1780 } else if (msr
== MSR_MTRRdefType
) {
1783 return valid_mtrr_type(data
& 0xff);
1784 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1785 for (i
= 0; i
< 8 ; i
++)
1786 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1791 /* variable MTRRs */
1792 WARN_ON(!(msr
>= 0x200 && msr
< 0x200 + 2 * KVM_NR_VAR_MTRR
));
1794 mask
= (~0ULL) << cpuid_maxphyaddr(vcpu
);
1795 if ((msr
& 1) == 0) {
1797 if (!valid_mtrr_type(data
& 0xff))
1804 kvm_inject_gp(vcpu
, 0);
1810 EXPORT_SYMBOL_GPL(kvm_mtrr_valid
);
1812 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1814 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1816 if (!kvm_mtrr_valid(vcpu
, msr
, data
))
1819 if (msr
== MSR_MTRRdefType
) {
1820 vcpu
->arch
.mtrr_state
.def_type
= data
;
1821 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1822 } else if (msr
== MSR_MTRRfix64K_00000
)
1824 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1825 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1826 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1827 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1828 else if (msr
== MSR_IA32_CR_PAT
)
1829 vcpu
->arch
.pat
= data
;
1830 else { /* Variable MTRRs */
1831 int idx
, is_mtrr_mask
;
1834 idx
= (msr
- 0x200) / 2;
1835 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1838 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1841 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1845 kvm_mmu_reset_context(vcpu
);
1849 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1851 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1852 unsigned bank_num
= mcg_cap
& 0xff;
1855 case MSR_IA32_MCG_STATUS
:
1856 vcpu
->arch
.mcg_status
= data
;
1858 case MSR_IA32_MCG_CTL
:
1859 if (!(mcg_cap
& MCG_CTL_P
))
1861 if (data
!= 0 && data
!= ~(u64
)0)
1863 vcpu
->arch
.mcg_ctl
= data
;
1866 if (msr
>= MSR_IA32_MC0_CTL
&&
1867 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
1868 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1869 /* only 0 or all 1s can be written to IA32_MCi_CTL
1870 * some Linux kernels though clear bit 10 in bank 4 to
1871 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1872 * this to avoid an uncatched #GP in the guest
1874 if ((offset
& 0x3) == 0 &&
1875 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1877 vcpu
->arch
.mce_banks
[offset
] = data
;
1885 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1887 struct kvm
*kvm
= vcpu
->kvm
;
1888 int lm
= is_long_mode(vcpu
);
1889 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1890 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1891 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1892 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1893 u32 page_num
= data
& ~PAGE_MASK
;
1894 u64 page_addr
= data
& PAGE_MASK
;
1899 if (page_num
>= blob_size
)
1902 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1907 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1916 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1918 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1921 static bool kvm_hv_msr_partition_wide(u32 msr
)
1925 case HV_X64_MSR_GUEST_OS_ID
:
1926 case HV_X64_MSR_HYPERCALL
:
1927 case HV_X64_MSR_REFERENCE_TSC
:
1928 case HV_X64_MSR_TIME_REF_COUNT
:
1936 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1938 struct kvm
*kvm
= vcpu
->kvm
;
1941 case HV_X64_MSR_GUEST_OS_ID
:
1942 kvm
->arch
.hv_guest_os_id
= data
;
1943 /* setting guest os id to zero disables hypercall page */
1944 if (!kvm
->arch
.hv_guest_os_id
)
1945 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1947 case HV_X64_MSR_HYPERCALL
: {
1952 /* if guest os id is not set hypercall should remain disabled */
1953 if (!kvm
->arch
.hv_guest_os_id
)
1955 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1956 kvm
->arch
.hv_hypercall
= data
;
1959 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1960 addr
= gfn_to_hva(kvm
, gfn
);
1961 if (kvm_is_error_hva(addr
))
1963 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1964 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1965 if (__copy_to_user((void __user
*)addr
, instructions
, 4))
1967 kvm
->arch
.hv_hypercall
= data
;
1968 mark_page_dirty(kvm
, gfn
);
1971 case HV_X64_MSR_REFERENCE_TSC
: {
1973 HV_REFERENCE_TSC_PAGE tsc_ref
;
1974 memset(&tsc_ref
, 0, sizeof(tsc_ref
));
1975 kvm
->arch
.hv_tsc_page
= data
;
1976 if (!(data
& HV_X64_MSR_TSC_REFERENCE_ENABLE
))
1978 gfn
= data
>> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT
;
1979 if (kvm_write_guest(kvm
, gfn
<< HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT
,
1980 &tsc_ref
, sizeof(tsc_ref
)))
1982 mark_page_dirty(kvm
, gfn
);
1986 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1987 "data 0x%llx\n", msr
, data
);
1993 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1996 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
2000 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
2001 vcpu
->arch
.hv_vapic
= data
;
2002 if (kvm_lapic_enable_pv_eoi(vcpu
, 0))
2006 gfn
= data
>> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
;
2007 addr
= gfn_to_hva(vcpu
->kvm
, gfn
);
2008 if (kvm_is_error_hva(addr
))
2010 if (__clear_user((void __user
*)addr
, PAGE_SIZE
))
2012 vcpu
->arch
.hv_vapic
= data
;
2013 mark_page_dirty(vcpu
->kvm
, gfn
);
2014 if (kvm_lapic_enable_pv_eoi(vcpu
, gfn_to_gpa(gfn
) | KVM_MSR_ENABLED
))
2018 case HV_X64_MSR_EOI
:
2019 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
2020 case HV_X64_MSR_ICR
:
2021 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
2022 case HV_X64_MSR_TPR
:
2023 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
2025 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
2026 "data 0x%llx\n", msr
, data
);
2033 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2035 gpa_t gpa
= data
& ~0x3f;
2037 /* Bits 2:5 are reserved, Should be zero */
2041 vcpu
->arch
.apf
.msr_val
= data
;
2043 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2044 kvm_clear_async_pf_completion_queue(vcpu
);
2045 kvm_async_pf_hash_reset(vcpu
);
2049 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2053 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2054 kvm_async_pf_wakeup_all(vcpu
);
2058 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2060 vcpu
->arch
.pv_time_enabled
= false;
2063 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
2067 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2070 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
2071 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2072 vcpu
->arch
.st
.accum_steal
= delta
;
2075 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2077 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2080 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2081 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2084 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
2085 vcpu
->arch
.st
.steal
.version
+= 2;
2086 vcpu
->arch
.st
.accum_steal
= 0;
2088 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2089 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2092 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2095 u32 msr
= msr_info
->index
;
2096 u64 data
= msr_info
->data
;
2099 case MSR_AMD64_NB_CFG
:
2100 case MSR_IA32_UCODE_REV
:
2101 case MSR_IA32_UCODE_WRITE
:
2102 case MSR_VM_HSAVE_PA
:
2103 case MSR_AMD64_PATCH_LOADER
:
2104 case MSR_AMD64_BU_CFG2
:
2108 return set_efer(vcpu
, data
);
2110 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2111 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2112 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2113 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2115 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2120 case MSR_FAM10H_MMIO_CONF_BASE
:
2122 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2127 case MSR_IA32_DEBUGCTLMSR
:
2129 /* We support the non-activated case already */
2131 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2132 /* Values other than LBR and BTF are vendor-specific,
2133 thus reserved and should throw a #GP */
2136 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2139 case 0x200 ... 0x2ff:
2140 return set_msr_mtrr(vcpu
, msr
, data
);
2141 case MSR_IA32_APICBASE
:
2142 return kvm_set_apic_base(vcpu
, msr_info
);
2143 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2144 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2145 case MSR_IA32_TSCDEADLINE
:
2146 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2148 case MSR_IA32_TSC_ADJUST
:
2149 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2150 if (!msr_info
->host_initiated
) {
2151 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2152 kvm_x86_ops
->adjust_tsc_offset(vcpu
, adj
, true);
2154 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2157 case MSR_IA32_MISC_ENABLE
:
2158 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2160 case MSR_KVM_WALL_CLOCK_NEW
:
2161 case MSR_KVM_WALL_CLOCK
:
2162 vcpu
->kvm
->arch
.wall_clock
= data
;
2163 kvm_write_wall_clock(vcpu
->kvm
, data
);
2165 case MSR_KVM_SYSTEM_TIME_NEW
:
2166 case MSR_KVM_SYSTEM_TIME
: {
2168 kvmclock_reset(vcpu
);
2170 vcpu
->arch
.time
= data
;
2171 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2173 /* we verify if the enable bit is set... */
2177 gpa_offset
= data
& ~(PAGE_MASK
| 1);
2179 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2180 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2181 sizeof(struct pvclock_vcpu_time_info
)))
2182 vcpu
->arch
.pv_time_enabled
= false;
2184 vcpu
->arch
.pv_time_enabled
= true;
2188 case MSR_KVM_ASYNC_PF_EN
:
2189 if (kvm_pv_enable_async_pf(vcpu
, data
))
2192 case MSR_KVM_STEAL_TIME
:
2194 if (unlikely(!sched_info_on()))
2197 if (data
& KVM_STEAL_RESERVED_MASK
)
2200 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2201 data
& KVM_STEAL_VALID_BITS
,
2202 sizeof(struct kvm_steal_time
)))
2205 vcpu
->arch
.st
.msr_val
= data
;
2207 if (!(data
& KVM_MSR_ENABLED
))
2210 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2213 accumulate_steal_time(vcpu
);
2216 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2219 case MSR_KVM_PV_EOI_EN
:
2220 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2224 case MSR_IA32_MCG_CTL
:
2225 case MSR_IA32_MCG_STATUS
:
2226 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2227 return set_msr_mce(vcpu
, msr
, data
);
2229 /* Performance counters are not protected by a CPUID bit,
2230 * so we should check all of them in the generic path for the sake of
2231 * cross vendor migration.
2232 * Writing a zero into the event select MSRs disables them,
2233 * which we perfectly emulate ;-). Any other value should be at least
2234 * reported, some guests depend on them.
2236 case MSR_K7_EVNTSEL0
:
2237 case MSR_K7_EVNTSEL1
:
2238 case MSR_K7_EVNTSEL2
:
2239 case MSR_K7_EVNTSEL3
:
2241 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2242 "0x%x data 0x%llx\n", msr
, data
);
2244 /* at least RHEL 4 unconditionally writes to the perfctr registers,
2245 * so we ignore writes to make it happy.
2247 case MSR_K7_PERFCTR0
:
2248 case MSR_K7_PERFCTR1
:
2249 case MSR_K7_PERFCTR2
:
2250 case MSR_K7_PERFCTR3
:
2251 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2252 "0x%x data 0x%llx\n", msr
, data
);
2254 case MSR_P6_PERFCTR0
:
2255 case MSR_P6_PERFCTR1
:
2257 case MSR_P6_EVNTSEL0
:
2258 case MSR_P6_EVNTSEL1
:
2259 if (kvm_pmu_msr(vcpu
, msr
))
2260 return kvm_pmu_set_msr(vcpu
, msr_info
);
2262 if (pr
|| data
!= 0)
2263 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2264 "0x%x data 0x%llx\n", msr
, data
);
2266 case MSR_K7_CLK_CTL
:
2268 * Ignore all writes to this no longer documented MSR.
2269 * Writes are only relevant for old K7 processors,
2270 * all pre-dating SVM, but a recommended workaround from
2271 * AMD for these chips. It is possible to specify the
2272 * affected processor models on the command line, hence
2273 * the need to ignore the workaround.
2276 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2277 if (kvm_hv_msr_partition_wide(msr
)) {
2279 mutex_lock(&vcpu
->kvm
->lock
);
2280 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
2281 mutex_unlock(&vcpu
->kvm
->lock
);
2284 return set_msr_hyperv(vcpu
, msr
, data
);
2286 case MSR_IA32_BBL_CR_CTL3
:
2287 /* Drop writes to this legacy MSR -- see rdmsr
2288 * counterpart for further detail.
2290 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
2292 case MSR_AMD64_OSVW_ID_LENGTH
:
2293 if (!guest_cpuid_has_osvw(vcpu
))
2295 vcpu
->arch
.osvw
.length
= data
;
2297 case MSR_AMD64_OSVW_STATUS
:
2298 if (!guest_cpuid_has_osvw(vcpu
))
2300 vcpu
->arch
.osvw
.status
= data
;
2303 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2304 return xen_hvm_config(vcpu
, data
);
2305 if (kvm_pmu_msr(vcpu
, msr
))
2306 return kvm_pmu_set_msr(vcpu
, msr_info
);
2308 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
2312 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
2319 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2323 * Reads an msr value (of 'msr_index') into 'pdata'.
2324 * Returns 0 on success, non-0 otherwise.
2325 * Assumes vcpu_load() was already called.
2327 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
2329 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
2331 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2333 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2335 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
2337 if (!msr_mtrr_valid(msr
))
2340 if (msr
== MSR_MTRRdefType
)
2341 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
2342 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
2343 else if (msr
== MSR_MTRRfix64K_00000
)
2345 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
2346 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
2347 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
2348 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
2349 else if (msr
== MSR_IA32_CR_PAT
)
2350 *pdata
= vcpu
->arch
.pat
;
2351 else { /* Variable MTRRs */
2352 int idx
, is_mtrr_mask
;
2355 idx
= (msr
- 0x200) / 2;
2356 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
2359 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
2362 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
2369 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2372 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2373 unsigned bank_num
= mcg_cap
& 0xff;
2376 case MSR_IA32_P5_MC_ADDR
:
2377 case MSR_IA32_P5_MC_TYPE
:
2380 case MSR_IA32_MCG_CAP
:
2381 data
= vcpu
->arch
.mcg_cap
;
2383 case MSR_IA32_MCG_CTL
:
2384 if (!(mcg_cap
& MCG_CTL_P
))
2386 data
= vcpu
->arch
.mcg_ctl
;
2388 case MSR_IA32_MCG_STATUS
:
2389 data
= vcpu
->arch
.mcg_status
;
2392 if (msr
>= MSR_IA32_MC0_CTL
&&
2393 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2394 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2395 data
= vcpu
->arch
.mce_banks
[offset
];
2404 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2407 struct kvm
*kvm
= vcpu
->kvm
;
2410 case HV_X64_MSR_GUEST_OS_ID
:
2411 data
= kvm
->arch
.hv_guest_os_id
;
2413 case HV_X64_MSR_HYPERCALL
:
2414 data
= kvm
->arch
.hv_hypercall
;
2416 case HV_X64_MSR_TIME_REF_COUNT
: {
2418 div_u64(get_kernel_ns() + kvm
->arch
.kvmclock_offset
, 100);
2421 case HV_X64_MSR_REFERENCE_TSC
:
2422 data
= kvm
->arch
.hv_tsc_page
;
2425 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2433 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2438 case HV_X64_MSR_VP_INDEX
: {
2441 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
) {
2449 case HV_X64_MSR_EOI
:
2450 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
2451 case HV_X64_MSR_ICR
:
2452 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
2453 case HV_X64_MSR_TPR
:
2454 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
2455 case HV_X64_MSR_APIC_ASSIST_PAGE
:
2456 data
= vcpu
->arch
.hv_vapic
;
2459 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2466 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2471 case MSR_IA32_PLATFORM_ID
:
2472 case MSR_IA32_EBL_CR_POWERON
:
2473 case MSR_IA32_DEBUGCTLMSR
:
2474 case MSR_IA32_LASTBRANCHFROMIP
:
2475 case MSR_IA32_LASTBRANCHTOIP
:
2476 case MSR_IA32_LASTINTFROMIP
:
2477 case MSR_IA32_LASTINTTOIP
:
2480 case MSR_VM_HSAVE_PA
:
2481 case MSR_K7_EVNTSEL0
:
2482 case MSR_K7_EVNTSEL1
:
2483 case MSR_K7_EVNTSEL2
:
2484 case MSR_K7_EVNTSEL3
:
2485 case MSR_K7_PERFCTR0
:
2486 case MSR_K7_PERFCTR1
:
2487 case MSR_K7_PERFCTR2
:
2488 case MSR_K7_PERFCTR3
:
2489 case MSR_K8_INT_PENDING_MSG
:
2490 case MSR_AMD64_NB_CFG
:
2491 case MSR_FAM10H_MMIO_CONF_BASE
:
2492 case MSR_AMD64_BU_CFG2
:
2495 case MSR_P6_PERFCTR0
:
2496 case MSR_P6_PERFCTR1
:
2497 case MSR_P6_EVNTSEL0
:
2498 case MSR_P6_EVNTSEL1
:
2499 if (kvm_pmu_msr(vcpu
, msr
))
2500 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2503 case MSR_IA32_UCODE_REV
:
2504 data
= 0x100000000ULL
;
2507 data
= 0x500 | KVM_NR_VAR_MTRR
;
2509 case 0x200 ... 0x2ff:
2510 return get_msr_mtrr(vcpu
, msr
, pdata
);
2511 case 0xcd: /* fsb frequency */
2515 * MSR_EBC_FREQUENCY_ID
2516 * Conservative value valid for even the basic CPU models.
2517 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2518 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2519 * and 266MHz for model 3, or 4. Set Core Clock
2520 * Frequency to System Bus Frequency Ratio to 1 (bits
2521 * 31:24) even though these are only valid for CPU
2522 * models > 2, however guests may end up dividing or
2523 * multiplying by zero otherwise.
2525 case MSR_EBC_FREQUENCY_ID
:
2528 case MSR_IA32_APICBASE
:
2529 data
= kvm_get_apic_base(vcpu
);
2531 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2532 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
2534 case MSR_IA32_TSCDEADLINE
:
2535 data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2537 case MSR_IA32_TSC_ADJUST
:
2538 data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2540 case MSR_IA32_MISC_ENABLE
:
2541 data
= vcpu
->arch
.ia32_misc_enable_msr
;
2543 case MSR_IA32_PERF_STATUS
:
2544 /* TSC increment by tick */
2546 /* CPU multiplier */
2547 data
|= (((uint64_t)4ULL) << 40);
2550 data
= vcpu
->arch
.efer
;
2552 case MSR_KVM_WALL_CLOCK
:
2553 case MSR_KVM_WALL_CLOCK_NEW
:
2554 data
= vcpu
->kvm
->arch
.wall_clock
;
2556 case MSR_KVM_SYSTEM_TIME
:
2557 case MSR_KVM_SYSTEM_TIME_NEW
:
2558 data
= vcpu
->arch
.time
;
2560 case MSR_KVM_ASYNC_PF_EN
:
2561 data
= vcpu
->arch
.apf
.msr_val
;
2563 case MSR_KVM_STEAL_TIME
:
2564 data
= vcpu
->arch
.st
.msr_val
;
2566 case MSR_KVM_PV_EOI_EN
:
2567 data
= vcpu
->arch
.pv_eoi
.msr_val
;
2569 case MSR_IA32_P5_MC_ADDR
:
2570 case MSR_IA32_P5_MC_TYPE
:
2571 case MSR_IA32_MCG_CAP
:
2572 case MSR_IA32_MCG_CTL
:
2573 case MSR_IA32_MCG_STATUS
:
2574 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2575 return get_msr_mce(vcpu
, msr
, pdata
);
2576 case MSR_K7_CLK_CTL
:
2578 * Provide expected ramp-up count for K7. All other
2579 * are set to zero, indicating minimum divisors for
2582 * This prevents guest kernels on AMD host with CPU
2583 * type 6, model 8 and higher from exploding due to
2584 * the rdmsr failing.
2588 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2589 if (kvm_hv_msr_partition_wide(msr
)) {
2591 mutex_lock(&vcpu
->kvm
->lock
);
2592 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
2593 mutex_unlock(&vcpu
->kvm
->lock
);
2596 return get_msr_hyperv(vcpu
, msr
, pdata
);
2598 case MSR_IA32_BBL_CR_CTL3
:
2599 /* This legacy MSR exists but isn't fully documented in current
2600 * silicon. It is however accessed by winxp in very narrow
2601 * scenarios where it sets bit #19, itself documented as
2602 * a "reserved" bit. Best effort attempt to source coherent
2603 * read data here should the balance of the register be
2604 * interpreted by the guest:
2606 * L2 cache control register 3: 64GB range, 256KB size,
2607 * enabled, latency 0x1, configured
2611 case MSR_AMD64_OSVW_ID_LENGTH
:
2612 if (!guest_cpuid_has_osvw(vcpu
))
2614 data
= vcpu
->arch
.osvw
.length
;
2616 case MSR_AMD64_OSVW_STATUS
:
2617 if (!guest_cpuid_has_osvw(vcpu
))
2619 data
= vcpu
->arch
.osvw
.status
;
2622 if (kvm_pmu_msr(vcpu
, msr
))
2623 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2625 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
2628 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
2636 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2639 * Read or write a bunch of msrs. All parameters are kernel addresses.
2641 * @return number of msrs set successfully.
2643 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2644 struct kvm_msr_entry
*entries
,
2645 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2646 unsigned index
, u64
*data
))
2650 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2651 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2652 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2654 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2660 * Read or write a bunch of msrs. Parameters are user addresses.
2662 * @return number of msrs set successfully.
2664 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2665 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2666 unsigned index
, u64
*data
),
2669 struct kvm_msrs msrs
;
2670 struct kvm_msr_entry
*entries
;
2675 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2679 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2682 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2683 entries
= memdup_user(user_msrs
->entries
, size
);
2684 if (IS_ERR(entries
)) {
2685 r
= PTR_ERR(entries
);
2689 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2694 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2705 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2710 case KVM_CAP_IRQCHIP
:
2712 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2713 case KVM_CAP_SET_TSS_ADDR
:
2714 case KVM_CAP_EXT_CPUID
:
2715 case KVM_CAP_EXT_EMUL_CPUID
:
2716 case KVM_CAP_CLOCKSOURCE
:
2718 case KVM_CAP_NOP_IO_DELAY
:
2719 case KVM_CAP_MP_STATE
:
2720 case KVM_CAP_SYNC_MMU
:
2721 case KVM_CAP_USER_NMI
:
2722 case KVM_CAP_REINJECT_CONTROL
:
2723 case KVM_CAP_IRQ_INJECT_STATUS
:
2725 case KVM_CAP_IOEVENTFD
:
2726 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2728 case KVM_CAP_PIT_STATE2
:
2729 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2730 case KVM_CAP_XEN_HVM
:
2731 case KVM_CAP_ADJUST_CLOCK
:
2732 case KVM_CAP_VCPU_EVENTS
:
2733 case KVM_CAP_HYPERV
:
2734 case KVM_CAP_HYPERV_VAPIC
:
2735 case KVM_CAP_HYPERV_SPIN
:
2736 case KVM_CAP_PCI_SEGMENT
:
2737 case KVM_CAP_DEBUGREGS
:
2738 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2740 case KVM_CAP_ASYNC_PF
:
2741 case KVM_CAP_GET_TSC_KHZ
:
2742 case KVM_CAP_KVMCLOCK_CTRL
:
2743 case KVM_CAP_READONLY_MEM
:
2744 case KVM_CAP_HYPERV_TIME
:
2745 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2746 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2747 case KVM_CAP_ASSIGN_DEV_IRQ
:
2748 case KVM_CAP_PCI_2_3
:
2752 case KVM_CAP_COALESCED_MMIO
:
2753 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2756 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2758 case KVM_CAP_NR_VCPUS
:
2759 r
= KVM_SOFT_MAX_VCPUS
;
2761 case KVM_CAP_MAX_VCPUS
:
2764 case KVM_CAP_NR_MEMSLOTS
:
2765 r
= KVM_USER_MEM_SLOTS
;
2767 case KVM_CAP_PV_MMU
: /* obsolete */
2770 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2772 r
= iommu_present(&pci_bus_type
);
2776 r
= KVM_MAX_MCE_BANKS
;
2781 case KVM_CAP_TSC_CONTROL
:
2782 r
= kvm_has_tsc_control
;
2784 case KVM_CAP_TSC_DEADLINE_TIMER
:
2785 r
= boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER
);
2795 long kvm_arch_dev_ioctl(struct file
*filp
,
2796 unsigned int ioctl
, unsigned long arg
)
2798 void __user
*argp
= (void __user
*)arg
;
2802 case KVM_GET_MSR_INDEX_LIST
: {
2803 struct kvm_msr_list __user
*user_msr_list
= argp
;
2804 struct kvm_msr_list msr_list
;
2808 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2811 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
2812 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2815 if (n
< msr_list
.nmsrs
)
2818 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2819 num_msrs_to_save
* sizeof(u32
)))
2821 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2823 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
2828 case KVM_GET_SUPPORTED_CPUID
:
2829 case KVM_GET_EMULATED_CPUID
: {
2830 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2831 struct kvm_cpuid2 cpuid
;
2834 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2837 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2843 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2848 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2851 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2853 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2865 static void wbinvd_ipi(void *garbage
)
2870 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2872 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2875 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2877 /* Address WBINVD may be executed by guest */
2878 if (need_emulate_wbinvd(vcpu
)) {
2879 if (kvm_x86_ops
->has_wbinvd_exit())
2880 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2881 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2882 smp_call_function_single(vcpu
->cpu
,
2883 wbinvd_ipi
, NULL
, 1);
2886 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2888 /* Apply any externally detected TSC adjustments (due to suspend) */
2889 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2890 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2891 vcpu
->arch
.tsc_offset_adjustment
= 0;
2892 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2895 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2896 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2897 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2899 mark_tsc_unstable("KVM discovered backwards TSC");
2900 if (check_tsc_unstable()) {
2901 u64 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
,
2902 vcpu
->arch
.last_guest_tsc
);
2903 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2904 vcpu
->arch
.tsc_catchup
= 1;
2907 * On a host with synchronized TSC, there is no need to update
2908 * kvmclock on vcpu->cpu migration
2910 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2911 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2912 if (vcpu
->cpu
!= cpu
)
2913 kvm_migrate_timers(vcpu
);
2917 accumulate_steal_time(vcpu
);
2918 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2921 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2923 kvm_x86_ops
->vcpu_put(vcpu
);
2924 kvm_put_guest_fpu(vcpu
);
2925 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2928 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2929 struct kvm_lapic_state
*s
)
2931 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2932 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2937 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2938 struct kvm_lapic_state
*s
)
2940 kvm_apic_post_state_restore(vcpu
, s
);
2941 update_cr8_intercept(vcpu
);
2946 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2947 struct kvm_interrupt
*irq
)
2949 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2951 if (irqchip_in_kernel(vcpu
->kvm
))
2954 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2955 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2960 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2962 kvm_inject_nmi(vcpu
);
2967 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2968 struct kvm_tpr_access_ctl
*tac
)
2972 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2976 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2980 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2983 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2985 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2988 vcpu
->arch
.mcg_cap
= mcg_cap
;
2989 /* Init IA32_MCG_CTL to all 1s */
2990 if (mcg_cap
& MCG_CTL_P
)
2991 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2992 /* Init IA32_MCi_CTL to all 1s */
2993 for (bank
= 0; bank
< bank_num
; bank
++)
2994 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2999 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3000 struct kvm_x86_mce
*mce
)
3002 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3003 unsigned bank_num
= mcg_cap
& 0xff;
3004 u64
*banks
= vcpu
->arch
.mce_banks
;
3006 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3009 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3010 * reporting is disabled
3012 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3013 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3015 banks
+= 4 * mce
->bank
;
3017 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3018 * reporting is disabled for the bank
3020 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3022 if (mce
->status
& MCI_STATUS_UC
) {
3023 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3024 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3025 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3028 if (banks
[1] & MCI_STATUS_VAL
)
3029 mce
->status
|= MCI_STATUS_OVER
;
3030 banks
[2] = mce
->addr
;
3031 banks
[3] = mce
->misc
;
3032 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3033 banks
[1] = mce
->status
;
3034 kvm_queue_exception(vcpu
, MC_VECTOR
);
3035 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3036 || !(banks
[1] & MCI_STATUS_UC
)) {
3037 if (banks
[1] & MCI_STATUS_VAL
)
3038 mce
->status
|= MCI_STATUS_OVER
;
3039 banks
[2] = mce
->addr
;
3040 banks
[3] = mce
->misc
;
3041 banks
[1] = mce
->status
;
3043 banks
[1] |= MCI_STATUS_OVER
;
3047 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3048 struct kvm_vcpu_events
*events
)
3051 events
->exception
.injected
=
3052 vcpu
->arch
.exception
.pending
&&
3053 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3054 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3055 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3056 events
->exception
.pad
= 0;
3057 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3059 events
->interrupt
.injected
=
3060 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3061 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3062 events
->interrupt
.soft
= 0;
3063 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3065 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3066 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3067 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3068 events
->nmi
.pad
= 0;
3070 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3072 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3073 | KVM_VCPUEVENT_VALID_SHADOW
);
3074 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3077 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3078 struct kvm_vcpu_events
*events
)
3080 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3081 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3082 | KVM_VCPUEVENT_VALID_SHADOW
))
3086 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3087 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3088 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3089 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3091 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3092 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3093 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3094 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3095 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3096 events
->interrupt
.shadow
);
3098 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3099 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3100 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3101 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3103 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3104 kvm_vcpu_has_lapic(vcpu
))
3105 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3107 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3112 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3113 struct kvm_debugregs
*dbgregs
)
3117 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3118 kvm_get_dr(vcpu
, 6, &val
);
3120 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3122 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3125 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3126 struct kvm_debugregs
*dbgregs
)
3131 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3132 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3133 kvm_update_dr6(vcpu
);
3134 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3135 kvm_update_dr7(vcpu
);
3140 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3142 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3144 struct xsave_struct
*xsave
= &vcpu
->arch
.guest_fpu
.state
->xsave
;
3145 u64 xstate_bv
= xsave
->xsave_hdr
.xstate_bv
;
3149 * Copy legacy XSAVE area, to avoid complications with CPUID
3150 * leaves 0 and 1 in the loop below.
3152 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3155 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3158 * Copy each region from the possibly compacted offset to the
3159 * non-compacted offset.
3161 valid
= xstate_bv
& ~XSTATE_FPSSE
;
3163 u64 feature
= valid
& -valid
;
3164 int index
= fls64(feature
) - 1;
3165 void *src
= get_xsave_addr(xsave
, feature
);
3168 u32 size
, offset
, ecx
, edx
;
3169 cpuid_count(XSTATE_CPUID
, index
,
3170 &size
, &offset
, &ecx
, &edx
);
3171 memcpy(dest
+ offset
, src
, size
);
3178 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3180 struct xsave_struct
*xsave
= &vcpu
->arch
.guest_fpu
.state
->xsave
;
3181 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3185 * Copy legacy XSAVE area, to avoid complications with CPUID
3186 * leaves 0 and 1 in the loop below.
3188 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3190 /* Set XSTATE_BV and possibly XCOMP_BV. */
3191 xsave
->xsave_hdr
.xstate_bv
= xstate_bv
;
3193 xsave
->xsave_hdr
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3196 * Copy each region from the non-compacted offset to the
3197 * possibly compacted offset.
3199 valid
= xstate_bv
& ~XSTATE_FPSSE
;
3201 u64 feature
= valid
& -valid
;
3202 int index
= fls64(feature
) - 1;
3203 void *dest
= get_xsave_addr(xsave
, feature
);
3206 u32 size
, offset
, ecx
, edx
;
3207 cpuid_count(XSTATE_CPUID
, index
,
3208 &size
, &offset
, &ecx
, &edx
);
3209 memcpy(dest
, src
+ offset
, size
);
3217 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3218 struct kvm_xsave
*guest_xsave
)
3220 if (cpu_has_xsave
) {
3221 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3222 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3224 memcpy(guest_xsave
->region
,
3225 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
3226 sizeof(struct i387_fxsave_struct
));
3227 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3232 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3233 struct kvm_xsave
*guest_xsave
)
3236 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3238 if (cpu_has_xsave
) {
3240 * Here we allow setting states that are not present in
3241 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3242 * with old userspace.
3244 if (xstate_bv
& ~kvm_supported_xcr0())
3246 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3248 if (xstate_bv
& ~XSTATE_FPSSE
)
3250 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
3251 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
3256 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3257 struct kvm_xcrs
*guest_xcrs
)
3259 if (!cpu_has_xsave
) {
3260 guest_xcrs
->nr_xcrs
= 0;
3264 guest_xcrs
->nr_xcrs
= 1;
3265 guest_xcrs
->flags
= 0;
3266 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3267 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3270 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3271 struct kvm_xcrs
*guest_xcrs
)
3278 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3281 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3282 /* Only support XCR0 currently */
3283 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3284 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3285 guest_xcrs
->xcrs
[i
].value
);
3294 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3295 * stopped by the hypervisor. This function will be called from the host only.
3296 * EINVAL is returned when the host attempts to set the flag for a guest that
3297 * does not support pv clocks.
3299 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3301 if (!vcpu
->arch
.pv_time_enabled
)
3303 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3304 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3308 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3309 unsigned int ioctl
, unsigned long arg
)
3311 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3312 void __user
*argp
= (void __user
*)arg
;
3315 struct kvm_lapic_state
*lapic
;
3316 struct kvm_xsave
*xsave
;
3317 struct kvm_xcrs
*xcrs
;
3323 case KVM_GET_LAPIC
: {
3325 if (!vcpu
->arch
.apic
)
3327 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3332 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3336 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3341 case KVM_SET_LAPIC
: {
3343 if (!vcpu
->arch
.apic
)
3345 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3346 if (IS_ERR(u
.lapic
))
3347 return PTR_ERR(u
.lapic
);
3349 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3352 case KVM_INTERRUPT
: {
3353 struct kvm_interrupt irq
;
3356 if (copy_from_user(&irq
, argp
, sizeof irq
))
3358 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3362 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3365 case KVM_SET_CPUID
: {
3366 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3367 struct kvm_cpuid cpuid
;
3370 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3372 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3375 case KVM_SET_CPUID2
: {
3376 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3377 struct kvm_cpuid2 cpuid
;
3380 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3382 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3383 cpuid_arg
->entries
);
3386 case KVM_GET_CPUID2
: {
3387 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3388 struct kvm_cpuid2 cpuid
;
3391 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3393 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3394 cpuid_arg
->entries
);
3398 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3404 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
3407 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3409 case KVM_TPR_ACCESS_REPORTING
: {
3410 struct kvm_tpr_access_ctl tac
;
3413 if (copy_from_user(&tac
, argp
, sizeof tac
))
3415 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3419 if (copy_to_user(argp
, &tac
, sizeof tac
))
3424 case KVM_SET_VAPIC_ADDR
: {
3425 struct kvm_vapic_addr va
;
3428 if (!irqchip_in_kernel(vcpu
->kvm
))
3431 if (copy_from_user(&va
, argp
, sizeof va
))
3433 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3436 case KVM_X86_SETUP_MCE
: {
3440 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3442 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3445 case KVM_X86_SET_MCE
: {
3446 struct kvm_x86_mce mce
;
3449 if (copy_from_user(&mce
, argp
, sizeof mce
))
3451 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3454 case KVM_GET_VCPU_EVENTS
: {
3455 struct kvm_vcpu_events events
;
3457 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3460 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3465 case KVM_SET_VCPU_EVENTS
: {
3466 struct kvm_vcpu_events events
;
3469 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3472 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3475 case KVM_GET_DEBUGREGS
: {
3476 struct kvm_debugregs dbgregs
;
3478 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3481 if (copy_to_user(argp
, &dbgregs
,
3482 sizeof(struct kvm_debugregs
)))
3487 case KVM_SET_DEBUGREGS
: {
3488 struct kvm_debugregs dbgregs
;
3491 if (copy_from_user(&dbgregs
, argp
,
3492 sizeof(struct kvm_debugregs
)))
3495 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3498 case KVM_GET_XSAVE
: {
3499 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3504 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3507 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3512 case KVM_SET_XSAVE
: {
3513 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3514 if (IS_ERR(u
.xsave
))
3515 return PTR_ERR(u
.xsave
);
3517 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3520 case KVM_GET_XCRS
: {
3521 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3526 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3529 if (copy_to_user(argp
, u
.xcrs
,
3530 sizeof(struct kvm_xcrs
)))
3535 case KVM_SET_XCRS
: {
3536 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3538 return PTR_ERR(u
.xcrs
);
3540 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3543 case KVM_SET_TSC_KHZ
: {
3547 user_tsc_khz
= (u32
)arg
;
3549 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3552 if (user_tsc_khz
== 0)
3553 user_tsc_khz
= tsc_khz
;
3555 kvm_set_tsc_khz(vcpu
, user_tsc_khz
);
3560 case KVM_GET_TSC_KHZ
: {
3561 r
= vcpu
->arch
.virtual_tsc_khz
;
3564 case KVM_KVMCLOCK_CTRL
: {
3565 r
= kvm_set_guest_paused(vcpu
);
3576 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3578 return VM_FAULT_SIGBUS
;
3581 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3585 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3587 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3591 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3594 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3598 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3599 u32 kvm_nr_mmu_pages
)
3601 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3604 mutex_lock(&kvm
->slots_lock
);
3606 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3607 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3609 mutex_unlock(&kvm
->slots_lock
);
3613 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3615 return kvm
->arch
.n_max_mmu_pages
;
3618 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3623 switch (chip
->chip_id
) {
3624 case KVM_IRQCHIP_PIC_MASTER
:
3625 memcpy(&chip
->chip
.pic
,
3626 &pic_irqchip(kvm
)->pics
[0],
3627 sizeof(struct kvm_pic_state
));
3629 case KVM_IRQCHIP_PIC_SLAVE
:
3630 memcpy(&chip
->chip
.pic
,
3631 &pic_irqchip(kvm
)->pics
[1],
3632 sizeof(struct kvm_pic_state
));
3634 case KVM_IRQCHIP_IOAPIC
:
3635 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3644 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3649 switch (chip
->chip_id
) {
3650 case KVM_IRQCHIP_PIC_MASTER
:
3651 spin_lock(&pic_irqchip(kvm
)->lock
);
3652 memcpy(&pic_irqchip(kvm
)->pics
[0],
3654 sizeof(struct kvm_pic_state
));
3655 spin_unlock(&pic_irqchip(kvm
)->lock
);
3657 case KVM_IRQCHIP_PIC_SLAVE
:
3658 spin_lock(&pic_irqchip(kvm
)->lock
);
3659 memcpy(&pic_irqchip(kvm
)->pics
[1],
3661 sizeof(struct kvm_pic_state
));
3662 spin_unlock(&pic_irqchip(kvm
)->lock
);
3664 case KVM_IRQCHIP_IOAPIC
:
3665 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3671 kvm_pic_update_irq(pic_irqchip(kvm
));
3675 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3679 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3680 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3681 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3685 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3689 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3690 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3691 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3692 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3696 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3700 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3701 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3702 sizeof(ps
->channels
));
3703 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3704 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3705 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3709 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3711 int r
= 0, start
= 0;
3712 u32 prev_legacy
, cur_legacy
;
3713 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3714 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3715 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3716 if (!prev_legacy
&& cur_legacy
)
3718 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3719 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3720 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3721 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3722 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3726 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3727 struct kvm_reinject_control
*control
)
3729 if (!kvm
->arch
.vpit
)
3731 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3732 kvm
->arch
.vpit
->pit_state
.reinject
= control
->pit_reinject
;
3733 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3738 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3739 * @kvm: kvm instance
3740 * @log: slot id and address to which we copy the log
3742 * We need to keep it in mind that VCPU threads can write to the bitmap
3743 * concurrently. So, to avoid losing data, we keep the following order for
3746 * 1. Take a snapshot of the bit and clear it if needed.
3747 * 2. Write protect the corresponding page.
3748 * 3. Flush TLB's if needed.
3749 * 4. Copy the snapshot to the userspace.
3751 * Between 2 and 3, the guest may write to the page using the remaining TLB
3752 * entry. This is not a problem because the page will be reported dirty at
3753 * step 4 using the snapshot taken before and step 3 ensures that successive
3754 * writes will be logged for the next call.
3756 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3759 struct kvm_memory_slot
*memslot
;
3761 unsigned long *dirty_bitmap
;
3762 unsigned long *dirty_bitmap_buffer
;
3763 bool is_dirty
= false;
3765 mutex_lock(&kvm
->slots_lock
);
3768 if (log
->slot
>= KVM_USER_MEM_SLOTS
)
3771 memslot
= id_to_memslot(kvm
->memslots
, log
->slot
);
3773 dirty_bitmap
= memslot
->dirty_bitmap
;
3778 n
= kvm_dirty_bitmap_bytes(memslot
);
3780 dirty_bitmap_buffer
= dirty_bitmap
+ n
/ sizeof(long);
3781 memset(dirty_bitmap_buffer
, 0, n
);
3783 spin_lock(&kvm
->mmu_lock
);
3785 for (i
= 0; i
< n
/ sizeof(long); i
++) {
3789 if (!dirty_bitmap
[i
])
3794 mask
= xchg(&dirty_bitmap
[i
], 0);
3795 dirty_bitmap_buffer
[i
] = mask
;
3797 offset
= i
* BITS_PER_LONG
;
3798 kvm_mmu_write_protect_pt_masked(kvm
, memslot
, offset
, mask
);
3801 spin_unlock(&kvm
->mmu_lock
);
3803 /* See the comments in kvm_mmu_slot_remove_write_access(). */
3804 lockdep_assert_held(&kvm
->slots_lock
);
3807 * All the TLBs can be flushed out of mmu lock, see the comments in
3808 * kvm_mmu_slot_remove_write_access().
3811 kvm_flush_remote_tlbs(kvm
);
3814 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap_buffer
, n
))
3819 mutex_unlock(&kvm
->slots_lock
);
3823 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3826 if (!irqchip_in_kernel(kvm
))
3829 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3830 irq_event
->irq
, irq_event
->level
,
3835 long kvm_arch_vm_ioctl(struct file
*filp
,
3836 unsigned int ioctl
, unsigned long arg
)
3838 struct kvm
*kvm
= filp
->private_data
;
3839 void __user
*argp
= (void __user
*)arg
;
3842 * This union makes it completely explicit to gcc-3.x
3843 * that these two variables' stack usage should be
3844 * combined, not added together.
3847 struct kvm_pit_state ps
;
3848 struct kvm_pit_state2 ps2
;
3849 struct kvm_pit_config pit_config
;
3853 case KVM_SET_TSS_ADDR
:
3854 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3856 case KVM_SET_IDENTITY_MAP_ADDR
: {
3860 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3862 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3865 case KVM_SET_NR_MMU_PAGES
:
3866 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3868 case KVM_GET_NR_MMU_PAGES
:
3869 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3871 case KVM_CREATE_IRQCHIP
: {
3872 struct kvm_pic
*vpic
;
3874 mutex_lock(&kvm
->lock
);
3877 goto create_irqchip_unlock
;
3879 if (atomic_read(&kvm
->online_vcpus
))
3880 goto create_irqchip_unlock
;
3882 vpic
= kvm_create_pic(kvm
);
3884 r
= kvm_ioapic_init(kvm
);
3886 mutex_lock(&kvm
->slots_lock
);
3887 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3889 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3891 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3893 mutex_unlock(&kvm
->slots_lock
);
3895 goto create_irqchip_unlock
;
3898 goto create_irqchip_unlock
;
3900 kvm
->arch
.vpic
= vpic
;
3902 r
= kvm_setup_default_irq_routing(kvm
);
3904 mutex_lock(&kvm
->slots_lock
);
3905 mutex_lock(&kvm
->irq_lock
);
3906 kvm_ioapic_destroy(kvm
);
3907 kvm_destroy_pic(kvm
);
3908 mutex_unlock(&kvm
->irq_lock
);
3909 mutex_unlock(&kvm
->slots_lock
);
3911 create_irqchip_unlock
:
3912 mutex_unlock(&kvm
->lock
);
3915 case KVM_CREATE_PIT
:
3916 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3918 case KVM_CREATE_PIT2
:
3920 if (copy_from_user(&u
.pit_config
, argp
,
3921 sizeof(struct kvm_pit_config
)))
3924 mutex_lock(&kvm
->slots_lock
);
3927 goto create_pit_unlock
;
3929 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3933 mutex_unlock(&kvm
->slots_lock
);
3935 case KVM_GET_IRQCHIP
: {
3936 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3937 struct kvm_irqchip
*chip
;
3939 chip
= memdup_user(argp
, sizeof(*chip
));
3946 if (!irqchip_in_kernel(kvm
))
3947 goto get_irqchip_out
;
3948 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3950 goto get_irqchip_out
;
3952 if (copy_to_user(argp
, chip
, sizeof *chip
))
3953 goto get_irqchip_out
;
3959 case KVM_SET_IRQCHIP
: {
3960 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3961 struct kvm_irqchip
*chip
;
3963 chip
= memdup_user(argp
, sizeof(*chip
));
3970 if (!irqchip_in_kernel(kvm
))
3971 goto set_irqchip_out
;
3972 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3974 goto set_irqchip_out
;
3982 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3985 if (!kvm
->arch
.vpit
)
3987 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3991 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3998 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4001 if (!kvm
->arch
.vpit
)
4003 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4006 case KVM_GET_PIT2
: {
4008 if (!kvm
->arch
.vpit
)
4010 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4014 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4019 case KVM_SET_PIT2
: {
4021 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4024 if (!kvm
->arch
.vpit
)
4026 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4029 case KVM_REINJECT_CONTROL
: {
4030 struct kvm_reinject_control control
;
4032 if (copy_from_user(&control
, argp
, sizeof(control
)))
4034 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4037 case KVM_XEN_HVM_CONFIG
: {
4039 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
4040 sizeof(struct kvm_xen_hvm_config
)))
4043 if (kvm
->arch
.xen_hvm_config
.flags
)
4048 case KVM_SET_CLOCK
: {
4049 struct kvm_clock_data user_ns
;
4054 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4062 local_irq_disable();
4063 now_ns
= get_kernel_ns();
4064 delta
= user_ns
.clock
- now_ns
;
4066 kvm
->arch
.kvmclock_offset
= delta
;
4067 kvm_gen_update_masterclock(kvm
);
4070 case KVM_GET_CLOCK
: {
4071 struct kvm_clock_data user_ns
;
4074 local_irq_disable();
4075 now_ns
= get_kernel_ns();
4076 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
4079 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4082 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4089 r
= kvm_vm_ioctl_assigned_device(kvm
, ioctl
, arg
);
4095 static void kvm_init_msr_list(void)
4100 /* skip the first msrs in the list. KVM-specific */
4101 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4102 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4106 * Even MSRs that are valid in the host may not be exposed
4107 * to the guests in some cases. We could work around this
4108 * in VMX with the generic MSR save/load machinery, but it
4109 * is not really worthwhile since it will really only
4110 * happen with nested virtualization.
4112 switch (msrs_to_save
[i
]) {
4113 case MSR_IA32_BNDCFGS
:
4114 if (!kvm_x86_ops
->mpx_supported())
4122 msrs_to_save
[j
] = msrs_to_save
[i
];
4125 num_msrs_to_save
= j
;
4128 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4136 if (!(vcpu
->arch
.apic
&&
4137 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4138 && kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
4149 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4156 if (!(vcpu
->arch
.apic
&&
4157 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4158 && kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
4160 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4170 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4171 struct kvm_segment
*var
, int seg
)
4173 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4176 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4177 struct kvm_segment
*var
, int seg
)
4179 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4182 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4183 struct x86_exception
*exception
)
4187 BUG_ON(!mmu_is_nested(vcpu
));
4189 /* NPT walks are always user-walks */
4190 access
|= PFERR_USER_MASK
;
4191 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4196 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4197 struct x86_exception
*exception
)
4199 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4200 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4203 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4204 struct x86_exception
*exception
)
4206 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4207 access
|= PFERR_FETCH_MASK
;
4208 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4211 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4212 struct x86_exception
*exception
)
4214 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4215 access
|= PFERR_WRITE_MASK
;
4216 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4219 /* uses this to access any guest's mapped memory without checking CPL */
4220 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4221 struct x86_exception
*exception
)
4223 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4226 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4227 struct kvm_vcpu
*vcpu
, u32 access
,
4228 struct x86_exception
*exception
)
4231 int r
= X86EMUL_CONTINUE
;
4234 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4236 unsigned offset
= addr
& (PAGE_SIZE
-1);
4237 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4240 if (gpa
== UNMAPPED_GVA
)
4241 return X86EMUL_PROPAGATE_FAULT
;
4242 ret
= kvm_read_guest_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
, data
,
4245 r
= X86EMUL_IO_NEEDED
;
4257 /* used for instruction fetching */
4258 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4259 gva_t addr
, void *val
, unsigned int bytes
,
4260 struct x86_exception
*exception
)
4262 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4263 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4267 /* Inline kvm_read_guest_virt_helper for speed. */
4268 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4270 if (unlikely(gpa
== UNMAPPED_GVA
))
4271 return X86EMUL_PROPAGATE_FAULT
;
4273 offset
= addr
& (PAGE_SIZE
-1);
4274 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4275 bytes
= (unsigned)PAGE_SIZE
- offset
;
4276 ret
= kvm_read_guest_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
, val
,
4278 if (unlikely(ret
< 0))
4279 return X86EMUL_IO_NEEDED
;
4281 return X86EMUL_CONTINUE
;
4284 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4285 gva_t addr
, void *val
, unsigned int bytes
,
4286 struct x86_exception
*exception
)
4288 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4289 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4291 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4294 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4296 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4297 gva_t addr
, void *val
, unsigned int bytes
,
4298 struct x86_exception
*exception
)
4300 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4301 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4304 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4305 gva_t addr
, void *val
,
4307 struct x86_exception
*exception
)
4309 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4311 int r
= X86EMUL_CONTINUE
;
4314 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4317 unsigned offset
= addr
& (PAGE_SIZE
-1);
4318 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4321 if (gpa
== UNMAPPED_GVA
)
4322 return X86EMUL_PROPAGATE_FAULT
;
4323 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
4325 r
= X86EMUL_IO_NEEDED
;
4336 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4338 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4339 gpa_t
*gpa
, struct x86_exception
*exception
,
4342 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4343 | (write
? PFERR_WRITE_MASK
: 0);
4345 if (vcpu_match_mmio_gva(vcpu
, gva
)
4346 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4347 vcpu
->arch
.access
, access
)) {
4348 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4349 (gva
& (PAGE_SIZE
- 1));
4350 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4354 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4356 if (*gpa
== UNMAPPED_GVA
)
4359 /* For APIC access vmexit */
4360 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4363 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4364 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4371 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4372 const void *val
, int bytes
)
4376 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4379 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
);
4383 struct read_write_emulator_ops
{
4384 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4386 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4387 void *val
, int bytes
);
4388 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4389 int bytes
, void *val
);
4390 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4391 void *val
, int bytes
);
4395 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4397 if (vcpu
->mmio_read_completed
) {
4398 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4399 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4400 vcpu
->mmio_read_completed
= 0;
4407 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4408 void *val
, int bytes
)
4410 return !kvm_read_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4413 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4414 void *val
, int bytes
)
4416 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4419 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4421 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4422 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4425 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4426 void *val
, int bytes
)
4428 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4429 return X86EMUL_IO_NEEDED
;
4432 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4433 void *val
, int bytes
)
4435 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4437 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4438 return X86EMUL_CONTINUE
;
4441 static const struct read_write_emulator_ops read_emultor
= {
4442 .read_write_prepare
= read_prepare
,
4443 .read_write_emulate
= read_emulate
,
4444 .read_write_mmio
= vcpu_mmio_read
,
4445 .read_write_exit_mmio
= read_exit_mmio
,
4448 static const struct read_write_emulator_ops write_emultor
= {
4449 .read_write_emulate
= write_emulate
,
4450 .read_write_mmio
= write_mmio
,
4451 .read_write_exit_mmio
= write_exit_mmio
,
4455 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4457 struct x86_exception
*exception
,
4458 struct kvm_vcpu
*vcpu
,
4459 const struct read_write_emulator_ops
*ops
)
4463 bool write
= ops
->write
;
4464 struct kvm_mmio_fragment
*frag
;
4466 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4469 return X86EMUL_PROPAGATE_FAULT
;
4471 /* For APIC access vmexit */
4475 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4476 return X86EMUL_CONTINUE
;
4480 * Is this MMIO handled locally?
4482 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4483 if (handled
== bytes
)
4484 return X86EMUL_CONTINUE
;
4490 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4491 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4495 return X86EMUL_CONTINUE
;
4498 int emulator_read_write(struct x86_emulate_ctxt
*ctxt
, unsigned long addr
,
4499 void *val
, unsigned int bytes
,
4500 struct x86_exception
*exception
,
4501 const struct read_write_emulator_ops
*ops
)
4503 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4507 if (ops
->read_write_prepare
&&
4508 ops
->read_write_prepare(vcpu
, val
, bytes
))
4509 return X86EMUL_CONTINUE
;
4511 vcpu
->mmio_nr_fragments
= 0;
4513 /* Crossing a page boundary? */
4514 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4517 now
= -addr
& ~PAGE_MASK
;
4518 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4521 if (rc
!= X86EMUL_CONTINUE
)
4528 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4530 if (rc
!= X86EMUL_CONTINUE
)
4533 if (!vcpu
->mmio_nr_fragments
)
4536 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4538 vcpu
->mmio_needed
= 1;
4539 vcpu
->mmio_cur_fragment
= 0;
4541 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4542 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4543 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4544 vcpu
->run
->mmio
.phys_addr
= gpa
;
4546 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4549 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4553 struct x86_exception
*exception
)
4555 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4556 exception
, &read_emultor
);
4559 int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4563 struct x86_exception
*exception
)
4565 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4566 exception
, &write_emultor
);
4569 #define CMPXCHG_TYPE(t, ptr, old, new) \
4570 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4572 #ifdef CONFIG_X86_64
4573 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4575 # define CMPXCHG64(ptr, old, new) \
4576 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4579 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4584 struct x86_exception
*exception
)
4586 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4592 /* guests cmpxchg8b have to be emulated atomically */
4593 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4596 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4598 if (gpa
== UNMAPPED_GVA
||
4599 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4602 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4605 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4606 if (is_error_page(page
))
4609 kaddr
= kmap_atomic(page
);
4610 kaddr
+= offset_in_page(gpa
);
4613 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4616 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4619 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4622 exchanged
= CMPXCHG64(kaddr
, old
, new);
4627 kunmap_atomic(kaddr
);
4628 kvm_release_page_dirty(page
);
4631 return X86EMUL_CMPXCHG_FAILED
;
4633 mark_page_dirty(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4634 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
);
4636 return X86EMUL_CONTINUE
;
4639 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4641 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4644 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4646 /* TODO: String I/O for in kernel device */
4649 if (vcpu
->arch
.pio
.in
)
4650 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4651 vcpu
->arch
.pio
.size
, pd
);
4653 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
4654 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4659 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4660 unsigned short port
, void *val
,
4661 unsigned int count
, bool in
)
4663 vcpu
->arch
.pio
.port
= port
;
4664 vcpu
->arch
.pio
.in
= in
;
4665 vcpu
->arch
.pio
.count
= count
;
4666 vcpu
->arch
.pio
.size
= size
;
4668 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4669 vcpu
->arch
.pio
.count
= 0;
4673 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4674 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4675 vcpu
->run
->io
.size
= size
;
4676 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4677 vcpu
->run
->io
.count
= count
;
4678 vcpu
->run
->io
.port
= port
;
4683 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4684 int size
, unsigned short port
, void *val
,
4687 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4690 if (vcpu
->arch
.pio
.count
)
4693 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4696 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4697 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4698 vcpu
->arch
.pio
.count
= 0;
4705 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4706 int size
, unsigned short port
,
4707 const void *val
, unsigned int count
)
4709 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4711 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4712 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4713 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4716 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4718 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4721 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4723 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4726 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4728 if (!need_emulate_wbinvd(vcpu
))
4729 return X86EMUL_CONTINUE
;
4731 if (kvm_x86_ops
->has_wbinvd_exit()) {
4732 int cpu
= get_cpu();
4734 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4735 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4736 wbinvd_ipi
, NULL
, 1);
4738 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4741 return X86EMUL_CONTINUE
;
4743 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4745 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4747 kvm_emulate_wbinvd(emul_to_vcpu(ctxt
));
4750 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
4752 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4755 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
4758 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4761 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4763 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4766 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4768 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4769 unsigned long value
;
4773 value
= kvm_read_cr0(vcpu
);
4776 value
= vcpu
->arch
.cr2
;
4779 value
= kvm_read_cr3(vcpu
);
4782 value
= kvm_read_cr4(vcpu
);
4785 value
= kvm_get_cr8(vcpu
);
4788 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4795 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4797 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4802 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4805 vcpu
->arch
.cr2
= val
;
4808 res
= kvm_set_cr3(vcpu
, val
);
4811 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4814 res
= kvm_set_cr8(vcpu
, val
);
4817 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4824 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4826 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4829 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4831 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4834 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4836 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4839 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4841 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4844 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4846 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4849 static unsigned long emulator_get_cached_segment_base(
4850 struct x86_emulate_ctxt
*ctxt
, int seg
)
4852 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4855 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4856 struct desc_struct
*desc
, u32
*base3
,
4859 struct kvm_segment var
;
4861 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4862 *selector
= var
.selector
;
4865 memset(desc
, 0, sizeof(*desc
));
4871 set_desc_limit(desc
, var
.limit
);
4872 set_desc_base(desc
, (unsigned long)var
.base
);
4873 #ifdef CONFIG_X86_64
4875 *base3
= var
.base
>> 32;
4877 desc
->type
= var
.type
;
4879 desc
->dpl
= var
.dpl
;
4880 desc
->p
= var
.present
;
4881 desc
->avl
= var
.avl
;
4889 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4890 struct desc_struct
*desc
, u32 base3
,
4893 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4894 struct kvm_segment var
;
4896 var
.selector
= selector
;
4897 var
.base
= get_desc_base(desc
);
4898 #ifdef CONFIG_X86_64
4899 var
.base
|= ((u64
)base3
) << 32;
4901 var
.limit
= get_desc_limit(desc
);
4903 var
.limit
= (var
.limit
<< 12) | 0xfff;
4904 var
.type
= desc
->type
;
4905 var
.dpl
= desc
->dpl
;
4910 var
.avl
= desc
->avl
;
4911 var
.present
= desc
->p
;
4912 var
.unusable
= !var
.present
;
4915 kvm_set_segment(vcpu
, &var
, seg
);
4919 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4920 u32 msr_index
, u64
*pdata
)
4922 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
4925 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4926 u32 msr_index
, u64 data
)
4928 struct msr_data msr
;
4931 msr
.index
= msr_index
;
4932 msr
.host_initiated
= false;
4933 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
4936 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
4939 return kvm_pmu_check_pmc(emul_to_vcpu(ctxt
), pmc
);
4942 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
4943 u32 pmc
, u64
*pdata
)
4945 return kvm_pmu_read_pmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
4948 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4950 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4953 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4956 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4958 * CR0.TS may reference the host fpu state, not the guest fpu state,
4959 * so it may be clear at this point.
4964 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4969 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4970 struct x86_instruction_info
*info
,
4971 enum x86_intercept_stage stage
)
4973 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
4976 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
4977 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
4979 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
4982 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
4984 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
4987 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
4989 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
4992 static const struct x86_emulate_ops emulate_ops
= {
4993 .read_gpr
= emulator_read_gpr
,
4994 .write_gpr
= emulator_write_gpr
,
4995 .read_std
= kvm_read_guest_virt_system
,
4996 .write_std
= kvm_write_guest_virt_system
,
4997 .fetch
= kvm_fetch_guest_virt
,
4998 .read_emulated
= emulator_read_emulated
,
4999 .write_emulated
= emulator_write_emulated
,
5000 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5001 .invlpg
= emulator_invlpg
,
5002 .pio_in_emulated
= emulator_pio_in_emulated
,
5003 .pio_out_emulated
= emulator_pio_out_emulated
,
5004 .get_segment
= emulator_get_segment
,
5005 .set_segment
= emulator_set_segment
,
5006 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5007 .get_gdt
= emulator_get_gdt
,
5008 .get_idt
= emulator_get_idt
,
5009 .set_gdt
= emulator_set_gdt
,
5010 .set_idt
= emulator_set_idt
,
5011 .get_cr
= emulator_get_cr
,
5012 .set_cr
= emulator_set_cr
,
5013 .cpl
= emulator_get_cpl
,
5014 .get_dr
= emulator_get_dr
,
5015 .set_dr
= emulator_set_dr
,
5016 .set_msr
= emulator_set_msr
,
5017 .get_msr
= emulator_get_msr
,
5018 .check_pmc
= emulator_check_pmc
,
5019 .read_pmc
= emulator_read_pmc
,
5020 .halt
= emulator_halt
,
5021 .wbinvd
= emulator_wbinvd
,
5022 .fix_hypercall
= emulator_fix_hypercall
,
5023 .get_fpu
= emulator_get_fpu
,
5024 .put_fpu
= emulator_put_fpu
,
5025 .intercept
= emulator_intercept
,
5026 .get_cpuid
= emulator_get_cpuid
,
5029 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5031 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5033 * an sti; sti; sequence only disable interrupts for the first
5034 * instruction. So, if the last instruction, be it emulated or
5035 * not, left the system with the INT_STI flag enabled, it
5036 * means that the last instruction is an sti. We should not
5037 * leave the flag on in this case. The same goes for mov ss
5039 if (int_shadow
& mask
)
5041 if (unlikely(int_shadow
|| mask
)) {
5042 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5044 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5048 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5050 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5051 if (ctxt
->exception
.vector
== PF_VECTOR
)
5052 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5054 if (ctxt
->exception
.error_code_valid
)
5055 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5056 ctxt
->exception
.error_code
);
5058 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5062 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5064 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5067 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5069 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5070 ctxt
->eip
= kvm_rip_read(vcpu
);
5071 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5072 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5073 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5074 cs_db
? X86EMUL_MODE_PROT32
:
5075 X86EMUL_MODE_PROT16
;
5076 ctxt
->guest_mode
= is_guest_mode(vcpu
);
5078 init_decode_cache(ctxt
);
5079 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5082 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5084 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5087 init_emulate_ctxt(vcpu
);
5091 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5092 ret
= emulate_int_real(ctxt
, irq
);
5094 if (ret
!= X86EMUL_CONTINUE
)
5095 return EMULATE_FAIL
;
5097 ctxt
->eip
= ctxt
->_eip
;
5098 kvm_rip_write(vcpu
, ctxt
->eip
);
5099 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5101 if (irq
== NMI_VECTOR
)
5102 vcpu
->arch
.nmi_pending
= 0;
5104 vcpu
->arch
.interrupt
.pending
= false;
5106 return EMULATE_DONE
;
5108 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5110 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5112 int r
= EMULATE_DONE
;
5114 ++vcpu
->stat
.insn_emulation_fail
;
5115 trace_kvm_emulate_insn_failed(vcpu
);
5116 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5117 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5118 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5119 vcpu
->run
->internal
.ndata
= 0;
5122 kvm_queue_exception(vcpu
, UD_VECTOR
);
5127 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5128 bool write_fault_to_shadow_pgtable
,
5134 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5137 if (!vcpu
->arch
.mmu
.direct_map
) {
5139 * Write permission should be allowed since only
5140 * write access need to be emulated.
5142 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5145 * If the mapping is invalid in guest, let cpu retry
5146 * it to generate fault.
5148 if (gpa
== UNMAPPED_GVA
)
5153 * Do not retry the unhandleable instruction if it faults on the
5154 * readonly host memory, otherwise it will goto a infinite loop:
5155 * retry instruction -> write #PF -> emulation fail -> retry
5156 * instruction -> ...
5158 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5161 * If the instruction failed on the error pfn, it can not be fixed,
5162 * report the error to userspace.
5164 if (is_error_noslot_pfn(pfn
))
5167 kvm_release_pfn_clean(pfn
);
5169 /* The instructions are well-emulated on direct mmu. */
5170 if (vcpu
->arch
.mmu
.direct_map
) {
5171 unsigned int indirect_shadow_pages
;
5173 spin_lock(&vcpu
->kvm
->mmu_lock
);
5174 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5175 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5177 if (indirect_shadow_pages
)
5178 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5184 * if emulation was due to access to shadowed page table
5185 * and it failed try to unshadow page and re-enter the
5186 * guest to let CPU execute the instruction.
5188 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5191 * If the access faults on its page table, it can not
5192 * be fixed by unprotecting shadow page and it should
5193 * be reported to userspace.
5195 return !write_fault_to_shadow_pgtable
;
5198 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5199 unsigned long cr2
, int emulation_type
)
5201 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5202 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5204 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5205 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5208 * If the emulation is caused by #PF and it is non-page_table
5209 * writing instruction, it means the VM-EXIT is caused by shadow
5210 * page protected, we can zap the shadow page and retry this
5211 * instruction directly.
5213 * Note: if the guest uses a non-page-table modifying instruction
5214 * on the PDE that points to the instruction, then we will unmap
5215 * the instruction and go to an infinite loop. So, we cache the
5216 * last retried eip and the last fault address, if we meet the eip
5217 * and the address again, we can break out of the potential infinite
5220 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5222 if (!(emulation_type
& EMULTYPE_RETRY
))
5225 if (x86_page_table_writing_insn(ctxt
))
5228 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5231 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5232 vcpu
->arch
.last_retry_addr
= cr2
;
5234 if (!vcpu
->arch
.mmu
.direct_map
)
5235 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5237 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5242 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5243 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5245 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5254 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5255 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5260 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, unsigned long rflags
, int *r
)
5262 struct kvm_run
*kvm_run
= vcpu
->run
;
5265 * rflags is the old, "raw" value of the flags. The new value has
5266 * not been saved yet.
5268 * This is correct even for TF set by the guest, because "the
5269 * processor will not generate this exception after the instruction
5270 * that sets the TF flag".
5272 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5273 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5274 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
|
5276 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5277 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5278 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5279 *r
= EMULATE_USER_EXIT
;
5281 vcpu
->arch
.emulate_ctxt
.eflags
&= ~X86_EFLAGS_TF
;
5283 * "Certain debug exceptions may clear bit 0-3. The
5284 * remaining contents of the DR6 register are never
5285 * cleared by the processor".
5287 vcpu
->arch
.dr6
&= ~15;
5288 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5289 kvm_queue_exception(vcpu
, DB_VECTOR
);
5294 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5296 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5297 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5298 struct kvm_run
*kvm_run
= vcpu
->run
;
5299 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5300 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5301 vcpu
->arch
.guest_debug_dr7
,
5305 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5306 kvm_run
->debug
.arch
.pc
= eip
;
5307 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5308 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5309 *r
= EMULATE_USER_EXIT
;
5314 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5315 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5316 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5317 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5322 vcpu
->arch
.dr6
&= ~15;
5323 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5324 kvm_queue_exception(vcpu
, DB_VECTOR
);
5333 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5340 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5341 bool writeback
= true;
5342 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5345 * Clear write_fault_to_shadow_pgtable here to ensure it is
5348 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5349 kvm_clear_exception_queue(vcpu
);
5351 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5352 init_emulate_ctxt(vcpu
);
5355 * We will reenter on the same instruction since
5356 * we do not set complete_userspace_io. This does not
5357 * handle watchpoints yet, those would be handled in
5360 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5363 ctxt
->interruptibility
= 0;
5364 ctxt
->have_exception
= false;
5365 ctxt
->exception
.vector
= -1;
5366 ctxt
->perm_ok
= false;
5368 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5370 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5372 trace_kvm_emulate_insn_start(vcpu
);
5373 ++vcpu
->stat
.insn_emulation
;
5374 if (r
!= EMULATION_OK
) {
5375 if (emulation_type
& EMULTYPE_TRAP_UD
)
5376 return EMULATE_FAIL
;
5377 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5379 return EMULATE_DONE
;
5380 if (emulation_type
& EMULTYPE_SKIP
)
5381 return EMULATE_FAIL
;
5382 return handle_emulation_failure(vcpu
);
5386 if (emulation_type
& EMULTYPE_SKIP
) {
5387 kvm_rip_write(vcpu
, ctxt
->_eip
);
5388 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5389 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5390 return EMULATE_DONE
;
5393 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5394 return EMULATE_DONE
;
5396 /* this is needed for vmware backdoor interface to work since it
5397 changes registers values during IO operation */
5398 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5399 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5400 emulator_invalidate_register_cache(ctxt
);
5404 r
= x86_emulate_insn(ctxt
);
5406 if (r
== EMULATION_INTERCEPTED
)
5407 return EMULATE_DONE
;
5409 if (r
== EMULATION_FAILED
) {
5410 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5412 return EMULATE_DONE
;
5414 return handle_emulation_failure(vcpu
);
5417 if (ctxt
->have_exception
) {
5419 if (inject_emulated_exception(vcpu
))
5421 } else if (vcpu
->arch
.pio
.count
) {
5422 if (!vcpu
->arch
.pio
.in
) {
5423 /* FIXME: return into emulator if single-stepping. */
5424 vcpu
->arch
.pio
.count
= 0;
5427 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5429 r
= EMULATE_USER_EXIT
;
5430 } else if (vcpu
->mmio_needed
) {
5431 if (!vcpu
->mmio_is_write
)
5433 r
= EMULATE_USER_EXIT
;
5434 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5435 } else if (r
== EMULATION_RESTART
)
5441 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5442 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5443 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5444 kvm_rip_write(vcpu
, ctxt
->eip
);
5445 if (r
== EMULATE_DONE
)
5446 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5447 if (!ctxt
->have_exception
||
5448 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5449 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5452 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5453 * do nothing, and it will be requested again as soon as
5454 * the shadow expires. But we still need to check here,
5455 * because POPF has no interrupt shadow.
5457 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5458 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5460 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5464 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5466 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5468 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5469 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5470 size
, port
, &val
, 1);
5471 /* do not return to emulator after return from userspace */
5472 vcpu
->arch
.pio
.count
= 0;
5475 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5477 static void tsc_bad(void *info
)
5479 __this_cpu_write(cpu_tsc_khz
, 0);
5482 static void tsc_khz_changed(void *data
)
5484 struct cpufreq_freqs
*freq
= data
;
5485 unsigned long khz
= 0;
5489 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5490 khz
= cpufreq_quick_get(raw_smp_processor_id());
5493 __this_cpu_write(cpu_tsc_khz
, khz
);
5496 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5499 struct cpufreq_freqs
*freq
= data
;
5501 struct kvm_vcpu
*vcpu
;
5502 int i
, send_ipi
= 0;
5505 * We allow guests to temporarily run on slowing clocks,
5506 * provided we notify them after, or to run on accelerating
5507 * clocks, provided we notify them before. Thus time never
5510 * However, we have a problem. We can't atomically update
5511 * the frequency of a given CPU from this function; it is
5512 * merely a notifier, which can be called from any CPU.
5513 * Changing the TSC frequency at arbitrary points in time
5514 * requires a recomputation of local variables related to
5515 * the TSC for each VCPU. We must flag these local variables
5516 * to be updated and be sure the update takes place with the
5517 * new frequency before any guests proceed.
5519 * Unfortunately, the combination of hotplug CPU and frequency
5520 * change creates an intractable locking scenario; the order
5521 * of when these callouts happen is undefined with respect to
5522 * CPU hotplug, and they can race with each other. As such,
5523 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5524 * undefined; you can actually have a CPU frequency change take
5525 * place in between the computation of X and the setting of the
5526 * variable. To protect against this problem, all updates of
5527 * the per_cpu tsc_khz variable are done in an interrupt
5528 * protected IPI, and all callers wishing to update the value
5529 * must wait for a synchronous IPI to complete (which is trivial
5530 * if the caller is on the CPU already). This establishes the
5531 * necessary total order on variable updates.
5533 * Note that because a guest time update may take place
5534 * anytime after the setting of the VCPU's request bit, the
5535 * correct TSC value must be set before the request. However,
5536 * to ensure the update actually makes it to any guest which
5537 * starts running in hardware virtualization between the set
5538 * and the acquisition of the spinlock, we must also ping the
5539 * CPU after setting the request bit.
5543 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5545 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5548 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5550 spin_lock(&kvm_lock
);
5551 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5552 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5553 if (vcpu
->cpu
!= freq
->cpu
)
5555 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5556 if (vcpu
->cpu
!= smp_processor_id())
5560 spin_unlock(&kvm_lock
);
5562 if (freq
->old
< freq
->new && send_ipi
) {
5564 * We upscale the frequency. Must make the guest
5565 * doesn't see old kvmclock values while running with
5566 * the new frequency, otherwise we risk the guest sees
5567 * time go backwards.
5569 * In case we update the frequency for another cpu
5570 * (which might be in guest context) send an interrupt
5571 * to kick the cpu out of guest context. Next time
5572 * guest context is entered kvmclock will be updated,
5573 * so the guest will not see stale values.
5575 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5580 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5581 .notifier_call
= kvmclock_cpufreq_notifier
5584 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
5585 unsigned long action
, void *hcpu
)
5587 unsigned int cpu
= (unsigned long)hcpu
;
5591 case CPU_DOWN_FAILED
:
5592 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5594 case CPU_DOWN_PREPARE
:
5595 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
5601 static struct notifier_block kvmclock_cpu_notifier_block
= {
5602 .notifier_call
= kvmclock_cpu_notifier
,
5603 .priority
= -INT_MAX
5606 static void kvm_timer_init(void)
5610 max_tsc_khz
= tsc_khz
;
5612 cpu_notifier_register_begin();
5613 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5614 #ifdef CONFIG_CPU_FREQ
5615 struct cpufreq_policy policy
;
5616 memset(&policy
, 0, sizeof(policy
));
5618 cpufreq_get_policy(&policy
, cpu
);
5619 if (policy
.cpuinfo
.max_freq
)
5620 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5623 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5624 CPUFREQ_TRANSITION_NOTIFIER
);
5626 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5627 for_each_online_cpu(cpu
)
5628 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5630 __register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5631 cpu_notifier_register_done();
5635 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5637 int kvm_is_in_guest(void)
5639 return __this_cpu_read(current_vcpu
) != NULL
;
5642 static int kvm_is_user_mode(void)
5646 if (__this_cpu_read(current_vcpu
))
5647 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5649 return user_mode
!= 0;
5652 static unsigned long kvm_get_guest_ip(void)
5654 unsigned long ip
= 0;
5656 if (__this_cpu_read(current_vcpu
))
5657 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5662 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5663 .is_in_guest
= kvm_is_in_guest
,
5664 .is_user_mode
= kvm_is_user_mode
,
5665 .get_guest_ip
= kvm_get_guest_ip
,
5668 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5670 __this_cpu_write(current_vcpu
, vcpu
);
5672 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5674 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5676 __this_cpu_write(current_vcpu
, NULL
);
5678 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5680 static void kvm_set_mmio_spte_mask(void)
5683 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5686 * Set the reserved bits and the present bit of an paging-structure
5687 * entry to generate page fault with PFER.RSV = 1.
5689 /* Mask the reserved physical address bits. */
5690 mask
= rsvd_bits(maxphyaddr
, 51);
5692 /* Bit 62 is always reserved for 32bit host. */
5693 mask
|= 0x3ull
<< 62;
5695 /* Set the present bit. */
5698 #ifdef CONFIG_X86_64
5700 * If reserved bit is not supported, clear the present bit to disable
5703 if (maxphyaddr
== 52)
5707 kvm_mmu_set_mmio_spte_mask(mask
);
5710 #ifdef CONFIG_X86_64
5711 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5715 struct kvm_vcpu
*vcpu
;
5718 spin_lock(&kvm_lock
);
5719 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5720 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5721 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
5722 atomic_set(&kvm_guest_has_master_clock
, 0);
5723 spin_unlock(&kvm_lock
);
5726 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5729 * Notification about pvclock gtod data update.
5731 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5734 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5735 struct timekeeper
*tk
= priv
;
5737 update_pvclock_gtod(tk
);
5739 /* disable master clock if host does not trust, or does not
5740 * use, TSC clocksource
5742 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5743 atomic_read(&kvm_guest_has_master_clock
) != 0)
5744 queue_work(system_long_wq
, &pvclock_gtod_work
);
5749 static struct notifier_block pvclock_gtod_notifier
= {
5750 .notifier_call
= pvclock_gtod_notify
,
5754 int kvm_arch_init(void *opaque
)
5757 struct kvm_x86_ops
*ops
= opaque
;
5760 printk(KERN_ERR
"kvm: already loaded the other module\n");
5765 if (!ops
->cpu_has_kvm_support()) {
5766 printk(KERN_ERR
"kvm: no hardware support\n");
5770 if (ops
->disabled_by_bios()) {
5771 printk(KERN_ERR
"kvm: disabled by bios\n");
5777 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
5779 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
5783 r
= kvm_mmu_module_init();
5785 goto out_free_percpu
;
5787 kvm_set_mmio_spte_mask();
5790 kvm_init_msr_list();
5792 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
5793 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
5797 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
5800 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
5803 #ifdef CONFIG_X86_64
5804 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
5810 free_percpu(shared_msrs
);
5815 void kvm_arch_exit(void)
5817 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
5819 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5820 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
5821 CPUFREQ_TRANSITION_NOTIFIER
);
5822 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5823 #ifdef CONFIG_X86_64
5824 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
5827 kvm_mmu_module_exit();
5828 free_percpu(shared_msrs
);
5831 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
5833 ++vcpu
->stat
.halt_exits
;
5834 if (irqchip_in_kernel(vcpu
->kvm
)) {
5835 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
5838 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
5842 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
5844 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
5846 u64 param
, ingpa
, outgpa
, ret
;
5847 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
5848 bool fast
, longmode
;
5851 * hypercall generates UD from non zero cpl and real mode
5854 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
5855 kvm_queue_exception(vcpu
, UD_VECTOR
);
5859 longmode
= is_64_bit_mode(vcpu
);
5862 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
5863 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
5864 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
5865 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
5866 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
5867 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
5869 #ifdef CONFIG_X86_64
5871 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5872 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5873 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5877 code
= param
& 0xffff;
5878 fast
= (param
>> 16) & 0x1;
5879 rep_cnt
= (param
>> 32) & 0xfff;
5880 rep_idx
= (param
>> 48) & 0xfff;
5882 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
5885 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
5886 kvm_vcpu_on_spin(vcpu
);
5889 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
5893 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
5895 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5897 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
5898 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
5905 * kvm_pv_kick_cpu_op: Kick a vcpu.
5907 * @apicid - apicid of vcpu to be kicked.
5909 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
5911 struct kvm_lapic_irq lapic_irq
;
5913 lapic_irq
.shorthand
= 0;
5914 lapic_irq
.dest_mode
= 0;
5915 lapic_irq
.dest_id
= apicid
;
5917 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
5918 kvm_irq_delivery_to_apic(kvm
, 0, &lapic_irq
, NULL
);
5921 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5923 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5924 int op_64_bit
, r
= 1;
5926 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5927 return kvm_hv_hypercall(vcpu
);
5929 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5930 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5931 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5932 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5933 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5935 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5937 op_64_bit
= is_64_bit_mode(vcpu
);
5946 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5952 case KVM_HC_VAPIC_POLL_IRQ
:
5955 case KVM_HC_KICK_CPU
:
5956 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
5966 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5967 ++vcpu
->stat
.hypercalls
;
5970 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
5972 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
5974 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5975 char instruction
[3];
5976 unsigned long rip
= kvm_rip_read(vcpu
);
5978 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
5980 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
5984 * Check if userspace requested an interrupt window, and that the
5985 * interrupt window is open.
5987 * No need to exit to userspace if we already have an interrupt queued.
5989 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5991 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
5992 vcpu
->run
->request_interrupt_window
&&
5993 kvm_arch_interrupt_allowed(vcpu
));
5996 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5998 struct kvm_run
*kvm_run
= vcpu
->run
;
6000 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6001 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6002 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6003 if (irqchip_in_kernel(vcpu
->kvm
))
6004 kvm_run
->ready_for_interrupt_injection
= 1;
6006 kvm_run
->ready_for_interrupt_injection
=
6007 kvm_arch_interrupt_allowed(vcpu
) &&
6008 !kvm_cpu_has_interrupt(vcpu
) &&
6009 !kvm_event_needs_reinjection(vcpu
);
6012 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6016 if (!kvm_x86_ops
->update_cr8_intercept
)
6019 if (!vcpu
->arch
.apic
)
6022 if (!vcpu
->arch
.apic
->vapic_addr
)
6023 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6030 tpr
= kvm_lapic_get_cr8(vcpu
);
6032 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6035 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6039 /* try to reinject previous events if any */
6040 if (vcpu
->arch
.exception
.pending
) {
6041 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6042 vcpu
->arch
.exception
.has_error_code
,
6043 vcpu
->arch
.exception
.error_code
);
6045 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6046 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6049 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6050 (vcpu
->arch
.dr7
& DR7_GD
)) {
6051 vcpu
->arch
.dr7
&= ~DR7_GD
;
6052 kvm_update_dr7(vcpu
);
6055 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
6056 vcpu
->arch
.exception
.has_error_code
,
6057 vcpu
->arch
.exception
.error_code
,
6058 vcpu
->arch
.exception
.reinject
);
6062 if (vcpu
->arch
.nmi_injected
) {
6063 kvm_x86_ops
->set_nmi(vcpu
);
6067 if (vcpu
->arch
.interrupt
.pending
) {
6068 kvm_x86_ops
->set_irq(vcpu
);
6072 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6073 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6078 /* try to inject new event if pending */
6079 if (vcpu
->arch
.nmi_pending
) {
6080 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
6081 --vcpu
->arch
.nmi_pending
;
6082 vcpu
->arch
.nmi_injected
= true;
6083 kvm_x86_ops
->set_nmi(vcpu
);
6085 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6087 * Because interrupts can be injected asynchronously, we are
6088 * calling check_nested_events again here to avoid a race condition.
6089 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6090 * proposal and current concerns. Perhaps we should be setting
6091 * KVM_REQ_EVENT only on certain events and not unconditionally?
6093 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6094 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6098 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6099 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6101 kvm_x86_ops
->set_irq(vcpu
);
6107 static void process_nmi(struct kvm_vcpu
*vcpu
)
6112 * x86 is limited to one NMI running, and one NMI pending after it.
6113 * If an NMI is already in progress, limit further NMIs to just one.
6114 * Otherwise, allow two (and we'll inject the first one immediately).
6116 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6119 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6120 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6121 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6124 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6126 u64 eoi_exit_bitmap
[4];
6129 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6132 memset(eoi_exit_bitmap
, 0, 32);
6135 kvm_ioapic_scan_entry(vcpu
, eoi_exit_bitmap
, tmr
);
6136 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6137 kvm_apic_update_tmr(vcpu
, tmr
);
6140 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6142 ++vcpu
->stat
.tlb_flush
;
6143 kvm_x86_ops
->tlb_flush(vcpu
);
6146 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6148 struct page
*page
= NULL
;
6150 if (!irqchip_in_kernel(vcpu
->kvm
))
6153 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6156 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6157 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6160 * Do not pin apic access page in memory, the MMU notifier
6161 * will call us again if it is migrated or swapped out.
6165 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6167 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6168 unsigned long address
)
6171 * The physical address of apic access page is stored in the VMCS.
6172 * Update it when it becomes invalid.
6174 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6175 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6179 * Returns 1 to let __vcpu_run() continue the guest execution loop without
6180 * exiting to the userspace. Otherwise, the value will be returned to the
6183 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6186 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
6187 vcpu
->run
->request_interrupt_window
;
6188 bool req_immediate_exit
= false;
6190 if (vcpu
->requests
) {
6191 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6192 kvm_mmu_unload(vcpu
);
6193 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6194 __kvm_migrate_timers(vcpu
);
6195 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6196 kvm_gen_update_masterclock(vcpu
->kvm
);
6197 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6198 kvm_gen_kvmclock_update(vcpu
);
6199 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6200 r
= kvm_guest_time_update(vcpu
);
6204 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6205 kvm_mmu_sync_roots(vcpu
);
6206 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6207 kvm_vcpu_flush_tlb(vcpu
);
6208 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6209 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6213 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6214 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6218 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
6219 vcpu
->fpu_active
= 0;
6220 kvm_x86_ops
->fpu_deactivate(vcpu
);
6222 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6223 /* Page is swapped out. Do synthetic halt */
6224 vcpu
->arch
.apf
.halted
= true;
6228 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6229 record_steal_time(vcpu
);
6230 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6232 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6233 kvm_handle_pmu_event(vcpu
);
6234 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6235 kvm_deliver_pmi(vcpu
);
6236 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6237 vcpu_scan_ioapic(vcpu
);
6238 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6239 kvm_vcpu_reload_apic_access_page(vcpu
);
6242 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6243 kvm_apic_accept_events(vcpu
);
6244 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6249 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6250 req_immediate_exit
= true;
6251 /* enable NMI/IRQ window open exits if needed */
6252 else if (vcpu
->arch
.nmi_pending
)
6253 kvm_x86_ops
->enable_nmi_window(vcpu
);
6254 else if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6255 kvm_x86_ops
->enable_irq_window(vcpu
);
6257 if (kvm_lapic_enabled(vcpu
)) {
6259 * Update architecture specific hints for APIC
6260 * virtual interrupt delivery.
6262 if (kvm_x86_ops
->hwapic_irr_update
)
6263 kvm_x86_ops
->hwapic_irr_update(vcpu
,
6264 kvm_lapic_find_highest_irr(vcpu
));
6265 update_cr8_intercept(vcpu
);
6266 kvm_lapic_sync_to_vapic(vcpu
);
6270 r
= kvm_mmu_reload(vcpu
);
6272 goto cancel_injection
;
6277 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6278 if (vcpu
->fpu_active
)
6279 kvm_load_guest_fpu(vcpu
);
6280 kvm_load_guest_xcr0(vcpu
);
6282 vcpu
->mode
= IN_GUEST_MODE
;
6284 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6286 /* We should set ->mode before check ->requests,
6287 * see the comment in make_all_cpus_request.
6289 smp_mb__after_srcu_read_unlock();
6291 local_irq_disable();
6293 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
6294 || need_resched() || signal_pending(current
)) {
6295 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6299 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6301 goto cancel_injection
;
6304 if (req_immediate_exit
)
6305 smp_send_reschedule(vcpu
->cpu
);
6309 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6311 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6312 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6313 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6314 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6315 set_debugreg(vcpu
->arch
.dr6
, 6);
6318 trace_kvm_entry(vcpu
->vcpu_id
);
6319 wait_lapic_expire(vcpu
);
6320 kvm_x86_ops
->run(vcpu
);
6323 * Do this here before restoring debug registers on the host. And
6324 * since we do this before handling the vmexit, a DR access vmexit
6325 * can (a) read the correct value of the debug registers, (b) set
6326 * KVM_DEBUGREG_WONT_EXIT again.
6328 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6331 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6332 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6333 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6334 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6338 * If the guest has used debug registers, at least dr7
6339 * will be disabled while returning to the host.
6340 * If we don't have active breakpoints in the host, we don't
6341 * care about the messed up debug address registers. But if
6342 * we have some of them active, restore the old state.
6344 if (hw_breakpoint_active())
6345 hw_breakpoint_restore();
6347 vcpu
->arch
.last_guest_tsc
= kvm_x86_ops
->read_l1_tsc(vcpu
,
6350 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6353 /* Interrupt is enabled by handle_external_intr() */
6354 kvm_x86_ops
->handle_external_intr(vcpu
);
6359 * We must have an instruction between local_irq_enable() and
6360 * kvm_guest_exit(), so the timer interrupt isn't delayed by
6361 * the interrupt shadow. The stat.exits increment will do nicely.
6362 * But we need to prevent reordering, hence this barrier():
6370 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6373 * Profile KVM exit RIPs:
6375 if (unlikely(prof_on
== KVM_PROFILING
)) {
6376 unsigned long rip
= kvm_rip_read(vcpu
);
6377 profile_hit(KVM_PROFILING
, (void *)rip
);
6380 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6381 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6383 if (vcpu
->arch
.apic_attention
)
6384 kvm_lapic_sync_from_vapic(vcpu
);
6386 r
= kvm_x86_ops
->handle_exit(vcpu
);
6390 kvm_x86_ops
->cancel_injection(vcpu
);
6391 if (unlikely(vcpu
->arch
.apic_attention
))
6392 kvm_lapic_sync_from_vapic(vcpu
);
6398 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
6401 struct kvm
*kvm
= vcpu
->kvm
;
6403 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6407 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6408 !vcpu
->arch
.apf
.halted
)
6409 r
= vcpu_enter_guest(vcpu
);
6411 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6412 kvm_vcpu_block(vcpu
);
6413 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6414 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
)) {
6415 kvm_apic_accept_events(vcpu
);
6416 switch(vcpu
->arch
.mp_state
) {
6417 case KVM_MP_STATE_HALTED
:
6418 vcpu
->arch
.pv
.pv_unhalted
= false;
6419 vcpu
->arch
.mp_state
=
6420 KVM_MP_STATE_RUNNABLE
;
6421 case KVM_MP_STATE_RUNNABLE
:
6422 vcpu
->arch
.apf
.halted
= false;
6424 case KVM_MP_STATE_INIT_RECEIVED
:
6436 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
6437 if (kvm_cpu_has_pending_timer(vcpu
))
6438 kvm_inject_pending_timer_irqs(vcpu
);
6440 if (dm_request_for_irq_injection(vcpu
)) {
6442 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6443 ++vcpu
->stat
.request_irq_exits
;
6446 kvm_check_async_pf_completion(vcpu
);
6448 if (signal_pending(current
)) {
6450 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6451 ++vcpu
->stat
.signal_exits
;
6453 if (need_resched()) {
6454 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6456 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6460 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6465 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
6468 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6469 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
6470 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6471 if (r
!= EMULATE_DONE
)
6476 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
6478 BUG_ON(!vcpu
->arch
.pio
.count
);
6480 return complete_emulated_io(vcpu
);
6484 * Implements the following, as a state machine:
6488 * for each mmio piece in the fragment
6496 * for each mmio piece in the fragment
6501 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
6503 struct kvm_run
*run
= vcpu
->run
;
6504 struct kvm_mmio_fragment
*frag
;
6507 BUG_ON(!vcpu
->mmio_needed
);
6509 /* Complete previous fragment */
6510 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
6511 len
= min(8u, frag
->len
);
6512 if (!vcpu
->mmio_is_write
)
6513 memcpy(frag
->data
, run
->mmio
.data
, len
);
6515 if (frag
->len
<= 8) {
6516 /* Switch to the next fragment. */
6518 vcpu
->mmio_cur_fragment
++;
6520 /* Go forward to the next mmio piece. */
6526 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
6527 vcpu
->mmio_needed
= 0;
6529 /* FIXME: return into emulator if single-stepping. */
6530 if (vcpu
->mmio_is_write
)
6532 vcpu
->mmio_read_completed
= 1;
6533 return complete_emulated_io(vcpu
);
6536 run
->exit_reason
= KVM_EXIT_MMIO
;
6537 run
->mmio
.phys_addr
= frag
->gpa
;
6538 if (vcpu
->mmio_is_write
)
6539 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6540 run
->mmio
.len
= min(8u, frag
->len
);
6541 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
6542 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6547 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
6552 if (!tsk_used_math(current
) && init_fpu(current
))
6555 if (vcpu
->sigset_active
)
6556 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
6558 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
6559 kvm_vcpu_block(vcpu
);
6560 kvm_apic_accept_events(vcpu
);
6561 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
6566 /* re-sync apic's tpr */
6567 if (!irqchip_in_kernel(vcpu
->kvm
)) {
6568 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
6574 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
6575 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
6576 vcpu
->arch
.complete_userspace_io
= NULL
;
6581 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
6583 r
= __vcpu_run(vcpu
);
6586 post_kvm_run_save(vcpu
);
6587 if (vcpu
->sigset_active
)
6588 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
6593 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6595 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
6597 * We are here if userspace calls get_regs() in the middle of
6598 * instruction emulation. Registers state needs to be copied
6599 * back from emulation context to vcpu. Userspace shouldn't do
6600 * that usually, but some bad designed PV devices (vmware
6601 * backdoor interface) need this to work
6603 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
6604 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6606 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6607 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6608 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6609 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6610 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6611 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
6612 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
6613 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
6614 #ifdef CONFIG_X86_64
6615 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
6616 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
6617 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
6618 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
6619 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
6620 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
6621 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
6622 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
6625 regs
->rip
= kvm_rip_read(vcpu
);
6626 regs
->rflags
= kvm_get_rflags(vcpu
);
6631 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6633 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
6634 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6636 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
6637 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
6638 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
6639 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
6640 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
6641 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
6642 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
6643 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
6644 #ifdef CONFIG_X86_64
6645 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
6646 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
6647 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
6648 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
6649 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
6650 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
6651 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
6652 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
6655 kvm_rip_write(vcpu
, regs
->rip
);
6656 kvm_set_rflags(vcpu
, regs
->rflags
);
6658 vcpu
->arch
.exception
.pending
= false;
6660 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6665 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
6667 struct kvm_segment cs
;
6669 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6673 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
6675 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
6676 struct kvm_sregs
*sregs
)
6680 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6681 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6682 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6683 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6684 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6685 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6687 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6688 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6690 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6691 sregs
->idt
.limit
= dt
.size
;
6692 sregs
->idt
.base
= dt
.address
;
6693 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6694 sregs
->gdt
.limit
= dt
.size
;
6695 sregs
->gdt
.base
= dt
.address
;
6697 sregs
->cr0
= kvm_read_cr0(vcpu
);
6698 sregs
->cr2
= vcpu
->arch
.cr2
;
6699 sregs
->cr3
= kvm_read_cr3(vcpu
);
6700 sregs
->cr4
= kvm_read_cr4(vcpu
);
6701 sregs
->cr8
= kvm_get_cr8(vcpu
);
6702 sregs
->efer
= vcpu
->arch
.efer
;
6703 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
6705 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
6707 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
6708 set_bit(vcpu
->arch
.interrupt
.nr
,
6709 (unsigned long *)sregs
->interrupt_bitmap
);
6714 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
6715 struct kvm_mp_state
*mp_state
)
6717 kvm_apic_accept_events(vcpu
);
6718 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
6719 vcpu
->arch
.pv
.pv_unhalted
)
6720 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
6722 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
6727 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
6728 struct kvm_mp_state
*mp_state
)
6730 if (!kvm_vcpu_has_lapic(vcpu
) &&
6731 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
6734 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
6735 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
6736 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
6738 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
6739 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6743 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
6744 int reason
, bool has_error_code
, u32 error_code
)
6746 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
6749 init_emulate_ctxt(vcpu
);
6751 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
6752 has_error_code
, error_code
);
6755 return EMULATE_FAIL
;
6757 kvm_rip_write(vcpu
, ctxt
->eip
);
6758 kvm_set_rflags(vcpu
, ctxt
->eflags
);
6759 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6760 return EMULATE_DONE
;
6762 EXPORT_SYMBOL_GPL(kvm_task_switch
);
6764 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
6765 struct kvm_sregs
*sregs
)
6767 struct msr_data apic_base_msr
;
6768 int mmu_reset_needed
= 0;
6769 int pending_vec
, max_bits
, idx
;
6772 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
6775 dt
.size
= sregs
->idt
.limit
;
6776 dt
.address
= sregs
->idt
.base
;
6777 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6778 dt
.size
= sregs
->gdt
.limit
;
6779 dt
.address
= sregs
->gdt
.base
;
6780 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
6782 vcpu
->arch
.cr2
= sregs
->cr2
;
6783 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
6784 vcpu
->arch
.cr3
= sregs
->cr3
;
6785 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
6787 kvm_set_cr8(vcpu
, sregs
->cr8
);
6789 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
6790 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
6791 apic_base_msr
.data
= sregs
->apic_base
;
6792 apic_base_msr
.host_initiated
= true;
6793 kvm_set_apic_base(vcpu
, &apic_base_msr
);
6795 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
6796 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
6797 vcpu
->arch
.cr0
= sregs
->cr0
;
6799 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
6800 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
6801 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
6802 kvm_update_cpuid(vcpu
);
6804 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6805 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
6806 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
6807 mmu_reset_needed
= 1;
6809 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6811 if (mmu_reset_needed
)
6812 kvm_mmu_reset_context(vcpu
);
6814 max_bits
= KVM_NR_INTERRUPTS
;
6815 pending_vec
= find_first_bit(
6816 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
6817 if (pending_vec
< max_bits
) {
6818 kvm_queue_interrupt(vcpu
, pending_vec
, false);
6819 pr_debug("Set back pending irq %d\n", pending_vec
);
6822 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6823 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6824 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6825 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6826 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6827 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6829 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6830 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6832 update_cr8_intercept(vcpu
);
6834 /* Older userspace won't unhalt the vcpu on reset. */
6835 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
6836 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
6838 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6840 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6845 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
6846 struct kvm_guest_debug
*dbg
)
6848 unsigned long rflags
;
6851 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
6853 if (vcpu
->arch
.exception
.pending
)
6855 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
6856 kvm_queue_exception(vcpu
, DB_VECTOR
);
6858 kvm_queue_exception(vcpu
, BP_VECTOR
);
6862 * Read rflags as long as potentially injected trace flags are still
6865 rflags
= kvm_get_rflags(vcpu
);
6867 vcpu
->guest_debug
= dbg
->control
;
6868 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
6869 vcpu
->guest_debug
= 0;
6871 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
6872 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
6873 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
6874 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
6876 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6877 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6879 kvm_update_dr7(vcpu
);
6881 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6882 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
6883 get_segment_base(vcpu
, VCPU_SREG_CS
);
6886 * Trigger an rflags update that will inject or remove the trace
6889 kvm_set_rflags(vcpu
, rflags
);
6891 kvm_x86_ops
->update_db_bp_intercept(vcpu
);
6901 * Translate a guest virtual address to a guest physical address.
6903 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
6904 struct kvm_translation
*tr
)
6906 unsigned long vaddr
= tr
->linear_address
;
6910 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6911 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
6912 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6913 tr
->physical_address
= gpa
;
6914 tr
->valid
= gpa
!= UNMAPPED_GVA
;
6921 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6923 struct i387_fxsave_struct
*fxsave
=
6924 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6926 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
6927 fpu
->fcw
= fxsave
->cwd
;
6928 fpu
->fsw
= fxsave
->swd
;
6929 fpu
->ftwx
= fxsave
->twd
;
6930 fpu
->last_opcode
= fxsave
->fop
;
6931 fpu
->last_ip
= fxsave
->rip
;
6932 fpu
->last_dp
= fxsave
->rdp
;
6933 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
6938 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6940 struct i387_fxsave_struct
*fxsave
=
6941 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6943 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
6944 fxsave
->cwd
= fpu
->fcw
;
6945 fxsave
->swd
= fpu
->fsw
;
6946 fxsave
->twd
= fpu
->ftwx
;
6947 fxsave
->fop
= fpu
->last_opcode
;
6948 fxsave
->rip
= fpu
->last_ip
;
6949 fxsave
->rdp
= fpu
->last_dp
;
6950 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
6955 int fx_init(struct kvm_vcpu
*vcpu
)
6959 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
6963 fpu_finit(&vcpu
->arch
.guest_fpu
);
6965 vcpu
->arch
.guest_fpu
.state
->xsave
.xsave_hdr
.xcomp_bv
=
6966 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
6969 * Ensure guest xcr0 is valid for loading
6971 vcpu
->arch
.xcr0
= XSTATE_FP
;
6973 vcpu
->arch
.cr0
|= X86_CR0_ET
;
6977 EXPORT_SYMBOL_GPL(fx_init
);
6979 static void fx_free(struct kvm_vcpu
*vcpu
)
6981 fpu_free(&vcpu
->arch
.guest_fpu
);
6984 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
6986 if (vcpu
->guest_fpu_loaded
)
6990 * Restore all possible states in the guest,
6991 * and assume host would use all available bits.
6992 * Guest xcr0 would be loaded later.
6994 kvm_put_guest_xcr0(vcpu
);
6995 vcpu
->guest_fpu_loaded
= 1;
6996 __kernel_fpu_begin();
6997 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
7001 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7003 kvm_put_guest_xcr0(vcpu
);
7005 if (!vcpu
->guest_fpu_loaded
)
7008 vcpu
->guest_fpu_loaded
= 0;
7009 fpu_save_init(&vcpu
->arch
.guest_fpu
);
7011 ++vcpu
->stat
.fpu_reload
;
7012 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
7016 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7018 kvmclock_reset(vcpu
);
7020 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
7022 kvm_x86_ops
->vcpu_free(vcpu
);
7025 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7028 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7029 printk_once(KERN_WARNING
7030 "kvm: SMP vm created on host with unstable TSC; "
7031 "guest TSC will not be reliable\n");
7032 return kvm_x86_ops
->vcpu_create(kvm
, id
);
7035 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7039 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
7040 r
= vcpu_load(vcpu
);
7043 kvm_vcpu_reset(vcpu
);
7044 kvm_mmu_setup(vcpu
);
7050 int kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7053 struct msr_data msr
;
7054 struct kvm
*kvm
= vcpu
->kvm
;
7056 r
= vcpu_load(vcpu
);
7060 msr
.index
= MSR_IA32_TSC
;
7061 msr
.host_initiated
= true;
7062 kvm_write_tsc(vcpu
, &msr
);
7065 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7066 KVMCLOCK_SYNC_PERIOD
);
7071 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7074 vcpu
->arch
.apf
.msr_val
= 0;
7076 r
= vcpu_load(vcpu
);
7078 kvm_mmu_unload(vcpu
);
7082 kvm_x86_ops
->vcpu_free(vcpu
);
7085 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
)
7087 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7088 vcpu
->arch
.nmi_pending
= 0;
7089 vcpu
->arch
.nmi_injected
= false;
7090 kvm_clear_interrupt_queue(vcpu
);
7091 kvm_clear_exception_queue(vcpu
);
7093 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7094 vcpu
->arch
.dr6
= DR6_INIT
;
7095 kvm_update_dr6(vcpu
);
7096 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7097 kvm_update_dr7(vcpu
);
7099 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7100 vcpu
->arch
.apf
.msr_val
= 0;
7101 vcpu
->arch
.st
.msr_val
= 0;
7103 kvmclock_reset(vcpu
);
7105 kvm_clear_async_pf_completion_queue(vcpu
);
7106 kvm_async_pf_hash_reset(vcpu
);
7107 vcpu
->arch
.apf
.halted
= false;
7109 kvm_pmu_reset(vcpu
);
7111 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7112 vcpu
->arch
.regs_avail
= ~0;
7113 vcpu
->arch
.regs_dirty
= ~0;
7115 kvm_x86_ops
->vcpu_reset(vcpu
);
7118 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7120 struct kvm_segment cs
;
7122 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7123 cs
.selector
= vector
<< 8;
7124 cs
.base
= vector
<< 12;
7125 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7126 kvm_rip_write(vcpu
, 0);
7129 int kvm_arch_hardware_enable(void)
7132 struct kvm_vcpu
*vcpu
;
7137 bool stable
, backwards_tsc
= false;
7139 kvm_shared_msr_cpu_online();
7140 ret
= kvm_x86_ops
->hardware_enable();
7144 local_tsc
= native_read_tsc();
7145 stable
= !check_tsc_unstable();
7146 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7147 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7148 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7149 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7150 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7151 backwards_tsc
= true;
7152 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7153 max_tsc
= vcpu
->arch
.last_host_tsc
;
7159 * Sometimes, even reliable TSCs go backwards. This happens on
7160 * platforms that reset TSC during suspend or hibernate actions, but
7161 * maintain synchronization. We must compensate. Fortunately, we can
7162 * detect that condition here, which happens early in CPU bringup,
7163 * before any KVM threads can be running. Unfortunately, we can't
7164 * bring the TSCs fully up to date with real time, as we aren't yet far
7165 * enough into CPU bringup that we know how much real time has actually
7166 * elapsed; our helper function, get_kernel_ns() will be using boot
7167 * variables that haven't been updated yet.
7169 * So we simply find the maximum observed TSC above, then record the
7170 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7171 * the adjustment will be applied. Note that we accumulate
7172 * adjustments, in case multiple suspend cycles happen before some VCPU
7173 * gets a chance to run again. In the event that no KVM threads get a
7174 * chance to run, we will miss the entire elapsed period, as we'll have
7175 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7176 * loose cycle time. This isn't too big a deal, since the loss will be
7177 * uniform across all VCPUs (not to mention the scenario is extremely
7178 * unlikely). It is possible that a second hibernate recovery happens
7179 * much faster than a first, causing the observed TSC here to be
7180 * smaller; this would require additional padding adjustment, which is
7181 * why we set last_host_tsc to the local tsc observed here.
7183 * N.B. - this code below runs only on platforms with reliable TSC,
7184 * as that is the only way backwards_tsc is set above. Also note
7185 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7186 * have the same delta_cyc adjustment applied if backwards_tsc
7187 * is detected. Note further, this adjustment is only done once,
7188 * as we reset last_host_tsc on all VCPUs to stop this from being
7189 * called multiple times (one for each physical CPU bringup).
7191 * Platforms with unreliable TSCs don't have to deal with this, they
7192 * will be compensated by the logic in vcpu_load, which sets the TSC to
7193 * catchup mode. This will catchup all VCPUs to real time, but cannot
7194 * guarantee that they stay in perfect synchronization.
7196 if (backwards_tsc
) {
7197 u64 delta_cyc
= max_tsc
- local_tsc
;
7198 backwards_tsc_observed
= true;
7199 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7200 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7201 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7202 vcpu
->arch
.last_host_tsc
= local_tsc
;
7203 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7207 * We have to disable TSC offset matching.. if you were
7208 * booting a VM while issuing an S4 host suspend....
7209 * you may have some problem. Solving this issue is
7210 * left as an exercise to the reader.
7212 kvm
->arch
.last_tsc_nsec
= 0;
7213 kvm
->arch
.last_tsc_write
= 0;
7220 void kvm_arch_hardware_disable(void)
7222 kvm_x86_ops
->hardware_disable();
7223 drop_user_return_notifiers();
7226 int kvm_arch_hardware_setup(void)
7228 return kvm_x86_ops
->hardware_setup();
7231 void kvm_arch_hardware_unsetup(void)
7233 kvm_x86_ops
->hardware_unsetup();
7236 void kvm_arch_check_processor_compat(void *rtn
)
7238 kvm_x86_ops
->check_processor_compatibility(rtn
);
7241 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
7243 return irqchip_in_kernel(vcpu
->kvm
) == (vcpu
->arch
.apic
!= NULL
);
7246 struct static_key kvm_no_apic_vcpu __read_mostly
;
7248 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7254 BUG_ON(vcpu
->kvm
== NULL
);
7257 vcpu
->arch
.pv
.pv_unhalted
= false;
7258 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7259 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
7260 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7262 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7264 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7269 vcpu
->arch
.pio_data
= page_address(page
);
7271 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7273 r
= kvm_mmu_create(vcpu
);
7275 goto fail_free_pio_data
;
7277 if (irqchip_in_kernel(kvm
)) {
7278 r
= kvm_create_lapic(vcpu
);
7280 goto fail_mmu_destroy
;
7282 static_key_slow_inc(&kvm_no_apic_vcpu
);
7284 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7286 if (!vcpu
->arch
.mce_banks
) {
7288 goto fail_free_lapic
;
7290 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7292 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7294 goto fail_free_mce_banks
;
7299 goto fail_free_wbinvd_dirty_mask
;
7301 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7302 vcpu
->arch
.pv_time_enabled
= false;
7304 vcpu
->arch
.guest_supported_xcr0
= 0;
7305 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7307 kvm_async_pf_hash_reset(vcpu
);
7311 fail_free_wbinvd_dirty_mask
:
7312 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
7313 fail_free_mce_banks
:
7314 kfree(vcpu
->arch
.mce_banks
);
7316 kvm_free_lapic(vcpu
);
7318 kvm_mmu_destroy(vcpu
);
7320 free_page((unsigned long)vcpu
->arch
.pio_data
);
7325 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
7329 kvm_pmu_destroy(vcpu
);
7330 kfree(vcpu
->arch
.mce_banks
);
7331 kvm_free_lapic(vcpu
);
7332 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7333 kvm_mmu_destroy(vcpu
);
7334 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7335 free_page((unsigned long)vcpu
->arch
.pio_data
);
7336 if (!irqchip_in_kernel(vcpu
->kvm
))
7337 static_key_slow_dec(&kvm_no_apic_vcpu
);
7340 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
7342 kvm_x86_ops
->sched_in(vcpu
, cpu
);
7345 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
7350 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
7351 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7352 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7353 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
7354 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
7356 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7357 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
7358 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7359 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
7360 &kvm
->arch
.irq_sources_bitmap
);
7362 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
7363 mutex_init(&kvm
->arch
.apic_map_lock
);
7364 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
7366 pvclock_update_vm_gtod_copy(kvm
);
7368 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
7369 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
7374 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
7377 r
= vcpu_load(vcpu
);
7379 kvm_mmu_unload(vcpu
);
7383 static void kvm_free_vcpus(struct kvm
*kvm
)
7386 struct kvm_vcpu
*vcpu
;
7389 * Unpin any mmu pages first.
7391 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7392 kvm_clear_async_pf_completion_queue(vcpu
);
7393 kvm_unload_vcpu_mmu(vcpu
);
7395 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7396 kvm_arch_vcpu_free(vcpu
);
7398 mutex_lock(&kvm
->lock
);
7399 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
7400 kvm
->vcpus
[i
] = NULL
;
7402 atomic_set(&kvm
->online_vcpus
, 0);
7403 mutex_unlock(&kvm
->lock
);
7406 void kvm_arch_sync_events(struct kvm
*kvm
)
7408 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
7409 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
7410 kvm_free_all_assigned_devices(kvm
);
7414 void kvm_arch_destroy_vm(struct kvm
*kvm
)
7416 if (current
->mm
== kvm
->mm
) {
7418 * Free memory regions allocated on behalf of userspace,
7419 * unless the the memory map has changed due to process exit
7422 struct kvm_userspace_memory_region mem
;
7423 memset(&mem
, 0, sizeof(mem
));
7424 mem
.slot
= APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
;
7425 kvm_set_memory_region(kvm
, &mem
);
7427 mem
.slot
= IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
;
7428 kvm_set_memory_region(kvm
, &mem
);
7430 mem
.slot
= TSS_PRIVATE_MEMSLOT
;
7431 kvm_set_memory_region(kvm
, &mem
);
7433 kvm_iommu_unmap_guest(kvm
);
7434 kfree(kvm
->arch
.vpic
);
7435 kfree(kvm
->arch
.vioapic
);
7436 kvm_free_vcpus(kvm
);
7437 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
7440 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
7441 struct kvm_memory_slot
*dont
)
7445 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7446 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
7447 kvm_kvfree(free
->arch
.rmap
[i
]);
7448 free
->arch
.rmap
[i
] = NULL
;
7453 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
7454 dont
->arch
.lpage_info
[i
- 1]) {
7455 kvm_kvfree(free
->arch
.lpage_info
[i
- 1]);
7456 free
->arch
.lpage_info
[i
- 1] = NULL
;
7461 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
7462 unsigned long npages
)
7466 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7471 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
7472 slot
->base_gfn
, level
) + 1;
7474 slot
->arch
.rmap
[i
] =
7475 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
7476 if (!slot
->arch
.rmap
[i
])
7481 slot
->arch
.lpage_info
[i
- 1] = kvm_kvzalloc(lpages
*
7482 sizeof(*slot
->arch
.lpage_info
[i
- 1]));
7483 if (!slot
->arch
.lpage_info
[i
- 1])
7486 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
7487 slot
->arch
.lpage_info
[i
- 1][0].write_count
= 1;
7488 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
7489 slot
->arch
.lpage_info
[i
- 1][lpages
- 1].write_count
= 1;
7490 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
7492 * If the gfn and userspace address are not aligned wrt each
7493 * other, or if explicitly asked to, disable large page
7494 * support for this slot
7496 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
7497 !kvm_largepages_enabled()) {
7500 for (j
= 0; j
< lpages
; ++j
)
7501 slot
->arch
.lpage_info
[i
- 1][j
].write_count
= 1;
7508 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7509 kvm_kvfree(slot
->arch
.rmap
[i
]);
7510 slot
->arch
.rmap
[i
] = NULL
;
7514 kvm_kvfree(slot
->arch
.lpage_info
[i
- 1]);
7515 slot
->arch
.lpage_info
[i
- 1] = NULL
;
7520 void kvm_arch_memslots_updated(struct kvm
*kvm
)
7523 * memslots->generation has been incremented.
7524 * mmio generation may have reached its maximum value.
7526 kvm_mmu_invalidate_mmio_sptes(kvm
);
7529 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
7530 struct kvm_memory_slot
*memslot
,
7531 struct kvm_userspace_memory_region
*mem
,
7532 enum kvm_mr_change change
)
7535 * Only private memory slots need to be mapped here since
7536 * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7538 if ((memslot
->id
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_CREATE
)) {
7539 unsigned long userspace_addr
;
7542 * MAP_SHARED to prevent internal slot pages from being moved
7545 userspace_addr
= vm_mmap(NULL
, 0, memslot
->npages
* PAGE_SIZE
,
7546 PROT_READ
| PROT_WRITE
,
7547 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7549 if (IS_ERR((void *)userspace_addr
))
7550 return PTR_ERR((void *)userspace_addr
);
7552 memslot
->userspace_addr
= userspace_addr
;
7558 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
7559 struct kvm_userspace_memory_region
*mem
,
7560 const struct kvm_memory_slot
*old
,
7561 enum kvm_mr_change change
)
7564 int nr_mmu_pages
= 0;
7566 if ((mem
->slot
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_DELETE
)) {
7569 ret
= vm_munmap(old
->userspace_addr
,
7570 old
->npages
* PAGE_SIZE
);
7573 "kvm_vm_ioctl_set_memory_region: "
7574 "failed to munmap memory\n");
7577 if (!kvm
->arch
.n_requested_mmu_pages
)
7578 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
7581 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
7583 * Write protect all pages for dirty logging.
7585 * All the sptes including the large sptes which point to this
7586 * slot are set to readonly. We can not create any new large
7587 * spte on this slot until the end of the logging.
7589 * See the comments in fast_page_fault().
7591 if ((change
!= KVM_MR_DELETE
) && (mem
->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
7592 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
7595 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
7597 kvm_mmu_invalidate_zap_all_pages(kvm
);
7600 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
7601 struct kvm_memory_slot
*slot
)
7603 kvm_mmu_invalidate_zap_all_pages(kvm
);
7606 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
7608 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7609 kvm_x86_ops
->check_nested_events(vcpu
, false);
7611 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7612 !vcpu
->arch
.apf
.halted
)
7613 || !list_empty_careful(&vcpu
->async_pf
.done
)
7614 || kvm_apic_has_events(vcpu
)
7615 || vcpu
->arch
.pv
.pv_unhalted
7616 || atomic_read(&vcpu
->arch
.nmi_queued
) ||
7617 (kvm_arch_interrupt_allowed(vcpu
) &&
7618 kvm_cpu_has_interrupt(vcpu
));
7621 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
7623 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
7626 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
7628 return kvm_x86_ops
->interrupt_allowed(vcpu
);
7631 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
7633 if (is_64_bit_mode(vcpu
))
7634 return kvm_rip_read(vcpu
);
7635 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
7636 kvm_rip_read(vcpu
));
7638 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
7640 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
7642 return kvm_get_linear_rip(vcpu
) == linear_rip
;
7644 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
7646 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
7648 unsigned long rflags
;
7650 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
7651 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7652 rflags
&= ~X86_EFLAGS_TF
;
7655 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
7657 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7659 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
7660 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
7661 rflags
|= X86_EFLAGS_TF
;
7662 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
7665 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7667 __kvm_set_rflags(vcpu
, rflags
);
7668 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7670 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
7672 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
7676 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
7680 r
= kvm_mmu_reload(vcpu
);
7684 if (!vcpu
->arch
.mmu
.direct_map
&&
7685 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
7688 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
7691 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
7693 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
7696 static inline u32
kvm_async_pf_next_probe(u32 key
)
7698 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
7701 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7703 u32 key
= kvm_async_pf_hash_fn(gfn
);
7705 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
7706 key
= kvm_async_pf_next_probe(key
);
7708 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
7711 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7714 u32 key
= kvm_async_pf_hash_fn(gfn
);
7716 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
7717 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
7718 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
7719 key
= kvm_async_pf_next_probe(key
);
7724 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7726 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
7729 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7733 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
7735 vcpu
->arch
.apf
.gfns
[i
] = ~0;
7737 j
= kvm_async_pf_next_probe(j
);
7738 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
7740 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
7742 * k lies cyclically in ]i,j]
7744 * |....j i.k.| or |.k..j i...|
7746 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
7747 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
7752 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
7755 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
7759 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
7760 struct kvm_async_pf
*work
)
7762 struct x86_exception fault
;
7764 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
7765 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7767 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
7768 (vcpu
->arch
.apf
.send_user_only
&&
7769 kvm_x86_ops
->get_cpl(vcpu
) == 0))
7770 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
7771 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
7772 fault
.vector
= PF_VECTOR
;
7773 fault
.error_code_valid
= true;
7774 fault
.error_code
= 0;
7775 fault
.nested_page_fault
= false;
7776 fault
.address
= work
->arch
.token
;
7777 kvm_inject_page_fault(vcpu
, &fault
);
7781 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
7782 struct kvm_async_pf
*work
)
7784 struct x86_exception fault
;
7786 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
7787 if (work
->wakeup_all
)
7788 work
->arch
.token
= ~0; /* broadcast wakeup */
7790 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7792 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
7793 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
7794 fault
.vector
= PF_VECTOR
;
7795 fault
.error_code_valid
= true;
7796 fault
.error_code
= 0;
7797 fault
.nested_page_fault
= false;
7798 fault
.address
= work
->arch
.token
;
7799 kvm_inject_page_fault(vcpu
, &fault
);
7801 vcpu
->arch
.apf
.halted
= false;
7802 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7805 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
7807 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
7810 return !kvm_event_needs_reinjection(vcpu
) &&
7811 kvm_x86_ops
->interrupt_allowed(vcpu
);
7814 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
7816 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
7818 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
7820 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
7822 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
7824 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
7826 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
7828 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
7830 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
7832 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
7833 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
7834 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
7835 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
7836 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
7837 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
7838 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
7839 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
7840 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
7841 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
7842 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
7843 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
7844 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
7845 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);