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KVM: Fix mov cr3 #GP at wrong instruction
[deliverable/linux.git] / arch / x86 / kvm / x86.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affilates.
10 *
11 * Authors:
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
16 *
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
19 *
20 */
21
22 #include <linux/kvm_host.h>
23 #include "irq.h"
24 #include "mmu.h"
25 #include "i8254.h"
26 #include "tss.h"
27 #include "kvm_cache_regs.h"
28 #include "x86.h"
29
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
33 #include <linux/fs.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <trace/events/kvm.h>
47
48 #define CREATE_TRACE_POINTS
49 #include "trace.h"
50
51 #include <asm/debugreg.h>
52 #include <asm/msr.h>
53 #include <asm/desc.h>
54 #include <asm/mtrr.h>
55 #include <asm/mce.h>
56 #include <asm/i387.h>
57 #include <asm/xcr.h>
58
59 #define MAX_IO_MSRS 256
60 #define CR0_RESERVED_BITS \
61 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
62 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
63 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
64 #define CR4_RESERVED_BITS \
65 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
66 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
67 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
68 | X86_CR4_OSXSAVE \
69 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
70
71 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
72
73 #define KVM_MAX_MCE_BANKS 32
74 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
75
76 /* EFER defaults:
77 * - enable syscall per default because its emulated by KVM
78 * - enable LME and LMA per default on 64 bit KVM
79 */
80 #ifdef CONFIG_X86_64
81 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
82 #else
83 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
84 #endif
85
86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
88
89 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
90 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
91 struct kvm_cpuid_entry2 __user *entries);
92
93 struct kvm_x86_ops *kvm_x86_ops;
94 EXPORT_SYMBOL_GPL(kvm_x86_ops);
95
96 int ignore_msrs = 0;
97 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
98
99 #define KVM_NR_SHARED_MSRS 16
100
101 struct kvm_shared_msrs_global {
102 int nr;
103 u32 msrs[KVM_NR_SHARED_MSRS];
104 };
105
106 struct kvm_shared_msrs {
107 struct user_return_notifier urn;
108 bool registered;
109 struct kvm_shared_msr_values {
110 u64 host;
111 u64 curr;
112 } values[KVM_NR_SHARED_MSRS];
113 };
114
115 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
116 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
117
118 struct kvm_stats_debugfs_item debugfs_entries[] = {
119 { "pf_fixed", VCPU_STAT(pf_fixed) },
120 { "pf_guest", VCPU_STAT(pf_guest) },
121 { "tlb_flush", VCPU_STAT(tlb_flush) },
122 { "invlpg", VCPU_STAT(invlpg) },
123 { "exits", VCPU_STAT(exits) },
124 { "io_exits", VCPU_STAT(io_exits) },
125 { "mmio_exits", VCPU_STAT(mmio_exits) },
126 { "signal_exits", VCPU_STAT(signal_exits) },
127 { "irq_window", VCPU_STAT(irq_window_exits) },
128 { "nmi_window", VCPU_STAT(nmi_window_exits) },
129 { "halt_exits", VCPU_STAT(halt_exits) },
130 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
131 { "hypercalls", VCPU_STAT(hypercalls) },
132 { "request_irq", VCPU_STAT(request_irq_exits) },
133 { "irq_exits", VCPU_STAT(irq_exits) },
134 { "host_state_reload", VCPU_STAT(host_state_reload) },
135 { "efer_reload", VCPU_STAT(efer_reload) },
136 { "fpu_reload", VCPU_STAT(fpu_reload) },
137 { "insn_emulation", VCPU_STAT(insn_emulation) },
138 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
139 { "irq_injections", VCPU_STAT(irq_injections) },
140 { "nmi_injections", VCPU_STAT(nmi_injections) },
141 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
142 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
143 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
144 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
145 { "mmu_flooded", VM_STAT(mmu_flooded) },
146 { "mmu_recycled", VM_STAT(mmu_recycled) },
147 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
148 { "mmu_unsync", VM_STAT(mmu_unsync) },
149 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
150 { "largepages", VM_STAT(lpages) },
151 { NULL }
152 };
153
154 u64 __read_mostly host_xcr0;
155
156 static inline u32 bit(int bitno)
157 {
158 return 1 << (bitno & 31);
159 }
160
161 static void kvm_on_user_return(struct user_return_notifier *urn)
162 {
163 unsigned slot;
164 struct kvm_shared_msrs *locals
165 = container_of(urn, struct kvm_shared_msrs, urn);
166 struct kvm_shared_msr_values *values;
167
168 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
169 values = &locals->values[slot];
170 if (values->host != values->curr) {
171 wrmsrl(shared_msrs_global.msrs[slot], values->host);
172 values->curr = values->host;
173 }
174 }
175 locals->registered = false;
176 user_return_notifier_unregister(urn);
177 }
178
179 static void shared_msr_update(unsigned slot, u32 msr)
180 {
181 struct kvm_shared_msrs *smsr;
182 u64 value;
183
184 smsr = &__get_cpu_var(shared_msrs);
185 /* only read, and nobody should modify it at this time,
186 * so don't need lock */
187 if (slot >= shared_msrs_global.nr) {
188 printk(KERN_ERR "kvm: invalid MSR slot!");
189 return;
190 }
191 rdmsrl_safe(msr, &value);
192 smsr->values[slot].host = value;
193 smsr->values[slot].curr = value;
194 }
195
196 void kvm_define_shared_msr(unsigned slot, u32 msr)
197 {
198 if (slot >= shared_msrs_global.nr)
199 shared_msrs_global.nr = slot + 1;
200 shared_msrs_global.msrs[slot] = msr;
201 /* we need ensured the shared_msr_global have been updated */
202 smp_wmb();
203 }
204 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
205
206 static void kvm_shared_msr_cpu_online(void)
207 {
208 unsigned i;
209
210 for (i = 0; i < shared_msrs_global.nr; ++i)
211 shared_msr_update(i, shared_msrs_global.msrs[i]);
212 }
213
214 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
215 {
216 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
217
218 if (((value ^ smsr->values[slot].curr) & mask) == 0)
219 return;
220 smsr->values[slot].curr = value;
221 wrmsrl(shared_msrs_global.msrs[slot], value);
222 if (!smsr->registered) {
223 smsr->urn.on_user_return = kvm_on_user_return;
224 user_return_notifier_register(&smsr->urn);
225 smsr->registered = true;
226 }
227 }
228 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
229
230 static void drop_user_return_notifiers(void *ignore)
231 {
232 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
233
234 if (smsr->registered)
235 kvm_on_user_return(&smsr->urn);
236 }
237
238 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
239 {
240 if (irqchip_in_kernel(vcpu->kvm))
241 return vcpu->arch.apic_base;
242 else
243 return vcpu->arch.apic_base;
244 }
245 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
246
247 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
248 {
249 /* TODO: reserve bits check */
250 if (irqchip_in_kernel(vcpu->kvm))
251 kvm_lapic_set_base(vcpu, data);
252 else
253 vcpu->arch.apic_base = data;
254 }
255 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
256
257 #define EXCPT_BENIGN 0
258 #define EXCPT_CONTRIBUTORY 1
259 #define EXCPT_PF 2
260
261 static int exception_class(int vector)
262 {
263 switch (vector) {
264 case PF_VECTOR:
265 return EXCPT_PF;
266 case DE_VECTOR:
267 case TS_VECTOR:
268 case NP_VECTOR:
269 case SS_VECTOR:
270 case GP_VECTOR:
271 return EXCPT_CONTRIBUTORY;
272 default:
273 break;
274 }
275 return EXCPT_BENIGN;
276 }
277
278 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
279 unsigned nr, bool has_error, u32 error_code,
280 bool reinject)
281 {
282 u32 prev_nr;
283 int class1, class2;
284
285 if (!vcpu->arch.exception.pending) {
286 queue:
287 vcpu->arch.exception.pending = true;
288 vcpu->arch.exception.has_error_code = has_error;
289 vcpu->arch.exception.nr = nr;
290 vcpu->arch.exception.error_code = error_code;
291 vcpu->arch.exception.reinject = reinject;
292 return;
293 }
294
295 /* to check exception */
296 prev_nr = vcpu->arch.exception.nr;
297 if (prev_nr == DF_VECTOR) {
298 /* triple fault -> shutdown */
299 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
300 return;
301 }
302 class1 = exception_class(prev_nr);
303 class2 = exception_class(nr);
304 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
305 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
306 /* generate double fault per SDM Table 5-5 */
307 vcpu->arch.exception.pending = true;
308 vcpu->arch.exception.has_error_code = true;
309 vcpu->arch.exception.nr = DF_VECTOR;
310 vcpu->arch.exception.error_code = 0;
311 } else
312 /* replace previous exception with a new one in a hope
313 that instruction re-execution will regenerate lost
314 exception */
315 goto queue;
316 }
317
318 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
319 {
320 kvm_multiple_exception(vcpu, nr, false, 0, false);
321 }
322 EXPORT_SYMBOL_GPL(kvm_queue_exception);
323
324 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
325 {
326 kvm_multiple_exception(vcpu, nr, false, 0, true);
327 }
328 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
329
330 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
331 u32 error_code)
332 {
333 ++vcpu->stat.pf_guest;
334 vcpu->arch.cr2 = addr;
335 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
336 }
337
338 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
339 {
340 vcpu->arch.nmi_pending = 1;
341 }
342 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
343
344 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
345 {
346 kvm_multiple_exception(vcpu, nr, true, error_code, false);
347 }
348 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
349
350 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
351 {
352 kvm_multiple_exception(vcpu, nr, true, error_code, true);
353 }
354 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
355
356 /*
357 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
358 * a #GP and return false.
359 */
360 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
361 {
362 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
363 return true;
364 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
365 return false;
366 }
367 EXPORT_SYMBOL_GPL(kvm_require_cpl);
368
369 /*
370 * Load the pae pdptrs. Return true is they are all valid.
371 */
372 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
373 {
374 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
375 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
376 int i;
377 int ret;
378 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
379
380 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
381 offset * sizeof(u64), sizeof(pdpte));
382 if (ret < 0) {
383 ret = 0;
384 goto out;
385 }
386 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
387 if (is_present_gpte(pdpte[i]) &&
388 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
389 ret = 0;
390 goto out;
391 }
392 }
393 ret = 1;
394
395 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
396 __set_bit(VCPU_EXREG_PDPTR,
397 (unsigned long *)&vcpu->arch.regs_avail);
398 __set_bit(VCPU_EXREG_PDPTR,
399 (unsigned long *)&vcpu->arch.regs_dirty);
400 out:
401
402 return ret;
403 }
404 EXPORT_SYMBOL_GPL(load_pdptrs);
405
406 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
407 {
408 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
409 bool changed = true;
410 int r;
411
412 if (is_long_mode(vcpu) || !is_pae(vcpu))
413 return false;
414
415 if (!test_bit(VCPU_EXREG_PDPTR,
416 (unsigned long *)&vcpu->arch.regs_avail))
417 return true;
418
419 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
420 if (r < 0)
421 goto out;
422 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
423 out:
424
425 return changed;
426 }
427
428 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
429 {
430 unsigned long old_cr0 = kvm_read_cr0(vcpu);
431 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
432 X86_CR0_CD | X86_CR0_NW;
433
434 cr0 |= X86_CR0_ET;
435
436 #ifdef CONFIG_X86_64
437 if (cr0 & 0xffffffff00000000UL)
438 return 1;
439 #endif
440
441 cr0 &= ~CR0_RESERVED_BITS;
442
443 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
444 return 1;
445
446 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
447 return 1;
448
449 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
450 #ifdef CONFIG_X86_64
451 if ((vcpu->arch.efer & EFER_LME)) {
452 int cs_db, cs_l;
453
454 if (!is_pae(vcpu))
455 return 1;
456 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
457 if (cs_l)
458 return 1;
459 } else
460 #endif
461 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3))
462 return 1;
463 }
464
465 kvm_x86_ops->set_cr0(vcpu, cr0);
466
467 if ((cr0 ^ old_cr0) & update_bits)
468 kvm_mmu_reset_context(vcpu);
469 return 0;
470 }
471 EXPORT_SYMBOL_GPL(kvm_set_cr0);
472
473 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
474 {
475 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
476 }
477 EXPORT_SYMBOL_GPL(kvm_lmsw);
478
479 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
480 {
481 u64 xcr0;
482
483 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
484 if (index != XCR_XFEATURE_ENABLED_MASK)
485 return 1;
486 xcr0 = xcr;
487 if (kvm_x86_ops->get_cpl(vcpu) != 0)
488 return 1;
489 if (!(xcr0 & XSTATE_FP))
490 return 1;
491 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
492 return 1;
493 if (xcr0 & ~host_xcr0)
494 return 1;
495 vcpu->arch.xcr0 = xcr0;
496 vcpu->guest_xcr0_loaded = 0;
497 return 0;
498 }
499
500 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
501 {
502 if (__kvm_set_xcr(vcpu, index, xcr)) {
503 kvm_inject_gp(vcpu, 0);
504 return 1;
505 }
506 return 0;
507 }
508 EXPORT_SYMBOL_GPL(kvm_set_xcr);
509
510 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
511 {
512 struct kvm_cpuid_entry2 *best;
513
514 best = kvm_find_cpuid_entry(vcpu, 1, 0);
515 return best && (best->ecx & bit(X86_FEATURE_XSAVE));
516 }
517
518 static void update_cpuid(struct kvm_vcpu *vcpu)
519 {
520 struct kvm_cpuid_entry2 *best;
521
522 best = kvm_find_cpuid_entry(vcpu, 1, 0);
523 if (!best)
524 return;
525
526 /* Update OSXSAVE bit */
527 if (cpu_has_xsave && best->function == 0x1) {
528 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
529 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
530 best->ecx |= bit(X86_FEATURE_OSXSAVE);
531 }
532 }
533
534 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
535 {
536 unsigned long old_cr4 = kvm_read_cr4(vcpu);
537 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
538
539 if (cr4 & CR4_RESERVED_BITS)
540 return 1;
541
542 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
543 return 1;
544
545 if (is_long_mode(vcpu)) {
546 if (!(cr4 & X86_CR4_PAE))
547 return 1;
548 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
549 && ((cr4 ^ old_cr4) & pdptr_bits)
550 && !load_pdptrs(vcpu, vcpu->arch.cr3))
551 return 1;
552
553 if (cr4 & X86_CR4_VMXE)
554 return 1;
555
556 kvm_x86_ops->set_cr4(vcpu, cr4);
557
558 if ((cr4 ^ old_cr4) & pdptr_bits)
559 kvm_mmu_reset_context(vcpu);
560
561 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
562 update_cpuid(vcpu);
563
564 return 0;
565 }
566 EXPORT_SYMBOL_GPL(kvm_set_cr4);
567
568 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
569 {
570 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
571 kvm_mmu_sync_roots(vcpu);
572 kvm_mmu_flush_tlb(vcpu);
573 return 0;
574 }
575
576 if (is_long_mode(vcpu)) {
577 if (cr3 & CR3_L_MODE_RESERVED_BITS)
578 return 1;
579 } else {
580 if (is_pae(vcpu)) {
581 if (cr3 & CR3_PAE_RESERVED_BITS)
582 return 1;
583 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3))
584 return 1;
585 }
586 /*
587 * We don't check reserved bits in nonpae mode, because
588 * this isn't enforced, and VMware depends on this.
589 */
590 }
591
592 /*
593 * Does the new cr3 value map to physical memory? (Note, we
594 * catch an invalid cr3 even in real-mode, because it would
595 * cause trouble later on when we turn on paging anyway.)
596 *
597 * A real CPU would silently accept an invalid cr3 and would
598 * attempt to use it - with largely undefined (and often hard
599 * to debug) behavior on the guest side.
600 */
601 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
602 return 1;
603 vcpu->arch.cr3 = cr3;
604 vcpu->arch.mmu.new_cr3(vcpu);
605 return 0;
606 }
607 EXPORT_SYMBOL_GPL(kvm_set_cr3);
608
609 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
610 {
611 if (cr8 & CR8_RESERVED_BITS)
612 return 1;
613 if (irqchip_in_kernel(vcpu->kvm))
614 kvm_lapic_set_tpr(vcpu, cr8);
615 else
616 vcpu->arch.cr8 = cr8;
617 return 0;
618 }
619
620 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
621 {
622 if (__kvm_set_cr8(vcpu, cr8))
623 kvm_inject_gp(vcpu, 0);
624 }
625 EXPORT_SYMBOL_GPL(kvm_set_cr8);
626
627 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
628 {
629 if (irqchip_in_kernel(vcpu->kvm))
630 return kvm_lapic_get_cr8(vcpu);
631 else
632 return vcpu->arch.cr8;
633 }
634 EXPORT_SYMBOL_GPL(kvm_get_cr8);
635
636 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
637 {
638 switch (dr) {
639 case 0 ... 3:
640 vcpu->arch.db[dr] = val;
641 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
642 vcpu->arch.eff_db[dr] = val;
643 break;
644 case 4:
645 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
646 return 1; /* #UD */
647 /* fall through */
648 case 6:
649 if (val & 0xffffffff00000000ULL)
650 return -1; /* #GP */
651 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
652 break;
653 case 5:
654 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
655 return 1; /* #UD */
656 /* fall through */
657 default: /* 7 */
658 if (val & 0xffffffff00000000ULL)
659 return -1; /* #GP */
660 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
661 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
662 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
663 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
664 }
665 break;
666 }
667
668 return 0;
669 }
670
671 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
672 {
673 int res;
674
675 res = __kvm_set_dr(vcpu, dr, val);
676 if (res > 0)
677 kvm_queue_exception(vcpu, UD_VECTOR);
678 else if (res < 0)
679 kvm_inject_gp(vcpu, 0);
680
681 return res;
682 }
683 EXPORT_SYMBOL_GPL(kvm_set_dr);
684
685 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
686 {
687 switch (dr) {
688 case 0 ... 3:
689 *val = vcpu->arch.db[dr];
690 break;
691 case 4:
692 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
693 return 1;
694 /* fall through */
695 case 6:
696 *val = vcpu->arch.dr6;
697 break;
698 case 5:
699 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
700 return 1;
701 /* fall through */
702 default: /* 7 */
703 *val = vcpu->arch.dr7;
704 break;
705 }
706
707 return 0;
708 }
709
710 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
711 {
712 if (_kvm_get_dr(vcpu, dr, val)) {
713 kvm_queue_exception(vcpu, UD_VECTOR);
714 return 1;
715 }
716 return 0;
717 }
718 EXPORT_SYMBOL_GPL(kvm_get_dr);
719
720 /*
721 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
722 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
723 *
724 * This list is modified at module load time to reflect the
725 * capabilities of the host cpu. This capabilities test skips MSRs that are
726 * kvm-specific. Those are put in the beginning of the list.
727 */
728
729 #define KVM_SAVE_MSRS_BEGIN 7
730 static u32 msrs_to_save[] = {
731 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
732 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
733 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
734 HV_X64_MSR_APIC_ASSIST_PAGE,
735 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
736 MSR_K6_STAR,
737 #ifdef CONFIG_X86_64
738 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
739 #endif
740 MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
741 };
742
743 static unsigned num_msrs_to_save;
744
745 static u32 emulated_msrs[] = {
746 MSR_IA32_MISC_ENABLE,
747 };
748
749 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
750 {
751 u64 old_efer = vcpu->arch.efer;
752
753 if (efer & efer_reserved_bits)
754 return 1;
755
756 if (is_paging(vcpu)
757 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
758 return 1;
759
760 if (efer & EFER_FFXSR) {
761 struct kvm_cpuid_entry2 *feat;
762
763 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
764 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
765 return 1;
766 }
767
768 if (efer & EFER_SVME) {
769 struct kvm_cpuid_entry2 *feat;
770
771 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
772 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
773 return 1;
774 }
775
776 efer &= ~EFER_LMA;
777 efer |= vcpu->arch.efer & EFER_LMA;
778
779 kvm_x86_ops->set_efer(vcpu, efer);
780
781 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
782 kvm_mmu_reset_context(vcpu);
783
784 /* Update reserved bits */
785 if ((efer ^ old_efer) & EFER_NX)
786 kvm_mmu_reset_context(vcpu);
787
788 return 0;
789 }
790
791 void kvm_enable_efer_bits(u64 mask)
792 {
793 efer_reserved_bits &= ~mask;
794 }
795 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
796
797
798 /*
799 * Writes msr value into into the appropriate "register".
800 * Returns 0 on success, non-0 otherwise.
801 * Assumes vcpu_load() was already called.
802 */
803 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
804 {
805 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
806 }
807
808 /*
809 * Adapt set_msr() to msr_io()'s calling convention
810 */
811 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
812 {
813 return kvm_set_msr(vcpu, index, *data);
814 }
815
816 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
817 {
818 int version;
819 int r;
820 struct pvclock_wall_clock wc;
821 struct timespec boot;
822
823 if (!wall_clock)
824 return;
825
826 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
827 if (r)
828 return;
829
830 if (version & 1)
831 ++version; /* first time write, random junk */
832
833 ++version;
834
835 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
836
837 /*
838 * The guest calculates current wall clock time by adding
839 * system time (updated by kvm_write_guest_time below) to the
840 * wall clock specified here. guest system time equals host
841 * system time for us, thus we must fill in host boot time here.
842 */
843 getboottime(&boot);
844
845 wc.sec = boot.tv_sec;
846 wc.nsec = boot.tv_nsec;
847 wc.version = version;
848
849 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
850
851 version++;
852 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
853 }
854
855 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
856 {
857 uint32_t quotient, remainder;
858
859 /* Don't try to replace with do_div(), this one calculates
860 * "(dividend << 32) / divisor" */
861 __asm__ ( "divl %4"
862 : "=a" (quotient), "=d" (remainder)
863 : "0" (0), "1" (dividend), "r" (divisor) );
864 return quotient;
865 }
866
867 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
868 {
869 uint64_t nsecs = 1000000000LL;
870 int32_t shift = 0;
871 uint64_t tps64;
872 uint32_t tps32;
873
874 tps64 = tsc_khz * 1000LL;
875 while (tps64 > nsecs*2) {
876 tps64 >>= 1;
877 shift--;
878 }
879
880 tps32 = (uint32_t)tps64;
881 while (tps32 <= (uint32_t)nsecs) {
882 tps32 <<= 1;
883 shift++;
884 }
885
886 hv_clock->tsc_shift = shift;
887 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
888
889 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
890 __func__, tsc_khz, hv_clock->tsc_shift,
891 hv_clock->tsc_to_system_mul);
892 }
893
894 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
895
896 static void kvm_write_guest_time(struct kvm_vcpu *v)
897 {
898 struct timespec ts;
899 unsigned long flags;
900 struct kvm_vcpu_arch *vcpu = &v->arch;
901 void *shared_kaddr;
902 unsigned long this_tsc_khz;
903
904 if ((!vcpu->time_page))
905 return;
906
907 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
908 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
909 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
910 vcpu->hv_clock_tsc_khz = this_tsc_khz;
911 }
912 put_cpu_var(cpu_tsc_khz);
913
914 /* Keep irq disabled to prevent changes to the clock */
915 local_irq_save(flags);
916 kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
917 ktime_get_ts(&ts);
918 monotonic_to_bootbased(&ts);
919 local_irq_restore(flags);
920
921 /* With all the info we got, fill in the values */
922
923 vcpu->hv_clock.system_time = ts.tv_nsec +
924 (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
925
926 vcpu->hv_clock.flags = 0;
927
928 /*
929 * The interface expects us to write an even number signaling that the
930 * update is finished. Since the guest won't see the intermediate
931 * state, we just increase by 2 at the end.
932 */
933 vcpu->hv_clock.version += 2;
934
935 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
936
937 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
938 sizeof(vcpu->hv_clock));
939
940 kunmap_atomic(shared_kaddr, KM_USER0);
941
942 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
943 }
944
945 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
946 {
947 struct kvm_vcpu_arch *vcpu = &v->arch;
948
949 if (!vcpu->time_page)
950 return 0;
951 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
952 return 1;
953 }
954
955 static bool msr_mtrr_valid(unsigned msr)
956 {
957 switch (msr) {
958 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
959 case MSR_MTRRfix64K_00000:
960 case MSR_MTRRfix16K_80000:
961 case MSR_MTRRfix16K_A0000:
962 case MSR_MTRRfix4K_C0000:
963 case MSR_MTRRfix4K_C8000:
964 case MSR_MTRRfix4K_D0000:
965 case MSR_MTRRfix4K_D8000:
966 case MSR_MTRRfix4K_E0000:
967 case MSR_MTRRfix4K_E8000:
968 case MSR_MTRRfix4K_F0000:
969 case MSR_MTRRfix4K_F8000:
970 case MSR_MTRRdefType:
971 case MSR_IA32_CR_PAT:
972 return true;
973 case 0x2f8:
974 return true;
975 }
976 return false;
977 }
978
979 static bool valid_pat_type(unsigned t)
980 {
981 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
982 }
983
984 static bool valid_mtrr_type(unsigned t)
985 {
986 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
987 }
988
989 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
990 {
991 int i;
992
993 if (!msr_mtrr_valid(msr))
994 return false;
995
996 if (msr == MSR_IA32_CR_PAT) {
997 for (i = 0; i < 8; i++)
998 if (!valid_pat_type((data >> (i * 8)) & 0xff))
999 return false;
1000 return true;
1001 } else if (msr == MSR_MTRRdefType) {
1002 if (data & ~0xcff)
1003 return false;
1004 return valid_mtrr_type(data & 0xff);
1005 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1006 for (i = 0; i < 8 ; i++)
1007 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1008 return false;
1009 return true;
1010 }
1011
1012 /* variable MTRRs */
1013 return valid_mtrr_type(data & 0xff);
1014 }
1015
1016 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1017 {
1018 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1019
1020 if (!mtrr_valid(vcpu, msr, data))
1021 return 1;
1022
1023 if (msr == MSR_MTRRdefType) {
1024 vcpu->arch.mtrr_state.def_type = data;
1025 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1026 } else if (msr == MSR_MTRRfix64K_00000)
1027 p[0] = data;
1028 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1029 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1030 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1031 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1032 else if (msr == MSR_IA32_CR_PAT)
1033 vcpu->arch.pat = data;
1034 else { /* Variable MTRRs */
1035 int idx, is_mtrr_mask;
1036 u64 *pt;
1037
1038 idx = (msr - 0x200) / 2;
1039 is_mtrr_mask = msr - 0x200 - 2 * idx;
1040 if (!is_mtrr_mask)
1041 pt =
1042 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1043 else
1044 pt =
1045 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1046 *pt = data;
1047 }
1048
1049 kvm_mmu_reset_context(vcpu);
1050 return 0;
1051 }
1052
1053 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1054 {
1055 u64 mcg_cap = vcpu->arch.mcg_cap;
1056 unsigned bank_num = mcg_cap & 0xff;
1057
1058 switch (msr) {
1059 case MSR_IA32_MCG_STATUS:
1060 vcpu->arch.mcg_status = data;
1061 break;
1062 case MSR_IA32_MCG_CTL:
1063 if (!(mcg_cap & MCG_CTL_P))
1064 return 1;
1065 if (data != 0 && data != ~(u64)0)
1066 return -1;
1067 vcpu->arch.mcg_ctl = data;
1068 break;
1069 default:
1070 if (msr >= MSR_IA32_MC0_CTL &&
1071 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1072 u32 offset = msr - MSR_IA32_MC0_CTL;
1073 /* only 0 or all 1s can be written to IA32_MCi_CTL
1074 * some Linux kernels though clear bit 10 in bank 4 to
1075 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1076 * this to avoid an uncatched #GP in the guest
1077 */
1078 if ((offset & 0x3) == 0 &&
1079 data != 0 && (data | (1 << 10)) != ~(u64)0)
1080 return -1;
1081 vcpu->arch.mce_banks[offset] = data;
1082 break;
1083 }
1084 return 1;
1085 }
1086 return 0;
1087 }
1088
1089 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1090 {
1091 struct kvm *kvm = vcpu->kvm;
1092 int lm = is_long_mode(vcpu);
1093 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1094 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1095 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1096 : kvm->arch.xen_hvm_config.blob_size_32;
1097 u32 page_num = data & ~PAGE_MASK;
1098 u64 page_addr = data & PAGE_MASK;
1099 u8 *page;
1100 int r;
1101
1102 r = -E2BIG;
1103 if (page_num >= blob_size)
1104 goto out;
1105 r = -ENOMEM;
1106 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1107 if (!page)
1108 goto out;
1109 r = -EFAULT;
1110 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1111 goto out_free;
1112 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1113 goto out_free;
1114 r = 0;
1115 out_free:
1116 kfree(page);
1117 out:
1118 return r;
1119 }
1120
1121 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1122 {
1123 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1124 }
1125
1126 static bool kvm_hv_msr_partition_wide(u32 msr)
1127 {
1128 bool r = false;
1129 switch (msr) {
1130 case HV_X64_MSR_GUEST_OS_ID:
1131 case HV_X64_MSR_HYPERCALL:
1132 r = true;
1133 break;
1134 }
1135
1136 return r;
1137 }
1138
1139 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1140 {
1141 struct kvm *kvm = vcpu->kvm;
1142
1143 switch (msr) {
1144 case HV_X64_MSR_GUEST_OS_ID:
1145 kvm->arch.hv_guest_os_id = data;
1146 /* setting guest os id to zero disables hypercall page */
1147 if (!kvm->arch.hv_guest_os_id)
1148 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1149 break;
1150 case HV_X64_MSR_HYPERCALL: {
1151 u64 gfn;
1152 unsigned long addr;
1153 u8 instructions[4];
1154
1155 /* if guest os id is not set hypercall should remain disabled */
1156 if (!kvm->arch.hv_guest_os_id)
1157 break;
1158 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1159 kvm->arch.hv_hypercall = data;
1160 break;
1161 }
1162 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1163 addr = gfn_to_hva(kvm, gfn);
1164 if (kvm_is_error_hva(addr))
1165 return 1;
1166 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1167 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1168 if (copy_to_user((void __user *)addr, instructions, 4))
1169 return 1;
1170 kvm->arch.hv_hypercall = data;
1171 break;
1172 }
1173 default:
1174 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1175 "data 0x%llx\n", msr, data);
1176 return 1;
1177 }
1178 return 0;
1179 }
1180
1181 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1182 {
1183 switch (msr) {
1184 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1185 unsigned long addr;
1186
1187 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1188 vcpu->arch.hv_vapic = data;
1189 break;
1190 }
1191 addr = gfn_to_hva(vcpu->kvm, data >>
1192 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1193 if (kvm_is_error_hva(addr))
1194 return 1;
1195 if (clear_user((void __user *)addr, PAGE_SIZE))
1196 return 1;
1197 vcpu->arch.hv_vapic = data;
1198 break;
1199 }
1200 case HV_X64_MSR_EOI:
1201 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1202 case HV_X64_MSR_ICR:
1203 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1204 case HV_X64_MSR_TPR:
1205 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1206 default:
1207 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1208 "data 0x%llx\n", msr, data);
1209 return 1;
1210 }
1211
1212 return 0;
1213 }
1214
1215 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1216 {
1217 switch (msr) {
1218 case MSR_EFER:
1219 return set_efer(vcpu, data);
1220 case MSR_K7_HWCR:
1221 data &= ~(u64)0x40; /* ignore flush filter disable */
1222 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1223 if (data != 0) {
1224 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1225 data);
1226 return 1;
1227 }
1228 break;
1229 case MSR_FAM10H_MMIO_CONF_BASE:
1230 if (data != 0) {
1231 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1232 "0x%llx\n", data);
1233 return 1;
1234 }
1235 break;
1236 case MSR_AMD64_NB_CFG:
1237 break;
1238 case MSR_IA32_DEBUGCTLMSR:
1239 if (!data) {
1240 /* We support the non-activated case already */
1241 break;
1242 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1243 /* Values other than LBR and BTF are vendor-specific,
1244 thus reserved and should throw a #GP */
1245 return 1;
1246 }
1247 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1248 __func__, data);
1249 break;
1250 case MSR_IA32_UCODE_REV:
1251 case MSR_IA32_UCODE_WRITE:
1252 case MSR_VM_HSAVE_PA:
1253 case MSR_AMD64_PATCH_LOADER:
1254 break;
1255 case 0x200 ... 0x2ff:
1256 return set_msr_mtrr(vcpu, msr, data);
1257 case MSR_IA32_APICBASE:
1258 kvm_set_apic_base(vcpu, data);
1259 break;
1260 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1261 return kvm_x2apic_msr_write(vcpu, msr, data);
1262 case MSR_IA32_MISC_ENABLE:
1263 vcpu->arch.ia32_misc_enable_msr = data;
1264 break;
1265 case MSR_KVM_WALL_CLOCK_NEW:
1266 case MSR_KVM_WALL_CLOCK:
1267 vcpu->kvm->arch.wall_clock = data;
1268 kvm_write_wall_clock(vcpu->kvm, data);
1269 break;
1270 case MSR_KVM_SYSTEM_TIME_NEW:
1271 case MSR_KVM_SYSTEM_TIME: {
1272 if (vcpu->arch.time_page) {
1273 kvm_release_page_dirty(vcpu->arch.time_page);
1274 vcpu->arch.time_page = NULL;
1275 }
1276
1277 vcpu->arch.time = data;
1278
1279 /* we verify if the enable bit is set... */
1280 if (!(data & 1))
1281 break;
1282
1283 /* ...but clean it before doing the actual write */
1284 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1285
1286 vcpu->arch.time_page =
1287 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1288
1289 if (is_error_page(vcpu->arch.time_page)) {
1290 kvm_release_page_clean(vcpu->arch.time_page);
1291 vcpu->arch.time_page = NULL;
1292 }
1293
1294 kvm_request_guest_time_update(vcpu);
1295 break;
1296 }
1297 case MSR_IA32_MCG_CTL:
1298 case MSR_IA32_MCG_STATUS:
1299 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1300 return set_msr_mce(vcpu, msr, data);
1301
1302 /* Performance counters are not protected by a CPUID bit,
1303 * so we should check all of them in the generic path for the sake of
1304 * cross vendor migration.
1305 * Writing a zero into the event select MSRs disables them,
1306 * which we perfectly emulate ;-). Any other value should be at least
1307 * reported, some guests depend on them.
1308 */
1309 case MSR_P6_EVNTSEL0:
1310 case MSR_P6_EVNTSEL1:
1311 case MSR_K7_EVNTSEL0:
1312 case MSR_K7_EVNTSEL1:
1313 case MSR_K7_EVNTSEL2:
1314 case MSR_K7_EVNTSEL3:
1315 if (data != 0)
1316 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1317 "0x%x data 0x%llx\n", msr, data);
1318 break;
1319 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1320 * so we ignore writes to make it happy.
1321 */
1322 case MSR_P6_PERFCTR0:
1323 case MSR_P6_PERFCTR1:
1324 case MSR_K7_PERFCTR0:
1325 case MSR_K7_PERFCTR1:
1326 case MSR_K7_PERFCTR2:
1327 case MSR_K7_PERFCTR3:
1328 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1329 "0x%x data 0x%llx\n", msr, data);
1330 break;
1331 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1332 if (kvm_hv_msr_partition_wide(msr)) {
1333 int r;
1334 mutex_lock(&vcpu->kvm->lock);
1335 r = set_msr_hyperv_pw(vcpu, msr, data);
1336 mutex_unlock(&vcpu->kvm->lock);
1337 return r;
1338 } else
1339 return set_msr_hyperv(vcpu, msr, data);
1340 break;
1341 default:
1342 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1343 return xen_hvm_config(vcpu, data);
1344 if (!ignore_msrs) {
1345 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1346 msr, data);
1347 return 1;
1348 } else {
1349 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1350 msr, data);
1351 break;
1352 }
1353 }
1354 return 0;
1355 }
1356 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1357
1358
1359 /*
1360 * Reads an msr value (of 'msr_index') into 'pdata'.
1361 * Returns 0 on success, non-0 otherwise.
1362 * Assumes vcpu_load() was already called.
1363 */
1364 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1365 {
1366 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1367 }
1368
1369 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1370 {
1371 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1372
1373 if (!msr_mtrr_valid(msr))
1374 return 1;
1375
1376 if (msr == MSR_MTRRdefType)
1377 *pdata = vcpu->arch.mtrr_state.def_type +
1378 (vcpu->arch.mtrr_state.enabled << 10);
1379 else if (msr == MSR_MTRRfix64K_00000)
1380 *pdata = p[0];
1381 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1382 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1383 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1384 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1385 else if (msr == MSR_IA32_CR_PAT)
1386 *pdata = vcpu->arch.pat;
1387 else { /* Variable MTRRs */
1388 int idx, is_mtrr_mask;
1389 u64 *pt;
1390
1391 idx = (msr - 0x200) / 2;
1392 is_mtrr_mask = msr - 0x200 - 2 * idx;
1393 if (!is_mtrr_mask)
1394 pt =
1395 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1396 else
1397 pt =
1398 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1399 *pdata = *pt;
1400 }
1401
1402 return 0;
1403 }
1404
1405 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1406 {
1407 u64 data;
1408 u64 mcg_cap = vcpu->arch.mcg_cap;
1409 unsigned bank_num = mcg_cap & 0xff;
1410
1411 switch (msr) {
1412 case MSR_IA32_P5_MC_ADDR:
1413 case MSR_IA32_P5_MC_TYPE:
1414 data = 0;
1415 break;
1416 case MSR_IA32_MCG_CAP:
1417 data = vcpu->arch.mcg_cap;
1418 break;
1419 case MSR_IA32_MCG_CTL:
1420 if (!(mcg_cap & MCG_CTL_P))
1421 return 1;
1422 data = vcpu->arch.mcg_ctl;
1423 break;
1424 case MSR_IA32_MCG_STATUS:
1425 data = vcpu->arch.mcg_status;
1426 break;
1427 default:
1428 if (msr >= MSR_IA32_MC0_CTL &&
1429 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1430 u32 offset = msr - MSR_IA32_MC0_CTL;
1431 data = vcpu->arch.mce_banks[offset];
1432 break;
1433 }
1434 return 1;
1435 }
1436 *pdata = data;
1437 return 0;
1438 }
1439
1440 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1441 {
1442 u64 data = 0;
1443 struct kvm *kvm = vcpu->kvm;
1444
1445 switch (msr) {
1446 case HV_X64_MSR_GUEST_OS_ID:
1447 data = kvm->arch.hv_guest_os_id;
1448 break;
1449 case HV_X64_MSR_HYPERCALL:
1450 data = kvm->arch.hv_hypercall;
1451 break;
1452 default:
1453 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1454 return 1;
1455 }
1456
1457 *pdata = data;
1458 return 0;
1459 }
1460
1461 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1462 {
1463 u64 data = 0;
1464
1465 switch (msr) {
1466 case HV_X64_MSR_VP_INDEX: {
1467 int r;
1468 struct kvm_vcpu *v;
1469 kvm_for_each_vcpu(r, v, vcpu->kvm)
1470 if (v == vcpu)
1471 data = r;
1472 break;
1473 }
1474 case HV_X64_MSR_EOI:
1475 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1476 case HV_X64_MSR_ICR:
1477 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1478 case HV_X64_MSR_TPR:
1479 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1480 default:
1481 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1482 return 1;
1483 }
1484 *pdata = data;
1485 return 0;
1486 }
1487
1488 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1489 {
1490 u64 data;
1491
1492 switch (msr) {
1493 case MSR_IA32_PLATFORM_ID:
1494 case MSR_IA32_UCODE_REV:
1495 case MSR_IA32_EBL_CR_POWERON:
1496 case MSR_IA32_DEBUGCTLMSR:
1497 case MSR_IA32_LASTBRANCHFROMIP:
1498 case MSR_IA32_LASTBRANCHTOIP:
1499 case MSR_IA32_LASTINTFROMIP:
1500 case MSR_IA32_LASTINTTOIP:
1501 case MSR_K8_SYSCFG:
1502 case MSR_K7_HWCR:
1503 case MSR_VM_HSAVE_PA:
1504 case MSR_P6_PERFCTR0:
1505 case MSR_P6_PERFCTR1:
1506 case MSR_P6_EVNTSEL0:
1507 case MSR_P6_EVNTSEL1:
1508 case MSR_K7_EVNTSEL0:
1509 case MSR_K7_PERFCTR0:
1510 case MSR_K8_INT_PENDING_MSG:
1511 case MSR_AMD64_NB_CFG:
1512 case MSR_FAM10H_MMIO_CONF_BASE:
1513 data = 0;
1514 break;
1515 case MSR_MTRRcap:
1516 data = 0x500 | KVM_NR_VAR_MTRR;
1517 break;
1518 case 0x200 ... 0x2ff:
1519 return get_msr_mtrr(vcpu, msr, pdata);
1520 case 0xcd: /* fsb frequency */
1521 data = 3;
1522 break;
1523 case MSR_IA32_APICBASE:
1524 data = kvm_get_apic_base(vcpu);
1525 break;
1526 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1527 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1528 break;
1529 case MSR_IA32_MISC_ENABLE:
1530 data = vcpu->arch.ia32_misc_enable_msr;
1531 break;
1532 case MSR_IA32_PERF_STATUS:
1533 /* TSC increment by tick */
1534 data = 1000ULL;
1535 /* CPU multiplier */
1536 data |= (((uint64_t)4ULL) << 40);
1537 break;
1538 case MSR_EFER:
1539 data = vcpu->arch.efer;
1540 break;
1541 case MSR_KVM_WALL_CLOCK:
1542 case MSR_KVM_WALL_CLOCK_NEW:
1543 data = vcpu->kvm->arch.wall_clock;
1544 break;
1545 case MSR_KVM_SYSTEM_TIME:
1546 case MSR_KVM_SYSTEM_TIME_NEW:
1547 data = vcpu->arch.time;
1548 break;
1549 case MSR_IA32_P5_MC_ADDR:
1550 case MSR_IA32_P5_MC_TYPE:
1551 case MSR_IA32_MCG_CAP:
1552 case MSR_IA32_MCG_CTL:
1553 case MSR_IA32_MCG_STATUS:
1554 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1555 return get_msr_mce(vcpu, msr, pdata);
1556 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1557 if (kvm_hv_msr_partition_wide(msr)) {
1558 int r;
1559 mutex_lock(&vcpu->kvm->lock);
1560 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1561 mutex_unlock(&vcpu->kvm->lock);
1562 return r;
1563 } else
1564 return get_msr_hyperv(vcpu, msr, pdata);
1565 break;
1566 default:
1567 if (!ignore_msrs) {
1568 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1569 return 1;
1570 } else {
1571 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1572 data = 0;
1573 }
1574 break;
1575 }
1576 *pdata = data;
1577 return 0;
1578 }
1579 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1580
1581 /*
1582 * Read or write a bunch of msrs. All parameters are kernel addresses.
1583 *
1584 * @return number of msrs set successfully.
1585 */
1586 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1587 struct kvm_msr_entry *entries,
1588 int (*do_msr)(struct kvm_vcpu *vcpu,
1589 unsigned index, u64 *data))
1590 {
1591 int i, idx;
1592
1593 idx = srcu_read_lock(&vcpu->kvm->srcu);
1594 for (i = 0; i < msrs->nmsrs; ++i)
1595 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1596 break;
1597 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1598
1599 return i;
1600 }
1601
1602 /*
1603 * Read or write a bunch of msrs. Parameters are user addresses.
1604 *
1605 * @return number of msrs set successfully.
1606 */
1607 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1608 int (*do_msr)(struct kvm_vcpu *vcpu,
1609 unsigned index, u64 *data),
1610 int writeback)
1611 {
1612 struct kvm_msrs msrs;
1613 struct kvm_msr_entry *entries;
1614 int r, n;
1615 unsigned size;
1616
1617 r = -EFAULT;
1618 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1619 goto out;
1620
1621 r = -E2BIG;
1622 if (msrs.nmsrs >= MAX_IO_MSRS)
1623 goto out;
1624
1625 r = -ENOMEM;
1626 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1627 entries = kmalloc(size, GFP_KERNEL);
1628 if (!entries)
1629 goto out;
1630
1631 r = -EFAULT;
1632 if (copy_from_user(entries, user_msrs->entries, size))
1633 goto out_free;
1634
1635 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1636 if (r < 0)
1637 goto out_free;
1638
1639 r = -EFAULT;
1640 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1641 goto out_free;
1642
1643 r = n;
1644
1645 out_free:
1646 kfree(entries);
1647 out:
1648 return r;
1649 }
1650
1651 int kvm_dev_ioctl_check_extension(long ext)
1652 {
1653 int r;
1654
1655 switch (ext) {
1656 case KVM_CAP_IRQCHIP:
1657 case KVM_CAP_HLT:
1658 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1659 case KVM_CAP_SET_TSS_ADDR:
1660 case KVM_CAP_EXT_CPUID:
1661 case KVM_CAP_CLOCKSOURCE:
1662 case KVM_CAP_PIT:
1663 case KVM_CAP_NOP_IO_DELAY:
1664 case KVM_CAP_MP_STATE:
1665 case KVM_CAP_SYNC_MMU:
1666 case KVM_CAP_REINJECT_CONTROL:
1667 case KVM_CAP_IRQ_INJECT_STATUS:
1668 case KVM_CAP_ASSIGN_DEV_IRQ:
1669 case KVM_CAP_IRQFD:
1670 case KVM_CAP_IOEVENTFD:
1671 case KVM_CAP_PIT2:
1672 case KVM_CAP_PIT_STATE2:
1673 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1674 case KVM_CAP_XEN_HVM:
1675 case KVM_CAP_ADJUST_CLOCK:
1676 case KVM_CAP_VCPU_EVENTS:
1677 case KVM_CAP_HYPERV:
1678 case KVM_CAP_HYPERV_VAPIC:
1679 case KVM_CAP_HYPERV_SPIN:
1680 case KVM_CAP_PCI_SEGMENT:
1681 case KVM_CAP_DEBUGREGS:
1682 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1683 r = 1;
1684 break;
1685 case KVM_CAP_COALESCED_MMIO:
1686 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1687 break;
1688 case KVM_CAP_VAPIC:
1689 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1690 break;
1691 case KVM_CAP_NR_VCPUS:
1692 r = KVM_MAX_VCPUS;
1693 break;
1694 case KVM_CAP_NR_MEMSLOTS:
1695 r = KVM_MEMORY_SLOTS;
1696 break;
1697 case KVM_CAP_PV_MMU: /* obsolete */
1698 r = 0;
1699 break;
1700 case KVM_CAP_IOMMU:
1701 r = iommu_found();
1702 break;
1703 case KVM_CAP_MCE:
1704 r = KVM_MAX_MCE_BANKS;
1705 break;
1706 default:
1707 r = 0;
1708 break;
1709 }
1710 return r;
1711
1712 }
1713
1714 long kvm_arch_dev_ioctl(struct file *filp,
1715 unsigned int ioctl, unsigned long arg)
1716 {
1717 void __user *argp = (void __user *)arg;
1718 long r;
1719
1720 switch (ioctl) {
1721 case KVM_GET_MSR_INDEX_LIST: {
1722 struct kvm_msr_list __user *user_msr_list = argp;
1723 struct kvm_msr_list msr_list;
1724 unsigned n;
1725
1726 r = -EFAULT;
1727 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1728 goto out;
1729 n = msr_list.nmsrs;
1730 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1731 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1732 goto out;
1733 r = -E2BIG;
1734 if (n < msr_list.nmsrs)
1735 goto out;
1736 r = -EFAULT;
1737 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1738 num_msrs_to_save * sizeof(u32)))
1739 goto out;
1740 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1741 &emulated_msrs,
1742 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1743 goto out;
1744 r = 0;
1745 break;
1746 }
1747 case KVM_GET_SUPPORTED_CPUID: {
1748 struct kvm_cpuid2 __user *cpuid_arg = argp;
1749 struct kvm_cpuid2 cpuid;
1750
1751 r = -EFAULT;
1752 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1753 goto out;
1754 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1755 cpuid_arg->entries);
1756 if (r)
1757 goto out;
1758
1759 r = -EFAULT;
1760 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1761 goto out;
1762 r = 0;
1763 break;
1764 }
1765 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1766 u64 mce_cap;
1767
1768 mce_cap = KVM_MCE_CAP_SUPPORTED;
1769 r = -EFAULT;
1770 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1771 goto out;
1772 r = 0;
1773 break;
1774 }
1775 default:
1776 r = -EINVAL;
1777 }
1778 out:
1779 return r;
1780 }
1781
1782 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1783 {
1784 kvm_x86_ops->vcpu_load(vcpu, cpu);
1785 if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1786 unsigned long khz = cpufreq_quick_get(cpu);
1787 if (!khz)
1788 khz = tsc_khz;
1789 per_cpu(cpu_tsc_khz, cpu) = khz;
1790 }
1791 kvm_request_guest_time_update(vcpu);
1792 }
1793
1794 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1795 {
1796 kvm_x86_ops->vcpu_put(vcpu);
1797 kvm_put_guest_fpu(vcpu);
1798 }
1799
1800 static int is_efer_nx(void)
1801 {
1802 unsigned long long efer = 0;
1803
1804 rdmsrl_safe(MSR_EFER, &efer);
1805 return efer & EFER_NX;
1806 }
1807
1808 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1809 {
1810 int i;
1811 struct kvm_cpuid_entry2 *e, *entry;
1812
1813 entry = NULL;
1814 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1815 e = &vcpu->arch.cpuid_entries[i];
1816 if (e->function == 0x80000001) {
1817 entry = e;
1818 break;
1819 }
1820 }
1821 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1822 entry->edx &= ~(1 << 20);
1823 printk(KERN_INFO "kvm: guest NX capability removed\n");
1824 }
1825 }
1826
1827 /* when an old userspace process fills a new kernel module */
1828 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1829 struct kvm_cpuid *cpuid,
1830 struct kvm_cpuid_entry __user *entries)
1831 {
1832 int r, i;
1833 struct kvm_cpuid_entry *cpuid_entries;
1834
1835 r = -E2BIG;
1836 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1837 goto out;
1838 r = -ENOMEM;
1839 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1840 if (!cpuid_entries)
1841 goto out;
1842 r = -EFAULT;
1843 if (copy_from_user(cpuid_entries, entries,
1844 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1845 goto out_free;
1846 for (i = 0; i < cpuid->nent; i++) {
1847 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1848 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1849 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1850 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1851 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1852 vcpu->arch.cpuid_entries[i].index = 0;
1853 vcpu->arch.cpuid_entries[i].flags = 0;
1854 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1855 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1856 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1857 }
1858 vcpu->arch.cpuid_nent = cpuid->nent;
1859 cpuid_fix_nx_cap(vcpu);
1860 r = 0;
1861 kvm_apic_set_version(vcpu);
1862 kvm_x86_ops->cpuid_update(vcpu);
1863 update_cpuid(vcpu);
1864
1865 out_free:
1866 vfree(cpuid_entries);
1867 out:
1868 return r;
1869 }
1870
1871 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1872 struct kvm_cpuid2 *cpuid,
1873 struct kvm_cpuid_entry2 __user *entries)
1874 {
1875 int r;
1876
1877 r = -E2BIG;
1878 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1879 goto out;
1880 r = -EFAULT;
1881 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1882 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1883 goto out;
1884 vcpu->arch.cpuid_nent = cpuid->nent;
1885 kvm_apic_set_version(vcpu);
1886 kvm_x86_ops->cpuid_update(vcpu);
1887 update_cpuid(vcpu);
1888 return 0;
1889
1890 out:
1891 return r;
1892 }
1893
1894 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1895 struct kvm_cpuid2 *cpuid,
1896 struct kvm_cpuid_entry2 __user *entries)
1897 {
1898 int r;
1899
1900 r = -E2BIG;
1901 if (cpuid->nent < vcpu->arch.cpuid_nent)
1902 goto out;
1903 r = -EFAULT;
1904 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1905 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1906 goto out;
1907 return 0;
1908
1909 out:
1910 cpuid->nent = vcpu->arch.cpuid_nent;
1911 return r;
1912 }
1913
1914 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1915 u32 index)
1916 {
1917 entry->function = function;
1918 entry->index = index;
1919 cpuid_count(entry->function, entry->index,
1920 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1921 entry->flags = 0;
1922 }
1923
1924 #define F(x) bit(X86_FEATURE_##x)
1925
1926 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1927 u32 index, int *nent, int maxnent)
1928 {
1929 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1930 #ifdef CONFIG_X86_64
1931 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
1932 ? F(GBPAGES) : 0;
1933 unsigned f_lm = F(LM);
1934 #else
1935 unsigned f_gbpages = 0;
1936 unsigned f_lm = 0;
1937 #endif
1938 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
1939
1940 /* cpuid 1.edx */
1941 const u32 kvm_supported_word0_x86_features =
1942 F(FPU) | F(VME) | F(DE) | F(PSE) |
1943 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1944 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1945 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1946 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1947 0 /* Reserved, DS, ACPI */ | F(MMX) |
1948 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1949 0 /* HTT, TM, Reserved, PBE */;
1950 /* cpuid 0x80000001.edx */
1951 const u32 kvm_supported_word1_x86_features =
1952 F(FPU) | F(VME) | F(DE) | F(PSE) |
1953 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1954 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1955 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1956 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1957 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1958 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
1959 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1960 /* cpuid 1.ecx */
1961 const u32 kvm_supported_word4_x86_features =
1962 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1963 0 /* DS-CPL, VMX, SMX, EST */ |
1964 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1965 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1966 0 /* Reserved, DCA */ | F(XMM4_1) |
1967 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1968 0 /* Reserved, AES */ | F(XSAVE) | 0 /* OSXSAVE */;
1969 /* cpuid 0x80000001.ecx */
1970 const u32 kvm_supported_word6_x86_features =
1971 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1972 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1973 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1974 0 /* SKINIT */ | 0 /* WDT */;
1975
1976 /* all calls to cpuid_count() should be made on the same cpu */
1977 get_cpu();
1978 do_cpuid_1_ent(entry, function, index);
1979 ++*nent;
1980
1981 switch (function) {
1982 case 0:
1983 entry->eax = min(entry->eax, (u32)0xd);
1984 break;
1985 case 1:
1986 entry->edx &= kvm_supported_word0_x86_features;
1987 entry->ecx &= kvm_supported_word4_x86_features;
1988 /* we support x2apic emulation even if host does not support
1989 * it since we emulate x2apic in software */
1990 entry->ecx |= F(X2APIC);
1991 break;
1992 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1993 * may return different values. This forces us to get_cpu() before
1994 * issuing the first command, and also to emulate this annoying behavior
1995 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1996 case 2: {
1997 int t, times = entry->eax & 0xff;
1998
1999 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2000 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2001 for (t = 1; t < times && *nent < maxnent; ++t) {
2002 do_cpuid_1_ent(&entry[t], function, 0);
2003 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2004 ++*nent;
2005 }
2006 break;
2007 }
2008 /* function 4 and 0xb have additional index. */
2009 case 4: {
2010 int i, cache_type;
2011
2012 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2013 /* read more entries until cache_type is zero */
2014 for (i = 1; *nent < maxnent; ++i) {
2015 cache_type = entry[i - 1].eax & 0x1f;
2016 if (!cache_type)
2017 break;
2018 do_cpuid_1_ent(&entry[i], function, i);
2019 entry[i].flags |=
2020 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2021 ++*nent;
2022 }
2023 break;
2024 }
2025 case 0xb: {
2026 int i, level_type;
2027
2028 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2029 /* read more entries until level_type is zero */
2030 for (i = 1; *nent < maxnent; ++i) {
2031 level_type = entry[i - 1].ecx & 0xff00;
2032 if (!level_type)
2033 break;
2034 do_cpuid_1_ent(&entry[i], function, i);
2035 entry[i].flags |=
2036 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2037 ++*nent;
2038 }
2039 break;
2040 }
2041 case 0xd: {
2042 int i;
2043
2044 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2045 for (i = 1; *nent < maxnent; ++i) {
2046 if (entry[i - 1].eax == 0 && i != 2)
2047 break;
2048 do_cpuid_1_ent(&entry[i], function, i);
2049 entry[i].flags |=
2050 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2051 ++*nent;
2052 }
2053 break;
2054 }
2055 case KVM_CPUID_SIGNATURE: {
2056 char signature[12] = "KVMKVMKVM\0\0";
2057 u32 *sigptr = (u32 *)signature;
2058 entry->eax = 0;
2059 entry->ebx = sigptr[0];
2060 entry->ecx = sigptr[1];
2061 entry->edx = sigptr[2];
2062 break;
2063 }
2064 case KVM_CPUID_FEATURES:
2065 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2066 (1 << KVM_FEATURE_NOP_IO_DELAY) |
2067 (1 << KVM_FEATURE_CLOCKSOURCE2) |
2068 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2069 entry->ebx = 0;
2070 entry->ecx = 0;
2071 entry->edx = 0;
2072 break;
2073 case 0x80000000:
2074 entry->eax = min(entry->eax, 0x8000001a);
2075 break;
2076 case 0x80000001:
2077 entry->edx &= kvm_supported_word1_x86_features;
2078 entry->ecx &= kvm_supported_word6_x86_features;
2079 break;
2080 }
2081
2082 kvm_x86_ops->set_supported_cpuid(function, entry);
2083
2084 put_cpu();
2085 }
2086
2087 #undef F
2088
2089 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2090 struct kvm_cpuid_entry2 __user *entries)
2091 {
2092 struct kvm_cpuid_entry2 *cpuid_entries;
2093 int limit, nent = 0, r = -E2BIG;
2094 u32 func;
2095
2096 if (cpuid->nent < 1)
2097 goto out;
2098 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2099 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2100 r = -ENOMEM;
2101 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2102 if (!cpuid_entries)
2103 goto out;
2104
2105 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2106 limit = cpuid_entries[0].eax;
2107 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2108 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2109 &nent, cpuid->nent);
2110 r = -E2BIG;
2111 if (nent >= cpuid->nent)
2112 goto out_free;
2113
2114 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2115 limit = cpuid_entries[nent - 1].eax;
2116 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2117 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2118 &nent, cpuid->nent);
2119
2120
2121
2122 r = -E2BIG;
2123 if (nent >= cpuid->nent)
2124 goto out_free;
2125
2126 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2127 cpuid->nent);
2128
2129 r = -E2BIG;
2130 if (nent >= cpuid->nent)
2131 goto out_free;
2132
2133 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2134 cpuid->nent);
2135
2136 r = -E2BIG;
2137 if (nent >= cpuid->nent)
2138 goto out_free;
2139
2140 r = -EFAULT;
2141 if (copy_to_user(entries, cpuid_entries,
2142 nent * sizeof(struct kvm_cpuid_entry2)))
2143 goto out_free;
2144 cpuid->nent = nent;
2145 r = 0;
2146
2147 out_free:
2148 vfree(cpuid_entries);
2149 out:
2150 return r;
2151 }
2152
2153 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2154 struct kvm_lapic_state *s)
2155 {
2156 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2157
2158 return 0;
2159 }
2160
2161 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2162 struct kvm_lapic_state *s)
2163 {
2164 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2165 kvm_apic_post_state_restore(vcpu);
2166 update_cr8_intercept(vcpu);
2167
2168 return 0;
2169 }
2170
2171 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2172 struct kvm_interrupt *irq)
2173 {
2174 if (irq->irq < 0 || irq->irq >= 256)
2175 return -EINVAL;
2176 if (irqchip_in_kernel(vcpu->kvm))
2177 return -ENXIO;
2178
2179 kvm_queue_interrupt(vcpu, irq->irq, false);
2180
2181 return 0;
2182 }
2183
2184 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2185 {
2186 kvm_inject_nmi(vcpu);
2187
2188 return 0;
2189 }
2190
2191 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2192 struct kvm_tpr_access_ctl *tac)
2193 {
2194 if (tac->flags)
2195 return -EINVAL;
2196 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2197 return 0;
2198 }
2199
2200 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2201 u64 mcg_cap)
2202 {
2203 int r;
2204 unsigned bank_num = mcg_cap & 0xff, bank;
2205
2206 r = -EINVAL;
2207 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2208 goto out;
2209 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2210 goto out;
2211 r = 0;
2212 vcpu->arch.mcg_cap = mcg_cap;
2213 /* Init IA32_MCG_CTL to all 1s */
2214 if (mcg_cap & MCG_CTL_P)
2215 vcpu->arch.mcg_ctl = ~(u64)0;
2216 /* Init IA32_MCi_CTL to all 1s */
2217 for (bank = 0; bank < bank_num; bank++)
2218 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2219 out:
2220 return r;
2221 }
2222
2223 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2224 struct kvm_x86_mce *mce)
2225 {
2226 u64 mcg_cap = vcpu->arch.mcg_cap;
2227 unsigned bank_num = mcg_cap & 0xff;
2228 u64 *banks = vcpu->arch.mce_banks;
2229
2230 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2231 return -EINVAL;
2232 /*
2233 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2234 * reporting is disabled
2235 */
2236 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2237 vcpu->arch.mcg_ctl != ~(u64)0)
2238 return 0;
2239 banks += 4 * mce->bank;
2240 /*
2241 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2242 * reporting is disabled for the bank
2243 */
2244 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2245 return 0;
2246 if (mce->status & MCI_STATUS_UC) {
2247 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2248 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2249 printk(KERN_DEBUG "kvm: set_mce: "
2250 "injects mce exception while "
2251 "previous one is in progress!\n");
2252 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2253 return 0;
2254 }
2255 if (banks[1] & MCI_STATUS_VAL)
2256 mce->status |= MCI_STATUS_OVER;
2257 banks[2] = mce->addr;
2258 banks[3] = mce->misc;
2259 vcpu->arch.mcg_status = mce->mcg_status;
2260 banks[1] = mce->status;
2261 kvm_queue_exception(vcpu, MC_VECTOR);
2262 } else if (!(banks[1] & MCI_STATUS_VAL)
2263 || !(banks[1] & MCI_STATUS_UC)) {
2264 if (banks[1] & MCI_STATUS_VAL)
2265 mce->status |= MCI_STATUS_OVER;
2266 banks[2] = mce->addr;
2267 banks[3] = mce->misc;
2268 banks[1] = mce->status;
2269 } else
2270 banks[1] |= MCI_STATUS_OVER;
2271 return 0;
2272 }
2273
2274 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2275 struct kvm_vcpu_events *events)
2276 {
2277 events->exception.injected =
2278 vcpu->arch.exception.pending &&
2279 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2280 events->exception.nr = vcpu->arch.exception.nr;
2281 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2282 events->exception.error_code = vcpu->arch.exception.error_code;
2283
2284 events->interrupt.injected =
2285 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2286 events->interrupt.nr = vcpu->arch.interrupt.nr;
2287 events->interrupt.soft = 0;
2288 events->interrupt.shadow =
2289 kvm_x86_ops->get_interrupt_shadow(vcpu,
2290 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2291
2292 events->nmi.injected = vcpu->arch.nmi_injected;
2293 events->nmi.pending = vcpu->arch.nmi_pending;
2294 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2295
2296 events->sipi_vector = vcpu->arch.sipi_vector;
2297
2298 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2299 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2300 | KVM_VCPUEVENT_VALID_SHADOW);
2301 }
2302
2303 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2304 struct kvm_vcpu_events *events)
2305 {
2306 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2307 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2308 | KVM_VCPUEVENT_VALID_SHADOW))
2309 return -EINVAL;
2310
2311 vcpu->arch.exception.pending = events->exception.injected;
2312 vcpu->arch.exception.nr = events->exception.nr;
2313 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2314 vcpu->arch.exception.error_code = events->exception.error_code;
2315
2316 vcpu->arch.interrupt.pending = events->interrupt.injected;
2317 vcpu->arch.interrupt.nr = events->interrupt.nr;
2318 vcpu->arch.interrupt.soft = events->interrupt.soft;
2319 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2320 kvm_pic_clear_isr_ack(vcpu->kvm);
2321 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2322 kvm_x86_ops->set_interrupt_shadow(vcpu,
2323 events->interrupt.shadow);
2324
2325 vcpu->arch.nmi_injected = events->nmi.injected;
2326 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2327 vcpu->arch.nmi_pending = events->nmi.pending;
2328 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2329
2330 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2331 vcpu->arch.sipi_vector = events->sipi_vector;
2332
2333 return 0;
2334 }
2335
2336 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2337 struct kvm_debugregs *dbgregs)
2338 {
2339 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2340 dbgregs->dr6 = vcpu->arch.dr6;
2341 dbgregs->dr7 = vcpu->arch.dr7;
2342 dbgregs->flags = 0;
2343 }
2344
2345 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2346 struct kvm_debugregs *dbgregs)
2347 {
2348 if (dbgregs->flags)
2349 return -EINVAL;
2350
2351 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2352 vcpu->arch.dr6 = dbgregs->dr6;
2353 vcpu->arch.dr7 = dbgregs->dr7;
2354
2355 return 0;
2356 }
2357
2358 long kvm_arch_vcpu_ioctl(struct file *filp,
2359 unsigned int ioctl, unsigned long arg)
2360 {
2361 struct kvm_vcpu *vcpu = filp->private_data;
2362 void __user *argp = (void __user *)arg;
2363 int r;
2364 struct kvm_lapic_state *lapic = NULL;
2365
2366 switch (ioctl) {
2367 case KVM_GET_LAPIC: {
2368 r = -EINVAL;
2369 if (!vcpu->arch.apic)
2370 goto out;
2371 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2372
2373 r = -ENOMEM;
2374 if (!lapic)
2375 goto out;
2376 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
2377 if (r)
2378 goto out;
2379 r = -EFAULT;
2380 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
2381 goto out;
2382 r = 0;
2383 break;
2384 }
2385 case KVM_SET_LAPIC: {
2386 r = -EINVAL;
2387 if (!vcpu->arch.apic)
2388 goto out;
2389 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2390 r = -ENOMEM;
2391 if (!lapic)
2392 goto out;
2393 r = -EFAULT;
2394 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
2395 goto out;
2396 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
2397 if (r)
2398 goto out;
2399 r = 0;
2400 break;
2401 }
2402 case KVM_INTERRUPT: {
2403 struct kvm_interrupt irq;
2404
2405 r = -EFAULT;
2406 if (copy_from_user(&irq, argp, sizeof irq))
2407 goto out;
2408 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2409 if (r)
2410 goto out;
2411 r = 0;
2412 break;
2413 }
2414 case KVM_NMI: {
2415 r = kvm_vcpu_ioctl_nmi(vcpu);
2416 if (r)
2417 goto out;
2418 r = 0;
2419 break;
2420 }
2421 case KVM_SET_CPUID: {
2422 struct kvm_cpuid __user *cpuid_arg = argp;
2423 struct kvm_cpuid cpuid;
2424
2425 r = -EFAULT;
2426 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2427 goto out;
2428 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2429 if (r)
2430 goto out;
2431 break;
2432 }
2433 case KVM_SET_CPUID2: {
2434 struct kvm_cpuid2 __user *cpuid_arg = argp;
2435 struct kvm_cpuid2 cpuid;
2436
2437 r = -EFAULT;
2438 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2439 goto out;
2440 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2441 cpuid_arg->entries);
2442 if (r)
2443 goto out;
2444 break;
2445 }
2446 case KVM_GET_CPUID2: {
2447 struct kvm_cpuid2 __user *cpuid_arg = argp;
2448 struct kvm_cpuid2 cpuid;
2449
2450 r = -EFAULT;
2451 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2452 goto out;
2453 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2454 cpuid_arg->entries);
2455 if (r)
2456 goto out;
2457 r = -EFAULT;
2458 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2459 goto out;
2460 r = 0;
2461 break;
2462 }
2463 case KVM_GET_MSRS:
2464 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2465 break;
2466 case KVM_SET_MSRS:
2467 r = msr_io(vcpu, argp, do_set_msr, 0);
2468 break;
2469 case KVM_TPR_ACCESS_REPORTING: {
2470 struct kvm_tpr_access_ctl tac;
2471
2472 r = -EFAULT;
2473 if (copy_from_user(&tac, argp, sizeof tac))
2474 goto out;
2475 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2476 if (r)
2477 goto out;
2478 r = -EFAULT;
2479 if (copy_to_user(argp, &tac, sizeof tac))
2480 goto out;
2481 r = 0;
2482 break;
2483 };
2484 case KVM_SET_VAPIC_ADDR: {
2485 struct kvm_vapic_addr va;
2486
2487 r = -EINVAL;
2488 if (!irqchip_in_kernel(vcpu->kvm))
2489 goto out;
2490 r = -EFAULT;
2491 if (copy_from_user(&va, argp, sizeof va))
2492 goto out;
2493 r = 0;
2494 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2495 break;
2496 }
2497 case KVM_X86_SETUP_MCE: {
2498 u64 mcg_cap;
2499
2500 r = -EFAULT;
2501 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2502 goto out;
2503 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2504 break;
2505 }
2506 case KVM_X86_SET_MCE: {
2507 struct kvm_x86_mce mce;
2508
2509 r = -EFAULT;
2510 if (copy_from_user(&mce, argp, sizeof mce))
2511 goto out;
2512 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2513 break;
2514 }
2515 case KVM_GET_VCPU_EVENTS: {
2516 struct kvm_vcpu_events events;
2517
2518 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2519
2520 r = -EFAULT;
2521 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2522 break;
2523 r = 0;
2524 break;
2525 }
2526 case KVM_SET_VCPU_EVENTS: {
2527 struct kvm_vcpu_events events;
2528
2529 r = -EFAULT;
2530 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2531 break;
2532
2533 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2534 break;
2535 }
2536 case KVM_GET_DEBUGREGS: {
2537 struct kvm_debugregs dbgregs;
2538
2539 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2540
2541 r = -EFAULT;
2542 if (copy_to_user(argp, &dbgregs,
2543 sizeof(struct kvm_debugregs)))
2544 break;
2545 r = 0;
2546 break;
2547 }
2548 case KVM_SET_DEBUGREGS: {
2549 struct kvm_debugregs dbgregs;
2550
2551 r = -EFAULT;
2552 if (copy_from_user(&dbgregs, argp,
2553 sizeof(struct kvm_debugregs)))
2554 break;
2555
2556 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2557 break;
2558 }
2559 default:
2560 r = -EINVAL;
2561 }
2562 out:
2563 kfree(lapic);
2564 return r;
2565 }
2566
2567 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2568 {
2569 int ret;
2570
2571 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2572 return -1;
2573 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2574 return ret;
2575 }
2576
2577 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2578 u64 ident_addr)
2579 {
2580 kvm->arch.ept_identity_map_addr = ident_addr;
2581 return 0;
2582 }
2583
2584 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2585 u32 kvm_nr_mmu_pages)
2586 {
2587 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2588 return -EINVAL;
2589
2590 mutex_lock(&kvm->slots_lock);
2591 spin_lock(&kvm->mmu_lock);
2592
2593 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2594 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2595
2596 spin_unlock(&kvm->mmu_lock);
2597 mutex_unlock(&kvm->slots_lock);
2598 return 0;
2599 }
2600
2601 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2602 {
2603 return kvm->arch.n_alloc_mmu_pages;
2604 }
2605
2606 gfn_t unalias_gfn_instantiation(struct kvm *kvm, gfn_t gfn)
2607 {
2608 int i;
2609 struct kvm_mem_alias *alias;
2610 struct kvm_mem_aliases *aliases;
2611
2612 aliases = kvm_aliases(kvm);
2613
2614 for (i = 0; i < aliases->naliases; ++i) {
2615 alias = &aliases->aliases[i];
2616 if (alias->flags & KVM_ALIAS_INVALID)
2617 continue;
2618 if (gfn >= alias->base_gfn
2619 && gfn < alias->base_gfn + alias->npages)
2620 return alias->target_gfn + gfn - alias->base_gfn;
2621 }
2622 return gfn;
2623 }
2624
2625 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
2626 {
2627 int i;
2628 struct kvm_mem_alias *alias;
2629 struct kvm_mem_aliases *aliases;
2630
2631 aliases = kvm_aliases(kvm);
2632
2633 for (i = 0; i < aliases->naliases; ++i) {
2634 alias = &aliases->aliases[i];
2635 if (gfn >= alias->base_gfn
2636 && gfn < alias->base_gfn + alias->npages)
2637 return alias->target_gfn + gfn - alias->base_gfn;
2638 }
2639 return gfn;
2640 }
2641
2642 /*
2643 * Set a new alias region. Aliases map a portion of physical memory into
2644 * another portion. This is useful for memory windows, for example the PC
2645 * VGA region.
2646 */
2647 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
2648 struct kvm_memory_alias *alias)
2649 {
2650 int r, n;
2651 struct kvm_mem_alias *p;
2652 struct kvm_mem_aliases *aliases, *old_aliases;
2653
2654 r = -EINVAL;
2655 /* General sanity checks */
2656 if (alias->memory_size & (PAGE_SIZE - 1))
2657 goto out;
2658 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
2659 goto out;
2660 if (alias->slot >= KVM_ALIAS_SLOTS)
2661 goto out;
2662 if (alias->guest_phys_addr + alias->memory_size
2663 < alias->guest_phys_addr)
2664 goto out;
2665 if (alias->target_phys_addr + alias->memory_size
2666 < alias->target_phys_addr)
2667 goto out;
2668
2669 r = -ENOMEM;
2670 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2671 if (!aliases)
2672 goto out;
2673
2674 mutex_lock(&kvm->slots_lock);
2675
2676 /* invalidate any gfn reference in case of deletion/shrinking */
2677 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2678 aliases->aliases[alias->slot].flags |= KVM_ALIAS_INVALID;
2679 old_aliases = kvm->arch.aliases;
2680 rcu_assign_pointer(kvm->arch.aliases, aliases);
2681 synchronize_srcu_expedited(&kvm->srcu);
2682 kvm_mmu_zap_all(kvm);
2683 kfree(old_aliases);
2684
2685 r = -ENOMEM;
2686 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2687 if (!aliases)
2688 goto out_unlock;
2689
2690 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2691
2692 p = &aliases->aliases[alias->slot];
2693 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2694 p->npages = alias->memory_size >> PAGE_SHIFT;
2695 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2696 p->flags &= ~(KVM_ALIAS_INVALID);
2697
2698 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2699 if (aliases->aliases[n - 1].npages)
2700 break;
2701 aliases->naliases = n;
2702
2703 old_aliases = kvm->arch.aliases;
2704 rcu_assign_pointer(kvm->arch.aliases, aliases);
2705 synchronize_srcu_expedited(&kvm->srcu);
2706 kfree(old_aliases);
2707 r = 0;
2708
2709 out_unlock:
2710 mutex_unlock(&kvm->slots_lock);
2711 out:
2712 return r;
2713 }
2714
2715 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2716 {
2717 int r;
2718
2719 r = 0;
2720 switch (chip->chip_id) {
2721 case KVM_IRQCHIP_PIC_MASTER:
2722 memcpy(&chip->chip.pic,
2723 &pic_irqchip(kvm)->pics[0],
2724 sizeof(struct kvm_pic_state));
2725 break;
2726 case KVM_IRQCHIP_PIC_SLAVE:
2727 memcpy(&chip->chip.pic,
2728 &pic_irqchip(kvm)->pics[1],
2729 sizeof(struct kvm_pic_state));
2730 break;
2731 case KVM_IRQCHIP_IOAPIC:
2732 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2733 break;
2734 default:
2735 r = -EINVAL;
2736 break;
2737 }
2738 return r;
2739 }
2740
2741 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2742 {
2743 int r;
2744
2745 r = 0;
2746 switch (chip->chip_id) {
2747 case KVM_IRQCHIP_PIC_MASTER:
2748 raw_spin_lock(&pic_irqchip(kvm)->lock);
2749 memcpy(&pic_irqchip(kvm)->pics[0],
2750 &chip->chip.pic,
2751 sizeof(struct kvm_pic_state));
2752 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2753 break;
2754 case KVM_IRQCHIP_PIC_SLAVE:
2755 raw_spin_lock(&pic_irqchip(kvm)->lock);
2756 memcpy(&pic_irqchip(kvm)->pics[1],
2757 &chip->chip.pic,
2758 sizeof(struct kvm_pic_state));
2759 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2760 break;
2761 case KVM_IRQCHIP_IOAPIC:
2762 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2763 break;
2764 default:
2765 r = -EINVAL;
2766 break;
2767 }
2768 kvm_pic_update_irq(pic_irqchip(kvm));
2769 return r;
2770 }
2771
2772 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2773 {
2774 int r = 0;
2775
2776 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2777 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2778 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2779 return r;
2780 }
2781
2782 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2783 {
2784 int r = 0;
2785
2786 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2787 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2788 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2789 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2790 return r;
2791 }
2792
2793 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2794 {
2795 int r = 0;
2796
2797 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2798 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2799 sizeof(ps->channels));
2800 ps->flags = kvm->arch.vpit->pit_state.flags;
2801 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2802 return r;
2803 }
2804
2805 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2806 {
2807 int r = 0, start = 0;
2808 u32 prev_legacy, cur_legacy;
2809 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2810 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2811 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2812 if (!prev_legacy && cur_legacy)
2813 start = 1;
2814 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2815 sizeof(kvm->arch.vpit->pit_state.channels));
2816 kvm->arch.vpit->pit_state.flags = ps->flags;
2817 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2818 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2819 return r;
2820 }
2821
2822 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2823 struct kvm_reinject_control *control)
2824 {
2825 if (!kvm->arch.vpit)
2826 return -ENXIO;
2827 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2828 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2829 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2830 return 0;
2831 }
2832
2833 /*
2834 * Get (and clear) the dirty memory log for a memory slot.
2835 */
2836 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2837 struct kvm_dirty_log *log)
2838 {
2839 int r, i;
2840 struct kvm_memory_slot *memslot;
2841 unsigned long n;
2842 unsigned long is_dirty = 0;
2843
2844 mutex_lock(&kvm->slots_lock);
2845
2846 r = -EINVAL;
2847 if (log->slot >= KVM_MEMORY_SLOTS)
2848 goto out;
2849
2850 memslot = &kvm->memslots->memslots[log->slot];
2851 r = -ENOENT;
2852 if (!memslot->dirty_bitmap)
2853 goto out;
2854
2855 n = kvm_dirty_bitmap_bytes(memslot);
2856
2857 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
2858 is_dirty = memslot->dirty_bitmap[i];
2859
2860 /* If nothing is dirty, don't bother messing with page tables. */
2861 if (is_dirty) {
2862 struct kvm_memslots *slots, *old_slots;
2863 unsigned long *dirty_bitmap;
2864
2865 spin_lock(&kvm->mmu_lock);
2866 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2867 spin_unlock(&kvm->mmu_lock);
2868
2869 r = -ENOMEM;
2870 dirty_bitmap = vmalloc(n);
2871 if (!dirty_bitmap)
2872 goto out;
2873 memset(dirty_bitmap, 0, n);
2874
2875 r = -ENOMEM;
2876 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
2877 if (!slots) {
2878 vfree(dirty_bitmap);
2879 goto out;
2880 }
2881 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
2882 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
2883
2884 old_slots = kvm->memslots;
2885 rcu_assign_pointer(kvm->memslots, slots);
2886 synchronize_srcu_expedited(&kvm->srcu);
2887 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
2888 kfree(old_slots);
2889
2890 r = -EFAULT;
2891 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
2892 vfree(dirty_bitmap);
2893 goto out;
2894 }
2895 vfree(dirty_bitmap);
2896 } else {
2897 r = -EFAULT;
2898 if (clear_user(log->dirty_bitmap, n))
2899 goto out;
2900 }
2901
2902 r = 0;
2903 out:
2904 mutex_unlock(&kvm->slots_lock);
2905 return r;
2906 }
2907
2908 long kvm_arch_vm_ioctl(struct file *filp,
2909 unsigned int ioctl, unsigned long arg)
2910 {
2911 struct kvm *kvm = filp->private_data;
2912 void __user *argp = (void __user *)arg;
2913 int r = -ENOTTY;
2914 /*
2915 * This union makes it completely explicit to gcc-3.x
2916 * that these two variables' stack usage should be
2917 * combined, not added together.
2918 */
2919 union {
2920 struct kvm_pit_state ps;
2921 struct kvm_pit_state2 ps2;
2922 struct kvm_memory_alias alias;
2923 struct kvm_pit_config pit_config;
2924 } u;
2925
2926 switch (ioctl) {
2927 case KVM_SET_TSS_ADDR:
2928 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2929 if (r < 0)
2930 goto out;
2931 break;
2932 case KVM_SET_IDENTITY_MAP_ADDR: {
2933 u64 ident_addr;
2934
2935 r = -EFAULT;
2936 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2937 goto out;
2938 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2939 if (r < 0)
2940 goto out;
2941 break;
2942 }
2943 case KVM_SET_MEMORY_REGION: {
2944 struct kvm_memory_region kvm_mem;
2945 struct kvm_userspace_memory_region kvm_userspace_mem;
2946
2947 r = -EFAULT;
2948 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2949 goto out;
2950 kvm_userspace_mem.slot = kvm_mem.slot;
2951 kvm_userspace_mem.flags = kvm_mem.flags;
2952 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2953 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2954 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2955 if (r)
2956 goto out;
2957 break;
2958 }
2959 case KVM_SET_NR_MMU_PAGES:
2960 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2961 if (r)
2962 goto out;
2963 break;
2964 case KVM_GET_NR_MMU_PAGES:
2965 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2966 break;
2967 case KVM_SET_MEMORY_ALIAS:
2968 r = -EFAULT;
2969 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2970 goto out;
2971 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2972 if (r)
2973 goto out;
2974 break;
2975 case KVM_CREATE_IRQCHIP: {
2976 struct kvm_pic *vpic;
2977
2978 mutex_lock(&kvm->lock);
2979 r = -EEXIST;
2980 if (kvm->arch.vpic)
2981 goto create_irqchip_unlock;
2982 r = -ENOMEM;
2983 vpic = kvm_create_pic(kvm);
2984 if (vpic) {
2985 r = kvm_ioapic_init(kvm);
2986 if (r) {
2987 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
2988 &vpic->dev);
2989 kfree(vpic);
2990 goto create_irqchip_unlock;
2991 }
2992 } else
2993 goto create_irqchip_unlock;
2994 smp_wmb();
2995 kvm->arch.vpic = vpic;
2996 smp_wmb();
2997 r = kvm_setup_default_irq_routing(kvm);
2998 if (r) {
2999 mutex_lock(&kvm->irq_lock);
3000 kvm_ioapic_destroy(kvm);
3001 kvm_destroy_pic(kvm);
3002 mutex_unlock(&kvm->irq_lock);
3003 }
3004 create_irqchip_unlock:
3005 mutex_unlock(&kvm->lock);
3006 break;
3007 }
3008 case KVM_CREATE_PIT:
3009 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3010 goto create_pit;
3011 case KVM_CREATE_PIT2:
3012 r = -EFAULT;
3013 if (copy_from_user(&u.pit_config, argp,
3014 sizeof(struct kvm_pit_config)))
3015 goto out;
3016 create_pit:
3017 mutex_lock(&kvm->slots_lock);
3018 r = -EEXIST;
3019 if (kvm->arch.vpit)
3020 goto create_pit_unlock;
3021 r = -ENOMEM;
3022 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3023 if (kvm->arch.vpit)
3024 r = 0;
3025 create_pit_unlock:
3026 mutex_unlock(&kvm->slots_lock);
3027 break;
3028 case KVM_IRQ_LINE_STATUS:
3029 case KVM_IRQ_LINE: {
3030 struct kvm_irq_level irq_event;
3031
3032 r = -EFAULT;
3033 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3034 goto out;
3035 r = -ENXIO;
3036 if (irqchip_in_kernel(kvm)) {
3037 __s32 status;
3038 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3039 irq_event.irq, irq_event.level);
3040 if (ioctl == KVM_IRQ_LINE_STATUS) {
3041 r = -EFAULT;
3042 irq_event.status = status;
3043 if (copy_to_user(argp, &irq_event,
3044 sizeof irq_event))
3045 goto out;
3046 }
3047 r = 0;
3048 }
3049 break;
3050 }
3051 case KVM_GET_IRQCHIP: {
3052 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3053 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3054
3055 r = -ENOMEM;
3056 if (!chip)
3057 goto out;
3058 r = -EFAULT;
3059 if (copy_from_user(chip, argp, sizeof *chip))
3060 goto get_irqchip_out;
3061 r = -ENXIO;
3062 if (!irqchip_in_kernel(kvm))
3063 goto get_irqchip_out;
3064 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3065 if (r)
3066 goto get_irqchip_out;
3067 r = -EFAULT;
3068 if (copy_to_user(argp, chip, sizeof *chip))
3069 goto get_irqchip_out;
3070 r = 0;
3071 get_irqchip_out:
3072 kfree(chip);
3073 if (r)
3074 goto out;
3075 break;
3076 }
3077 case KVM_SET_IRQCHIP: {
3078 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3079 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3080
3081 r = -ENOMEM;
3082 if (!chip)
3083 goto out;
3084 r = -EFAULT;
3085 if (copy_from_user(chip, argp, sizeof *chip))
3086 goto set_irqchip_out;
3087 r = -ENXIO;
3088 if (!irqchip_in_kernel(kvm))
3089 goto set_irqchip_out;
3090 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3091 if (r)
3092 goto set_irqchip_out;
3093 r = 0;
3094 set_irqchip_out:
3095 kfree(chip);
3096 if (r)
3097 goto out;
3098 break;
3099 }
3100 case KVM_GET_PIT: {
3101 r = -EFAULT;
3102 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3103 goto out;
3104 r = -ENXIO;
3105 if (!kvm->arch.vpit)
3106 goto out;
3107 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3108 if (r)
3109 goto out;
3110 r = -EFAULT;
3111 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3112 goto out;
3113 r = 0;
3114 break;
3115 }
3116 case KVM_SET_PIT: {
3117 r = -EFAULT;
3118 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3119 goto out;
3120 r = -ENXIO;
3121 if (!kvm->arch.vpit)
3122 goto out;
3123 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3124 if (r)
3125 goto out;
3126 r = 0;
3127 break;
3128 }
3129 case KVM_GET_PIT2: {
3130 r = -ENXIO;
3131 if (!kvm->arch.vpit)
3132 goto out;
3133 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3134 if (r)
3135 goto out;
3136 r = -EFAULT;
3137 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3138 goto out;
3139 r = 0;
3140 break;
3141 }
3142 case KVM_SET_PIT2: {
3143 r = -EFAULT;
3144 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3145 goto out;
3146 r = -ENXIO;
3147 if (!kvm->arch.vpit)
3148 goto out;
3149 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3150 if (r)
3151 goto out;
3152 r = 0;
3153 break;
3154 }
3155 case KVM_REINJECT_CONTROL: {
3156 struct kvm_reinject_control control;
3157 r = -EFAULT;
3158 if (copy_from_user(&control, argp, sizeof(control)))
3159 goto out;
3160 r = kvm_vm_ioctl_reinject(kvm, &control);
3161 if (r)
3162 goto out;
3163 r = 0;
3164 break;
3165 }
3166 case KVM_XEN_HVM_CONFIG: {
3167 r = -EFAULT;
3168 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3169 sizeof(struct kvm_xen_hvm_config)))
3170 goto out;
3171 r = -EINVAL;
3172 if (kvm->arch.xen_hvm_config.flags)
3173 goto out;
3174 r = 0;
3175 break;
3176 }
3177 case KVM_SET_CLOCK: {
3178 struct timespec now;
3179 struct kvm_clock_data user_ns;
3180 u64 now_ns;
3181 s64 delta;
3182
3183 r = -EFAULT;
3184 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3185 goto out;
3186
3187 r = -EINVAL;
3188 if (user_ns.flags)
3189 goto out;
3190
3191 r = 0;
3192 ktime_get_ts(&now);
3193 now_ns = timespec_to_ns(&now);
3194 delta = user_ns.clock - now_ns;
3195 kvm->arch.kvmclock_offset = delta;
3196 break;
3197 }
3198 case KVM_GET_CLOCK: {
3199 struct timespec now;
3200 struct kvm_clock_data user_ns;
3201 u64 now_ns;
3202
3203 ktime_get_ts(&now);
3204 now_ns = timespec_to_ns(&now);
3205 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3206 user_ns.flags = 0;
3207
3208 r = -EFAULT;
3209 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3210 goto out;
3211 r = 0;
3212 break;
3213 }
3214
3215 default:
3216 ;
3217 }
3218 out:
3219 return r;
3220 }
3221
3222 static void kvm_init_msr_list(void)
3223 {
3224 u32 dummy[2];
3225 unsigned i, j;
3226
3227 /* skip the first msrs in the list. KVM-specific */
3228 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3229 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3230 continue;
3231 if (j < i)
3232 msrs_to_save[j] = msrs_to_save[i];
3233 j++;
3234 }
3235 num_msrs_to_save = j;
3236 }
3237
3238 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3239 const void *v)
3240 {
3241 if (vcpu->arch.apic &&
3242 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3243 return 0;
3244
3245 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3246 }
3247
3248 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3249 {
3250 if (vcpu->arch.apic &&
3251 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3252 return 0;
3253
3254 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3255 }
3256
3257 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3258 struct kvm_segment *var, int seg)
3259 {
3260 kvm_x86_ops->set_segment(vcpu, var, seg);
3261 }
3262
3263 void kvm_get_segment(struct kvm_vcpu *vcpu,
3264 struct kvm_segment *var, int seg)
3265 {
3266 kvm_x86_ops->get_segment(vcpu, var, seg);
3267 }
3268
3269 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3270 {
3271 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3272 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3273 }
3274
3275 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3276 {
3277 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3278 access |= PFERR_FETCH_MASK;
3279 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3280 }
3281
3282 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3283 {
3284 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3285 access |= PFERR_WRITE_MASK;
3286 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3287 }
3288
3289 /* uses this to access any guest's mapped memory without checking CPL */
3290 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3291 {
3292 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error);
3293 }
3294
3295 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3296 struct kvm_vcpu *vcpu, u32 access,
3297 u32 *error)
3298 {
3299 void *data = val;
3300 int r = X86EMUL_CONTINUE;
3301
3302 while (bytes) {
3303 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error);
3304 unsigned offset = addr & (PAGE_SIZE-1);
3305 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3306 int ret;
3307
3308 if (gpa == UNMAPPED_GVA) {
3309 r = X86EMUL_PROPAGATE_FAULT;
3310 goto out;
3311 }
3312 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3313 if (ret < 0) {
3314 r = X86EMUL_IO_NEEDED;
3315 goto out;
3316 }
3317
3318 bytes -= toread;
3319 data += toread;
3320 addr += toread;
3321 }
3322 out:
3323 return r;
3324 }
3325
3326 /* used for instruction fetching */
3327 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3328 struct kvm_vcpu *vcpu, u32 *error)
3329 {
3330 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3331 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3332 access | PFERR_FETCH_MASK, error);
3333 }
3334
3335 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3336 struct kvm_vcpu *vcpu, u32 *error)
3337 {
3338 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3339 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3340 error);
3341 }
3342
3343 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3344 struct kvm_vcpu *vcpu, u32 *error)
3345 {
3346 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3347 }
3348
3349 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3350 unsigned int bytes,
3351 struct kvm_vcpu *vcpu,
3352 u32 *error)
3353 {
3354 void *data = val;
3355 int r = X86EMUL_CONTINUE;
3356
3357 while (bytes) {
3358 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr,
3359 PFERR_WRITE_MASK, error);
3360 unsigned offset = addr & (PAGE_SIZE-1);
3361 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3362 int ret;
3363
3364 if (gpa == UNMAPPED_GVA) {
3365 r = X86EMUL_PROPAGATE_FAULT;
3366 goto out;
3367 }
3368 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3369 if (ret < 0) {
3370 r = X86EMUL_IO_NEEDED;
3371 goto out;
3372 }
3373
3374 bytes -= towrite;
3375 data += towrite;
3376 addr += towrite;
3377 }
3378 out:
3379 return r;
3380 }
3381
3382 static int emulator_read_emulated(unsigned long addr,
3383 void *val,
3384 unsigned int bytes,
3385 unsigned int *error_code,
3386 struct kvm_vcpu *vcpu)
3387 {
3388 gpa_t gpa;
3389
3390 if (vcpu->mmio_read_completed) {
3391 memcpy(val, vcpu->mmio_data, bytes);
3392 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3393 vcpu->mmio_phys_addr, *(u64 *)val);
3394 vcpu->mmio_read_completed = 0;
3395 return X86EMUL_CONTINUE;
3396 }
3397
3398 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3399
3400 if (gpa == UNMAPPED_GVA)
3401 return X86EMUL_PROPAGATE_FAULT;
3402
3403 /* For APIC access vmexit */
3404 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3405 goto mmio;
3406
3407 if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3408 == X86EMUL_CONTINUE)
3409 return X86EMUL_CONTINUE;
3410
3411 mmio:
3412 /*
3413 * Is this MMIO handled locally?
3414 */
3415 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3416 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3417 return X86EMUL_CONTINUE;
3418 }
3419
3420 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3421
3422 vcpu->mmio_needed = 1;
3423 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3424 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3425 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3426 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3427
3428 return X86EMUL_IO_NEEDED;
3429 }
3430
3431 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3432 const void *val, int bytes)
3433 {
3434 int ret;
3435
3436 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3437 if (ret < 0)
3438 return 0;
3439 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3440 return 1;
3441 }
3442
3443 static int emulator_write_emulated_onepage(unsigned long addr,
3444 const void *val,
3445 unsigned int bytes,
3446 unsigned int *error_code,
3447 struct kvm_vcpu *vcpu)
3448 {
3449 gpa_t gpa;
3450
3451 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3452
3453 if (gpa == UNMAPPED_GVA)
3454 return X86EMUL_PROPAGATE_FAULT;
3455
3456 /* For APIC access vmexit */
3457 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3458 goto mmio;
3459
3460 if (emulator_write_phys(vcpu, gpa, val, bytes))
3461 return X86EMUL_CONTINUE;
3462
3463 mmio:
3464 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3465 /*
3466 * Is this MMIO handled locally?
3467 */
3468 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3469 return X86EMUL_CONTINUE;
3470
3471 vcpu->mmio_needed = 1;
3472 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3473 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3474 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3475 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3476 memcpy(vcpu->run->mmio.data, val, bytes);
3477
3478 return X86EMUL_CONTINUE;
3479 }
3480
3481 int emulator_write_emulated(unsigned long addr,
3482 const void *val,
3483 unsigned int bytes,
3484 unsigned int *error_code,
3485 struct kvm_vcpu *vcpu)
3486 {
3487 /* Crossing a page boundary? */
3488 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3489 int rc, now;
3490
3491 now = -addr & ~PAGE_MASK;
3492 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3493 vcpu);
3494 if (rc != X86EMUL_CONTINUE)
3495 return rc;
3496 addr += now;
3497 val += now;
3498 bytes -= now;
3499 }
3500 return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3501 vcpu);
3502 }
3503
3504 #define CMPXCHG_TYPE(t, ptr, old, new) \
3505 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3506
3507 #ifdef CONFIG_X86_64
3508 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3509 #else
3510 # define CMPXCHG64(ptr, old, new) \
3511 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3512 #endif
3513
3514 static int emulator_cmpxchg_emulated(unsigned long addr,
3515 const void *old,
3516 const void *new,
3517 unsigned int bytes,
3518 unsigned int *error_code,
3519 struct kvm_vcpu *vcpu)
3520 {
3521 gpa_t gpa;
3522 struct page *page;
3523 char *kaddr;
3524 bool exchanged;
3525
3526 /* guests cmpxchg8b have to be emulated atomically */
3527 if (bytes > 8 || (bytes & (bytes - 1)))
3528 goto emul_write;
3529
3530 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3531
3532 if (gpa == UNMAPPED_GVA ||
3533 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3534 goto emul_write;
3535
3536 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3537 goto emul_write;
3538
3539 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3540
3541 kaddr = kmap_atomic(page, KM_USER0);
3542 kaddr += offset_in_page(gpa);
3543 switch (bytes) {
3544 case 1:
3545 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3546 break;
3547 case 2:
3548 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3549 break;
3550 case 4:
3551 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3552 break;
3553 case 8:
3554 exchanged = CMPXCHG64(kaddr, old, new);
3555 break;
3556 default:
3557 BUG();
3558 }
3559 kunmap_atomic(kaddr, KM_USER0);
3560 kvm_release_page_dirty(page);
3561
3562 if (!exchanged)
3563 return X86EMUL_CMPXCHG_FAILED;
3564
3565 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3566
3567 return X86EMUL_CONTINUE;
3568
3569 emul_write:
3570 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3571
3572 return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3573 }
3574
3575 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3576 {
3577 /* TODO: String I/O for in kernel device */
3578 int r;
3579
3580 if (vcpu->arch.pio.in)
3581 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3582 vcpu->arch.pio.size, pd);
3583 else
3584 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3585 vcpu->arch.pio.port, vcpu->arch.pio.size,
3586 pd);
3587 return r;
3588 }
3589
3590
3591 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3592 unsigned int count, struct kvm_vcpu *vcpu)
3593 {
3594 if (vcpu->arch.pio.count)
3595 goto data_avail;
3596
3597 trace_kvm_pio(1, port, size, 1);
3598
3599 vcpu->arch.pio.port = port;
3600 vcpu->arch.pio.in = 1;
3601 vcpu->arch.pio.count = count;
3602 vcpu->arch.pio.size = size;
3603
3604 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3605 data_avail:
3606 memcpy(val, vcpu->arch.pio_data, size * count);
3607 vcpu->arch.pio.count = 0;
3608 return 1;
3609 }
3610
3611 vcpu->run->exit_reason = KVM_EXIT_IO;
3612 vcpu->run->io.direction = KVM_EXIT_IO_IN;
3613 vcpu->run->io.size = size;
3614 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3615 vcpu->run->io.count = count;
3616 vcpu->run->io.port = port;
3617
3618 return 0;
3619 }
3620
3621 static int emulator_pio_out_emulated(int size, unsigned short port,
3622 const void *val, unsigned int count,
3623 struct kvm_vcpu *vcpu)
3624 {
3625 trace_kvm_pio(0, port, size, 1);
3626
3627 vcpu->arch.pio.port = port;
3628 vcpu->arch.pio.in = 0;
3629 vcpu->arch.pio.count = count;
3630 vcpu->arch.pio.size = size;
3631
3632 memcpy(vcpu->arch.pio_data, val, size * count);
3633
3634 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3635 vcpu->arch.pio.count = 0;
3636 return 1;
3637 }
3638
3639 vcpu->run->exit_reason = KVM_EXIT_IO;
3640 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3641 vcpu->run->io.size = size;
3642 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3643 vcpu->run->io.count = count;
3644 vcpu->run->io.port = port;
3645
3646 return 0;
3647 }
3648
3649 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3650 {
3651 return kvm_x86_ops->get_segment_base(vcpu, seg);
3652 }
3653
3654 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3655 {
3656 kvm_mmu_invlpg(vcpu, address);
3657 return X86EMUL_CONTINUE;
3658 }
3659
3660 int emulate_clts(struct kvm_vcpu *vcpu)
3661 {
3662 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3663 kvm_x86_ops->fpu_activate(vcpu);
3664 return X86EMUL_CONTINUE;
3665 }
3666
3667 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
3668 {
3669 return _kvm_get_dr(vcpu, dr, dest);
3670 }
3671
3672 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
3673 {
3674
3675 return __kvm_set_dr(vcpu, dr, value);
3676 }
3677
3678 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3679 {
3680 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3681 }
3682
3683 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3684 {
3685 unsigned long value;
3686
3687 switch (cr) {
3688 case 0:
3689 value = kvm_read_cr0(vcpu);
3690 break;
3691 case 2:
3692 value = vcpu->arch.cr2;
3693 break;
3694 case 3:
3695 value = vcpu->arch.cr3;
3696 break;
3697 case 4:
3698 value = kvm_read_cr4(vcpu);
3699 break;
3700 case 8:
3701 value = kvm_get_cr8(vcpu);
3702 break;
3703 default:
3704 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3705 return 0;
3706 }
3707
3708 return value;
3709 }
3710
3711 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
3712 {
3713 int res = 0;
3714
3715 switch (cr) {
3716 case 0:
3717 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3718 break;
3719 case 2:
3720 vcpu->arch.cr2 = val;
3721 break;
3722 case 3:
3723 res = kvm_set_cr3(vcpu, val);
3724 break;
3725 case 4:
3726 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3727 break;
3728 case 8:
3729 res = __kvm_set_cr8(vcpu, val & 0xfUL);
3730 break;
3731 default:
3732 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3733 res = -1;
3734 }
3735
3736 return res;
3737 }
3738
3739 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
3740 {
3741 return kvm_x86_ops->get_cpl(vcpu);
3742 }
3743
3744 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3745 {
3746 kvm_x86_ops->get_gdt(vcpu, dt);
3747 }
3748
3749 static unsigned long emulator_get_cached_segment_base(int seg,
3750 struct kvm_vcpu *vcpu)
3751 {
3752 return get_segment_base(vcpu, seg);
3753 }
3754
3755 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
3756 struct kvm_vcpu *vcpu)
3757 {
3758 struct kvm_segment var;
3759
3760 kvm_get_segment(vcpu, &var, seg);
3761
3762 if (var.unusable)
3763 return false;
3764
3765 if (var.g)
3766 var.limit >>= 12;
3767 set_desc_limit(desc, var.limit);
3768 set_desc_base(desc, (unsigned long)var.base);
3769 desc->type = var.type;
3770 desc->s = var.s;
3771 desc->dpl = var.dpl;
3772 desc->p = var.present;
3773 desc->avl = var.avl;
3774 desc->l = var.l;
3775 desc->d = var.db;
3776 desc->g = var.g;
3777
3778 return true;
3779 }
3780
3781 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
3782 struct kvm_vcpu *vcpu)
3783 {
3784 struct kvm_segment var;
3785
3786 /* needed to preserve selector */
3787 kvm_get_segment(vcpu, &var, seg);
3788
3789 var.base = get_desc_base(desc);
3790 var.limit = get_desc_limit(desc);
3791 if (desc->g)
3792 var.limit = (var.limit << 12) | 0xfff;
3793 var.type = desc->type;
3794 var.present = desc->p;
3795 var.dpl = desc->dpl;
3796 var.db = desc->d;
3797 var.s = desc->s;
3798 var.l = desc->l;
3799 var.g = desc->g;
3800 var.avl = desc->avl;
3801 var.present = desc->p;
3802 var.unusable = !var.present;
3803 var.padding = 0;
3804
3805 kvm_set_segment(vcpu, &var, seg);
3806 return;
3807 }
3808
3809 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
3810 {
3811 struct kvm_segment kvm_seg;
3812
3813 kvm_get_segment(vcpu, &kvm_seg, seg);
3814 return kvm_seg.selector;
3815 }
3816
3817 static void emulator_set_segment_selector(u16 sel, int seg,
3818 struct kvm_vcpu *vcpu)
3819 {
3820 struct kvm_segment kvm_seg;
3821
3822 kvm_get_segment(vcpu, &kvm_seg, seg);
3823 kvm_seg.selector = sel;
3824 kvm_set_segment(vcpu, &kvm_seg, seg);
3825 }
3826
3827 static struct x86_emulate_ops emulate_ops = {
3828 .read_std = kvm_read_guest_virt_system,
3829 .write_std = kvm_write_guest_virt_system,
3830 .fetch = kvm_fetch_guest_virt,
3831 .read_emulated = emulator_read_emulated,
3832 .write_emulated = emulator_write_emulated,
3833 .cmpxchg_emulated = emulator_cmpxchg_emulated,
3834 .pio_in_emulated = emulator_pio_in_emulated,
3835 .pio_out_emulated = emulator_pio_out_emulated,
3836 .get_cached_descriptor = emulator_get_cached_descriptor,
3837 .set_cached_descriptor = emulator_set_cached_descriptor,
3838 .get_segment_selector = emulator_get_segment_selector,
3839 .set_segment_selector = emulator_set_segment_selector,
3840 .get_cached_segment_base = emulator_get_cached_segment_base,
3841 .get_gdt = emulator_get_gdt,
3842 .get_cr = emulator_get_cr,
3843 .set_cr = emulator_set_cr,
3844 .cpl = emulator_get_cpl,
3845 .get_dr = emulator_get_dr,
3846 .set_dr = emulator_set_dr,
3847 .set_msr = kvm_set_msr,
3848 .get_msr = kvm_get_msr,
3849 };
3850
3851 static void cache_all_regs(struct kvm_vcpu *vcpu)
3852 {
3853 kvm_register_read(vcpu, VCPU_REGS_RAX);
3854 kvm_register_read(vcpu, VCPU_REGS_RSP);
3855 kvm_register_read(vcpu, VCPU_REGS_RIP);
3856 vcpu->arch.regs_dirty = ~0;
3857 }
3858
3859 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
3860 {
3861 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
3862 /*
3863 * an sti; sti; sequence only disable interrupts for the first
3864 * instruction. So, if the last instruction, be it emulated or
3865 * not, left the system with the INT_STI flag enabled, it
3866 * means that the last instruction is an sti. We should not
3867 * leave the flag on in this case. The same goes for mov ss
3868 */
3869 if (!(int_shadow & mask))
3870 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
3871 }
3872
3873 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
3874 {
3875 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
3876 if (ctxt->exception == PF_VECTOR)
3877 kvm_inject_page_fault(vcpu, ctxt->cr2, ctxt->error_code);
3878 else if (ctxt->error_code_valid)
3879 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
3880 else
3881 kvm_queue_exception(vcpu, ctxt->exception);
3882 }
3883
3884 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
3885 {
3886 ++vcpu->stat.insn_emulation_fail;
3887 trace_kvm_emulate_insn_failed(vcpu);
3888 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
3889 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
3890 vcpu->run->internal.ndata = 0;
3891 kvm_queue_exception(vcpu, UD_VECTOR);
3892 return EMULATE_FAIL;
3893 }
3894
3895 int emulate_instruction(struct kvm_vcpu *vcpu,
3896 unsigned long cr2,
3897 u16 error_code,
3898 int emulation_type)
3899 {
3900 int r;
3901 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
3902
3903 kvm_clear_exception_queue(vcpu);
3904 vcpu->arch.mmio_fault_cr2 = cr2;
3905 /*
3906 * TODO: fix emulate.c to use guest_read/write_register
3907 * instead of direct ->regs accesses, can save hundred cycles
3908 * on Intel for instructions that don't read/change RSP, for
3909 * for example.
3910 */
3911 cache_all_regs(vcpu);
3912
3913 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
3914 int cs_db, cs_l;
3915 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3916
3917 vcpu->arch.emulate_ctxt.vcpu = vcpu;
3918 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
3919 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
3920 vcpu->arch.emulate_ctxt.mode =
3921 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
3922 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
3923 ? X86EMUL_MODE_VM86 : cs_l
3924 ? X86EMUL_MODE_PROT64 : cs_db
3925 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
3926 memset(c, 0, sizeof(struct decode_cache));
3927 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
3928 vcpu->arch.emulate_ctxt.interruptibility = 0;
3929 vcpu->arch.emulate_ctxt.exception = -1;
3930
3931 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3932 trace_kvm_emulate_insn_start(vcpu);
3933
3934 /* Only allow emulation of specific instructions on #UD
3935 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3936 if (emulation_type & EMULTYPE_TRAP_UD) {
3937 if (!c->twobyte)
3938 return EMULATE_FAIL;
3939 switch (c->b) {
3940 case 0x01: /* VMMCALL */
3941 if (c->modrm_mod != 3 || c->modrm_rm != 1)
3942 return EMULATE_FAIL;
3943 break;
3944 case 0x34: /* sysenter */
3945 case 0x35: /* sysexit */
3946 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3947 return EMULATE_FAIL;
3948 break;
3949 case 0x05: /* syscall */
3950 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3951 return EMULATE_FAIL;
3952 break;
3953 default:
3954 return EMULATE_FAIL;
3955 }
3956
3957 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
3958 return EMULATE_FAIL;
3959 }
3960
3961 ++vcpu->stat.insn_emulation;
3962 if (r) {
3963 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3964 return EMULATE_DONE;
3965 if (emulation_type & EMULTYPE_SKIP)
3966 return EMULATE_FAIL;
3967 return handle_emulation_failure(vcpu);
3968 }
3969 }
3970
3971 if (emulation_type & EMULTYPE_SKIP) {
3972 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
3973 return EMULATE_DONE;
3974 }
3975
3976 /* this is needed for vmware backdor interface to work since it
3977 changes registers values during IO operation */
3978 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
3979
3980 restart:
3981 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3982
3983 if (r) { /* emulation failed */
3984 /*
3985 * if emulation was due to access to shadowed page table
3986 * and it failed try to unshadow page and re-entetr the
3987 * guest to let CPU execute the instruction.
3988 */
3989 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3990 return EMULATE_DONE;
3991
3992 return handle_emulation_failure(vcpu);
3993 }
3994
3995 toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
3996 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
3997 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
3998 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
3999
4000 if (vcpu->arch.emulate_ctxt.exception >= 0) {
4001 inject_emulated_exception(vcpu);
4002 return EMULATE_DONE;
4003 }
4004
4005 if (vcpu->arch.pio.count) {
4006 if (!vcpu->arch.pio.in)
4007 vcpu->arch.pio.count = 0;
4008 return EMULATE_DO_MMIO;
4009 }
4010
4011 if (vcpu->mmio_needed) {
4012 if (vcpu->mmio_is_write)
4013 vcpu->mmio_needed = 0;
4014 return EMULATE_DO_MMIO;
4015 }
4016
4017 if (vcpu->arch.emulate_ctxt.restart)
4018 goto restart;
4019
4020 return EMULATE_DONE;
4021 }
4022 EXPORT_SYMBOL_GPL(emulate_instruction);
4023
4024 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4025 {
4026 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4027 int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4028 /* do not return to emulator after return from userspace */
4029 vcpu->arch.pio.count = 0;
4030 return ret;
4031 }
4032 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4033
4034 static void bounce_off(void *info)
4035 {
4036 /* nothing */
4037 }
4038
4039 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4040 void *data)
4041 {
4042 struct cpufreq_freqs *freq = data;
4043 struct kvm *kvm;
4044 struct kvm_vcpu *vcpu;
4045 int i, send_ipi = 0;
4046
4047 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4048 return 0;
4049 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4050 return 0;
4051 per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
4052
4053 spin_lock(&kvm_lock);
4054 list_for_each_entry(kvm, &vm_list, vm_list) {
4055 kvm_for_each_vcpu(i, vcpu, kvm) {
4056 if (vcpu->cpu != freq->cpu)
4057 continue;
4058 if (!kvm_request_guest_time_update(vcpu))
4059 continue;
4060 if (vcpu->cpu != smp_processor_id())
4061 send_ipi++;
4062 }
4063 }
4064 spin_unlock(&kvm_lock);
4065
4066 if (freq->old < freq->new && send_ipi) {
4067 /*
4068 * We upscale the frequency. Must make the guest
4069 * doesn't see old kvmclock values while running with
4070 * the new frequency, otherwise we risk the guest sees
4071 * time go backwards.
4072 *
4073 * In case we update the frequency for another cpu
4074 * (which might be in guest context) send an interrupt
4075 * to kick the cpu out of guest context. Next time
4076 * guest context is entered kvmclock will be updated,
4077 * so the guest will not see stale values.
4078 */
4079 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
4080 }
4081 return 0;
4082 }
4083
4084 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4085 .notifier_call = kvmclock_cpufreq_notifier
4086 };
4087
4088 static void kvm_timer_init(void)
4089 {
4090 int cpu;
4091
4092 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4093 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4094 CPUFREQ_TRANSITION_NOTIFIER);
4095 for_each_online_cpu(cpu) {
4096 unsigned long khz = cpufreq_get(cpu);
4097 if (!khz)
4098 khz = tsc_khz;
4099 per_cpu(cpu_tsc_khz, cpu) = khz;
4100 }
4101 } else {
4102 for_each_possible_cpu(cpu)
4103 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
4104 }
4105 }
4106
4107 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4108
4109 static int kvm_is_in_guest(void)
4110 {
4111 return percpu_read(current_vcpu) != NULL;
4112 }
4113
4114 static int kvm_is_user_mode(void)
4115 {
4116 int user_mode = 3;
4117
4118 if (percpu_read(current_vcpu))
4119 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4120
4121 return user_mode != 0;
4122 }
4123
4124 static unsigned long kvm_get_guest_ip(void)
4125 {
4126 unsigned long ip = 0;
4127
4128 if (percpu_read(current_vcpu))
4129 ip = kvm_rip_read(percpu_read(current_vcpu));
4130
4131 return ip;
4132 }
4133
4134 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4135 .is_in_guest = kvm_is_in_guest,
4136 .is_user_mode = kvm_is_user_mode,
4137 .get_guest_ip = kvm_get_guest_ip,
4138 };
4139
4140 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4141 {
4142 percpu_write(current_vcpu, vcpu);
4143 }
4144 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4145
4146 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4147 {
4148 percpu_write(current_vcpu, NULL);
4149 }
4150 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4151
4152 int kvm_arch_init(void *opaque)
4153 {
4154 int r;
4155 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4156
4157 if (kvm_x86_ops) {
4158 printk(KERN_ERR "kvm: already loaded the other module\n");
4159 r = -EEXIST;
4160 goto out;
4161 }
4162
4163 if (!ops->cpu_has_kvm_support()) {
4164 printk(KERN_ERR "kvm: no hardware support\n");
4165 r = -EOPNOTSUPP;
4166 goto out;
4167 }
4168 if (ops->disabled_by_bios()) {
4169 printk(KERN_ERR "kvm: disabled by bios\n");
4170 r = -EOPNOTSUPP;
4171 goto out;
4172 }
4173
4174 r = kvm_mmu_module_init();
4175 if (r)
4176 goto out;
4177
4178 kvm_init_msr_list();
4179
4180 kvm_x86_ops = ops;
4181 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4182 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4183 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4184 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4185
4186 kvm_timer_init();
4187
4188 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4189
4190 if (cpu_has_xsave)
4191 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4192
4193 return 0;
4194
4195 out:
4196 return r;
4197 }
4198
4199 void kvm_arch_exit(void)
4200 {
4201 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4202
4203 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4204 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4205 CPUFREQ_TRANSITION_NOTIFIER);
4206 kvm_x86_ops = NULL;
4207 kvm_mmu_module_exit();
4208 }
4209
4210 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4211 {
4212 ++vcpu->stat.halt_exits;
4213 if (irqchip_in_kernel(vcpu->kvm)) {
4214 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4215 return 1;
4216 } else {
4217 vcpu->run->exit_reason = KVM_EXIT_HLT;
4218 return 0;
4219 }
4220 }
4221 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4222
4223 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4224 unsigned long a1)
4225 {
4226 if (is_long_mode(vcpu))
4227 return a0;
4228 else
4229 return a0 | ((gpa_t)a1 << 32);
4230 }
4231
4232 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4233 {
4234 u64 param, ingpa, outgpa, ret;
4235 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4236 bool fast, longmode;
4237 int cs_db, cs_l;
4238
4239 /*
4240 * hypercall generates UD from non zero cpl and real mode
4241 * per HYPER-V spec
4242 */
4243 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4244 kvm_queue_exception(vcpu, UD_VECTOR);
4245 return 0;
4246 }
4247
4248 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4249 longmode = is_long_mode(vcpu) && cs_l == 1;
4250
4251 if (!longmode) {
4252 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4253 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4254 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4255 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4256 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4257 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4258 }
4259 #ifdef CONFIG_X86_64
4260 else {
4261 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4262 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4263 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4264 }
4265 #endif
4266
4267 code = param & 0xffff;
4268 fast = (param >> 16) & 0x1;
4269 rep_cnt = (param >> 32) & 0xfff;
4270 rep_idx = (param >> 48) & 0xfff;
4271
4272 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4273
4274 switch (code) {
4275 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4276 kvm_vcpu_on_spin(vcpu);
4277 break;
4278 default:
4279 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4280 break;
4281 }
4282
4283 ret = res | (((u64)rep_done & 0xfff) << 32);
4284 if (longmode) {
4285 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4286 } else {
4287 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4288 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4289 }
4290
4291 return 1;
4292 }
4293
4294 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4295 {
4296 unsigned long nr, a0, a1, a2, a3, ret;
4297 int r = 1;
4298
4299 if (kvm_hv_hypercall_enabled(vcpu->kvm))
4300 return kvm_hv_hypercall(vcpu);
4301
4302 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4303 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4304 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4305 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4306 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4307
4308 trace_kvm_hypercall(nr, a0, a1, a2, a3);
4309
4310 if (!is_long_mode(vcpu)) {
4311 nr &= 0xFFFFFFFF;
4312 a0 &= 0xFFFFFFFF;
4313 a1 &= 0xFFFFFFFF;
4314 a2 &= 0xFFFFFFFF;
4315 a3 &= 0xFFFFFFFF;
4316 }
4317
4318 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4319 ret = -KVM_EPERM;
4320 goto out;
4321 }
4322
4323 switch (nr) {
4324 case KVM_HC_VAPIC_POLL_IRQ:
4325 ret = 0;
4326 break;
4327 case KVM_HC_MMU_OP:
4328 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4329 break;
4330 default:
4331 ret = -KVM_ENOSYS;
4332 break;
4333 }
4334 out:
4335 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4336 ++vcpu->stat.hypercalls;
4337 return r;
4338 }
4339 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4340
4341 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4342 {
4343 char instruction[3];
4344 unsigned long rip = kvm_rip_read(vcpu);
4345
4346 /*
4347 * Blow out the MMU to ensure that no other VCPU has an active mapping
4348 * to ensure that the updated hypercall appears atomically across all
4349 * VCPUs.
4350 */
4351 kvm_mmu_zap_all(vcpu->kvm);
4352
4353 kvm_x86_ops->patch_hypercall(vcpu, instruction);
4354
4355 return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4356 }
4357
4358 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4359 {
4360 struct desc_ptr dt = { limit, base };
4361
4362 kvm_x86_ops->set_gdt(vcpu, &dt);
4363 }
4364
4365 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4366 {
4367 struct desc_ptr dt = { limit, base };
4368
4369 kvm_x86_ops->set_idt(vcpu, &dt);
4370 }
4371
4372 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4373 {
4374 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4375 int j, nent = vcpu->arch.cpuid_nent;
4376
4377 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4378 /* when no next entry is found, the current entry[i] is reselected */
4379 for (j = i + 1; ; j = (j + 1) % nent) {
4380 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4381 if (ej->function == e->function) {
4382 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4383 return j;
4384 }
4385 }
4386 return 0; /* silence gcc, even though control never reaches here */
4387 }
4388
4389 /* find an entry with matching function, matching index (if needed), and that
4390 * should be read next (if it's stateful) */
4391 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4392 u32 function, u32 index)
4393 {
4394 if (e->function != function)
4395 return 0;
4396 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4397 return 0;
4398 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4399 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4400 return 0;
4401 return 1;
4402 }
4403
4404 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4405 u32 function, u32 index)
4406 {
4407 int i;
4408 struct kvm_cpuid_entry2 *best = NULL;
4409
4410 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4411 struct kvm_cpuid_entry2 *e;
4412
4413 e = &vcpu->arch.cpuid_entries[i];
4414 if (is_matching_cpuid_entry(e, function, index)) {
4415 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4416 move_to_next_stateful_cpuid_entry(vcpu, i);
4417 best = e;
4418 break;
4419 }
4420 /*
4421 * Both basic or both extended?
4422 */
4423 if (((e->function ^ function) & 0x80000000) == 0)
4424 if (!best || e->function > best->function)
4425 best = e;
4426 }
4427 return best;
4428 }
4429 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4430
4431 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4432 {
4433 struct kvm_cpuid_entry2 *best;
4434
4435 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4436 if (!best || best->eax < 0x80000008)
4437 goto not_found;
4438 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4439 if (best)
4440 return best->eax & 0xff;
4441 not_found:
4442 return 36;
4443 }
4444
4445 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4446 {
4447 u32 function, index;
4448 struct kvm_cpuid_entry2 *best;
4449
4450 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4451 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4452 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4453 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4454 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4455 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4456 best = kvm_find_cpuid_entry(vcpu, function, index);
4457 if (best) {
4458 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4459 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4460 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4461 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4462 }
4463 kvm_x86_ops->skip_emulated_instruction(vcpu);
4464 trace_kvm_cpuid(function,
4465 kvm_register_read(vcpu, VCPU_REGS_RAX),
4466 kvm_register_read(vcpu, VCPU_REGS_RBX),
4467 kvm_register_read(vcpu, VCPU_REGS_RCX),
4468 kvm_register_read(vcpu, VCPU_REGS_RDX));
4469 }
4470 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4471
4472 /*
4473 * Check if userspace requested an interrupt window, and that the
4474 * interrupt window is open.
4475 *
4476 * No need to exit to userspace if we already have an interrupt queued.
4477 */
4478 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4479 {
4480 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4481 vcpu->run->request_interrupt_window &&
4482 kvm_arch_interrupt_allowed(vcpu));
4483 }
4484
4485 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4486 {
4487 struct kvm_run *kvm_run = vcpu->run;
4488
4489 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4490 kvm_run->cr8 = kvm_get_cr8(vcpu);
4491 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4492 if (irqchip_in_kernel(vcpu->kvm))
4493 kvm_run->ready_for_interrupt_injection = 1;
4494 else
4495 kvm_run->ready_for_interrupt_injection =
4496 kvm_arch_interrupt_allowed(vcpu) &&
4497 !kvm_cpu_has_interrupt(vcpu) &&
4498 !kvm_event_needs_reinjection(vcpu);
4499 }
4500
4501 static void vapic_enter(struct kvm_vcpu *vcpu)
4502 {
4503 struct kvm_lapic *apic = vcpu->arch.apic;
4504 struct page *page;
4505
4506 if (!apic || !apic->vapic_addr)
4507 return;
4508
4509 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4510
4511 vcpu->arch.apic->vapic_page = page;
4512 }
4513
4514 static void vapic_exit(struct kvm_vcpu *vcpu)
4515 {
4516 struct kvm_lapic *apic = vcpu->arch.apic;
4517 int idx;
4518
4519 if (!apic || !apic->vapic_addr)
4520 return;
4521
4522 idx = srcu_read_lock(&vcpu->kvm->srcu);
4523 kvm_release_page_dirty(apic->vapic_page);
4524 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4525 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4526 }
4527
4528 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4529 {
4530 int max_irr, tpr;
4531
4532 if (!kvm_x86_ops->update_cr8_intercept)
4533 return;
4534
4535 if (!vcpu->arch.apic)
4536 return;
4537
4538 if (!vcpu->arch.apic->vapic_addr)
4539 max_irr = kvm_lapic_find_highest_irr(vcpu);
4540 else
4541 max_irr = -1;
4542
4543 if (max_irr != -1)
4544 max_irr >>= 4;
4545
4546 tpr = kvm_lapic_get_cr8(vcpu);
4547
4548 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4549 }
4550
4551 static void inject_pending_event(struct kvm_vcpu *vcpu)
4552 {
4553 /* try to reinject previous events if any */
4554 if (vcpu->arch.exception.pending) {
4555 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4556 vcpu->arch.exception.has_error_code,
4557 vcpu->arch.exception.error_code);
4558 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4559 vcpu->arch.exception.has_error_code,
4560 vcpu->arch.exception.error_code,
4561 vcpu->arch.exception.reinject);
4562 return;
4563 }
4564
4565 if (vcpu->arch.nmi_injected) {
4566 kvm_x86_ops->set_nmi(vcpu);
4567 return;
4568 }
4569
4570 if (vcpu->arch.interrupt.pending) {
4571 kvm_x86_ops->set_irq(vcpu);
4572 return;
4573 }
4574
4575 /* try to inject new event if pending */
4576 if (vcpu->arch.nmi_pending) {
4577 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4578 vcpu->arch.nmi_pending = false;
4579 vcpu->arch.nmi_injected = true;
4580 kvm_x86_ops->set_nmi(vcpu);
4581 }
4582 } else if (kvm_cpu_has_interrupt(vcpu)) {
4583 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4584 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4585 false);
4586 kvm_x86_ops->set_irq(vcpu);
4587 }
4588 }
4589 }
4590
4591 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
4592 {
4593 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
4594 !vcpu->guest_xcr0_loaded) {
4595 /* kvm_set_xcr() also depends on this */
4596 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
4597 vcpu->guest_xcr0_loaded = 1;
4598 }
4599 }
4600
4601 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
4602 {
4603 if (vcpu->guest_xcr0_loaded) {
4604 if (vcpu->arch.xcr0 != host_xcr0)
4605 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
4606 vcpu->guest_xcr0_loaded = 0;
4607 }
4608 }
4609
4610 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4611 {
4612 int r;
4613 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4614 vcpu->run->request_interrupt_window;
4615
4616 if (vcpu->requests)
4617 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
4618 kvm_mmu_unload(vcpu);
4619
4620 r = kvm_mmu_reload(vcpu);
4621 if (unlikely(r))
4622 goto out;
4623
4624 if (vcpu->requests) {
4625 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
4626 __kvm_migrate_timers(vcpu);
4627 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
4628 kvm_write_guest_time(vcpu);
4629 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
4630 kvm_mmu_sync_roots(vcpu);
4631 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
4632 kvm_x86_ops->tlb_flush(vcpu);
4633 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
4634 &vcpu->requests)) {
4635 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4636 r = 0;
4637 goto out;
4638 }
4639 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
4640 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4641 r = 0;
4642 goto out;
4643 }
4644 if (test_and_clear_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests)) {
4645 vcpu->fpu_active = 0;
4646 kvm_x86_ops->fpu_deactivate(vcpu);
4647 }
4648 }
4649
4650 preempt_disable();
4651
4652 kvm_x86_ops->prepare_guest_switch(vcpu);
4653 if (vcpu->fpu_active)
4654 kvm_load_guest_fpu(vcpu);
4655 kvm_load_guest_xcr0(vcpu);
4656
4657 atomic_set(&vcpu->guest_mode, 1);
4658 smp_wmb();
4659
4660 local_irq_disable();
4661
4662 if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
4663 || need_resched() || signal_pending(current)) {
4664 atomic_set(&vcpu->guest_mode, 0);
4665 smp_wmb();
4666 local_irq_enable();
4667 preempt_enable();
4668 r = 1;
4669 goto out;
4670 }
4671
4672 inject_pending_event(vcpu);
4673
4674 /* enable NMI/IRQ window open exits if needed */
4675 if (vcpu->arch.nmi_pending)
4676 kvm_x86_ops->enable_nmi_window(vcpu);
4677 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4678 kvm_x86_ops->enable_irq_window(vcpu);
4679
4680 if (kvm_lapic_enabled(vcpu)) {
4681 update_cr8_intercept(vcpu);
4682 kvm_lapic_sync_to_vapic(vcpu);
4683 }
4684
4685 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4686
4687 kvm_guest_enter();
4688
4689 if (unlikely(vcpu->arch.switch_db_regs)) {
4690 set_debugreg(0, 7);
4691 set_debugreg(vcpu->arch.eff_db[0], 0);
4692 set_debugreg(vcpu->arch.eff_db[1], 1);
4693 set_debugreg(vcpu->arch.eff_db[2], 2);
4694 set_debugreg(vcpu->arch.eff_db[3], 3);
4695 }
4696
4697 trace_kvm_entry(vcpu->vcpu_id);
4698 kvm_x86_ops->run(vcpu);
4699
4700 /*
4701 * If the guest has used debug registers, at least dr7
4702 * will be disabled while returning to the host.
4703 * If we don't have active breakpoints in the host, we don't
4704 * care about the messed up debug address registers. But if
4705 * we have some of them active, restore the old state.
4706 */
4707 if (hw_breakpoint_active())
4708 hw_breakpoint_restore();
4709
4710 atomic_set(&vcpu->guest_mode, 0);
4711 smp_wmb();
4712 local_irq_enable();
4713
4714 ++vcpu->stat.exits;
4715
4716 /*
4717 * We must have an instruction between local_irq_enable() and
4718 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4719 * the interrupt shadow. The stat.exits increment will do nicely.
4720 * But we need to prevent reordering, hence this barrier():
4721 */
4722 barrier();
4723
4724 kvm_guest_exit();
4725
4726 preempt_enable();
4727
4728 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4729
4730 /*
4731 * Profile KVM exit RIPs:
4732 */
4733 if (unlikely(prof_on == KVM_PROFILING)) {
4734 unsigned long rip = kvm_rip_read(vcpu);
4735 profile_hit(KVM_PROFILING, (void *)rip);
4736 }
4737
4738
4739 kvm_lapic_sync_from_vapic(vcpu);
4740
4741 r = kvm_x86_ops->handle_exit(vcpu);
4742 out:
4743 return r;
4744 }
4745
4746
4747 static int __vcpu_run(struct kvm_vcpu *vcpu)
4748 {
4749 int r;
4750 struct kvm *kvm = vcpu->kvm;
4751
4752 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
4753 pr_debug("vcpu %d received sipi with vector # %x\n",
4754 vcpu->vcpu_id, vcpu->arch.sipi_vector);
4755 kvm_lapic_reset(vcpu);
4756 r = kvm_arch_vcpu_reset(vcpu);
4757 if (r)
4758 return r;
4759 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4760 }
4761
4762 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4763 vapic_enter(vcpu);
4764
4765 r = 1;
4766 while (r > 0) {
4767 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
4768 r = vcpu_enter_guest(vcpu);
4769 else {
4770 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4771 kvm_vcpu_block(vcpu);
4772 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4773 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
4774 {
4775 switch(vcpu->arch.mp_state) {
4776 case KVM_MP_STATE_HALTED:
4777 vcpu->arch.mp_state =
4778 KVM_MP_STATE_RUNNABLE;
4779 case KVM_MP_STATE_RUNNABLE:
4780 break;
4781 case KVM_MP_STATE_SIPI_RECEIVED:
4782 default:
4783 r = -EINTR;
4784 break;
4785 }
4786 }
4787 }
4788
4789 if (r <= 0)
4790 break;
4791
4792 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
4793 if (kvm_cpu_has_pending_timer(vcpu))
4794 kvm_inject_pending_timer_irqs(vcpu);
4795
4796 if (dm_request_for_irq_injection(vcpu)) {
4797 r = -EINTR;
4798 vcpu->run->exit_reason = KVM_EXIT_INTR;
4799 ++vcpu->stat.request_irq_exits;
4800 }
4801 if (signal_pending(current)) {
4802 r = -EINTR;
4803 vcpu->run->exit_reason = KVM_EXIT_INTR;
4804 ++vcpu->stat.signal_exits;
4805 }
4806 if (need_resched()) {
4807 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4808 kvm_resched(vcpu);
4809 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4810 }
4811 }
4812
4813 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4814
4815 vapic_exit(vcpu);
4816
4817 return r;
4818 }
4819
4820 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
4821 {
4822 int r;
4823 sigset_t sigsaved;
4824
4825 if (vcpu->sigset_active)
4826 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
4827
4828 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
4829 kvm_vcpu_block(vcpu);
4830 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
4831 r = -EAGAIN;
4832 goto out;
4833 }
4834
4835 /* re-sync apic's tpr */
4836 if (!irqchip_in_kernel(vcpu->kvm))
4837 kvm_set_cr8(vcpu, kvm_run->cr8);
4838
4839 if (vcpu->arch.pio.count || vcpu->mmio_needed ||
4840 vcpu->arch.emulate_ctxt.restart) {
4841 if (vcpu->mmio_needed) {
4842 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
4843 vcpu->mmio_read_completed = 1;
4844 vcpu->mmio_needed = 0;
4845 }
4846 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4847 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
4848 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4849 if (r != EMULATE_DONE) {
4850 r = 0;
4851 goto out;
4852 }
4853 }
4854 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
4855 kvm_register_write(vcpu, VCPU_REGS_RAX,
4856 kvm_run->hypercall.ret);
4857
4858 r = __vcpu_run(vcpu);
4859
4860 out:
4861 post_kvm_run_save(vcpu);
4862 if (vcpu->sigset_active)
4863 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
4864
4865 return r;
4866 }
4867
4868 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4869 {
4870 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4871 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4872 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4873 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4874 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4875 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4876 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4877 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4878 #ifdef CONFIG_X86_64
4879 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
4880 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
4881 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
4882 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
4883 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
4884 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
4885 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
4886 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
4887 #endif
4888
4889 regs->rip = kvm_rip_read(vcpu);
4890 regs->rflags = kvm_get_rflags(vcpu);
4891
4892 return 0;
4893 }
4894
4895 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4896 {
4897 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
4898 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
4899 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
4900 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
4901 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
4902 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
4903 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
4904 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
4905 #ifdef CONFIG_X86_64
4906 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
4907 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
4908 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
4909 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
4910 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
4911 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
4912 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
4913 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
4914 #endif
4915
4916 kvm_rip_write(vcpu, regs->rip);
4917 kvm_set_rflags(vcpu, regs->rflags);
4918
4919 vcpu->arch.exception.pending = false;
4920
4921 return 0;
4922 }
4923
4924 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
4925 {
4926 struct kvm_segment cs;
4927
4928 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
4929 *db = cs.db;
4930 *l = cs.l;
4931 }
4932 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
4933
4934 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
4935 struct kvm_sregs *sregs)
4936 {
4937 struct desc_ptr dt;
4938
4939 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4940 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4941 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4942 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4943 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4944 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4945
4946 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4947 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4948
4949 kvm_x86_ops->get_idt(vcpu, &dt);
4950 sregs->idt.limit = dt.size;
4951 sregs->idt.base = dt.address;
4952 kvm_x86_ops->get_gdt(vcpu, &dt);
4953 sregs->gdt.limit = dt.size;
4954 sregs->gdt.base = dt.address;
4955
4956 sregs->cr0 = kvm_read_cr0(vcpu);
4957 sregs->cr2 = vcpu->arch.cr2;
4958 sregs->cr3 = vcpu->arch.cr3;
4959 sregs->cr4 = kvm_read_cr4(vcpu);
4960 sregs->cr8 = kvm_get_cr8(vcpu);
4961 sregs->efer = vcpu->arch.efer;
4962 sregs->apic_base = kvm_get_apic_base(vcpu);
4963
4964 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
4965
4966 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
4967 set_bit(vcpu->arch.interrupt.nr,
4968 (unsigned long *)sregs->interrupt_bitmap);
4969
4970 return 0;
4971 }
4972
4973 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
4974 struct kvm_mp_state *mp_state)
4975 {
4976 mp_state->mp_state = vcpu->arch.mp_state;
4977 return 0;
4978 }
4979
4980 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
4981 struct kvm_mp_state *mp_state)
4982 {
4983 vcpu->arch.mp_state = mp_state->mp_state;
4984 return 0;
4985 }
4986
4987 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
4988 bool has_error_code, u32 error_code)
4989 {
4990 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4991 int cs_db, cs_l, ret;
4992 cache_all_regs(vcpu);
4993
4994 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4995
4996 vcpu->arch.emulate_ctxt.vcpu = vcpu;
4997 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4998 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4999 vcpu->arch.emulate_ctxt.mode =
5000 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
5001 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
5002 ? X86EMUL_MODE_VM86 : cs_l
5003 ? X86EMUL_MODE_PROT64 : cs_db
5004 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
5005 memset(c, 0, sizeof(struct decode_cache));
5006 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
5007
5008 ret = emulator_task_switch(&vcpu->arch.emulate_ctxt, &emulate_ops,
5009 tss_selector, reason, has_error_code,
5010 error_code);
5011
5012 if (ret)
5013 return EMULATE_FAIL;
5014
5015 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5016 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5017 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5018 return EMULATE_DONE;
5019 }
5020 EXPORT_SYMBOL_GPL(kvm_task_switch);
5021
5022 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5023 struct kvm_sregs *sregs)
5024 {
5025 int mmu_reset_needed = 0;
5026 int pending_vec, max_bits;
5027 struct desc_ptr dt;
5028
5029 dt.size = sregs->idt.limit;
5030 dt.address = sregs->idt.base;
5031 kvm_x86_ops->set_idt(vcpu, &dt);
5032 dt.size = sregs->gdt.limit;
5033 dt.address = sregs->gdt.base;
5034 kvm_x86_ops->set_gdt(vcpu, &dt);
5035
5036 vcpu->arch.cr2 = sregs->cr2;
5037 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5038 vcpu->arch.cr3 = sregs->cr3;
5039
5040 kvm_set_cr8(vcpu, sregs->cr8);
5041
5042 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5043 kvm_x86_ops->set_efer(vcpu, sregs->efer);
5044 kvm_set_apic_base(vcpu, sregs->apic_base);
5045
5046 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5047 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5048 vcpu->arch.cr0 = sregs->cr0;
5049
5050 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5051 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5052 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5053 load_pdptrs(vcpu, vcpu->arch.cr3);
5054 mmu_reset_needed = 1;
5055 }
5056
5057 if (mmu_reset_needed)
5058 kvm_mmu_reset_context(vcpu);
5059
5060 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5061 pending_vec = find_first_bit(
5062 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5063 if (pending_vec < max_bits) {
5064 kvm_queue_interrupt(vcpu, pending_vec, false);
5065 pr_debug("Set back pending irq %d\n", pending_vec);
5066 if (irqchip_in_kernel(vcpu->kvm))
5067 kvm_pic_clear_isr_ack(vcpu->kvm);
5068 }
5069
5070 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5071 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5072 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5073 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5074 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5075 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5076
5077 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5078 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5079
5080 update_cr8_intercept(vcpu);
5081
5082 /* Older userspace won't unhalt the vcpu on reset. */
5083 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5084 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5085 !is_protmode(vcpu))
5086 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5087
5088 return 0;
5089 }
5090
5091 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5092 struct kvm_guest_debug *dbg)
5093 {
5094 unsigned long rflags;
5095 int i, r;
5096
5097 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5098 r = -EBUSY;
5099 if (vcpu->arch.exception.pending)
5100 goto out;
5101 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5102 kvm_queue_exception(vcpu, DB_VECTOR);
5103 else
5104 kvm_queue_exception(vcpu, BP_VECTOR);
5105 }
5106
5107 /*
5108 * Read rflags as long as potentially injected trace flags are still
5109 * filtered out.
5110 */
5111 rflags = kvm_get_rflags(vcpu);
5112
5113 vcpu->guest_debug = dbg->control;
5114 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5115 vcpu->guest_debug = 0;
5116
5117 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5118 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5119 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5120 vcpu->arch.switch_db_regs =
5121 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5122 } else {
5123 for (i = 0; i < KVM_NR_DB_REGS; i++)
5124 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5125 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5126 }
5127
5128 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5129 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5130 get_segment_base(vcpu, VCPU_SREG_CS);
5131
5132 /*
5133 * Trigger an rflags update that will inject or remove the trace
5134 * flags.
5135 */
5136 kvm_set_rflags(vcpu, rflags);
5137
5138 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5139
5140 r = 0;
5141
5142 out:
5143
5144 return r;
5145 }
5146
5147 /*
5148 * Translate a guest virtual address to a guest physical address.
5149 */
5150 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5151 struct kvm_translation *tr)
5152 {
5153 unsigned long vaddr = tr->linear_address;
5154 gpa_t gpa;
5155 int idx;
5156
5157 idx = srcu_read_lock(&vcpu->kvm->srcu);
5158 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5159 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5160 tr->physical_address = gpa;
5161 tr->valid = gpa != UNMAPPED_GVA;
5162 tr->writeable = 1;
5163 tr->usermode = 0;
5164
5165 return 0;
5166 }
5167
5168 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5169 {
5170 struct i387_fxsave_struct *fxsave =
5171 &vcpu->arch.guest_fpu.state->fxsave;
5172
5173 memcpy(fpu->fpr, fxsave->st_space, 128);
5174 fpu->fcw = fxsave->cwd;
5175 fpu->fsw = fxsave->swd;
5176 fpu->ftwx = fxsave->twd;
5177 fpu->last_opcode = fxsave->fop;
5178 fpu->last_ip = fxsave->rip;
5179 fpu->last_dp = fxsave->rdp;
5180 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5181
5182 return 0;
5183 }
5184
5185 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5186 {
5187 struct i387_fxsave_struct *fxsave =
5188 &vcpu->arch.guest_fpu.state->fxsave;
5189
5190 memcpy(fxsave->st_space, fpu->fpr, 128);
5191 fxsave->cwd = fpu->fcw;
5192 fxsave->swd = fpu->fsw;
5193 fxsave->twd = fpu->ftwx;
5194 fxsave->fop = fpu->last_opcode;
5195 fxsave->rip = fpu->last_ip;
5196 fxsave->rdp = fpu->last_dp;
5197 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5198
5199 return 0;
5200 }
5201
5202 int fx_init(struct kvm_vcpu *vcpu)
5203 {
5204 int err;
5205
5206 err = fpu_alloc(&vcpu->arch.guest_fpu);
5207 if (err)
5208 return err;
5209
5210 fpu_finit(&vcpu->arch.guest_fpu);
5211
5212 /*
5213 * Ensure guest xcr0 is valid for loading
5214 */
5215 vcpu->arch.xcr0 = XSTATE_FP;
5216
5217 vcpu->arch.cr0 |= X86_CR0_ET;
5218
5219 return 0;
5220 }
5221 EXPORT_SYMBOL_GPL(fx_init);
5222
5223 static void fx_free(struct kvm_vcpu *vcpu)
5224 {
5225 fpu_free(&vcpu->arch.guest_fpu);
5226 }
5227
5228 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5229 {
5230 if (vcpu->guest_fpu_loaded)
5231 return;
5232
5233 /*
5234 * Restore all possible states in the guest,
5235 * and assume host would use all available bits.
5236 * Guest xcr0 would be loaded later.
5237 */
5238 kvm_put_guest_xcr0(vcpu);
5239 vcpu->guest_fpu_loaded = 1;
5240 unlazy_fpu(current);
5241 fpu_restore_checking(&vcpu->arch.guest_fpu);
5242 trace_kvm_fpu(1);
5243 }
5244
5245 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5246 {
5247 kvm_put_guest_xcr0(vcpu);
5248
5249 if (!vcpu->guest_fpu_loaded)
5250 return;
5251
5252 vcpu->guest_fpu_loaded = 0;
5253 fpu_save_init(&vcpu->arch.guest_fpu);
5254 ++vcpu->stat.fpu_reload;
5255 set_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests);
5256 trace_kvm_fpu(0);
5257 }
5258
5259 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5260 {
5261 if (vcpu->arch.time_page) {
5262 kvm_release_page_dirty(vcpu->arch.time_page);
5263 vcpu->arch.time_page = NULL;
5264 }
5265
5266 fx_free(vcpu);
5267 kvm_x86_ops->vcpu_free(vcpu);
5268 }
5269
5270 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5271 unsigned int id)
5272 {
5273 return kvm_x86_ops->vcpu_create(kvm, id);
5274 }
5275
5276 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5277 {
5278 int r;
5279
5280 vcpu->arch.mtrr_state.have_fixed = 1;
5281 vcpu_load(vcpu);
5282 r = kvm_arch_vcpu_reset(vcpu);
5283 if (r == 0)
5284 r = kvm_mmu_setup(vcpu);
5285 vcpu_put(vcpu);
5286 if (r < 0)
5287 goto free_vcpu;
5288
5289 return 0;
5290 free_vcpu:
5291 kvm_x86_ops->vcpu_free(vcpu);
5292 return r;
5293 }
5294
5295 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5296 {
5297 vcpu_load(vcpu);
5298 kvm_mmu_unload(vcpu);
5299 vcpu_put(vcpu);
5300
5301 fx_free(vcpu);
5302 kvm_x86_ops->vcpu_free(vcpu);
5303 }
5304
5305 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5306 {
5307 vcpu->arch.nmi_pending = false;
5308 vcpu->arch.nmi_injected = false;
5309
5310 vcpu->arch.switch_db_regs = 0;
5311 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5312 vcpu->arch.dr6 = DR6_FIXED_1;
5313 vcpu->arch.dr7 = DR7_FIXED_1;
5314
5315 return kvm_x86_ops->vcpu_reset(vcpu);
5316 }
5317
5318 int kvm_arch_hardware_enable(void *garbage)
5319 {
5320 /*
5321 * Since this may be called from a hotplug notifcation,
5322 * we can't get the CPU frequency directly.
5323 */
5324 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5325 int cpu = raw_smp_processor_id();
5326 per_cpu(cpu_tsc_khz, cpu) = 0;
5327 }
5328
5329 kvm_shared_msr_cpu_online();
5330
5331 return kvm_x86_ops->hardware_enable(garbage);
5332 }
5333
5334 void kvm_arch_hardware_disable(void *garbage)
5335 {
5336 kvm_x86_ops->hardware_disable(garbage);
5337 drop_user_return_notifiers(garbage);
5338 }
5339
5340 int kvm_arch_hardware_setup(void)
5341 {
5342 return kvm_x86_ops->hardware_setup();
5343 }
5344
5345 void kvm_arch_hardware_unsetup(void)
5346 {
5347 kvm_x86_ops->hardware_unsetup();
5348 }
5349
5350 void kvm_arch_check_processor_compat(void *rtn)
5351 {
5352 kvm_x86_ops->check_processor_compatibility(rtn);
5353 }
5354
5355 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5356 {
5357 struct page *page;
5358 struct kvm *kvm;
5359 int r;
5360
5361 BUG_ON(vcpu->kvm == NULL);
5362 kvm = vcpu->kvm;
5363
5364 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5365 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5366 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5367 else
5368 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5369
5370 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5371 if (!page) {
5372 r = -ENOMEM;
5373 goto fail;
5374 }
5375 vcpu->arch.pio_data = page_address(page);
5376
5377 r = kvm_mmu_create(vcpu);
5378 if (r < 0)
5379 goto fail_free_pio_data;
5380
5381 if (irqchip_in_kernel(kvm)) {
5382 r = kvm_create_lapic(vcpu);
5383 if (r < 0)
5384 goto fail_mmu_destroy;
5385 }
5386
5387 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5388 GFP_KERNEL);
5389 if (!vcpu->arch.mce_banks) {
5390 r = -ENOMEM;
5391 goto fail_free_lapic;
5392 }
5393 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5394
5395 return 0;
5396 fail_free_lapic:
5397 kvm_free_lapic(vcpu);
5398 fail_mmu_destroy:
5399 kvm_mmu_destroy(vcpu);
5400 fail_free_pio_data:
5401 free_page((unsigned long)vcpu->arch.pio_data);
5402 fail:
5403 return r;
5404 }
5405
5406 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5407 {
5408 int idx;
5409
5410 kfree(vcpu->arch.mce_banks);
5411 kvm_free_lapic(vcpu);
5412 idx = srcu_read_lock(&vcpu->kvm->srcu);
5413 kvm_mmu_destroy(vcpu);
5414 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5415 free_page((unsigned long)vcpu->arch.pio_data);
5416 }
5417
5418 struct kvm *kvm_arch_create_vm(void)
5419 {
5420 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5421
5422 if (!kvm)
5423 return ERR_PTR(-ENOMEM);
5424
5425 kvm->arch.aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
5426 if (!kvm->arch.aliases) {
5427 kfree(kvm);
5428 return ERR_PTR(-ENOMEM);
5429 }
5430
5431 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5432 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5433
5434 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5435 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5436
5437 rdtscll(kvm->arch.vm_init_tsc);
5438
5439 return kvm;
5440 }
5441
5442 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5443 {
5444 vcpu_load(vcpu);
5445 kvm_mmu_unload(vcpu);
5446 vcpu_put(vcpu);
5447 }
5448
5449 static void kvm_free_vcpus(struct kvm *kvm)
5450 {
5451 unsigned int i;
5452 struct kvm_vcpu *vcpu;
5453
5454 /*
5455 * Unpin any mmu pages first.
5456 */
5457 kvm_for_each_vcpu(i, vcpu, kvm)
5458 kvm_unload_vcpu_mmu(vcpu);
5459 kvm_for_each_vcpu(i, vcpu, kvm)
5460 kvm_arch_vcpu_free(vcpu);
5461
5462 mutex_lock(&kvm->lock);
5463 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5464 kvm->vcpus[i] = NULL;
5465
5466 atomic_set(&kvm->online_vcpus, 0);
5467 mutex_unlock(&kvm->lock);
5468 }
5469
5470 void kvm_arch_sync_events(struct kvm *kvm)
5471 {
5472 kvm_free_all_assigned_devices(kvm);
5473 }
5474
5475 void kvm_arch_destroy_vm(struct kvm *kvm)
5476 {
5477 kvm_iommu_unmap_guest(kvm);
5478 kvm_free_pit(kvm);
5479 kfree(kvm->arch.vpic);
5480 kfree(kvm->arch.vioapic);
5481 kvm_free_vcpus(kvm);
5482 kvm_free_physmem(kvm);
5483 if (kvm->arch.apic_access_page)
5484 put_page(kvm->arch.apic_access_page);
5485 if (kvm->arch.ept_identity_pagetable)
5486 put_page(kvm->arch.ept_identity_pagetable);
5487 cleanup_srcu_struct(&kvm->srcu);
5488 kfree(kvm->arch.aliases);
5489 kfree(kvm);
5490 }
5491
5492 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5493 struct kvm_memory_slot *memslot,
5494 struct kvm_memory_slot old,
5495 struct kvm_userspace_memory_region *mem,
5496 int user_alloc)
5497 {
5498 int npages = memslot->npages;
5499
5500 /*To keep backward compatibility with older userspace,
5501 *x86 needs to hanlde !user_alloc case.
5502 */
5503 if (!user_alloc) {
5504 if (npages && !old.rmap) {
5505 unsigned long userspace_addr;
5506
5507 down_write(&current->mm->mmap_sem);
5508 userspace_addr = do_mmap(NULL, 0,
5509 npages * PAGE_SIZE,
5510 PROT_READ | PROT_WRITE,
5511 MAP_PRIVATE | MAP_ANONYMOUS,
5512 0);
5513 up_write(&current->mm->mmap_sem);
5514
5515 if (IS_ERR((void *)userspace_addr))
5516 return PTR_ERR((void *)userspace_addr);
5517
5518 memslot->userspace_addr = userspace_addr;
5519 }
5520 }
5521
5522
5523 return 0;
5524 }
5525
5526 void kvm_arch_commit_memory_region(struct kvm *kvm,
5527 struct kvm_userspace_memory_region *mem,
5528 struct kvm_memory_slot old,
5529 int user_alloc)
5530 {
5531
5532 int npages = mem->memory_size >> PAGE_SHIFT;
5533
5534 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5535 int ret;
5536
5537 down_write(&current->mm->mmap_sem);
5538 ret = do_munmap(current->mm, old.userspace_addr,
5539 old.npages * PAGE_SIZE);
5540 up_write(&current->mm->mmap_sem);
5541 if (ret < 0)
5542 printk(KERN_WARNING
5543 "kvm_vm_ioctl_set_memory_region: "
5544 "failed to munmap memory\n");
5545 }
5546
5547 spin_lock(&kvm->mmu_lock);
5548 if (!kvm->arch.n_requested_mmu_pages) {
5549 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5550 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5551 }
5552
5553 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5554 spin_unlock(&kvm->mmu_lock);
5555 }
5556
5557 void kvm_arch_flush_shadow(struct kvm *kvm)
5558 {
5559 kvm_mmu_zap_all(kvm);
5560 kvm_reload_remote_mmus(kvm);
5561 }
5562
5563 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5564 {
5565 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5566 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5567 || vcpu->arch.nmi_pending ||
5568 (kvm_arch_interrupt_allowed(vcpu) &&
5569 kvm_cpu_has_interrupt(vcpu));
5570 }
5571
5572 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5573 {
5574 int me;
5575 int cpu = vcpu->cpu;
5576
5577 if (waitqueue_active(&vcpu->wq)) {
5578 wake_up_interruptible(&vcpu->wq);
5579 ++vcpu->stat.halt_wakeup;
5580 }
5581
5582 me = get_cpu();
5583 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5584 if (atomic_xchg(&vcpu->guest_mode, 0))
5585 smp_send_reschedule(cpu);
5586 put_cpu();
5587 }
5588
5589 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5590 {
5591 return kvm_x86_ops->interrupt_allowed(vcpu);
5592 }
5593
5594 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5595 {
5596 unsigned long current_rip = kvm_rip_read(vcpu) +
5597 get_segment_base(vcpu, VCPU_SREG_CS);
5598
5599 return current_rip == linear_rip;
5600 }
5601 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5602
5603 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5604 {
5605 unsigned long rflags;
5606
5607 rflags = kvm_x86_ops->get_rflags(vcpu);
5608 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5609 rflags &= ~X86_EFLAGS_TF;
5610 return rflags;
5611 }
5612 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5613
5614 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5615 {
5616 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5617 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
5618 rflags |= X86_EFLAGS_TF;
5619 kvm_x86_ops->set_rflags(vcpu, rflags);
5620 }
5621 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5622
5623 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5624 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5625 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5626 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5627 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5628 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5629 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5630 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5631 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5632 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5633 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
5634 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
Linux kernel - Deliverables
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