2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <linux/hash.h>
47 #include <trace/events/kvm.h>
49 #define CREATE_TRACE_POINTS
52 #include <asm/debugreg.h>
59 #include <asm/pvclock.h>
60 #include <asm/div64.h>
62 #define MAX_IO_MSRS 256
63 #define CR0_RESERVED_BITS \
64 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
65 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
66 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
67 #define CR4_RESERVED_BITS \
68 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
69 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
70 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
72 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
74 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
76 #define KVM_MAX_MCE_BANKS 32
77 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
80 * - enable syscall per default because its emulated by KVM
81 * - enable LME and LMA per default on 64 bit KVM
84 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffafeULL
;
86 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffffeULL
;
89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
92 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
93 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
94 struct kvm_cpuid_entry2 __user
*entries
);
96 struct kvm_x86_ops
*kvm_x86_ops
;
97 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
100 module_param_named(ignore_msrs
, ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
102 #define KVM_NR_SHARED_MSRS 16
104 struct kvm_shared_msrs_global
{
106 u32 msrs
[KVM_NR_SHARED_MSRS
];
109 struct kvm_shared_msrs
{
110 struct user_return_notifier urn
;
112 struct kvm_shared_msr_values
{
115 } values
[KVM_NR_SHARED_MSRS
];
118 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
119 static DEFINE_PER_CPU(struct kvm_shared_msrs
, shared_msrs
);
121 struct kvm_stats_debugfs_item debugfs_entries
[] = {
122 { "pf_fixed", VCPU_STAT(pf_fixed
) },
123 { "pf_guest", VCPU_STAT(pf_guest
) },
124 { "tlb_flush", VCPU_STAT(tlb_flush
) },
125 { "invlpg", VCPU_STAT(invlpg
) },
126 { "exits", VCPU_STAT(exits
) },
127 { "io_exits", VCPU_STAT(io_exits
) },
128 { "mmio_exits", VCPU_STAT(mmio_exits
) },
129 { "signal_exits", VCPU_STAT(signal_exits
) },
130 { "irq_window", VCPU_STAT(irq_window_exits
) },
131 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
132 { "halt_exits", VCPU_STAT(halt_exits
) },
133 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
134 { "hypercalls", VCPU_STAT(hypercalls
) },
135 { "request_irq", VCPU_STAT(request_irq_exits
) },
136 { "irq_exits", VCPU_STAT(irq_exits
) },
137 { "host_state_reload", VCPU_STAT(host_state_reload
) },
138 { "efer_reload", VCPU_STAT(efer_reload
) },
139 { "fpu_reload", VCPU_STAT(fpu_reload
) },
140 { "insn_emulation", VCPU_STAT(insn_emulation
) },
141 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
142 { "irq_injections", VCPU_STAT(irq_injections
) },
143 { "nmi_injections", VCPU_STAT(nmi_injections
) },
144 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
145 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
146 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
147 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
148 { "mmu_flooded", VM_STAT(mmu_flooded
) },
149 { "mmu_recycled", VM_STAT(mmu_recycled
) },
150 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
151 { "mmu_unsync", VM_STAT(mmu_unsync
) },
152 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
153 { "largepages", VM_STAT(lpages
) },
157 u64 __read_mostly host_xcr0
;
159 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
162 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
163 vcpu
->arch
.apf
.gfns
[i
] = ~0;
166 static void kvm_on_user_return(struct user_return_notifier
*urn
)
169 struct kvm_shared_msrs
*locals
170 = container_of(urn
, struct kvm_shared_msrs
, urn
);
171 struct kvm_shared_msr_values
*values
;
173 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
174 values
= &locals
->values
[slot
];
175 if (values
->host
!= values
->curr
) {
176 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
177 values
->curr
= values
->host
;
180 locals
->registered
= false;
181 user_return_notifier_unregister(urn
);
184 static void shared_msr_update(unsigned slot
, u32 msr
)
186 struct kvm_shared_msrs
*smsr
;
189 smsr
= &__get_cpu_var(shared_msrs
);
190 /* only read, and nobody should modify it at this time,
191 * so don't need lock */
192 if (slot
>= shared_msrs_global
.nr
) {
193 printk(KERN_ERR
"kvm: invalid MSR slot!");
196 rdmsrl_safe(msr
, &value
);
197 smsr
->values
[slot
].host
= value
;
198 smsr
->values
[slot
].curr
= value
;
201 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
203 if (slot
>= shared_msrs_global
.nr
)
204 shared_msrs_global
.nr
= slot
+ 1;
205 shared_msrs_global
.msrs
[slot
] = msr
;
206 /* we need ensured the shared_msr_global have been updated */
209 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
211 static void kvm_shared_msr_cpu_online(void)
215 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
216 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
219 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
221 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
223 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
225 smsr
->values
[slot
].curr
= value
;
226 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
227 if (!smsr
->registered
) {
228 smsr
->urn
.on_user_return
= kvm_on_user_return
;
229 user_return_notifier_register(&smsr
->urn
);
230 smsr
->registered
= true;
233 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
235 static void drop_user_return_notifiers(void *ignore
)
237 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
239 if (smsr
->registered
)
240 kvm_on_user_return(&smsr
->urn
);
243 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
245 if (irqchip_in_kernel(vcpu
->kvm
))
246 return vcpu
->arch
.apic_base
;
248 return vcpu
->arch
.apic_base
;
250 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
252 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
254 /* TODO: reserve bits check */
255 if (irqchip_in_kernel(vcpu
->kvm
))
256 kvm_lapic_set_base(vcpu
, data
);
258 vcpu
->arch
.apic_base
= data
;
260 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
262 #define EXCPT_BENIGN 0
263 #define EXCPT_CONTRIBUTORY 1
266 static int exception_class(int vector
)
276 return EXCPT_CONTRIBUTORY
;
283 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
284 unsigned nr
, bool has_error
, u32 error_code
,
290 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
292 if (!vcpu
->arch
.exception
.pending
) {
294 vcpu
->arch
.exception
.pending
= true;
295 vcpu
->arch
.exception
.has_error_code
= has_error
;
296 vcpu
->arch
.exception
.nr
= nr
;
297 vcpu
->arch
.exception
.error_code
= error_code
;
298 vcpu
->arch
.exception
.reinject
= reinject
;
302 /* to check exception */
303 prev_nr
= vcpu
->arch
.exception
.nr
;
304 if (prev_nr
== DF_VECTOR
) {
305 /* triple fault -> shutdown */
306 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
309 class1
= exception_class(prev_nr
);
310 class2
= exception_class(nr
);
311 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
312 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
313 /* generate double fault per SDM Table 5-5 */
314 vcpu
->arch
.exception
.pending
= true;
315 vcpu
->arch
.exception
.has_error_code
= true;
316 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
317 vcpu
->arch
.exception
.error_code
= 0;
319 /* replace previous exception with a new one in a hope
320 that instruction re-execution will regenerate lost
325 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
327 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
329 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
331 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
333 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
335 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
337 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
340 kvm_inject_gp(vcpu
, 0);
342 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
344 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
346 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
348 ++vcpu
->stat
.pf_guest
;
349 vcpu
->arch
.cr2
= fault
->address
;
350 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
353 void kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
355 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
356 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
358 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
361 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
363 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
364 vcpu
->arch
.nmi_pending
= 1;
366 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
368 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
370 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
372 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
374 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
376 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
378 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
381 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
382 * a #GP and return false.
384 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
386 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
388 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
391 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
394 * This function will be used to read from the physical memory of the currently
395 * running guest. The difference to kvm_read_guest_page is that this function
396 * can read from guest physical or from the guest's guest physical memory.
398 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
399 gfn_t ngfn
, void *data
, int offset
, int len
,
405 ngpa
= gfn_to_gpa(ngfn
);
406 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
);
407 if (real_gfn
== UNMAPPED_GVA
)
410 real_gfn
= gpa_to_gfn(real_gfn
);
412 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
414 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
416 int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
417 void *data
, int offset
, int len
, u32 access
)
419 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
420 data
, offset
, len
, access
);
424 * Load the pae pdptrs. Return true is they are all valid.
426 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
428 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
429 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
432 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
434 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
435 offset
* sizeof(u64
), sizeof(pdpte
),
436 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
441 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
442 if (is_present_gpte(pdpte
[i
]) &&
443 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
450 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
451 __set_bit(VCPU_EXREG_PDPTR
,
452 (unsigned long *)&vcpu
->arch
.regs_avail
);
453 __set_bit(VCPU_EXREG_PDPTR
,
454 (unsigned long *)&vcpu
->arch
.regs_dirty
);
459 EXPORT_SYMBOL_GPL(load_pdptrs
);
461 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
463 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
469 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
472 if (!test_bit(VCPU_EXREG_PDPTR
,
473 (unsigned long *)&vcpu
->arch
.regs_avail
))
476 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
477 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
478 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
479 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
482 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
488 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
490 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
491 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
492 X86_CR0_CD
| X86_CR0_NW
;
497 if (cr0
& 0xffffffff00000000UL
)
501 cr0
&= ~CR0_RESERVED_BITS
;
503 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
506 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
509 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
511 if ((vcpu
->arch
.efer
& EFER_LME
)) {
516 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
521 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
526 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
528 if ((cr0
^ old_cr0
) & X86_CR0_PG
)
529 kvm_clear_async_pf_completion_queue(vcpu
);
531 if ((cr0
^ old_cr0
) & update_bits
)
532 kvm_mmu_reset_context(vcpu
);
535 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
537 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
539 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
541 EXPORT_SYMBOL_GPL(kvm_lmsw
);
543 int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
547 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
548 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
551 if (kvm_x86_ops
->get_cpl(vcpu
) != 0)
553 if (!(xcr0
& XSTATE_FP
))
555 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
557 if (xcr0
& ~host_xcr0
)
559 vcpu
->arch
.xcr0
= xcr0
;
560 vcpu
->guest_xcr0_loaded
= 0;
564 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
566 if (__kvm_set_xcr(vcpu
, index
, xcr
)) {
567 kvm_inject_gp(vcpu
, 0);
572 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
574 static bool guest_cpuid_has_xsave(struct kvm_vcpu
*vcpu
)
576 struct kvm_cpuid_entry2
*best
;
578 best
= kvm_find_cpuid_entry(vcpu
, 1, 0);
579 return best
&& (best
->ecx
& bit(X86_FEATURE_XSAVE
));
582 static void update_cpuid(struct kvm_vcpu
*vcpu
)
584 struct kvm_cpuid_entry2
*best
;
586 best
= kvm_find_cpuid_entry(vcpu
, 1, 0);
590 /* Update OSXSAVE bit */
591 if (cpu_has_xsave
&& best
->function
== 0x1) {
592 best
->ecx
&= ~(bit(X86_FEATURE_OSXSAVE
));
593 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
))
594 best
->ecx
|= bit(X86_FEATURE_OSXSAVE
);
598 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
600 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
601 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
603 if (cr4
& CR4_RESERVED_BITS
)
606 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
609 if (is_long_mode(vcpu
)) {
610 if (!(cr4
& X86_CR4_PAE
))
612 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
613 && ((cr4
^ old_cr4
) & pdptr_bits
)
614 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
618 if (cr4
& X86_CR4_VMXE
)
621 kvm_x86_ops
->set_cr4(vcpu
, cr4
);
623 if ((cr4
^ old_cr4
) & pdptr_bits
)
624 kvm_mmu_reset_context(vcpu
);
626 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
631 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
633 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
635 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
636 kvm_mmu_sync_roots(vcpu
);
637 kvm_mmu_flush_tlb(vcpu
);
641 if (is_long_mode(vcpu
)) {
642 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
646 if (cr3
& CR3_PAE_RESERVED_BITS
)
648 if (is_paging(vcpu
) &&
649 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
653 * We don't check reserved bits in nonpae mode, because
654 * this isn't enforced, and VMware depends on this.
659 * Does the new cr3 value map to physical memory? (Note, we
660 * catch an invalid cr3 even in real-mode, because it would
661 * cause trouble later on when we turn on paging anyway.)
663 * A real CPU would silently accept an invalid cr3 and would
664 * attempt to use it - with largely undefined (and often hard
665 * to debug) behavior on the guest side.
667 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
669 vcpu
->arch
.cr3
= cr3
;
670 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
671 vcpu
->arch
.mmu
.new_cr3(vcpu
);
674 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
676 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
678 if (cr8
& CR8_RESERVED_BITS
)
680 if (irqchip_in_kernel(vcpu
->kvm
))
681 kvm_lapic_set_tpr(vcpu
, cr8
);
683 vcpu
->arch
.cr8
= cr8
;
686 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
688 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
690 if (irqchip_in_kernel(vcpu
->kvm
))
691 return kvm_lapic_get_cr8(vcpu
);
693 return vcpu
->arch
.cr8
;
695 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
697 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
701 vcpu
->arch
.db
[dr
] = val
;
702 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
703 vcpu
->arch
.eff_db
[dr
] = val
;
706 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
710 if (val
& 0xffffffff00000000ULL
)
712 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | DR6_FIXED_1
;
715 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
719 if (val
& 0xffffffff00000000ULL
)
721 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
722 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
723 kvm_x86_ops
->set_dr7(vcpu
, vcpu
->arch
.dr7
);
724 vcpu
->arch
.switch_db_regs
= (val
& DR7_BP_EN_MASK
);
732 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
736 res
= __kvm_set_dr(vcpu
, dr
, val
);
738 kvm_queue_exception(vcpu
, UD_VECTOR
);
740 kvm_inject_gp(vcpu
, 0);
744 EXPORT_SYMBOL_GPL(kvm_set_dr
);
746 static int _kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
750 *val
= vcpu
->arch
.db
[dr
];
753 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
757 *val
= vcpu
->arch
.dr6
;
760 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
764 *val
= vcpu
->arch
.dr7
;
771 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
773 if (_kvm_get_dr(vcpu
, dr
, val
)) {
774 kvm_queue_exception(vcpu
, UD_VECTOR
);
779 EXPORT_SYMBOL_GPL(kvm_get_dr
);
782 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
783 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
785 * This list is modified at module load time to reflect the
786 * capabilities of the host cpu. This capabilities test skips MSRs that are
787 * kvm-specific. Those are put in the beginning of the list.
790 #define KVM_SAVE_MSRS_BEGIN 8
791 static u32 msrs_to_save
[] = {
792 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
793 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
794 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
795 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
,
796 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
799 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
801 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
804 static unsigned num_msrs_to_save
;
806 static u32 emulated_msrs
[] = {
807 MSR_IA32_MISC_ENABLE
,
812 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
814 u64 old_efer
= vcpu
->arch
.efer
;
816 if (efer
& efer_reserved_bits
)
820 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
823 if (efer
& EFER_FFXSR
) {
824 struct kvm_cpuid_entry2
*feat
;
826 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
827 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
831 if (efer
& EFER_SVME
) {
832 struct kvm_cpuid_entry2
*feat
;
834 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
835 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
840 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
842 kvm_x86_ops
->set_efer(vcpu
, efer
);
844 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
846 /* Update reserved bits */
847 if ((efer
^ old_efer
) & EFER_NX
)
848 kvm_mmu_reset_context(vcpu
);
853 void kvm_enable_efer_bits(u64 mask
)
855 efer_reserved_bits
&= ~mask
;
857 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
861 * Writes msr value into into the appropriate "register".
862 * Returns 0 on success, non-0 otherwise.
863 * Assumes vcpu_load() was already called.
865 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
867 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
871 * Adapt set_msr() to msr_io()'s calling convention
873 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
875 return kvm_set_msr(vcpu
, index
, *data
);
878 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
882 struct pvclock_wall_clock wc
;
883 struct timespec boot
;
888 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
893 ++version
; /* first time write, random junk */
897 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
900 * The guest calculates current wall clock time by adding
901 * system time (updated by kvm_guest_time_update below) to the
902 * wall clock specified here. guest system time equals host
903 * system time for us, thus we must fill in host boot time here.
907 wc
.sec
= boot
.tv_sec
;
908 wc
.nsec
= boot
.tv_nsec
;
909 wc
.version
= version
;
911 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
914 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
917 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
919 uint32_t quotient
, remainder
;
921 /* Don't try to replace with do_div(), this one calculates
922 * "(dividend << 32) / divisor" */
924 : "=a" (quotient
), "=d" (remainder
)
925 : "0" (0), "1" (dividend
), "r" (divisor
) );
929 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
930 s8
*pshift
, u32
*pmultiplier
)
937 tps64
= base_khz
* 1000LL;
938 scaled64
= scaled_khz
* 1000LL;
939 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
944 tps32
= (uint32_t)tps64
;
945 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
946 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
954 *pmultiplier
= div_frac(scaled64
, tps32
);
956 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
957 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
960 static inline u64
get_kernel_ns(void)
964 WARN_ON(preemptible());
966 monotonic_to_bootbased(&ts
);
967 return timespec_to_ns(&ts
);
970 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
971 unsigned long max_tsc_khz
;
973 static inline int kvm_tsc_changes_freq(void)
976 int ret
= !boot_cpu_has(X86_FEATURE_CONSTANT_TSC
) &&
977 cpufreq_quick_get(cpu
) != 0;
982 static inline u64
nsec_to_cycles(u64 nsec
)
986 WARN_ON(preemptible());
987 if (kvm_tsc_changes_freq())
988 printk_once(KERN_WARNING
989 "kvm: unreliable cycle conversion on adjustable rate TSC\n");
990 ret
= nsec
* __this_cpu_read(cpu_tsc_khz
);
991 do_div(ret
, USEC_PER_SEC
);
995 static void kvm_arch_set_tsc_khz(struct kvm
*kvm
, u32 this_tsc_khz
)
997 /* Compute a scale to convert nanoseconds in TSC cycles */
998 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
999 &kvm
->arch
.virtual_tsc_shift
,
1000 &kvm
->arch
.virtual_tsc_mult
);
1001 kvm
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1004 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1006 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.last_tsc_nsec
,
1007 vcpu
->kvm
->arch
.virtual_tsc_mult
,
1008 vcpu
->kvm
->arch
.virtual_tsc_shift
);
1009 tsc
+= vcpu
->arch
.last_tsc_write
;
1013 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
1015 struct kvm
*kvm
= vcpu
->kvm
;
1016 u64 offset
, ns
, elapsed
;
1017 unsigned long flags
;
1020 spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1021 offset
= data
- native_read_tsc();
1022 ns
= get_kernel_ns();
1023 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1024 sdiff
= data
- kvm
->arch
.last_tsc_write
;
1029 * Special case: close write to TSC within 5 seconds of
1030 * another CPU is interpreted as an attempt to synchronize
1031 * The 5 seconds is to accomodate host load / swapping as
1032 * well as any reset of TSC during the boot process.
1034 * In that case, for a reliable TSC, we can match TSC offsets,
1035 * or make a best guest using elapsed value.
1037 if (sdiff
< nsec_to_cycles(5ULL * NSEC_PER_SEC
) &&
1038 elapsed
< 5ULL * NSEC_PER_SEC
) {
1039 if (!check_tsc_unstable()) {
1040 offset
= kvm
->arch
.last_tsc_offset
;
1041 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1043 u64 delta
= nsec_to_cycles(elapsed
);
1045 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1047 ns
= kvm
->arch
.last_tsc_nsec
;
1049 kvm
->arch
.last_tsc_nsec
= ns
;
1050 kvm
->arch
.last_tsc_write
= data
;
1051 kvm
->arch
.last_tsc_offset
= offset
;
1052 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1053 spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1055 /* Reset of TSC must disable overshoot protection below */
1056 vcpu
->arch
.hv_clock
.tsc_timestamp
= 0;
1057 vcpu
->arch
.last_tsc_write
= data
;
1058 vcpu
->arch
.last_tsc_nsec
= ns
;
1060 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1062 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1064 unsigned long flags
;
1065 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1067 unsigned long this_tsc_khz
;
1068 s64 kernel_ns
, max_kernel_ns
;
1071 /* Keep irq disabled to prevent changes to the clock */
1072 local_irq_save(flags
);
1073 kvm_get_msr(v
, MSR_IA32_TSC
, &tsc_timestamp
);
1074 kernel_ns
= get_kernel_ns();
1075 this_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1077 if (unlikely(this_tsc_khz
== 0)) {
1078 local_irq_restore(flags
);
1079 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1084 * We may have to catch up the TSC to match elapsed wall clock
1085 * time for two reasons, even if kvmclock is used.
1086 * 1) CPU could have been running below the maximum TSC rate
1087 * 2) Broken TSC compensation resets the base at each VCPU
1088 * entry to avoid unknown leaps of TSC even when running
1089 * again on the same CPU. This may cause apparent elapsed
1090 * time to disappear, and the guest to stand still or run
1093 if (vcpu
->tsc_catchup
) {
1094 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1095 if (tsc
> tsc_timestamp
) {
1096 kvm_x86_ops
->adjust_tsc_offset(v
, tsc
- tsc_timestamp
);
1097 tsc_timestamp
= tsc
;
1101 local_irq_restore(flags
);
1103 if (!vcpu
->time_page
)
1107 * Time as measured by the TSC may go backwards when resetting the base
1108 * tsc_timestamp. The reason for this is that the TSC resolution is
1109 * higher than the resolution of the other clock scales. Thus, many
1110 * possible measurments of the TSC correspond to one measurement of any
1111 * other clock, and so a spread of values is possible. This is not a
1112 * problem for the computation of the nanosecond clock; with TSC rates
1113 * around 1GHZ, there can only be a few cycles which correspond to one
1114 * nanosecond value, and any path through this code will inevitably
1115 * take longer than that. However, with the kernel_ns value itself,
1116 * the precision may be much lower, down to HZ granularity. If the
1117 * first sampling of TSC against kernel_ns ends in the low part of the
1118 * range, and the second in the high end of the range, we can get:
1120 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1122 * As the sampling errors potentially range in the thousands of cycles,
1123 * it is possible such a time value has already been observed by the
1124 * guest. To protect against this, we must compute the system time as
1125 * observed by the guest and ensure the new system time is greater.
1128 if (vcpu
->hv_clock
.tsc_timestamp
&& vcpu
->last_guest_tsc
) {
1129 max_kernel_ns
= vcpu
->last_guest_tsc
-
1130 vcpu
->hv_clock
.tsc_timestamp
;
1131 max_kernel_ns
= pvclock_scale_delta(max_kernel_ns
,
1132 vcpu
->hv_clock
.tsc_to_system_mul
,
1133 vcpu
->hv_clock
.tsc_shift
);
1134 max_kernel_ns
+= vcpu
->last_kernel_ns
;
1137 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1138 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1139 &vcpu
->hv_clock
.tsc_shift
,
1140 &vcpu
->hv_clock
.tsc_to_system_mul
);
1141 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1144 if (max_kernel_ns
> kernel_ns
)
1145 kernel_ns
= max_kernel_ns
;
1147 /* With all the info we got, fill in the values */
1148 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1149 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1150 vcpu
->last_kernel_ns
= kernel_ns
;
1151 vcpu
->last_guest_tsc
= tsc_timestamp
;
1152 vcpu
->hv_clock
.flags
= 0;
1155 * The interface expects us to write an even number signaling that the
1156 * update is finished. Since the guest won't see the intermediate
1157 * state, we just increase by 2 at the end.
1159 vcpu
->hv_clock
.version
+= 2;
1161 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
1163 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
1164 sizeof(vcpu
->hv_clock
));
1166 kunmap_atomic(shared_kaddr
, KM_USER0
);
1168 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
1172 static bool msr_mtrr_valid(unsigned msr
)
1175 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1176 case MSR_MTRRfix64K_00000
:
1177 case MSR_MTRRfix16K_80000
:
1178 case MSR_MTRRfix16K_A0000
:
1179 case MSR_MTRRfix4K_C0000
:
1180 case MSR_MTRRfix4K_C8000
:
1181 case MSR_MTRRfix4K_D0000
:
1182 case MSR_MTRRfix4K_D8000
:
1183 case MSR_MTRRfix4K_E0000
:
1184 case MSR_MTRRfix4K_E8000
:
1185 case MSR_MTRRfix4K_F0000
:
1186 case MSR_MTRRfix4K_F8000
:
1187 case MSR_MTRRdefType
:
1188 case MSR_IA32_CR_PAT
:
1196 static bool valid_pat_type(unsigned t
)
1198 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1201 static bool valid_mtrr_type(unsigned t
)
1203 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1206 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1210 if (!msr_mtrr_valid(msr
))
1213 if (msr
== MSR_IA32_CR_PAT
) {
1214 for (i
= 0; i
< 8; i
++)
1215 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1218 } else if (msr
== MSR_MTRRdefType
) {
1221 return valid_mtrr_type(data
& 0xff);
1222 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1223 for (i
= 0; i
< 8 ; i
++)
1224 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1229 /* variable MTRRs */
1230 return valid_mtrr_type(data
& 0xff);
1233 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1235 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1237 if (!mtrr_valid(vcpu
, msr
, data
))
1240 if (msr
== MSR_MTRRdefType
) {
1241 vcpu
->arch
.mtrr_state
.def_type
= data
;
1242 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1243 } else if (msr
== MSR_MTRRfix64K_00000
)
1245 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1246 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1247 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1248 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1249 else if (msr
== MSR_IA32_CR_PAT
)
1250 vcpu
->arch
.pat
= data
;
1251 else { /* Variable MTRRs */
1252 int idx
, is_mtrr_mask
;
1255 idx
= (msr
- 0x200) / 2;
1256 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1259 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1262 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1266 kvm_mmu_reset_context(vcpu
);
1270 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1272 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1273 unsigned bank_num
= mcg_cap
& 0xff;
1276 case MSR_IA32_MCG_STATUS
:
1277 vcpu
->arch
.mcg_status
= data
;
1279 case MSR_IA32_MCG_CTL
:
1280 if (!(mcg_cap
& MCG_CTL_P
))
1282 if (data
!= 0 && data
!= ~(u64
)0)
1284 vcpu
->arch
.mcg_ctl
= data
;
1287 if (msr
>= MSR_IA32_MC0_CTL
&&
1288 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1289 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1290 /* only 0 or all 1s can be written to IA32_MCi_CTL
1291 * some Linux kernels though clear bit 10 in bank 4 to
1292 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1293 * this to avoid an uncatched #GP in the guest
1295 if ((offset
& 0x3) == 0 &&
1296 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1298 vcpu
->arch
.mce_banks
[offset
] = data
;
1306 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1308 struct kvm
*kvm
= vcpu
->kvm
;
1309 int lm
= is_long_mode(vcpu
);
1310 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1311 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1312 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1313 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1314 u32 page_num
= data
& ~PAGE_MASK
;
1315 u64 page_addr
= data
& PAGE_MASK
;
1320 if (page_num
>= blob_size
)
1323 page
= kzalloc(PAGE_SIZE
, GFP_KERNEL
);
1327 if (copy_from_user(page
, blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
))
1329 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1338 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1340 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1343 static bool kvm_hv_msr_partition_wide(u32 msr
)
1347 case HV_X64_MSR_GUEST_OS_ID
:
1348 case HV_X64_MSR_HYPERCALL
:
1356 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1358 struct kvm
*kvm
= vcpu
->kvm
;
1361 case HV_X64_MSR_GUEST_OS_ID
:
1362 kvm
->arch
.hv_guest_os_id
= data
;
1363 /* setting guest os id to zero disables hypercall page */
1364 if (!kvm
->arch
.hv_guest_os_id
)
1365 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1367 case HV_X64_MSR_HYPERCALL
: {
1372 /* if guest os id is not set hypercall should remain disabled */
1373 if (!kvm
->arch
.hv_guest_os_id
)
1375 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1376 kvm
->arch
.hv_hypercall
= data
;
1379 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1380 addr
= gfn_to_hva(kvm
, gfn
);
1381 if (kvm_is_error_hva(addr
))
1383 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1384 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1385 if (copy_to_user((void __user
*)addr
, instructions
, 4))
1387 kvm
->arch
.hv_hypercall
= data
;
1391 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1392 "data 0x%llx\n", msr
, data
);
1398 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1401 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1404 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1405 vcpu
->arch
.hv_vapic
= data
;
1408 addr
= gfn_to_hva(vcpu
->kvm
, data
>>
1409 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
);
1410 if (kvm_is_error_hva(addr
))
1412 if (clear_user((void __user
*)addr
, PAGE_SIZE
))
1414 vcpu
->arch
.hv_vapic
= data
;
1417 case HV_X64_MSR_EOI
:
1418 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1419 case HV_X64_MSR_ICR
:
1420 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1421 case HV_X64_MSR_TPR
:
1422 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1424 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1425 "data 0x%llx\n", msr
, data
);
1432 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1434 gpa_t gpa
= data
& ~0x3f;
1436 /* Bits 2:5 are resrved, Should be zero */
1440 vcpu
->arch
.apf
.msr_val
= data
;
1442 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1443 kvm_clear_async_pf_completion_queue(vcpu
);
1444 kvm_async_pf_hash_reset(vcpu
);
1448 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
))
1451 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
1452 kvm_async_pf_wakeup_all(vcpu
);
1456 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1460 return set_efer(vcpu
, data
);
1462 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1463 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
1465 pr_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1470 case MSR_FAM10H_MMIO_CONF_BASE
:
1472 pr_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1477 case MSR_AMD64_NB_CFG
:
1479 case MSR_IA32_DEBUGCTLMSR
:
1481 /* We support the non-activated case already */
1483 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1484 /* Values other than LBR and BTF are vendor-specific,
1485 thus reserved and should throw a #GP */
1488 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1491 case MSR_IA32_UCODE_REV
:
1492 case MSR_IA32_UCODE_WRITE
:
1493 case MSR_VM_HSAVE_PA
:
1494 case MSR_AMD64_PATCH_LOADER
:
1496 case 0x200 ... 0x2ff:
1497 return set_msr_mtrr(vcpu
, msr
, data
);
1498 case MSR_IA32_APICBASE
:
1499 kvm_set_apic_base(vcpu
, data
);
1501 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1502 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1503 case MSR_IA32_MISC_ENABLE
:
1504 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1506 case MSR_KVM_WALL_CLOCK_NEW
:
1507 case MSR_KVM_WALL_CLOCK
:
1508 vcpu
->kvm
->arch
.wall_clock
= data
;
1509 kvm_write_wall_clock(vcpu
->kvm
, data
);
1511 case MSR_KVM_SYSTEM_TIME_NEW
:
1512 case MSR_KVM_SYSTEM_TIME
: {
1513 if (vcpu
->arch
.time_page
) {
1514 kvm_release_page_dirty(vcpu
->arch
.time_page
);
1515 vcpu
->arch
.time_page
= NULL
;
1518 vcpu
->arch
.time
= data
;
1519 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1521 /* we verify if the enable bit is set... */
1525 /* ...but clean it before doing the actual write */
1526 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
1528 vcpu
->arch
.time_page
=
1529 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
1531 if (is_error_page(vcpu
->arch
.time_page
)) {
1532 kvm_release_page_clean(vcpu
->arch
.time_page
);
1533 vcpu
->arch
.time_page
= NULL
;
1537 case MSR_KVM_ASYNC_PF_EN
:
1538 if (kvm_pv_enable_async_pf(vcpu
, data
))
1541 case MSR_IA32_MCG_CTL
:
1542 case MSR_IA32_MCG_STATUS
:
1543 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1544 return set_msr_mce(vcpu
, msr
, data
);
1546 /* Performance counters are not protected by a CPUID bit,
1547 * so we should check all of them in the generic path for the sake of
1548 * cross vendor migration.
1549 * Writing a zero into the event select MSRs disables them,
1550 * which we perfectly emulate ;-). Any other value should be at least
1551 * reported, some guests depend on them.
1553 case MSR_P6_EVNTSEL0
:
1554 case MSR_P6_EVNTSEL1
:
1555 case MSR_K7_EVNTSEL0
:
1556 case MSR_K7_EVNTSEL1
:
1557 case MSR_K7_EVNTSEL2
:
1558 case MSR_K7_EVNTSEL3
:
1560 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1561 "0x%x data 0x%llx\n", msr
, data
);
1563 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1564 * so we ignore writes to make it happy.
1566 case MSR_P6_PERFCTR0
:
1567 case MSR_P6_PERFCTR1
:
1568 case MSR_K7_PERFCTR0
:
1569 case MSR_K7_PERFCTR1
:
1570 case MSR_K7_PERFCTR2
:
1571 case MSR_K7_PERFCTR3
:
1572 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1573 "0x%x data 0x%llx\n", msr
, data
);
1575 case MSR_K7_CLK_CTL
:
1577 * Ignore all writes to this no longer documented MSR.
1578 * Writes are only relevant for old K7 processors,
1579 * all pre-dating SVM, but a recommended workaround from
1580 * AMD for these chips. It is possible to speicify the
1581 * affected processor models on the command line, hence
1582 * the need to ignore the workaround.
1585 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1586 if (kvm_hv_msr_partition_wide(msr
)) {
1588 mutex_lock(&vcpu
->kvm
->lock
);
1589 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
1590 mutex_unlock(&vcpu
->kvm
->lock
);
1593 return set_msr_hyperv(vcpu
, msr
, data
);
1595 case MSR_IA32_BBL_CR_CTL3
:
1596 /* Drop writes to this legacy MSR -- see rdmsr
1597 * counterpart for further detail.
1599 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
1602 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
1603 return xen_hvm_config(vcpu
, data
);
1605 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
1609 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
1616 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
1620 * Reads an msr value (of 'msr_index') into 'pdata'.
1621 * Returns 0 on success, non-0 otherwise.
1622 * Assumes vcpu_load() was already called.
1624 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
1626 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
1629 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1631 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1633 if (!msr_mtrr_valid(msr
))
1636 if (msr
== MSR_MTRRdefType
)
1637 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
1638 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
1639 else if (msr
== MSR_MTRRfix64K_00000
)
1641 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1642 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
1643 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1644 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
1645 else if (msr
== MSR_IA32_CR_PAT
)
1646 *pdata
= vcpu
->arch
.pat
;
1647 else { /* Variable MTRRs */
1648 int idx
, is_mtrr_mask
;
1651 idx
= (msr
- 0x200) / 2;
1652 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1655 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1658 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1665 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1668 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1669 unsigned bank_num
= mcg_cap
& 0xff;
1672 case MSR_IA32_P5_MC_ADDR
:
1673 case MSR_IA32_P5_MC_TYPE
:
1676 case MSR_IA32_MCG_CAP
:
1677 data
= vcpu
->arch
.mcg_cap
;
1679 case MSR_IA32_MCG_CTL
:
1680 if (!(mcg_cap
& MCG_CTL_P
))
1682 data
= vcpu
->arch
.mcg_ctl
;
1684 case MSR_IA32_MCG_STATUS
:
1685 data
= vcpu
->arch
.mcg_status
;
1688 if (msr
>= MSR_IA32_MC0_CTL
&&
1689 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1690 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1691 data
= vcpu
->arch
.mce_banks
[offset
];
1700 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1703 struct kvm
*kvm
= vcpu
->kvm
;
1706 case HV_X64_MSR_GUEST_OS_ID
:
1707 data
= kvm
->arch
.hv_guest_os_id
;
1709 case HV_X64_MSR_HYPERCALL
:
1710 data
= kvm
->arch
.hv_hypercall
;
1713 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1721 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1726 case HV_X64_MSR_VP_INDEX
: {
1729 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
)
1734 case HV_X64_MSR_EOI
:
1735 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
1736 case HV_X64_MSR_ICR
:
1737 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
1738 case HV_X64_MSR_TPR
:
1739 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
1741 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1748 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1753 case MSR_IA32_PLATFORM_ID
:
1754 case MSR_IA32_UCODE_REV
:
1755 case MSR_IA32_EBL_CR_POWERON
:
1756 case MSR_IA32_DEBUGCTLMSR
:
1757 case MSR_IA32_LASTBRANCHFROMIP
:
1758 case MSR_IA32_LASTBRANCHTOIP
:
1759 case MSR_IA32_LASTINTFROMIP
:
1760 case MSR_IA32_LASTINTTOIP
:
1763 case MSR_VM_HSAVE_PA
:
1764 case MSR_P6_PERFCTR0
:
1765 case MSR_P6_PERFCTR1
:
1766 case MSR_P6_EVNTSEL0
:
1767 case MSR_P6_EVNTSEL1
:
1768 case MSR_K7_EVNTSEL0
:
1769 case MSR_K7_PERFCTR0
:
1770 case MSR_K8_INT_PENDING_MSG
:
1771 case MSR_AMD64_NB_CFG
:
1772 case MSR_FAM10H_MMIO_CONF_BASE
:
1776 data
= 0x500 | KVM_NR_VAR_MTRR
;
1778 case 0x200 ... 0x2ff:
1779 return get_msr_mtrr(vcpu
, msr
, pdata
);
1780 case 0xcd: /* fsb frequency */
1784 * MSR_EBC_FREQUENCY_ID
1785 * Conservative value valid for even the basic CPU models.
1786 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1787 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1788 * and 266MHz for model 3, or 4. Set Core Clock
1789 * Frequency to System Bus Frequency Ratio to 1 (bits
1790 * 31:24) even though these are only valid for CPU
1791 * models > 2, however guests may end up dividing or
1792 * multiplying by zero otherwise.
1794 case MSR_EBC_FREQUENCY_ID
:
1797 case MSR_IA32_APICBASE
:
1798 data
= kvm_get_apic_base(vcpu
);
1800 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1801 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1803 case MSR_IA32_MISC_ENABLE
:
1804 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1806 case MSR_IA32_PERF_STATUS
:
1807 /* TSC increment by tick */
1809 /* CPU multiplier */
1810 data
|= (((uint64_t)4ULL) << 40);
1813 data
= vcpu
->arch
.efer
;
1815 case MSR_KVM_WALL_CLOCK
:
1816 case MSR_KVM_WALL_CLOCK_NEW
:
1817 data
= vcpu
->kvm
->arch
.wall_clock
;
1819 case MSR_KVM_SYSTEM_TIME
:
1820 case MSR_KVM_SYSTEM_TIME_NEW
:
1821 data
= vcpu
->arch
.time
;
1823 case MSR_KVM_ASYNC_PF_EN
:
1824 data
= vcpu
->arch
.apf
.msr_val
;
1826 case MSR_IA32_P5_MC_ADDR
:
1827 case MSR_IA32_P5_MC_TYPE
:
1828 case MSR_IA32_MCG_CAP
:
1829 case MSR_IA32_MCG_CTL
:
1830 case MSR_IA32_MCG_STATUS
:
1831 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1832 return get_msr_mce(vcpu
, msr
, pdata
);
1833 case MSR_K7_CLK_CTL
:
1835 * Provide expected ramp-up count for K7. All other
1836 * are set to zero, indicating minimum divisors for
1839 * This prevents guest kernels on AMD host with CPU
1840 * type 6, model 8 and higher from exploding due to
1841 * the rdmsr failing.
1845 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1846 if (kvm_hv_msr_partition_wide(msr
)) {
1848 mutex_lock(&vcpu
->kvm
->lock
);
1849 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
1850 mutex_unlock(&vcpu
->kvm
->lock
);
1853 return get_msr_hyperv(vcpu
, msr
, pdata
);
1855 case MSR_IA32_BBL_CR_CTL3
:
1856 /* This legacy MSR exists but isn't fully documented in current
1857 * silicon. It is however accessed by winxp in very narrow
1858 * scenarios where it sets bit #19, itself documented as
1859 * a "reserved" bit. Best effort attempt to source coherent
1860 * read data here should the balance of the register be
1861 * interpreted by the guest:
1863 * L2 cache control register 3: 64GB range, 256KB size,
1864 * enabled, latency 0x1, configured
1870 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1873 pr_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
1881 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1884 * Read or write a bunch of msrs. All parameters are kernel addresses.
1886 * @return number of msrs set successfully.
1888 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1889 struct kvm_msr_entry
*entries
,
1890 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1891 unsigned index
, u64
*data
))
1895 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
1896 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1897 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1899 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
1905 * Read or write a bunch of msrs. Parameters are user addresses.
1907 * @return number of msrs set successfully.
1909 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1910 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1911 unsigned index
, u64
*data
),
1914 struct kvm_msrs msrs
;
1915 struct kvm_msr_entry
*entries
;
1920 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1924 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1928 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1929 entries
= kmalloc(size
, GFP_KERNEL
);
1934 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1937 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1942 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1953 int kvm_dev_ioctl_check_extension(long ext
)
1958 case KVM_CAP_IRQCHIP
:
1960 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1961 case KVM_CAP_SET_TSS_ADDR
:
1962 case KVM_CAP_EXT_CPUID
:
1963 case KVM_CAP_CLOCKSOURCE
:
1965 case KVM_CAP_NOP_IO_DELAY
:
1966 case KVM_CAP_MP_STATE
:
1967 case KVM_CAP_SYNC_MMU
:
1968 case KVM_CAP_USER_NMI
:
1969 case KVM_CAP_REINJECT_CONTROL
:
1970 case KVM_CAP_IRQ_INJECT_STATUS
:
1971 case KVM_CAP_ASSIGN_DEV_IRQ
:
1973 case KVM_CAP_IOEVENTFD
:
1975 case KVM_CAP_PIT_STATE2
:
1976 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
1977 case KVM_CAP_XEN_HVM
:
1978 case KVM_CAP_ADJUST_CLOCK
:
1979 case KVM_CAP_VCPU_EVENTS
:
1980 case KVM_CAP_HYPERV
:
1981 case KVM_CAP_HYPERV_VAPIC
:
1982 case KVM_CAP_HYPERV_SPIN
:
1983 case KVM_CAP_PCI_SEGMENT
:
1984 case KVM_CAP_DEBUGREGS
:
1985 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
1987 case KVM_CAP_ASYNC_PF
:
1990 case KVM_CAP_COALESCED_MMIO
:
1991 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
1994 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
1996 case KVM_CAP_NR_VCPUS
:
1999 case KVM_CAP_NR_MEMSLOTS
:
2000 r
= KVM_MEMORY_SLOTS
;
2002 case KVM_CAP_PV_MMU
: /* obsolete */
2009 r
= KVM_MAX_MCE_BANKS
;
2022 long kvm_arch_dev_ioctl(struct file
*filp
,
2023 unsigned int ioctl
, unsigned long arg
)
2025 void __user
*argp
= (void __user
*)arg
;
2029 case KVM_GET_MSR_INDEX_LIST
: {
2030 struct kvm_msr_list __user
*user_msr_list
= argp
;
2031 struct kvm_msr_list msr_list
;
2035 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2038 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
2039 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2042 if (n
< msr_list
.nmsrs
)
2045 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2046 num_msrs_to_save
* sizeof(u32
)))
2048 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2050 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
2055 case KVM_GET_SUPPORTED_CPUID
: {
2056 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2057 struct kvm_cpuid2 cpuid
;
2060 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2062 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
2063 cpuid_arg
->entries
);
2068 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2073 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2076 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2078 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2090 static void wbinvd_ipi(void *garbage
)
2095 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2097 return vcpu
->kvm
->arch
.iommu_domain
&&
2098 !(vcpu
->kvm
->arch
.iommu_flags
& KVM_IOMMU_CACHE_COHERENCY
);
2101 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2103 /* Address WBINVD may be executed by guest */
2104 if (need_emulate_wbinvd(vcpu
)) {
2105 if (kvm_x86_ops
->has_wbinvd_exit())
2106 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2107 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2108 smp_call_function_single(vcpu
->cpu
,
2109 wbinvd_ipi
, NULL
, 1);
2112 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2113 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2114 /* Make sure TSC doesn't go backwards */
2115 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2116 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2118 mark_tsc_unstable("KVM discovered backwards TSC");
2119 if (check_tsc_unstable()) {
2120 kvm_x86_ops
->adjust_tsc_offset(vcpu
, -tsc_delta
);
2121 vcpu
->arch
.tsc_catchup
= 1;
2122 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2124 if (vcpu
->cpu
!= cpu
)
2125 kvm_migrate_timers(vcpu
);
2130 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2132 kvm_x86_ops
->vcpu_put(vcpu
);
2133 kvm_put_guest_fpu(vcpu
);
2134 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2137 static int is_efer_nx(void)
2139 unsigned long long efer
= 0;
2141 rdmsrl_safe(MSR_EFER
, &efer
);
2142 return efer
& EFER_NX
;
2145 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
2148 struct kvm_cpuid_entry2
*e
, *entry
;
2151 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
2152 e
= &vcpu
->arch
.cpuid_entries
[i
];
2153 if (e
->function
== 0x80000001) {
2158 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
2159 entry
->edx
&= ~(1 << 20);
2160 printk(KERN_INFO
"kvm: guest NX capability removed\n");
2164 /* when an old userspace process fills a new kernel module */
2165 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
2166 struct kvm_cpuid
*cpuid
,
2167 struct kvm_cpuid_entry __user
*entries
)
2170 struct kvm_cpuid_entry
*cpuid_entries
;
2173 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2176 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
2180 if (copy_from_user(cpuid_entries
, entries
,
2181 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
2183 for (i
= 0; i
< cpuid
->nent
; i
++) {
2184 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
2185 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
2186 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
2187 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
2188 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
2189 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
2190 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
2191 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
2192 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
2193 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
2195 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
2196 cpuid_fix_nx_cap(vcpu
);
2198 kvm_apic_set_version(vcpu
);
2199 kvm_x86_ops
->cpuid_update(vcpu
);
2203 vfree(cpuid_entries
);
2208 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
2209 struct kvm_cpuid2
*cpuid
,
2210 struct kvm_cpuid_entry2 __user
*entries
)
2215 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2218 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
2219 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
2221 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
2222 kvm_apic_set_version(vcpu
);
2223 kvm_x86_ops
->cpuid_update(vcpu
);
2231 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
2232 struct kvm_cpuid2
*cpuid
,
2233 struct kvm_cpuid_entry2 __user
*entries
)
2238 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
2241 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
2242 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
2247 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
2251 static void cpuid_mask(u32
*word
, int wordnum
)
2253 *word
&= boot_cpu_data
.x86_capability
[wordnum
];
2256 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
2259 entry
->function
= function
;
2260 entry
->index
= index
;
2261 cpuid_count(entry
->function
, entry
->index
,
2262 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
2266 #define F(x) bit(X86_FEATURE_##x)
2268 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
2269 u32 index
, int *nent
, int maxnent
)
2271 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
2272 #ifdef CONFIG_X86_64
2273 unsigned f_gbpages
= (kvm_x86_ops
->get_lpage_level() == PT_PDPE_LEVEL
)
2275 unsigned f_lm
= F(LM
);
2277 unsigned f_gbpages
= 0;
2280 unsigned f_rdtscp
= kvm_x86_ops
->rdtscp_supported() ? F(RDTSCP
) : 0;
2283 const u32 kvm_supported_word0_x86_features
=
2284 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
2285 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
2286 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
2287 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
2288 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
2289 0 /* Reserved, DS, ACPI */ | F(MMX
) |
2290 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
2291 0 /* HTT, TM, Reserved, PBE */;
2292 /* cpuid 0x80000001.edx */
2293 const u32 kvm_supported_word1_x86_features
=
2294 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
2295 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
2296 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
2297 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
2298 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
2299 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
2300 F(FXSR
) | F(FXSR_OPT
) | f_gbpages
| f_rdtscp
|
2301 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
2303 const u32 kvm_supported_word4_x86_features
=
2304 F(XMM3
) | F(PCLMULQDQ
) | 0 /* DTES64, MONITOR */ |
2305 0 /* DS-CPL, VMX, SMX, EST */ |
2306 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2307 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
2308 0 /* Reserved, DCA */ | F(XMM4_1
) |
2309 F(XMM4_2
) | F(X2APIC
) | F(MOVBE
) | F(POPCNT
) |
2310 0 /* Reserved*/ | F(AES
) | F(XSAVE
) | 0 /* OSXSAVE */ | F(AVX
) |
2312 /* cpuid 0x80000001.ecx */
2313 const u32 kvm_supported_word6_x86_features
=
2314 F(LAHF_LM
) | F(CMP_LEGACY
) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2315 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
2316 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP
) |
2317 0 /* SKINIT, WDT, LWP */ | F(FMA4
) | F(TBM
);
2319 /* all calls to cpuid_count() should be made on the same cpu */
2321 do_cpuid_1_ent(entry
, function
, index
);
2326 entry
->eax
= min(entry
->eax
, (u32
)0xd);
2329 entry
->edx
&= kvm_supported_word0_x86_features
;
2330 cpuid_mask(&entry
->edx
, 0);
2331 entry
->ecx
&= kvm_supported_word4_x86_features
;
2332 cpuid_mask(&entry
->ecx
, 4);
2333 /* we support x2apic emulation even if host does not support
2334 * it since we emulate x2apic in software */
2335 entry
->ecx
|= F(X2APIC
);
2337 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2338 * may return different values. This forces us to get_cpu() before
2339 * issuing the first command, and also to emulate this annoying behavior
2340 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2342 int t
, times
= entry
->eax
& 0xff;
2344 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
2345 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
2346 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
2347 do_cpuid_1_ent(&entry
[t
], function
, 0);
2348 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
2353 /* function 4 and 0xb have additional index. */
2357 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2358 /* read more entries until cache_type is zero */
2359 for (i
= 1; *nent
< maxnent
; ++i
) {
2360 cache_type
= entry
[i
- 1].eax
& 0x1f;
2363 do_cpuid_1_ent(&entry
[i
], function
, i
);
2365 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2373 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2374 /* read more entries until level_type is zero */
2375 for (i
= 1; *nent
< maxnent
; ++i
) {
2376 level_type
= entry
[i
- 1].ecx
& 0xff00;
2379 do_cpuid_1_ent(&entry
[i
], function
, i
);
2381 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2389 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2390 for (i
= 1; *nent
< maxnent
; ++i
) {
2391 if (entry
[i
- 1].eax
== 0 && i
!= 2)
2393 do_cpuid_1_ent(&entry
[i
], function
, i
);
2395 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2400 case KVM_CPUID_SIGNATURE
: {
2401 char signature
[12] = "KVMKVMKVM\0\0";
2402 u32
*sigptr
= (u32
*)signature
;
2404 entry
->ebx
= sigptr
[0];
2405 entry
->ecx
= sigptr
[1];
2406 entry
->edx
= sigptr
[2];
2409 case KVM_CPUID_FEATURES
:
2410 entry
->eax
= (1 << KVM_FEATURE_CLOCKSOURCE
) |
2411 (1 << KVM_FEATURE_NOP_IO_DELAY
) |
2412 (1 << KVM_FEATURE_CLOCKSOURCE2
) |
2413 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT
);
2419 entry
->eax
= min(entry
->eax
, 0x8000001a);
2422 entry
->edx
&= kvm_supported_word1_x86_features
;
2423 cpuid_mask(&entry
->edx
, 1);
2424 entry
->ecx
&= kvm_supported_word6_x86_features
;
2425 cpuid_mask(&entry
->ecx
, 6);
2429 kvm_x86_ops
->set_supported_cpuid(function
, entry
);
2436 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
2437 struct kvm_cpuid_entry2 __user
*entries
)
2439 struct kvm_cpuid_entry2
*cpuid_entries
;
2440 int limit
, nent
= 0, r
= -E2BIG
;
2443 if (cpuid
->nent
< 1)
2445 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2446 cpuid
->nent
= KVM_MAX_CPUID_ENTRIES
;
2448 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
2452 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
2453 limit
= cpuid_entries
[0].eax
;
2454 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
2455 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
2456 &nent
, cpuid
->nent
);
2458 if (nent
>= cpuid
->nent
)
2461 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
2462 limit
= cpuid_entries
[nent
- 1].eax
;
2463 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
2464 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
2465 &nent
, cpuid
->nent
);
2470 if (nent
>= cpuid
->nent
)
2473 do_cpuid_ent(&cpuid_entries
[nent
], KVM_CPUID_SIGNATURE
, 0, &nent
,
2477 if (nent
>= cpuid
->nent
)
2480 do_cpuid_ent(&cpuid_entries
[nent
], KVM_CPUID_FEATURES
, 0, &nent
,
2484 if (nent
>= cpuid
->nent
)
2488 if (copy_to_user(entries
, cpuid_entries
,
2489 nent
* sizeof(struct kvm_cpuid_entry2
)))
2495 vfree(cpuid_entries
);
2500 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2501 struct kvm_lapic_state
*s
)
2503 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2508 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2509 struct kvm_lapic_state
*s
)
2511 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
2512 kvm_apic_post_state_restore(vcpu
);
2513 update_cr8_intercept(vcpu
);
2518 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2519 struct kvm_interrupt
*irq
)
2521 if (irq
->irq
< 0 || irq
->irq
>= 256)
2523 if (irqchip_in_kernel(vcpu
->kvm
))
2526 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2527 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2532 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2534 kvm_inject_nmi(vcpu
);
2539 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2540 struct kvm_tpr_access_ctl
*tac
)
2544 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2548 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2552 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2555 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2557 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2560 vcpu
->arch
.mcg_cap
= mcg_cap
;
2561 /* Init IA32_MCG_CTL to all 1s */
2562 if (mcg_cap
& MCG_CTL_P
)
2563 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2564 /* Init IA32_MCi_CTL to all 1s */
2565 for (bank
= 0; bank
< bank_num
; bank
++)
2566 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2571 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2572 struct kvm_x86_mce
*mce
)
2574 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2575 unsigned bank_num
= mcg_cap
& 0xff;
2576 u64
*banks
= vcpu
->arch
.mce_banks
;
2578 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2581 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2582 * reporting is disabled
2584 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2585 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2587 banks
+= 4 * mce
->bank
;
2589 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2590 * reporting is disabled for the bank
2592 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2594 if (mce
->status
& MCI_STATUS_UC
) {
2595 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2596 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2597 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2600 if (banks
[1] & MCI_STATUS_VAL
)
2601 mce
->status
|= MCI_STATUS_OVER
;
2602 banks
[2] = mce
->addr
;
2603 banks
[3] = mce
->misc
;
2604 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2605 banks
[1] = mce
->status
;
2606 kvm_queue_exception(vcpu
, MC_VECTOR
);
2607 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2608 || !(banks
[1] & MCI_STATUS_UC
)) {
2609 if (banks
[1] & MCI_STATUS_VAL
)
2610 mce
->status
|= MCI_STATUS_OVER
;
2611 banks
[2] = mce
->addr
;
2612 banks
[3] = mce
->misc
;
2613 banks
[1] = mce
->status
;
2615 banks
[1] |= MCI_STATUS_OVER
;
2619 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2620 struct kvm_vcpu_events
*events
)
2622 events
->exception
.injected
=
2623 vcpu
->arch
.exception
.pending
&&
2624 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2625 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2626 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2627 events
->exception
.pad
= 0;
2628 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2630 events
->interrupt
.injected
=
2631 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2632 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2633 events
->interrupt
.soft
= 0;
2634 events
->interrupt
.shadow
=
2635 kvm_x86_ops
->get_interrupt_shadow(vcpu
,
2636 KVM_X86_SHADOW_INT_MOV_SS
| KVM_X86_SHADOW_INT_STI
);
2638 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2639 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
;
2640 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2641 events
->nmi
.pad
= 0;
2643 events
->sipi_vector
= vcpu
->arch
.sipi_vector
;
2645 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2646 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2647 | KVM_VCPUEVENT_VALID_SHADOW
);
2648 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2651 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2652 struct kvm_vcpu_events
*events
)
2654 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2655 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2656 | KVM_VCPUEVENT_VALID_SHADOW
))
2659 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2660 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2661 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2662 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2664 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2665 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2666 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2667 if (vcpu
->arch
.interrupt
.pending
&& irqchip_in_kernel(vcpu
->kvm
))
2668 kvm_pic_clear_isr_ack(vcpu
->kvm
);
2669 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2670 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2671 events
->interrupt
.shadow
);
2673 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2674 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2675 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2676 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2678 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
)
2679 vcpu
->arch
.sipi_vector
= events
->sipi_vector
;
2681 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2686 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
2687 struct kvm_debugregs
*dbgregs
)
2689 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
2690 dbgregs
->dr6
= vcpu
->arch
.dr6
;
2691 dbgregs
->dr7
= vcpu
->arch
.dr7
;
2693 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
2696 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
2697 struct kvm_debugregs
*dbgregs
)
2702 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
2703 vcpu
->arch
.dr6
= dbgregs
->dr6
;
2704 vcpu
->arch
.dr7
= dbgregs
->dr7
;
2709 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
2710 struct kvm_xsave
*guest_xsave
)
2713 memcpy(guest_xsave
->region
,
2714 &vcpu
->arch
.guest_fpu
.state
->xsave
,
2717 memcpy(guest_xsave
->region
,
2718 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
2719 sizeof(struct i387_fxsave_struct
));
2720 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
2725 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
2726 struct kvm_xsave
*guest_xsave
)
2729 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
2732 memcpy(&vcpu
->arch
.guest_fpu
.state
->xsave
,
2733 guest_xsave
->region
, xstate_size
);
2735 if (xstate_bv
& ~XSTATE_FPSSE
)
2737 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
2738 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
2743 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
2744 struct kvm_xcrs
*guest_xcrs
)
2746 if (!cpu_has_xsave
) {
2747 guest_xcrs
->nr_xcrs
= 0;
2751 guest_xcrs
->nr_xcrs
= 1;
2752 guest_xcrs
->flags
= 0;
2753 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
2754 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
2757 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
2758 struct kvm_xcrs
*guest_xcrs
)
2765 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
2768 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
2769 /* Only support XCR0 currently */
2770 if (guest_xcrs
->xcrs
[0].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
2771 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
2772 guest_xcrs
->xcrs
[0].value
);
2780 long kvm_arch_vcpu_ioctl(struct file
*filp
,
2781 unsigned int ioctl
, unsigned long arg
)
2783 struct kvm_vcpu
*vcpu
= filp
->private_data
;
2784 void __user
*argp
= (void __user
*)arg
;
2787 struct kvm_lapic_state
*lapic
;
2788 struct kvm_xsave
*xsave
;
2789 struct kvm_xcrs
*xcrs
;
2795 case KVM_GET_LAPIC
: {
2797 if (!vcpu
->arch
.apic
)
2799 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2804 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
2808 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
2813 case KVM_SET_LAPIC
: {
2815 if (!vcpu
->arch
.apic
)
2817 u
.lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2822 if (copy_from_user(u
.lapic
, argp
, sizeof(struct kvm_lapic_state
)))
2824 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
2830 case KVM_INTERRUPT
: {
2831 struct kvm_interrupt irq
;
2834 if (copy_from_user(&irq
, argp
, sizeof irq
))
2836 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
2843 r
= kvm_vcpu_ioctl_nmi(vcpu
);
2849 case KVM_SET_CPUID
: {
2850 struct kvm_cpuid __user
*cpuid_arg
= argp
;
2851 struct kvm_cpuid cpuid
;
2854 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2856 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
2861 case KVM_SET_CPUID2
: {
2862 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2863 struct kvm_cpuid2 cpuid
;
2866 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2868 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
2869 cpuid_arg
->entries
);
2874 case KVM_GET_CPUID2
: {
2875 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2876 struct kvm_cpuid2 cpuid
;
2879 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2881 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
2882 cpuid_arg
->entries
);
2886 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2892 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
2895 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
2897 case KVM_TPR_ACCESS_REPORTING
: {
2898 struct kvm_tpr_access_ctl tac
;
2901 if (copy_from_user(&tac
, argp
, sizeof tac
))
2903 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
2907 if (copy_to_user(argp
, &tac
, sizeof tac
))
2912 case KVM_SET_VAPIC_ADDR
: {
2913 struct kvm_vapic_addr va
;
2916 if (!irqchip_in_kernel(vcpu
->kvm
))
2919 if (copy_from_user(&va
, argp
, sizeof va
))
2922 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
2925 case KVM_X86_SETUP_MCE
: {
2929 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
2931 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
2934 case KVM_X86_SET_MCE
: {
2935 struct kvm_x86_mce mce
;
2938 if (copy_from_user(&mce
, argp
, sizeof mce
))
2940 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
2943 case KVM_GET_VCPU_EVENTS
: {
2944 struct kvm_vcpu_events events
;
2946 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
2949 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
2954 case KVM_SET_VCPU_EVENTS
: {
2955 struct kvm_vcpu_events events
;
2958 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
2961 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
2964 case KVM_GET_DEBUGREGS
: {
2965 struct kvm_debugregs dbgregs
;
2967 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
2970 if (copy_to_user(argp
, &dbgregs
,
2971 sizeof(struct kvm_debugregs
)))
2976 case KVM_SET_DEBUGREGS
: {
2977 struct kvm_debugregs dbgregs
;
2980 if (copy_from_user(&dbgregs
, argp
,
2981 sizeof(struct kvm_debugregs
)))
2984 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
2987 case KVM_GET_XSAVE
: {
2988 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
2993 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
2996 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3001 case KVM_SET_XSAVE
: {
3002 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3008 if (copy_from_user(u
.xsave
, argp
, sizeof(struct kvm_xsave
)))
3011 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3014 case KVM_GET_XCRS
: {
3015 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3020 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3023 if (copy_to_user(argp
, u
.xcrs
,
3024 sizeof(struct kvm_xcrs
)))
3029 case KVM_SET_XCRS
: {
3030 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3036 if (copy_from_user(u
.xcrs
, argp
,
3037 sizeof(struct kvm_xcrs
)))
3040 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3051 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3055 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3057 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3061 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3064 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3068 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3069 u32 kvm_nr_mmu_pages
)
3071 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3074 mutex_lock(&kvm
->slots_lock
);
3075 spin_lock(&kvm
->mmu_lock
);
3077 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3078 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3080 spin_unlock(&kvm
->mmu_lock
);
3081 mutex_unlock(&kvm
->slots_lock
);
3085 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3087 return kvm
->arch
.n_max_mmu_pages
;
3090 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3095 switch (chip
->chip_id
) {
3096 case KVM_IRQCHIP_PIC_MASTER
:
3097 memcpy(&chip
->chip
.pic
,
3098 &pic_irqchip(kvm
)->pics
[0],
3099 sizeof(struct kvm_pic_state
));
3101 case KVM_IRQCHIP_PIC_SLAVE
:
3102 memcpy(&chip
->chip
.pic
,
3103 &pic_irqchip(kvm
)->pics
[1],
3104 sizeof(struct kvm_pic_state
));
3106 case KVM_IRQCHIP_IOAPIC
:
3107 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3116 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3121 switch (chip
->chip_id
) {
3122 case KVM_IRQCHIP_PIC_MASTER
:
3123 spin_lock(&pic_irqchip(kvm
)->lock
);
3124 memcpy(&pic_irqchip(kvm
)->pics
[0],
3126 sizeof(struct kvm_pic_state
));
3127 spin_unlock(&pic_irqchip(kvm
)->lock
);
3129 case KVM_IRQCHIP_PIC_SLAVE
:
3130 spin_lock(&pic_irqchip(kvm
)->lock
);
3131 memcpy(&pic_irqchip(kvm
)->pics
[1],
3133 sizeof(struct kvm_pic_state
));
3134 spin_unlock(&pic_irqchip(kvm
)->lock
);
3136 case KVM_IRQCHIP_IOAPIC
:
3137 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3143 kvm_pic_update_irq(pic_irqchip(kvm
));
3147 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3151 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3152 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3153 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3157 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3161 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3162 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3163 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3164 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3168 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3172 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3173 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3174 sizeof(ps
->channels
));
3175 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3176 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3177 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3181 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3183 int r
= 0, start
= 0;
3184 u32 prev_legacy
, cur_legacy
;
3185 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3186 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3187 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3188 if (!prev_legacy
&& cur_legacy
)
3190 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3191 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3192 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3193 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3194 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3198 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3199 struct kvm_reinject_control
*control
)
3201 if (!kvm
->arch
.vpit
)
3203 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3204 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
3205 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3210 * Get (and clear) the dirty memory log for a memory slot.
3212 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
3213 struct kvm_dirty_log
*log
)
3216 struct kvm_memory_slot
*memslot
;
3218 unsigned long is_dirty
= 0;
3220 mutex_lock(&kvm
->slots_lock
);
3223 if (log
->slot
>= KVM_MEMORY_SLOTS
)
3226 memslot
= &kvm
->memslots
->memslots
[log
->slot
];
3228 if (!memslot
->dirty_bitmap
)
3231 n
= kvm_dirty_bitmap_bytes(memslot
);
3233 for (i
= 0; !is_dirty
&& i
< n
/sizeof(long); i
++)
3234 is_dirty
= memslot
->dirty_bitmap
[i
];
3236 /* If nothing is dirty, don't bother messing with page tables. */
3238 struct kvm_memslots
*slots
, *old_slots
;
3239 unsigned long *dirty_bitmap
;
3241 dirty_bitmap
= memslot
->dirty_bitmap_head
;
3242 if (memslot
->dirty_bitmap
== dirty_bitmap
)
3243 dirty_bitmap
+= n
/ sizeof(long);
3244 memset(dirty_bitmap
, 0, n
);
3247 slots
= kzalloc(sizeof(struct kvm_memslots
), GFP_KERNEL
);
3250 memcpy(slots
, kvm
->memslots
, sizeof(struct kvm_memslots
));
3251 slots
->memslots
[log
->slot
].dirty_bitmap
= dirty_bitmap
;
3252 slots
->generation
++;
3254 old_slots
= kvm
->memslots
;
3255 rcu_assign_pointer(kvm
->memslots
, slots
);
3256 synchronize_srcu_expedited(&kvm
->srcu
);
3257 dirty_bitmap
= old_slots
->memslots
[log
->slot
].dirty_bitmap
;
3260 spin_lock(&kvm
->mmu_lock
);
3261 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
3262 spin_unlock(&kvm
->mmu_lock
);
3265 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap
, n
))
3269 if (clear_user(log
->dirty_bitmap
, n
))
3275 mutex_unlock(&kvm
->slots_lock
);
3279 long kvm_arch_vm_ioctl(struct file
*filp
,
3280 unsigned int ioctl
, unsigned long arg
)
3282 struct kvm
*kvm
= filp
->private_data
;
3283 void __user
*argp
= (void __user
*)arg
;
3286 * This union makes it completely explicit to gcc-3.x
3287 * that these two variables' stack usage should be
3288 * combined, not added together.
3291 struct kvm_pit_state ps
;
3292 struct kvm_pit_state2 ps2
;
3293 struct kvm_pit_config pit_config
;
3297 case KVM_SET_TSS_ADDR
:
3298 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3302 case KVM_SET_IDENTITY_MAP_ADDR
: {
3306 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3308 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3313 case KVM_SET_NR_MMU_PAGES
:
3314 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3318 case KVM_GET_NR_MMU_PAGES
:
3319 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3321 case KVM_CREATE_IRQCHIP
: {
3322 struct kvm_pic
*vpic
;
3324 mutex_lock(&kvm
->lock
);
3327 goto create_irqchip_unlock
;
3329 vpic
= kvm_create_pic(kvm
);
3331 r
= kvm_ioapic_init(kvm
);
3333 mutex_lock(&kvm
->slots_lock
);
3334 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3336 mutex_unlock(&kvm
->slots_lock
);
3338 goto create_irqchip_unlock
;
3341 goto create_irqchip_unlock
;
3343 kvm
->arch
.vpic
= vpic
;
3345 r
= kvm_setup_default_irq_routing(kvm
);
3347 mutex_lock(&kvm
->slots_lock
);
3348 mutex_lock(&kvm
->irq_lock
);
3349 kvm_ioapic_destroy(kvm
);
3350 kvm_destroy_pic(kvm
);
3351 mutex_unlock(&kvm
->irq_lock
);
3352 mutex_unlock(&kvm
->slots_lock
);
3354 create_irqchip_unlock
:
3355 mutex_unlock(&kvm
->lock
);
3358 case KVM_CREATE_PIT
:
3359 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3361 case KVM_CREATE_PIT2
:
3363 if (copy_from_user(&u
.pit_config
, argp
,
3364 sizeof(struct kvm_pit_config
)))
3367 mutex_lock(&kvm
->slots_lock
);
3370 goto create_pit_unlock
;
3372 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3376 mutex_unlock(&kvm
->slots_lock
);
3378 case KVM_IRQ_LINE_STATUS
:
3379 case KVM_IRQ_LINE
: {
3380 struct kvm_irq_level irq_event
;
3383 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
3386 if (irqchip_in_kernel(kvm
)) {
3388 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3389 irq_event
.irq
, irq_event
.level
);
3390 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
3392 irq_event
.status
= status
;
3393 if (copy_to_user(argp
, &irq_event
,
3401 case KVM_GET_IRQCHIP
: {
3402 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3403 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
3409 if (copy_from_user(chip
, argp
, sizeof *chip
))
3410 goto get_irqchip_out
;
3412 if (!irqchip_in_kernel(kvm
))
3413 goto get_irqchip_out
;
3414 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3416 goto get_irqchip_out
;
3418 if (copy_to_user(argp
, chip
, sizeof *chip
))
3419 goto get_irqchip_out
;
3427 case KVM_SET_IRQCHIP
: {
3428 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3429 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
3435 if (copy_from_user(chip
, argp
, sizeof *chip
))
3436 goto set_irqchip_out
;
3438 if (!irqchip_in_kernel(kvm
))
3439 goto set_irqchip_out
;
3440 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3442 goto set_irqchip_out
;
3452 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3455 if (!kvm
->arch
.vpit
)
3457 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3461 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3468 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3471 if (!kvm
->arch
.vpit
)
3473 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3479 case KVM_GET_PIT2
: {
3481 if (!kvm
->arch
.vpit
)
3483 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3487 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3492 case KVM_SET_PIT2
: {
3494 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3497 if (!kvm
->arch
.vpit
)
3499 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3505 case KVM_REINJECT_CONTROL
: {
3506 struct kvm_reinject_control control
;
3508 if (copy_from_user(&control
, argp
, sizeof(control
)))
3510 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3516 case KVM_XEN_HVM_CONFIG
: {
3518 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3519 sizeof(struct kvm_xen_hvm_config
)))
3522 if (kvm
->arch
.xen_hvm_config
.flags
)
3527 case KVM_SET_CLOCK
: {
3528 struct kvm_clock_data user_ns
;
3533 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3541 local_irq_disable();
3542 now_ns
= get_kernel_ns();
3543 delta
= user_ns
.clock
- now_ns
;
3545 kvm
->arch
.kvmclock_offset
= delta
;
3548 case KVM_GET_CLOCK
: {
3549 struct kvm_clock_data user_ns
;
3552 local_irq_disable();
3553 now_ns
= get_kernel_ns();
3554 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3557 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
3560 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3573 static void kvm_init_msr_list(void)
3578 /* skip the first msrs in the list. KVM-specific */
3579 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3580 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3583 msrs_to_save
[j
] = msrs_to_save
[i
];
3586 num_msrs_to_save
= j
;
3589 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3592 if (vcpu
->arch
.apic
&&
3593 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
3596 return kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
3599 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3601 if (vcpu
->arch
.apic
&&
3602 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
3605 return kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
3608 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3609 struct kvm_segment
*var
, int seg
)
3611 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3614 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3615 struct kvm_segment
*var
, int seg
)
3617 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3620 static gpa_t
translate_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3625 static gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3628 struct x86_exception exception
;
3630 BUG_ON(!mmu_is_nested(vcpu
));
3632 /* NPT walks are always user-walks */
3633 access
|= PFERR_USER_MASK
;
3634 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, &exception
);
3639 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
3640 struct x86_exception
*exception
)
3642 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3643 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3646 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
3647 struct x86_exception
*exception
)
3649 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3650 access
|= PFERR_FETCH_MASK
;
3651 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3654 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
3655 struct x86_exception
*exception
)
3657 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3658 access
|= PFERR_WRITE_MASK
;
3659 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3662 /* uses this to access any guest's mapped memory without checking CPL */
3663 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
3664 struct x86_exception
*exception
)
3666 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
3669 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
3670 struct kvm_vcpu
*vcpu
, u32 access
,
3671 struct x86_exception
*exception
)
3674 int r
= X86EMUL_CONTINUE
;
3677 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
3679 unsigned offset
= addr
& (PAGE_SIZE
-1);
3680 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3683 if (gpa
== UNMAPPED_GVA
)
3684 return X86EMUL_PROPAGATE_FAULT
;
3685 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
3687 r
= X86EMUL_IO_NEEDED
;
3699 /* used for instruction fetching */
3700 static int kvm_fetch_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
3701 struct kvm_vcpu
*vcpu
,
3702 struct x86_exception
*exception
)
3704 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3705 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
,
3706 access
| PFERR_FETCH_MASK
,
3710 static int kvm_read_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
3711 struct kvm_vcpu
*vcpu
,
3712 struct x86_exception
*exception
)
3714 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3715 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
3719 static int kvm_read_guest_virt_system(gva_t addr
, void *val
, unsigned int bytes
,
3720 struct kvm_vcpu
*vcpu
,
3721 struct x86_exception
*exception
)
3723 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
3726 static int kvm_write_guest_virt_system(gva_t addr
, void *val
,
3728 struct kvm_vcpu
*vcpu
,
3729 struct x86_exception
*exception
)
3732 int r
= X86EMUL_CONTINUE
;
3735 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
3738 unsigned offset
= addr
& (PAGE_SIZE
-1);
3739 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3742 if (gpa
== UNMAPPED_GVA
)
3743 return X86EMUL_PROPAGATE_FAULT
;
3744 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
3746 r
= X86EMUL_IO_NEEDED
;
3758 static int emulator_read_emulated(unsigned long addr
,
3761 struct x86_exception
*exception
,
3762 struct kvm_vcpu
*vcpu
)
3766 if (vcpu
->mmio_read_completed
) {
3767 memcpy(val
, vcpu
->mmio_data
, bytes
);
3768 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
3769 vcpu
->mmio_phys_addr
, *(u64
*)val
);
3770 vcpu
->mmio_read_completed
= 0;
3771 return X86EMUL_CONTINUE
;
3774 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, addr
, exception
);
3776 if (gpa
== UNMAPPED_GVA
)
3777 return X86EMUL_PROPAGATE_FAULT
;
3779 /* For APIC access vmexit */
3780 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3783 if (kvm_read_guest_virt(addr
, val
, bytes
, vcpu
, exception
)
3784 == X86EMUL_CONTINUE
)
3785 return X86EMUL_CONTINUE
;
3789 * Is this MMIO handled locally?
3791 if (!vcpu_mmio_read(vcpu
, gpa
, bytes
, val
)) {
3792 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
, gpa
, *(u64
*)val
);
3793 return X86EMUL_CONTINUE
;
3796 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
3798 vcpu
->mmio_needed
= 1;
3799 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
3800 vcpu
->run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
= gpa
;
3801 vcpu
->run
->mmio
.len
= vcpu
->mmio_size
= bytes
;
3802 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= 0;
3804 return X86EMUL_IO_NEEDED
;
3807 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3808 const void *val
, int bytes
)
3812 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
3815 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
3819 static int emulator_write_emulated_onepage(unsigned long addr
,
3822 struct x86_exception
*exception
,
3823 struct kvm_vcpu
*vcpu
)
3827 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, exception
);
3829 if (gpa
== UNMAPPED_GVA
)
3830 return X86EMUL_PROPAGATE_FAULT
;
3832 /* For APIC access vmexit */
3833 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3836 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
3837 return X86EMUL_CONTINUE
;
3840 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
3842 * Is this MMIO handled locally?
3844 if (!vcpu_mmio_write(vcpu
, gpa
, bytes
, val
))
3845 return X86EMUL_CONTINUE
;
3847 vcpu
->mmio_needed
= 1;
3848 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
3849 vcpu
->run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
= gpa
;
3850 vcpu
->run
->mmio
.len
= vcpu
->mmio_size
= bytes
;
3851 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= 1;
3852 memcpy(vcpu
->run
->mmio
.data
, val
, bytes
);
3854 return X86EMUL_CONTINUE
;
3857 int emulator_write_emulated(unsigned long addr
,
3860 struct x86_exception
*exception
,
3861 struct kvm_vcpu
*vcpu
)
3863 /* Crossing a page boundary? */
3864 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
3867 now
= -addr
& ~PAGE_MASK
;
3868 rc
= emulator_write_emulated_onepage(addr
, val
, now
, exception
,
3870 if (rc
!= X86EMUL_CONTINUE
)
3876 return emulator_write_emulated_onepage(addr
, val
, bytes
, exception
,
3880 #define CMPXCHG_TYPE(t, ptr, old, new) \
3881 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3883 #ifdef CONFIG_X86_64
3884 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3886 # define CMPXCHG64(ptr, old, new) \
3887 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3890 static int emulator_cmpxchg_emulated(unsigned long addr
,
3894 struct x86_exception
*exception
,
3895 struct kvm_vcpu
*vcpu
)
3902 /* guests cmpxchg8b have to be emulated atomically */
3903 if (bytes
> 8 || (bytes
& (bytes
- 1)))
3906 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
3908 if (gpa
== UNMAPPED_GVA
||
3909 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3912 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
3915 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
3916 if (is_error_page(page
)) {
3917 kvm_release_page_clean(page
);
3921 kaddr
= kmap_atomic(page
, KM_USER0
);
3922 kaddr
+= offset_in_page(gpa
);
3925 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
3928 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
3931 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
3934 exchanged
= CMPXCHG64(kaddr
, old
, new);
3939 kunmap_atomic(kaddr
, KM_USER0
);
3940 kvm_release_page_dirty(page
);
3943 return X86EMUL_CMPXCHG_FAILED
;
3945 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
, 1);
3947 return X86EMUL_CONTINUE
;
3950 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
3952 return emulator_write_emulated(addr
, new, bytes
, exception
, vcpu
);
3955 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
3957 /* TODO: String I/O for in kernel device */
3960 if (vcpu
->arch
.pio
.in
)
3961 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
3962 vcpu
->arch
.pio
.size
, pd
);
3964 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
3965 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
3971 static int emulator_pio_in_emulated(int size
, unsigned short port
, void *val
,
3972 unsigned int count
, struct kvm_vcpu
*vcpu
)
3974 if (vcpu
->arch
.pio
.count
)
3977 trace_kvm_pio(0, port
, size
, count
);
3979 vcpu
->arch
.pio
.port
= port
;
3980 vcpu
->arch
.pio
.in
= 1;
3981 vcpu
->arch
.pio
.count
= count
;
3982 vcpu
->arch
.pio
.size
= size
;
3984 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3986 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
3987 vcpu
->arch
.pio
.count
= 0;
3991 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3992 vcpu
->run
->io
.direction
= KVM_EXIT_IO_IN
;
3993 vcpu
->run
->io
.size
= size
;
3994 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3995 vcpu
->run
->io
.count
= count
;
3996 vcpu
->run
->io
.port
= port
;
4001 static int emulator_pio_out_emulated(int size
, unsigned short port
,
4002 const void *val
, unsigned int count
,
4003 struct kvm_vcpu
*vcpu
)
4005 trace_kvm_pio(1, port
, size
, count
);
4007 vcpu
->arch
.pio
.port
= port
;
4008 vcpu
->arch
.pio
.in
= 0;
4009 vcpu
->arch
.pio
.count
= count
;
4010 vcpu
->arch
.pio
.size
= size
;
4012 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4014 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4015 vcpu
->arch
.pio
.count
= 0;
4019 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4020 vcpu
->run
->io
.direction
= KVM_EXIT_IO_OUT
;
4021 vcpu
->run
->io
.size
= size
;
4022 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4023 vcpu
->run
->io
.count
= count
;
4024 vcpu
->run
->io
.port
= port
;
4029 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4031 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4034 int emulate_invlpg(struct kvm_vcpu
*vcpu
, gva_t address
)
4036 kvm_mmu_invlpg(vcpu
, address
);
4037 return X86EMUL_CONTINUE
;
4040 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4042 if (!need_emulate_wbinvd(vcpu
))
4043 return X86EMUL_CONTINUE
;
4045 if (kvm_x86_ops
->has_wbinvd_exit()) {
4046 int cpu
= get_cpu();
4048 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4049 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4050 wbinvd_ipi
, NULL
, 1);
4052 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4055 return X86EMUL_CONTINUE
;
4057 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4059 int emulate_clts(struct kvm_vcpu
*vcpu
)
4061 kvm_x86_ops
->set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~X86_CR0_TS
));
4062 kvm_x86_ops
->fpu_activate(vcpu
);
4063 return X86EMUL_CONTINUE
;
4066 int emulator_get_dr(int dr
, unsigned long *dest
, struct kvm_vcpu
*vcpu
)
4068 return _kvm_get_dr(vcpu
, dr
, dest
);
4071 int emulator_set_dr(int dr
, unsigned long value
, struct kvm_vcpu
*vcpu
)
4074 return __kvm_set_dr(vcpu
, dr
, value
);
4077 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4079 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4082 static unsigned long emulator_get_cr(int cr
, struct kvm_vcpu
*vcpu
)
4084 unsigned long value
;
4088 value
= kvm_read_cr0(vcpu
);
4091 value
= vcpu
->arch
.cr2
;
4094 value
= kvm_read_cr3(vcpu
);
4097 value
= kvm_read_cr4(vcpu
);
4100 value
= kvm_get_cr8(vcpu
);
4103 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
4110 static int emulator_set_cr(int cr
, unsigned long val
, struct kvm_vcpu
*vcpu
)
4116 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4119 vcpu
->arch
.cr2
= val
;
4122 res
= kvm_set_cr3(vcpu
, val
);
4125 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4128 res
= kvm_set_cr8(vcpu
, val
);
4131 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
4138 static int emulator_get_cpl(struct kvm_vcpu
*vcpu
)
4140 return kvm_x86_ops
->get_cpl(vcpu
);
4143 static void emulator_get_gdt(struct desc_ptr
*dt
, struct kvm_vcpu
*vcpu
)
4145 kvm_x86_ops
->get_gdt(vcpu
, dt
);
4148 static void emulator_get_idt(struct desc_ptr
*dt
, struct kvm_vcpu
*vcpu
)
4150 kvm_x86_ops
->get_idt(vcpu
, dt
);
4153 static unsigned long emulator_get_cached_segment_base(int seg
,
4154 struct kvm_vcpu
*vcpu
)
4156 return get_segment_base(vcpu
, seg
);
4159 static bool emulator_get_cached_descriptor(struct desc_struct
*desc
, int seg
,
4160 struct kvm_vcpu
*vcpu
)
4162 struct kvm_segment var
;
4164 kvm_get_segment(vcpu
, &var
, seg
);
4171 set_desc_limit(desc
, var
.limit
);
4172 set_desc_base(desc
, (unsigned long)var
.base
);
4173 desc
->type
= var
.type
;
4175 desc
->dpl
= var
.dpl
;
4176 desc
->p
= var
.present
;
4177 desc
->avl
= var
.avl
;
4185 static void emulator_set_cached_descriptor(struct desc_struct
*desc
, int seg
,
4186 struct kvm_vcpu
*vcpu
)
4188 struct kvm_segment var
;
4190 /* needed to preserve selector */
4191 kvm_get_segment(vcpu
, &var
, seg
);
4193 var
.base
= get_desc_base(desc
);
4194 var
.limit
= get_desc_limit(desc
);
4196 var
.limit
= (var
.limit
<< 12) | 0xfff;
4197 var
.type
= desc
->type
;
4198 var
.present
= desc
->p
;
4199 var
.dpl
= desc
->dpl
;
4204 var
.avl
= desc
->avl
;
4205 var
.present
= desc
->p
;
4206 var
.unusable
= !var
.present
;
4209 kvm_set_segment(vcpu
, &var
, seg
);
4213 static u16
emulator_get_segment_selector(int seg
, struct kvm_vcpu
*vcpu
)
4215 struct kvm_segment kvm_seg
;
4217 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4218 return kvm_seg
.selector
;
4221 static void emulator_set_segment_selector(u16 sel
, int seg
,
4222 struct kvm_vcpu
*vcpu
)
4224 struct kvm_segment kvm_seg
;
4226 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4227 kvm_seg
.selector
= sel
;
4228 kvm_set_segment(vcpu
, &kvm_seg
, seg
);
4231 static struct x86_emulate_ops emulate_ops
= {
4232 .read_std
= kvm_read_guest_virt_system
,
4233 .write_std
= kvm_write_guest_virt_system
,
4234 .fetch
= kvm_fetch_guest_virt
,
4235 .read_emulated
= emulator_read_emulated
,
4236 .write_emulated
= emulator_write_emulated
,
4237 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4238 .pio_in_emulated
= emulator_pio_in_emulated
,
4239 .pio_out_emulated
= emulator_pio_out_emulated
,
4240 .get_cached_descriptor
= emulator_get_cached_descriptor
,
4241 .set_cached_descriptor
= emulator_set_cached_descriptor
,
4242 .get_segment_selector
= emulator_get_segment_selector
,
4243 .set_segment_selector
= emulator_set_segment_selector
,
4244 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4245 .get_gdt
= emulator_get_gdt
,
4246 .get_idt
= emulator_get_idt
,
4247 .get_cr
= emulator_get_cr
,
4248 .set_cr
= emulator_set_cr
,
4249 .cpl
= emulator_get_cpl
,
4250 .get_dr
= emulator_get_dr
,
4251 .set_dr
= emulator_set_dr
,
4252 .set_msr
= kvm_set_msr
,
4253 .get_msr
= kvm_get_msr
,
4256 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
4258 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4259 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4260 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
4261 vcpu
->arch
.regs_dirty
= ~0;
4264 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4266 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
, mask
);
4268 * an sti; sti; sequence only disable interrupts for the first
4269 * instruction. So, if the last instruction, be it emulated or
4270 * not, left the system with the INT_STI flag enabled, it
4271 * means that the last instruction is an sti. We should not
4272 * leave the flag on in this case. The same goes for mov ss
4274 if (!(int_shadow
& mask
))
4275 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4278 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4280 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4281 if (ctxt
->exception
.vector
== PF_VECTOR
)
4282 kvm_propagate_fault(vcpu
, &ctxt
->exception
);
4283 else if (ctxt
->exception
.error_code_valid
)
4284 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
4285 ctxt
->exception
.error_code
);
4287 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
4290 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4292 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4295 cache_all_regs(vcpu
);
4297 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4299 vcpu
->arch
.emulate_ctxt
.vcpu
= vcpu
;
4300 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_x86_ops
->get_rflags(vcpu
);
4301 vcpu
->arch
.emulate_ctxt
.eip
= kvm_rip_read(vcpu
);
4302 vcpu
->arch
.emulate_ctxt
.mode
=
4303 (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4304 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
4305 ? X86EMUL_MODE_VM86
: cs_l
4306 ? X86EMUL_MODE_PROT64
: cs_db
4307 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
4308 memset(c
, 0, sizeof(struct decode_cache
));
4309 memcpy(c
->regs
, vcpu
->arch
.regs
, sizeof c
->regs
);
4312 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
)
4314 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4317 init_emulate_ctxt(vcpu
);
4319 vcpu
->arch
.emulate_ctxt
.decode
.op_bytes
= 2;
4320 vcpu
->arch
.emulate_ctxt
.decode
.ad_bytes
= 2;
4321 vcpu
->arch
.emulate_ctxt
.decode
.eip
= vcpu
->arch
.emulate_ctxt
.eip
;
4322 ret
= emulate_int_real(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
, irq
);
4324 if (ret
!= X86EMUL_CONTINUE
)
4325 return EMULATE_FAIL
;
4327 vcpu
->arch
.emulate_ctxt
.eip
= c
->eip
;
4328 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
4329 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
4330 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
4332 if (irq
== NMI_VECTOR
)
4333 vcpu
->arch
.nmi_pending
= false;
4335 vcpu
->arch
.interrupt
.pending
= false;
4337 return EMULATE_DONE
;
4339 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4341 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4343 int r
= EMULATE_DONE
;
4345 ++vcpu
->stat
.insn_emulation_fail
;
4346 trace_kvm_emulate_insn_failed(vcpu
);
4347 if (!is_guest_mode(vcpu
)) {
4348 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4349 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4350 vcpu
->run
->internal
.ndata
= 0;
4353 kvm_queue_exception(vcpu
, UD_VECTOR
);
4358 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t gva
)
4366 * if emulation was due to access to shadowed page table
4367 * and it failed try to unshadow page and re-entetr the
4368 * guest to let CPU execute the instruction.
4370 if (kvm_mmu_unprotect_page_virt(vcpu
, gva
))
4373 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, gva
, NULL
);
4375 if (gpa
== UNMAPPED_GVA
)
4376 return true; /* let cpu generate fault */
4378 if (!kvm_is_error_hva(gfn_to_hva(vcpu
->kvm
, gpa
>> PAGE_SHIFT
)))
4384 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
4391 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4393 kvm_clear_exception_queue(vcpu
);
4394 vcpu
->arch
.mmio_fault_cr2
= cr2
;
4396 * TODO: fix emulate.c to use guest_read/write_register
4397 * instead of direct ->regs accesses, can save hundred cycles
4398 * on Intel for instructions that don't read/change RSP, for
4401 cache_all_regs(vcpu
);
4403 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
4404 init_emulate_ctxt(vcpu
);
4405 vcpu
->arch
.emulate_ctxt
.interruptibility
= 0;
4406 vcpu
->arch
.emulate_ctxt
.have_exception
= false;
4407 vcpu
->arch
.emulate_ctxt
.perm_ok
= false;
4409 r
= x86_decode_insn(&vcpu
->arch
.emulate_ctxt
, insn
, insn_len
);
4410 if (r
== X86EMUL_PROPAGATE_FAULT
)
4413 trace_kvm_emulate_insn_start(vcpu
);
4415 /* Only allow emulation of specific instructions on #UD
4416 * (namely VMMCALL, sysenter, sysexit, syscall)*/
4417 if (emulation_type
& EMULTYPE_TRAP_UD
) {
4419 return EMULATE_FAIL
;
4421 case 0x01: /* VMMCALL */
4422 if (c
->modrm_mod
!= 3 || c
->modrm_rm
!= 1)
4423 return EMULATE_FAIL
;
4425 case 0x34: /* sysenter */
4426 case 0x35: /* sysexit */
4427 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
4428 return EMULATE_FAIL
;
4430 case 0x05: /* syscall */
4431 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
4432 return EMULATE_FAIL
;
4435 return EMULATE_FAIL
;
4438 if (!(c
->modrm_reg
== 0 || c
->modrm_reg
== 3))
4439 return EMULATE_FAIL
;
4442 ++vcpu
->stat
.insn_emulation
;
4444 if (reexecute_instruction(vcpu
, cr2
))
4445 return EMULATE_DONE
;
4446 if (emulation_type
& EMULTYPE_SKIP
)
4447 return EMULATE_FAIL
;
4448 return handle_emulation_failure(vcpu
);
4452 if (emulation_type
& EMULTYPE_SKIP
) {
4453 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.decode
.eip
);
4454 return EMULATE_DONE
;
4457 /* this is needed for vmware backdor interface to work since it
4458 changes registers values during IO operation */
4459 memcpy(c
->regs
, vcpu
->arch
.regs
, sizeof c
->regs
);
4462 r
= x86_emulate_insn(&vcpu
->arch
.emulate_ctxt
);
4464 if (r
== EMULATION_FAILED
) {
4465 if (reexecute_instruction(vcpu
, cr2
))
4466 return EMULATE_DONE
;
4468 return handle_emulation_failure(vcpu
);
4472 if (vcpu
->arch
.emulate_ctxt
.have_exception
) {
4473 inject_emulated_exception(vcpu
);
4475 } else if (vcpu
->arch
.pio
.count
) {
4476 if (!vcpu
->arch
.pio
.in
)
4477 vcpu
->arch
.pio
.count
= 0;
4478 r
= EMULATE_DO_MMIO
;
4479 } else if (vcpu
->mmio_needed
) {
4480 if (vcpu
->mmio_is_write
)
4481 vcpu
->mmio_needed
= 0;
4482 r
= EMULATE_DO_MMIO
;
4483 } else if (r
== EMULATION_RESTART
)
4488 toggle_interruptibility(vcpu
, vcpu
->arch
.emulate_ctxt
.interruptibility
);
4489 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
4490 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4491 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
4492 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
4496 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
4498 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
4500 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4501 int ret
= emulator_pio_out_emulated(size
, port
, &val
, 1, vcpu
);
4502 /* do not return to emulator after return from userspace */
4503 vcpu
->arch
.pio
.count
= 0;
4506 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
4508 static void tsc_bad(void *info
)
4510 __this_cpu_write(cpu_tsc_khz
, 0);
4513 static void tsc_khz_changed(void *data
)
4515 struct cpufreq_freqs
*freq
= data
;
4516 unsigned long khz
= 0;
4520 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4521 khz
= cpufreq_quick_get(raw_smp_processor_id());
4524 __this_cpu_write(cpu_tsc_khz
, khz
);
4527 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
4530 struct cpufreq_freqs
*freq
= data
;
4532 struct kvm_vcpu
*vcpu
;
4533 int i
, send_ipi
= 0;
4536 * We allow guests to temporarily run on slowing clocks,
4537 * provided we notify them after, or to run on accelerating
4538 * clocks, provided we notify them before. Thus time never
4541 * However, we have a problem. We can't atomically update
4542 * the frequency of a given CPU from this function; it is
4543 * merely a notifier, which can be called from any CPU.
4544 * Changing the TSC frequency at arbitrary points in time
4545 * requires a recomputation of local variables related to
4546 * the TSC for each VCPU. We must flag these local variables
4547 * to be updated and be sure the update takes place with the
4548 * new frequency before any guests proceed.
4550 * Unfortunately, the combination of hotplug CPU and frequency
4551 * change creates an intractable locking scenario; the order
4552 * of when these callouts happen is undefined with respect to
4553 * CPU hotplug, and they can race with each other. As such,
4554 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4555 * undefined; you can actually have a CPU frequency change take
4556 * place in between the computation of X and the setting of the
4557 * variable. To protect against this problem, all updates of
4558 * the per_cpu tsc_khz variable are done in an interrupt
4559 * protected IPI, and all callers wishing to update the value
4560 * must wait for a synchronous IPI to complete (which is trivial
4561 * if the caller is on the CPU already). This establishes the
4562 * necessary total order on variable updates.
4564 * Note that because a guest time update may take place
4565 * anytime after the setting of the VCPU's request bit, the
4566 * correct TSC value must be set before the request. However,
4567 * to ensure the update actually makes it to any guest which
4568 * starts running in hardware virtualization between the set
4569 * and the acquisition of the spinlock, we must also ping the
4570 * CPU after setting the request bit.
4574 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
4576 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
4579 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4581 spin_lock(&kvm_lock
);
4582 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
4583 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
4584 if (vcpu
->cpu
!= freq
->cpu
)
4586 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4587 if (vcpu
->cpu
!= smp_processor_id())
4591 spin_unlock(&kvm_lock
);
4593 if (freq
->old
< freq
->new && send_ipi
) {
4595 * We upscale the frequency. Must make the guest
4596 * doesn't see old kvmclock values while running with
4597 * the new frequency, otherwise we risk the guest sees
4598 * time go backwards.
4600 * In case we update the frequency for another cpu
4601 * (which might be in guest context) send an interrupt
4602 * to kick the cpu out of guest context. Next time
4603 * guest context is entered kvmclock will be updated,
4604 * so the guest will not see stale values.
4606 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4611 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
4612 .notifier_call
= kvmclock_cpufreq_notifier
4615 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
4616 unsigned long action
, void *hcpu
)
4618 unsigned int cpu
= (unsigned long)hcpu
;
4622 case CPU_DOWN_FAILED
:
4623 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4625 case CPU_DOWN_PREPARE
:
4626 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
4632 static struct notifier_block kvmclock_cpu_notifier_block
= {
4633 .notifier_call
= kvmclock_cpu_notifier
,
4634 .priority
= -INT_MAX
4637 static void kvm_timer_init(void)
4641 max_tsc_khz
= tsc_khz
;
4642 register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4643 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
4644 #ifdef CONFIG_CPU_FREQ
4645 struct cpufreq_policy policy
;
4646 memset(&policy
, 0, sizeof(policy
));
4648 cpufreq_get_policy(&policy
, cpu
);
4649 if (policy
.cpuinfo
.max_freq
)
4650 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
4653 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
4654 CPUFREQ_TRANSITION_NOTIFIER
);
4656 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
4657 for_each_online_cpu(cpu
)
4658 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4661 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
4663 static int kvm_is_in_guest(void)
4665 return percpu_read(current_vcpu
) != NULL
;
4668 static int kvm_is_user_mode(void)
4672 if (percpu_read(current_vcpu
))
4673 user_mode
= kvm_x86_ops
->get_cpl(percpu_read(current_vcpu
));
4675 return user_mode
!= 0;
4678 static unsigned long kvm_get_guest_ip(void)
4680 unsigned long ip
= 0;
4682 if (percpu_read(current_vcpu
))
4683 ip
= kvm_rip_read(percpu_read(current_vcpu
));
4688 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
4689 .is_in_guest
= kvm_is_in_guest
,
4690 .is_user_mode
= kvm_is_user_mode
,
4691 .get_guest_ip
= kvm_get_guest_ip
,
4694 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
4696 percpu_write(current_vcpu
, vcpu
);
4698 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
4700 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
4702 percpu_write(current_vcpu
, NULL
);
4704 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
4706 int kvm_arch_init(void *opaque
)
4709 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
4712 printk(KERN_ERR
"kvm: already loaded the other module\n");
4717 if (!ops
->cpu_has_kvm_support()) {
4718 printk(KERN_ERR
"kvm: no hardware support\n");
4722 if (ops
->disabled_by_bios()) {
4723 printk(KERN_ERR
"kvm: disabled by bios\n");
4728 r
= kvm_mmu_module_init();
4732 kvm_init_msr_list();
4735 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4736 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
4737 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
4741 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
4744 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
4752 void kvm_arch_exit(void)
4754 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
4756 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4757 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
4758 CPUFREQ_TRANSITION_NOTIFIER
);
4759 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4761 kvm_mmu_module_exit();
4764 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
4766 ++vcpu
->stat
.halt_exits
;
4767 if (irqchip_in_kernel(vcpu
->kvm
)) {
4768 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
4771 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
4775 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
4777 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
4780 if (is_long_mode(vcpu
))
4783 return a0
| ((gpa_t
)a1
<< 32);
4786 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
4788 u64 param
, ingpa
, outgpa
, ret
;
4789 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
4790 bool fast
, longmode
;
4794 * hypercall generates UD from non zero cpl and real mode
4797 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
4798 kvm_queue_exception(vcpu
, UD_VECTOR
);
4802 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4803 longmode
= is_long_mode(vcpu
) && cs_l
== 1;
4806 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
4807 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
4808 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
4809 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
4810 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
4811 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
4813 #ifdef CONFIG_X86_64
4815 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4816 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4817 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
4821 code
= param
& 0xffff;
4822 fast
= (param
>> 16) & 0x1;
4823 rep_cnt
= (param
>> 32) & 0xfff;
4824 rep_idx
= (param
>> 48) & 0xfff;
4826 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
4829 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
4830 kvm_vcpu_on_spin(vcpu
);
4833 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
4837 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
4839 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
4841 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
4842 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
4848 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
4850 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
4853 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
4854 return kvm_hv_hypercall(vcpu
);
4856 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4857 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4858 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4859 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4860 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4862 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
4864 if (!is_long_mode(vcpu
)) {
4872 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
4878 case KVM_HC_VAPIC_POLL_IRQ
:
4882 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
4889 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
4890 ++vcpu
->stat
.hypercalls
;
4893 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
4895 int kvm_fix_hypercall(struct kvm_vcpu
*vcpu
)
4897 char instruction
[3];
4898 unsigned long rip
= kvm_rip_read(vcpu
);
4901 * Blow out the MMU to ensure that no other VCPU has an active mapping
4902 * to ensure that the updated hypercall appears atomically across all
4905 kvm_mmu_zap_all(vcpu
->kvm
);
4907 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
4909 return emulator_write_emulated(rip
, instruction
, 3, NULL
, vcpu
);
4912 void realmode_lgdt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
4914 struct desc_ptr dt
= { limit
, base
};
4916 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
4919 void realmode_lidt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
4921 struct desc_ptr dt
= { limit
, base
};
4923 kvm_x86_ops
->set_idt(vcpu
, &dt
);
4926 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
4928 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
4929 int j
, nent
= vcpu
->arch
.cpuid_nent
;
4931 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
4932 /* when no next entry is found, the current entry[i] is reselected */
4933 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
4934 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
4935 if (ej
->function
== e
->function
) {
4936 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
4940 return 0; /* silence gcc, even though control never reaches here */
4943 /* find an entry with matching function, matching index (if needed), and that
4944 * should be read next (if it's stateful) */
4945 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
4946 u32 function
, u32 index
)
4948 if (e
->function
!= function
)
4950 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
4952 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
4953 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
4958 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
4959 u32 function
, u32 index
)
4962 struct kvm_cpuid_entry2
*best
= NULL
;
4964 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
4965 struct kvm_cpuid_entry2
*e
;
4967 e
= &vcpu
->arch
.cpuid_entries
[i
];
4968 if (is_matching_cpuid_entry(e
, function
, index
)) {
4969 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
4970 move_to_next_stateful_cpuid_entry(vcpu
, i
);
4975 * Both basic or both extended?
4977 if (((e
->function
^ function
) & 0x80000000) == 0)
4978 if (!best
|| e
->function
> best
->function
)
4983 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry
);
4985 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
4987 struct kvm_cpuid_entry2
*best
;
4989 best
= kvm_find_cpuid_entry(vcpu
, 0x80000000, 0);
4990 if (!best
|| best
->eax
< 0x80000008)
4992 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
4994 return best
->eax
& 0xff;
4999 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
5001 u32 function
, index
;
5002 struct kvm_cpuid_entry2
*best
;
5004 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5005 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5006 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
5007 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
5008 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
5009 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
5010 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
5012 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
5013 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
5014 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
5015 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
5017 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5018 trace_kvm_cpuid(function
,
5019 kvm_register_read(vcpu
, VCPU_REGS_RAX
),
5020 kvm_register_read(vcpu
, VCPU_REGS_RBX
),
5021 kvm_register_read(vcpu
, VCPU_REGS_RCX
),
5022 kvm_register_read(vcpu
, VCPU_REGS_RDX
));
5024 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
5027 * Check if userspace requested an interrupt window, and that the
5028 * interrupt window is open.
5030 * No need to exit to userspace if we already have an interrupt queued.
5032 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5034 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
5035 vcpu
->run
->request_interrupt_window
&&
5036 kvm_arch_interrupt_allowed(vcpu
));
5039 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5041 struct kvm_run
*kvm_run
= vcpu
->run
;
5043 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5044 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
5045 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
5046 if (irqchip_in_kernel(vcpu
->kvm
))
5047 kvm_run
->ready_for_interrupt_injection
= 1;
5049 kvm_run
->ready_for_interrupt_injection
=
5050 kvm_arch_interrupt_allowed(vcpu
) &&
5051 !kvm_cpu_has_interrupt(vcpu
) &&
5052 !kvm_event_needs_reinjection(vcpu
);
5055 static void vapic_enter(struct kvm_vcpu
*vcpu
)
5057 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5060 if (!apic
|| !apic
->vapic_addr
)
5063 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5065 vcpu
->arch
.apic
->vapic_page
= page
;
5068 static void vapic_exit(struct kvm_vcpu
*vcpu
)
5070 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5073 if (!apic
|| !apic
->vapic_addr
)
5076 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5077 kvm_release_page_dirty(apic
->vapic_page
);
5078 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5079 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5082 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5086 if (!kvm_x86_ops
->update_cr8_intercept
)
5089 if (!vcpu
->arch
.apic
)
5092 if (!vcpu
->arch
.apic
->vapic_addr
)
5093 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5100 tpr
= kvm_lapic_get_cr8(vcpu
);
5102 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5105 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
5107 /* try to reinject previous events if any */
5108 if (vcpu
->arch
.exception
.pending
) {
5109 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5110 vcpu
->arch
.exception
.has_error_code
,
5111 vcpu
->arch
.exception
.error_code
);
5112 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5113 vcpu
->arch
.exception
.has_error_code
,
5114 vcpu
->arch
.exception
.error_code
,
5115 vcpu
->arch
.exception
.reinject
);
5119 if (vcpu
->arch
.nmi_injected
) {
5120 kvm_x86_ops
->set_nmi(vcpu
);
5124 if (vcpu
->arch
.interrupt
.pending
) {
5125 kvm_x86_ops
->set_irq(vcpu
);
5129 /* try to inject new event if pending */
5130 if (vcpu
->arch
.nmi_pending
) {
5131 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5132 vcpu
->arch
.nmi_pending
= false;
5133 vcpu
->arch
.nmi_injected
= true;
5134 kvm_x86_ops
->set_nmi(vcpu
);
5136 } else if (kvm_cpu_has_interrupt(vcpu
)) {
5137 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5138 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5140 kvm_x86_ops
->set_irq(vcpu
);
5145 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
5147 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
5148 !vcpu
->guest_xcr0_loaded
) {
5149 /* kvm_set_xcr() also depends on this */
5150 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
5151 vcpu
->guest_xcr0_loaded
= 1;
5155 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
5157 if (vcpu
->guest_xcr0_loaded
) {
5158 if (vcpu
->arch
.xcr0
!= host_xcr0
)
5159 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
5160 vcpu
->guest_xcr0_loaded
= 0;
5164 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
5167 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
5168 vcpu
->run
->request_interrupt_window
;
5170 if (vcpu
->requests
) {
5171 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
5172 kvm_mmu_unload(vcpu
);
5173 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
5174 __kvm_migrate_timers(vcpu
);
5175 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
5176 r
= kvm_guest_time_update(vcpu
);
5180 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
5181 kvm_mmu_sync_roots(vcpu
);
5182 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
5183 kvm_x86_ops
->tlb_flush(vcpu
);
5184 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
5185 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
5189 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
5190 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
5194 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
5195 vcpu
->fpu_active
= 0;
5196 kvm_x86_ops
->fpu_deactivate(vcpu
);
5198 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
5199 /* Page is swapped out. Do synthetic halt */
5200 vcpu
->arch
.apf
.halted
= true;
5206 r
= kvm_mmu_reload(vcpu
);
5210 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
5211 inject_pending_event(vcpu
);
5213 /* enable NMI/IRQ window open exits if needed */
5214 if (vcpu
->arch
.nmi_pending
)
5215 kvm_x86_ops
->enable_nmi_window(vcpu
);
5216 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
5217 kvm_x86_ops
->enable_irq_window(vcpu
);
5219 if (kvm_lapic_enabled(vcpu
)) {
5220 update_cr8_intercept(vcpu
);
5221 kvm_lapic_sync_to_vapic(vcpu
);
5227 kvm_x86_ops
->prepare_guest_switch(vcpu
);
5228 if (vcpu
->fpu_active
)
5229 kvm_load_guest_fpu(vcpu
);
5230 kvm_load_guest_xcr0(vcpu
);
5232 vcpu
->mode
= IN_GUEST_MODE
;
5234 /* We should set ->mode before check ->requests,
5235 * see the comment in make_all_cpus_request.
5239 local_irq_disable();
5241 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
5242 || need_resched() || signal_pending(current
)) {
5243 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
5247 kvm_x86_ops
->cancel_injection(vcpu
);
5252 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5256 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
5258 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
5259 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
5260 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
5261 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
5264 trace_kvm_entry(vcpu
->vcpu_id
);
5265 kvm_x86_ops
->run(vcpu
);
5268 * If the guest has used debug registers, at least dr7
5269 * will be disabled while returning to the host.
5270 * If we don't have active breakpoints in the host, we don't
5271 * care about the messed up debug address registers. But if
5272 * we have some of them active, restore the old state.
5274 if (hw_breakpoint_active())
5275 hw_breakpoint_restore();
5277 kvm_get_msr(vcpu
, MSR_IA32_TSC
, &vcpu
->arch
.last_guest_tsc
);
5279 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
5286 * We must have an instruction between local_irq_enable() and
5287 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5288 * the interrupt shadow. The stat.exits increment will do nicely.
5289 * But we need to prevent reordering, hence this barrier():
5297 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5300 * Profile KVM exit RIPs:
5302 if (unlikely(prof_on
== KVM_PROFILING
)) {
5303 unsigned long rip
= kvm_rip_read(vcpu
);
5304 profile_hit(KVM_PROFILING
, (void *)rip
);
5308 kvm_lapic_sync_from_vapic(vcpu
);
5310 r
= kvm_x86_ops
->handle_exit(vcpu
);
5316 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
5319 struct kvm
*kvm
= vcpu
->kvm
;
5321 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
5322 pr_debug("vcpu %d received sipi with vector # %x\n",
5323 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
5324 kvm_lapic_reset(vcpu
);
5325 r
= kvm_arch_vcpu_reset(vcpu
);
5328 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5331 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5336 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
5337 !vcpu
->arch
.apf
.halted
)
5338 r
= vcpu_enter_guest(vcpu
);
5340 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5341 kvm_vcpu_block(vcpu
);
5342 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5343 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
5345 switch(vcpu
->arch
.mp_state
) {
5346 case KVM_MP_STATE_HALTED
:
5347 vcpu
->arch
.mp_state
=
5348 KVM_MP_STATE_RUNNABLE
;
5349 case KVM_MP_STATE_RUNNABLE
:
5350 vcpu
->arch
.apf
.halted
= false;
5352 case KVM_MP_STATE_SIPI_RECEIVED
:
5363 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
5364 if (kvm_cpu_has_pending_timer(vcpu
))
5365 kvm_inject_pending_timer_irqs(vcpu
);
5367 if (dm_request_for_irq_injection(vcpu
)) {
5369 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5370 ++vcpu
->stat
.request_irq_exits
;
5373 kvm_check_async_pf_completion(vcpu
);
5375 if (signal_pending(current
)) {
5377 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5378 ++vcpu
->stat
.signal_exits
;
5380 if (need_resched()) {
5381 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5383 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5387 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5394 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
5399 if (!tsk_used_math(current
) && init_fpu(current
))
5402 if (vcpu
->sigset_active
)
5403 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
5405 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
5406 kvm_vcpu_block(vcpu
);
5407 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
5412 /* re-sync apic's tpr */
5413 if (!irqchip_in_kernel(vcpu
->kvm
)) {
5414 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
5420 if (vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
) {
5421 if (vcpu
->mmio_needed
) {
5422 memcpy(vcpu
->mmio_data
, kvm_run
->mmio
.data
, 8);
5423 vcpu
->mmio_read_completed
= 1;
5424 vcpu
->mmio_needed
= 0;
5426 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5427 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
5428 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5429 if (r
!= EMULATE_DONE
) {
5434 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
5435 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
5436 kvm_run
->hypercall
.ret
);
5438 r
= __vcpu_run(vcpu
);
5441 post_kvm_run_save(vcpu
);
5442 if (vcpu
->sigset_active
)
5443 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
5448 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5450 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5451 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5452 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5453 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5454 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5455 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
5456 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
5457 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
5458 #ifdef CONFIG_X86_64
5459 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5460 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
5461 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
5462 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
5463 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
5464 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
5465 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
5466 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
5469 regs
->rip
= kvm_rip_read(vcpu
);
5470 regs
->rflags
= kvm_get_rflags(vcpu
);
5475 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5477 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
5478 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
5479 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
5480 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
5481 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
5482 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
5483 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
5484 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
5485 #ifdef CONFIG_X86_64
5486 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
5487 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
5488 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
5489 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
5490 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
5491 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
5492 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
5493 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
5496 kvm_rip_write(vcpu
, regs
->rip
);
5497 kvm_set_rflags(vcpu
, regs
->rflags
);
5499 vcpu
->arch
.exception
.pending
= false;
5501 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5506 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
5508 struct kvm_segment cs
;
5510 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
5514 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
5516 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
5517 struct kvm_sregs
*sregs
)
5521 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5522 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5523 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5524 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5525 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5526 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5528 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5529 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5531 kvm_x86_ops
->get_idt(vcpu
, &dt
);
5532 sregs
->idt
.limit
= dt
.size
;
5533 sregs
->idt
.base
= dt
.address
;
5534 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
5535 sregs
->gdt
.limit
= dt
.size
;
5536 sregs
->gdt
.base
= dt
.address
;
5538 sregs
->cr0
= kvm_read_cr0(vcpu
);
5539 sregs
->cr2
= vcpu
->arch
.cr2
;
5540 sregs
->cr3
= kvm_read_cr3(vcpu
);
5541 sregs
->cr4
= kvm_read_cr4(vcpu
);
5542 sregs
->cr8
= kvm_get_cr8(vcpu
);
5543 sregs
->efer
= vcpu
->arch
.efer
;
5544 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
5546 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
5548 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
5549 set_bit(vcpu
->arch
.interrupt
.nr
,
5550 (unsigned long *)sregs
->interrupt_bitmap
);
5555 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
5556 struct kvm_mp_state
*mp_state
)
5558 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
5562 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
5563 struct kvm_mp_state
*mp_state
)
5565 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
5566 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5570 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
,
5571 bool has_error_code
, u32 error_code
)
5573 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
5576 init_emulate_ctxt(vcpu
);
5578 ret
= emulator_task_switch(&vcpu
->arch
.emulate_ctxt
,
5579 tss_selector
, reason
, has_error_code
,
5583 return EMULATE_FAIL
;
5585 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
5586 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
5587 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
5588 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5589 return EMULATE_DONE
;
5591 EXPORT_SYMBOL_GPL(kvm_task_switch
);
5593 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
5594 struct kvm_sregs
*sregs
)
5596 int mmu_reset_needed
= 0;
5597 int pending_vec
, max_bits
, idx
;
5600 dt
.size
= sregs
->idt
.limit
;
5601 dt
.address
= sregs
->idt
.base
;
5602 kvm_x86_ops
->set_idt(vcpu
, &dt
);
5603 dt
.size
= sregs
->gdt
.limit
;
5604 dt
.address
= sregs
->gdt
.base
;
5605 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
5607 vcpu
->arch
.cr2
= sregs
->cr2
;
5608 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
5609 vcpu
->arch
.cr3
= sregs
->cr3
;
5610 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
5612 kvm_set_cr8(vcpu
, sregs
->cr8
);
5614 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
5615 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
5616 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
5618 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
5619 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
5620 vcpu
->arch
.cr0
= sregs
->cr0
;
5622 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
5623 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
5624 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
5627 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5628 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
5629 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
5630 mmu_reset_needed
= 1;
5632 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5634 if (mmu_reset_needed
)
5635 kvm_mmu_reset_context(vcpu
);
5637 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
5638 pending_vec
= find_first_bit(
5639 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
5640 if (pending_vec
< max_bits
) {
5641 kvm_queue_interrupt(vcpu
, pending_vec
, false);
5642 pr_debug("Set back pending irq %d\n", pending_vec
);
5643 if (irqchip_in_kernel(vcpu
->kvm
))
5644 kvm_pic_clear_isr_ack(vcpu
->kvm
);
5647 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5648 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5649 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5650 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5651 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5652 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5654 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5655 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5657 update_cr8_intercept(vcpu
);
5659 /* Older userspace won't unhalt the vcpu on reset. */
5660 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
5661 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
5663 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5665 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5670 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
5671 struct kvm_guest_debug
*dbg
)
5673 unsigned long rflags
;
5676 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
5678 if (vcpu
->arch
.exception
.pending
)
5680 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
5681 kvm_queue_exception(vcpu
, DB_VECTOR
);
5683 kvm_queue_exception(vcpu
, BP_VECTOR
);
5687 * Read rflags as long as potentially injected trace flags are still
5690 rflags
= kvm_get_rflags(vcpu
);
5692 vcpu
->guest_debug
= dbg
->control
;
5693 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
5694 vcpu
->guest_debug
= 0;
5696 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
5697 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
5698 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
5699 vcpu
->arch
.switch_db_regs
=
5700 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
5702 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
5703 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
5704 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
5707 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
5708 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
5709 get_segment_base(vcpu
, VCPU_SREG_CS
);
5712 * Trigger an rflags update that will inject or remove the trace
5715 kvm_set_rflags(vcpu
, rflags
);
5717 kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
5727 * Translate a guest virtual address to a guest physical address.
5729 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
5730 struct kvm_translation
*tr
)
5732 unsigned long vaddr
= tr
->linear_address
;
5736 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5737 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
5738 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5739 tr
->physical_address
= gpa
;
5740 tr
->valid
= gpa
!= UNMAPPED_GVA
;
5747 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5749 struct i387_fxsave_struct
*fxsave
=
5750 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5752 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
5753 fpu
->fcw
= fxsave
->cwd
;
5754 fpu
->fsw
= fxsave
->swd
;
5755 fpu
->ftwx
= fxsave
->twd
;
5756 fpu
->last_opcode
= fxsave
->fop
;
5757 fpu
->last_ip
= fxsave
->rip
;
5758 fpu
->last_dp
= fxsave
->rdp
;
5759 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
5764 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5766 struct i387_fxsave_struct
*fxsave
=
5767 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5769 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
5770 fxsave
->cwd
= fpu
->fcw
;
5771 fxsave
->swd
= fpu
->fsw
;
5772 fxsave
->twd
= fpu
->ftwx
;
5773 fxsave
->fop
= fpu
->last_opcode
;
5774 fxsave
->rip
= fpu
->last_ip
;
5775 fxsave
->rdp
= fpu
->last_dp
;
5776 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
5781 int fx_init(struct kvm_vcpu
*vcpu
)
5785 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
5789 fpu_finit(&vcpu
->arch
.guest_fpu
);
5792 * Ensure guest xcr0 is valid for loading
5794 vcpu
->arch
.xcr0
= XSTATE_FP
;
5796 vcpu
->arch
.cr0
|= X86_CR0_ET
;
5800 EXPORT_SYMBOL_GPL(fx_init
);
5802 static void fx_free(struct kvm_vcpu
*vcpu
)
5804 fpu_free(&vcpu
->arch
.guest_fpu
);
5807 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
5809 if (vcpu
->guest_fpu_loaded
)
5813 * Restore all possible states in the guest,
5814 * and assume host would use all available bits.
5815 * Guest xcr0 would be loaded later.
5817 kvm_put_guest_xcr0(vcpu
);
5818 vcpu
->guest_fpu_loaded
= 1;
5819 unlazy_fpu(current
);
5820 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
5824 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
5826 kvm_put_guest_xcr0(vcpu
);
5828 if (!vcpu
->guest_fpu_loaded
)
5831 vcpu
->guest_fpu_loaded
= 0;
5832 fpu_save_init(&vcpu
->arch
.guest_fpu
);
5833 ++vcpu
->stat
.fpu_reload
;
5834 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
5838 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
5840 if (vcpu
->arch
.time_page
) {
5841 kvm_release_page_dirty(vcpu
->arch
.time_page
);
5842 vcpu
->arch
.time_page
= NULL
;
5845 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
5847 kvm_x86_ops
->vcpu_free(vcpu
);
5850 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
5853 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
5854 printk_once(KERN_WARNING
5855 "kvm: SMP vm created on host with unstable TSC; "
5856 "guest TSC will not be reliable\n");
5857 return kvm_x86_ops
->vcpu_create(kvm
, id
);
5860 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
5864 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
5866 r
= kvm_arch_vcpu_reset(vcpu
);
5868 r
= kvm_mmu_setup(vcpu
);
5875 kvm_x86_ops
->vcpu_free(vcpu
);
5879 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
5881 vcpu
->arch
.apf
.msr_val
= 0;
5884 kvm_mmu_unload(vcpu
);
5888 kvm_x86_ops
->vcpu_free(vcpu
);
5891 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
5893 vcpu
->arch
.nmi_pending
= false;
5894 vcpu
->arch
.nmi_injected
= false;
5896 vcpu
->arch
.switch_db_regs
= 0;
5897 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
5898 vcpu
->arch
.dr6
= DR6_FIXED_1
;
5899 vcpu
->arch
.dr7
= DR7_FIXED_1
;
5901 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5902 vcpu
->arch
.apf
.msr_val
= 0;
5904 kvm_clear_async_pf_completion_queue(vcpu
);
5905 kvm_async_pf_hash_reset(vcpu
);
5906 vcpu
->arch
.apf
.halted
= false;
5908 return kvm_x86_ops
->vcpu_reset(vcpu
);
5911 int kvm_arch_hardware_enable(void *garbage
)
5914 struct kvm_vcpu
*vcpu
;
5917 kvm_shared_msr_cpu_online();
5918 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5919 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5920 if (vcpu
->cpu
== smp_processor_id())
5921 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5922 return kvm_x86_ops
->hardware_enable(garbage
);
5925 void kvm_arch_hardware_disable(void *garbage
)
5927 kvm_x86_ops
->hardware_disable(garbage
);
5928 drop_user_return_notifiers(garbage
);
5931 int kvm_arch_hardware_setup(void)
5933 return kvm_x86_ops
->hardware_setup();
5936 void kvm_arch_hardware_unsetup(void)
5938 kvm_x86_ops
->hardware_unsetup();
5941 void kvm_arch_check_processor_compat(void *rtn
)
5943 kvm_x86_ops
->check_processor_compatibility(rtn
);
5946 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
5952 BUG_ON(vcpu
->kvm
== NULL
);
5955 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
5956 vcpu
->arch
.walk_mmu
= &vcpu
->arch
.mmu
;
5957 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
5958 vcpu
->arch
.mmu
.translate_gpa
= translate_gpa
;
5959 vcpu
->arch
.nested_mmu
.translate_gpa
= translate_nested_gpa
;
5960 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
5961 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5963 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
5965 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
5970 vcpu
->arch
.pio_data
= page_address(page
);
5972 if (!kvm
->arch
.virtual_tsc_khz
)
5973 kvm_arch_set_tsc_khz(kvm
, max_tsc_khz
);
5975 r
= kvm_mmu_create(vcpu
);
5977 goto fail_free_pio_data
;
5979 if (irqchip_in_kernel(kvm
)) {
5980 r
= kvm_create_lapic(vcpu
);
5982 goto fail_mmu_destroy
;
5985 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
5987 if (!vcpu
->arch
.mce_banks
) {
5989 goto fail_free_lapic
;
5991 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
5993 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
))
5994 goto fail_free_mce_banks
;
5996 kvm_async_pf_hash_reset(vcpu
);
5999 fail_free_mce_banks
:
6000 kfree(vcpu
->arch
.mce_banks
);
6002 kvm_free_lapic(vcpu
);
6004 kvm_mmu_destroy(vcpu
);
6006 free_page((unsigned long)vcpu
->arch
.pio_data
);
6011 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
6015 kfree(vcpu
->arch
.mce_banks
);
6016 kvm_free_lapic(vcpu
);
6017 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6018 kvm_mmu_destroy(vcpu
);
6019 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6020 free_page((unsigned long)vcpu
->arch
.pio_data
);
6023 int kvm_arch_init_vm(struct kvm
*kvm
)
6025 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
6026 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
6028 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6029 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
6031 spin_lock_init(&kvm
->arch
.tsc_write_lock
);
6036 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
6039 kvm_mmu_unload(vcpu
);
6043 static void kvm_free_vcpus(struct kvm
*kvm
)
6046 struct kvm_vcpu
*vcpu
;
6049 * Unpin any mmu pages first.
6051 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6052 kvm_clear_async_pf_completion_queue(vcpu
);
6053 kvm_unload_vcpu_mmu(vcpu
);
6055 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6056 kvm_arch_vcpu_free(vcpu
);
6058 mutex_lock(&kvm
->lock
);
6059 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
6060 kvm
->vcpus
[i
] = NULL
;
6062 atomic_set(&kvm
->online_vcpus
, 0);
6063 mutex_unlock(&kvm
->lock
);
6066 void kvm_arch_sync_events(struct kvm
*kvm
)
6068 kvm_free_all_assigned_devices(kvm
);
6072 void kvm_arch_destroy_vm(struct kvm
*kvm
)
6074 kvm_iommu_unmap_guest(kvm
);
6075 kfree(kvm
->arch
.vpic
);
6076 kfree(kvm
->arch
.vioapic
);
6077 kvm_free_vcpus(kvm
);
6078 if (kvm
->arch
.apic_access_page
)
6079 put_page(kvm
->arch
.apic_access_page
);
6080 if (kvm
->arch
.ept_identity_pagetable
)
6081 put_page(kvm
->arch
.ept_identity_pagetable
);
6084 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
6085 struct kvm_memory_slot
*memslot
,
6086 struct kvm_memory_slot old
,
6087 struct kvm_userspace_memory_region
*mem
,
6090 int npages
= memslot
->npages
;
6091 int map_flags
= MAP_PRIVATE
| MAP_ANONYMOUS
;
6093 /* Prevent internal slot pages from being moved by fork()/COW. */
6094 if (memslot
->id
>= KVM_MEMORY_SLOTS
)
6095 map_flags
= MAP_SHARED
| MAP_ANONYMOUS
;
6097 /*To keep backward compatibility with older userspace,
6098 *x86 needs to hanlde !user_alloc case.
6101 if (npages
&& !old
.rmap
) {
6102 unsigned long userspace_addr
;
6104 down_write(¤t
->mm
->mmap_sem
);
6105 userspace_addr
= do_mmap(NULL
, 0,
6107 PROT_READ
| PROT_WRITE
,
6110 up_write(¤t
->mm
->mmap_sem
);
6112 if (IS_ERR((void *)userspace_addr
))
6113 return PTR_ERR((void *)userspace_addr
);
6115 memslot
->userspace_addr
= userspace_addr
;
6123 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
6124 struct kvm_userspace_memory_region
*mem
,
6125 struct kvm_memory_slot old
,
6129 int npages
= mem
->memory_size
>> PAGE_SHIFT
;
6131 if (!user_alloc
&& !old
.user_alloc
&& old
.rmap
&& !npages
) {
6134 down_write(¤t
->mm
->mmap_sem
);
6135 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
6136 old
.npages
* PAGE_SIZE
);
6137 up_write(¤t
->mm
->mmap_sem
);
6140 "kvm_vm_ioctl_set_memory_region: "
6141 "failed to munmap memory\n");
6144 spin_lock(&kvm
->mmu_lock
);
6145 if (!kvm
->arch
.n_requested_mmu_pages
) {
6146 unsigned int nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
6147 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
6150 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
6151 spin_unlock(&kvm
->mmu_lock
);
6154 void kvm_arch_flush_shadow(struct kvm
*kvm
)
6156 kvm_mmu_zap_all(kvm
);
6157 kvm_reload_remote_mmus(kvm
);
6160 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
6162 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6163 !vcpu
->arch
.apf
.halted
)
6164 || !list_empty_careful(&vcpu
->async_pf
.done
)
6165 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
6166 || vcpu
->arch
.nmi_pending
||
6167 (kvm_arch_interrupt_allowed(vcpu
) &&
6168 kvm_cpu_has_interrupt(vcpu
));
6171 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
6174 int cpu
= vcpu
->cpu
;
6176 if (waitqueue_active(&vcpu
->wq
)) {
6177 wake_up_interruptible(&vcpu
->wq
);
6178 ++vcpu
->stat
.halt_wakeup
;
6182 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
6183 if (kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
)
6184 smp_send_reschedule(cpu
);
6188 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
6190 return kvm_x86_ops
->interrupt_allowed(vcpu
);
6193 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
6195 unsigned long current_rip
= kvm_rip_read(vcpu
) +
6196 get_segment_base(vcpu
, VCPU_SREG_CS
);
6198 return current_rip
== linear_rip
;
6200 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
6202 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
6204 unsigned long rflags
;
6206 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
6207 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6208 rflags
&= ~X86_EFLAGS_TF
;
6211 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
6213 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
6215 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
6216 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
6217 rflags
|= X86_EFLAGS_TF
;
6218 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
6219 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6221 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
6223 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
6227 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
6228 is_error_page(work
->page
))
6231 r
= kvm_mmu_reload(vcpu
);
6235 if (!vcpu
->arch
.mmu
.direct_map
&&
6236 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
6239 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
6242 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
6244 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
6247 static inline u32
kvm_async_pf_next_probe(u32 key
)
6249 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
6252 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6254 u32 key
= kvm_async_pf_hash_fn(gfn
);
6256 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
6257 key
= kvm_async_pf_next_probe(key
);
6259 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
6262 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6265 u32 key
= kvm_async_pf_hash_fn(gfn
);
6267 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
6268 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
6269 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
6270 key
= kvm_async_pf_next_probe(key
);
6275 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6277 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
6280 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6284 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
6286 vcpu
->arch
.apf
.gfns
[i
] = ~0;
6288 j
= kvm_async_pf_next_probe(j
);
6289 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
6291 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
6293 * k lies cyclically in ]i,j]
6295 * |....j i.k.| or |.k..j i...|
6297 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
6298 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
6303 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
6306 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
6310 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
6311 struct kvm_async_pf
*work
)
6313 struct x86_exception fault
;
6315 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
6316 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6318 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
6319 (vcpu
->arch
.apf
.send_user_only
&&
6320 kvm_x86_ops
->get_cpl(vcpu
) == 0))
6321 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
6322 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
6323 fault
.vector
= PF_VECTOR
;
6324 fault
.error_code_valid
= true;
6325 fault
.error_code
= 0;
6326 fault
.nested_page_fault
= false;
6327 fault
.address
= work
->arch
.token
;
6328 kvm_inject_page_fault(vcpu
, &fault
);
6332 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
6333 struct kvm_async_pf
*work
)
6335 struct x86_exception fault
;
6337 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
6338 if (is_error_page(work
->page
))
6339 work
->arch
.token
= ~0; /* broadcast wakeup */
6341 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6343 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
6344 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
6345 fault
.vector
= PF_VECTOR
;
6346 fault
.error_code_valid
= true;
6347 fault
.error_code
= 0;
6348 fault
.nested_page_fault
= false;
6349 fault
.address
= work
->arch
.token
;
6350 kvm_inject_page_fault(vcpu
, &fault
);
6352 vcpu
->arch
.apf
.halted
= false;
6355 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
6357 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
6360 return !kvm_event_needs_reinjection(vcpu
) &&
6361 kvm_x86_ops
->interrupt_allowed(vcpu
);
6364 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
6365 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
6366 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
6367 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
6368 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
6369 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
6370 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
6371 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
6372 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
6373 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
6374 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
6375 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);