2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <linux/hash.h>
47 #include <trace/events/kvm.h>
49 #define CREATE_TRACE_POINTS
52 #include <asm/debugreg.h>
59 #include <asm/pvclock.h>
60 #include <asm/div64.h>
62 #define MAX_IO_MSRS 256
63 #define CR0_RESERVED_BITS \
64 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
65 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
66 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
67 #define CR4_RESERVED_BITS \
68 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
69 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
70 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
72 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
74 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
76 #define KVM_MAX_MCE_BANKS 32
77 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
80 * - enable syscall per default because its emulated by KVM
81 * - enable LME and LMA per default on 64 bit KVM
84 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffafeULL
;
86 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffffeULL
;
89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
92 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
93 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
94 struct kvm_cpuid_entry2 __user
*entries
);
96 struct kvm_x86_ops
*kvm_x86_ops
;
97 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
100 module_param_named(ignore_msrs
, ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
102 #define KVM_NR_SHARED_MSRS 16
104 struct kvm_shared_msrs_global
{
106 u32 msrs
[KVM_NR_SHARED_MSRS
];
109 struct kvm_shared_msrs
{
110 struct user_return_notifier urn
;
112 struct kvm_shared_msr_values
{
115 } values
[KVM_NR_SHARED_MSRS
];
118 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
119 static DEFINE_PER_CPU(struct kvm_shared_msrs
, shared_msrs
);
121 struct kvm_stats_debugfs_item debugfs_entries
[] = {
122 { "pf_fixed", VCPU_STAT(pf_fixed
) },
123 { "pf_guest", VCPU_STAT(pf_guest
) },
124 { "tlb_flush", VCPU_STAT(tlb_flush
) },
125 { "invlpg", VCPU_STAT(invlpg
) },
126 { "exits", VCPU_STAT(exits
) },
127 { "io_exits", VCPU_STAT(io_exits
) },
128 { "mmio_exits", VCPU_STAT(mmio_exits
) },
129 { "signal_exits", VCPU_STAT(signal_exits
) },
130 { "irq_window", VCPU_STAT(irq_window_exits
) },
131 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
132 { "halt_exits", VCPU_STAT(halt_exits
) },
133 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
134 { "hypercalls", VCPU_STAT(hypercalls
) },
135 { "request_irq", VCPU_STAT(request_irq_exits
) },
136 { "irq_exits", VCPU_STAT(irq_exits
) },
137 { "host_state_reload", VCPU_STAT(host_state_reload
) },
138 { "efer_reload", VCPU_STAT(efer_reload
) },
139 { "fpu_reload", VCPU_STAT(fpu_reload
) },
140 { "insn_emulation", VCPU_STAT(insn_emulation
) },
141 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
142 { "irq_injections", VCPU_STAT(irq_injections
) },
143 { "nmi_injections", VCPU_STAT(nmi_injections
) },
144 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
145 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
146 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
147 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
148 { "mmu_flooded", VM_STAT(mmu_flooded
) },
149 { "mmu_recycled", VM_STAT(mmu_recycled
) },
150 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
151 { "mmu_unsync", VM_STAT(mmu_unsync
) },
152 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
153 { "largepages", VM_STAT(lpages
) },
157 u64 __read_mostly host_xcr0
;
159 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
162 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
163 vcpu
->arch
.apf
.gfns
[i
] = ~0;
166 static void kvm_on_user_return(struct user_return_notifier
*urn
)
169 struct kvm_shared_msrs
*locals
170 = container_of(urn
, struct kvm_shared_msrs
, urn
);
171 struct kvm_shared_msr_values
*values
;
173 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
174 values
= &locals
->values
[slot
];
175 if (values
->host
!= values
->curr
) {
176 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
177 values
->curr
= values
->host
;
180 locals
->registered
= false;
181 user_return_notifier_unregister(urn
);
184 static void shared_msr_update(unsigned slot
, u32 msr
)
186 struct kvm_shared_msrs
*smsr
;
189 smsr
= &__get_cpu_var(shared_msrs
);
190 /* only read, and nobody should modify it at this time,
191 * so don't need lock */
192 if (slot
>= shared_msrs_global
.nr
) {
193 printk(KERN_ERR
"kvm: invalid MSR slot!");
196 rdmsrl_safe(msr
, &value
);
197 smsr
->values
[slot
].host
= value
;
198 smsr
->values
[slot
].curr
= value
;
201 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
203 if (slot
>= shared_msrs_global
.nr
)
204 shared_msrs_global
.nr
= slot
+ 1;
205 shared_msrs_global
.msrs
[slot
] = msr
;
206 /* we need ensured the shared_msr_global have been updated */
209 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
211 static void kvm_shared_msr_cpu_online(void)
215 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
216 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
219 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
221 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
223 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
225 smsr
->values
[slot
].curr
= value
;
226 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
227 if (!smsr
->registered
) {
228 smsr
->urn
.on_user_return
= kvm_on_user_return
;
229 user_return_notifier_register(&smsr
->urn
);
230 smsr
->registered
= true;
233 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
235 static void drop_user_return_notifiers(void *ignore
)
237 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
239 if (smsr
->registered
)
240 kvm_on_user_return(&smsr
->urn
);
243 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
245 if (irqchip_in_kernel(vcpu
->kvm
))
246 return vcpu
->arch
.apic_base
;
248 return vcpu
->arch
.apic_base
;
250 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
252 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
254 /* TODO: reserve bits check */
255 if (irqchip_in_kernel(vcpu
->kvm
))
256 kvm_lapic_set_base(vcpu
, data
);
258 vcpu
->arch
.apic_base
= data
;
260 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
262 #define EXCPT_BENIGN 0
263 #define EXCPT_CONTRIBUTORY 1
266 static int exception_class(int vector
)
276 return EXCPT_CONTRIBUTORY
;
283 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
284 unsigned nr
, bool has_error
, u32 error_code
,
290 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
292 if (!vcpu
->arch
.exception
.pending
) {
294 vcpu
->arch
.exception
.pending
= true;
295 vcpu
->arch
.exception
.has_error_code
= has_error
;
296 vcpu
->arch
.exception
.nr
= nr
;
297 vcpu
->arch
.exception
.error_code
= error_code
;
298 vcpu
->arch
.exception
.reinject
= reinject
;
302 /* to check exception */
303 prev_nr
= vcpu
->arch
.exception
.nr
;
304 if (prev_nr
== DF_VECTOR
) {
305 /* triple fault -> shutdown */
306 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
309 class1
= exception_class(prev_nr
);
310 class2
= exception_class(nr
);
311 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
312 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
313 /* generate double fault per SDM Table 5-5 */
314 vcpu
->arch
.exception
.pending
= true;
315 vcpu
->arch
.exception
.has_error_code
= true;
316 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
317 vcpu
->arch
.exception
.error_code
= 0;
319 /* replace previous exception with a new one in a hope
320 that instruction re-execution will regenerate lost
325 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
327 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
329 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
331 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
333 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
335 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
337 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
)
339 unsigned error_code
= vcpu
->arch
.fault
.error_code
;
341 ++vcpu
->stat
.pf_guest
;
342 vcpu
->arch
.cr2
= vcpu
->arch
.fault
.address
;
343 kvm_queue_exception_e(vcpu
, PF_VECTOR
, error_code
);
346 void kvm_propagate_fault(struct kvm_vcpu
*vcpu
)
348 if (mmu_is_nested(vcpu
) && !vcpu
->arch
.fault
.nested
)
349 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
);
351 vcpu
->arch
.mmu
.inject_page_fault(vcpu
);
353 vcpu
->arch
.fault
.nested
= false;
356 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
358 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
359 vcpu
->arch
.nmi_pending
= 1;
361 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
363 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
365 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
367 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
369 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
371 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
373 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
376 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
377 * a #GP and return false.
379 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
381 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
383 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
386 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
389 * This function will be used to read from the physical memory of the currently
390 * running guest. The difference to kvm_read_guest_page is that this function
391 * can read from guest physical or from the guest's guest physical memory.
393 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
394 gfn_t ngfn
, void *data
, int offset
, int len
,
400 ngpa
= gfn_to_gpa(ngfn
);
401 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
);
402 if (real_gfn
== UNMAPPED_GVA
)
405 real_gfn
= gpa_to_gfn(real_gfn
);
407 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
409 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
411 int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
412 void *data
, int offset
, int len
, u32 access
)
414 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
415 data
, offset
, len
, access
);
419 * Load the pae pdptrs. Return true is they are all valid.
421 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
423 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
424 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
427 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
429 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
430 offset
* sizeof(u64
), sizeof(pdpte
),
431 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
436 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
437 if (is_present_gpte(pdpte
[i
]) &&
438 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
445 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
446 __set_bit(VCPU_EXREG_PDPTR
,
447 (unsigned long *)&vcpu
->arch
.regs_avail
);
448 __set_bit(VCPU_EXREG_PDPTR
,
449 (unsigned long *)&vcpu
->arch
.regs_dirty
);
454 EXPORT_SYMBOL_GPL(load_pdptrs
);
456 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
458 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
464 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
467 if (!test_bit(VCPU_EXREG_PDPTR
,
468 (unsigned long *)&vcpu
->arch
.regs_avail
))
471 gfn
= (vcpu
->arch
.cr3
& ~31u) >> PAGE_SHIFT
;
472 offset
= (vcpu
->arch
.cr3
& ~31u) & (PAGE_SIZE
- 1);
473 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
474 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
477 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
483 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
485 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
486 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
487 X86_CR0_CD
| X86_CR0_NW
;
492 if (cr0
& 0xffffffff00000000UL
)
496 cr0
&= ~CR0_RESERVED_BITS
;
498 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
501 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
504 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
506 if ((vcpu
->arch
.efer
& EFER_LME
)) {
511 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
516 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
521 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
523 if ((cr0
^ old_cr0
) & X86_CR0_PG
)
524 kvm_clear_async_pf_completion_queue(vcpu
);
526 if ((cr0
^ old_cr0
) & update_bits
)
527 kvm_mmu_reset_context(vcpu
);
530 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
532 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
534 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
536 EXPORT_SYMBOL_GPL(kvm_lmsw
);
538 int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
542 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
543 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
546 if (kvm_x86_ops
->get_cpl(vcpu
) != 0)
548 if (!(xcr0
& XSTATE_FP
))
550 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
552 if (xcr0
& ~host_xcr0
)
554 vcpu
->arch
.xcr0
= xcr0
;
555 vcpu
->guest_xcr0_loaded
= 0;
559 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
561 if (__kvm_set_xcr(vcpu
, index
, xcr
)) {
562 kvm_inject_gp(vcpu
, 0);
567 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
569 static bool guest_cpuid_has_xsave(struct kvm_vcpu
*vcpu
)
571 struct kvm_cpuid_entry2
*best
;
573 best
= kvm_find_cpuid_entry(vcpu
, 1, 0);
574 return best
&& (best
->ecx
& bit(X86_FEATURE_XSAVE
));
577 static void update_cpuid(struct kvm_vcpu
*vcpu
)
579 struct kvm_cpuid_entry2
*best
;
581 best
= kvm_find_cpuid_entry(vcpu
, 1, 0);
585 /* Update OSXSAVE bit */
586 if (cpu_has_xsave
&& best
->function
== 0x1) {
587 best
->ecx
&= ~(bit(X86_FEATURE_OSXSAVE
));
588 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
))
589 best
->ecx
|= bit(X86_FEATURE_OSXSAVE
);
593 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
595 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
596 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
598 if (cr4
& CR4_RESERVED_BITS
)
601 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
604 if (is_long_mode(vcpu
)) {
605 if (!(cr4
& X86_CR4_PAE
))
607 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
608 && ((cr4
^ old_cr4
) & pdptr_bits
)
609 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, vcpu
->arch
.cr3
))
612 if (cr4
& X86_CR4_VMXE
)
615 kvm_x86_ops
->set_cr4(vcpu
, cr4
);
617 if ((cr4
^ old_cr4
) & pdptr_bits
)
618 kvm_mmu_reset_context(vcpu
);
620 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
625 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
627 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
629 if (cr3
== vcpu
->arch
.cr3
&& !pdptrs_changed(vcpu
)) {
630 kvm_mmu_sync_roots(vcpu
);
631 kvm_mmu_flush_tlb(vcpu
);
635 if (is_long_mode(vcpu
)) {
636 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
640 if (cr3
& CR3_PAE_RESERVED_BITS
)
642 if (is_paging(vcpu
) &&
643 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
647 * We don't check reserved bits in nonpae mode, because
648 * this isn't enforced, and VMware depends on this.
653 * Does the new cr3 value map to physical memory? (Note, we
654 * catch an invalid cr3 even in real-mode, because it would
655 * cause trouble later on when we turn on paging anyway.)
657 * A real CPU would silently accept an invalid cr3 and would
658 * attempt to use it - with largely undefined (and often hard
659 * to debug) behavior on the guest side.
661 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
663 vcpu
->arch
.cr3
= cr3
;
664 vcpu
->arch
.mmu
.new_cr3(vcpu
);
667 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
669 int __kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
671 if (cr8
& CR8_RESERVED_BITS
)
673 if (irqchip_in_kernel(vcpu
->kvm
))
674 kvm_lapic_set_tpr(vcpu
, cr8
);
676 vcpu
->arch
.cr8
= cr8
;
680 void kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
682 if (__kvm_set_cr8(vcpu
, cr8
))
683 kvm_inject_gp(vcpu
, 0);
685 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
687 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
689 if (irqchip_in_kernel(vcpu
->kvm
))
690 return kvm_lapic_get_cr8(vcpu
);
692 return vcpu
->arch
.cr8
;
694 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
696 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
700 vcpu
->arch
.db
[dr
] = val
;
701 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
702 vcpu
->arch
.eff_db
[dr
] = val
;
705 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
709 if (val
& 0xffffffff00000000ULL
)
711 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | DR6_FIXED_1
;
714 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
718 if (val
& 0xffffffff00000000ULL
)
720 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
721 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
722 kvm_x86_ops
->set_dr7(vcpu
, vcpu
->arch
.dr7
);
723 vcpu
->arch
.switch_db_regs
= (val
& DR7_BP_EN_MASK
);
731 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
735 res
= __kvm_set_dr(vcpu
, dr
, val
);
737 kvm_queue_exception(vcpu
, UD_VECTOR
);
739 kvm_inject_gp(vcpu
, 0);
743 EXPORT_SYMBOL_GPL(kvm_set_dr
);
745 static int _kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
749 *val
= vcpu
->arch
.db
[dr
];
752 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
756 *val
= vcpu
->arch
.dr6
;
759 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
763 *val
= vcpu
->arch
.dr7
;
770 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
772 if (_kvm_get_dr(vcpu
, dr
, val
)) {
773 kvm_queue_exception(vcpu
, UD_VECTOR
);
778 EXPORT_SYMBOL_GPL(kvm_get_dr
);
781 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
782 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
784 * This list is modified at module load time to reflect the
785 * capabilities of the host cpu. This capabilities test skips MSRs that are
786 * kvm-specific. Those are put in the beginning of the list.
789 #define KVM_SAVE_MSRS_BEGIN 8
790 static u32 msrs_to_save
[] = {
791 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
792 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
793 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
794 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
,
795 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
798 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
800 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
803 static unsigned num_msrs_to_save
;
805 static u32 emulated_msrs
[] = {
806 MSR_IA32_MISC_ENABLE
,
811 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
813 u64 old_efer
= vcpu
->arch
.efer
;
815 if (efer
& efer_reserved_bits
)
819 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
822 if (efer
& EFER_FFXSR
) {
823 struct kvm_cpuid_entry2
*feat
;
825 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
826 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
830 if (efer
& EFER_SVME
) {
831 struct kvm_cpuid_entry2
*feat
;
833 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
834 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
839 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
841 kvm_x86_ops
->set_efer(vcpu
, efer
);
843 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
845 /* Update reserved bits */
846 if ((efer
^ old_efer
) & EFER_NX
)
847 kvm_mmu_reset_context(vcpu
);
852 void kvm_enable_efer_bits(u64 mask
)
854 efer_reserved_bits
&= ~mask
;
856 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
860 * Writes msr value into into the appropriate "register".
861 * Returns 0 on success, non-0 otherwise.
862 * Assumes vcpu_load() was already called.
864 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
866 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
870 * Adapt set_msr() to msr_io()'s calling convention
872 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
874 return kvm_set_msr(vcpu
, index
, *data
);
877 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
881 struct pvclock_wall_clock wc
;
882 struct timespec boot
;
887 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
892 ++version
; /* first time write, random junk */
896 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
899 * The guest calculates current wall clock time by adding
900 * system time (updated by kvm_guest_time_update below) to the
901 * wall clock specified here. guest system time equals host
902 * system time for us, thus we must fill in host boot time here.
906 wc
.sec
= boot
.tv_sec
;
907 wc
.nsec
= boot
.tv_nsec
;
908 wc
.version
= version
;
910 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
913 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
916 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
918 uint32_t quotient
, remainder
;
920 /* Don't try to replace with do_div(), this one calculates
921 * "(dividend << 32) / divisor" */
923 : "=a" (quotient
), "=d" (remainder
)
924 : "0" (0), "1" (dividend
), "r" (divisor
) );
928 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
929 s8
*pshift
, u32
*pmultiplier
)
936 tps64
= base_khz
* 1000LL;
937 scaled64
= scaled_khz
* 1000LL;
938 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
943 tps32
= (uint32_t)tps64
;
944 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
945 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
953 *pmultiplier
= div_frac(scaled64
, tps32
);
955 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
956 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
959 static inline u64
get_kernel_ns(void)
963 WARN_ON(preemptible());
965 monotonic_to_bootbased(&ts
);
966 return timespec_to_ns(&ts
);
969 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
970 unsigned long max_tsc_khz
;
972 static inline int kvm_tsc_changes_freq(void)
975 int ret
= !boot_cpu_has(X86_FEATURE_CONSTANT_TSC
) &&
976 cpufreq_quick_get(cpu
) != 0;
981 static inline u64
nsec_to_cycles(u64 nsec
)
985 WARN_ON(preemptible());
986 if (kvm_tsc_changes_freq())
987 printk_once(KERN_WARNING
988 "kvm: unreliable cycle conversion on adjustable rate TSC\n");
989 ret
= nsec
* __get_cpu_var(cpu_tsc_khz
);
990 do_div(ret
, USEC_PER_SEC
);
994 static void kvm_arch_set_tsc_khz(struct kvm
*kvm
, u32 this_tsc_khz
)
996 /* Compute a scale to convert nanoseconds in TSC cycles */
997 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
998 &kvm
->arch
.virtual_tsc_shift
,
999 &kvm
->arch
.virtual_tsc_mult
);
1000 kvm
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1003 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1005 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.last_tsc_nsec
,
1006 vcpu
->kvm
->arch
.virtual_tsc_mult
,
1007 vcpu
->kvm
->arch
.virtual_tsc_shift
);
1008 tsc
+= vcpu
->arch
.last_tsc_write
;
1012 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
1014 struct kvm
*kvm
= vcpu
->kvm
;
1015 u64 offset
, ns
, elapsed
;
1016 unsigned long flags
;
1019 spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1020 offset
= data
- native_read_tsc();
1021 ns
= get_kernel_ns();
1022 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1023 sdiff
= data
- kvm
->arch
.last_tsc_write
;
1028 * Special case: close write to TSC within 5 seconds of
1029 * another CPU is interpreted as an attempt to synchronize
1030 * The 5 seconds is to accomodate host load / swapping as
1031 * well as any reset of TSC during the boot process.
1033 * In that case, for a reliable TSC, we can match TSC offsets,
1034 * or make a best guest using elapsed value.
1036 if (sdiff
< nsec_to_cycles(5ULL * NSEC_PER_SEC
) &&
1037 elapsed
< 5ULL * NSEC_PER_SEC
) {
1038 if (!check_tsc_unstable()) {
1039 offset
= kvm
->arch
.last_tsc_offset
;
1040 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1042 u64 delta
= nsec_to_cycles(elapsed
);
1044 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1046 ns
= kvm
->arch
.last_tsc_nsec
;
1048 kvm
->arch
.last_tsc_nsec
= ns
;
1049 kvm
->arch
.last_tsc_write
= data
;
1050 kvm
->arch
.last_tsc_offset
= offset
;
1051 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1052 spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1054 /* Reset of TSC must disable overshoot protection below */
1055 vcpu
->arch
.hv_clock
.tsc_timestamp
= 0;
1056 vcpu
->arch
.last_tsc_write
= data
;
1057 vcpu
->arch
.last_tsc_nsec
= ns
;
1059 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1061 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1063 unsigned long flags
;
1064 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1066 unsigned long this_tsc_khz
;
1067 s64 kernel_ns
, max_kernel_ns
;
1070 /* Keep irq disabled to prevent changes to the clock */
1071 local_irq_save(flags
);
1072 kvm_get_msr(v
, MSR_IA32_TSC
, &tsc_timestamp
);
1073 kernel_ns
= get_kernel_ns();
1074 this_tsc_khz
= __get_cpu_var(cpu_tsc_khz
);
1076 if (unlikely(this_tsc_khz
== 0)) {
1077 local_irq_restore(flags
);
1078 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1083 * We may have to catch up the TSC to match elapsed wall clock
1084 * time for two reasons, even if kvmclock is used.
1085 * 1) CPU could have been running below the maximum TSC rate
1086 * 2) Broken TSC compensation resets the base at each VCPU
1087 * entry to avoid unknown leaps of TSC even when running
1088 * again on the same CPU. This may cause apparent elapsed
1089 * time to disappear, and the guest to stand still or run
1092 if (vcpu
->tsc_catchup
) {
1093 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1094 if (tsc
> tsc_timestamp
) {
1095 kvm_x86_ops
->adjust_tsc_offset(v
, tsc
- tsc_timestamp
);
1096 tsc_timestamp
= tsc
;
1100 local_irq_restore(flags
);
1102 if (!vcpu
->time_page
)
1106 * Time as measured by the TSC may go backwards when resetting the base
1107 * tsc_timestamp. The reason for this is that the TSC resolution is
1108 * higher than the resolution of the other clock scales. Thus, many
1109 * possible measurments of the TSC correspond to one measurement of any
1110 * other clock, and so a spread of values is possible. This is not a
1111 * problem for the computation of the nanosecond clock; with TSC rates
1112 * around 1GHZ, there can only be a few cycles which correspond to one
1113 * nanosecond value, and any path through this code will inevitably
1114 * take longer than that. However, with the kernel_ns value itself,
1115 * the precision may be much lower, down to HZ granularity. If the
1116 * first sampling of TSC against kernel_ns ends in the low part of the
1117 * range, and the second in the high end of the range, we can get:
1119 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1121 * As the sampling errors potentially range in the thousands of cycles,
1122 * it is possible such a time value has already been observed by the
1123 * guest. To protect against this, we must compute the system time as
1124 * observed by the guest and ensure the new system time is greater.
1127 if (vcpu
->hv_clock
.tsc_timestamp
&& vcpu
->last_guest_tsc
) {
1128 max_kernel_ns
= vcpu
->last_guest_tsc
-
1129 vcpu
->hv_clock
.tsc_timestamp
;
1130 max_kernel_ns
= pvclock_scale_delta(max_kernel_ns
,
1131 vcpu
->hv_clock
.tsc_to_system_mul
,
1132 vcpu
->hv_clock
.tsc_shift
);
1133 max_kernel_ns
+= vcpu
->last_kernel_ns
;
1136 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1137 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1138 &vcpu
->hv_clock
.tsc_shift
,
1139 &vcpu
->hv_clock
.tsc_to_system_mul
);
1140 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1143 if (max_kernel_ns
> kernel_ns
)
1144 kernel_ns
= max_kernel_ns
;
1146 /* With all the info we got, fill in the values */
1147 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1148 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1149 vcpu
->last_kernel_ns
= kernel_ns
;
1150 vcpu
->last_guest_tsc
= tsc_timestamp
;
1151 vcpu
->hv_clock
.flags
= 0;
1154 * The interface expects us to write an even number signaling that the
1155 * update is finished. Since the guest won't see the intermediate
1156 * state, we just increase by 2 at the end.
1158 vcpu
->hv_clock
.version
+= 2;
1160 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
1162 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
1163 sizeof(vcpu
->hv_clock
));
1165 kunmap_atomic(shared_kaddr
, KM_USER0
);
1167 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
1171 static bool msr_mtrr_valid(unsigned msr
)
1174 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1175 case MSR_MTRRfix64K_00000
:
1176 case MSR_MTRRfix16K_80000
:
1177 case MSR_MTRRfix16K_A0000
:
1178 case MSR_MTRRfix4K_C0000
:
1179 case MSR_MTRRfix4K_C8000
:
1180 case MSR_MTRRfix4K_D0000
:
1181 case MSR_MTRRfix4K_D8000
:
1182 case MSR_MTRRfix4K_E0000
:
1183 case MSR_MTRRfix4K_E8000
:
1184 case MSR_MTRRfix4K_F0000
:
1185 case MSR_MTRRfix4K_F8000
:
1186 case MSR_MTRRdefType
:
1187 case MSR_IA32_CR_PAT
:
1195 static bool valid_pat_type(unsigned t
)
1197 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1200 static bool valid_mtrr_type(unsigned t
)
1202 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1205 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1209 if (!msr_mtrr_valid(msr
))
1212 if (msr
== MSR_IA32_CR_PAT
) {
1213 for (i
= 0; i
< 8; i
++)
1214 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1217 } else if (msr
== MSR_MTRRdefType
) {
1220 return valid_mtrr_type(data
& 0xff);
1221 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1222 for (i
= 0; i
< 8 ; i
++)
1223 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1228 /* variable MTRRs */
1229 return valid_mtrr_type(data
& 0xff);
1232 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1234 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1236 if (!mtrr_valid(vcpu
, msr
, data
))
1239 if (msr
== MSR_MTRRdefType
) {
1240 vcpu
->arch
.mtrr_state
.def_type
= data
;
1241 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1242 } else if (msr
== MSR_MTRRfix64K_00000
)
1244 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1245 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1246 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1247 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1248 else if (msr
== MSR_IA32_CR_PAT
)
1249 vcpu
->arch
.pat
= data
;
1250 else { /* Variable MTRRs */
1251 int idx
, is_mtrr_mask
;
1254 idx
= (msr
- 0x200) / 2;
1255 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1258 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1261 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1265 kvm_mmu_reset_context(vcpu
);
1269 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1271 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1272 unsigned bank_num
= mcg_cap
& 0xff;
1275 case MSR_IA32_MCG_STATUS
:
1276 vcpu
->arch
.mcg_status
= data
;
1278 case MSR_IA32_MCG_CTL
:
1279 if (!(mcg_cap
& MCG_CTL_P
))
1281 if (data
!= 0 && data
!= ~(u64
)0)
1283 vcpu
->arch
.mcg_ctl
= data
;
1286 if (msr
>= MSR_IA32_MC0_CTL
&&
1287 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1288 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1289 /* only 0 or all 1s can be written to IA32_MCi_CTL
1290 * some Linux kernels though clear bit 10 in bank 4 to
1291 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1292 * this to avoid an uncatched #GP in the guest
1294 if ((offset
& 0x3) == 0 &&
1295 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1297 vcpu
->arch
.mce_banks
[offset
] = data
;
1305 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1307 struct kvm
*kvm
= vcpu
->kvm
;
1308 int lm
= is_long_mode(vcpu
);
1309 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1310 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1311 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1312 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1313 u32 page_num
= data
& ~PAGE_MASK
;
1314 u64 page_addr
= data
& PAGE_MASK
;
1319 if (page_num
>= blob_size
)
1322 page
= kzalloc(PAGE_SIZE
, GFP_KERNEL
);
1326 if (copy_from_user(page
, blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
))
1328 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1337 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1339 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1342 static bool kvm_hv_msr_partition_wide(u32 msr
)
1346 case HV_X64_MSR_GUEST_OS_ID
:
1347 case HV_X64_MSR_HYPERCALL
:
1355 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1357 struct kvm
*kvm
= vcpu
->kvm
;
1360 case HV_X64_MSR_GUEST_OS_ID
:
1361 kvm
->arch
.hv_guest_os_id
= data
;
1362 /* setting guest os id to zero disables hypercall page */
1363 if (!kvm
->arch
.hv_guest_os_id
)
1364 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1366 case HV_X64_MSR_HYPERCALL
: {
1371 /* if guest os id is not set hypercall should remain disabled */
1372 if (!kvm
->arch
.hv_guest_os_id
)
1374 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1375 kvm
->arch
.hv_hypercall
= data
;
1378 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1379 addr
= gfn_to_hva(kvm
, gfn
);
1380 if (kvm_is_error_hva(addr
))
1382 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1383 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1384 if (copy_to_user((void __user
*)addr
, instructions
, 4))
1386 kvm
->arch
.hv_hypercall
= data
;
1390 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1391 "data 0x%llx\n", msr
, data
);
1397 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1400 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1403 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1404 vcpu
->arch
.hv_vapic
= data
;
1407 addr
= gfn_to_hva(vcpu
->kvm
, data
>>
1408 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
);
1409 if (kvm_is_error_hva(addr
))
1411 if (clear_user((void __user
*)addr
, PAGE_SIZE
))
1413 vcpu
->arch
.hv_vapic
= data
;
1416 case HV_X64_MSR_EOI
:
1417 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1418 case HV_X64_MSR_ICR
:
1419 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1420 case HV_X64_MSR_TPR
:
1421 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1423 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1424 "data 0x%llx\n", msr
, data
);
1431 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1433 gpa_t gpa
= data
& ~0x3f;
1435 /* Bits 2:5 are resrved, Should be zero */
1439 vcpu
->arch
.apf
.msr_val
= data
;
1441 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1442 kvm_clear_async_pf_completion_queue(vcpu
);
1443 kvm_async_pf_hash_reset(vcpu
);
1447 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
))
1450 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
1451 kvm_async_pf_wakeup_all(vcpu
);
1455 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1459 return set_efer(vcpu
, data
);
1461 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1462 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
1464 pr_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1469 case MSR_FAM10H_MMIO_CONF_BASE
:
1471 pr_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1476 case MSR_AMD64_NB_CFG
:
1478 case MSR_IA32_DEBUGCTLMSR
:
1480 /* We support the non-activated case already */
1482 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1483 /* Values other than LBR and BTF are vendor-specific,
1484 thus reserved and should throw a #GP */
1487 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1490 case MSR_IA32_UCODE_REV
:
1491 case MSR_IA32_UCODE_WRITE
:
1492 case MSR_VM_HSAVE_PA
:
1493 case MSR_AMD64_PATCH_LOADER
:
1495 case 0x200 ... 0x2ff:
1496 return set_msr_mtrr(vcpu
, msr
, data
);
1497 case MSR_IA32_APICBASE
:
1498 kvm_set_apic_base(vcpu
, data
);
1500 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1501 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1502 case MSR_IA32_MISC_ENABLE
:
1503 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1505 case MSR_KVM_WALL_CLOCK_NEW
:
1506 case MSR_KVM_WALL_CLOCK
:
1507 vcpu
->kvm
->arch
.wall_clock
= data
;
1508 kvm_write_wall_clock(vcpu
->kvm
, data
);
1510 case MSR_KVM_SYSTEM_TIME_NEW
:
1511 case MSR_KVM_SYSTEM_TIME
: {
1512 if (vcpu
->arch
.time_page
) {
1513 kvm_release_page_dirty(vcpu
->arch
.time_page
);
1514 vcpu
->arch
.time_page
= NULL
;
1517 vcpu
->arch
.time
= data
;
1518 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1520 /* we verify if the enable bit is set... */
1524 /* ...but clean it before doing the actual write */
1525 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
1527 vcpu
->arch
.time_page
=
1528 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
1530 if (is_error_page(vcpu
->arch
.time_page
)) {
1531 kvm_release_page_clean(vcpu
->arch
.time_page
);
1532 vcpu
->arch
.time_page
= NULL
;
1536 case MSR_KVM_ASYNC_PF_EN
:
1537 if (kvm_pv_enable_async_pf(vcpu
, data
))
1540 case MSR_IA32_MCG_CTL
:
1541 case MSR_IA32_MCG_STATUS
:
1542 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1543 return set_msr_mce(vcpu
, msr
, data
);
1545 /* Performance counters are not protected by a CPUID bit,
1546 * so we should check all of them in the generic path for the sake of
1547 * cross vendor migration.
1548 * Writing a zero into the event select MSRs disables them,
1549 * which we perfectly emulate ;-). Any other value should be at least
1550 * reported, some guests depend on them.
1552 case MSR_P6_EVNTSEL0
:
1553 case MSR_P6_EVNTSEL1
:
1554 case MSR_K7_EVNTSEL0
:
1555 case MSR_K7_EVNTSEL1
:
1556 case MSR_K7_EVNTSEL2
:
1557 case MSR_K7_EVNTSEL3
:
1559 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1560 "0x%x data 0x%llx\n", msr
, data
);
1562 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1563 * so we ignore writes to make it happy.
1565 case MSR_P6_PERFCTR0
:
1566 case MSR_P6_PERFCTR1
:
1567 case MSR_K7_PERFCTR0
:
1568 case MSR_K7_PERFCTR1
:
1569 case MSR_K7_PERFCTR2
:
1570 case MSR_K7_PERFCTR3
:
1571 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1572 "0x%x data 0x%llx\n", msr
, data
);
1574 case MSR_K7_CLK_CTL
:
1576 * Ignore all writes to this no longer documented MSR.
1577 * Writes are only relevant for old K7 processors,
1578 * all pre-dating SVM, but a recommended workaround from
1579 * AMD for these chips. It is possible to speicify the
1580 * affected processor models on the command line, hence
1581 * the need to ignore the workaround.
1584 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1585 if (kvm_hv_msr_partition_wide(msr
)) {
1587 mutex_lock(&vcpu
->kvm
->lock
);
1588 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
1589 mutex_unlock(&vcpu
->kvm
->lock
);
1592 return set_msr_hyperv(vcpu
, msr
, data
);
1595 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
1596 return xen_hvm_config(vcpu
, data
);
1598 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
1602 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
1609 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
1613 * Reads an msr value (of 'msr_index') into 'pdata'.
1614 * Returns 0 on success, non-0 otherwise.
1615 * Assumes vcpu_load() was already called.
1617 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
1619 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
1622 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1624 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1626 if (!msr_mtrr_valid(msr
))
1629 if (msr
== MSR_MTRRdefType
)
1630 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
1631 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
1632 else if (msr
== MSR_MTRRfix64K_00000
)
1634 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1635 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
1636 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1637 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
1638 else if (msr
== MSR_IA32_CR_PAT
)
1639 *pdata
= vcpu
->arch
.pat
;
1640 else { /* Variable MTRRs */
1641 int idx
, is_mtrr_mask
;
1644 idx
= (msr
- 0x200) / 2;
1645 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1648 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1651 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1658 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1661 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1662 unsigned bank_num
= mcg_cap
& 0xff;
1665 case MSR_IA32_P5_MC_ADDR
:
1666 case MSR_IA32_P5_MC_TYPE
:
1669 case MSR_IA32_MCG_CAP
:
1670 data
= vcpu
->arch
.mcg_cap
;
1672 case MSR_IA32_MCG_CTL
:
1673 if (!(mcg_cap
& MCG_CTL_P
))
1675 data
= vcpu
->arch
.mcg_ctl
;
1677 case MSR_IA32_MCG_STATUS
:
1678 data
= vcpu
->arch
.mcg_status
;
1681 if (msr
>= MSR_IA32_MC0_CTL
&&
1682 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1683 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1684 data
= vcpu
->arch
.mce_banks
[offset
];
1693 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1696 struct kvm
*kvm
= vcpu
->kvm
;
1699 case HV_X64_MSR_GUEST_OS_ID
:
1700 data
= kvm
->arch
.hv_guest_os_id
;
1702 case HV_X64_MSR_HYPERCALL
:
1703 data
= kvm
->arch
.hv_hypercall
;
1706 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1714 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1719 case HV_X64_MSR_VP_INDEX
: {
1722 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
)
1727 case HV_X64_MSR_EOI
:
1728 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
1729 case HV_X64_MSR_ICR
:
1730 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
1731 case HV_X64_MSR_TPR
:
1732 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
1734 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1741 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1746 case MSR_IA32_PLATFORM_ID
:
1747 case MSR_IA32_UCODE_REV
:
1748 case MSR_IA32_EBL_CR_POWERON
:
1749 case MSR_IA32_DEBUGCTLMSR
:
1750 case MSR_IA32_LASTBRANCHFROMIP
:
1751 case MSR_IA32_LASTBRANCHTOIP
:
1752 case MSR_IA32_LASTINTFROMIP
:
1753 case MSR_IA32_LASTINTTOIP
:
1756 case MSR_VM_HSAVE_PA
:
1757 case MSR_P6_PERFCTR0
:
1758 case MSR_P6_PERFCTR1
:
1759 case MSR_P6_EVNTSEL0
:
1760 case MSR_P6_EVNTSEL1
:
1761 case MSR_K7_EVNTSEL0
:
1762 case MSR_K7_PERFCTR0
:
1763 case MSR_K8_INT_PENDING_MSG
:
1764 case MSR_AMD64_NB_CFG
:
1765 case MSR_FAM10H_MMIO_CONF_BASE
:
1769 data
= 0x500 | KVM_NR_VAR_MTRR
;
1771 case 0x200 ... 0x2ff:
1772 return get_msr_mtrr(vcpu
, msr
, pdata
);
1773 case 0xcd: /* fsb frequency */
1777 * MSR_EBC_FREQUENCY_ID
1778 * Conservative value valid for even the basic CPU models.
1779 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1780 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1781 * and 266MHz for model 3, or 4. Set Core Clock
1782 * Frequency to System Bus Frequency Ratio to 1 (bits
1783 * 31:24) even though these are only valid for CPU
1784 * models > 2, however guests may end up dividing or
1785 * multiplying by zero otherwise.
1787 case MSR_EBC_FREQUENCY_ID
:
1790 case MSR_IA32_APICBASE
:
1791 data
= kvm_get_apic_base(vcpu
);
1793 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1794 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1796 case MSR_IA32_MISC_ENABLE
:
1797 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1799 case MSR_IA32_PERF_STATUS
:
1800 /* TSC increment by tick */
1802 /* CPU multiplier */
1803 data
|= (((uint64_t)4ULL) << 40);
1806 data
= vcpu
->arch
.efer
;
1808 case MSR_KVM_WALL_CLOCK
:
1809 case MSR_KVM_WALL_CLOCK_NEW
:
1810 data
= vcpu
->kvm
->arch
.wall_clock
;
1812 case MSR_KVM_SYSTEM_TIME
:
1813 case MSR_KVM_SYSTEM_TIME_NEW
:
1814 data
= vcpu
->arch
.time
;
1816 case MSR_KVM_ASYNC_PF_EN
:
1817 data
= vcpu
->arch
.apf
.msr_val
;
1819 case MSR_IA32_P5_MC_ADDR
:
1820 case MSR_IA32_P5_MC_TYPE
:
1821 case MSR_IA32_MCG_CAP
:
1822 case MSR_IA32_MCG_CTL
:
1823 case MSR_IA32_MCG_STATUS
:
1824 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1825 return get_msr_mce(vcpu
, msr
, pdata
);
1826 case MSR_K7_CLK_CTL
:
1828 * Provide expected ramp-up count for K7. All other
1829 * are set to zero, indicating minimum divisors for
1832 * This prevents guest kernels on AMD host with CPU
1833 * type 6, model 8 and higher from exploding due to
1834 * the rdmsr failing.
1838 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1839 if (kvm_hv_msr_partition_wide(msr
)) {
1841 mutex_lock(&vcpu
->kvm
->lock
);
1842 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
1843 mutex_unlock(&vcpu
->kvm
->lock
);
1846 return get_msr_hyperv(vcpu
, msr
, pdata
);
1850 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1853 pr_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
1861 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1864 * Read or write a bunch of msrs. All parameters are kernel addresses.
1866 * @return number of msrs set successfully.
1868 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1869 struct kvm_msr_entry
*entries
,
1870 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1871 unsigned index
, u64
*data
))
1875 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
1876 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1877 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1879 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
1885 * Read or write a bunch of msrs. Parameters are user addresses.
1887 * @return number of msrs set successfully.
1889 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1890 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1891 unsigned index
, u64
*data
),
1894 struct kvm_msrs msrs
;
1895 struct kvm_msr_entry
*entries
;
1900 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1904 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1908 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1909 entries
= kmalloc(size
, GFP_KERNEL
);
1914 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1917 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1922 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1933 int kvm_dev_ioctl_check_extension(long ext
)
1938 case KVM_CAP_IRQCHIP
:
1940 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1941 case KVM_CAP_SET_TSS_ADDR
:
1942 case KVM_CAP_EXT_CPUID
:
1943 case KVM_CAP_CLOCKSOURCE
:
1945 case KVM_CAP_NOP_IO_DELAY
:
1946 case KVM_CAP_MP_STATE
:
1947 case KVM_CAP_SYNC_MMU
:
1948 case KVM_CAP_REINJECT_CONTROL
:
1949 case KVM_CAP_IRQ_INJECT_STATUS
:
1950 case KVM_CAP_ASSIGN_DEV_IRQ
:
1952 case KVM_CAP_IOEVENTFD
:
1954 case KVM_CAP_PIT_STATE2
:
1955 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
1956 case KVM_CAP_XEN_HVM
:
1957 case KVM_CAP_ADJUST_CLOCK
:
1958 case KVM_CAP_VCPU_EVENTS
:
1959 case KVM_CAP_HYPERV
:
1960 case KVM_CAP_HYPERV_VAPIC
:
1961 case KVM_CAP_HYPERV_SPIN
:
1962 case KVM_CAP_PCI_SEGMENT
:
1963 case KVM_CAP_DEBUGREGS
:
1964 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
1966 case KVM_CAP_ASYNC_PF
:
1969 case KVM_CAP_COALESCED_MMIO
:
1970 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
1973 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
1975 case KVM_CAP_NR_VCPUS
:
1978 case KVM_CAP_NR_MEMSLOTS
:
1979 r
= KVM_MEMORY_SLOTS
;
1981 case KVM_CAP_PV_MMU
: /* obsolete */
1988 r
= KVM_MAX_MCE_BANKS
;
2001 long kvm_arch_dev_ioctl(struct file
*filp
,
2002 unsigned int ioctl
, unsigned long arg
)
2004 void __user
*argp
= (void __user
*)arg
;
2008 case KVM_GET_MSR_INDEX_LIST
: {
2009 struct kvm_msr_list __user
*user_msr_list
= argp
;
2010 struct kvm_msr_list msr_list
;
2014 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2017 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
2018 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2021 if (n
< msr_list
.nmsrs
)
2024 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2025 num_msrs_to_save
* sizeof(u32
)))
2027 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2029 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
2034 case KVM_GET_SUPPORTED_CPUID
: {
2035 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2036 struct kvm_cpuid2 cpuid
;
2039 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2041 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
2042 cpuid_arg
->entries
);
2047 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2052 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2055 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2057 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2069 static void wbinvd_ipi(void *garbage
)
2074 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2076 return vcpu
->kvm
->arch
.iommu_domain
&&
2077 !(vcpu
->kvm
->arch
.iommu_flags
& KVM_IOMMU_CACHE_COHERENCY
);
2080 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2082 /* Address WBINVD may be executed by guest */
2083 if (need_emulate_wbinvd(vcpu
)) {
2084 if (kvm_x86_ops
->has_wbinvd_exit())
2085 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2086 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2087 smp_call_function_single(vcpu
->cpu
,
2088 wbinvd_ipi
, NULL
, 1);
2091 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2092 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2093 /* Make sure TSC doesn't go backwards */
2094 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2095 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2097 mark_tsc_unstable("KVM discovered backwards TSC");
2098 if (check_tsc_unstable()) {
2099 kvm_x86_ops
->adjust_tsc_offset(vcpu
, -tsc_delta
);
2100 vcpu
->arch
.tsc_catchup
= 1;
2101 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2103 if (vcpu
->cpu
!= cpu
)
2104 kvm_migrate_timers(vcpu
);
2109 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2111 kvm_x86_ops
->vcpu_put(vcpu
);
2112 kvm_put_guest_fpu(vcpu
);
2113 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2116 static int is_efer_nx(void)
2118 unsigned long long efer
= 0;
2120 rdmsrl_safe(MSR_EFER
, &efer
);
2121 return efer
& EFER_NX
;
2124 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
2127 struct kvm_cpuid_entry2
*e
, *entry
;
2130 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
2131 e
= &vcpu
->arch
.cpuid_entries
[i
];
2132 if (e
->function
== 0x80000001) {
2137 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
2138 entry
->edx
&= ~(1 << 20);
2139 printk(KERN_INFO
"kvm: guest NX capability removed\n");
2143 /* when an old userspace process fills a new kernel module */
2144 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
2145 struct kvm_cpuid
*cpuid
,
2146 struct kvm_cpuid_entry __user
*entries
)
2149 struct kvm_cpuid_entry
*cpuid_entries
;
2152 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2155 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
2159 if (copy_from_user(cpuid_entries
, entries
,
2160 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
2162 for (i
= 0; i
< cpuid
->nent
; i
++) {
2163 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
2164 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
2165 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
2166 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
2167 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
2168 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
2169 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
2170 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
2171 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
2172 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
2174 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
2175 cpuid_fix_nx_cap(vcpu
);
2177 kvm_apic_set_version(vcpu
);
2178 kvm_x86_ops
->cpuid_update(vcpu
);
2182 vfree(cpuid_entries
);
2187 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
2188 struct kvm_cpuid2
*cpuid
,
2189 struct kvm_cpuid_entry2 __user
*entries
)
2194 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2197 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
2198 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
2200 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
2201 kvm_apic_set_version(vcpu
);
2202 kvm_x86_ops
->cpuid_update(vcpu
);
2210 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
2211 struct kvm_cpuid2
*cpuid
,
2212 struct kvm_cpuid_entry2 __user
*entries
)
2217 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
2220 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
2221 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
2226 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
2230 static void cpuid_mask(u32
*word
, int wordnum
)
2232 *word
&= boot_cpu_data
.x86_capability
[wordnum
];
2235 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
2238 entry
->function
= function
;
2239 entry
->index
= index
;
2240 cpuid_count(entry
->function
, entry
->index
,
2241 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
2245 #define F(x) bit(X86_FEATURE_##x)
2247 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
2248 u32 index
, int *nent
, int maxnent
)
2250 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
2251 #ifdef CONFIG_X86_64
2252 unsigned f_gbpages
= (kvm_x86_ops
->get_lpage_level() == PT_PDPE_LEVEL
)
2254 unsigned f_lm
= F(LM
);
2256 unsigned f_gbpages
= 0;
2259 unsigned f_rdtscp
= kvm_x86_ops
->rdtscp_supported() ? F(RDTSCP
) : 0;
2262 const u32 kvm_supported_word0_x86_features
=
2263 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
2264 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
2265 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
2266 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
2267 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
2268 0 /* Reserved, DS, ACPI */ | F(MMX
) |
2269 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
2270 0 /* HTT, TM, Reserved, PBE */;
2271 /* cpuid 0x80000001.edx */
2272 const u32 kvm_supported_word1_x86_features
=
2273 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
2274 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
2275 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
2276 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
2277 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
2278 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
2279 F(FXSR
) | F(FXSR_OPT
) | f_gbpages
| f_rdtscp
|
2280 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
2282 const u32 kvm_supported_word4_x86_features
=
2283 F(XMM3
) | F(PCLMULQDQ
) | 0 /* DTES64, MONITOR */ |
2284 0 /* DS-CPL, VMX, SMX, EST */ |
2285 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2286 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
2287 0 /* Reserved, DCA */ | F(XMM4_1
) |
2288 F(XMM4_2
) | F(X2APIC
) | F(MOVBE
) | F(POPCNT
) |
2289 0 /* Reserved*/ | F(AES
) | F(XSAVE
) | 0 /* OSXSAVE */ | F(AVX
) |
2291 /* cpuid 0x80000001.ecx */
2292 const u32 kvm_supported_word6_x86_features
=
2293 F(LAHF_LM
) | F(CMP_LEGACY
) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2294 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
2295 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP
) |
2296 0 /* SKINIT, WDT, LWP */ | F(FMA4
) | F(TBM
);
2298 /* all calls to cpuid_count() should be made on the same cpu */
2300 do_cpuid_1_ent(entry
, function
, index
);
2305 entry
->eax
= min(entry
->eax
, (u32
)0xd);
2308 entry
->edx
&= kvm_supported_word0_x86_features
;
2309 cpuid_mask(&entry
->edx
, 0);
2310 entry
->ecx
&= kvm_supported_word4_x86_features
;
2311 cpuid_mask(&entry
->ecx
, 4);
2312 /* we support x2apic emulation even if host does not support
2313 * it since we emulate x2apic in software */
2314 entry
->ecx
|= F(X2APIC
);
2316 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2317 * may return different values. This forces us to get_cpu() before
2318 * issuing the first command, and also to emulate this annoying behavior
2319 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2321 int t
, times
= entry
->eax
& 0xff;
2323 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
2324 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
2325 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
2326 do_cpuid_1_ent(&entry
[t
], function
, 0);
2327 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
2332 /* function 4 and 0xb have additional index. */
2336 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2337 /* read more entries until cache_type is zero */
2338 for (i
= 1; *nent
< maxnent
; ++i
) {
2339 cache_type
= entry
[i
- 1].eax
& 0x1f;
2342 do_cpuid_1_ent(&entry
[i
], function
, i
);
2344 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2352 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2353 /* read more entries until level_type is zero */
2354 for (i
= 1; *nent
< maxnent
; ++i
) {
2355 level_type
= entry
[i
- 1].ecx
& 0xff00;
2358 do_cpuid_1_ent(&entry
[i
], function
, i
);
2360 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2368 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2369 for (i
= 1; *nent
< maxnent
; ++i
) {
2370 if (entry
[i
- 1].eax
== 0 && i
!= 2)
2372 do_cpuid_1_ent(&entry
[i
], function
, i
);
2374 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2379 case KVM_CPUID_SIGNATURE
: {
2380 char signature
[12] = "KVMKVMKVM\0\0";
2381 u32
*sigptr
= (u32
*)signature
;
2383 entry
->ebx
= sigptr
[0];
2384 entry
->ecx
= sigptr
[1];
2385 entry
->edx
= sigptr
[2];
2388 case KVM_CPUID_FEATURES
:
2389 entry
->eax
= (1 << KVM_FEATURE_CLOCKSOURCE
) |
2390 (1 << KVM_FEATURE_NOP_IO_DELAY
) |
2391 (1 << KVM_FEATURE_CLOCKSOURCE2
) |
2392 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT
);
2398 entry
->eax
= min(entry
->eax
, 0x8000001a);
2401 entry
->edx
&= kvm_supported_word1_x86_features
;
2402 cpuid_mask(&entry
->edx
, 1);
2403 entry
->ecx
&= kvm_supported_word6_x86_features
;
2404 cpuid_mask(&entry
->ecx
, 6);
2408 kvm_x86_ops
->set_supported_cpuid(function
, entry
);
2415 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
2416 struct kvm_cpuid_entry2 __user
*entries
)
2418 struct kvm_cpuid_entry2
*cpuid_entries
;
2419 int limit
, nent
= 0, r
= -E2BIG
;
2422 if (cpuid
->nent
< 1)
2424 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2425 cpuid
->nent
= KVM_MAX_CPUID_ENTRIES
;
2427 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
2431 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
2432 limit
= cpuid_entries
[0].eax
;
2433 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
2434 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
2435 &nent
, cpuid
->nent
);
2437 if (nent
>= cpuid
->nent
)
2440 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
2441 limit
= cpuid_entries
[nent
- 1].eax
;
2442 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
2443 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
2444 &nent
, cpuid
->nent
);
2449 if (nent
>= cpuid
->nent
)
2452 do_cpuid_ent(&cpuid_entries
[nent
], KVM_CPUID_SIGNATURE
, 0, &nent
,
2456 if (nent
>= cpuid
->nent
)
2459 do_cpuid_ent(&cpuid_entries
[nent
], KVM_CPUID_FEATURES
, 0, &nent
,
2463 if (nent
>= cpuid
->nent
)
2467 if (copy_to_user(entries
, cpuid_entries
,
2468 nent
* sizeof(struct kvm_cpuid_entry2
)))
2474 vfree(cpuid_entries
);
2479 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2480 struct kvm_lapic_state
*s
)
2482 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2487 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2488 struct kvm_lapic_state
*s
)
2490 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
2491 kvm_apic_post_state_restore(vcpu
);
2492 update_cr8_intercept(vcpu
);
2497 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2498 struct kvm_interrupt
*irq
)
2500 if (irq
->irq
< 0 || irq
->irq
>= 256)
2502 if (irqchip_in_kernel(vcpu
->kvm
))
2505 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2506 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2511 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2513 kvm_inject_nmi(vcpu
);
2518 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2519 struct kvm_tpr_access_ctl
*tac
)
2523 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2527 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2531 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2534 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2536 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2539 vcpu
->arch
.mcg_cap
= mcg_cap
;
2540 /* Init IA32_MCG_CTL to all 1s */
2541 if (mcg_cap
& MCG_CTL_P
)
2542 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2543 /* Init IA32_MCi_CTL to all 1s */
2544 for (bank
= 0; bank
< bank_num
; bank
++)
2545 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2550 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2551 struct kvm_x86_mce
*mce
)
2553 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2554 unsigned bank_num
= mcg_cap
& 0xff;
2555 u64
*banks
= vcpu
->arch
.mce_banks
;
2557 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2560 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2561 * reporting is disabled
2563 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2564 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2566 banks
+= 4 * mce
->bank
;
2568 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2569 * reporting is disabled for the bank
2571 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2573 if (mce
->status
& MCI_STATUS_UC
) {
2574 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2575 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2576 printk(KERN_DEBUG
"kvm: set_mce: "
2577 "injects mce exception while "
2578 "previous one is in progress!\n");
2579 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2582 if (banks
[1] & MCI_STATUS_VAL
)
2583 mce
->status
|= MCI_STATUS_OVER
;
2584 banks
[2] = mce
->addr
;
2585 banks
[3] = mce
->misc
;
2586 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2587 banks
[1] = mce
->status
;
2588 kvm_queue_exception(vcpu
, MC_VECTOR
);
2589 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2590 || !(banks
[1] & MCI_STATUS_UC
)) {
2591 if (banks
[1] & MCI_STATUS_VAL
)
2592 mce
->status
|= MCI_STATUS_OVER
;
2593 banks
[2] = mce
->addr
;
2594 banks
[3] = mce
->misc
;
2595 banks
[1] = mce
->status
;
2597 banks
[1] |= MCI_STATUS_OVER
;
2601 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2602 struct kvm_vcpu_events
*events
)
2604 events
->exception
.injected
=
2605 vcpu
->arch
.exception
.pending
&&
2606 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2607 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2608 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2609 events
->exception
.pad
= 0;
2610 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2612 events
->interrupt
.injected
=
2613 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2614 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2615 events
->interrupt
.soft
= 0;
2616 events
->interrupt
.shadow
=
2617 kvm_x86_ops
->get_interrupt_shadow(vcpu
,
2618 KVM_X86_SHADOW_INT_MOV_SS
| KVM_X86_SHADOW_INT_STI
);
2620 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2621 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
;
2622 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2623 events
->nmi
.pad
= 0;
2625 events
->sipi_vector
= vcpu
->arch
.sipi_vector
;
2627 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2628 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2629 | KVM_VCPUEVENT_VALID_SHADOW
);
2630 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2633 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2634 struct kvm_vcpu_events
*events
)
2636 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2637 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2638 | KVM_VCPUEVENT_VALID_SHADOW
))
2641 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2642 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2643 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2644 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2646 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2647 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2648 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2649 if (vcpu
->arch
.interrupt
.pending
&& irqchip_in_kernel(vcpu
->kvm
))
2650 kvm_pic_clear_isr_ack(vcpu
->kvm
);
2651 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2652 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2653 events
->interrupt
.shadow
);
2655 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2656 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2657 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2658 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2660 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
)
2661 vcpu
->arch
.sipi_vector
= events
->sipi_vector
;
2663 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2668 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
2669 struct kvm_debugregs
*dbgregs
)
2671 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
2672 dbgregs
->dr6
= vcpu
->arch
.dr6
;
2673 dbgregs
->dr7
= vcpu
->arch
.dr7
;
2675 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
2678 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
2679 struct kvm_debugregs
*dbgregs
)
2684 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
2685 vcpu
->arch
.dr6
= dbgregs
->dr6
;
2686 vcpu
->arch
.dr7
= dbgregs
->dr7
;
2691 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
2692 struct kvm_xsave
*guest_xsave
)
2695 memcpy(guest_xsave
->region
,
2696 &vcpu
->arch
.guest_fpu
.state
->xsave
,
2699 memcpy(guest_xsave
->region
,
2700 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
2701 sizeof(struct i387_fxsave_struct
));
2702 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
2707 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
2708 struct kvm_xsave
*guest_xsave
)
2711 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
2714 memcpy(&vcpu
->arch
.guest_fpu
.state
->xsave
,
2715 guest_xsave
->region
, xstate_size
);
2717 if (xstate_bv
& ~XSTATE_FPSSE
)
2719 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
2720 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
2725 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
2726 struct kvm_xcrs
*guest_xcrs
)
2728 if (!cpu_has_xsave
) {
2729 guest_xcrs
->nr_xcrs
= 0;
2733 guest_xcrs
->nr_xcrs
= 1;
2734 guest_xcrs
->flags
= 0;
2735 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
2736 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
2739 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
2740 struct kvm_xcrs
*guest_xcrs
)
2747 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
2750 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
2751 /* Only support XCR0 currently */
2752 if (guest_xcrs
->xcrs
[0].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
2753 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
2754 guest_xcrs
->xcrs
[0].value
);
2762 long kvm_arch_vcpu_ioctl(struct file
*filp
,
2763 unsigned int ioctl
, unsigned long arg
)
2765 struct kvm_vcpu
*vcpu
= filp
->private_data
;
2766 void __user
*argp
= (void __user
*)arg
;
2769 struct kvm_lapic_state
*lapic
;
2770 struct kvm_xsave
*xsave
;
2771 struct kvm_xcrs
*xcrs
;
2777 case KVM_GET_LAPIC
: {
2779 if (!vcpu
->arch
.apic
)
2781 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2786 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
2790 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
2795 case KVM_SET_LAPIC
: {
2797 if (!vcpu
->arch
.apic
)
2799 u
.lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2804 if (copy_from_user(u
.lapic
, argp
, sizeof(struct kvm_lapic_state
)))
2806 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
2812 case KVM_INTERRUPT
: {
2813 struct kvm_interrupt irq
;
2816 if (copy_from_user(&irq
, argp
, sizeof irq
))
2818 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
2825 r
= kvm_vcpu_ioctl_nmi(vcpu
);
2831 case KVM_SET_CPUID
: {
2832 struct kvm_cpuid __user
*cpuid_arg
= argp
;
2833 struct kvm_cpuid cpuid
;
2836 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2838 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
2843 case KVM_SET_CPUID2
: {
2844 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2845 struct kvm_cpuid2 cpuid
;
2848 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2850 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
2851 cpuid_arg
->entries
);
2856 case KVM_GET_CPUID2
: {
2857 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2858 struct kvm_cpuid2 cpuid
;
2861 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2863 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
2864 cpuid_arg
->entries
);
2868 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2874 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
2877 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
2879 case KVM_TPR_ACCESS_REPORTING
: {
2880 struct kvm_tpr_access_ctl tac
;
2883 if (copy_from_user(&tac
, argp
, sizeof tac
))
2885 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
2889 if (copy_to_user(argp
, &tac
, sizeof tac
))
2894 case KVM_SET_VAPIC_ADDR
: {
2895 struct kvm_vapic_addr va
;
2898 if (!irqchip_in_kernel(vcpu
->kvm
))
2901 if (copy_from_user(&va
, argp
, sizeof va
))
2904 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
2907 case KVM_X86_SETUP_MCE
: {
2911 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
2913 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
2916 case KVM_X86_SET_MCE
: {
2917 struct kvm_x86_mce mce
;
2920 if (copy_from_user(&mce
, argp
, sizeof mce
))
2922 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
2925 case KVM_GET_VCPU_EVENTS
: {
2926 struct kvm_vcpu_events events
;
2928 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
2931 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
2936 case KVM_SET_VCPU_EVENTS
: {
2937 struct kvm_vcpu_events events
;
2940 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
2943 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
2946 case KVM_GET_DEBUGREGS
: {
2947 struct kvm_debugregs dbgregs
;
2949 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
2952 if (copy_to_user(argp
, &dbgregs
,
2953 sizeof(struct kvm_debugregs
)))
2958 case KVM_SET_DEBUGREGS
: {
2959 struct kvm_debugregs dbgregs
;
2962 if (copy_from_user(&dbgregs
, argp
,
2963 sizeof(struct kvm_debugregs
)))
2966 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
2969 case KVM_GET_XSAVE
: {
2970 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
2975 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
2978 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
2983 case KVM_SET_XSAVE
: {
2984 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
2990 if (copy_from_user(u
.xsave
, argp
, sizeof(struct kvm_xsave
)))
2993 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
2996 case KVM_GET_XCRS
: {
2997 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3002 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3005 if (copy_to_user(argp
, u
.xcrs
,
3006 sizeof(struct kvm_xcrs
)))
3011 case KVM_SET_XCRS
: {
3012 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3018 if (copy_from_user(u
.xcrs
, argp
,
3019 sizeof(struct kvm_xcrs
)))
3022 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3033 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3037 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3039 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3043 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3046 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3050 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3051 u32 kvm_nr_mmu_pages
)
3053 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3056 mutex_lock(&kvm
->slots_lock
);
3057 spin_lock(&kvm
->mmu_lock
);
3059 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3060 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3062 spin_unlock(&kvm
->mmu_lock
);
3063 mutex_unlock(&kvm
->slots_lock
);
3067 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3069 return kvm
->arch
.n_max_mmu_pages
;
3072 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3077 switch (chip
->chip_id
) {
3078 case KVM_IRQCHIP_PIC_MASTER
:
3079 memcpy(&chip
->chip
.pic
,
3080 &pic_irqchip(kvm
)->pics
[0],
3081 sizeof(struct kvm_pic_state
));
3083 case KVM_IRQCHIP_PIC_SLAVE
:
3084 memcpy(&chip
->chip
.pic
,
3085 &pic_irqchip(kvm
)->pics
[1],
3086 sizeof(struct kvm_pic_state
));
3088 case KVM_IRQCHIP_IOAPIC
:
3089 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3098 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3103 switch (chip
->chip_id
) {
3104 case KVM_IRQCHIP_PIC_MASTER
:
3105 spin_lock(&pic_irqchip(kvm
)->lock
);
3106 memcpy(&pic_irqchip(kvm
)->pics
[0],
3108 sizeof(struct kvm_pic_state
));
3109 spin_unlock(&pic_irqchip(kvm
)->lock
);
3111 case KVM_IRQCHIP_PIC_SLAVE
:
3112 spin_lock(&pic_irqchip(kvm
)->lock
);
3113 memcpy(&pic_irqchip(kvm
)->pics
[1],
3115 sizeof(struct kvm_pic_state
));
3116 spin_unlock(&pic_irqchip(kvm
)->lock
);
3118 case KVM_IRQCHIP_IOAPIC
:
3119 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3125 kvm_pic_update_irq(pic_irqchip(kvm
));
3129 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3133 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3134 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3135 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3139 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3143 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3144 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3145 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3146 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3150 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3154 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3155 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3156 sizeof(ps
->channels
));
3157 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3158 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3159 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3163 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3165 int r
= 0, start
= 0;
3166 u32 prev_legacy
, cur_legacy
;
3167 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3168 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3169 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3170 if (!prev_legacy
&& cur_legacy
)
3172 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3173 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3174 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3175 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3176 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3180 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3181 struct kvm_reinject_control
*control
)
3183 if (!kvm
->arch
.vpit
)
3185 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3186 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
3187 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3192 * Get (and clear) the dirty memory log for a memory slot.
3194 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
3195 struct kvm_dirty_log
*log
)
3198 struct kvm_memory_slot
*memslot
;
3200 unsigned long is_dirty
= 0;
3202 mutex_lock(&kvm
->slots_lock
);
3205 if (log
->slot
>= KVM_MEMORY_SLOTS
)
3208 memslot
= &kvm
->memslots
->memslots
[log
->slot
];
3210 if (!memslot
->dirty_bitmap
)
3213 n
= kvm_dirty_bitmap_bytes(memslot
);
3215 for (i
= 0; !is_dirty
&& i
< n
/sizeof(long); i
++)
3216 is_dirty
= memslot
->dirty_bitmap
[i
];
3218 /* If nothing is dirty, don't bother messing with page tables. */
3220 struct kvm_memslots
*slots
, *old_slots
;
3221 unsigned long *dirty_bitmap
;
3223 dirty_bitmap
= memslot
->dirty_bitmap_head
;
3224 if (memslot
->dirty_bitmap
== dirty_bitmap
)
3225 dirty_bitmap
+= n
/ sizeof(long);
3226 memset(dirty_bitmap
, 0, n
);
3229 slots
= kzalloc(sizeof(struct kvm_memslots
), GFP_KERNEL
);
3232 memcpy(slots
, kvm
->memslots
, sizeof(struct kvm_memslots
));
3233 slots
->memslots
[log
->slot
].dirty_bitmap
= dirty_bitmap
;
3234 slots
->generation
++;
3236 old_slots
= kvm
->memslots
;
3237 rcu_assign_pointer(kvm
->memslots
, slots
);
3238 synchronize_srcu_expedited(&kvm
->srcu
);
3239 dirty_bitmap
= old_slots
->memslots
[log
->slot
].dirty_bitmap
;
3242 spin_lock(&kvm
->mmu_lock
);
3243 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
3244 spin_unlock(&kvm
->mmu_lock
);
3247 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap
, n
))
3251 if (clear_user(log
->dirty_bitmap
, n
))
3257 mutex_unlock(&kvm
->slots_lock
);
3261 long kvm_arch_vm_ioctl(struct file
*filp
,
3262 unsigned int ioctl
, unsigned long arg
)
3264 struct kvm
*kvm
= filp
->private_data
;
3265 void __user
*argp
= (void __user
*)arg
;
3268 * This union makes it completely explicit to gcc-3.x
3269 * that these two variables' stack usage should be
3270 * combined, not added together.
3273 struct kvm_pit_state ps
;
3274 struct kvm_pit_state2 ps2
;
3275 struct kvm_pit_config pit_config
;
3279 case KVM_SET_TSS_ADDR
:
3280 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3284 case KVM_SET_IDENTITY_MAP_ADDR
: {
3288 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3290 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3295 case KVM_SET_NR_MMU_PAGES
:
3296 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3300 case KVM_GET_NR_MMU_PAGES
:
3301 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3303 case KVM_CREATE_IRQCHIP
: {
3304 struct kvm_pic
*vpic
;
3306 mutex_lock(&kvm
->lock
);
3309 goto create_irqchip_unlock
;
3311 vpic
= kvm_create_pic(kvm
);
3313 r
= kvm_ioapic_init(kvm
);
3315 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3318 goto create_irqchip_unlock
;
3321 goto create_irqchip_unlock
;
3323 kvm
->arch
.vpic
= vpic
;
3325 r
= kvm_setup_default_irq_routing(kvm
);
3327 mutex_lock(&kvm
->irq_lock
);
3328 kvm_ioapic_destroy(kvm
);
3329 kvm_destroy_pic(kvm
);
3330 mutex_unlock(&kvm
->irq_lock
);
3332 create_irqchip_unlock
:
3333 mutex_unlock(&kvm
->lock
);
3336 case KVM_CREATE_PIT
:
3337 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3339 case KVM_CREATE_PIT2
:
3341 if (copy_from_user(&u
.pit_config
, argp
,
3342 sizeof(struct kvm_pit_config
)))
3345 mutex_lock(&kvm
->slots_lock
);
3348 goto create_pit_unlock
;
3350 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3354 mutex_unlock(&kvm
->slots_lock
);
3356 case KVM_IRQ_LINE_STATUS
:
3357 case KVM_IRQ_LINE
: {
3358 struct kvm_irq_level irq_event
;
3361 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
3364 if (irqchip_in_kernel(kvm
)) {
3366 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3367 irq_event
.irq
, irq_event
.level
);
3368 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
3370 irq_event
.status
= status
;
3371 if (copy_to_user(argp
, &irq_event
,
3379 case KVM_GET_IRQCHIP
: {
3380 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3381 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
3387 if (copy_from_user(chip
, argp
, sizeof *chip
))
3388 goto get_irqchip_out
;
3390 if (!irqchip_in_kernel(kvm
))
3391 goto get_irqchip_out
;
3392 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3394 goto get_irqchip_out
;
3396 if (copy_to_user(argp
, chip
, sizeof *chip
))
3397 goto get_irqchip_out
;
3405 case KVM_SET_IRQCHIP
: {
3406 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3407 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
3413 if (copy_from_user(chip
, argp
, sizeof *chip
))
3414 goto set_irqchip_out
;
3416 if (!irqchip_in_kernel(kvm
))
3417 goto set_irqchip_out
;
3418 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3420 goto set_irqchip_out
;
3430 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3433 if (!kvm
->arch
.vpit
)
3435 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3439 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3446 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3449 if (!kvm
->arch
.vpit
)
3451 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3457 case KVM_GET_PIT2
: {
3459 if (!kvm
->arch
.vpit
)
3461 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3465 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3470 case KVM_SET_PIT2
: {
3472 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3475 if (!kvm
->arch
.vpit
)
3477 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3483 case KVM_REINJECT_CONTROL
: {
3484 struct kvm_reinject_control control
;
3486 if (copy_from_user(&control
, argp
, sizeof(control
)))
3488 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3494 case KVM_XEN_HVM_CONFIG
: {
3496 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3497 sizeof(struct kvm_xen_hvm_config
)))
3500 if (kvm
->arch
.xen_hvm_config
.flags
)
3505 case KVM_SET_CLOCK
: {
3506 struct kvm_clock_data user_ns
;
3511 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3519 local_irq_disable();
3520 now_ns
= get_kernel_ns();
3521 delta
= user_ns
.clock
- now_ns
;
3523 kvm
->arch
.kvmclock_offset
= delta
;
3526 case KVM_GET_CLOCK
: {
3527 struct kvm_clock_data user_ns
;
3530 local_irq_disable();
3531 now_ns
= get_kernel_ns();
3532 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3535 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
3538 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3551 static void kvm_init_msr_list(void)
3556 /* skip the first msrs in the list. KVM-specific */
3557 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3558 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3561 msrs_to_save
[j
] = msrs_to_save
[i
];
3564 num_msrs_to_save
= j
;
3567 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3570 if (vcpu
->arch
.apic
&&
3571 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
3574 return kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
3577 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3579 if (vcpu
->arch
.apic
&&
3580 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
3583 return kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
3586 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3587 struct kvm_segment
*var
, int seg
)
3589 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3592 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3593 struct kvm_segment
*var
, int seg
)
3595 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3598 static gpa_t
translate_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3603 static gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3608 BUG_ON(!mmu_is_nested(vcpu
));
3610 /* NPT walks are always user-walks */
3611 access
|= PFERR_USER_MASK
;
3612 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, &error
);
3613 if (t_gpa
== UNMAPPED_GVA
)
3614 vcpu
->arch
.fault
.nested
= true;
3619 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3621 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3622 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, error
);
3625 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3627 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3628 access
|= PFERR_FETCH_MASK
;
3629 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, error
);
3632 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3634 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3635 access
|= PFERR_WRITE_MASK
;
3636 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, error
);
3639 /* uses this to access any guest's mapped memory without checking CPL */
3640 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3642 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, error
);
3645 static int make_page_fault(struct x86_exception
*exception
, u32 error
)
3647 exception
->vector
= PF_VECTOR
;
3648 exception
->error_code_valid
= true;
3649 exception
->error_code
= error
;
3650 return X86EMUL_PROPAGATE_FAULT
;
3653 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
3654 struct kvm_vcpu
*vcpu
, u32 access
,
3655 struct x86_exception
*exception
)
3658 int r
= X86EMUL_CONTINUE
;
3662 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
3664 unsigned offset
= addr
& (PAGE_SIZE
-1);
3665 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3668 if (gpa
== UNMAPPED_GVA
)
3669 return make_page_fault(exception
, error
);
3670 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
3672 r
= X86EMUL_IO_NEEDED
;
3684 /* used for instruction fetching */
3685 static int kvm_fetch_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
3686 struct kvm_vcpu
*vcpu
,
3687 struct x86_exception
*exception
)
3689 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3690 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
,
3691 access
| PFERR_FETCH_MASK
,
3695 static int kvm_read_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
3696 struct kvm_vcpu
*vcpu
,
3697 struct x86_exception
*exception
)
3699 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3700 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
3704 static int kvm_read_guest_virt_system(gva_t addr
, void *val
, unsigned int bytes
,
3705 struct kvm_vcpu
*vcpu
,
3706 struct x86_exception
*exception
)
3708 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
3711 static int kvm_write_guest_virt_system(gva_t addr
, void *val
,
3713 struct kvm_vcpu
*vcpu
,
3714 struct x86_exception
*exception
)
3717 int r
= X86EMUL_CONTINUE
;
3721 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
3724 unsigned offset
= addr
& (PAGE_SIZE
-1);
3725 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3728 if (gpa
== UNMAPPED_GVA
)
3729 return make_page_fault(exception
, error
);
3730 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
3732 r
= X86EMUL_IO_NEEDED
;
3744 static int emulator_read_emulated(unsigned long addr
,
3747 struct x86_exception
*exception
,
3748 struct kvm_vcpu
*vcpu
)
3753 if (vcpu
->mmio_read_completed
) {
3754 memcpy(val
, vcpu
->mmio_data
, bytes
);
3755 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
3756 vcpu
->mmio_phys_addr
, *(u64
*)val
);
3757 vcpu
->mmio_read_completed
= 0;
3758 return X86EMUL_CONTINUE
;
3761 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, addr
, &error_code
);
3763 if (gpa
== UNMAPPED_GVA
)
3764 return make_page_fault(exception
, error_code
);
3766 /* For APIC access vmexit */
3767 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3770 if (kvm_read_guest_virt(addr
, val
, bytes
, vcpu
, exception
)
3771 == X86EMUL_CONTINUE
)
3772 return X86EMUL_CONTINUE
;
3776 * Is this MMIO handled locally?
3778 if (!vcpu_mmio_read(vcpu
, gpa
, bytes
, val
)) {
3779 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
, gpa
, *(u64
*)val
);
3780 return X86EMUL_CONTINUE
;
3783 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
3785 vcpu
->mmio_needed
= 1;
3786 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
3787 vcpu
->run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
= gpa
;
3788 vcpu
->run
->mmio
.len
= vcpu
->mmio_size
= bytes
;
3789 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= 0;
3791 return X86EMUL_IO_NEEDED
;
3794 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3795 const void *val
, int bytes
)
3799 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
3802 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
3806 static int emulator_write_emulated_onepage(unsigned long addr
,
3809 struct x86_exception
*exception
,
3810 struct kvm_vcpu
*vcpu
)
3815 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, &error_code
);
3817 if (gpa
== UNMAPPED_GVA
)
3818 return make_page_fault(exception
, error_code
);
3820 /* For APIC access vmexit */
3821 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3824 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
3825 return X86EMUL_CONTINUE
;
3828 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
3830 * Is this MMIO handled locally?
3832 if (!vcpu_mmio_write(vcpu
, gpa
, bytes
, val
))
3833 return X86EMUL_CONTINUE
;
3835 vcpu
->mmio_needed
= 1;
3836 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
3837 vcpu
->run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
= gpa
;
3838 vcpu
->run
->mmio
.len
= vcpu
->mmio_size
= bytes
;
3839 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= 1;
3840 memcpy(vcpu
->run
->mmio
.data
, val
, bytes
);
3842 return X86EMUL_CONTINUE
;
3845 int emulator_write_emulated(unsigned long addr
,
3848 struct x86_exception
*exception
,
3849 struct kvm_vcpu
*vcpu
)
3851 /* Crossing a page boundary? */
3852 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
3855 now
= -addr
& ~PAGE_MASK
;
3856 rc
= emulator_write_emulated_onepage(addr
, val
, now
, exception
,
3858 if (rc
!= X86EMUL_CONTINUE
)
3864 return emulator_write_emulated_onepage(addr
, val
, bytes
, exception
,
3868 #define CMPXCHG_TYPE(t, ptr, old, new) \
3869 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3871 #ifdef CONFIG_X86_64
3872 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3874 # define CMPXCHG64(ptr, old, new) \
3875 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3878 static int emulator_cmpxchg_emulated(unsigned long addr
,
3882 struct x86_exception
*exception
,
3883 struct kvm_vcpu
*vcpu
)
3890 /* guests cmpxchg8b have to be emulated atomically */
3891 if (bytes
> 8 || (bytes
& (bytes
- 1)))
3894 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
3896 if (gpa
== UNMAPPED_GVA
||
3897 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3900 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
3903 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
3904 if (is_error_page(page
)) {
3905 kvm_release_page_clean(page
);
3909 kaddr
= kmap_atomic(page
, KM_USER0
);
3910 kaddr
+= offset_in_page(gpa
);
3913 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
3916 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
3919 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
3922 exchanged
= CMPXCHG64(kaddr
, old
, new);
3927 kunmap_atomic(kaddr
, KM_USER0
);
3928 kvm_release_page_dirty(page
);
3931 return X86EMUL_CMPXCHG_FAILED
;
3933 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
, 1);
3935 return X86EMUL_CONTINUE
;
3938 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
3940 return emulator_write_emulated(addr
, new, bytes
, exception
, vcpu
);
3943 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
3945 /* TODO: String I/O for in kernel device */
3948 if (vcpu
->arch
.pio
.in
)
3949 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
3950 vcpu
->arch
.pio
.size
, pd
);
3952 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
3953 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
3959 static int emulator_pio_in_emulated(int size
, unsigned short port
, void *val
,
3960 unsigned int count
, struct kvm_vcpu
*vcpu
)
3962 if (vcpu
->arch
.pio
.count
)
3965 trace_kvm_pio(0, port
, size
, 1);
3967 vcpu
->arch
.pio
.port
= port
;
3968 vcpu
->arch
.pio
.in
= 1;
3969 vcpu
->arch
.pio
.count
= count
;
3970 vcpu
->arch
.pio
.size
= size
;
3972 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3974 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
3975 vcpu
->arch
.pio
.count
= 0;
3979 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3980 vcpu
->run
->io
.direction
= KVM_EXIT_IO_IN
;
3981 vcpu
->run
->io
.size
= size
;
3982 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3983 vcpu
->run
->io
.count
= count
;
3984 vcpu
->run
->io
.port
= port
;
3989 static int emulator_pio_out_emulated(int size
, unsigned short port
,
3990 const void *val
, unsigned int count
,
3991 struct kvm_vcpu
*vcpu
)
3993 trace_kvm_pio(1, port
, size
, 1);
3995 vcpu
->arch
.pio
.port
= port
;
3996 vcpu
->arch
.pio
.in
= 0;
3997 vcpu
->arch
.pio
.count
= count
;
3998 vcpu
->arch
.pio
.size
= size
;
4000 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4002 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4003 vcpu
->arch
.pio
.count
= 0;
4007 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4008 vcpu
->run
->io
.direction
= KVM_EXIT_IO_OUT
;
4009 vcpu
->run
->io
.size
= size
;
4010 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4011 vcpu
->run
->io
.count
= count
;
4012 vcpu
->run
->io
.port
= port
;
4017 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4019 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4022 int emulate_invlpg(struct kvm_vcpu
*vcpu
, gva_t address
)
4024 kvm_mmu_invlpg(vcpu
, address
);
4025 return X86EMUL_CONTINUE
;
4028 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4030 if (!need_emulate_wbinvd(vcpu
))
4031 return X86EMUL_CONTINUE
;
4033 if (kvm_x86_ops
->has_wbinvd_exit()) {
4034 int cpu
= get_cpu();
4036 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4037 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4038 wbinvd_ipi
, NULL
, 1);
4040 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4043 return X86EMUL_CONTINUE
;
4045 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4047 int emulate_clts(struct kvm_vcpu
*vcpu
)
4049 kvm_x86_ops
->set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~X86_CR0_TS
));
4050 kvm_x86_ops
->fpu_activate(vcpu
);
4051 return X86EMUL_CONTINUE
;
4054 int emulator_get_dr(int dr
, unsigned long *dest
, struct kvm_vcpu
*vcpu
)
4056 return _kvm_get_dr(vcpu
, dr
, dest
);
4059 int emulator_set_dr(int dr
, unsigned long value
, struct kvm_vcpu
*vcpu
)
4062 return __kvm_set_dr(vcpu
, dr
, value
);
4065 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4067 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4070 static unsigned long emulator_get_cr(int cr
, struct kvm_vcpu
*vcpu
)
4072 unsigned long value
;
4076 value
= kvm_read_cr0(vcpu
);
4079 value
= vcpu
->arch
.cr2
;
4082 value
= vcpu
->arch
.cr3
;
4085 value
= kvm_read_cr4(vcpu
);
4088 value
= kvm_get_cr8(vcpu
);
4091 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
4098 static int emulator_set_cr(int cr
, unsigned long val
, struct kvm_vcpu
*vcpu
)
4104 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4107 vcpu
->arch
.cr2
= val
;
4110 res
= kvm_set_cr3(vcpu
, val
);
4113 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4116 res
= __kvm_set_cr8(vcpu
, val
& 0xfUL
);
4119 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
4126 static int emulator_get_cpl(struct kvm_vcpu
*vcpu
)
4128 return kvm_x86_ops
->get_cpl(vcpu
);
4131 static void emulator_get_gdt(struct desc_ptr
*dt
, struct kvm_vcpu
*vcpu
)
4133 kvm_x86_ops
->get_gdt(vcpu
, dt
);
4136 static void emulator_get_idt(struct desc_ptr
*dt
, struct kvm_vcpu
*vcpu
)
4138 kvm_x86_ops
->get_idt(vcpu
, dt
);
4141 static unsigned long emulator_get_cached_segment_base(int seg
,
4142 struct kvm_vcpu
*vcpu
)
4144 return get_segment_base(vcpu
, seg
);
4147 static bool emulator_get_cached_descriptor(struct desc_struct
*desc
, int seg
,
4148 struct kvm_vcpu
*vcpu
)
4150 struct kvm_segment var
;
4152 kvm_get_segment(vcpu
, &var
, seg
);
4159 set_desc_limit(desc
, var
.limit
);
4160 set_desc_base(desc
, (unsigned long)var
.base
);
4161 desc
->type
= var
.type
;
4163 desc
->dpl
= var
.dpl
;
4164 desc
->p
= var
.present
;
4165 desc
->avl
= var
.avl
;
4173 static void emulator_set_cached_descriptor(struct desc_struct
*desc
, int seg
,
4174 struct kvm_vcpu
*vcpu
)
4176 struct kvm_segment var
;
4178 /* needed to preserve selector */
4179 kvm_get_segment(vcpu
, &var
, seg
);
4181 var
.base
= get_desc_base(desc
);
4182 var
.limit
= get_desc_limit(desc
);
4184 var
.limit
= (var
.limit
<< 12) | 0xfff;
4185 var
.type
= desc
->type
;
4186 var
.present
= desc
->p
;
4187 var
.dpl
= desc
->dpl
;
4192 var
.avl
= desc
->avl
;
4193 var
.present
= desc
->p
;
4194 var
.unusable
= !var
.present
;
4197 kvm_set_segment(vcpu
, &var
, seg
);
4201 static u16
emulator_get_segment_selector(int seg
, struct kvm_vcpu
*vcpu
)
4203 struct kvm_segment kvm_seg
;
4205 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4206 return kvm_seg
.selector
;
4209 static void emulator_set_segment_selector(u16 sel
, int seg
,
4210 struct kvm_vcpu
*vcpu
)
4212 struct kvm_segment kvm_seg
;
4214 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4215 kvm_seg
.selector
= sel
;
4216 kvm_set_segment(vcpu
, &kvm_seg
, seg
);
4219 static struct x86_emulate_ops emulate_ops
= {
4220 .read_std
= kvm_read_guest_virt_system
,
4221 .write_std
= kvm_write_guest_virt_system
,
4222 .fetch
= kvm_fetch_guest_virt
,
4223 .read_emulated
= emulator_read_emulated
,
4224 .write_emulated
= emulator_write_emulated
,
4225 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4226 .pio_in_emulated
= emulator_pio_in_emulated
,
4227 .pio_out_emulated
= emulator_pio_out_emulated
,
4228 .get_cached_descriptor
= emulator_get_cached_descriptor
,
4229 .set_cached_descriptor
= emulator_set_cached_descriptor
,
4230 .get_segment_selector
= emulator_get_segment_selector
,
4231 .set_segment_selector
= emulator_set_segment_selector
,
4232 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4233 .get_gdt
= emulator_get_gdt
,
4234 .get_idt
= emulator_get_idt
,
4235 .get_cr
= emulator_get_cr
,
4236 .set_cr
= emulator_set_cr
,
4237 .cpl
= emulator_get_cpl
,
4238 .get_dr
= emulator_get_dr
,
4239 .set_dr
= emulator_set_dr
,
4240 .set_msr
= kvm_set_msr
,
4241 .get_msr
= kvm_get_msr
,
4244 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
4246 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4247 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4248 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
4249 vcpu
->arch
.regs_dirty
= ~0;
4252 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4254 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
, mask
);
4256 * an sti; sti; sequence only disable interrupts for the first
4257 * instruction. So, if the last instruction, be it emulated or
4258 * not, left the system with the INT_STI flag enabled, it
4259 * means that the last instruction is an sti. We should not
4260 * leave the flag on in this case. The same goes for mov ss
4262 if (!(int_shadow
& mask
))
4263 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4266 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4268 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4269 if (ctxt
->exception
.vector
== PF_VECTOR
)
4270 kvm_propagate_fault(vcpu
);
4271 else if (ctxt
->exception
.error_code_valid
)
4272 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
4273 ctxt
->exception
.error_code
);
4275 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
4278 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4280 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4283 cache_all_regs(vcpu
);
4285 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4287 vcpu
->arch
.emulate_ctxt
.vcpu
= vcpu
;
4288 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_x86_ops
->get_rflags(vcpu
);
4289 vcpu
->arch
.emulate_ctxt
.eip
= kvm_rip_read(vcpu
);
4290 vcpu
->arch
.emulate_ctxt
.mode
=
4291 (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4292 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
4293 ? X86EMUL_MODE_VM86
: cs_l
4294 ? X86EMUL_MODE_PROT64
: cs_db
4295 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
4296 memset(c
, 0, sizeof(struct decode_cache
));
4297 memcpy(c
->regs
, vcpu
->arch
.regs
, sizeof c
->regs
);
4300 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
)
4302 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4305 init_emulate_ctxt(vcpu
);
4307 vcpu
->arch
.emulate_ctxt
.decode
.op_bytes
= 2;
4308 vcpu
->arch
.emulate_ctxt
.decode
.ad_bytes
= 2;
4309 vcpu
->arch
.emulate_ctxt
.decode
.eip
= vcpu
->arch
.emulate_ctxt
.eip
;
4310 ret
= emulate_int_real(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
, irq
);
4312 if (ret
!= X86EMUL_CONTINUE
)
4313 return EMULATE_FAIL
;
4315 vcpu
->arch
.emulate_ctxt
.eip
= c
->eip
;
4316 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
4317 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
4318 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
4320 if (irq
== NMI_VECTOR
)
4321 vcpu
->arch
.nmi_pending
= false;
4323 vcpu
->arch
.interrupt
.pending
= false;
4325 return EMULATE_DONE
;
4327 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4329 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4331 ++vcpu
->stat
.insn_emulation_fail
;
4332 trace_kvm_emulate_insn_failed(vcpu
);
4333 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4334 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4335 vcpu
->run
->internal
.ndata
= 0;
4336 kvm_queue_exception(vcpu
, UD_VECTOR
);
4337 return EMULATE_FAIL
;
4340 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t gva
)
4348 * if emulation was due to access to shadowed page table
4349 * and it failed try to unshadow page and re-entetr the
4350 * guest to let CPU execute the instruction.
4352 if (kvm_mmu_unprotect_page_virt(vcpu
, gva
))
4355 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, gva
, NULL
);
4357 if (gpa
== UNMAPPED_GVA
)
4358 return true; /* let cpu generate fault */
4360 if (!kvm_is_error_hva(gfn_to_hva(vcpu
->kvm
, gpa
>> PAGE_SHIFT
)))
4366 int emulate_instruction(struct kvm_vcpu
*vcpu
,
4372 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4374 kvm_clear_exception_queue(vcpu
);
4375 vcpu
->arch
.mmio_fault_cr2
= cr2
;
4377 * TODO: fix emulate.c to use guest_read/write_register
4378 * instead of direct ->regs accesses, can save hundred cycles
4379 * on Intel for instructions that don't read/change RSP, for
4382 cache_all_regs(vcpu
);
4384 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
4385 init_emulate_ctxt(vcpu
);
4386 vcpu
->arch
.emulate_ctxt
.interruptibility
= 0;
4387 vcpu
->arch
.emulate_ctxt
.have_exception
= false;
4388 vcpu
->arch
.emulate_ctxt
.perm_ok
= false;
4390 r
= x86_decode_insn(&vcpu
->arch
.emulate_ctxt
);
4391 if (r
== X86EMUL_PROPAGATE_FAULT
)
4394 trace_kvm_emulate_insn_start(vcpu
);
4396 /* Only allow emulation of specific instructions on #UD
4397 * (namely VMMCALL, sysenter, sysexit, syscall)*/
4398 if (emulation_type
& EMULTYPE_TRAP_UD
) {
4400 return EMULATE_FAIL
;
4402 case 0x01: /* VMMCALL */
4403 if (c
->modrm_mod
!= 3 || c
->modrm_rm
!= 1)
4404 return EMULATE_FAIL
;
4406 case 0x34: /* sysenter */
4407 case 0x35: /* sysexit */
4408 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
4409 return EMULATE_FAIL
;
4411 case 0x05: /* syscall */
4412 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
4413 return EMULATE_FAIL
;
4416 return EMULATE_FAIL
;
4419 if (!(c
->modrm_reg
== 0 || c
->modrm_reg
== 3))
4420 return EMULATE_FAIL
;
4423 ++vcpu
->stat
.insn_emulation
;
4425 if (reexecute_instruction(vcpu
, cr2
))
4426 return EMULATE_DONE
;
4427 if (emulation_type
& EMULTYPE_SKIP
)
4428 return EMULATE_FAIL
;
4429 return handle_emulation_failure(vcpu
);
4433 if (emulation_type
& EMULTYPE_SKIP
) {
4434 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.decode
.eip
);
4435 return EMULATE_DONE
;
4438 /* this is needed for vmware backdor interface to work since it
4439 changes registers values during IO operation */
4440 memcpy(c
->regs
, vcpu
->arch
.regs
, sizeof c
->regs
);
4443 r
= x86_emulate_insn(&vcpu
->arch
.emulate_ctxt
);
4445 if (r
== EMULATION_FAILED
) {
4446 if (reexecute_instruction(vcpu
, cr2
))
4447 return EMULATE_DONE
;
4449 return handle_emulation_failure(vcpu
);
4453 if (vcpu
->arch
.emulate_ctxt
.have_exception
) {
4454 inject_emulated_exception(vcpu
);
4456 } else if (vcpu
->arch
.pio
.count
) {
4457 if (!vcpu
->arch
.pio
.in
)
4458 vcpu
->arch
.pio
.count
= 0;
4459 r
= EMULATE_DO_MMIO
;
4460 } else if (vcpu
->mmio_needed
) {
4461 if (vcpu
->mmio_is_write
)
4462 vcpu
->mmio_needed
= 0;
4463 r
= EMULATE_DO_MMIO
;
4464 } else if (r
== EMULATION_RESTART
)
4469 toggle_interruptibility(vcpu
, vcpu
->arch
.emulate_ctxt
.interruptibility
);
4470 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
4471 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4472 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
4473 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
4477 EXPORT_SYMBOL_GPL(emulate_instruction
);
4479 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
4481 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4482 int ret
= emulator_pio_out_emulated(size
, port
, &val
, 1, vcpu
);
4483 /* do not return to emulator after return from userspace */
4484 vcpu
->arch
.pio
.count
= 0;
4487 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
4489 static void tsc_bad(void *info
)
4491 __get_cpu_var(cpu_tsc_khz
) = 0;
4494 static void tsc_khz_changed(void *data
)
4496 struct cpufreq_freqs
*freq
= data
;
4497 unsigned long khz
= 0;
4501 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4502 khz
= cpufreq_quick_get(raw_smp_processor_id());
4505 __get_cpu_var(cpu_tsc_khz
) = khz
;
4508 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
4511 struct cpufreq_freqs
*freq
= data
;
4513 struct kvm_vcpu
*vcpu
;
4514 int i
, send_ipi
= 0;
4517 * We allow guests to temporarily run on slowing clocks,
4518 * provided we notify them after, or to run on accelerating
4519 * clocks, provided we notify them before. Thus time never
4522 * However, we have a problem. We can't atomically update
4523 * the frequency of a given CPU from this function; it is
4524 * merely a notifier, which can be called from any CPU.
4525 * Changing the TSC frequency at arbitrary points in time
4526 * requires a recomputation of local variables related to
4527 * the TSC for each VCPU. We must flag these local variables
4528 * to be updated and be sure the update takes place with the
4529 * new frequency before any guests proceed.
4531 * Unfortunately, the combination of hotplug CPU and frequency
4532 * change creates an intractable locking scenario; the order
4533 * of when these callouts happen is undefined with respect to
4534 * CPU hotplug, and they can race with each other. As such,
4535 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4536 * undefined; you can actually have a CPU frequency change take
4537 * place in between the computation of X and the setting of the
4538 * variable. To protect against this problem, all updates of
4539 * the per_cpu tsc_khz variable are done in an interrupt
4540 * protected IPI, and all callers wishing to update the value
4541 * must wait for a synchronous IPI to complete (which is trivial
4542 * if the caller is on the CPU already). This establishes the
4543 * necessary total order on variable updates.
4545 * Note that because a guest time update may take place
4546 * anytime after the setting of the VCPU's request bit, the
4547 * correct TSC value must be set before the request. However,
4548 * to ensure the update actually makes it to any guest which
4549 * starts running in hardware virtualization between the set
4550 * and the acquisition of the spinlock, we must also ping the
4551 * CPU after setting the request bit.
4555 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
4557 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
4560 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4562 spin_lock(&kvm_lock
);
4563 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
4564 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
4565 if (vcpu
->cpu
!= freq
->cpu
)
4567 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4568 if (vcpu
->cpu
!= smp_processor_id())
4572 spin_unlock(&kvm_lock
);
4574 if (freq
->old
< freq
->new && send_ipi
) {
4576 * We upscale the frequency. Must make the guest
4577 * doesn't see old kvmclock values while running with
4578 * the new frequency, otherwise we risk the guest sees
4579 * time go backwards.
4581 * In case we update the frequency for another cpu
4582 * (which might be in guest context) send an interrupt
4583 * to kick the cpu out of guest context. Next time
4584 * guest context is entered kvmclock will be updated,
4585 * so the guest will not see stale values.
4587 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4592 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
4593 .notifier_call
= kvmclock_cpufreq_notifier
4596 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
4597 unsigned long action
, void *hcpu
)
4599 unsigned int cpu
= (unsigned long)hcpu
;
4603 case CPU_DOWN_FAILED
:
4604 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4606 case CPU_DOWN_PREPARE
:
4607 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
4613 static struct notifier_block kvmclock_cpu_notifier_block
= {
4614 .notifier_call
= kvmclock_cpu_notifier
,
4615 .priority
= -INT_MAX
4618 static void kvm_timer_init(void)
4622 max_tsc_khz
= tsc_khz
;
4623 register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4624 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
4625 #ifdef CONFIG_CPU_FREQ
4626 struct cpufreq_policy policy
;
4627 memset(&policy
, 0, sizeof(policy
));
4629 cpufreq_get_policy(&policy
, cpu
);
4630 if (policy
.cpuinfo
.max_freq
)
4631 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
4634 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
4635 CPUFREQ_TRANSITION_NOTIFIER
);
4637 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
4638 for_each_online_cpu(cpu
)
4639 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4642 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
4644 static int kvm_is_in_guest(void)
4646 return percpu_read(current_vcpu
) != NULL
;
4649 static int kvm_is_user_mode(void)
4653 if (percpu_read(current_vcpu
))
4654 user_mode
= kvm_x86_ops
->get_cpl(percpu_read(current_vcpu
));
4656 return user_mode
!= 0;
4659 static unsigned long kvm_get_guest_ip(void)
4661 unsigned long ip
= 0;
4663 if (percpu_read(current_vcpu
))
4664 ip
= kvm_rip_read(percpu_read(current_vcpu
));
4669 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
4670 .is_in_guest
= kvm_is_in_guest
,
4671 .is_user_mode
= kvm_is_user_mode
,
4672 .get_guest_ip
= kvm_get_guest_ip
,
4675 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
4677 percpu_write(current_vcpu
, vcpu
);
4679 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
4681 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
4683 percpu_write(current_vcpu
, NULL
);
4685 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
4687 int kvm_arch_init(void *opaque
)
4690 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
4693 printk(KERN_ERR
"kvm: already loaded the other module\n");
4698 if (!ops
->cpu_has_kvm_support()) {
4699 printk(KERN_ERR
"kvm: no hardware support\n");
4703 if (ops
->disabled_by_bios()) {
4704 printk(KERN_ERR
"kvm: disabled by bios\n");
4709 r
= kvm_mmu_module_init();
4713 kvm_init_msr_list();
4716 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4717 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
4718 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
4722 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
4725 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
4733 void kvm_arch_exit(void)
4735 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
4737 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4738 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
4739 CPUFREQ_TRANSITION_NOTIFIER
);
4740 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4742 kvm_mmu_module_exit();
4745 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
4747 ++vcpu
->stat
.halt_exits
;
4748 if (irqchip_in_kernel(vcpu
->kvm
)) {
4749 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
4752 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
4756 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
4758 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
4761 if (is_long_mode(vcpu
))
4764 return a0
| ((gpa_t
)a1
<< 32);
4767 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
4769 u64 param
, ingpa
, outgpa
, ret
;
4770 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
4771 bool fast
, longmode
;
4775 * hypercall generates UD from non zero cpl and real mode
4778 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
4779 kvm_queue_exception(vcpu
, UD_VECTOR
);
4783 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4784 longmode
= is_long_mode(vcpu
) && cs_l
== 1;
4787 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
4788 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
4789 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
4790 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
4791 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
4792 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
4794 #ifdef CONFIG_X86_64
4796 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4797 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4798 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
4802 code
= param
& 0xffff;
4803 fast
= (param
>> 16) & 0x1;
4804 rep_cnt
= (param
>> 32) & 0xfff;
4805 rep_idx
= (param
>> 48) & 0xfff;
4807 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
4810 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
4811 kvm_vcpu_on_spin(vcpu
);
4814 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
4818 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
4820 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
4822 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
4823 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
4829 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
4831 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
4834 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
4835 return kvm_hv_hypercall(vcpu
);
4837 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4838 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4839 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4840 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4841 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4843 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
4845 if (!is_long_mode(vcpu
)) {
4853 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
4859 case KVM_HC_VAPIC_POLL_IRQ
:
4863 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
4870 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
4871 ++vcpu
->stat
.hypercalls
;
4874 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
4876 int kvm_fix_hypercall(struct kvm_vcpu
*vcpu
)
4878 char instruction
[3];
4879 unsigned long rip
= kvm_rip_read(vcpu
);
4882 * Blow out the MMU to ensure that no other VCPU has an active mapping
4883 * to ensure that the updated hypercall appears atomically across all
4886 kvm_mmu_zap_all(vcpu
->kvm
);
4888 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
4890 return emulator_write_emulated(rip
, instruction
, 3, NULL
, vcpu
);
4893 void realmode_lgdt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
4895 struct desc_ptr dt
= { limit
, base
};
4897 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
4900 void realmode_lidt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
4902 struct desc_ptr dt
= { limit
, base
};
4904 kvm_x86_ops
->set_idt(vcpu
, &dt
);
4907 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
4909 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
4910 int j
, nent
= vcpu
->arch
.cpuid_nent
;
4912 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
4913 /* when no next entry is found, the current entry[i] is reselected */
4914 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
4915 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
4916 if (ej
->function
== e
->function
) {
4917 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
4921 return 0; /* silence gcc, even though control never reaches here */
4924 /* find an entry with matching function, matching index (if needed), and that
4925 * should be read next (if it's stateful) */
4926 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
4927 u32 function
, u32 index
)
4929 if (e
->function
!= function
)
4931 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
4933 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
4934 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
4939 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
4940 u32 function
, u32 index
)
4943 struct kvm_cpuid_entry2
*best
= NULL
;
4945 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
4946 struct kvm_cpuid_entry2
*e
;
4948 e
= &vcpu
->arch
.cpuid_entries
[i
];
4949 if (is_matching_cpuid_entry(e
, function
, index
)) {
4950 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
4951 move_to_next_stateful_cpuid_entry(vcpu
, i
);
4956 * Both basic or both extended?
4958 if (((e
->function
^ function
) & 0x80000000) == 0)
4959 if (!best
|| e
->function
> best
->function
)
4964 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry
);
4966 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
4968 struct kvm_cpuid_entry2
*best
;
4970 best
= kvm_find_cpuid_entry(vcpu
, 0x80000000, 0);
4971 if (!best
|| best
->eax
< 0x80000008)
4973 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
4975 return best
->eax
& 0xff;
4980 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
4982 u32 function
, index
;
4983 struct kvm_cpuid_entry2
*best
;
4985 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4986 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4987 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
4988 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
4989 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
4990 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
4991 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
4993 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
4994 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
4995 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
4996 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
4998 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
4999 trace_kvm_cpuid(function
,
5000 kvm_register_read(vcpu
, VCPU_REGS_RAX
),
5001 kvm_register_read(vcpu
, VCPU_REGS_RBX
),
5002 kvm_register_read(vcpu
, VCPU_REGS_RCX
),
5003 kvm_register_read(vcpu
, VCPU_REGS_RDX
));
5005 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
5008 * Check if userspace requested an interrupt window, and that the
5009 * interrupt window is open.
5011 * No need to exit to userspace if we already have an interrupt queued.
5013 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5015 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
5016 vcpu
->run
->request_interrupt_window
&&
5017 kvm_arch_interrupt_allowed(vcpu
));
5020 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5022 struct kvm_run
*kvm_run
= vcpu
->run
;
5024 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5025 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
5026 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
5027 if (irqchip_in_kernel(vcpu
->kvm
))
5028 kvm_run
->ready_for_interrupt_injection
= 1;
5030 kvm_run
->ready_for_interrupt_injection
=
5031 kvm_arch_interrupt_allowed(vcpu
) &&
5032 !kvm_cpu_has_interrupt(vcpu
) &&
5033 !kvm_event_needs_reinjection(vcpu
);
5036 static void vapic_enter(struct kvm_vcpu
*vcpu
)
5038 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5041 if (!apic
|| !apic
->vapic_addr
)
5044 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5046 vcpu
->arch
.apic
->vapic_page
= page
;
5049 static void vapic_exit(struct kvm_vcpu
*vcpu
)
5051 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5054 if (!apic
|| !apic
->vapic_addr
)
5057 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5058 kvm_release_page_dirty(apic
->vapic_page
);
5059 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5060 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5063 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5067 if (!kvm_x86_ops
->update_cr8_intercept
)
5070 if (!vcpu
->arch
.apic
)
5073 if (!vcpu
->arch
.apic
->vapic_addr
)
5074 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5081 tpr
= kvm_lapic_get_cr8(vcpu
);
5083 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5086 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
5088 /* try to reinject previous events if any */
5089 if (vcpu
->arch
.exception
.pending
) {
5090 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5091 vcpu
->arch
.exception
.has_error_code
,
5092 vcpu
->arch
.exception
.error_code
);
5093 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5094 vcpu
->arch
.exception
.has_error_code
,
5095 vcpu
->arch
.exception
.error_code
,
5096 vcpu
->arch
.exception
.reinject
);
5100 if (vcpu
->arch
.nmi_injected
) {
5101 kvm_x86_ops
->set_nmi(vcpu
);
5105 if (vcpu
->arch
.interrupt
.pending
) {
5106 kvm_x86_ops
->set_irq(vcpu
);
5110 /* try to inject new event if pending */
5111 if (vcpu
->arch
.nmi_pending
) {
5112 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5113 vcpu
->arch
.nmi_pending
= false;
5114 vcpu
->arch
.nmi_injected
= true;
5115 kvm_x86_ops
->set_nmi(vcpu
);
5117 } else if (kvm_cpu_has_interrupt(vcpu
)) {
5118 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5119 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5121 kvm_x86_ops
->set_irq(vcpu
);
5126 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
5128 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
5129 !vcpu
->guest_xcr0_loaded
) {
5130 /* kvm_set_xcr() also depends on this */
5131 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
5132 vcpu
->guest_xcr0_loaded
= 1;
5136 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
5138 if (vcpu
->guest_xcr0_loaded
) {
5139 if (vcpu
->arch
.xcr0
!= host_xcr0
)
5140 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
5141 vcpu
->guest_xcr0_loaded
= 0;
5145 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
5148 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
5149 vcpu
->run
->request_interrupt_window
;
5151 if (vcpu
->requests
) {
5152 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
5153 kvm_mmu_unload(vcpu
);
5154 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
5155 __kvm_migrate_timers(vcpu
);
5156 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
5157 r
= kvm_guest_time_update(vcpu
);
5161 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
5162 kvm_mmu_sync_roots(vcpu
);
5163 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
5164 kvm_x86_ops
->tlb_flush(vcpu
);
5165 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
5166 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
5170 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
5171 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
5175 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
5176 vcpu
->fpu_active
= 0;
5177 kvm_x86_ops
->fpu_deactivate(vcpu
);
5179 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
5180 /* Page is swapped out. Do synthetic halt */
5181 vcpu
->arch
.apf
.halted
= true;
5187 r
= kvm_mmu_reload(vcpu
);
5191 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
5192 inject_pending_event(vcpu
);
5194 /* enable NMI/IRQ window open exits if needed */
5195 if (vcpu
->arch
.nmi_pending
)
5196 kvm_x86_ops
->enable_nmi_window(vcpu
);
5197 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
5198 kvm_x86_ops
->enable_irq_window(vcpu
);
5200 if (kvm_lapic_enabled(vcpu
)) {
5201 update_cr8_intercept(vcpu
);
5202 kvm_lapic_sync_to_vapic(vcpu
);
5208 kvm_x86_ops
->prepare_guest_switch(vcpu
);
5209 if (vcpu
->fpu_active
)
5210 kvm_load_guest_fpu(vcpu
);
5211 kvm_load_guest_xcr0(vcpu
);
5213 atomic_set(&vcpu
->guest_mode
, 1);
5216 local_irq_disable();
5218 if (!atomic_read(&vcpu
->guest_mode
) || vcpu
->requests
5219 || need_resched() || signal_pending(current
)) {
5220 atomic_set(&vcpu
->guest_mode
, 0);
5224 kvm_x86_ops
->cancel_injection(vcpu
);
5229 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5233 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
5235 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
5236 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
5237 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
5238 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
5241 trace_kvm_entry(vcpu
->vcpu_id
);
5242 kvm_x86_ops
->run(vcpu
);
5245 * If the guest has used debug registers, at least dr7
5246 * will be disabled while returning to the host.
5247 * If we don't have active breakpoints in the host, we don't
5248 * care about the messed up debug address registers. But if
5249 * we have some of them active, restore the old state.
5251 if (hw_breakpoint_active())
5252 hw_breakpoint_restore();
5254 kvm_get_msr(vcpu
, MSR_IA32_TSC
, &vcpu
->arch
.last_guest_tsc
);
5256 atomic_set(&vcpu
->guest_mode
, 0);
5263 * We must have an instruction between local_irq_enable() and
5264 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5265 * the interrupt shadow. The stat.exits increment will do nicely.
5266 * But we need to prevent reordering, hence this barrier():
5274 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5277 * Profile KVM exit RIPs:
5279 if (unlikely(prof_on
== KVM_PROFILING
)) {
5280 unsigned long rip
= kvm_rip_read(vcpu
);
5281 profile_hit(KVM_PROFILING
, (void *)rip
);
5285 kvm_lapic_sync_from_vapic(vcpu
);
5287 r
= kvm_x86_ops
->handle_exit(vcpu
);
5293 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
5296 struct kvm
*kvm
= vcpu
->kvm
;
5298 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
5299 pr_debug("vcpu %d received sipi with vector # %x\n",
5300 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
5301 kvm_lapic_reset(vcpu
);
5302 r
= kvm_arch_vcpu_reset(vcpu
);
5305 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5308 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5313 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
5314 !vcpu
->arch
.apf
.halted
)
5315 r
= vcpu_enter_guest(vcpu
);
5317 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5318 kvm_vcpu_block(vcpu
);
5319 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5320 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
5322 switch(vcpu
->arch
.mp_state
) {
5323 case KVM_MP_STATE_HALTED
:
5324 vcpu
->arch
.mp_state
=
5325 KVM_MP_STATE_RUNNABLE
;
5326 case KVM_MP_STATE_RUNNABLE
:
5327 vcpu
->arch
.apf
.halted
= false;
5329 case KVM_MP_STATE_SIPI_RECEIVED
:
5340 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
5341 if (kvm_cpu_has_pending_timer(vcpu
))
5342 kvm_inject_pending_timer_irqs(vcpu
);
5344 if (dm_request_for_irq_injection(vcpu
)) {
5346 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5347 ++vcpu
->stat
.request_irq_exits
;
5350 kvm_check_async_pf_completion(vcpu
);
5352 if (signal_pending(current
)) {
5354 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5355 ++vcpu
->stat
.signal_exits
;
5357 if (need_resched()) {
5358 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5360 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5364 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5371 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
5376 if (vcpu
->sigset_active
)
5377 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
5379 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
5380 kvm_vcpu_block(vcpu
);
5381 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
5386 /* re-sync apic's tpr */
5387 if (!irqchip_in_kernel(vcpu
->kvm
))
5388 kvm_set_cr8(vcpu
, kvm_run
->cr8
);
5390 if (vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
) {
5391 if (vcpu
->mmio_needed
) {
5392 memcpy(vcpu
->mmio_data
, kvm_run
->mmio
.data
, 8);
5393 vcpu
->mmio_read_completed
= 1;
5394 vcpu
->mmio_needed
= 0;
5396 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5397 r
= emulate_instruction(vcpu
, 0, 0, EMULTYPE_NO_DECODE
);
5398 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5399 if (r
!= EMULATE_DONE
) {
5404 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
5405 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
5406 kvm_run
->hypercall
.ret
);
5408 r
= __vcpu_run(vcpu
);
5411 post_kvm_run_save(vcpu
);
5412 if (vcpu
->sigset_active
)
5413 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
5418 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5420 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5421 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5422 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5423 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5424 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5425 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
5426 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
5427 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
5428 #ifdef CONFIG_X86_64
5429 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5430 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
5431 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
5432 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
5433 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
5434 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
5435 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
5436 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
5439 regs
->rip
= kvm_rip_read(vcpu
);
5440 regs
->rflags
= kvm_get_rflags(vcpu
);
5445 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5447 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
5448 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
5449 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
5450 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
5451 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
5452 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
5453 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
5454 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
5455 #ifdef CONFIG_X86_64
5456 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
5457 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
5458 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
5459 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
5460 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
5461 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
5462 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
5463 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
5466 kvm_rip_write(vcpu
, regs
->rip
);
5467 kvm_set_rflags(vcpu
, regs
->rflags
);
5469 vcpu
->arch
.exception
.pending
= false;
5471 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5476 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
5478 struct kvm_segment cs
;
5480 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
5484 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
5486 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
5487 struct kvm_sregs
*sregs
)
5491 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5492 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5493 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5494 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5495 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5496 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5498 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5499 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5501 kvm_x86_ops
->get_idt(vcpu
, &dt
);
5502 sregs
->idt
.limit
= dt
.size
;
5503 sregs
->idt
.base
= dt
.address
;
5504 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
5505 sregs
->gdt
.limit
= dt
.size
;
5506 sregs
->gdt
.base
= dt
.address
;
5508 sregs
->cr0
= kvm_read_cr0(vcpu
);
5509 sregs
->cr2
= vcpu
->arch
.cr2
;
5510 sregs
->cr3
= vcpu
->arch
.cr3
;
5511 sregs
->cr4
= kvm_read_cr4(vcpu
);
5512 sregs
->cr8
= kvm_get_cr8(vcpu
);
5513 sregs
->efer
= vcpu
->arch
.efer
;
5514 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
5516 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
5518 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
5519 set_bit(vcpu
->arch
.interrupt
.nr
,
5520 (unsigned long *)sregs
->interrupt_bitmap
);
5525 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
5526 struct kvm_mp_state
*mp_state
)
5528 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
5532 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
5533 struct kvm_mp_state
*mp_state
)
5535 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
5536 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5540 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
,
5541 bool has_error_code
, u32 error_code
)
5543 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
5546 init_emulate_ctxt(vcpu
);
5548 ret
= emulator_task_switch(&vcpu
->arch
.emulate_ctxt
,
5549 tss_selector
, reason
, has_error_code
,
5553 return EMULATE_FAIL
;
5555 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
5556 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
5557 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
5558 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5559 return EMULATE_DONE
;
5561 EXPORT_SYMBOL_GPL(kvm_task_switch
);
5563 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
5564 struct kvm_sregs
*sregs
)
5566 int mmu_reset_needed
= 0;
5567 int pending_vec
, max_bits
;
5570 dt
.size
= sregs
->idt
.limit
;
5571 dt
.address
= sregs
->idt
.base
;
5572 kvm_x86_ops
->set_idt(vcpu
, &dt
);
5573 dt
.size
= sregs
->gdt
.limit
;
5574 dt
.address
= sregs
->gdt
.base
;
5575 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
5577 vcpu
->arch
.cr2
= sregs
->cr2
;
5578 mmu_reset_needed
|= vcpu
->arch
.cr3
!= sregs
->cr3
;
5579 vcpu
->arch
.cr3
= sregs
->cr3
;
5581 kvm_set_cr8(vcpu
, sregs
->cr8
);
5583 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
5584 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
5585 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
5587 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
5588 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
5589 vcpu
->arch
.cr0
= sregs
->cr0
;
5591 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
5592 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
5593 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
5595 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
5596 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, vcpu
->arch
.cr3
);
5597 mmu_reset_needed
= 1;
5600 if (mmu_reset_needed
)
5601 kvm_mmu_reset_context(vcpu
);
5603 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
5604 pending_vec
= find_first_bit(
5605 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
5606 if (pending_vec
< max_bits
) {
5607 kvm_queue_interrupt(vcpu
, pending_vec
, false);
5608 pr_debug("Set back pending irq %d\n", pending_vec
);
5609 if (irqchip_in_kernel(vcpu
->kvm
))
5610 kvm_pic_clear_isr_ack(vcpu
->kvm
);
5613 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5614 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5615 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5616 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5617 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5618 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5620 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5621 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5623 update_cr8_intercept(vcpu
);
5625 /* Older userspace won't unhalt the vcpu on reset. */
5626 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
5627 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
5629 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5631 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5636 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
5637 struct kvm_guest_debug
*dbg
)
5639 unsigned long rflags
;
5642 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
5644 if (vcpu
->arch
.exception
.pending
)
5646 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
5647 kvm_queue_exception(vcpu
, DB_VECTOR
);
5649 kvm_queue_exception(vcpu
, BP_VECTOR
);
5653 * Read rflags as long as potentially injected trace flags are still
5656 rflags
= kvm_get_rflags(vcpu
);
5658 vcpu
->guest_debug
= dbg
->control
;
5659 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
5660 vcpu
->guest_debug
= 0;
5662 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
5663 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
5664 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
5665 vcpu
->arch
.switch_db_regs
=
5666 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
5668 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
5669 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
5670 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
5673 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
5674 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
5675 get_segment_base(vcpu
, VCPU_SREG_CS
);
5678 * Trigger an rflags update that will inject or remove the trace
5681 kvm_set_rflags(vcpu
, rflags
);
5683 kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
5693 * Translate a guest virtual address to a guest physical address.
5695 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
5696 struct kvm_translation
*tr
)
5698 unsigned long vaddr
= tr
->linear_address
;
5702 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5703 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
5704 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5705 tr
->physical_address
= gpa
;
5706 tr
->valid
= gpa
!= UNMAPPED_GVA
;
5713 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5715 struct i387_fxsave_struct
*fxsave
=
5716 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5718 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
5719 fpu
->fcw
= fxsave
->cwd
;
5720 fpu
->fsw
= fxsave
->swd
;
5721 fpu
->ftwx
= fxsave
->twd
;
5722 fpu
->last_opcode
= fxsave
->fop
;
5723 fpu
->last_ip
= fxsave
->rip
;
5724 fpu
->last_dp
= fxsave
->rdp
;
5725 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
5730 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5732 struct i387_fxsave_struct
*fxsave
=
5733 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5735 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
5736 fxsave
->cwd
= fpu
->fcw
;
5737 fxsave
->swd
= fpu
->fsw
;
5738 fxsave
->twd
= fpu
->ftwx
;
5739 fxsave
->fop
= fpu
->last_opcode
;
5740 fxsave
->rip
= fpu
->last_ip
;
5741 fxsave
->rdp
= fpu
->last_dp
;
5742 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
5747 int fx_init(struct kvm_vcpu
*vcpu
)
5751 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
5755 fpu_finit(&vcpu
->arch
.guest_fpu
);
5758 * Ensure guest xcr0 is valid for loading
5760 vcpu
->arch
.xcr0
= XSTATE_FP
;
5762 vcpu
->arch
.cr0
|= X86_CR0_ET
;
5766 EXPORT_SYMBOL_GPL(fx_init
);
5768 static void fx_free(struct kvm_vcpu
*vcpu
)
5770 fpu_free(&vcpu
->arch
.guest_fpu
);
5773 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
5775 if (vcpu
->guest_fpu_loaded
)
5779 * Restore all possible states in the guest,
5780 * and assume host would use all available bits.
5781 * Guest xcr0 would be loaded later.
5783 kvm_put_guest_xcr0(vcpu
);
5784 vcpu
->guest_fpu_loaded
= 1;
5785 unlazy_fpu(current
);
5786 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
5790 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
5792 kvm_put_guest_xcr0(vcpu
);
5794 if (!vcpu
->guest_fpu_loaded
)
5797 vcpu
->guest_fpu_loaded
= 0;
5798 fpu_save_init(&vcpu
->arch
.guest_fpu
);
5799 ++vcpu
->stat
.fpu_reload
;
5800 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
5804 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
5806 if (vcpu
->arch
.time_page
) {
5807 kvm_release_page_dirty(vcpu
->arch
.time_page
);
5808 vcpu
->arch
.time_page
= NULL
;
5811 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
5813 kvm_x86_ops
->vcpu_free(vcpu
);
5816 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
5819 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
5820 printk_once(KERN_WARNING
5821 "kvm: SMP vm created on host with unstable TSC; "
5822 "guest TSC will not be reliable\n");
5823 return kvm_x86_ops
->vcpu_create(kvm
, id
);
5826 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
5830 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
5832 r
= kvm_arch_vcpu_reset(vcpu
);
5834 r
= kvm_mmu_setup(vcpu
);
5841 kvm_x86_ops
->vcpu_free(vcpu
);
5845 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
5847 vcpu
->arch
.apf
.msr_val
= 0;
5850 kvm_mmu_unload(vcpu
);
5854 kvm_x86_ops
->vcpu_free(vcpu
);
5857 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
5859 vcpu
->arch
.nmi_pending
= false;
5860 vcpu
->arch
.nmi_injected
= false;
5862 vcpu
->arch
.switch_db_regs
= 0;
5863 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
5864 vcpu
->arch
.dr6
= DR6_FIXED_1
;
5865 vcpu
->arch
.dr7
= DR7_FIXED_1
;
5867 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5868 vcpu
->arch
.apf
.msr_val
= 0;
5870 kvm_clear_async_pf_completion_queue(vcpu
);
5871 kvm_async_pf_hash_reset(vcpu
);
5872 vcpu
->arch
.apf
.halted
= false;
5874 return kvm_x86_ops
->vcpu_reset(vcpu
);
5877 int kvm_arch_hardware_enable(void *garbage
)
5880 struct kvm_vcpu
*vcpu
;
5883 kvm_shared_msr_cpu_online();
5884 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5885 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5886 if (vcpu
->cpu
== smp_processor_id())
5887 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5888 return kvm_x86_ops
->hardware_enable(garbage
);
5891 void kvm_arch_hardware_disable(void *garbage
)
5893 kvm_x86_ops
->hardware_disable(garbage
);
5894 drop_user_return_notifiers(garbage
);
5897 int kvm_arch_hardware_setup(void)
5899 return kvm_x86_ops
->hardware_setup();
5902 void kvm_arch_hardware_unsetup(void)
5904 kvm_x86_ops
->hardware_unsetup();
5907 void kvm_arch_check_processor_compat(void *rtn
)
5909 kvm_x86_ops
->check_processor_compatibility(rtn
);
5912 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
5918 BUG_ON(vcpu
->kvm
== NULL
);
5921 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
5922 vcpu
->arch
.walk_mmu
= &vcpu
->arch
.mmu
;
5923 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
5924 vcpu
->arch
.mmu
.translate_gpa
= translate_gpa
;
5925 vcpu
->arch
.nested_mmu
.translate_gpa
= translate_nested_gpa
;
5926 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
5927 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5929 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
5931 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
5936 vcpu
->arch
.pio_data
= page_address(page
);
5938 if (!kvm
->arch
.virtual_tsc_khz
)
5939 kvm_arch_set_tsc_khz(kvm
, max_tsc_khz
);
5941 r
= kvm_mmu_create(vcpu
);
5943 goto fail_free_pio_data
;
5945 if (irqchip_in_kernel(kvm
)) {
5946 r
= kvm_create_lapic(vcpu
);
5948 goto fail_mmu_destroy
;
5951 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
5953 if (!vcpu
->arch
.mce_banks
) {
5955 goto fail_free_lapic
;
5957 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
5959 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
))
5960 goto fail_free_mce_banks
;
5962 kvm_async_pf_hash_reset(vcpu
);
5965 fail_free_mce_banks
:
5966 kfree(vcpu
->arch
.mce_banks
);
5968 kvm_free_lapic(vcpu
);
5970 kvm_mmu_destroy(vcpu
);
5972 free_page((unsigned long)vcpu
->arch
.pio_data
);
5977 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
5981 kfree(vcpu
->arch
.mce_banks
);
5982 kvm_free_lapic(vcpu
);
5983 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5984 kvm_mmu_destroy(vcpu
);
5985 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5986 free_page((unsigned long)vcpu
->arch
.pio_data
);
5989 int kvm_arch_init_vm(struct kvm
*kvm
)
5991 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
5992 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
5994 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5995 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
5997 spin_lock_init(&kvm
->arch
.tsc_write_lock
);
6002 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
6005 kvm_mmu_unload(vcpu
);
6009 static void kvm_free_vcpus(struct kvm
*kvm
)
6012 struct kvm_vcpu
*vcpu
;
6015 * Unpin any mmu pages first.
6017 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6018 kvm_clear_async_pf_completion_queue(vcpu
);
6019 kvm_unload_vcpu_mmu(vcpu
);
6021 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6022 kvm_arch_vcpu_free(vcpu
);
6024 mutex_lock(&kvm
->lock
);
6025 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
6026 kvm
->vcpus
[i
] = NULL
;
6028 atomic_set(&kvm
->online_vcpus
, 0);
6029 mutex_unlock(&kvm
->lock
);
6032 void kvm_arch_sync_events(struct kvm
*kvm
)
6034 kvm_free_all_assigned_devices(kvm
);
6038 void kvm_arch_destroy_vm(struct kvm
*kvm
)
6040 kvm_iommu_unmap_guest(kvm
);
6041 kfree(kvm
->arch
.vpic
);
6042 kfree(kvm
->arch
.vioapic
);
6043 kvm_free_vcpus(kvm
);
6044 if (kvm
->arch
.apic_access_page
)
6045 put_page(kvm
->arch
.apic_access_page
);
6046 if (kvm
->arch
.ept_identity_pagetable
)
6047 put_page(kvm
->arch
.ept_identity_pagetable
);
6050 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
6051 struct kvm_memory_slot
*memslot
,
6052 struct kvm_memory_slot old
,
6053 struct kvm_userspace_memory_region
*mem
,
6056 int npages
= memslot
->npages
;
6057 int map_flags
= MAP_PRIVATE
| MAP_ANONYMOUS
;
6059 /* Prevent internal slot pages from being moved by fork()/COW. */
6060 if (memslot
->id
>= KVM_MEMORY_SLOTS
)
6061 map_flags
= MAP_SHARED
| MAP_ANONYMOUS
;
6063 /*To keep backward compatibility with older userspace,
6064 *x86 needs to hanlde !user_alloc case.
6067 if (npages
&& !old
.rmap
) {
6068 unsigned long userspace_addr
;
6070 down_write(¤t
->mm
->mmap_sem
);
6071 userspace_addr
= do_mmap(NULL
, 0,
6073 PROT_READ
| PROT_WRITE
,
6076 up_write(¤t
->mm
->mmap_sem
);
6078 if (IS_ERR((void *)userspace_addr
))
6079 return PTR_ERR((void *)userspace_addr
);
6081 memslot
->userspace_addr
= userspace_addr
;
6089 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
6090 struct kvm_userspace_memory_region
*mem
,
6091 struct kvm_memory_slot old
,
6095 int npages
= mem
->memory_size
>> PAGE_SHIFT
;
6097 if (!user_alloc
&& !old
.user_alloc
&& old
.rmap
&& !npages
) {
6100 down_write(¤t
->mm
->mmap_sem
);
6101 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
6102 old
.npages
* PAGE_SIZE
);
6103 up_write(¤t
->mm
->mmap_sem
);
6106 "kvm_vm_ioctl_set_memory_region: "
6107 "failed to munmap memory\n");
6110 spin_lock(&kvm
->mmu_lock
);
6111 if (!kvm
->arch
.n_requested_mmu_pages
) {
6112 unsigned int nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
6113 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
6116 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
6117 spin_unlock(&kvm
->mmu_lock
);
6120 void kvm_arch_flush_shadow(struct kvm
*kvm
)
6122 kvm_mmu_zap_all(kvm
);
6123 kvm_reload_remote_mmus(kvm
);
6126 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
6128 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6129 !vcpu
->arch
.apf
.halted
)
6130 || !list_empty_careful(&vcpu
->async_pf
.done
)
6131 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
6132 || vcpu
->arch
.nmi_pending
||
6133 (kvm_arch_interrupt_allowed(vcpu
) &&
6134 kvm_cpu_has_interrupt(vcpu
));
6137 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
6140 int cpu
= vcpu
->cpu
;
6142 if (waitqueue_active(&vcpu
->wq
)) {
6143 wake_up_interruptible(&vcpu
->wq
);
6144 ++vcpu
->stat
.halt_wakeup
;
6148 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
6149 if (atomic_xchg(&vcpu
->guest_mode
, 0))
6150 smp_send_reschedule(cpu
);
6154 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
6156 return kvm_x86_ops
->interrupt_allowed(vcpu
);
6159 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
6161 unsigned long current_rip
= kvm_rip_read(vcpu
) +
6162 get_segment_base(vcpu
, VCPU_SREG_CS
);
6164 return current_rip
== linear_rip
;
6166 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
6168 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
6170 unsigned long rflags
;
6172 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
6173 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6174 rflags
&= ~X86_EFLAGS_TF
;
6177 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
6179 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
6181 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
6182 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
6183 rflags
|= X86_EFLAGS_TF
;
6184 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
6185 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6187 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
6189 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
6193 if (!vcpu
->arch
.mmu
.direct_map
|| !work
->arch
.direct_map
||
6194 is_error_page(work
->page
))
6197 r
= kvm_mmu_reload(vcpu
);
6201 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
6204 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
6206 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
6209 static inline u32
kvm_async_pf_next_probe(u32 key
)
6211 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
6214 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6216 u32 key
= kvm_async_pf_hash_fn(gfn
);
6218 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
6219 key
= kvm_async_pf_next_probe(key
);
6221 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
6224 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6227 u32 key
= kvm_async_pf_hash_fn(gfn
);
6229 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
6230 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
6231 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
6232 key
= kvm_async_pf_next_probe(key
);
6237 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6239 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
6242 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6246 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
6248 vcpu
->arch
.apf
.gfns
[i
] = ~0;
6250 j
= kvm_async_pf_next_probe(j
);
6251 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
6253 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
6255 * k lies cyclically in ]i,j]
6257 * |....j i.k.| or |.k..j i...|
6259 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
6260 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
6265 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
6268 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
6272 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
6273 struct kvm_async_pf
*work
)
6275 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
6276 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6278 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
6279 (vcpu
->arch
.apf
.send_user_only
&&
6280 kvm_x86_ops
->get_cpl(vcpu
) == 0))
6281 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
6282 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
6283 vcpu
->arch
.fault
.error_code
= 0;
6284 vcpu
->arch
.fault
.address
= work
->arch
.token
;
6285 kvm_inject_page_fault(vcpu
);
6289 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
6290 struct kvm_async_pf
*work
)
6292 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
6293 if (is_error_page(work
->page
))
6294 work
->arch
.token
= ~0; /* broadcast wakeup */
6296 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6298 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
6299 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
6300 vcpu
->arch
.fault
.error_code
= 0;
6301 vcpu
->arch
.fault
.address
= work
->arch
.token
;
6302 kvm_inject_page_fault(vcpu
);
6304 vcpu
->arch
.apf
.halted
= false;
6307 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
6309 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
6312 return !kvm_event_needs_reinjection(vcpu
) &&
6313 kvm_x86_ops
->interrupt_allowed(vcpu
);
6316 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
6317 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
6318 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
6319 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
6320 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
6321 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
6322 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
6323 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
6324 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
6325 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
6326 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
6327 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);