2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
31 #include <linux/clocksource.h>
32 #include <linux/interrupt.h>
33 #include <linux/kvm.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/mman.h>
38 #include <linux/highmem.h>
39 #include <linux/iommu.h>
40 #include <linux/intel-iommu.h>
41 #include <linux/cpufreq.h>
42 #include <linux/user-return-notifier.h>
43 #include <linux/srcu.h>
44 #include <linux/slab.h>
45 #include <linux/perf_event.h>
46 #include <linux/uaccess.h>
47 #include <linux/hash.h>
48 #include <linux/pci.h>
49 #include <linux/timekeeper_internal.h>
50 #include <linux/pvclock_gtod.h>
51 #include <trace/events/kvm.h>
53 #define CREATE_TRACE_POINTS
56 #include <asm/debugreg.h>
62 #include <asm/fpu-internal.h> /* Ugh! */
64 #include <asm/pvclock.h>
65 #include <asm/div64.h>
67 #define MAX_IO_MSRS 256
68 #define KVM_MAX_MCE_BANKS 32
69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
71 #define emul_to_vcpu(ctxt) \
72 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
75 * - enable syscall per default because its emulated by KVM
76 * - enable LME and LMA per default on 64 bit KVM
80 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
82 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
88 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
89 static void process_nmi(struct kvm_vcpu
*vcpu
);
90 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
92 struct kvm_x86_ops
*kvm_x86_ops
;
93 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
95 static bool ignore_msrs
= 0;
96 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
98 unsigned int min_timer_period_us
= 500;
99 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
101 bool kvm_has_tsc_control
;
102 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
103 u32 kvm_max_guest_tsc_khz
;
104 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
106 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
107 static u32 tsc_tolerance_ppm
= 250;
108 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
110 static bool backwards_tsc_observed
= false;
112 #define KVM_NR_SHARED_MSRS 16
114 struct kvm_shared_msrs_global
{
116 u32 msrs
[KVM_NR_SHARED_MSRS
];
119 struct kvm_shared_msrs
{
120 struct user_return_notifier urn
;
122 struct kvm_shared_msr_values
{
125 } values
[KVM_NR_SHARED_MSRS
];
128 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
129 static struct kvm_shared_msrs __percpu
*shared_msrs
;
131 struct kvm_stats_debugfs_item debugfs_entries
[] = {
132 { "pf_fixed", VCPU_STAT(pf_fixed
) },
133 { "pf_guest", VCPU_STAT(pf_guest
) },
134 { "tlb_flush", VCPU_STAT(tlb_flush
) },
135 { "invlpg", VCPU_STAT(invlpg
) },
136 { "exits", VCPU_STAT(exits
) },
137 { "io_exits", VCPU_STAT(io_exits
) },
138 { "mmio_exits", VCPU_STAT(mmio_exits
) },
139 { "signal_exits", VCPU_STAT(signal_exits
) },
140 { "irq_window", VCPU_STAT(irq_window_exits
) },
141 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
142 { "halt_exits", VCPU_STAT(halt_exits
) },
143 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
144 { "hypercalls", VCPU_STAT(hypercalls
) },
145 { "request_irq", VCPU_STAT(request_irq_exits
) },
146 { "irq_exits", VCPU_STAT(irq_exits
) },
147 { "host_state_reload", VCPU_STAT(host_state_reload
) },
148 { "efer_reload", VCPU_STAT(efer_reload
) },
149 { "fpu_reload", VCPU_STAT(fpu_reload
) },
150 { "insn_emulation", VCPU_STAT(insn_emulation
) },
151 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
152 { "irq_injections", VCPU_STAT(irq_injections
) },
153 { "nmi_injections", VCPU_STAT(nmi_injections
) },
154 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
155 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
156 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
157 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
158 { "mmu_flooded", VM_STAT(mmu_flooded
) },
159 { "mmu_recycled", VM_STAT(mmu_recycled
) },
160 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
161 { "mmu_unsync", VM_STAT(mmu_unsync
) },
162 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
163 { "largepages", VM_STAT(lpages
) },
167 u64 __read_mostly host_xcr0
;
169 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
171 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
174 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
175 vcpu
->arch
.apf
.gfns
[i
] = ~0;
178 static void kvm_on_user_return(struct user_return_notifier
*urn
)
181 struct kvm_shared_msrs
*locals
182 = container_of(urn
, struct kvm_shared_msrs
, urn
);
183 struct kvm_shared_msr_values
*values
;
185 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
186 values
= &locals
->values
[slot
];
187 if (values
->host
!= values
->curr
) {
188 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
189 values
->curr
= values
->host
;
192 locals
->registered
= false;
193 user_return_notifier_unregister(urn
);
196 static void shared_msr_update(unsigned slot
, u32 msr
)
199 unsigned int cpu
= smp_processor_id();
200 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
202 /* only read, and nobody should modify it at this time,
203 * so don't need lock */
204 if (slot
>= shared_msrs_global
.nr
) {
205 printk(KERN_ERR
"kvm: invalid MSR slot!");
208 rdmsrl_safe(msr
, &value
);
209 smsr
->values
[slot
].host
= value
;
210 smsr
->values
[slot
].curr
= value
;
213 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
215 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
216 if (slot
>= shared_msrs_global
.nr
)
217 shared_msrs_global
.nr
= slot
+ 1;
218 shared_msrs_global
.msrs
[slot
] = msr
;
219 /* we need ensured the shared_msr_global have been updated */
222 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
224 static void kvm_shared_msr_cpu_online(void)
228 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
229 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
232 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
234 unsigned int cpu
= smp_processor_id();
235 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
237 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
239 smsr
->values
[slot
].curr
= value
;
240 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
241 if (!smsr
->registered
) {
242 smsr
->urn
.on_user_return
= kvm_on_user_return
;
243 user_return_notifier_register(&smsr
->urn
);
244 smsr
->registered
= true;
247 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
249 static void drop_user_return_notifiers(void *ignore
)
251 unsigned int cpu
= smp_processor_id();
252 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
254 if (smsr
->registered
)
255 kvm_on_user_return(&smsr
->urn
);
258 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
260 return vcpu
->arch
.apic_base
;
262 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
264 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
266 u64 old_state
= vcpu
->arch
.apic_base
&
267 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
268 u64 new_state
= msr_info
->data
&
269 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
270 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
271 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
273 if (!msr_info
->host_initiated
&&
274 ((msr_info
->data
& reserved_bits
) != 0 ||
275 new_state
== X2APIC_ENABLE
||
276 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
277 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
278 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
282 kvm_lapic_set_base(vcpu
, msr_info
->data
);
285 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
287 asmlinkage __visible
void kvm_spurious_fault(void)
289 /* Fault while not rebooting. We want the trace. */
292 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
294 #define EXCPT_BENIGN 0
295 #define EXCPT_CONTRIBUTORY 1
298 static int exception_class(int vector
)
308 return EXCPT_CONTRIBUTORY
;
315 #define EXCPT_FAULT 0
317 #define EXCPT_ABORT 2
318 #define EXCPT_INTERRUPT 3
320 static int exception_type(int vector
)
324 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
325 return EXCPT_INTERRUPT
;
329 /* #DB is trap, as instruction watchpoints are handled elsewhere */
330 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
333 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
336 /* Reserved exceptions will result in fault */
340 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
341 unsigned nr
, bool has_error
, u32 error_code
,
347 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
349 if (!vcpu
->arch
.exception
.pending
) {
351 vcpu
->arch
.exception
.pending
= true;
352 vcpu
->arch
.exception
.has_error_code
= has_error
;
353 vcpu
->arch
.exception
.nr
= nr
;
354 vcpu
->arch
.exception
.error_code
= error_code
;
355 vcpu
->arch
.exception
.reinject
= reinject
;
359 /* to check exception */
360 prev_nr
= vcpu
->arch
.exception
.nr
;
361 if (prev_nr
== DF_VECTOR
) {
362 /* triple fault -> shutdown */
363 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
366 class1
= exception_class(prev_nr
);
367 class2
= exception_class(nr
);
368 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
369 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
370 /* generate double fault per SDM Table 5-5 */
371 vcpu
->arch
.exception
.pending
= true;
372 vcpu
->arch
.exception
.has_error_code
= true;
373 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
374 vcpu
->arch
.exception
.error_code
= 0;
376 /* replace previous exception with a new one in a hope
377 that instruction re-execution will regenerate lost
382 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
384 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
386 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
388 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
390 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
392 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
394 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
397 kvm_inject_gp(vcpu
, 0);
399 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
401 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
403 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
405 ++vcpu
->stat
.pf_guest
;
406 vcpu
->arch
.cr2
= fault
->address
;
407 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
409 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
411 void kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
413 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
414 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
416 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
419 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
421 atomic_inc(&vcpu
->arch
.nmi_queued
);
422 kvm_make_request(KVM_REQ_NMI
, vcpu
);
424 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
426 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
428 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
430 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
432 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
434 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
436 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
439 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
440 * a #GP and return false.
442 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
444 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
446 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
449 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
452 * This function will be used to read from the physical memory of the currently
453 * running guest. The difference to kvm_read_guest_page is that this function
454 * can read from guest physical or from the guest's guest physical memory.
456 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
457 gfn_t ngfn
, void *data
, int offset
, int len
,
463 ngpa
= gfn_to_gpa(ngfn
);
464 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
);
465 if (real_gfn
== UNMAPPED_GVA
)
468 real_gfn
= gpa_to_gfn(real_gfn
);
470 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
472 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
474 int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
475 void *data
, int offset
, int len
, u32 access
)
477 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
478 data
, offset
, len
, access
);
482 * Load the pae pdptrs. Return true is they are all valid.
484 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
486 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
487 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
490 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
492 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
493 offset
* sizeof(u64
), sizeof(pdpte
),
494 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
499 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
500 if (is_present_gpte(pdpte
[i
]) &&
501 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
508 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
509 __set_bit(VCPU_EXREG_PDPTR
,
510 (unsigned long *)&vcpu
->arch
.regs_avail
);
511 __set_bit(VCPU_EXREG_PDPTR
,
512 (unsigned long *)&vcpu
->arch
.regs_dirty
);
517 EXPORT_SYMBOL_GPL(load_pdptrs
);
519 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
521 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
527 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
530 if (!test_bit(VCPU_EXREG_PDPTR
,
531 (unsigned long *)&vcpu
->arch
.regs_avail
))
534 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
535 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
536 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
537 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
540 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
546 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
548 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
549 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
550 X86_CR0_CD
| X86_CR0_NW
;
555 if (cr0
& 0xffffffff00000000UL
)
559 cr0
&= ~CR0_RESERVED_BITS
;
561 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
564 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
567 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
569 if ((vcpu
->arch
.efer
& EFER_LME
)) {
574 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
579 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
584 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
587 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
589 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
590 kvm_clear_async_pf_completion_queue(vcpu
);
591 kvm_async_pf_hash_reset(vcpu
);
594 if ((cr0
^ old_cr0
) & update_bits
)
595 kvm_mmu_reset_context(vcpu
);
598 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
600 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
602 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
604 EXPORT_SYMBOL_GPL(kvm_lmsw
);
606 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
608 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
609 !vcpu
->guest_xcr0_loaded
) {
610 /* kvm_set_xcr() also depends on this */
611 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
612 vcpu
->guest_xcr0_loaded
= 1;
616 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
618 if (vcpu
->guest_xcr0_loaded
) {
619 if (vcpu
->arch
.xcr0
!= host_xcr0
)
620 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
621 vcpu
->guest_xcr0_loaded
= 0;
625 int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
628 u64 old_xcr0
= vcpu
->arch
.xcr0
;
631 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
632 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
634 if (!(xcr0
& XSTATE_FP
))
636 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
640 * Do not allow the guest to set bits that we do not support
641 * saving. However, xcr0 bit 0 is always set, even if the
642 * emulated CPU does not support XSAVE (see fx_init).
644 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XSTATE_FP
;
645 if (xcr0
& ~valid_bits
)
648 if ((!(xcr0
& XSTATE_BNDREGS
)) != (!(xcr0
& XSTATE_BNDCSR
)))
651 kvm_put_guest_xcr0(vcpu
);
652 vcpu
->arch
.xcr0
= xcr0
;
654 if ((xcr0
^ old_xcr0
) & XSTATE_EXTEND_MASK
)
655 kvm_update_cpuid(vcpu
);
659 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
661 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
662 __kvm_set_xcr(vcpu
, index
, xcr
)) {
663 kvm_inject_gp(vcpu
, 0);
668 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
670 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
672 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
673 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
|
674 X86_CR4_PAE
| X86_CR4_SMEP
;
675 if (cr4
& CR4_RESERVED_BITS
)
678 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
681 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
684 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
687 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
690 if (is_long_mode(vcpu
)) {
691 if (!(cr4
& X86_CR4_PAE
))
693 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
694 && ((cr4
^ old_cr4
) & pdptr_bits
)
695 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
699 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
700 if (!guest_cpuid_has_pcid(vcpu
))
703 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
704 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
708 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
711 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
712 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
713 kvm_mmu_reset_context(vcpu
);
715 if ((cr4
^ old_cr4
) & X86_CR4_SMAP
)
716 update_permission_bitmask(vcpu
, vcpu
->arch
.walk_mmu
, false);
718 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
719 kvm_update_cpuid(vcpu
);
723 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
725 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
727 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
728 kvm_mmu_sync_roots(vcpu
);
729 kvm_mmu_flush_tlb(vcpu
);
733 if (is_long_mode(vcpu
)) {
734 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
736 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
737 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
740 vcpu
->arch
.cr3
= cr3
;
741 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
742 kvm_mmu_new_cr3(vcpu
);
745 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
747 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
749 if (cr8
& CR8_RESERVED_BITS
)
751 if (irqchip_in_kernel(vcpu
->kvm
))
752 kvm_lapic_set_tpr(vcpu
, cr8
);
754 vcpu
->arch
.cr8
= cr8
;
757 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
759 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
761 if (irqchip_in_kernel(vcpu
->kvm
))
762 return kvm_lapic_get_cr8(vcpu
);
764 return vcpu
->arch
.cr8
;
766 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
768 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
770 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
771 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
774 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
778 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
779 dr7
= vcpu
->arch
.guest_debug_dr7
;
781 dr7
= vcpu
->arch
.dr7
;
782 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
783 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
784 if (dr7
& DR7_BP_EN_MASK
)
785 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
788 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
790 u64 fixed
= DR6_FIXED_1
;
792 if (!guest_cpuid_has_rtm(vcpu
))
797 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
801 vcpu
->arch
.db
[dr
] = val
;
802 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
803 vcpu
->arch
.eff_db
[dr
] = val
;
806 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
810 if (val
& 0xffffffff00000000ULL
)
812 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
813 kvm_update_dr6(vcpu
);
816 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
820 if (val
& 0xffffffff00000000ULL
)
822 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
823 kvm_update_dr7(vcpu
);
830 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
834 res
= __kvm_set_dr(vcpu
, dr
, val
);
836 kvm_queue_exception(vcpu
, UD_VECTOR
);
838 kvm_inject_gp(vcpu
, 0);
842 EXPORT_SYMBOL_GPL(kvm_set_dr
);
844 static int _kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
848 *val
= vcpu
->arch
.db
[dr
];
851 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
855 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
856 *val
= vcpu
->arch
.dr6
;
858 *val
= kvm_x86_ops
->get_dr6(vcpu
);
861 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
865 *val
= vcpu
->arch
.dr7
;
872 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
874 if (_kvm_get_dr(vcpu
, dr
, val
)) {
875 kvm_queue_exception(vcpu
, UD_VECTOR
);
880 EXPORT_SYMBOL_GPL(kvm_get_dr
);
882 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
884 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
888 err
= kvm_pmu_read_pmc(vcpu
, ecx
, &data
);
891 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
892 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
895 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
898 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
899 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
901 * This list is modified at module load time to reflect the
902 * capabilities of the host cpu. This capabilities test skips MSRs that are
903 * kvm-specific. Those are put in the beginning of the list.
906 #define KVM_SAVE_MSRS_BEGIN 12
907 static u32 msrs_to_save
[] = {
908 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
909 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
910 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
911 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
912 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
914 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
917 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
919 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
920 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
923 static unsigned num_msrs_to_save
;
925 static const u32 emulated_msrs
[] = {
927 MSR_IA32_TSCDEADLINE
,
928 MSR_IA32_MISC_ENABLE
,
933 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
935 if (efer
& efer_reserved_bits
)
938 if (efer
& EFER_FFXSR
) {
939 struct kvm_cpuid_entry2
*feat
;
941 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
942 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
946 if (efer
& EFER_SVME
) {
947 struct kvm_cpuid_entry2
*feat
;
949 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
950 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
956 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
958 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
960 u64 old_efer
= vcpu
->arch
.efer
;
962 if (!kvm_valid_efer(vcpu
, efer
))
966 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
970 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
972 kvm_x86_ops
->set_efer(vcpu
, efer
);
974 /* Update reserved bits */
975 if ((efer
^ old_efer
) & EFER_NX
)
976 kvm_mmu_reset_context(vcpu
);
981 void kvm_enable_efer_bits(u64 mask
)
983 efer_reserved_bits
&= ~mask
;
985 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
989 * Writes msr value into into the appropriate "register".
990 * Returns 0 on success, non-0 otherwise.
991 * Assumes vcpu_load() was already called.
993 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
995 return kvm_x86_ops
->set_msr(vcpu
, msr
);
999 * Adapt set_msr() to msr_io()'s calling convention
1001 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1003 struct msr_data msr
;
1007 msr
.host_initiated
= true;
1008 return kvm_set_msr(vcpu
, &msr
);
1011 #ifdef CONFIG_X86_64
1012 struct pvclock_gtod_data
{
1015 struct { /* extract of a clocksource struct */
1027 static struct pvclock_gtod_data pvclock_gtod_data
;
1029 static void update_pvclock_gtod(struct timekeeper
*tk
)
1031 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1034 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr
.base_mono
, tk
->offs_boot
));
1036 write_seqcount_begin(&vdata
->seq
);
1038 /* copy pvclock gtod data */
1039 vdata
->clock
.vclock_mode
= tk
->tkr
.clock
->archdata
.vclock_mode
;
1040 vdata
->clock
.cycle_last
= tk
->tkr
.cycle_last
;
1041 vdata
->clock
.mask
= tk
->tkr
.mask
;
1042 vdata
->clock
.mult
= tk
->tkr
.mult
;
1043 vdata
->clock
.shift
= tk
->tkr
.shift
;
1045 vdata
->boot_ns
= boot_ns
;
1046 vdata
->nsec_base
= tk
->tkr
.xtime_nsec
;
1048 write_seqcount_end(&vdata
->seq
);
1053 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1057 struct pvclock_wall_clock wc
;
1058 struct timespec boot
;
1063 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1068 ++version
; /* first time write, random junk */
1072 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1075 * The guest calculates current wall clock time by adding
1076 * system time (updated by kvm_guest_time_update below) to the
1077 * wall clock specified here. guest system time equals host
1078 * system time for us, thus we must fill in host boot time here.
1082 if (kvm
->arch
.kvmclock_offset
) {
1083 struct timespec ts
= ns_to_timespec(kvm
->arch
.kvmclock_offset
);
1084 boot
= timespec_sub(boot
, ts
);
1086 wc
.sec
= boot
.tv_sec
;
1087 wc
.nsec
= boot
.tv_nsec
;
1088 wc
.version
= version
;
1090 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1093 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1096 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1098 uint32_t quotient
, remainder
;
1100 /* Don't try to replace with do_div(), this one calculates
1101 * "(dividend << 32) / divisor" */
1103 : "=a" (quotient
), "=d" (remainder
)
1104 : "0" (0), "1" (dividend
), "r" (divisor
) );
1108 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
1109 s8
*pshift
, u32
*pmultiplier
)
1116 tps64
= base_khz
* 1000LL;
1117 scaled64
= scaled_khz
* 1000LL;
1118 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1123 tps32
= (uint32_t)tps64
;
1124 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1125 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1133 *pmultiplier
= div_frac(scaled64
, tps32
);
1135 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1136 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
1139 static inline u64
get_kernel_ns(void)
1141 return ktime_get_boot_ns();
1144 #ifdef CONFIG_X86_64
1145 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1148 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1149 unsigned long max_tsc_khz
;
1151 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1153 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1154 vcpu
->arch
.virtual_tsc_shift
);
1157 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1159 u64 v
= (u64
)khz
* (1000000 + ppm
);
1164 static void kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1166 u32 thresh_lo
, thresh_hi
;
1167 int use_scaling
= 0;
1169 /* tsc_khz can be zero if TSC calibration fails */
1170 if (this_tsc_khz
== 0)
1173 /* Compute a scale to convert nanoseconds in TSC cycles */
1174 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1175 &vcpu
->arch
.virtual_tsc_shift
,
1176 &vcpu
->arch
.virtual_tsc_mult
);
1177 vcpu
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1180 * Compute the variation in TSC rate which is acceptable
1181 * within the range of tolerance and decide if the
1182 * rate being applied is within that bounds of the hardware
1183 * rate. If so, no scaling or compensation need be done.
1185 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1186 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1187 if (this_tsc_khz
< thresh_lo
|| this_tsc_khz
> thresh_hi
) {
1188 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz
, thresh_lo
, thresh_hi
);
1191 kvm_x86_ops
->set_tsc_khz(vcpu
, this_tsc_khz
, use_scaling
);
1194 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1196 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1197 vcpu
->arch
.virtual_tsc_mult
,
1198 vcpu
->arch
.virtual_tsc_shift
);
1199 tsc
+= vcpu
->arch
.this_tsc_write
;
1203 void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1205 #ifdef CONFIG_X86_64
1207 bool do_request
= false;
1208 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1209 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1211 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1212 atomic_read(&vcpu
->kvm
->online_vcpus
));
1214 if (vcpus_matched
&& gtod
->clock
.vclock_mode
== VCLOCK_TSC
)
1215 if (!ka
->use_master_clock
)
1218 if (!vcpus_matched
&& ka
->use_master_clock
)
1222 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1224 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1225 atomic_read(&vcpu
->kvm
->online_vcpus
),
1226 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1230 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1232 u64 curr_offset
= kvm_x86_ops
->read_tsc_offset(vcpu
);
1233 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1236 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1238 struct kvm
*kvm
= vcpu
->kvm
;
1239 u64 offset
, ns
, elapsed
;
1240 unsigned long flags
;
1243 bool already_matched
;
1244 u64 data
= msr
->data
;
1246 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1247 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1248 ns
= get_kernel_ns();
1249 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1251 if (vcpu
->arch
.virtual_tsc_khz
) {
1254 /* n.b - signed multiplication and division required */
1255 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1256 #ifdef CONFIG_X86_64
1257 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1259 /* do_div() only does unsigned */
1260 asm("1: idivl %[divisor]\n"
1261 "2: xor %%edx, %%edx\n"
1262 " movl $0, %[faulted]\n"
1264 ".section .fixup,\"ax\"\n"
1265 "4: movl $1, %[faulted]\n"
1269 _ASM_EXTABLE(1b
, 4b
)
1271 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1272 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1275 do_div(elapsed
, 1000);
1280 /* idivl overflow => difference is larger than USEC_PER_SEC */
1282 usdiff
= USEC_PER_SEC
;
1284 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1287 * Special case: TSC write with a small delta (1 second) of virtual
1288 * cycle time against real time is interpreted as an attempt to
1289 * synchronize the CPU.
1291 * For a reliable TSC, we can match TSC offsets, and for an unstable
1292 * TSC, we add elapsed time in this computation. We could let the
1293 * compensation code attempt to catch up if we fall behind, but
1294 * it's better to try to match offsets from the beginning.
1296 if (usdiff
< USEC_PER_SEC
&&
1297 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1298 if (!check_tsc_unstable()) {
1299 offset
= kvm
->arch
.cur_tsc_offset
;
1300 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1302 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1304 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1305 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1308 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1311 * We split periods of matched TSC writes into generations.
1312 * For each generation, we track the original measured
1313 * nanosecond time, offset, and write, so if TSCs are in
1314 * sync, we can match exact offset, and if not, we can match
1315 * exact software computation in compute_guest_tsc()
1317 * These values are tracked in kvm->arch.cur_xxx variables.
1319 kvm
->arch
.cur_tsc_generation
++;
1320 kvm
->arch
.cur_tsc_nsec
= ns
;
1321 kvm
->arch
.cur_tsc_write
= data
;
1322 kvm
->arch
.cur_tsc_offset
= offset
;
1324 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1325 kvm
->arch
.cur_tsc_generation
, data
);
1329 * We also track th most recent recorded KHZ, write and time to
1330 * allow the matching interval to be extended at each write.
1332 kvm
->arch
.last_tsc_nsec
= ns
;
1333 kvm
->arch
.last_tsc_write
= data
;
1334 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1336 vcpu
->arch
.last_guest_tsc
= data
;
1338 /* Keep track of which generation this VCPU has synchronized to */
1339 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1340 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1341 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1343 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1344 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1345 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1346 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1348 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1350 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1351 } else if (!already_matched
) {
1352 kvm
->arch
.nr_vcpus_matched_tsc
++;
1355 kvm_track_tsc_matching(vcpu
);
1356 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1359 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1361 #ifdef CONFIG_X86_64
1363 static cycle_t
read_tsc(void)
1369 * Empirically, a fence (of type that depends on the CPU)
1370 * before rdtsc is enough to ensure that rdtsc is ordered
1371 * with respect to loads. The various CPU manuals are unclear
1372 * as to whether rdtsc can be reordered with later loads,
1373 * but no one has ever seen it happen.
1376 ret
= (cycle_t
)vget_cycles();
1378 last
= pvclock_gtod_data
.clock
.cycle_last
;
1380 if (likely(ret
>= last
))
1384 * GCC likes to generate cmov here, but this branch is extremely
1385 * predictable (it's just a funciton of time and the likely is
1386 * very likely) and there's a data dependence, so force GCC
1387 * to generate a branch instead. I don't barrier() because
1388 * we don't actually need a barrier, and if this function
1389 * ever gets inlined it will generate worse code.
1395 static inline u64
vgettsc(cycle_t
*cycle_now
)
1398 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1400 *cycle_now
= read_tsc();
1402 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1403 return v
* gtod
->clock
.mult
;
1406 static int do_monotonic_boot(s64
*t
, cycle_t
*cycle_now
)
1408 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1414 seq
= read_seqcount_begin(>od
->seq
);
1415 mode
= gtod
->clock
.vclock_mode
;
1416 ns
= gtod
->nsec_base
;
1417 ns
+= vgettsc(cycle_now
);
1418 ns
>>= gtod
->clock
.shift
;
1419 ns
+= gtod
->boot_ns
;
1420 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1426 /* returns true if host is using tsc clocksource */
1427 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, cycle_t
*cycle_now
)
1429 /* checked again under seqlock below */
1430 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1433 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1439 * Assuming a stable TSC across physical CPUS, and a stable TSC
1440 * across virtual CPUs, the following condition is possible.
1441 * Each numbered line represents an event visible to both
1442 * CPUs at the next numbered event.
1444 * "timespecX" represents host monotonic time. "tscX" represents
1447 * VCPU0 on CPU0 | VCPU1 on CPU1
1449 * 1. read timespec0,tsc0
1450 * 2. | timespec1 = timespec0 + N
1452 * 3. transition to guest | transition to guest
1453 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1454 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1455 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1457 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1460 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1462 * - 0 < N - M => M < N
1464 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1465 * always the case (the difference between two distinct xtime instances
1466 * might be smaller then the difference between corresponding TSC reads,
1467 * when updating guest vcpus pvclock areas).
1469 * To avoid that problem, do not allow visibility of distinct
1470 * system_timestamp/tsc_timestamp values simultaneously: use a master
1471 * copy of host monotonic time values. Update that master copy
1474 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1478 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1480 #ifdef CONFIG_X86_64
1481 struct kvm_arch
*ka
= &kvm
->arch
;
1483 bool host_tsc_clocksource
, vcpus_matched
;
1485 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1486 atomic_read(&kvm
->online_vcpus
));
1489 * If the host uses TSC clock, then passthrough TSC as stable
1492 host_tsc_clocksource
= kvm_get_time_and_clockread(
1493 &ka
->master_kernel_ns
,
1494 &ka
->master_cycle_now
);
1496 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1497 && !backwards_tsc_observed
;
1499 if (ka
->use_master_clock
)
1500 atomic_set(&kvm_guest_has_master_clock
, 1);
1502 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1503 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1508 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1510 #ifdef CONFIG_X86_64
1512 struct kvm_vcpu
*vcpu
;
1513 struct kvm_arch
*ka
= &kvm
->arch
;
1515 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1516 kvm_make_mclock_inprogress_request(kvm
);
1517 /* no guest entries from this point */
1518 pvclock_update_vm_gtod_copy(kvm
);
1520 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1521 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
1523 /* guest entries allowed */
1524 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1525 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1527 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1531 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1533 unsigned long flags
, this_tsc_khz
;
1534 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1535 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1537 u64 tsc_timestamp
, host_tsc
;
1538 struct pvclock_vcpu_time_info guest_hv_clock
;
1540 bool use_master_clock
;
1546 * If the host uses TSC clock, then passthrough TSC as stable
1549 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1550 use_master_clock
= ka
->use_master_clock
;
1551 if (use_master_clock
) {
1552 host_tsc
= ka
->master_cycle_now
;
1553 kernel_ns
= ka
->master_kernel_ns
;
1555 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1557 /* Keep irq disabled to prevent changes to the clock */
1558 local_irq_save(flags
);
1559 this_tsc_khz
= __get_cpu_var(cpu_tsc_khz
);
1560 if (unlikely(this_tsc_khz
== 0)) {
1561 local_irq_restore(flags
);
1562 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1565 if (!use_master_clock
) {
1566 host_tsc
= native_read_tsc();
1567 kernel_ns
= get_kernel_ns();
1570 tsc_timestamp
= kvm_x86_ops
->read_l1_tsc(v
, host_tsc
);
1573 * We may have to catch up the TSC to match elapsed wall clock
1574 * time for two reasons, even if kvmclock is used.
1575 * 1) CPU could have been running below the maximum TSC rate
1576 * 2) Broken TSC compensation resets the base at each VCPU
1577 * entry to avoid unknown leaps of TSC even when running
1578 * again on the same CPU. This may cause apparent elapsed
1579 * time to disappear, and the guest to stand still or run
1582 if (vcpu
->tsc_catchup
) {
1583 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1584 if (tsc
> tsc_timestamp
) {
1585 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1586 tsc_timestamp
= tsc
;
1590 local_irq_restore(flags
);
1592 if (!vcpu
->pv_time_enabled
)
1595 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1596 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1597 &vcpu
->hv_clock
.tsc_shift
,
1598 &vcpu
->hv_clock
.tsc_to_system_mul
);
1599 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1602 /* With all the info we got, fill in the values */
1603 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1604 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1605 vcpu
->last_guest_tsc
= tsc_timestamp
;
1608 * The interface expects us to write an even number signaling that the
1609 * update is finished. Since the guest won't see the intermediate
1610 * state, we just increase by 2 at the end.
1612 vcpu
->hv_clock
.version
+= 2;
1614 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1615 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1618 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1619 pvclock_flags
= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1621 if (vcpu
->pvclock_set_guest_stopped_request
) {
1622 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1623 vcpu
->pvclock_set_guest_stopped_request
= false;
1626 /* If the host uses TSC clocksource, then it is stable */
1627 if (use_master_clock
)
1628 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1630 vcpu
->hv_clock
.flags
= pvclock_flags
;
1632 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1634 sizeof(vcpu
->hv_clock
));
1639 * kvmclock updates which are isolated to a given vcpu, such as
1640 * vcpu->cpu migration, should not allow system_timestamp from
1641 * the rest of the vcpus to remain static. Otherwise ntp frequency
1642 * correction applies to one vcpu's system_timestamp but not
1645 * So in those cases, request a kvmclock update for all vcpus.
1646 * We need to rate-limit these requests though, as they can
1647 * considerably slow guests that have a large number of vcpus.
1648 * The time for a remote vcpu to update its kvmclock is bound
1649 * by the delay we use to rate-limit the updates.
1652 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1654 static void kvmclock_update_fn(struct work_struct
*work
)
1657 struct delayed_work
*dwork
= to_delayed_work(work
);
1658 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1659 kvmclock_update_work
);
1660 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1661 struct kvm_vcpu
*vcpu
;
1663 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1664 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
1665 kvm_vcpu_kick(vcpu
);
1669 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1671 struct kvm
*kvm
= v
->kvm
;
1673 set_bit(KVM_REQ_CLOCK_UPDATE
, &v
->requests
);
1674 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1675 KVMCLOCK_UPDATE_DELAY
);
1678 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1680 static void kvmclock_sync_fn(struct work_struct
*work
)
1682 struct delayed_work
*dwork
= to_delayed_work(work
);
1683 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1684 kvmclock_sync_work
);
1685 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1687 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1688 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1689 KVMCLOCK_SYNC_PERIOD
);
1692 static bool msr_mtrr_valid(unsigned msr
)
1695 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1696 case MSR_MTRRfix64K_00000
:
1697 case MSR_MTRRfix16K_80000
:
1698 case MSR_MTRRfix16K_A0000
:
1699 case MSR_MTRRfix4K_C0000
:
1700 case MSR_MTRRfix4K_C8000
:
1701 case MSR_MTRRfix4K_D0000
:
1702 case MSR_MTRRfix4K_D8000
:
1703 case MSR_MTRRfix4K_E0000
:
1704 case MSR_MTRRfix4K_E8000
:
1705 case MSR_MTRRfix4K_F0000
:
1706 case MSR_MTRRfix4K_F8000
:
1707 case MSR_MTRRdefType
:
1708 case MSR_IA32_CR_PAT
:
1716 static bool valid_pat_type(unsigned t
)
1718 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1721 static bool valid_mtrr_type(unsigned t
)
1723 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1726 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1730 if (!msr_mtrr_valid(msr
))
1733 if (msr
== MSR_IA32_CR_PAT
) {
1734 for (i
= 0; i
< 8; i
++)
1735 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1738 } else if (msr
== MSR_MTRRdefType
) {
1741 return valid_mtrr_type(data
& 0xff);
1742 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1743 for (i
= 0; i
< 8 ; i
++)
1744 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1749 /* variable MTRRs */
1750 return valid_mtrr_type(data
& 0xff);
1753 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1755 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1757 if (!mtrr_valid(vcpu
, msr
, data
))
1760 if (msr
== MSR_MTRRdefType
) {
1761 vcpu
->arch
.mtrr_state
.def_type
= data
;
1762 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1763 } else if (msr
== MSR_MTRRfix64K_00000
)
1765 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1766 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1767 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1768 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1769 else if (msr
== MSR_IA32_CR_PAT
)
1770 vcpu
->arch
.pat
= data
;
1771 else { /* Variable MTRRs */
1772 int idx
, is_mtrr_mask
;
1775 idx
= (msr
- 0x200) / 2;
1776 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1779 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1782 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1786 kvm_mmu_reset_context(vcpu
);
1790 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1792 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1793 unsigned bank_num
= mcg_cap
& 0xff;
1796 case MSR_IA32_MCG_STATUS
:
1797 vcpu
->arch
.mcg_status
= data
;
1799 case MSR_IA32_MCG_CTL
:
1800 if (!(mcg_cap
& MCG_CTL_P
))
1802 if (data
!= 0 && data
!= ~(u64
)0)
1804 vcpu
->arch
.mcg_ctl
= data
;
1807 if (msr
>= MSR_IA32_MC0_CTL
&&
1808 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1809 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1810 /* only 0 or all 1s can be written to IA32_MCi_CTL
1811 * some Linux kernels though clear bit 10 in bank 4 to
1812 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1813 * this to avoid an uncatched #GP in the guest
1815 if ((offset
& 0x3) == 0 &&
1816 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1818 vcpu
->arch
.mce_banks
[offset
] = data
;
1826 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1828 struct kvm
*kvm
= vcpu
->kvm
;
1829 int lm
= is_long_mode(vcpu
);
1830 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1831 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1832 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1833 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1834 u32 page_num
= data
& ~PAGE_MASK
;
1835 u64 page_addr
= data
& PAGE_MASK
;
1840 if (page_num
>= blob_size
)
1843 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1848 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1857 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1859 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1862 static bool kvm_hv_msr_partition_wide(u32 msr
)
1866 case HV_X64_MSR_GUEST_OS_ID
:
1867 case HV_X64_MSR_HYPERCALL
:
1868 case HV_X64_MSR_REFERENCE_TSC
:
1869 case HV_X64_MSR_TIME_REF_COUNT
:
1877 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1879 struct kvm
*kvm
= vcpu
->kvm
;
1882 case HV_X64_MSR_GUEST_OS_ID
:
1883 kvm
->arch
.hv_guest_os_id
= data
;
1884 /* setting guest os id to zero disables hypercall page */
1885 if (!kvm
->arch
.hv_guest_os_id
)
1886 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1888 case HV_X64_MSR_HYPERCALL
: {
1893 /* if guest os id is not set hypercall should remain disabled */
1894 if (!kvm
->arch
.hv_guest_os_id
)
1896 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1897 kvm
->arch
.hv_hypercall
= data
;
1900 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1901 addr
= gfn_to_hva(kvm
, gfn
);
1902 if (kvm_is_error_hva(addr
))
1904 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1905 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1906 if (__copy_to_user((void __user
*)addr
, instructions
, 4))
1908 kvm
->arch
.hv_hypercall
= data
;
1909 mark_page_dirty(kvm
, gfn
);
1912 case HV_X64_MSR_REFERENCE_TSC
: {
1914 HV_REFERENCE_TSC_PAGE tsc_ref
;
1915 memset(&tsc_ref
, 0, sizeof(tsc_ref
));
1916 kvm
->arch
.hv_tsc_page
= data
;
1917 if (!(data
& HV_X64_MSR_TSC_REFERENCE_ENABLE
))
1919 gfn
= data
>> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT
;
1920 if (kvm_write_guest(kvm
, gfn
<< HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT
,
1921 &tsc_ref
, sizeof(tsc_ref
)))
1923 mark_page_dirty(kvm
, gfn
);
1927 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1928 "data 0x%llx\n", msr
, data
);
1934 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1937 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1941 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1942 vcpu
->arch
.hv_vapic
= data
;
1943 if (kvm_lapic_enable_pv_eoi(vcpu
, 0))
1947 gfn
= data
>> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
;
1948 addr
= gfn_to_hva(vcpu
->kvm
, gfn
);
1949 if (kvm_is_error_hva(addr
))
1951 if (__clear_user((void __user
*)addr
, PAGE_SIZE
))
1953 vcpu
->arch
.hv_vapic
= data
;
1954 mark_page_dirty(vcpu
->kvm
, gfn
);
1955 if (kvm_lapic_enable_pv_eoi(vcpu
, gfn_to_gpa(gfn
) | KVM_MSR_ENABLED
))
1959 case HV_X64_MSR_EOI
:
1960 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1961 case HV_X64_MSR_ICR
:
1962 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1963 case HV_X64_MSR_TPR
:
1964 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1966 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1967 "data 0x%llx\n", msr
, data
);
1974 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1976 gpa_t gpa
= data
& ~0x3f;
1978 /* Bits 2:5 are reserved, Should be zero */
1982 vcpu
->arch
.apf
.msr_val
= data
;
1984 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1985 kvm_clear_async_pf_completion_queue(vcpu
);
1986 kvm_async_pf_hash_reset(vcpu
);
1990 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
1994 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
1995 kvm_async_pf_wakeup_all(vcpu
);
1999 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2001 vcpu
->arch
.pv_time_enabled
= false;
2004 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
2008 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2011 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
2012 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2013 vcpu
->arch
.st
.accum_steal
= delta
;
2016 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2018 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2021 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2022 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2025 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
2026 vcpu
->arch
.st
.steal
.version
+= 2;
2027 vcpu
->arch
.st
.accum_steal
= 0;
2029 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2030 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2033 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2036 u32 msr
= msr_info
->index
;
2037 u64 data
= msr_info
->data
;
2040 case MSR_AMD64_NB_CFG
:
2041 case MSR_IA32_UCODE_REV
:
2042 case MSR_IA32_UCODE_WRITE
:
2043 case MSR_VM_HSAVE_PA
:
2044 case MSR_AMD64_PATCH_LOADER
:
2045 case MSR_AMD64_BU_CFG2
:
2049 return set_efer(vcpu
, data
);
2051 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2052 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2053 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2054 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2056 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2061 case MSR_FAM10H_MMIO_CONF_BASE
:
2063 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2068 case MSR_IA32_DEBUGCTLMSR
:
2070 /* We support the non-activated case already */
2072 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2073 /* Values other than LBR and BTF are vendor-specific,
2074 thus reserved and should throw a #GP */
2077 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2080 case 0x200 ... 0x2ff:
2081 return set_msr_mtrr(vcpu
, msr
, data
);
2082 case MSR_IA32_APICBASE
:
2083 return kvm_set_apic_base(vcpu
, msr_info
);
2084 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2085 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2086 case MSR_IA32_TSCDEADLINE
:
2087 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2089 case MSR_IA32_TSC_ADJUST
:
2090 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2091 if (!msr_info
->host_initiated
) {
2092 u64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2093 kvm_x86_ops
->adjust_tsc_offset(vcpu
, adj
, true);
2095 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2098 case MSR_IA32_MISC_ENABLE
:
2099 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2101 case MSR_KVM_WALL_CLOCK_NEW
:
2102 case MSR_KVM_WALL_CLOCK
:
2103 vcpu
->kvm
->arch
.wall_clock
= data
;
2104 kvm_write_wall_clock(vcpu
->kvm
, data
);
2106 case MSR_KVM_SYSTEM_TIME_NEW
:
2107 case MSR_KVM_SYSTEM_TIME
: {
2109 kvmclock_reset(vcpu
);
2111 vcpu
->arch
.time
= data
;
2112 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2114 /* we verify if the enable bit is set... */
2118 gpa_offset
= data
& ~(PAGE_MASK
| 1);
2120 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2121 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2122 sizeof(struct pvclock_vcpu_time_info
)))
2123 vcpu
->arch
.pv_time_enabled
= false;
2125 vcpu
->arch
.pv_time_enabled
= true;
2129 case MSR_KVM_ASYNC_PF_EN
:
2130 if (kvm_pv_enable_async_pf(vcpu
, data
))
2133 case MSR_KVM_STEAL_TIME
:
2135 if (unlikely(!sched_info_on()))
2138 if (data
& KVM_STEAL_RESERVED_MASK
)
2141 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2142 data
& KVM_STEAL_VALID_BITS
,
2143 sizeof(struct kvm_steal_time
)))
2146 vcpu
->arch
.st
.msr_val
= data
;
2148 if (!(data
& KVM_MSR_ENABLED
))
2151 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2154 accumulate_steal_time(vcpu
);
2157 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2160 case MSR_KVM_PV_EOI_EN
:
2161 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2165 case MSR_IA32_MCG_CTL
:
2166 case MSR_IA32_MCG_STATUS
:
2167 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
2168 return set_msr_mce(vcpu
, msr
, data
);
2170 /* Performance counters are not protected by a CPUID bit,
2171 * so we should check all of them in the generic path for the sake of
2172 * cross vendor migration.
2173 * Writing a zero into the event select MSRs disables them,
2174 * which we perfectly emulate ;-). Any other value should be at least
2175 * reported, some guests depend on them.
2177 case MSR_K7_EVNTSEL0
:
2178 case MSR_K7_EVNTSEL1
:
2179 case MSR_K7_EVNTSEL2
:
2180 case MSR_K7_EVNTSEL3
:
2182 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2183 "0x%x data 0x%llx\n", msr
, data
);
2185 /* at least RHEL 4 unconditionally writes to the perfctr registers,
2186 * so we ignore writes to make it happy.
2188 case MSR_K7_PERFCTR0
:
2189 case MSR_K7_PERFCTR1
:
2190 case MSR_K7_PERFCTR2
:
2191 case MSR_K7_PERFCTR3
:
2192 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2193 "0x%x data 0x%llx\n", msr
, data
);
2195 case MSR_P6_PERFCTR0
:
2196 case MSR_P6_PERFCTR1
:
2198 case MSR_P6_EVNTSEL0
:
2199 case MSR_P6_EVNTSEL1
:
2200 if (kvm_pmu_msr(vcpu
, msr
))
2201 return kvm_pmu_set_msr(vcpu
, msr_info
);
2203 if (pr
|| data
!= 0)
2204 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2205 "0x%x data 0x%llx\n", msr
, data
);
2207 case MSR_K7_CLK_CTL
:
2209 * Ignore all writes to this no longer documented MSR.
2210 * Writes are only relevant for old K7 processors,
2211 * all pre-dating SVM, but a recommended workaround from
2212 * AMD for these chips. It is possible to specify the
2213 * affected processor models on the command line, hence
2214 * the need to ignore the workaround.
2217 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2218 if (kvm_hv_msr_partition_wide(msr
)) {
2220 mutex_lock(&vcpu
->kvm
->lock
);
2221 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
2222 mutex_unlock(&vcpu
->kvm
->lock
);
2225 return set_msr_hyperv(vcpu
, msr
, data
);
2227 case MSR_IA32_BBL_CR_CTL3
:
2228 /* Drop writes to this legacy MSR -- see rdmsr
2229 * counterpart for further detail.
2231 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
2233 case MSR_AMD64_OSVW_ID_LENGTH
:
2234 if (!guest_cpuid_has_osvw(vcpu
))
2236 vcpu
->arch
.osvw
.length
= data
;
2238 case MSR_AMD64_OSVW_STATUS
:
2239 if (!guest_cpuid_has_osvw(vcpu
))
2241 vcpu
->arch
.osvw
.status
= data
;
2244 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2245 return xen_hvm_config(vcpu
, data
);
2246 if (kvm_pmu_msr(vcpu
, msr
))
2247 return kvm_pmu_set_msr(vcpu
, msr_info
);
2249 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
2253 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
2260 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2264 * Reads an msr value (of 'msr_index') into 'pdata'.
2265 * Returns 0 on success, non-0 otherwise.
2266 * Assumes vcpu_load() was already called.
2268 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
2270 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
2273 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2275 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
2277 if (!msr_mtrr_valid(msr
))
2280 if (msr
== MSR_MTRRdefType
)
2281 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
2282 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
2283 else if (msr
== MSR_MTRRfix64K_00000
)
2285 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
2286 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
2287 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
2288 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
2289 else if (msr
== MSR_IA32_CR_PAT
)
2290 *pdata
= vcpu
->arch
.pat
;
2291 else { /* Variable MTRRs */
2292 int idx
, is_mtrr_mask
;
2295 idx
= (msr
- 0x200) / 2;
2296 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
2299 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
2302 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
2309 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2312 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2313 unsigned bank_num
= mcg_cap
& 0xff;
2316 case MSR_IA32_P5_MC_ADDR
:
2317 case MSR_IA32_P5_MC_TYPE
:
2320 case MSR_IA32_MCG_CAP
:
2321 data
= vcpu
->arch
.mcg_cap
;
2323 case MSR_IA32_MCG_CTL
:
2324 if (!(mcg_cap
& MCG_CTL_P
))
2326 data
= vcpu
->arch
.mcg_ctl
;
2328 case MSR_IA32_MCG_STATUS
:
2329 data
= vcpu
->arch
.mcg_status
;
2332 if (msr
>= MSR_IA32_MC0_CTL
&&
2333 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
2334 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2335 data
= vcpu
->arch
.mce_banks
[offset
];
2344 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2347 struct kvm
*kvm
= vcpu
->kvm
;
2350 case HV_X64_MSR_GUEST_OS_ID
:
2351 data
= kvm
->arch
.hv_guest_os_id
;
2353 case HV_X64_MSR_HYPERCALL
:
2354 data
= kvm
->arch
.hv_hypercall
;
2356 case HV_X64_MSR_TIME_REF_COUNT
: {
2358 div_u64(get_kernel_ns() + kvm
->arch
.kvmclock_offset
, 100);
2361 case HV_X64_MSR_REFERENCE_TSC
:
2362 data
= kvm
->arch
.hv_tsc_page
;
2365 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2373 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2378 case HV_X64_MSR_VP_INDEX
: {
2381 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
) {
2389 case HV_X64_MSR_EOI
:
2390 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
2391 case HV_X64_MSR_ICR
:
2392 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
2393 case HV_X64_MSR_TPR
:
2394 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
2395 case HV_X64_MSR_APIC_ASSIST_PAGE
:
2396 data
= vcpu
->arch
.hv_vapic
;
2399 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2406 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2411 case MSR_IA32_PLATFORM_ID
:
2412 case MSR_IA32_EBL_CR_POWERON
:
2413 case MSR_IA32_DEBUGCTLMSR
:
2414 case MSR_IA32_LASTBRANCHFROMIP
:
2415 case MSR_IA32_LASTBRANCHTOIP
:
2416 case MSR_IA32_LASTINTFROMIP
:
2417 case MSR_IA32_LASTINTTOIP
:
2420 case MSR_VM_HSAVE_PA
:
2421 case MSR_K7_EVNTSEL0
:
2422 case MSR_K7_PERFCTR0
:
2423 case MSR_K8_INT_PENDING_MSG
:
2424 case MSR_AMD64_NB_CFG
:
2425 case MSR_FAM10H_MMIO_CONF_BASE
:
2426 case MSR_AMD64_BU_CFG2
:
2429 case MSR_P6_PERFCTR0
:
2430 case MSR_P6_PERFCTR1
:
2431 case MSR_P6_EVNTSEL0
:
2432 case MSR_P6_EVNTSEL1
:
2433 if (kvm_pmu_msr(vcpu
, msr
))
2434 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2437 case MSR_IA32_UCODE_REV
:
2438 data
= 0x100000000ULL
;
2441 data
= 0x500 | KVM_NR_VAR_MTRR
;
2443 case 0x200 ... 0x2ff:
2444 return get_msr_mtrr(vcpu
, msr
, pdata
);
2445 case 0xcd: /* fsb frequency */
2449 * MSR_EBC_FREQUENCY_ID
2450 * Conservative value valid for even the basic CPU models.
2451 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2452 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2453 * and 266MHz for model 3, or 4. Set Core Clock
2454 * Frequency to System Bus Frequency Ratio to 1 (bits
2455 * 31:24) even though these are only valid for CPU
2456 * models > 2, however guests may end up dividing or
2457 * multiplying by zero otherwise.
2459 case MSR_EBC_FREQUENCY_ID
:
2462 case MSR_IA32_APICBASE
:
2463 data
= kvm_get_apic_base(vcpu
);
2465 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2466 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
2468 case MSR_IA32_TSCDEADLINE
:
2469 data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2471 case MSR_IA32_TSC_ADJUST
:
2472 data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2474 case MSR_IA32_MISC_ENABLE
:
2475 data
= vcpu
->arch
.ia32_misc_enable_msr
;
2477 case MSR_IA32_PERF_STATUS
:
2478 /* TSC increment by tick */
2480 /* CPU multiplier */
2481 data
|= (((uint64_t)4ULL) << 40);
2484 data
= vcpu
->arch
.efer
;
2486 case MSR_KVM_WALL_CLOCK
:
2487 case MSR_KVM_WALL_CLOCK_NEW
:
2488 data
= vcpu
->kvm
->arch
.wall_clock
;
2490 case MSR_KVM_SYSTEM_TIME
:
2491 case MSR_KVM_SYSTEM_TIME_NEW
:
2492 data
= vcpu
->arch
.time
;
2494 case MSR_KVM_ASYNC_PF_EN
:
2495 data
= vcpu
->arch
.apf
.msr_val
;
2497 case MSR_KVM_STEAL_TIME
:
2498 data
= vcpu
->arch
.st
.msr_val
;
2500 case MSR_KVM_PV_EOI_EN
:
2501 data
= vcpu
->arch
.pv_eoi
.msr_val
;
2503 case MSR_IA32_P5_MC_ADDR
:
2504 case MSR_IA32_P5_MC_TYPE
:
2505 case MSR_IA32_MCG_CAP
:
2506 case MSR_IA32_MCG_CTL
:
2507 case MSR_IA32_MCG_STATUS
:
2508 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
2509 return get_msr_mce(vcpu
, msr
, pdata
);
2510 case MSR_K7_CLK_CTL
:
2512 * Provide expected ramp-up count for K7. All other
2513 * are set to zero, indicating minimum divisors for
2516 * This prevents guest kernels on AMD host with CPU
2517 * type 6, model 8 and higher from exploding due to
2518 * the rdmsr failing.
2522 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2523 if (kvm_hv_msr_partition_wide(msr
)) {
2525 mutex_lock(&vcpu
->kvm
->lock
);
2526 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
2527 mutex_unlock(&vcpu
->kvm
->lock
);
2530 return get_msr_hyperv(vcpu
, msr
, pdata
);
2532 case MSR_IA32_BBL_CR_CTL3
:
2533 /* This legacy MSR exists but isn't fully documented in current
2534 * silicon. It is however accessed by winxp in very narrow
2535 * scenarios where it sets bit #19, itself documented as
2536 * a "reserved" bit. Best effort attempt to source coherent
2537 * read data here should the balance of the register be
2538 * interpreted by the guest:
2540 * L2 cache control register 3: 64GB range, 256KB size,
2541 * enabled, latency 0x1, configured
2545 case MSR_AMD64_OSVW_ID_LENGTH
:
2546 if (!guest_cpuid_has_osvw(vcpu
))
2548 data
= vcpu
->arch
.osvw
.length
;
2550 case MSR_AMD64_OSVW_STATUS
:
2551 if (!guest_cpuid_has_osvw(vcpu
))
2553 data
= vcpu
->arch
.osvw
.status
;
2556 if (kvm_pmu_msr(vcpu
, msr
))
2557 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2559 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
2562 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
2570 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2573 * Read or write a bunch of msrs. All parameters are kernel addresses.
2575 * @return number of msrs set successfully.
2577 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2578 struct kvm_msr_entry
*entries
,
2579 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2580 unsigned index
, u64
*data
))
2584 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2585 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2586 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2588 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2594 * Read or write a bunch of msrs. Parameters are user addresses.
2596 * @return number of msrs set successfully.
2598 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2599 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2600 unsigned index
, u64
*data
),
2603 struct kvm_msrs msrs
;
2604 struct kvm_msr_entry
*entries
;
2609 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2613 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2616 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2617 entries
= memdup_user(user_msrs
->entries
, size
);
2618 if (IS_ERR(entries
)) {
2619 r
= PTR_ERR(entries
);
2623 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2628 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2639 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2644 case KVM_CAP_IRQCHIP
:
2646 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2647 case KVM_CAP_SET_TSS_ADDR
:
2648 case KVM_CAP_EXT_CPUID
:
2649 case KVM_CAP_EXT_EMUL_CPUID
:
2650 case KVM_CAP_CLOCKSOURCE
:
2652 case KVM_CAP_NOP_IO_DELAY
:
2653 case KVM_CAP_MP_STATE
:
2654 case KVM_CAP_SYNC_MMU
:
2655 case KVM_CAP_USER_NMI
:
2656 case KVM_CAP_REINJECT_CONTROL
:
2657 case KVM_CAP_IRQ_INJECT_STATUS
:
2659 case KVM_CAP_IOEVENTFD
:
2660 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2662 case KVM_CAP_PIT_STATE2
:
2663 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2664 case KVM_CAP_XEN_HVM
:
2665 case KVM_CAP_ADJUST_CLOCK
:
2666 case KVM_CAP_VCPU_EVENTS
:
2667 case KVM_CAP_HYPERV
:
2668 case KVM_CAP_HYPERV_VAPIC
:
2669 case KVM_CAP_HYPERV_SPIN
:
2670 case KVM_CAP_PCI_SEGMENT
:
2671 case KVM_CAP_DEBUGREGS
:
2672 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2674 case KVM_CAP_ASYNC_PF
:
2675 case KVM_CAP_GET_TSC_KHZ
:
2676 case KVM_CAP_KVMCLOCK_CTRL
:
2677 case KVM_CAP_READONLY_MEM
:
2678 case KVM_CAP_HYPERV_TIME
:
2679 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2680 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2681 case KVM_CAP_ASSIGN_DEV_IRQ
:
2682 case KVM_CAP_PCI_2_3
:
2686 case KVM_CAP_COALESCED_MMIO
:
2687 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2690 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2692 case KVM_CAP_NR_VCPUS
:
2693 r
= KVM_SOFT_MAX_VCPUS
;
2695 case KVM_CAP_MAX_VCPUS
:
2698 case KVM_CAP_NR_MEMSLOTS
:
2699 r
= KVM_USER_MEM_SLOTS
;
2701 case KVM_CAP_PV_MMU
: /* obsolete */
2704 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2706 r
= iommu_present(&pci_bus_type
);
2710 r
= KVM_MAX_MCE_BANKS
;
2715 case KVM_CAP_TSC_CONTROL
:
2716 r
= kvm_has_tsc_control
;
2718 case KVM_CAP_TSC_DEADLINE_TIMER
:
2719 r
= boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER
);
2729 long kvm_arch_dev_ioctl(struct file
*filp
,
2730 unsigned int ioctl
, unsigned long arg
)
2732 void __user
*argp
= (void __user
*)arg
;
2736 case KVM_GET_MSR_INDEX_LIST
: {
2737 struct kvm_msr_list __user
*user_msr_list
= argp
;
2738 struct kvm_msr_list msr_list
;
2742 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2745 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
2746 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2749 if (n
< msr_list
.nmsrs
)
2752 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2753 num_msrs_to_save
* sizeof(u32
)))
2755 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2757 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
2762 case KVM_GET_SUPPORTED_CPUID
:
2763 case KVM_GET_EMULATED_CPUID
: {
2764 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2765 struct kvm_cpuid2 cpuid
;
2768 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2771 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2777 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2782 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2785 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2787 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2799 static void wbinvd_ipi(void *garbage
)
2804 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2806 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2809 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2811 /* Address WBINVD may be executed by guest */
2812 if (need_emulate_wbinvd(vcpu
)) {
2813 if (kvm_x86_ops
->has_wbinvd_exit())
2814 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2815 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2816 smp_call_function_single(vcpu
->cpu
,
2817 wbinvd_ipi
, NULL
, 1);
2820 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2822 /* Apply any externally detected TSC adjustments (due to suspend) */
2823 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2824 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2825 vcpu
->arch
.tsc_offset_adjustment
= 0;
2826 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
2829 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2830 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2831 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2833 mark_tsc_unstable("KVM discovered backwards TSC");
2834 if (check_tsc_unstable()) {
2835 u64 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
,
2836 vcpu
->arch
.last_guest_tsc
);
2837 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2838 vcpu
->arch
.tsc_catchup
= 1;
2841 * On a host with synchronized TSC, there is no need to update
2842 * kvmclock on vcpu->cpu migration
2844 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2845 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2846 if (vcpu
->cpu
!= cpu
)
2847 kvm_migrate_timers(vcpu
);
2851 accumulate_steal_time(vcpu
);
2852 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2855 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2857 kvm_x86_ops
->vcpu_put(vcpu
);
2858 kvm_put_guest_fpu(vcpu
);
2859 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2862 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2863 struct kvm_lapic_state
*s
)
2865 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2866 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2871 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2872 struct kvm_lapic_state
*s
)
2874 kvm_apic_post_state_restore(vcpu
, s
);
2875 update_cr8_intercept(vcpu
);
2880 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2881 struct kvm_interrupt
*irq
)
2883 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2885 if (irqchip_in_kernel(vcpu
->kvm
))
2888 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2889 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2894 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2896 kvm_inject_nmi(vcpu
);
2901 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2902 struct kvm_tpr_access_ctl
*tac
)
2906 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2910 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2914 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2917 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2919 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2922 vcpu
->arch
.mcg_cap
= mcg_cap
;
2923 /* Init IA32_MCG_CTL to all 1s */
2924 if (mcg_cap
& MCG_CTL_P
)
2925 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2926 /* Init IA32_MCi_CTL to all 1s */
2927 for (bank
= 0; bank
< bank_num
; bank
++)
2928 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2933 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2934 struct kvm_x86_mce
*mce
)
2936 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2937 unsigned bank_num
= mcg_cap
& 0xff;
2938 u64
*banks
= vcpu
->arch
.mce_banks
;
2940 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2943 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2944 * reporting is disabled
2946 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2947 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2949 banks
+= 4 * mce
->bank
;
2951 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2952 * reporting is disabled for the bank
2954 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2956 if (mce
->status
& MCI_STATUS_UC
) {
2957 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2958 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2959 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2962 if (banks
[1] & MCI_STATUS_VAL
)
2963 mce
->status
|= MCI_STATUS_OVER
;
2964 banks
[2] = mce
->addr
;
2965 banks
[3] = mce
->misc
;
2966 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2967 banks
[1] = mce
->status
;
2968 kvm_queue_exception(vcpu
, MC_VECTOR
);
2969 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2970 || !(banks
[1] & MCI_STATUS_UC
)) {
2971 if (banks
[1] & MCI_STATUS_VAL
)
2972 mce
->status
|= MCI_STATUS_OVER
;
2973 banks
[2] = mce
->addr
;
2974 banks
[3] = mce
->misc
;
2975 banks
[1] = mce
->status
;
2977 banks
[1] |= MCI_STATUS_OVER
;
2981 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2982 struct kvm_vcpu_events
*events
)
2985 events
->exception
.injected
=
2986 vcpu
->arch
.exception
.pending
&&
2987 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2988 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2989 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2990 events
->exception
.pad
= 0;
2991 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2993 events
->interrupt
.injected
=
2994 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2995 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2996 events
->interrupt
.soft
= 0;
2997 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
2999 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3000 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3001 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3002 events
->nmi
.pad
= 0;
3004 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3006 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3007 | KVM_VCPUEVENT_VALID_SHADOW
);
3008 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3011 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3012 struct kvm_vcpu_events
*events
)
3014 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3015 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3016 | KVM_VCPUEVENT_VALID_SHADOW
))
3020 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3021 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3022 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3023 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3025 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3026 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3027 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3028 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3029 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3030 events
->interrupt
.shadow
);
3032 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3033 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3034 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3035 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3037 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3038 kvm_vcpu_has_lapic(vcpu
))
3039 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3041 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3046 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3047 struct kvm_debugregs
*dbgregs
)
3051 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3052 _kvm_get_dr(vcpu
, 6, &val
);
3054 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3056 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3059 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3060 struct kvm_debugregs
*dbgregs
)
3065 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3066 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3067 kvm_update_dr6(vcpu
);
3068 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3069 kvm_update_dr7(vcpu
);
3074 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3075 struct kvm_xsave
*guest_xsave
)
3077 if (cpu_has_xsave
) {
3078 memcpy(guest_xsave
->region
,
3079 &vcpu
->arch
.guest_fpu
.state
->xsave
,
3080 vcpu
->arch
.guest_xstate_size
);
3081 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] &=
3082 vcpu
->arch
.guest_supported_xcr0
| XSTATE_FPSSE
;
3084 memcpy(guest_xsave
->region
,
3085 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
3086 sizeof(struct i387_fxsave_struct
));
3087 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3092 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3093 struct kvm_xsave
*guest_xsave
)
3096 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3098 if (cpu_has_xsave
) {
3100 * Here we allow setting states that are not present in
3101 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3102 * with old userspace.
3104 if (xstate_bv
& ~kvm_supported_xcr0())
3106 memcpy(&vcpu
->arch
.guest_fpu
.state
->xsave
,
3107 guest_xsave
->region
, vcpu
->arch
.guest_xstate_size
);
3109 if (xstate_bv
& ~XSTATE_FPSSE
)
3111 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
3112 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
3117 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3118 struct kvm_xcrs
*guest_xcrs
)
3120 if (!cpu_has_xsave
) {
3121 guest_xcrs
->nr_xcrs
= 0;
3125 guest_xcrs
->nr_xcrs
= 1;
3126 guest_xcrs
->flags
= 0;
3127 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3128 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3131 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3132 struct kvm_xcrs
*guest_xcrs
)
3139 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3142 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3143 /* Only support XCR0 currently */
3144 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3145 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3146 guest_xcrs
->xcrs
[i
].value
);
3155 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3156 * stopped by the hypervisor. This function will be called from the host only.
3157 * EINVAL is returned when the host attempts to set the flag for a guest that
3158 * does not support pv clocks.
3160 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3162 if (!vcpu
->arch
.pv_time_enabled
)
3164 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3165 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3169 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3170 unsigned int ioctl
, unsigned long arg
)
3172 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3173 void __user
*argp
= (void __user
*)arg
;
3176 struct kvm_lapic_state
*lapic
;
3177 struct kvm_xsave
*xsave
;
3178 struct kvm_xcrs
*xcrs
;
3184 case KVM_GET_LAPIC
: {
3186 if (!vcpu
->arch
.apic
)
3188 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3193 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3197 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3202 case KVM_SET_LAPIC
: {
3204 if (!vcpu
->arch
.apic
)
3206 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3207 if (IS_ERR(u
.lapic
))
3208 return PTR_ERR(u
.lapic
);
3210 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3213 case KVM_INTERRUPT
: {
3214 struct kvm_interrupt irq
;
3217 if (copy_from_user(&irq
, argp
, sizeof irq
))
3219 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3223 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3226 case KVM_SET_CPUID
: {
3227 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3228 struct kvm_cpuid cpuid
;
3231 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3233 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3236 case KVM_SET_CPUID2
: {
3237 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3238 struct kvm_cpuid2 cpuid
;
3241 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3243 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3244 cpuid_arg
->entries
);
3247 case KVM_GET_CPUID2
: {
3248 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3249 struct kvm_cpuid2 cpuid
;
3252 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3254 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3255 cpuid_arg
->entries
);
3259 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3265 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
3268 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3270 case KVM_TPR_ACCESS_REPORTING
: {
3271 struct kvm_tpr_access_ctl tac
;
3274 if (copy_from_user(&tac
, argp
, sizeof tac
))
3276 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3280 if (copy_to_user(argp
, &tac
, sizeof tac
))
3285 case KVM_SET_VAPIC_ADDR
: {
3286 struct kvm_vapic_addr va
;
3289 if (!irqchip_in_kernel(vcpu
->kvm
))
3292 if (copy_from_user(&va
, argp
, sizeof va
))
3294 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3297 case KVM_X86_SETUP_MCE
: {
3301 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3303 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3306 case KVM_X86_SET_MCE
: {
3307 struct kvm_x86_mce mce
;
3310 if (copy_from_user(&mce
, argp
, sizeof mce
))
3312 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3315 case KVM_GET_VCPU_EVENTS
: {
3316 struct kvm_vcpu_events events
;
3318 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3321 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3326 case KVM_SET_VCPU_EVENTS
: {
3327 struct kvm_vcpu_events events
;
3330 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3333 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3336 case KVM_GET_DEBUGREGS
: {
3337 struct kvm_debugregs dbgregs
;
3339 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3342 if (copy_to_user(argp
, &dbgregs
,
3343 sizeof(struct kvm_debugregs
)))
3348 case KVM_SET_DEBUGREGS
: {
3349 struct kvm_debugregs dbgregs
;
3352 if (copy_from_user(&dbgregs
, argp
,
3353 sizeof(struct kvm_debugregs
)))
3356 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3359 case KVM_GET_XSAVE
: {
3360 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3365 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3368 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3373 case KVM_SET_XSAVE
: {
3374 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3375 if (IS_ERR(u
.xsave
))
3376 return PTR_ERR(u
.xsave
);
3378 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3381 case KVM_GET_XCRS
: {
3382 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3387 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3390 if (copy_to_user(argp
, u
.xcrs
,
3391 sizeof(struct kvm_xcrs
)))
3396 case KVM_SET_XCRS
: {
3397 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3399 return PTR_ERR(u
.xcrs
);
3401 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3404 case KVM_SET_TSC_KHZ
: {
3408 user_tsc_khz
= (u32
)arg
;
3410 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3413 if (user_tsc_khz
== 0)
3414 user_tsc_khz
= tsc_khz
;
3416 kvm_set_tsc_khz(vcpu
, user_tsc_khz
);
3421 case KVM_GET_TSC_KHZ
: {
3422 r
= vcpu
->arch
.virtual_tsc_khz
;
3425 case KVM_KVMCLOCK_CTRL
: {
3426 r
= kvm_set_guest_paused(vcpu
);
3437 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3439 return VM_FAULT_SIGBUS
;
3442 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3446 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3448 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3452 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3455 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3459 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3460 u32 kvm_nr_mmu_pages
)
3462 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3465 mutex_lock(&kvm
->slots_lock
);
3467 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3468 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3470 mutex_unlock(&kvm
->slots_lock
);
3474 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3476 return kvm
->arch
.n_max_mmu_pages
;
3479 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3484 switch (chip
->chip_id
) {
3485 case KVM_IRQCHIP_PIC_MASTER
:
3486 memcpy(&chip
->chip
.pic
,
3487 &pic_irqchip(kvm
)->pics
[0],
3488 sizeof(struct kvm_pic_state
));
3490 case KVM_IRQCHIP_PIC_SLAVE
:
3491 memcpy(&chip
->chip
.pic
,
3492 &pic_irqchip(kvm
)->pics
[1],
3493 sizeof(struct kvm_pic_state
));
3495 case KVM_IRQCHIP_IOAPIC
:
3496 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3505 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3510 switch (chip
->chip_id
) {
3511 case KVM_IRQCHIP_PIC_MASTER
:
3512 spin_lock(&pic_irqchip(kvm
)->lock
);
3513 memcpy(&pic_irqchip(kvm
)->pics
[0],
3515 sizeof(struct kvm_pic_state
));
3516 spin_unlock(&pic_irqchip(kvm
)->lock
);
3518 case KVM_IRQCHIP_PIC_SLAVE
:
3519 spin_lock(&pic_irqchip(kvm
)->lock
);
3520 memcpy(&pic_irqchip(kvm
)->pics
[1],
3522 sizeof(struct kvm_pic_state
));
3523 spin_unlock(&pic_irqchip(kvm
)->lock
);
3525 case KVM_IRQCHIP_IOAPIC
:
3526 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3532 kvm_pic_update_irq(pic_irqchip(kvm
));
3536 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3540 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3541 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3542 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3546 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3550 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3551 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3552 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3553 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3557 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3561 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3562 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3563 sizeof(ps
->channels
));
3564 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3565 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3566 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3570 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3572 int r
= 0, start
= 0;
3573 u32 prev_legacy
, cur_legacy
;
3574 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3575 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3576 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3577 if (!prev_legacy
&& cur_legacy
)
3579 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3580 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3581 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3582 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3583 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3587 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3588 struct kvm_reinject_control
*control
)
3590 if (!kvm
->arch
.vpit
)
3592 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3593 kvm
->arch
.vpit
->pit_state
.reinject
= control
->pit_reinject
;
3594 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3599 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3600 * @kvm: kvm instance
3601 * @log: slot id and address to which we copy the log
3603 * We need to keep it in mind that VCPU threads can write to the bitmap
3604 * concurrently. So, to avoid losing data, we keep the following order for
3607 * 1. Take a snapshot of the bit and clear it if needed.
3608 * 2. Write protect the corresponding page.
3609 * 3. Flush TLB's if needed.
3610 * 4. Copy the snapshot to the userspace.
3612 * Between 2 and 3, the guest may write to the page using the remaining TLB
3613 * entry. This is not a problem because the page will be reported dirty at
3614 * step 4 using the snapshot taken before and step 3 ensures that successive
3615 * writes will be logged for the next call.
3617 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3620 struct kvm_memory_slot
*memslot
;
3622 unsigned long *dirty_bitmap
;
3623 unsigned long *dirty_bitmap_buffer
;
3624 bool is_dirty
= false;
3626 mutex_lock(&kvm
->slots_lock
);
3629 if (log
->slot
>= KVM_USER_MEM_SLOTS
)
3632 memslot
= id_to_memslot(kvm
->memslots
, log
->slot
);
3634 dirty_bitmap
= memslot
->dirty_bitmap
;
3639 n
= kvm_dirty_bitmap_bytes(memslot
);
3641 dirty_bitmap_buffer
= dirty_bitmap
+ n
/ sizeof(long);
3642 memset(dirty_bitmap_buffer
, 0, n
);
3644 spin_lock(&kvm
->mmu_lock
);
3646 for (i
= 0; i
< n
/ sizeof(long); i
++) {
3650 if (!dirty_bitmap
[i
])
3655 mask
= xchg(&dirty_bitmap
[i
], 0);
3656 dirty_bitmap_buffer
[i
] = mask
;
3658 offset
= i
* BITS_PER_LONG
;
3659 kvm_mmu_write_protect_pt_masked(kvm
, memslot
, offset
, mask
);
3662 spin_unlock(&kvm
->mmu_lock
);
3664 /* See the comments in kvm_mmu_slot_remove_write_access(). */
3665 lockdep_assert_held(&kvm
->slots_lock
);
3668 * All the TLBs can be flushed out of mmu lock, see the comments in
3669 * kvm_mmu_slot_remove_write_access().
3672 kvm_flush_remote_tlbs(kvm
);
3675 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap_buffer
, n
))
3680 mutex_unlock(&kvm
->slots_lock
);
3684 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3687 if (!irqchip_in_kernel(kvm
))
3690 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3691 irq_event
->irq
, irq_event
->level
,
3696 long kvm_arch_vm_ioctl(struct file
*filp
,
3697 unsigned int ioctl
, unsigned long arg
)
3699 struct kvm
*kvm
= filp
->private_data
;
3700 void __user
*argp
= (void __user
*)arg
;
3703 * This union makes it completely explicit to gcc-3.x
3704 * that these two variables' stack usage should be
3705 * combined, not added together.
3708 struct kvm_pit_state ps
;
3709 struct kvm_pit_state2 ps2
;
3710 struct kvm_pit_config pit_config
;
3714 case KVM_SET_TSS_ADDR
:
3715 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3717 case KVM_SET_IDENTITY_MAP_ADDR
: {
3721 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3723 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3726 case KVM_SET_NR_MMU_PAGES
:
3727 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3729 case KVM_GET_NR_MMU_PAGES
:
3730 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3732 case KVM_CREATE_IRQCHIP
: {
3733 struct kvm_pic
*vpic
;
3735 mutex_lock(&kvm
->lock
);
3738 goto create_irqchip_unlock
;
3740 if (atomic_read(&kvm
->online_vcpus
))
3741 goto create_irqchip_unlock
;
3743 vpic
= kvm_create_pic(kvm
);
3745 r
= kvm_ioapic_init(kvm
);
3747 mutex_lock(&kvm
->slots_lock
);
3748 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3750 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3752 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3754 mutex_unlock(&kvm
->slots_lock
);
3756 goto create_irqchip_unlock
;
3759 goto create_irqchip_unlock
;
3761 kvm
->arch
.vpic
= vpic
;
3763 r
= kvm_setup_default_irq_routing(kvm
);
3765 mutex_lock(&kvm
->slots_lock
);
3766 mutex_lock(&kvm
->irq_lock
);
3767 kvm_ioapic_destroy(kvm
);
3768 kvm_destroy_pic(kvm
);
3769 mutex_unlock(&kvm
->irq_lock
);
3770 mutex_unlock(&kvm
->slots_lock
);
3772 create_irqchip_unlock
:
3773 mutex_unlock(&kvm
->lock
);
3776 case KVM_CREATE_PIT
:
3777 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3779 case KVM_CREATE_PIT2
:
3781 if (copy_from_user(&u
.pit_config
, argp
,
3782 sizeof(struct kvm_pit_config
)))
3785 mutex_lock(&kvm
->slots_lock
);
3788 goto create_pit_unlock
;
3790 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3794 mutex_unlock(&kvm
->slots_lock
);
3796 case KVM_GET_IRQCHIP
: {
3797 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3798 struct kvm_irqchip
*chip
;
3800 chip
= memdup_user(argp
, sizeof(*chip
));
3807 if (!irqchip_in_kernel(kvm
))
3808 goto get_irqchip_out
;
3809 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3811 goto get_irqchip_out
;
3813 if (copy_to_user(argp
, chip
, sizeof *chip
))
3814 goto get_irqchip_out
;
3820 case KVM_SET_IRQCHIP
: {
3821 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3822 struct kvm_irqchip
*chip
;
3824 chip
= memdup_user(argp
, sizeof(*chip
));
3831 if (!irqchip_in_kernel(kvm
))
3832 goto set_irqchip_out
;
3833 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3835 goto set_irqchip_out
;
3843 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3846 if (!kvm
->arch
.vpit
)
3848 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3852 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3859 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3862 if (!kvm
->arch
.vpit
)
3864 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3867 case KVM_GET_PIT2
: {
3869 if (!kvm
->arch
.vpit
)
3871 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3875 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3880 case KVM_SET_PIT2
: {
3882 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3885 if (!kvm
->arch
.vpit
)
3887 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3890 case KVM_REINJECT_CONTROL
: {
3891 struct kvm_reinject_control control
;
3893 if (copy_from_user(&control
, argp
, sizeof(control
)))
3895 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3898 case KVM_XEN_HVM_CONFIG
: {
3900 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3901 sizeof(struct kvm_xen_hvm_config
)))
3904 if (kvm
->arch
.xen_hvm_config
.flags
)
3909 case KVM_SET_CLOCK
: {
3910 struct kvm_clock_data user_ns
;
3915 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3923 local_irq_disable();
3924 now_ns
= get_kernel_ns();
3925 delta
= user_ns
.clock
- now_ns
;
3927 kvm
->arch
.kvmclock_offset
= delta
;
3928 kvm_gen_update_masterclock(kvm
);
3931 case KVM_GET_CLOCK
: {
3932 struct kvm_clock_data user_ns
;
3935 local_irq_disable();
3936 now_ns
= get_kernel_ns();
3937 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3940 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
3943 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3956 static void kvm_init_msr_list(void)
3961 /* skip the first msrs in the list. KVM-specific */
3962 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3963 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3967 * Even MSRs that are valid in the host may not be exposed
3968 * to the guests in some cases. We could work around this
3969 * in VMX with the generic MSR save/load machinery, but it
3970 * is not really worthwhile since it will really only
3971 * happen with nested virtualization.
3973 switch (msrs_to_save
[i
]) {
3974 case MSR_IA32_BNDCFGS
:
3975 if (!kvm_x86_ops
->mpx_supported())
3983 msrs_to_save
[j
] = msrs_to_save
[i
];
3986 num_msrs_to_save
= j
;
3989 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3997 if (!(vcpu
->arch
.apic
&&
3998 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3999 && kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
4010 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4017 if (!(vcpu
->arch
.apic
&&
4018 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4019 && kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
4021 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4031 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4032 struct kvm_segment
*var
, int seg
)
4034 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4037 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4038 struct kvm_segment
*var
, int seg
)
4040 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4043 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
4046 struct x86_exception exception
;
4048 BUG_ON(!mmu_is_nested(vcpu
));
4050 /* NPT walks are always user-walks */
4051 access
|= PFERR_USER_MASK
;
4052 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, &exception
);
4057 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4058 struct x86_exception
*exception
)
4060 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4061 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4064 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4065 struct x86_exception
*exception
)
4067 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4068 access
|= PFERR_FETCH_MASK
;
4069 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4072 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4073 struct x86_exception
*exception
)
4075 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4076 access
|= PFERR_WRITE_MASK
;
4077 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4080 /* uses this to access any guest's mapped memory without checking CPL */
4081 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4082 struct x86_exception
*exception
)
4084 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4087 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4088 struct kvm_vcpu
*vcpu
, u32 access
,
4089 struct x86_exception
*exception
)
4092 int r
= X86EMUL_CONTINUE
;
4095 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4097 unsigned offset
= addr
& (PAGE_SIZE
-1);
4098 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4101 if (gpa
== UNMAPPED_GVA
)
4102 return X86EMUL_PROPAGATE_FAULT
;
4103 ret
= kvm_read_guest_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
, data
,
4106 r
= X86EMUL_IO_NEEDED
;
4118 /* used for instruction fetching */
4119 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4120 gva_t addr
, void *val
, unsigned int bytes
,
4121 struct x86_exception
*exception
)
4123 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4124 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4128 /* Inline kvm_read_guest_virt_helper for speed. */
4129 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4131 if (unlikely(gpa
== UNMAPPED_GVA
))
4132 return X86EMUL_PROPAGATE_FAULT
;
4134 offset
= addr
& (PAGE_SIZE
-1);
4135 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4136 bytes
= (unsigned)PAGE_SIZE
- offset
;
4137 ret
= kvm_read_guest_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
, val
,
4139 if (unlikely(ret
< 0))
4140 return X86EMUL_IO_NEEDED
;
4142 return X86EMUL_CONTINUE
;
4145 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4146 gva_t addr
, void *val
, unsigned int bytes
,
4147 struct x86_exception
*exception
)
4149 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4150 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4152 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4155 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4157 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4158 gva_t addr
, void *val
, unsigned int bytes
,
4159 struct x86_exception
*exception
)
4161 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4162 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4165 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4166 gva_t addr
, void *val
,
4168 struct x86_exception
*exception
)
4170 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4172 int r
= X86EMUL_CONTINUE
;
4175 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4178 unsigned offset
= addr
& (PAGE_SIZE
-1);
4179 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4182 if (gpa
== UNMAPPED_GVA
)
4183 return X86EMUL_PROPAGATE_FAULT
;
4184 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
4186 r
= X86EMUL_IO_NEEDED
;
4197 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4199 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4200 gpa_t
*gpa
, struct x86_exception
*exception
,
4203 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4204 | (write
? PFERR_WRITE_MASK
: 0);
4206 if (vcpu_match_mmio_gva(vcpu
, gva
)
4207 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4208 vcpu
->arch
.access
, access
)) {
4209 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4210 (gva
& (PAGE_SIZE
- 1));
4211 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4215 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4217 if (*gpa
== UNMAPPED_GVA
)
4220 /* For APIC access vmexit */
4221 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4224 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4225 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4232 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4233 const void *val
, int bytes
)
4237 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4240 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
);
4244 struct read_write_emulator_ops
{
4245 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4247 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4248 void *val
, int bytes
);
4249 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4250 int bytes
, void *val
);
4251 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4252 void *val
, int bytes
);
4256 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4258 if (vcpu
->mmio_read_completed
) {
4259 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4260 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4261 vcpu
->mmio_read_completed
= 0;
4268 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4269 void *val
, int bytes
)
4271 return !kvm_read_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4274 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4275 void *val
, int bytes
)
4277 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4280 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4282 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4283 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4286 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4287 void *val
, int bytes
)
4289 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4290 return X86EMUL_IO_NEEDED
;
4293 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4294 void *val
, int bytes
)
4296 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4298 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4299 return X86EMUL_CONTINUE
;
4302 static const struct read_write_emulator_ops read_emultor
= {
4303 .read_write_prepare
= read_prepare
,
4304 .read_write_emulate
= read_emulate
,
4305 .read_write_mmio
= vcpu_mmio_read
,
4306 .read_write_exit_mmio
= read_exit_mmio
,
4309 static const struct read_write_emulator_ops write_emultor
= {
4310 .read_write_emulate
= write_emulate
,
4311 .read_write_mmio
= write_mmio
,
4312 .read_write_exit_mmio
= write_exit_mmio
,
4316 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4318 struct x86_exception
*exception
,
4319 struct kvm_vcpu
*vcpu
,
4320 const struct read_write_emulator_ops
*ops
)
4324 bool write
= ops
->write
;
4325 struct kvm_mmio_fragment
*frag
;
4327 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4330 return X86EMUL_PROPAGATE_FAULT
;
4332 /* For APIC access vmexit */
4336 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4337 return X86EMUL_CONTINUE
;
4341 * Is this MMIO handled locally?
4343 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4344 if (handled
== bytes
)
4345 return X86EMUL_CONTINUE
;
4351 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4352 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4356 return X86EMUL_CONTINUE
;
4359 int emulator_read_write(struct x86_emulate_ctxt
*ctxt
, unsigned long addr
,
4360 void *val
, unsigned int bytes
,
4361 struct x86_exception
*exception
,
4362 const struct read_write_emulator_ops
*ops
)
4364 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4368 if (ops
->read_write_prepare
&&
4369 ops
->read_write_prepare(vcpu
, val
, bytes
))
4370 return X86EMUL_CONTINUE
;
4372 vcpu
->mmio_nr_fragments
= 0;
4374 /* Crossing a page boundary? */
4375 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4378 now
= -addr
& ~PAGE_MASK
;
4379 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4382 if (rc
!= X86EMUL_CONTINUE
)
4389 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4391 if (rc
!= X86EMUL_CONTINUE
)
4394 if (!vcpu
->mmio_nr_fragments
)
4397 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4399 vcpu
->mmio_needed
= 1;
4400 vcpu
->mmio_cur_fragment
= 0;
4402 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4403 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4404 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4405 vcpu
->run
->mmio
.phys_addr
= gpa
;
4407 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4410 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4414 struct x86_exception
*exception
)
4416 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4417 exception
, &read_emultor
);
4420 int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4424 struct x86_exception
*exception
)
4426 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4427 exception
, &write_emultor
);
4430 #define CMPXCHG_TYPE(t, ptr, old, new) \
4431 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4433 #ifdef CONFIG_X86_64
4434 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4436 # define CMPXCHG64(ptr, old, new) \
4437 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4440 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4445 struct x86_exception
*exception
)
4447 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4453 /* guests cmpxchg8b have to be emulated atomically */
4454 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4457 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4459 if (gpa
== UNMAPPED_GVA
||
4460 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4463 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4466 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4467 if (is_error_page(page
))
4470 kaddr
= kmap_atomic(page
);
4471 kaddr
+= offset_in_page(gpa
);
4474 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4477 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4480 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4483 exchanged
= CMPXCHG64(kaddr
, old
, new);
4488 kunmap_atomic(kaddr
);
4489 kvm_release_page_dirty(page
);
4492 return X86EMUL_CMPXCHG_FAILED
;
4494 mark_page_dirty(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4495 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
);
4497 return X86EMUL_CONTINUE
;
4500 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4502 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4505 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4507 /* TODO: String I/O for in kernel device */
4510 if (vcpu
->arch
.pio
.in
)
4511 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4512 vcpu
->arch
.pio
.size
, pd
);
4514 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
4515 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4520 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4521 unsigned short port
, void *val
,
4522 unsigned int count
, bool in
)
4524 vcpu
->arch
.pio
.port
= port
;
4525 vcpu
->arch
.pio
.in
= in
;
4526 vcpu
->arch
.pio
.count
= count
;
4527 vcpu
->arch
.pio
.size
= size
;
4529 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4530 vcpu
->arch
.pio
.count
= 0;
4534 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4535 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4536 vcpu
->run
->io
.size
= size
;
4537 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4538 vcpu
->run
->io
.count
= count
;
4539 vcpu
->run
->io
.port
= port
;
4544 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4545 int size
, unsigned short port
, void *val
,
4548 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4551 if (vcpu
->arch
.pio
.count
)
4554 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4557 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4558 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4559 vcpu
->arch
.pio
.count
= 0;
4566 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4567 int size
, unsigned short port
,
4568 const void *val
, unsigned int count
)
4570 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4572 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4573 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4574 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4577 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4579 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4582 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4584 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4587 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4589 if (!need_emulate_wbinvd(vcpu
))
4590 return X86EMUL_CONTINUE
;
4592 if (kvm_x86_ops
->has_wbinvd_exit()) {
4593 int cpu
= get_cpu();
4595 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4596 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4597 wbinvd_ipi
, NULL
, 1);
4599 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4602 return X86EMUL_CONTINUE
;
4604 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4606 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4608 kvm_emulate_wbinvd(emul_to_vcpu(ctxt
));
4611 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
4613 return _kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4616 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
4619 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4622 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4624 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4627 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4629 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4630 unsigned long value
;
4634 value
= kvm_read_cr0(vcpu
);
4637 value
= vcpu
->arch
.cr2
;
4640 value
= kvm_read_cr3(vcpu
);
4643 value
= kvm_read_cr4(vcpu
);
4646 value
= kvm_get_cr8(vcpu
);
4649 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4656 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4658 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4663 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4666 vcpu
->arch
.cr2
= val
;
4669 res
= kvm_set_cr3(vcpu
, val
);
4672 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4675 res
= kvm_set_cr8(vcpu
, val
);
4678 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4685 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4687 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4690 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4692 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4695 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4697 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4700 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4702 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4705 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4707 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4710 static unsigned long emulator_get_cached_segment_base(
4711 struct x86_emulate_ctxt
*ctxt
, int seg
)
4713 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4716 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4717 struct desc_struct
*desc
, u32
*base3
,
4720 struct kvm_segment var
;
4722 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4723 *selector
= var
.selector
;
4726 memset(desc
, 0, sizeof(*desc
));
4732 set_desc_limit(desc
, var
.limit
);
4733 set_desc_base(desc
, (unsigned long)var
.base
);
4734 #ifdef CONFIG_X86_64
4736 *base3
= var
.base
>> 32;
4738 desc
->type
= var
.type
;
4740 desc
->dpl
= var
.dpl
;
4741 desc
->p
= var
.present
;
4742 desc
->avl
= var
.avl
;
4750 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4751 struct desc_struct
*desc
, u32 base3
,
4754 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4755 struct kvm_segment var
;
4757 var
.selector
= selector
;
4758 var
.base
= get_desc_base(desc
);
4759 #ifdef CONFIG_X86_64
4760 var
.base
|= ((u64
)base3
) << 32;
4762 var
.limit
= get_desc_limit(desc
);
4764 var
.limit
= (var
.limit
<< 12) | 0xfff;
4765 var
.type
= desc
->type
;
4766 var
.dpl
= desc
->dpl
;
4771 var
.avl
= desc
->avl
;
4772 var
.present
= desc
->p
;
4773 var
.unusable
= !var
.present
;
4776 kvm_set_segment(vcpu
, &var
, seg
);
4780 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4781 u32 msr_index
, u64
*pdata
)
4783 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
4786 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4787 u32 msr_index
, u64 data
)
4789 struct msr_data msr
;
4792 msr
.index
= msr_index
;
4793 msr
.host_initiated
= false;
4794 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
4797 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
4800 return kvm_pmu_check_pmc(emul_to_vcpu(ctxt
), pmc
);
4803 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
4804 u32 pmc
, u64
*pdata
)
4806 return kvm_pmu_read_pmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
4809 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4811 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4814 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4817 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4819 * CR0.TS may reference the host fpu state, not the guest fpu state,
4820 * so it may be clear at this point.
4825 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4830 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4831 struct x86_instruction_info
*info
,
4832 enum x86_intercept_stage stage
)
4834 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
4837 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
4838 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
4840 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
4843 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
4845 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
4848 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
4850 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
4853 static const struct x86_emulate_ops emulate_ops
= {
4854 .read_gpr
= emulator_read_gpr
,
4855 .write_gpr
= emulator_write_gpr
,
4856 .read_std
= kvm_read_guest_virt_system
,
4857 .write_std
= kvm_write_guest_virt_system
,
4858 .fetch
= kvm_fetch_guest_virt
,
4859 .read_emulated
= emulator_read_emulated
,
4860 .write_emulated
= emulator_write_emulated
,
4861 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4862 .invlpg
= emulator_invlpg
,
4863 .pio_in_emulated
= emulator_pio_in_emulated
,
4864 .pio_out_emulated
= emulator_pio_out_emulated
,
4865 .get_segment
= emulator_get_segment
,
4866 .set_segment
= emulator_set_segment
,
4867 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4868 .get_gdt
= emulator_get_gdt
,
4869 .get_idt
= emulator_get_idt
,
4870 .set_gdt
= emulator_set_gdt
,
4871 .set_idt
= emulator_set_idt
,
4872 .get_cr
= emulator_get_cr
,
4873 .set_cr
= emulator_set_cr
,
4874 .cpl
= emulator_get_cpl
,
4875 .get_dr
= emulator_get_dr
,
4876 .set_dr
= emulator_set_dr
,
4877 .set_msr
= emulator_set_msr
,
4878 .get_msr
= emulator_get_msr
,
4879 .check_pmc
= emulator_check_pmc
,
4880 .read_pmc
= emulator_read_pmc
,
4881 .halt
= emulator_halt
,
4882 .wbinvd
= emulator_wbinvd
,
4883 .fix_hypercall
= emulator_fix_hypercall
,
4884 .get_fpu
= emulator_get_fpu
,
4885 .put_fpu
= emulator_put_fpu
,
4886 .intercept
= emulator_intercept
,
4887 .get_cpuid
= emulator_get_cpuid
,
4890 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4892 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
4894 * an sti; sti; sequence only disable interrupts for the first
4895 * instruction. So, if the last instruction, be it emulated or
4896 * not, left the system with the INT_STI flag enabled, it
4897 * means that the last instruction is an sti. We should not
4898 * leave the flag on in this case. The same goes for mov ss
4900 if (int_shadow
& mask
)
4902 if (unlikely(int_shadow
|| mask
)) {
4903 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4905 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4909 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4911 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4912 if (ctxt
->exception
.vector
== PF_VECTOR
)
4913 kvm_propagate_fault(vcpu
, &ctxt
->exception
);
4914 else if (ctxt
->exception
.error_code_valid
)
4915 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
4916 ctxt
->exception
.error_code
);
4918 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
4921 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4923 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4926 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4928 ctxt
->eflags
= kvm_get_rflags(vcpu
);
4929 ctxt
->eip
= kvm_rip_read(vcpu
);
4930 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4931 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
4932 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
4933 cs_db
? X86EMUL_MODE_PROT32
:
4934 X86EMUL_MODE_PROT16
;
4935 ctxt
->guest_mode
= is_guest_mode(vcpu
);
4937 init_decode_cache(ctxt
);
4938 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4941 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
4943 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4946 init_emulate_ctxt(vcpu
);
4950 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
4951 ret
= emulate_int_real(ctxt
, irq
);
4953 if (ret
!= X86EMUL_CONTINUE
)
4954 return EMULATE_FAIL
;
4956 ctxt
->eip
= ctxt
->_eip
;
4957 kvm_rip_write(vcpu
, ctxt
->eip
);
4958 kvm_set_rflags(vcpu
, ctxt
->eflags
);
4960 if (irq
== NMI_VECTOR
)
4961 vcpu
->arch
.nmi_pending
= 0;
4963 vcpu
->arch
.interrupt
.pending
= false;
4965 return EMULATE_DONE
;
4967 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4969 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4971 int r
= EMULATE_DONE
;
4973 ++vcpu
->stat
.insn_emulation_fail
;
4974 trace_kvm_emulate_insn_failed(vcpu
);
4975 if (!is_guest_mode(vcpu
)) {
4976 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4977 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4978 vcpu
->run
->internal
.ndata
= 0;
4981 kvm_queue_exception(vcpu
, UD_VECTOR
);
4986 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
4987 bool write_fault_to_shadow_pgtable
,
4993 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
4996 if (!vcpu
->arch
.mmu
.direct_map
) {
4998 * Write permission should be allowed since only
4999 * write access need to be emulated.
5001 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5004 * If the mapping is invalid in guest, let cpu retry
5005 * it to generate fault.
5007 if (gpa
== UNMAPPED_GVA
)
5012 * Do not retry the unhandleable instruction if it faults on the
5013 * readonly host memory, otherwise it will goto a infinite loop:
5014 * retry instruction -> write #PF -> emulation fail -> retry
5015 * instruction -> ...
5017 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5020 * If the instruction failed on the error pfn, it can not be fixed,
5021 * report the error to userspace.
5023 if (is_error_noslot_pfn(pfn
))
5026 kvm_release_pfn_clean(pfn
);
5028 /* The instructions are well-emulated on direct mmu. */
5029 if (vcpu
->arch
.mmu
.direct_map
) {
5030 unsigned int indirect_shadow_pages
;
5032 spin_lock(&vcpu
->kvm
->mmu_lock
);
5033 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5034 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5036 if (indirect_shadow_pages
)
5037 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5043 * if emulation was due to access to shadowed page table
5044 * and it failed try to unshadow page and re-enter the
5045 * guest to let CPU execute the instruction.
5047 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5050 * If the access faults on its page table, it can not
5051 * be fixed by unprotecting shadow page and it should
5052 * be reported to userspace.
5054 return !write_fault_to_shadow_pgtable
;
5057 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5058 unsigned long cr2
, int emulation_type
)
5060 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5061 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5063 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5064 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5067 * If the emulation is caused by #PF and it is non-page_table
5068 * writing instruction, it means the VM-EXIT is caused by shadow
5069 * page protected, we can zap the shadow page and retry this
5070 * instruction directly.
5072 * Note: if the guest uses a non-page-table modifying instruction
5073 * on the PDE that points to the instruction, then we will unmap
5074 * the instruction and go to an infinite loop. So, we cache the
5075 * last retried eip and the last fault address, if we meet the eip
5076 * and the address again, we can break out of the potential infinite
5079 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5081 if (!(emulation_type
& EMULTYPE_RETRY
))
5084 if (x86_page_table_writing_insn(ctxt
))
5087 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5090 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5091 vcpu
->arch
.last_retry_addr
= cr2
;
5093 if (!vcpu
->arch
.mmu
.direct_map
)
5094 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5096 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5101 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5102 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5104 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5113 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5114 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5119 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, unsigned long rflags
, int *r
)
5121 struct kvm_run
*kvm_run
= vcpu
->run
;
5124 * rflags is the old, "raw" value of the flags. The new value has
5125 * not been saved yet.
5127 * This is correct even for TF set by the guest, because "the
5128 * processor will not generate this exception after the instruction
5129 * that sets the TF flag".
5131 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5132 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5133 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
|
5135 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5136 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5137 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5138 *r
= EMULATE_USER_EXIT
;
5140 vcpu
->arch
.emulate_ctxt
.eflags
&= ~X86_EFLAGS_TF
;
5142 * "Certain debug exceptions may clear bit 0-3. The
5143 * remaining contents of the DR6 register are never
5144 * cleared by the processor".
5146 vcpu
->arch
.dr6
&= ~15;
5147 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5148 kvm_queue_exception(vcpu
, DB_VECTOR
);
5153 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5155 struct kvm_run
*kvm_run
= vcpu
->run
;
5156 unsigned long eip
= vcpu
->arch
.emulate_ctxt
.eip
;
5159 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5160 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5161 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5162 vcpu
->arch
.guest_debug_dr7
,
5166 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5167 kvm_run
->debug
.arch
.pc
= kvm_rip_read(vcpu
) +
5168 get_segment_base(vcpu
, VCPU_SREG_CS
);
5170 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5171 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5172 *r
= EMULATE_USER_EXIT
;
5177 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5178 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5179 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5184 vcpu
->arch
.dr6
&= ~15;
5185 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5186 kvm_queue_exception(vcpu
, DB_VECTOR
);
5195 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5202 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5203 bool writeback
= true;
5204 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5207 * Clear write_fault_to_shadow_pgtable here to ensure it is
5210 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5211 kvm_clear_exception_queue(vcpu
);
5213 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5214 init_emulate_ctxt(vcpu
);
5217 * We will reenter on the same instruction since
5218 * we do not set complete_userspace_io. This does not
5219 * handle watchpoints yet, those would be handled in
5222 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5225 ctxt
->interruptibility
= 0;
5226 ctxt
->have_exception
= false;
5227 ctxt
->perm_ok
= false;
5229 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5231 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5233 trace_kvm_emulate_insn_start(vcpu
);
5234 ++vcpu
->stat
.insn_emulation
;
5235 if (r
!= EMULATION_OK
) {
5236 if (emulation_type
& EMULTYPE_TRAP_UD
)
5237 return EMULATE_FAIL
;
5238 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5240 return EMULATE_DONE
;
5241 if (emulation_type
& EMULTYPE_SKIP
)
5242 return EMULATE_FAIL
;
5243 return handle_emulation_failure(vcpu
);
5247 if (emulation_type
& EMULTYPE_SKIP
) {
5248 kvm_rip_write(vcpu
, ctxt
->_eip
);
5249 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5250 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5251 return EMULATE_DONE
;
5254 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5255 return EMULATE_DONE
;
5257 /* this is needed for vmware backdoor interface to work since it
5258 changes registers values during IO operation */
5259 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5260 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5261 emulator_invalidate_register_cache(ctxt
);
5265 r
= x86_emulate_insn(ctxt
);
5267 if (r
== EMULATION_INTERCEPTED
)
5268 return EMULATE_DONE
;
5270 if (r
== EMULATION_FAILED
) {
5271 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5273 return EMULATE_DONE
;
5275 return handle_emulation_failure(vcpu
);
5278 if (ctxt
->have_exception
) {
5279 inject_emulated_exception(vcpu
);
5281 } else if (vcpu
->arch
.pio
.count
) {
5282 if (!vcpu
->arch
.pio
.in
) {
5283 /* FIXME: return into emulator if single-stepping. */
5284 vcpu
->arch
.pio
.count
= 0;
5287 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5289 r
= EMULATE_USER_EXIT
;
5290 } else if (vcpu
->mmio_needed
) {
5291 if (!vcpu
->mmio_is_write
)
5293 r
= EMULATE_USER_EXIT
;
5294 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5295 } else if (r
== EMULATION_RESTART
)
5301 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5302 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5303 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5304 kvm_rip_write(vcpu
, ctxt
->eip
);
5305 if (r
== EMULATE_DONE
)
5306 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5307 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5310 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5311 * do nothing, and it will be requested again as soon as
5312 * the shadow expires. But we still need to check here,
5313 * because POPF has no interrupt shadow.
5315 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5316 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5318 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5322 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5324 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5326 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5327 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5328 size
, port
, &val
, 1);
5329 /* do not return to emulator after return from userspace */
5330 vcpu
->arch
.pio
.count
= 0;
5333 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5335 static void tsc_bad(void *info
)
5337 __this_cpu_write(cpu_tsc_khz
, 0);
5340 static void tsc_khz_changed(void *data
)
5342 struct cpufreq_freqs
*freq
= data
;
5343 unsigned long khz
= 0;
5347 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5348 khz
= cpufreq_quick_get(raw_smp_processor_id());
5351 __this_cpu_write(cpu_tsc_khz
, khz
);
5354 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5357 struct cpufreq_freqs
*freq
= data
;
5359 struct kvm_vcpu
*vcpu
;
5360 int i
, send_ipi
= 0;
5363 * We allow guests to temporarily run on slowing clocks,
5364 * provided we notify them after, or to run on accelerating
5365 * clocks, provided we notify them before. Thus time never
5368 * However, we have a problem. We can't atomically update
5369 * the frequency of a given CPU from this function; it is
5370 * merely a notifier, which can be called from any CPU.
5371 * Changing the TSC frequency at arbitrary points in time
5372 * requires a recomputation of local variables related to
5373 * the TSC for each VCPU. We must flag these local variables
5374 * to be updated and be sure the update takes place with the
5375 * new frequency before any guests proceed.
5377 * Unfortunately, the combination of hotplug CPU and frequency
5378 * change creates an intractable locking scenario; the order
5379 * of when these callouts happen is undefined with respect to
5380 * CPU hotplug, and they can race with each other. As such,
5381 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5382 * undefined; you can actually have a CPU frequency change take
5383 * place in between the computation of X and the setting of the
5384 * variable. To protect against this problem, all updates of
5385 * the per_cpu tsc_khz variable are done in an interrupt
5386 * protected IPI, and all callers wishing to update the value
5387 * must wait for a synchronous IPI to complete (which is trivial
5388 * if the caller is on the CPU already). This establishes the
5389 * necessary total order on variable updates.
5391 * Note that because a guest time update may take place
5392 * anytime after the setting of the VCPU's request bit, the
5393 * correct TSC value must be set before the request. However,
5394 * to ensure the update actually makes it to any guest which
5395 * starts running in hardware virtualization between the set
5396 * and the acquisition of the spinlock, we must also ping the
5397 * CPU after setting the request bit.
5401 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5403 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5406 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5408 spin_lock(&kvm_lock
);
5409 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5410 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5411 if (vcpu
->cpu
!= freq
->cpu
)
5413 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5414 if (vcpu
->cpu
!= smp_processor_id())
5418 spin_unlock(&kvm_lock
);
5420 if (freq
->old
< freq
->new && send_ipi
) {
5422 * We upscale the frequency. Must make the guest
5423 * doesn't see old kvmclock values while running with
5424 * the new frequency, otherwise we risk the guest sees
5425 * time go backwards.
5427 * In case we update the frequency for another cpu
5428 * (which might be in guest context) send an interrupt
5429 * to kick the cpu out of guest context. Next time
5430 * guest context is entered kvmclock will be updated,
5431 * so the guest will not see stale values.
5433 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5438 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5439 .notifier_call
= kvmclock_cpufreq_notifier
5442 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
5443 unsigned long action
, void *hcpu
)
5445 unsigned int cpu
= (unsigned long)hcpu
;
5449 case CPU_DOWN_FAILED
:
5450 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5452 case CPU_DOWN_PREPARE
:
5453 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
5459 static struct notifier_block kvmclock_cpu_notifier_block
= {
5460 .notifier_call
= kvmclock_cpu_notifier
,
5461 .priority
= -INT_MAX
5464 static void kvm_timer_init(void)
5468 max_tsc_khz
= tsc_khz
;
5470 cpu_notifier_register_begin();
5471 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5472 #ifdef CONFIG_CPU_FREQ
5473 struct cpufreq_policy policy
;
5474 memset(&policy
, 0, sizeof(policy
));
5476 cpufreq_get_policy(&policy
, cpu
);
5477 if (policy
.cpuinfo
.max_freq
)
5478 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5481 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5482 CPUFREQ_TRANSITION_NOTIFIER
);
5484 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5485 for_each_online_cpu(cpu
)
5486 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5488 __register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5489 cpu_notifier_register_done();
5493 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5495 int kvm_is_in_guest(void)
5497 return __this_cpu_read(current_vcpu
) != NULL
;
5500 static int kvm_is_user_mode(void)
5504 if (__this_cpu_read(current_vcpu
))
5505 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5507 return user_mode
!= 0;
5510 static unsigned long kvm_get_guest_ip(void)
5512 unsigned long ip
= 0;
5514 if (__this_cpu_read(current_vcpu
))
5515 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5520 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5521 .is_in_guest
= kvm_is_in_guest
,
5522 .is_user_mode
= kvm_is_user_mode
,
5523 .get_guest_ip
= kvm_get_guest_ip
,
5526 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5528 __this_cpu_write(current_vcpu
, vcpu
);
5530 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5532 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5534 __this_cpu_write(current_vcpu
, NULL
);
5536 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5538 static void kvm_set_mmio_spte_mask(void)
5541 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5544 * Set the reserved bits and the present bit of an paging-structure
5545 * entry to generate page fault with PFER.RSV = 1.
5547 /* Mask the reserved physical address bits. */
5548 mask
= ((1ull << (51 - maxphyaddr
+ 1)) - 1) << maxphyaddr
;
5550 /* Bit 62 is always reserved for 32bit host. */
5551 mask
|= 0x3ull
<< 62;
5553 /* Set the present bit. */
5556 #ifdef CONFIG_X86_64
5558 * If reserved bit is not supported, clear the present bit to disable
5561 if (maxphyaddr
== 52)
5565 kvm_mmu_set_mmio_spte_mask(mask
);
5568 #ifdef CONFIG_X86_64
5569 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5573 struct kvm_vcpu
*vcpu
;
5576 spin_lock(&kvm_lock
);
5577 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5578 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5579 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
, &vcpu
->requests
);
5580 atomic_set(&kvm_guest_has_master_clock
, 0);
5581 spin_unlock(&kvm_lock
);
5584 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5587 * Notification about pvclock gtod data update.
5589 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5592 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5593 struct timekeeper
*tk
= priv
;
5595 update_pvclock_gtod(tk
);
5597 /* disable master clock if host does not trust, or does not
5598 * use, TSC clocksource
5600 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5601 atomic_read(&kvm_guest_has_master_clock
) != 0)
5602 queue_work(system_long_wq
, &pvclock_gtod_work
);
5607 static struct notifier_block pvclock_gtod_notifier
= {
5608 .notifier_call
= pvclock_gtod_notify
,
5612 int kvm_arch_init(void *opaque
)
5615 struct kvm_x86_ops
*ops
= opaque
;
5618 printk(KERN_ERR
"kvm: already loaded the other module\n");
5623 if (!ops
->cpu_has_kvm_support()) {
5624 printk(KERN_ERR
"kvm: no hardware support\n");
5628 if (ops
->disabled_by_bios()) {
5629 printk(KERN_ERR
"kvm: disabled by bios\n");
5635 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
5637 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
5641 r
= kvm_mmu_module_init();
5643 goto out_free_percpu
;
5645 kvm_set_mmio_spte_mask();
5648 kvm_init_msr_list();
5650 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
5651 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
5655 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
5658 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
5661 #ifdef CONFIG_X86_64
5662 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
5668 free_percpu(shared_msrs
);
5673 void kvm_arch_exit(void)
5675 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
5677 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5678 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
5679 CPUFREQ_TRANSITION_NOTIFIER
);
5680 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5681 #ifdef CONFIG_X86_64
5682 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
5685 kvm_mmu_module_exit();
5686 free_percpu(shared_msrs
);
5689 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
5691 ++vcpu
->stat
.halt_exits
;
5692 if (irqchip_in_kernel(vcpu
->kvm
)) {
5693 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
5696 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
5700 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
5702 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
5704 u64 param
, ingpa
, outgpa
, ret
;
5705 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
5706 bool fast
, longmode
;
5709 * hypercall generates UD from non zero cpl and real mode
5712 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
5713 kvm_queue_exception(vcpu
, UD_VECTOR
);
5717 longmode
= is_64_bit_mode(vcpu
);
5720 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
5721 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
5722 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
5723 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
5724 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
5725 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
5727 #ifdef CONFIG_X86_64
5729 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5730 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5731 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5735 code
= param
& 0xffff;
5736 fast
= (param
>> 16) & 0x1;
5737 rep_cnt
= (param
>> 32) & 0xfff;
5738 rep_idx
= (param
>> 48) & 0xfff;
5740 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
5743 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
5744 kvm_vcpu_on_spin(vcpu
);
5747 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
5751 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
5753 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5755 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
5756 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
5763 * kvm_pv_kick_cpu_op: Kick a vcpu.
5765 * @apicid - apicid of vcpu to be kicked.
5767 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
5769 struct kvm_lapic_irq lapic_irq
;
5771 lapic_irq
.shorthand
= 0;
5772 lapic_irq
.dest_mode
= 0;
5773 lapic_irq
.dest_id
= apicid
;
5775 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
5776 kvm_irq_delivery_to_apic(kvm
, 0, &lapic_irq
, NULL
);
5779 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5781 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5782 int op_64_bit
, r
= 1;
5784 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5785 return kvm_hv_hypercall(vcpu
);
5787 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5788 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5789 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5790 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5791 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5793 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5795 op_64_bit
= is_64_bit_mode(vcpu
);
5804 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5810 case KVM_HC_VAPIC_POLL_IRQ
:
5813 case KVM_HC_KICK_CPU
:
5814 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
5824 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5825 ++vcpu
->stat
.hypercalls
;
5828 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
5830 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
5832 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5833 char instruction
[3];
5834 unsigned long rip
= kvm_rip_read(vcpu
);
5836 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
5838 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
5842 * Check if userspace requested an interrupt window, and that the
5843 * interrupt window is open.
5845 * No need to exit to userspace if we already have an interrupt queued.
5847 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5849 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
5850 vcpu
->run
->request_interrupt_window
&&
5851 kvm_arch_interrupt_allowed(vcpu
));
5854 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5856 struct kvm_run
*kvm_run
= vcpu
->run
;
5858 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5859 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
5860 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
5861 if (irqchip_in_kernel(vcpu
->kvm
))
5862 kvm_run
->ready_for_interrupt_injection
= 1;
5864 kvm_run
->ready_for_interrupt_injection
=
5865 kvm_arch_interrupt_allowed(vcpu
) &&
5866 !kvm_cpu_has_interrupt(vcpu
) &&
5867 !kvm_event_needs_reinjection(vcpu
);
5870 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5874 if (!kvm_x86_ops
->update_cr8_intercept
)
5877 if (!vcpu
->arch
.apic
)
5880 if (!vcpu
->arch
.apic
->vapic_addr
)
5881 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5888 tpr
= kvm_lapic_get_cr8(vcpu
);
5890 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5893 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
5897 /* try to reinject previous events if any */
5898 if (vcpu
->arch
.exception
.pending
) {
5899 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5900 vcpu
->arch
.exception
.has_error_code
,
5901 vcpu
->arch
.exception
.error_code
);
5903 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
5904 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
5907 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5908 vcpu
->arch
.exception
.has_error_code
,
5909 vcpu
->arch
.exception
.error_code
,
5910 vcpu
->arch
.exception
.reinject
);
5914 if (vcpu
->arch
.nmi_injected
) {
5915 kvm_x86_ops
->set_nmi(vcpu
);
5919 if (vcpu
->arch
.interrupt
.pending
) {
5920 kvm_x86_ops
->set_irq(vcpu
);
5924 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
5925 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
5930 /* try to inject new event if pending */
5931 if (vcpu
->arch
.nmi_pending
) {
5932 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5933 --vcpu
->arch
.nmi_pending
;
5934 vcpu
->arch
.nmi_injected
= true;
5935 kvm_x86_ops
->set_nmi(vcpu
);
5937 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
5939 * Because interrupts can be injected asynchronously, we are
5940 * calling check_nested_events again here to avoid a race condition.
5941 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
5942 * proposal and current concerns. Perhaps we should be setting
5943 * KVM_REQ_EVENT only on certain events and not unconditionally?
5945 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
5946 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
5950 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5951 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5953 kvm_x86_ops
->set_irq(vcpu
);
5959 static void process_nmi(struct kvm_vcpu
*vcpu
)
5964 * x86 is limited to one NMI running, and one NMI pending after it.
5965 * If an NMI is already in progress, limit further NMIs to just one.
5966 * Otherwise, allow two (and we'll inject the first one immediately).
5968 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
5971 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
5972 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
5973 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5976 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
5978 u64 eoi_exit_bitmap
[4];
5981 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
5984 memset(eoi_exit_bitmap
, 0, 32);
5987 kvm_ioapic_scan_entry(vcpu
, eoi_exit_bitmap
, tmr
);
5988 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
5989 kvm_apic_update_tmr(vcpu
, tmr
);
5993 * Returns 1 to let __vcpu_run() continue the guest execution loop without
5994 * exiting to the userspace. Otherwise, the value will be returned to the
5997 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6000 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
6001 vcpu
->run
->request_interrupt_window
;
6002 bool req_immediate_exit
= false;
6004 if (vcpu
->requests
) {
6005 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6006 kvm_mmu_unload(vcpu
);
6007 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6008 __kvm_migrate_timers(vcpu
);
6009 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6010 kvm_gen_update_masterclock(vcpu
->kvm
);
6011 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6012 kvm_gen_kvmclock_update(vcpu
);
6013 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6014 r
= kvm_guest_time_update(vcpu
);
6018 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6019 kvm_mmu_sync_roots(vcpu
);
6020 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6021 kvm_x86_ops
->tlb_flush(vcpu
);
6022 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6023 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6027 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6028 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6032 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
6033 vcpu
->fpu_active
= 0;
6034 kvm_x86_ops
->fpu_deactivate(vcpu
);
6036 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6037 /* Page is swapped out. Do synthetic halt */
6038 vcpu
->arch
.apf
.halted
= true;
6042 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6043 record_steal_time(vcpu
);
6044 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6046 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6047 kvm_handle_pmu_event(vcpu
);
6048 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6049 kvm_deliver_pmi(vcpu
);
6050 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6051 vcpu_scan_ioapic(vcpu
);
6054 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6055 kvm_apic_accept_events(vcpu
);
6056 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6061 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6062 req_immediate_exit
= true;
6063 /* enable NMI/IRQ window open exits if needed */
6064 else if (vcpu
->arch
.nmi_pending
)
6065 kvm_x86_ops
->enable_nmi_window(vcpu
);
6066 else if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6067 kvm_x86_ops
->enable_irq_window(vcpu
);
6069 if (kvm_lapic_enabled(vcpu
)) {
6071 * Update architecture specific hints for APIC
6072 * virtual interrupt delivery.
6074 if (kvm_x86_ops
->hwapic_irr_update
)
6075 kvm_x86_ops
->hwapic_irr_update(vcpu
,
6076 kvm_lapic_find_highest_irr(vcpu
));
6077 update_cr8_intercept(vcpu
);
6078 kvm_lapic_sync_to_vapic(vcpu
);
6082 r
= kvm_mmu_reload(vcpu
);
6084 goto cancel_injection
;
6089 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6090 if (vcpu
->fpu_active
)
6091 kvm_load_guest_fpu(vcpu
);
6092 kvm_load_guest_xcr0(vcpu
);
6094 vcpu
->mode
= IN_GUEST_MODE
;
6096 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6098 /* We should set ->mode before check ->requests,
6099 * see the comment in make_all_cpus_request.
6101 smp_mb__after_srcu_read_unlock();
6103 local_irq_disable();
6105 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
6106 || need_resched() || signal_pending(current
)) {
6107 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6111 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6113 goto cancel_injection
;
6116 if (req_immediate_exit
)
6117 smp_send_reschedule(vcpu
->cpu
);
6121 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6123 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6124 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6125 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6126 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6127 set_debugreg(vcpu
->arch
.dr6
, 6);
6130 trace_kvm_entry(vcpu
->vcpu_id
);
6131 kvm_x86_ops
->run(vcpu
);
6134 * Do this here before restoring debug registers on the host. And
6135 * since we do this before handling the vmexit, a DR access vmexit
6136 * can (a) read the correct value of the debug registers, (b) set
6137 * KVM_DEBUGREG_WONT_EXIT again.
6139 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6142 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6143 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6144 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6145 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6149 * If the guest has used debug registers, at least dr7
6150 * will be disabled while returning to the host.
6151 * If we don't have active breakpoints in the host, we don't
6152 * care about the messed up debug address registers. But if
6153 * we have some of them active, restore the old state.
6155 if (hw_breakpoint_active())
6156 hw_breakpoint_restore();
6158 vcpu
->arch
.last_guest_tsc
= kvm_x86_ops
->read_l1_tsc(vcpu
,
6161 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6164 /* Interrupt is enabled by handle_external_intr() */
6165 kvm_x86_ops
->handle_external_intr(vcpu
);
6170 * We must have an instruction between local_irq_enable() and
6171 * kvm_guest_exit(), so the timer interrupt isn't delayed by
6172 * the interrupt shadow. The stat.exits increment will do nicely.
6173 * But we need to prevent reordering, hence this barrier():
6181 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6184 * Profile KVM exit RIPs:
6186 if (unlikely(prof_on
== KVM_PROFILING
)) {
6187 unsigned long rip
= kvm_rip_read(vcpu
);
6188 profile_hit(KVM_PROFILING
, (void *)rip
);
6191 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6192 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6194 if (vcpu
->arch
.apic_attention
)
6195 kvm_lapic_sync_from_vapic(vcpu
);
6197 r
= kvm_x86_ops
->handle_exit(vcpu
);
6201 kvm_x86_ops
->cancel_injection(vcpu
);
6202 if (unlikely(vcpu
->arch
.apic_attention
))
6203 kvm_lapic_sync_from_vapic(vcpu
);
6209 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
6212 struct kvm
*kvm
= vcpu
->kvm
;
6214 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6218 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6219 !vcpu
->arch
.apf
.halted
)
6220 r
= vcpu_enter_guest(vcpu
);
6222 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6223 kvm_vcpu_block(vcpu
);
6224 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6225 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
)) {
6226 kvm_apic_accept_events(vcpu
);
6227 switch(vcpu
->arch
.mp_state
) {
6228 case KVM_MP_STATE_HALTED
:
6229 vcpu
->arch
.pv
.pv_unhalted
= false;
6230 vcpu
->arch
.mp_state
=
6231 KVM_MP_STATE_RUNNABLE
;
6232 case KVM_MP_STATE_RUNNABLE
:
6233 vcpu
->arch
.apf
.halted
= false;
6235 case KVM_MP_STATE_INIT_RECEIVED
:
6247 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
6248 if (kvm_cpu_has_pending_timer(vcpu
))
6249 kvm_inject_pending_timer_irqs(vcpu
);
6251 if (dm_request_for_irq_injection(vcpu
)) {
6253 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6254 ++vcpu
->stat
.request_irq_exits
;
6257 kvm_check_async_pf_completion(vcpu
);
6259 if (signal_pending(current
)) {
6261 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6262 ++vcpu
->stat
.signal_exits
;
6264 if (need_resched()) {
6265 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6267 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6271 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6276 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
6279 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6280 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
6281 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6282 if (r
!= EMULATE_DONE
)
6287 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
6289 BUG_ON(!vcpu
->arch
.pio
.count
);
6291 return complete_emulated_io(vcpu
);
6295 * Implements the following, as a state machine:
6299 * for each mmio piece in the fragment
6307 * for each mmio piece in the fragment
6312 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
6314 struct kvm_run
*run
= vcpu
->run
;
6315 struct kvm_mmio_fragment
*frag
;
6318 BUG_ON(!vcpu
->mmio_needed
);
6320 /* Complete previous fragment */
6321 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
6322 len
= min(8u, frag
->len
);
6323 if (!vcpu
->mmio_is_write
)
6324 memcpy(frag
->data
, run
->mmio
.data
, len
);
6326 if (frag
->len
<= 8) {
6327 /* Switch to the next fragment. */
6329 vcpu
->mmio_cur_fragment
++;
6331 /* Go forward to the next mmio piece. */
6337 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
6338 vcpu
->mmio_needed
= 0;
6340 /* FIXME: return into emulator if single-stepping. */
6341 if (vcpu
->mmio_is_write
)
6343 vcpu
->mmio_read_completed
= 1;
6344 return complete_emulated_io(vcpu
);
6347 run
->exit_reason
= KVM_EXIT_MMIO
;
6348 run
->mmio
.phys_addr
= frag
->gpa
;
6349 if (vcpu
->mmio_is_write
)
6350 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6351 run
->mmio
.len
= min(8u, frag
->len
);
6352 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
6353 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6358 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
6363 if (!tsk_used_math(current
) && init_fpu(current
))
6366 if (vcpu
->sigset_active
)
6367 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
6369 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
6370 kvm_vcpu_block(vcpu
);
6371 kvm_apic_accept_events(vcpu
);
6372 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
6377 /* re-sync apic's tpr */
6378 if (!irqchip_in_kernel(vcpu
->kvm
)) {
6379 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
6385 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
6386 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
6387 vcpu
->arch
.complete_userspace_io
= NULL
;
6392 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
6394 r
= __vcpu_run(vcpu
);
6397 post_kvm_run_save(vcpu
);
6398 if (vcpu
->sigset_active
)
6399 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
6404 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6406 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
6408 * We are here if userspace calls get_regs() in the middle of
6409 * instruction emulation. Registers state needs to be copied
6410 * back from emulation context to vcpu. Userspace shouldn't do
6411 * that usually, but some bad designed PV devices (vmware
6412 * backdoor interface) need this to work
6414 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
6415 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6417 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6418 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6419 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6420 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6421 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6422 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
6423 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
6424 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
6425 #ifdef CONFIG_X86_64
6426 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
6427 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
6428 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
6429 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
6430 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
6431 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
6432 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
6433 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
6436 regs
->rip
= kvm_rip_read(vcpu
);
6437 regs
->rflags
= kvm_get_rflags(vcpu
);
6442 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6444 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
6445 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6447 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
6448 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
6449 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
6450 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
6451 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
6452 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
6453 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
6454 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
6455 #ifdef CONFIG_X86_64
6456 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
6457 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
6458 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
6459 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
6460 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
6461 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
6462 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
6463 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
6466 kvm_rip_write(vcpu
, regs
->rip
);
6467 kvm_set_rflags(vcpu
, regs
->rflags
);
6469 vcpu
->arch
.exception
.pending
= false;
6471 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6476 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
6478 struct kvm_segment cs
;
6480 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6484 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
6486 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
6487 struct kvm_sregs
*sregs
)
6491 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6492 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6493 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6494 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6495 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6496 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6498 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6499 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6501 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6502 sregs
->idt
.limit
= dt
.size
;
6503 sregs
->idt
.base
= dt
.address
;
6504 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6505 sregs
->gdt
.limit
= dt
.size
;
6506 sregs
->gdt
.base
= dt
.address
;
6508 sregs
->cr0
= kvm_read_cr0(vcpu
);
6509 sregs
->cr2
= vcpu
->arch
.cr2
;
6510 sregs
->cr3
= kvm_read_cr3(vcpu
);
6511 sregs
->cr4
= kvm_read_cr4(vcpu
);
6512 sregs
->cr8
= kvm_get_cr8(vcpu
);
6513 sregs
->efer
= vcpu
->arch
.efer
;
6514 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
6516 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
6518 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
6519 set_bit(vcpu
->arch
.interrupt
.nr
,
6520 (unsigned long *)sregs
->interrupt_bitmap
);
6525 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
6526 struct kvm_mp_state
*mp_state
)
6528 kvm_apic_accept_events(vcpu
);
6529 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
6530 vcpu
->arch
.pv
.pv_unhalted
)
6531 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
6533 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
6538 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
6539 struct kvm_mp_state
*mp_state
)
6541 if (!kvm_vcpu_has_lapic(vcpu
) &&
6542 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
6545 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
6546 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
6547 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
6549 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
6550 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6554 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
6555 int reason
, bool has_error_code
, u32 error_code
)
6557 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
6560 init_emulate_ctxt(vcpu
);
6562 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
6563 has_error_code
, error_code
);
6566 return EMULATE_FAIL
;
6568 kvm_rip_write(vcpu
, ctxt
->eip
);
6569 kvm_set_rflags(vcpu
, ctxt
->eflags
);
6570 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6571 return EMULATE_DONE
;
6573 EXPORT_SYMBOL_GPL(kvm_task_switch
);
6575 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
6576 struct kvm_sregs
*sregs
)
6578 struct msr_data apic_base_msr
;
6579 int mmu_reset_needed
= 0;
6580 int pending_vec
, max_bits
, idx
;
6583 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
6586 dt
.size
= sregs
->idt
.limit
;
6587 dt
.address
= sregs
->idt
.base
;
6588 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6589 dt
.size
= sregs
->gdt
.limit
;
6590 dt
.address
= sregs
->gdt
.base
;
6591 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
6593 vcpu
->arch
.cr2
= sregs
->cr2
;
6594 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
6595 vcpu
->arch
.cr3
= sregs
->cr3
;
6596 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
6598 kvm_set_cr8(vcpu
, sregs
->cr8
);
6600 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
6601 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
6602 apic_base_msr
.data
= sregs
->apic_base
;
6603 apic_base_msr
.host_initiated
= true;
6604 kvm_set_apic_base(vcpu
, &apic_base_msr
);
6606 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
6607 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
6608 vcpu
->arch
.cr0
= sregs
->cr0
;
6610 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
6611 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
6612 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
6613 kvm_update_cpuid(vcpu
);
6615 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6616 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
6617 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
6618 mmu_reset_needed
= 1;
6620 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6622 if (mmu_reset_needed
)
6623 kvm_mmu_reset_context(vcpu
);
6625 max_bits
= KVM_NR_INTERRUPTS
;
6626 pending_vec
= find_first_bit(
6627 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
6628 if (pending_vec
< max_bits
) {
6629 kvm_queue_interrupt(vcpu
, pending_vec
, false);
6630 pr_debug("Set back pending irq %d\n", pending_vec
);
6633 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6634 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6635 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6636 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6637 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6638 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6640 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6641 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6643 update_cr8_intercept(vcpu
);
6645 /* Older userspace won't unhalt the vcpu on reset. */
6646 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
6647 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
6649 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6651 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6656 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
6657 struct kvm_guest_debug
*dbg
)
6659 unsigned long rflags
;
6662 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
6664 if (vcpu
->arch
.exception
.pending
)
6666 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
6667 kvm_queue_exception(vcpu
, DB_VECTOR
);
6669 kvm_queue_exception(vcpu
, BP_VECTOR
);
6673 * Read rflags as long as potentially injected trace flags are still
6676 rflags
= kvm_get_rflags(vcpu
);
6678 vcpu
->guest_debug
= dbg
->control
;
6679 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
6680 vcpu
->guest_debug
= 0;
6682 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
6683 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
6684 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
6685 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
6687 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6688 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6690 kvm_update_dr7(vcpu
);
6692 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6693 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
6694 get_segment_base(vcpu
, VCPU_SREG_CS
);
6697 * Trigger an rflags update that will inject or remove the trace
6700 kvm_set_rflags(vcpu
, rflags
);
6702 kvm_x86_ops
->update_db_bp_intercept(vcpu
);
6712 * Translate a guest virtual address to a guest physical address.
6714 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
6715 struct kvm_translation
*tr
)
6717 unsigned long vaddr
= tr
->linear_address
;
6721 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6722 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
6723 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6724 tr
->physical_address
= gpa
;
6725 tr
->valid
= gpa
!= UNMAPPED_GVA
;
6732 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6734 struct i387_fxsave_struct
*fxsave
=
6735 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6737 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
6738 fpu
->fcw
= fxsave
->cwd
;
6739 fpu
->fsw
= fxsave
->swd
;
6740 fpu
->ftwx
= fxsave
->twd
;
6741 fpu
->last_opcode
= fxsave
->fop
;
6742 fpu
->last_ip
= fxsave
->rip
;
6743 fpu
->last_dp
= fxsave
->rdp
;
6744 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
6749 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6751 struct i387_fxsave_struct
*fxsave
=
6752 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6754 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
6755 fxsave
->cwd
= fpu
->fcw
;
6756 fxsave
->swd
= fpu
->fsw
;
6757 fxsave
->twd
= fpu
->ftwx
;
6758 fxsave
->fop
= fpu
->last_opcode
;
6759 fxsave
->rip
= fpu
->last_ip
;
6760 fxsave
->rdp
= fpu
->last_dp
;
6761 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
6766 int fx_init(struct kvm_vcpu
*vcpu
)
6770 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
6774 fpu_finit(&vcpu
->arch
.guest_fpu
);
6777 * Ensure guest xcr0 is valid for loading
6779 vcpu
->arch
.xcr0
= XSTATE_FP
;
6781 vcpu
->arch
.cr0
|= X86_CR0_ET
;
6785 EXPORT_SYMBOL_GPL(fx_init
);
6787 static void fx_free(struct kvm_vcpu
*vcpu
)
6789 fpu_free(&vcpu
->arch
.guest_fpu
);
6792 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
6794 if (vcpu
->guest_fpu_loaded
)
6798 * Restore all possible states in the guest,
6799 * and assume host would use all available bits.
6800 * Guest xcr0 would be loaded later.
6802 kvm_put_guest_xcr0(vcpu
);
6803 vcpu
->guest_fpu_loaded
= 1;
6804 __kernel_fpu_begin();
6805 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
6809 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
6811 kvm_put_guest_xcr0(vcpu
);
6813 if (!vcpu
->guest_fpu_loaded
)
6816 vcpu
->guest_fpu_loaded
= 0;
6817 fpu_save_init(&vcpu
->arch
.guest_fpu
);
6819 ++vcpu
->stat
.fpu_reload
;
6820 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
6824 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
6826 kvmclock_reset(vcpu
);
6828 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
6830 kvm_x86_ops
->vcpu_free(vcpu
);
6833 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
6836 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
6837 printk_once(KERN_WARNING
6838 "kvm: SMP vm created on host with unstable TSC; "
6839 "guest TSC will not be reliable\n");
6840 return kvm_x86_ops
->vcpu_create(kvm
, id
);
6843 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
6847 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
6848 r
= vcpu_load(vcpu
);
6851 kvm_vcpu_reset(vcpu
);
6852 kvm_mmu_setup(vcpu
);
6858 int kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
6861 struct msr_data msr
;
6862 struct kvm
*kvm
= vcpu
->kvm
;
6864 r
= vcpu_load(vcpu
);
6868 msr
.index
= MSR_IA32_TSC
;
6869 msr
.host_initiated
= true;
6870 kvm_write_tsc(vcpu
, &msr
);
6873 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
6874 KVMCLOCK_SYNC_PERIOD
);
6879 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
6882 vcpu
->arch
.apf
.msr_val
= 0;
6884 r
= vcpu_load(vcpu
);
6886 kvm_mmu_unload(vcpu
);
6890 kvm_x86_ops
->vcpu_free(vcpu
);
6893 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
)
6895 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
6896 vcpu
->arch
.nmi_pending
= 0;
6897 vcpu
->arch
.nmi_injected
= false;
6898 kvm_clear_interrupt_queue(vcpu
);
6899 kvm_clear_exception_queue(vcpu
);
6901 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
6902 vcpu
->arch
.dr6
= DR6_INIT
;
6903 kvm_update_dr6(vcpu
);
6904 vcpu
->arch
.dr7
= DR7_FIXED_1
;
6905 kvm_update_dr7(vcpu
);
6907 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6908 vcpu
->arch
.apf
.msr_val
= 0;
6909 vcpu
->arch
.st
.msr_val
= 0;
6911 kvmclock_reset(vcpu
);
6913 kvm_clear_async_pf_completion_queue(vcpu
);
6914 kvm_async_pf_hash_reset(vcpu
);
6915 vcpu
->arch
.apf
.halted
= false;
6917 kvm_pmu_reset(vcpu
);
6919 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
6920 vcpu
->arch
.regs_avail
= ~0;
6921 vcpu
->arch
.regs_dirty
= ~0;
6923 kvm_x86_ops
->vcpu_reset(vcpu
);
6926 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, unsigned int vector
)
6928 struct kvm_segment cs
;
6930 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6931 cs
.selector
= vector
<< 8;
6932 cs
.base
= vector
<< 12;
6933 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6934 kvm_rip_write(vcpu
, 0);
6937 int kvm_arch_hardware_enable(void *garbage
)
6940 struct kvm_vcpu
*vcpu
;
6945 bool stable
, backwards_tsc
= false;
6947 kvm_shared_msr_cpu_online();
6948 ret
= kvm_x86_ops
->hardware_enable(garbage
);
6952 local_tsc
= native_read_tsc();
6953 stable
= !check_tsc_unstable();
6954 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6955 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6956 if (!stable
&& vcpu
->cpu
== smp_processor_id())
6957 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
6958 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
6959 backwards_tsc
= true;
6960 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
6961 max_tsc
= vcpu
->arch
.last_host_tsc
;
6967 * Sometimes, even reliable TSCs go backwards. This happens on
6968 * platforms that reset TSC during suspend or hibernate actions, but
6969 * maintain synchronization. We must compensate. Fortunately, we can
6970 * detect that condition here, which happens early in CPU bringup,
6971 * before any KVM threads can be running. Unfortunately, we can't
6972 * bring the TSCs fully up to date with real time, as we aren't yet far
6973 * enough into CPU bringup that we know how much real time has actually
6974 * elapsed; our helper function, get_kernel_ns() will be using boot
6975 * variables that haven't been updated yet.
6977 * So we simply find the maximum observed TSC above, then record the
6978 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
6979 * the adjustment will be applied. Note that we accumulate
6980 * adjustments, in case multiple suspend cycles happen before some VCPU
6981 * gets a chance to run again. In the event that no KVM threads get a
6982 * chance to run, we will miss the entire elapsed period, as we'll have
6983 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6984 * loose cycle time. This isn't too big a deal, since the loss will be
6985 * uniform across all VCPUs (not to mention the scenario is extremely
6986 * unlikely). It is possible that a second hibernate recovery happens
6987 * much faster than a first, causing the observed TSC here to be
6988 * smaller; this would require additional padding adjustment, which is
6989 * why we set last_host_tsc to the local tsc observed here.
6991 * N.B. - this code below runs only on platforms with reliable TSC,
6992 * as that is the only way backwards_tsc is set above. Also note
6993 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6994 * have the same delta_cyc adjustment applied if backwards_tsc
6995 * is detected. Note further, this adjustment is only done once,
6996 * as we reset last_host_tsc on all VCPUs to stop this from being
6997 * called multiple times (one for each physical CPU bringup).
6999 * Platforms with unreliable TSCs don't have to deal with this, they
7000 * will be compensated by the logic in vcpu_load, which sets the TSC to
7001 * catchup mode. This will catchup all VCPUs to real time, but cannot
7002 * guarantee that they stay in perfect synchronization.
7004 if (backwards_tsc
) {
7005 u64 delta_cyc
= max_tsc
- local_tsc
;
7006 backwards_tsc_observed
= true;
7007 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7008 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7009 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7010 vcpu
->arch
.last_host_tsc
= local_tsc
;
7011 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
7016 * We have to disable TSC offset matching.. if you were
7017 * booting a VM while issuing an S4 host suspend....
7018 * you may have some problem. Solving this issue is
7019 * left as an exercise to the reader.
7021 kvm
->arch
.last_tsc_nsec
= 0;
7022 kvm
->arch
.last_tsc_write
= 0;
7029 void kvm_arch_hardware_disable(void *garbage
)
7031 kvm_x86_ops
->hardware_disable(garbage
);
7032 drop_user_return_notifiers(garbage
);
7035 int kvm_arch_hardware_setup(void)
7037 return kvm_x86_ops
->hardware_setup();
7040 void kvm_arch_hardware_unsetup(void)
7042 kvm_x86_ops
->hardware_unsetup();
7045 void kvm_arch_check_processor_compat(void *rtn
)
7047 kvm_x86_ops
->check_processor_compatibility(rtn
);
7050 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
7052 return irqchip_in_kernel(vcpu
->kvm
) == (vcpu
->arch
.apic
!= NULL
);
7055 struct static_key kvm_no_apic_vcpu __read_mostly
;
7057 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7063 BUG_ON(vcpu
->kvm
== NULL
);
7066 vcpu
->arch
.pv
.pv_unhalted
= false;
7067 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7068 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
7069 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7071 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7073 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7078 vcpu
->arch
.pio_data
= page_address(page
);
7080 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7082 r
= kvm_mmu_create(vcpu
);
7084 goto fail_free_pio_data
;
7086 if (irqchip_in_kernel(kvm
)) {
7087 r
= kvm_create_lapic(vcpu
);
7089 goto fail_mmu_destroy
;
7091 static_key_slow_inc(&kvm_no_apic_vcpu
);
7093 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7095 if (!vcpu
->arch
.mce_banks
) {
7097 goto fail_free_lapic
;
7099 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7101 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7103 goto fail_free_mce_banks
;
7108 goto fail_free_wbinvd_dirty_mask
;
7110 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7111 vcpu
->arch
.pv_time_enabled
= false;
7113 vcpu
->arch
.guest_supported_xcr0
= 0;
7114 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7116 kvm_async_pf_hash_reset(vcpu
);
7120 fail_free_wbinvd_dirty_mask
:
7121 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
7122 fail_free_mce_banks
:
7123 kfree(vcpu
->arch
.mce_banks
);
7125 kvm_free_lapic(vcpu
);
7127 kvm_mmu_destroy(vcpu
);
7129 free_page((unsigned long)vcpu
->arch
.pio_data
);
7134 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
7138 kvm_pmu_destroy(vcpu
);
7139 kfree(vcpu
->arch
.mce_banks
);
7140 kvm_free_lapic(vcpu
);
7141 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7142 kvm_mmu_destroy(vcpu
);
7143 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7144 free_page((unsigned long)vcpu
->arch
.pio_data
);
7145 if (!irqchip_in_kernel(vcpu
->kvm
))
7146 static_key_slow_dec(&kvm_no_apic_vcpu
);
7149 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
7154 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7155 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7156 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
7157 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
7159 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7160 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
7161 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7162 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
7163 &kvm
->arch
.irq_sources_bitmap
);
7165 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
7166 mutex_init(&kvm
->arch
.apic_map_lock
);
7167 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
7169 pvclock_update_vm_gtod_copy(kvm
);
7171 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
7172 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
7177 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
7180 r
= vcpu_load(vcpu
);
7182 kvm_mmu_unload(vcpu
);
7186 static void kvm_free_vcpus(struct kvm
*kvm
)
7189 struct kvm_vcpu
*vcpu
;
7192 * Unpin any mmu pages first.
7194 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7195 kvm_clear_async_pf_completion_queue(vcpu
);
7196 kvm_unload_vcpu_mmu(vcpu
);
7198 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7199 kvm_arch_vcpu_free(vcpu
);
7201 mutex_lock(&kvm
->lock
);
7202 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
7203 kvm
->vcpus
[i
] = NULL
;
7205 atomic_set(&kvm
->online_vcpus
, 0);
7206 mutex_unlock(&kvm
->lock
);
7209 void kvm_arch_sync_events(struct kvm
*kvm
)
7211 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
7212 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
7213 kvm_free_all_assigned_devices(kvm
);
7217 void kvm_arch_destroy_vm(struct kvm
*kvm
)
7219 if (current
->mm
== kvm
->mm
) {
7221 * Free memory regions allocated on behalf of userspace,
7222 * unless the the memory map has changed due to process exit
7225 struct kvm_userspace_memory_region mem
;
7226 memset(&mem
, 0, sizeof(mem
));
7227 mem
.slot
= APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
;
7228 kvm_set_memory_region(kvm
, &mem
);
7230 mem
.slot
= IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
;
7231 kvm_set_memory_region(kvm
, &mem
);
7233 mem
.slot
= TSS_PRIVATE_MEMSLOT
;
7234 kvm_set_memory_region(kvm
, &mem
);
7236 kvm_iommu_unmap_guest(kvm
);
7237 kfree(kvm
->arch
.vpic
);
7238 kfree(kvm
->arch
.vioapic
);
7239 kvm_free_vcpus(kvm
);
7240 if (kvm
->arch
.apic_access_page
)
7241 put_page(kvm
->arch
.apic_access_page
);
7242 if (kvm
->arch
.ept_identity_pagetable
)
7243 put_page(kvm
->arch
.ept_identity_pagetable
);
7244 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
7247 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
7248 struct kvm_memory_slot
*dont
)
7252 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7253 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
7254 kvm_kvfree(free
->arch
.rmap
[i
]);
7255 free
->arch
.rmap
[i
] = NULL
;
7260 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
7261 dont
->arch
.lpage_info
[i
- 1]) {
7262 kvm_kvfree(free
->arch
.lpage_info
[i
- 1]);
7263 free
->arch
.lpage_info
[i
- 1] = NULL
;
7268 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
7269 unsigned long npages
)
7273 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7278 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
7279 slot
->base_gfn
, level
) + 1;
7281 slot
->arch
.rmap
[i
] =
7282 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
7283 if (!slot
->arch
.rmap
[i
])
7288 slot
->arch
.lpage_info
[i
- 1] = kvm_kvzalloc(lpages
*
7289 sizeof(*slot
->arch
.lpage_info
[i
- 1]));
7290 if (!slot
->arch
.lpage_info
[i
- 1])
7293 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
7294 slot
->arch
.lpage_info
[i
- 1][0].write_count
= 1;
7295 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
7296 slot
->arch
.lpage_info
[i
- 1][lpages
- 1].write_count
= 1;
7297 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
7299 * If the gfn and userspace address are not aligned wrt each
7300 * other, or if explicitly asked to, disable large page
7301 * support for this slot
7303 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
7304 !kvm_largepages_enabled()) {
7307 for (j
= 0; j
< lpages
; ++j
)
7308 slot
->arch
.lpage_info
[i
- 1][j
].write_count
= 1;
7315 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7316 kvm_kvfree(slot
->arch
.rmap
[i
]);
7317 slot
->arch
.rmap
[i
] = NULL
;
7321 kvm_kvfree(slot
->arch
.lpage_info
[i
- 1]);
7322 slot
->arch
.lpage_info
[i
- 1] = NULL
;
7327 void kvm_arch_memslots_updated(struct kvm
*kvm
)
7330 * memslots->generation has been incremented.
7331 * mmio generation may have reached its maximum value.
7333 kvm_mmu_invalidate_mmio_sptes(kvm
);
7336 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
7337 struct kvm_memory_slot
*memslot
,
7338 struct kvm_userspace_memory_region
*mem
,
7339 enum kvm_mr_change change
)
7342 * Only private memory slots need to be mapped here since
7343 * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7345 if ((memslot
->id
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_CREATE
)) {
7346 unsigned long userspace_addr
;
7349 * MAP_SHARED to prevent internal slot pages from being moved
7352 userspace_addr
= vm_mmap(NULL
, 0, memslot
->npages
* PAGE_SIZE
,
7353 PROT_READ
| PROT_WRITE
,
7354 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7356 if (IS_ERR((void *)userspace_addr
))
7357 return PTR_ERR((void *)userspace_addr
);
7359 memslot
->userspace_addr
= userspace_addr
;
7365 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
7366 struct kvm_userspace_memory_region
*mem
,
7367 const struct kvm_memory_slot
*old
,
7368 enum kvm_mr_change change
)
7371 int nr_mmu_pages
= 0;
7373 if ((mem
->slot
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_DELETE
)) {
7376 ret
= vm_munmap(old
->userspace_addr
,
7377 old
->npages
* PAGE_SIZE
);
7380 "kvm_vm_ioctl_set_memory_region: "
7381 "failed to munmap memory\n");
7384 if (!kvm
->arch
.n_requested_mmu_pages
)
7385 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
7388 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
7390 * Write protect all pages for dirty logging.
7392 * All the sptes including the large sptes which point to this
7393 * slot are set to readonly. We can not create any new large
7394 * spte on this slot until the end of the logging.
7396 * See the comments in fast_page_fault().
7398 if ((change
!= KVM_MR_DELETE
) && (mem
->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
7399 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
7402 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
7404 kvm_mmu_invalidate_zap_all_pages(kvm
);
7407 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
7408 struct kvm_memory_slot
*slot
)
7410 kvm_mmu_invalidate_zap_all_pages(kvm
);
7413 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
7415 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7416 kvm_x86_ops
->check_nested_events(vcpu
, false);
7418 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7419 !vcpu
->arch
.apf
.halted
)
7420 || !list_empty_careful(&vcpu
->async_pf
.done
)
7421 || kvm_apic_has_events(vcpu
)
7422 || vcpu
->arch
.pv
.pv_unhalted
7423 || atomic_read(&vcpu
->arch
.nmi_queued
) ||
7424 (kvm_arch_interrupt_allowed(vcpu
) &&
7425 kvm_cpu_has_interrupt(vcpu
));
7428 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
7430 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
7433 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
7435 return kvm_x86_ops
->interrupt_allowed(vcpu
);
7438 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
7440 unsigned long current_rip
= kvm_rip_read(vcpu
) +
7441 get_segment_base(vcpu
, VCPU_SREG_CS
);
7443 return current_rip
== linear_rip
;
7445 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
7447 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
7449 unsigned long rflags
;
7451 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
7452 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7453 rflags
&= ~X86_EFLAGS_TF
;
7456 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
7458 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7460 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
7461 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
7462 rflags
|= X86_EFLAGS_TF
;
7463 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
7466 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7468 __kvm_set_rflags(vcpu
, rflags
);
7469 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7471 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
7473 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
7477 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
7481 r
= kvm_mmu_reload(vcpu
);
7485 if (!vcpu
->arch
.mmu
.direct_map
&&
7486 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
7489 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
7492 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
7494 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
7497 static inline u32
kvm_async_pf_next_probe(u32 key
)
7499 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
7502 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7504 u32 key
= kvm_async_pf_hash_fn(gfn
);
7506 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
7507 key
= kvm_async_pf_next_probe(key
);
7509 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
7512 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7515 u32 key
= kvm_async_pf_hash_fn(gfn
);
7517 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
7518 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
7519 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
7520 key
= kvm_async_pf_next_probe(key
);
7525 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7527 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
7530 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7534 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
7536 vcpu
->arch
.apf
.gfns
[i
] = ~0;
7538 j
= kvm_async_pf_next_probe(j
);
7539 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
7541 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
7543 * k lies cyclically in ]i,j]
7545 * |....j i.k.| or |.k..j i...|
7547 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
7548 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
7553 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
7556 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
7560 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
7561 struct kvm_async_pf
*work
)
7563 struct x86_exception fault
;
7565 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
7566 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7568 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
7569 (vcpu
->arch
.apf
.send_user_only
&&
7570 kvm_x86_ops
->get_cpl(vcpu
) == 0))
7571 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
7572 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
7573 fault
.vector
= PF_VECTOR
;
7574 fault
.error_code_valid
= true;
7575 fault
.error_code
= 0;
7576 fault
.nested_page_fault
= false;
7577 fault
.address
= work
->arch
.token
;
7578 kvm_inject_page_fault(vcpu
, &fault
);
7582 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
7583 struct kvm_async_pf
*work
)
7585 struct x86_exception fault
;
7587 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
7588 if (work
->wakeup_all
)
7589 work
->arch
.token
= ~0; /* broadcast wakeup */
7591 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7593 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
7594 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
7595 fault
.vector
= PF_VECTOR
;
7596 fault
.error_code_valid
= true;
7597 fault
.error_code
= 0;
7598 fault
.nested_page_fault
= false;
7599 fault
.address
= work
->arch
.token
;
7600 kvm_inject_page_fault(vcpu
, &fault
);
7602 vcpu
->arch
.apf
.halted
= false;
7603 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7606 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
7608 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
7611 return !kvm_event_needs_reinjection(vcpu
) &&
7612 kvm_x86_ops
->interrupt_allowed(vcpu
);
7615 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
7617 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
7619 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
7621 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
7623 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
7625 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
7627 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
7629 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
7631 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
7633 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
7634 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
7635 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
7636 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
7637 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
7638 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
7639 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
7640 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
7641 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
7642 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
7643 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
7644 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
7645 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);