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[deliverable/linux.git] / arch / x86 / kvm / x86.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 *
10 * Authors:
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
15 *
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
18 *
19 */
20
21 #include <linux/kvm_host.h>
22 #include "irq.h"
23 #include "mmu.h"
24 #include "i8254.h"
25 #include "tss.h"
26 #include "kvm_cache_regs.h"
27 #include "x86.h"
28
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
32 #include <linux/fs.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <linux/user-return-notifier.h>
41 #include <linux/srcu.h>
42 #include <linux/slab.h>
43 #include <linux/perf_event.h>
44 #include <trace/events/kvm.h>
45
46 #define CREATE_TRACE_POINTS
47 #include "trace.h"
48
49 #include <asm/debugreg.h>
50 #include <asm/uaccess.h>
51 #include <asm/msr.h>
52 #include <asm/desc.h>
53 #include <asm/mtrr.h>
54 #include <asm/mce.h>
55
56 #define MAX_IO_MSRS 256
57 #define CR0_RESERVED_BITS \
58 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
59 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
60 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
61 #define CR4_RESERVED_BITS \
62 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
63 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
64 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
65 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
66
67 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
68
69 #define KVM_MAX_MCE_BANKS 32
70 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
71
72 /* EFER defaults:
73 * - enable syscall per default because its emulated by KVM
74 * - enable LME and LMA per default on 64 bit KVM
75 */
76 #ifdef CONFIG_X86_64
77 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
78 #else
79 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
80 #endif
81
82 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
83 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
84
85 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
86 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
87 struct kvm_cpuid_entry2 __user *entries);
88
89 struct kvm_x86_ops *kvm_x86_ops;
90 EXPORT_SYMBOL_GPL(kvm_x86_ops);
91
92 int ignore_msrs = 0;
93 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
94
95 #define KVM_NR_SHARED_MSRS 16
96
97 struct kvm_shared_msrs_global {
98 int nr;
99 u32 msrs[KVM_NR_SHARED_MSRS];
100 };
101
102 struct kvm_shared_msrs {
103 struct user_return_notifier urn;
104 bool registered;
105 struct kvm_shared_msr_values {
106 u64 host;
107 u64 curr;
108 } values[KVM_NR_SHARED_MSRS];
109 };
110
111 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
112 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
113
114 struct kvm_stats_debugfs_item debugfs_entries[] = {
115 { "pf_fixed", VCPU_STAT(pf_fixed) },
116 { "pf_guest", VCPU_STAT(pf_guest) },
117 { "tlb_flush", VCPU_STAT(tlb_flush) },
118 { "invlpg", VCPU_STAT(invlpg) },
119 { "exits", VCPU_STAT(exits) },
120 { "io_exits", VCPU_STAT(io_exits) },
121 { "mmio_exits", VCPU_STAT(mmio_exits) },
122 { "signal_exits", VCPU_STAT(signal_exits) },
123 { "irq_window", VCPU_STAT(irq_window_exits) },
124 { "nmi_window", VCPU_STAT(nmi_window_exits) },
125 { "halt_exits", VCPU_STAT(halt_exits) },
126 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
127 { "hypercalls", VCPU_STAT(hypercalls) },
128 { "request_irq", VCPU_STAT(request_irq_exits) },
129 { "irq_exits", VCPU_STAT(irq_exits) },
130 { "host_state_reload", VCPU_STAT(host_state_reload) },
131 { "efer_reload", VCPU_STAT(efer_reload) },
132 { "fpu_reload", VCPU_STAT(fpu_reload) },
133 { "insn_emulation", VCPU_STAT(insn_emulation) },
134 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
135 { "irq_injections", VCPU_STAT(irq_injections) },
136 { "nmi_injections", VCPU_STAT(nmi_injections) },
137 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
138 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
139 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
140 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
141 { "mmu_flooded", VM_STAT(mmu_flooded) },
142 { "mmu_recycled", VM_STAT(mmu_recycled) },
143 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
144 { "mmu_unsync", VM_STAT(mmu_unsync) },
145 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
146 { "largepages", VM_STAT(lpages) },
147 { NULL }
148 };
149
150 static void kvm_on_user_return(struct user_return_notifier *urn)
151 {
152 unsigned slot;
153 struct kvm_shared_msrs *locals
154 = container_of(urn, struct kvm_shared_msrs, urn);
155 struct kvm_shared_msr_values *values;
156
157 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
158 values = &locals->values[slot];
159 if (values->host != values->curr) {
160 wrmsrl(shared_msrs_global.msrs[slot], values->host);
161 values->curr = values->host;
162 }
163 }
164 locals->registered = false;
165 user_return_notifier_unregister(urn);
166 }
167
168 static void shared_msr_update(unsigned slot, u32 msr)
169 {
170 struct kvm_shared_msrs *smsr;
171 u64 value;
172
173 smsr = &__get_cpu_var(shared_msrs);
174 /* only read, and nobody should modify it at this time,
175 * so don't need lock */
176 if (slot >= shared_msrs_global.nr) {
177 printk(KERN_ERR "kvm: invalid MSR slot!");
178 return;
179 }
180 rdmsrl_safe(msr, &value);
181 smsr->values[slot].host = value;
182 smsr->values[slot].curr = value;
183 }
184
185 void kvm_define_shared_msr(unsigned slot, u32 msr)
186 {
187 if (slot >= shared_msrs_global.nr)
188 shared_msrs_global.nr = slot + 1;
189 shared_msrs_global.msrs[slot] = msr;
190 /* we need ensured the shared_msr_global have been updated */
191 smp_wmb();
192 }
193 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
194
195 static void kvm_shared_msr_cpu_online(void)
196 {
197 unsigned i;
198
199 for (i = 0; i < shared_msrs_global.nr; ++i)
200 shared_msr_update(i, shared_msrs_global.msrs[i]);
201 }
202
203 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
204 {
205 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
206
207 if (((value ^ smsr->values[slot].curr) & mask) == 0)
208 return;
209 smsr->values[slot].curr = value;
210 wrmsrl(shared_msrs_global.msrs[slot], value);
211 if (!smsr->registered) {
212 smsr->urn.on_user_return = kvm_on_user_return;
213 user_return_notifier_register(&smsr->urn);
214 smsr->registered = true;
215 }
216 }
217 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
218
219 static void drop_user_return_notifiers(void *ignore)
220 {
221 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
222
223 if (smsr->registered)
224 kvm_on_user_return(&smsr->urn);
225 }
226
227 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
228 {
229 if (irqchip_in_kernel(vcpu->kvm))
230 return vcpu->arch.apic_base;
231 else
232 return vcpu->arch.apic_base;
233 }
234 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
235
236 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
237 {
238 /* TODO: reserve bits check */
239 if (irqchip_in_kernel(vcpu->kvm))
240 kvm_lapic_set_base(vcpu, data);
241 else
242 vcpu->arch.apic_base = data;
243 }
244 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
245
246 #define EXCPT_BENIGN 0
247 #define EXCPT_CONTRIBUTORY 1
248 #define EXCPT_PF 2
249
250 static int exception_class(int vector)
251 {
252 switch (vector) {
253 case PF_VECTOR:
254 return EXCPT_PF;
255 case DE_VECTOR:
256 case TS_VECTOR:
257 case NP_VECTOR:
258 case SS_VECTOR:
259 case GP_VECTOR:
260 return EXCPT_CONTRIBUTORY;
261 default:
262 break;
263 }
264 return EXCPT_BENIGN;
265 }
266
267 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
268 unsigned nr, bool has_error, u32 error_code,
269 bool reinject)
270 {
271 u32 prev_nr;
272 int class1, class2;
273
274 if (!vcpu->arch.exception.pending) {
275 queue:
276 vcpu->arch.exception.pending = true;
277 vcpu->arch.exception.has_error_code = has_error;
278 vcpu->arch.exception.nr = nr;
279 vcpu->arch.exception.error_code = error_code;
280 vcpu->arch.exception.reinject = reinject;
281 return;
282 }
283
284 /* to check exception */
285 prev_nr = vcpu->arch.exception.nr;
286 if (prev_nr == DF_VECTOR) {
287 /* triple fault -> shutdown */
288 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
289 return;
290 }
291 class1 = exception_class(prev_nr);
292 class2 = exception_class(nr);
293 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
294 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
295 /* generate double fault per SDM Table 5-5 */
296 vcpu->arch.exception.pending = true;
297 vcpu->arch.exception.has_error_code = true;
298 vcpu->arch.exception.nr = DF_VECTOR;
299 vcpu->arch.exception.error_code = 0;
300 } else
301 /* replace previous exception with a new one in a hope
302 that instruction re-execution will regenerate lost
303 exception */
304 goto queue;
305 }
306
307 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
308 {
309 kvm_multiple_exception(vcpu, nr, false, 0, false);
310 }
311 EXPORT_SYMBOL_GPL(kvm_queue_exception);
312
313 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
314 {
315 kvm_multiple_exception(vcpu, nr, false, 0, true);
316 }
317 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
318
319 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
320 u32 error_code)
321 {
322 ++vcpu->stat.pf_guest;
323 vcpu->arch.cr2 = addr;
324 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
325 }
326
327 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
328 {
329 vcpu->arch.nmi_pending = 1;
330 }
331 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
332
333 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
334 {
335 kvm_multiple_exception(vcpu, nr, true, error_code, false);
336 }
337 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
338
339 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
340 {
341 kvm_multiple_exception(vcpu, nr, true, error_code, true);
342 }
343 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
344
345 /*
346 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
347 * a #GP and return false.
348 */
349 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
350 {
351 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
352 return true;
353 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
354 return false;
355 }
356 EXPORT_SYMBOL_GPL(kvm_require_cpl);
357
358 /*
359 * Load the pae pdptrs. Return true is they are all valid.
360 */
361 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
362 {
363 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
364 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
365 int i;
366 int ret;
367 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
368
369 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
370 offset * sizeof(u64), sizeof(pdpte));
371 if (ret < 0) {
372 ret = 0;
373 goto out;
374 }
375 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
376 if (is_present_gpte(pdpte[i]) &&
377 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
378 ret = 0;
379 goto out;
380 }
381 }
382 ret = 1;
383
384 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
385 __set_bit(VCPU_EXREG_PDPTR,
386 (unsigned long *)&vcpu->arch.regs_avail);
387 __set_bit(VCPU_EXREG_PDPTR,
388 (unsigned long *)&vcpu->arch.regs_dirty);
389 out:
390
391 return ret;
392 }
393 EXPORT_SYMBOL_GPL(load_pdptrs);
394
395 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
396 {
397 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
398 bool changed = true;
399 int r;
400
401 if (is_long_mode(vcpu) || !is_pae(vcpu))
402 return false;
403
404 if (!test_bit(VCPU_EXREG_PDPTR,
405 (unsigned long *)&vcpu->arch.regs_avail))
406 return true;
407
408 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
409 if (r < 0)
410 goto out;
411 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
412 out:
413
414 return changed;
415 }
416
417 static int __kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
418 {
419 unsigned long old_cr0 = kvm_read_cr0(vcpu);
420 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
421 X86_CR0_CD | X86_CR0_NW;
422
423 cr0 |= X86_CR0_ET;
424
425 #ifdef CONFIG_X86_64
426 if (cr0 & 0xffffffff00000000UL)
427 return 1;
428 #endif
429
430 cr0 &= ~CR0_RESERVED_BITS;
431
432 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
433 return 1;
434
435 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
436 return 1;
437
438 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
439 #ifdef CONFIG_X86_64
440 if ((vcpu->arch.efer & EFER_LME)) {
441 int cs_db, cs_l;
442
443 if (!is_pae(vcpu))
444 return 1;
445 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
446 if (cs_l)
447 return 1;
448 } else
449 #endif
450 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3))
451 return 1;
452 }
453
454 kvm_x86_ops->set_cr0(vcpu, cr0);
455
456 if ((cr0 ^ old_cr0) & update_bits)
457 kvm_mmu_reset_context(vcpu);
458 return 0;
459 }
460
461 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
462 {
463 if (__kvm_set_cr0(vcpu, cr0))
464 kvm_inject_gp(vcpu, 0);
465 }
466 EXPORT_SYMBOL_GPL(kvm_set_cr0);
467
468 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
469 {
470 kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
471 }
472 EXPORT_SYMBOL_GPL(kvm_lmsw);
473
474 int __kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
475 {
476 unsigned long old_cr4 = kvm_read_cr4(vcpu);
477 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
478
479 if (cr4 & CR4_RESERVED_BITS)
480 return 1;
481
482 if (is_long_mode(vcpu)) {
483 if (!(cr4 & X86_CR4_PAE))
484 return 1;
485 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
486 && ((cr4 ^ old_cr4) & pdptr_bits)
487 && !load_pdptrs(vcpu, vcpu->arch.cr3))
488 return 1;
489
490 if (cr4 & X86_CR4_VMXE)
491 return 1;
492
493 kvm_x86_ops->set_cr4(vcpu, cr4);
494
495 if ((cr4 ^ old_cr4) & pdptr_bits)
496 kvm_mmu_reset_context(vcpu);
497
498 return 0;
499 }
500
501 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
502 {
503 if (__kvm_set_cr4(vcpu, cr4))
504 kvm_inject_gp(vcpu, 0);
505 }
506 EXPORT_SYMBOL_GPL(kvm_set_cr4);
507
508 static int __kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
509 {
510 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
511 kvm_mmu_sync_roots(vcpu);
512 kvm_mmu_flush_tlb(vcpu);
513 return 0;
514 }
515
516 if (is_long_mode(vcpu)) {
517 if (cr3 & CR3_L_MODE_RESERVED_BITS)
518 return 1;
519 } else {
520 if (is_pae(vcpu)) {
521 if (cr3 & CR3_PAE_RESERVED_BITS)
522 return 1;
523 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3))
524 return 1;
525 }
526 /*
527 * We don't check reserved bits in nonpae mode, because
528 * this isn't enforced, and VMware depends on this.
529 */
530 }
531
532 /*
533 * Does the new cr3 value map to physical memory? (Note, we
534 * catch an invalid cr3 even in real-mode, because it would
535 * cause trouble later on when we turn on paging anyway.)
536 *
537 * A real CPU would silently accept an invalid cr3 and would
538 * attempt to use it - with largely undefined (and often hard
539 * to debug) behavior on the guest side.
540 */
541 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
542 return 1;
543 vcpu->arch.cr3 = cr3;
544 vcpu->arch.mmu.new_cr3(vcpu);
545 return 0;
546 }
547
548 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
549 {
550 if (__kvm_set_cr3(vcpu, cr3))
551 kvm_inject_gp(vcpu, 0);
552 }
553 EXPORT_SYMBOL_GPL(kvm_set_cr3);
554
555 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
556 {
557 if (cr8 & CR8_RESERVED_BITS)
558 return 1;
559 if (irqchip_in_kernel(vcpu->kvm))
560 kvm_lapic_set_tpr(vcpu, cr8);
561 else
562 vcpu->arch.cr8 = cr8;
563 return 0;
564 }
565
566 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
567 {
568 if (__kvm_set_cr8(vcpu, cr8))
569 kvm_inject_gp(vcpu, 0);
570 }
571 EXPORT_SYMBOL_GPL(kvm_set_cr8);
572
573 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
574 {
575 if (irqchip_in_kernel(vcpu->kvm))
576 return kvm_lapic_get_cr8(vcpu);
577 else
578 return vcpu->arch.cr8;
579 }
580 EXPORT_SYMBOL_GPL(kvm_get_cr8);
581
582 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
583 {
584 switch (dr) {
585 case 0 ... 3:
586 vcpu->arch.db[dr] = val;
587 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
588 vcpu->arch.eff_db[dr] = val;
589 break;
590 case 4:
591 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
592 return 1; /* #UD */
593 /* fall through */
594 case 6:
595 if (val & 0xffffffff00000000ULL)
596 return -1; /* #GP */
597 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
598 break;
599 case 5:
600 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
601 return 1; /* #UD */
602 /* fall through */
603 default: /* 7 */
604 if (val & 0xffffffff00000000ULL)
605 return -1; /* #GP */
606 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
607 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
608 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
609 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
610 }
611 break;
612 }
613
614 return 0;
615 }
616
617 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
618 {
619 int res;
620
621 res = __kvm_set_dr(vcpu, dr, val);
622 if (res > 0)
623 kvm_queue_exception(vcpu, UD_VECTOR);
624 else if (res < 0)
625 kvm_inject_gp(vcpu, 0);
626
627 return res;
628 }
629 EXPORT_SYMBOL_GPL(kvm_set_dr);
630
631 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
632 {
633 switch (dr) {
634 case 0 ... 3:
635 *val = vcpu->arch.db[dr];
636 break;
637 case 4:
638 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
639 return 1;
640 /* fall through */
641 case 6:
642 *val = vcpu->arch.dr6;
643 break;
644 case 5:
645 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
646 return 1;
647 /* fall through */
648 default: /* 7 */
649 *val = vcpu->arch.dr7;
650 break;
651 }
652
653 return 0;
654 }
655
656 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
657 {
658 if (_kvm_get_dr(vcpu, dr, val)) {
659 kvm_queue_exception(vcpu, UD_VECTOR);
660 return 1;
661 }
662 return 0;
663 }
664 EXPORT_SYMBOL_GPL(kvm_get_dr);
665
666 static inline u32 bit(int bitno)
667 {
668 return 1 << (bitno & 31);
669 }
670
671 /*
672 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
673 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
674 *
675 * This list is modified at module load time to reflect the
676 * capabilities of the host cpu. This capabilities test skips MSRs that are
677 * kvm-specific. Those are put in the beginning of the list.
678 */
679
680 #define KVM_SAVE_MSRS_BEGIN 7
681 static u32 msrs_to_save[] = {
682 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
683 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
684 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
685 HV_X64_MSR_APIC_ASSIST_PAGE,
686 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
687 MSR_K6_STAR,
688 #ifdef CONFIG_X86_64
689 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
690 #endif
691 MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
692 };
693
694 static unsigned num_msrs_to_save;
695
696 static u32 emulated_msrs[] = {
697 MSR_IA32_MISC_ENABLE,
698 };
699
700 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
701 {
702 u64 old_efer = vcpu->arch.efer;
703
704 if (efer & efer_reserved_bits)
705 return 1;
706
707 if (is_paging(vcpu)
708 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
709 return 1;
710
711 if (efer & EFER_FFXSR) {
712 struct kvm_cpuid_entry2 *feat;
713
714 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
715 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
716 return 1;
717 }
718
719 if (efer & EFER_SVME) {
720 struct kvm_cpuid_entry2 *feat;
721
722 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
723 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
724 return 1;
725 }
726
727 efer &= ~EFER_LMA;
728 efer |= vcpu->arch.efer & EFER_LMA;
729
730 kvm_x86_ops->set_efer(vcpu, efer);
731
732 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
733 kvm_mmu_reset_context(vcpu);
734
735 /* Update reserved bits */
736 if ((efer ^ old_efer) & EFER_NX)
737 kvm_mmu_reset_context(vcpu);
738
739 return 0;
740 }
741
742 void kvm_enable_efer_bits(u64 mask)
743 {
744 efer_reserved_bits &= ~mask;
745 }
746 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
747
748
749 /*
750 * Writes msr value into into the appropriate "register".
751 * Returns 0 on success, non-0 otherwise.
752 * Assumes vcpu_load() was already called.
753 */
754 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
755 {
756 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
757 }
758
759 /*
760 * Adapt set_msr() to msr_io()'s calling convention
761 */
762 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
763 {
764 return kvm_set_msr(vcpu, index, *data);
765 }
766
767 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
768 {
769 int version;
770 int r;
771 struct pvclock_wall_clock wc;
772 struct timespec boot;
773
774 if (!wall_clock)
775 return;
776
777 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
778 if (r)
779 return;
780
781 if (version & 1)
782 ++version; /* first time write, random junk */
783
784 ++version;
785
786 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
787
788 /*
789 * The guest calculates current wall clock time by adding
790 * system time (updated by kvm_write_guest_time below) to the
791 * wall clock specified here. guest system time equals host
792 * system time for us, thus we must fill in host boot time here.
793 */
794 getboottime(&boot);
795
796 wc.sec = boot.tv_sec;
797 wc.nsec = boot.tv_nsec;
798 wc.version = version;
799
800 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
801
802 version++;
803 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
804 }
805
806 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
807 {
808 uint32_t quotient, remainder;
809
810 /* Don't try to replace with do_div(), this one calculates
811 * "(dividend << 32) / divisor" */
812 __asm__ ( "divl %4"
813 : "=a" (quotient), "=d" (remainder)
814 : "0" (0), "1" (dividend), "r" (divisor) );
815 return quotient;
816 }
817
818 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
819 {
820 uint64_t nsecs = 1000000000LL;
821 int32_t shift = 0;
822 uint64_t tps64;
823 uint32_t tps32;
824
825 tps64 = tsc_khz * 1000LL;
826 while (tps64 > nsecs*2) {
827 tps64 >>= 1;
828 shift--;
829 }
830
831 tps32 = (uint32_t)tps64;
832 while (tps32 <= (uint32_t)nsecs) {
833 tps32 <<= 1;
834 shift++;
835 }
836
837 hv_clock->tsc_shift = shift;
838 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
839
840 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
841 __func__, tsc_khz, hv_clock->tsc_shift,
842 hv_clock->tsc_to_system_mul);
843 }
844
845 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
846
847 static void kvm_write_guest_time(struct kvm_vcpu *v)
848 {
849 struct timespec ts;
850 unsigned long flags;
851 struct kvm_vcpu_arch *vcpu = &v->arch;
852 void *shared_kaddr;
853 unsigned long this_tsc_khz;
854
855 if ((!vcpu->time_page))
856 return;
857
858 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
859 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
860 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
861 vcpu->hv_clock_tsc_khz = this_tsc_khz;
862 }
863 put_cpu_var(cpu_tsc_khz);
864
865 /* Keep irq disabled to prevent changes to the clock */
866 local_irq_save(flags);
867 kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
868 ktime_get_ts(&ts);
869 monotonic_to_bootbased(&ts);
870 local_irq_restore(flags);
871
872 /* With all the info we got, fill in the values */
873
874 vcpu->hv_clock.system_time = ts.tv_nsec +
875 (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
876
877 vcpu->hv_clock.flags = 0;
878
879 /*
880 * The interface expects us to write an even number signaling that the
881 * update is finished. Since the guest won't see the intermediate
882 * state, we just increase by 2 at the end.
883 */
884 vcpu->hv_clock.version += 2;
885
886 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
887
888 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
889 sizeof(vcpu->hv_clock));
890
891 kunmap_atomic(shared_kaddr, KM_USER0);
892
893 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
894 }
895
896 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
897 {
898 struct kvm_vcpu_arch *vcpu = &v->arch;
899
900 if (!vcpu->time_page)
901 return 0;
902 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
903 return 1;
904 }
905
906 static bool msr_mtrr_valid(unsigned msr)
907 {
908 switch (msr) {
909 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
910 case MSR_MTRRfix64K_00000:
911 case MSR_MTRRfix16K_80000:
912 case MSR_MTRRfix16K_A0000:
913 case MSR_MTRRfix4K_C0000:
914 case MSR_MTRRfix4K_C8000:
915 case MSR_MTRRfix4K_D0000:
916 case MSR_MTRRfix4K_D8000:
917 case MSR_MTRRfix4K_E0000:
918 case MSR_MTRRfix4K_E8000:
919 case MSR_MTRRfix4K_F0000:
920 case MSR_MTRRfix4K_F8000:
921 case MSR_MTRRdefType:
922 case MSR_IA32_CR_PAT:
923 return true;
924 case 0x2f8:
925 return true;
926 }
927 return false;
928 }
929
930 static bool valid_pat_type(unsigned t)
931 {
932 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
933 }
934
935 static bool valid_mtrr_type(unsigned t)
936 {
937 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
938 }
939
940 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
941 {
942 int i;
943
944 if (!msr_mtrr_valid(msr))
945 return false;
946
947 if (msr == MSR_IA32_CR_PAT) {
948 for (i = 0; i < 8; i++)
949 if (!valid_pat_type((data >> (i * 8)) & 0xff))
950 return false;
951 return true;
952 } else if (msr == MSR_MTRRdefType) {
953 if (data & ~0xcff)
954 return false;
955 return valid_mtrr_type(data & 0xff);
956 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
957 for (i = 0; i < 8 ; i++)
958 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
959 return false;
960 return true;
961 }
962
963 /* variable MTRRs */
964 return valid_mtrr_type(data & 0xff);
965 }
966
967 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
968 {
969 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
970
971 if (!mtrr_valid(vcpu, msr, data))
972 return 1;
973
974 if (msr == MSR_MTRRdefType) {
975 vcpu->arch.mtrr_state.def_type = data;
976 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
977 } else if (msr == MSR_MTRRfix64K_00000)
978 p[0] = data;
979 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
980 p[1 + msr - MSR_MTRRfix16K_80000] = data;
981 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
982 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
983 else if (msr == MSR_IA32_CR_PAT)
984 vcpu->arch.pat = data;
985 else { /* Variable MTRRs */
986 int idx, is_mtrr_mask;
987 u64 *pt;
988
989 idx = (msr - 0x200) / 2;
990 is_mtrr_mask = msr - 0x200 - 2 * idx;
991 if (!is_mtrr_mask)
992 pt =
993 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
994 else
995 pt =
996 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
997 *pt = data;
998 }
999
1000 kvm_mmu_reset_context(vcpu);
1001 return 0;
1002 }
1003
1004 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1005 {
1006 u64 mcg_cap = vcpu->arch.mcg_cap;
1007 unsigned bank_num = mcg_cap & 0xff;
1008
1009 switch (msr) {
1010 case MSR_IA32_MCG_STATUS:
1011 vcpu->arch.mcg_status = data;
1012 break;
1013 case MSR_IA32_MCG_CTL:
1014 if (!(mcg_cap & MCG_CTL_P))
1015 return 1;
1016 if (data != 0 && data != ~(u64)0)
1017 return -1;
1018 vcpu->arch.mcg_ctl = data;
1019 break;
1020 default:
1021 if (msr >= MSR_IA32_MC0_CTL &&
1022 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1023 u32 offset = msr - MSR_IA32_MC0_CTL;
1024 /* only 0 or all 1s can be written to IA32_MCi_CTL
1025 * some Linux kernels though clear bit 10 in bank 4 to
1026 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1027 * this to avoid an uncatched #GP in the guest
1028 */
1029 if ((offset & 0x3) == 0 &&
1030 data != 0 && (data | (1 << 10)) != ~(u64)0)
1031 return -1;
1032 vcpu->arch.mce_banks[offset] = data;
1033 break;
1034 }
1035 return 1;
1036 }
1037 return 0;
1038 }
1039
1040 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1041 {
1042 struct kvm *kvm = vcpu->kvm;
1043 int lm = is_long_mode(vcpu);
1044 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1045 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1046 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1047 : kvm->arch.xen_hvm_config.blob_size_32;
1048 u32 page_num = data & ~PAGE_MASK;
1049 u64 page_addr = data & PAGE_MASK;
1050 u8 *page;
1051 int r;
1052
1053 r = -E2BIG;
1054 if (page_num >= blob_size)
1055 goto out;
1056 r = -ENOMEM;
1057 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1058 if (!page)
1059 goto out;
1060 r = -EFAULT;
1061 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1062 goto out_free;
1063 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1064 goto out_free;
1065 r = 0;
1066 out_free:
1067 kfree(page);
1068 out:
1069 return r;
1070 }
1071
1072 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1073 {
1074 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1075 }
1076
1077 static bool kvm_hv_msr_partition_wide(u32 msr)
1078 {
1079 bool r = false;
1080 switch (msr) {
1081 case HV_X64_MSR_GUEST_OS_ID:
1082 case HV_X64_MSR_HYPERCALL:
1083 r = true;
1084 break;
1085 }
1086
1087 return r;
1088 }
1089
1090 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1091 {
1092 struct kvm *kvm = vcpu->kvm;
1093
1094 switch (msr) {
1095 case HV_X64_MSR_GUEST_OS_ID:
1096 kvm->arch.hv_guest_os_id = data;
1097 /* setting guest os id to zero disables hypercall page */
1098 if (!kvm->arch.hv_guest_os_id)
1099 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1100 break;
1101 case HV_X64_MSR_HYPERCALL: {
1102 u64 gfn;
1103 unsigned long addr;
1104 u8 instructions[4];
1105
1106 /* if guest os id is not set hypercall should remain disabled */
1107 if (!kvm->arch.hv_guest_os_id)
1108 break;
1109 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1110 kvm->arch.hv_hypercall = data;
1111 break;
1112 }
1113 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1114 addr = gfn_to_hva(kvm, gfn);
1115 if (kvm_is_error_hva(addr))
1116 return 1;
1117 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1118 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1119 if (copy_to_user((void __user *)addr, instructions, 4))
1120 return 1;
1121 kvm->arch.hv_hypercall = data;
1122 break;
1123 }
1124 default:
1125 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1126 "data 0x%llx\n", msr, data);
1127 return 1;
1128 }
1129 return 0;
1130 }
1131
1132 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1133 {
1134 switch (msr) {
1135 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1136 unsigned long addr;
1137
1138 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1139 vcpu->arch.hv_vapic = data;
1140 break;
1141 }
1142 addr = gfn_to_hva(vcpu->kvm, data >>
1143 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1144 if (kvm_is_error_hva(addr))
1145 return 1;
1146 if (clear_user((void __user *)addr, PAGE_SIZE))
1147 return 1;
1148 vcpu->arch.hv_vapic = data;
1149 break;
1150 }
1151 case HV_X64_MSR_EOI:
1152 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1153 case HV_X64_MSR_ICR:
1154 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1155 case HV_X64_MSR_TPR:
1156 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1157 default:
1158 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1159 "data 0x%llx\n", msr, data);
1160 return 1;
1161 }
1162
1163 return 0;
1164 }
1165
1166 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1167 {
1168 switch (msr) {
1169 case MSR_EFER:
1170 return set_efer(vcpu, data);
1171 case MSR_K7_HWCR:
1172 data &= ~(u64)0x40; /* ignore flush filter disable */
1173 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1174 if (data != 0) {
1175 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1176 data);
1177 return 1;
1178 }
1179 break;
1180 case MSR_FAM10H_MMIO_CONF_BASE:
1181 if (data != 0) {
1182 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1183 "0x%llx\n", data);
1184 return 1;
1185 }
1186 break;
1187 case MSR_AMD64_NB_CFG:
1188 break;
1189 case MSR_IA32_DEBUGCTLMSR:
1190 if (!data) {
1191 /* We support the non-activated case already */
1192 break;
1193 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1194 /* Values other than LBR and BTF are vendor-specific,
1195 thus reserved and should throw a #GP */
1196 return 1;
1197 }
1198 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1199 __func__, data);
1200 break;
1201 case MSR_IA32_UCODE_REV:
1202 case MSR_IA32_UCODE_WRITE:
1203 case MSR_VM_HSAVE_PA:
1204 case MSR_AMD64_PATCH_LOADER:
1205 break;
1206 case 0x200 ... 0x2ff:
1207 return set_msr_mtrr(vcpu, msr, data);
1208 case MSR_IA32_APICBASE:
1209 kvm_set_apic_base(vcpu, data);
1210 break;
1211 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1212 return kvm_x2apic_msr_write(vcpu, msr, data);
1213 case MSR_IA32_MISC_ENABLE:
1214 vcpu->arch.ia32_misc_enable_msr = data;
1215 break;
1216 case MSR_KVM_WALL_CLOCK_NEW:
1217 case MSR_KVM_WALL_CLOCK:
1218 vcpu->kvm->arch.wall_clock = data;
1219 kvm_write_wall_clock(vcpu->kvm, data);
1220 break;
1221 case MSR_KVM_SYSTEM_TIME_NEW:
1222 case MSR_KVM_SYSTEM_TIME: {
1223 if (vcpu->arch.time_page) {
1224 kvm_release_page_dirty(vcpu->arch.time_page);
1225 vcpu->arch.time_page = NULL;
1226 }
1227
1228 vcpu->arch.time = data;
1229
1230 /* we verify if the enable bit is set... */
1231 if (!(data & 1))
1232 break;
1233
1234 /* ...but clean it before doing the actual write */
1235 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1236
1237 vcpu->arch.time_page =
1238 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1239
1240 if (is_error_page(vcpu->arch.time_page)) {
1241 kvm_release_page_clean(vcpu->arch.time_page);
1242 vcpu->arch.time_page = NULL;
1243 }
1244
1245 kvm_request_guest_time_update(vcpu);
1246 break;
1247 }
1248 case MSR_IA32_MCG_CTL:
1249 case MSR_IA32_MCG_STATUS:
1250 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1251 return set_msr_mce(vcpu, msr, data);
1252
1253 /* Performance counters are not protected by a CPUID bit,
1254 * so we should check all of them in the generic path for the sake of
1255 * cross vendor migration.
1256 * Writing a zero into the event select MSRs disables them,
1257 * which we perfectly emulate ;-). Any other value should be at least
1258 * reported, some guests depend on them.
1259 */
1260 case MSR_P6_EVNTSEL0:
1261 case MSR_P6_EVNTSEL1:
1262 case MSR_K7_EVNTSEL0:
1263 case MSR_K7_EVNTSEL1:
1264 case MSR_K7_EVNTSEL2:
1265 case MSR_K7_EVNTSEL3:
1266 if (data != 0)
1267 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1268 "0x%x data 0x%llx\n", msr, data);
1269 break;
1270 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1271 * so we ignore writes to make it happy.
1272 */
1273 case MSR_P6_PERFCTR0:
1274 case MSR_P6_PERFCTR1:
1275 case MSR_K7_PERFCTR0:
1276 case MSR_K7_PERFCTR1:
1277 case MSR_K7_PERFCTR2:
1278 case MSR_K7_PERFCTR3:
1279 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1280 "0x%x data 0x%llx\n", msr, data);
1281 break;
1282 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1283 if (kvm_hv_msr_partition_wide(msr)) {
1284 int r;
1285 mutex_lock(&vcpu->kvm->lock);
1286 r = set_msr_hyperv_pw(vcpu, msr, data);
1287 mutex_unlock(&vcpu->kvm->lock);
1288 return r;
1289 } else
1290 return set_msr_hyperv(vcpu, msr, data);
1291 break;
1292 default:
1293 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1294 return xen_hvm_config(vcpu, data);
1295 if (!ignore_msrs) {
1296 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1297 msr, data);
1298 return 1;
1299 } else {
1300 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1301 msr, data);
1302 break;
1303 }
1304 }
1305 return 0;
1306 }
1307 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1308
1309
1310 /*
1311 * Reads an msr value (of 'msr_index') into 'pdata'.
1312 * Returns 0 on success, non-0 otherwise.
1313 * Assumes vcpu_load() was already called.
1314 */
1315 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1316 {
1317 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1318 }
1319
1320 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1321 {
1322 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1323
1324 if (!msr_mtrr_valid(msr))
1325 return 1;
1326
1327 if (msr == MSR_MTRRdefType)
1328 *pdata = vcpu->arch.mtrr_state.def_type +
1329 (vcpu->arch.mtrr_state.enabled << 10);
1330 else if (msr == MSR_MTRRfix64K_00000)
1331 *pdata = p[0];
1332 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1333 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1334 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1335 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1336 else if (msr == MSR_IA32_CR_PAT)
1337 *pdata = vcpu->arch.pat;
1338 else { /* Variable MTRRs */
1339 int idx, is_mtrr_mask;
1340 u64 *pt;
1341
1342 idx = (msr - 0x200) / 2;
1343 is_mtrr_mask = msr - 0x200 - 2 * idx;
1344 if (!is_mtrr_mask)
1345 pt =
1346 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1347 else
1348 pt =
1349 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1350 *pdata = *pt;
1351 }
1352
1353 return 0;
1354 }
1355
1356 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1357 {
1358 u64 data;
1359 u64 mcg_cap = vcpu->arch.mcg_cap;
1360 unsigned bank_num = mcg_cap & 0xff;
1361
1362 switch (msr) {
1363 case MSR_IA32_P5_MC_ADDR:
1364 case MSR_IA32_P5_MC_TYPE:
1365 data = 0;
1366 break;
1367 case MSR_IA32_MCG_CAP:
1368 data = vcpu->arch.mcg_cap;
1369 break;
1370 case MSR_IA32_MCG_CTL:
1371 if (!(mcg_cap & MCG_CTL_P))
1372 return 1;
1373 data = vcpu->arch.mcg_ctl;
1374 break;
1375 case MSR_IA32_MCG_STATUS:
1376 data = vcpu->arch.mcg_status;
1377 break;
1378 default:
1379 if (msr >= MSR_IA32_MC0_CTL &&
1380 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1381 u32 offset = msr - MSR_IA32_MC0_CTL;
1382 data = vcpu->arch.mce_banks[offset];
1383 break;
1384 }
1385 return 1;
1386 }
1387 *pdata = data;
1388 return 0;
1389 }
1390
1391 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1392 {
1393 u64 data = 0;
1394 struct kvm *kvm = vcpu->kvm;
1395
1396 switch (msr) {
1397 case HV_X64_MSR_GUEST_OS_ID:
1398 data = kvm->arch.hv_guest_os_id;
1399 break;
1400 case HV_X64_MSR_HYPERCALL:
1401 data = kvm->arch.hv_hypercall;
1402 break;
1403 default:
1404 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1405 return 1;
1406 }
1407
1408 *pdata = data;
1409 return 0;
1410 }
1411
1412 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1413 {
1414 u64 data = 0;
1415
1416 switch (msr) {
1417 case HV_X64_MSR_VP_INDEX: {
1418 int r;
1419 struct kvm_vcpu *v;
1420 kvm_for_each_vcpu(r, v, vcpu->kvm)
1421 if (v == vcpu)
1422 data = r;
1423 break;
1424 }
1425 case HV_X64_MSR_EOI:
1426 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1427 case HV_X64_MSR_ICR:
1428 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1429 case HV_X64_MSR_TPR:
1430 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1431 default:
1432 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1433 return 1;
1434 }
1435 *pdata = data;
1436 return 0;
1437 }
1438
1439 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1440 {
1441 u64 data;
1442
1443 switch (msr) {
1444 case MSR_IA32_PLATFORM_ID:
1445 case MSR_IA32_UCODE_REV:
1446 case MSR_IA32_EBL_CR_POWERON:
1447 case MSR_IA32_DEBUGCTLMSR:
1448 case MSR_IA32_LASTBRANCHFROMIP:
1449 case MSR_IA32_LASTBRANCHTOIP:
1450 case MSR_IA32_LASTINTFROMIP:
1451 case MSR_IA32_LASTINTTOIP:
1452 case MSR_K8_SYSCFG:
1453 case MSR_K7_HWCR:
1454 case MSR_VM_HSAVE_PA:
1455 case MSR_P6_PERFCTR0:
1456 case MSR_P6_PERFCTR1:
1457 case MSR_P6_EVNTSEL0:
1458 case MSR_P6_EVNTSEL1:
1459 case MSR_K7_EVNTSEL0:
1460 case MSR_K7_PERFCTR0:
1461 case MSR_K8_INT_PENDING_MSG:
1462 case MSR_AMD64_NB_CFG:
1463 case MSR_FAM10H_MMIO_CONF_BASE:
1464 data = 0;
1465 break;
1466 case MSR_MTRRcap:
1467 data = 0x500 | KVM_NR_VAR_MTRR;
1468 break;
1469 case 0x200 ... 0x2ff:
1470 return get_msr_mtrr(vcpu, msr, pdata);
1471 case 0xcd: /* fsb frequency */
1472 data = 3;
1473 break;
1474 case MSR_IA32_APICBASE:
1475 data = kvm_get_apic_base(vcpu);
1476 break;
1477 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1478 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1479 break;
1480 case MSR_IA32_MISC_ENABLE:
1481 data = vcpu->arch.ia32_misc_enable_msr;
1482 break;
1483 case MSR_IA32_PERF_STATUS:
1484 /* TSC increment by tick */
1485 data = 1000ULL;
1486 /* CPU multiplier */
1487 data |= (((uint64_t)4ULL) << 40);
1488 break;
1489 case MSR_EFER:
1490 data = vcpu->arch.efer;
1491 break;
1492 case MSR_KVM_WALL_CLOCK:
1493 case MSR_KVM_WALL_CLOCK_NEW:
1494 data = vcpu->kvm->arch.wall_clock;
1495 break;
1496 case MSR_KVM_SYSTEM_TIME:
1497 case MSR_KVM_SYSTEM_TIME_NEW:
1498 data = vcpu->arch.time;
1499 break;
1500 case MSR_IA32_P5_MC_ADDR:
1501 case MSR_IA32_P5_MC_TYPE:
1502 case MSR_IA32_MCG_CAP:
1503 case MSR_IA32_MCG_CTL:
1504 case MSR_IA32_MCG_STATUS:
1505 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1506 return get_msr_mce(vcpu, msr, pdata);
1507 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1508 if (kvm_hv_msr_partition_wide(msr)) {
1509 int r;
1510 mutex_lock(&vcpu->kvm->lock);
1511 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1512 mutex_unlock(&vcpu->kvm->lock);
1513 return r;
1514 } else
1515 return get_msr_hyperv(vcpu, msr, pdata);
1516 break;
1517 default:
1518 if (!ignore_msrs) {
1519 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1520 return 1;
1521 } else {
1522 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1523 data = 0;
1524 }
1525 break;
1526 }
1527 *pdata = data;
1528 return 0;
1529 }
1530 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1531
1532 /*
1533 * Read or write a bunch of msrs. All parameters are kernel addresses.
1534 *
1535 * @return number of msrs set successfully.
1536 */
1537 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1538 struct kvm_msr_entry *entries,
1539 int (*do_msr)(struct kvm_vcpu *vcpu,
1540 unsigned index, u64 *data))
1541 {
1542 int i, idx;
1543
1544 idx = srcu_read_lock(&vcpu->kvm->srcu);
1545 for (i = 0; i < msrs->nmsrs; ++i)
1546 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1547 break;
1548 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1549
1550 return i;
1551 }
1552
1553 /*
1554 * Read or write a bunch of msrs. Parameters are user addresses.
1555 *
1556 * @return number of msrs set successfully.
1557 */
1558 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1559 int (*do_msr)(struct kvm_vcpu *vcpu,
1560 unsigned index, u64 *data),
1561 int writeback)
1562 {
1563 struct kvm_msrs msrs;
1564 struct kvm_msr_entry *entries;
1565 int r, n;
1566 unsigned size;
1567
1568 r = -EFAULT;
1569 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1570 goto out;
1571
1572 r = -E2BIG;
1573 if (msrs.nmsrs >= MAX_IO_MSRS)
1574 goto out;
1575
1576 r = -ENOMEM;
1577 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1578 entries = kmalloc(size, GFP_KERNEL);
1579 if (!entries)
1580 goto out;
1581
1582 r = -EFAULT;
1583 if (copy_from_user(entries, user_msrs->entries, size))
1584 goto out_free;
1585
1586 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1587 if (r < 0)
1588 goto out_free;
1589
1590 r = -EFAULT;
1591 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1592 goto out_free;
1593
1594 r = n;
1595
1596 out_free:
1597 kfree(entries);
1598 out:
1599 return r;
1600 }
1601
1602 int kvm_dev_ioctl_check_extension(long ext)
1603 {
1604 int r;
1605
1606 switch (ext) {
1607 case KVM_CAP_IRQCHIP:
1608 case KVM_CAP_HLT:
1609 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1610 case KVM_CAP_SET_TSS_ADDR:
1611 case KVM_CAP_EXT_CPUID:
1612 case KVM_CAP_CLOCKSOURCE:
1613 case KVM_CAP_PIT:
1614 case KVM_CAP_NOP_IO_DELAY:
1615 case KVM_CAP_MP_STATE:
1616 case KVM_CAP_SYNC_MMU:
1617 case KVM_CAP_REINJECT_CONTROL:
1618 case KVM_CAP_IRQ_INJECT_STATUS:
1619 case KVM_CAP_ASSIGN_DEV_IRQ:
1620 case KVM_CAP_IRQFD:
1621 case KVM_CAP_IOEVENTFD:
1622 case KVM_CAP_PIT2:
1623 case KVM_CAP_PIT_STATE2:
1624 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1625 case KVM_CAP_XEN_HVM:
1626 case KVM_CAP_ADJUST_CLOCK:
1627 case KVM_CAP_VCPU_EVENTS:
1628 case KVM_CAP_HYPERV:
1629 case KVM_CAP_HYPERV_VAPIC:
1630 case KVM_CAP_HYPERV_SPIN:
1631 case KVM_CAP_PCI_SEGMENT:
1632 case KVM_CAP_DEBUGREGS:
1633 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1634 r = 1;
1635 break;
1636 case KVM_CAP_COALESCED_MMIO:
1637 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1638 break;
1639 case KVM_CAP_VAPIC:
1640 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1641 break;
1642 case KVM_CAP_NR_VCPUS:
1643 r = KVM_MAX_VCPUS;
1644 break;
1645 case KVM_CAP_NR_MEMSLOTS:
1646 r = KVM_MEMORY_SLOTS;
1647 break;
1648 case KVM_CAP_PV_MMU: /* obsolete */
1649 r = 0;
1650 break;
1651 case KVM_CAP_IOMMU:
1652 r = iommu_found();
1653 break;
1654 case KVM_CAP_MCE:
1655 r = KVM_MAX_MCE_BANKS;
1656 break;
1657 default:
1658 r = 0;
1659 break;
1660 }
1661 return r;
1662
1663 }
1664
1665 long kvm_arch_dev_ioctl(struct file *filp,
1666 unsigned int ioctl, unsigned long arg)
1667 {
1668 void __user *argp = (void __user *)arg;
1669 long r;
1670
1671 switch (ioctl) {
1672 case KVM_GET_MSR_INDEX_LIST: {
1673 struct kvm_msr_list __user *user_msr_list = argp;
1674 struct kvm_msr_list msr_list;
1675 unsigned n;
1676
1677 r = -EFAULT;
1678 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1679 goto out;
1680 n = msr_list.nmsrs;
1681 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1682 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1683 goto out;
1684 r = -E2BIG;
1685 if (n < msr_list.nmsrs)
1686 goto out;
1687 r = -EFAULT;
1688 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1689 num_msrs_to_save * sizeof(u32)))
1690 goto out;
1691 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1692 &emulated_msrs,
1693 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1694 goto out;
1695 r = 0;
1696 break;
1697 }
1698 case KVM_GET_SUPPORTED_CPUID: {
1699 struct kvm_cpuid2 __user *cpuid_arg = argp;
1700 struct kvm_cpuid2 cpuid;
1701
1702 r = -EFAULT;
1703 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1704 goto out;
1705 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1706 cpuid_arg->entries);
1707 if (r)
1708 goto out;
1709
1710 r = -EFAULT;
1711 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1712 goto out;
1713 r = 0;
1714 break;
1715 }
1716 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1717 u64 mce_cap;
1718
1719 mce_cap = KVM_MCE_CAP_SUPPORTED;
1720 r = -EFAULT;
1721 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1722 goto out;
1723 r = 0;
1724 break;
1725 }
1726 default:
1727 r = -EINVAL;
1728 }
1729 out:
1730 return r;
1731 }
1732
1733 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1734 {
1735 kvm_x86_ops->vcpu_load(vcpu, cpu);
1736 if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1737 unsigned long khz = cpufreq_quick_get(cpu);
1738 if (!khz)
1739 khz = tsc_khz;
1740 per_cpu(cpu_tsc_khz, cpu) = khz;
1741 }
1742 kvm_request_guest_time_update(vcpu);
1743 }
1744
1745 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1746 {
1747 kvm_x86_ops->vcpu_put(vcpu);
1748 kvm_put_guest_fpu(vcpu);
1749 }
1750
1751 static int is_efer_nx(void)
1752 {
1753 unsigned long long efer = 0;
1754
1755 rdmsrl_safe(MSR_EFER, &efer);
1756 return efer & EFER_NX;
1757 }
1758
1759 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1760 {
1761 int i;
1762 struct kvm_cpuid_entry2 *e, *entry;
1763
1764 entry = NULL;
1765 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1766 e = &vcpu->arch.cpuid_entries[i];
1767 if (e->function == 0x80000001) {
1768 entry = e;
1769 break;
1770 }
1771 }
1772 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1773 entry->edx &= ~(1 << 20);
1774 printk(KERN_INFO "kvm: guest NX capability removed\n");
1775 }
1776 }
1777
1778 /* when an old userspace process fills a new kernel module */
1779 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1780 struct kvm_cpuid *cpuid,
1781 struct kvm_cpuid_entry __user *entries)
1782 {
1783 int r, i;
1784 struct kvm_cpuid_entry *cpuid_entries;
1785
1786 r = -E2BIG;
1787 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1788 goto out;
1789 r = -ENOMEM;
1790 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1791 if (!cpuid_entries)
1792 goto out;
1793 r = -EFAULT;
1794 if (copy_from_user(cpuid_entries, entries,
1795 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1796 goto out_free;
1797 for (i = 0; i < cpuid->nent; i++) {
1798 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1799 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1800 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1801 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1802 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1803 vcpu->arch.cpuid_entries[i].index = 0;
1804 vcpu->arch.cpuid_entries[i].flags = 0;
1805 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1806 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1807 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1808 }
1809 vcpu->arch.cpuid_nent = cpuid->nent;
1810 cpuid_fix_nx_cap(vcpu);
1811 r = 0;
1812 kvm_apic_set_version(vcpu);
1813 kvm_x86_ops->cpuid_update(vcpu);
1814
1815 out_free:
1816 vfree(cpuid_entries);
1817 out:
1818 return r;
1819 }
1820
1821 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1822 struct kvm_cpuid2 *cpuid,
1823 struct kvm_cpuid_entry2 __user *entries)
1824 {
1825 int r;
1826
1827 r = -E2BIG;
1828 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1829 goto out;
1830 r = -EFAULT;
1831 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1832 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1833 goto out;
1834 vcpu->arch.cpuid_nent = cpuid->nent;
1835 kvm_apic_set_version(vcpu);
1836 kvm_x86_ops->cpuid_update(vcpu);
1837 return 0;
1838
1839 out:
1840 return r;
1841 }
1842
1843 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1844 struct kvm_cpuid2 *cpuid,
1845 struct kvm_cpuid_entry2 __user *entries)
1846 {
1847 int r;
1848
1849 r = -E2BIG;
1850 if (cpuid->nent < vcpu->arch.cpuid_nent)
1851 goto out;
1852 r = -EFAULT;
1853 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1854 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1855 goto out;
1856 return 0;
1857
1858 out:
1859 cpuid->nent = vcpu->arch.cpuid_nent;
1860 return r;
1861 }
1862
1863 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1864 u32 index)
1865 {
1866 entry->function = function;
1867 entry->index = index;
1868 cpuid_count(entry->function, entry->index,
1869 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1870 entry->flags = 0;
1871 }
1872
1873 #define F(x) bit(X86_FEATURE_##x)
1874
1875 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1876 u32 index, int *nent, int maxnent)
1877 {
1878 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1879 #ifdef CONFIG_X86_64
1880 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
1881 ? F(GBPAGES) : 0;
1882 unsigned f_lm = F(LM);
1883 #else
1884 unsigned f_gbpages = 0;
1885 unsigned f_lm = 0;
1886 #endif
1887 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
1888
1889 /* cpuid 1.edx */
1890 const u32 kvm_supported_word0_x86_features =
1891 F(FPU) | F(VME) | F(DE) | F(PSE) |
1892 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1893 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1894 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1895 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1896 0 /* Reserved, DS, ACPI */ | F(MMX) |
1897 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1898 0 /* HTT, TM, Reserved, PBE */;
1899 /* cpuid 0x80000001.edx */
1900 const u32 kvm_supported_word1_x86_features =
1901 F(FPU) | F(VME) | F(DE) | F(PSE) |
1902 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1903 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1904 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1905 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1906 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1907 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
1908 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1909 /* cpuid 1.ecx */
1910 const u32 kvm_supported_word4_x86_features =
1911 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1912 0 /* DS-CPL, VMX, SMX, EST */ |
1913 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1914 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1915 0 /* Reserved, DCA */ | F(XMM4_1) |
1916 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1917 0 /* Reserved, XSAVE, OSXSAVE */;
1918 /* cpuid 0x80000001.ecx */
1919 const u32 kvm_supported_word6_x86_features =
1920 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1921 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1922 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1923 0 /* SKINIT */ | 0 /* WDT */;
1924
1925 /* all calls to cpuid_count() should be made on the same cpu */
1926 get_cpu();
1927 do_cpuid_1_ent(entry, function, index);
1928 ++*nent;
1929
1930 switch (function) {
1931 case 0:
1932 entry->eax = min(entry->eax, (u32)0xb);
1933 break;
1934 case 1:
1935 entry->edx &= kvm_supported_word0_x86_features;
1936 entry->ecx &= kvm_supported_word4_x86_features;
1937 /* we support x2apic emulation even if host does not support
1938 * it since we emulate x2apic in software */
1939 entry->ecx |= F(X2APIC);
1940 break;
1941 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1942 * may return different values. This forces us to get_cpu() before
1943 * issuing the first command, and also to emulate this annoying behavior
1944 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1945 case 2: {
1946 int t, times = entry->eax & 0xff;
1947
1948 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1949 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1950 for (t = 1; t < times && *nent < maxnent; ++t) {
1951 do_cpuid_1_ent(&entry[t], function, 0);
1952 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1953 ++*nent;
1954 }
1955 break;
1956 }
1957 /* function 4 and 0xb have additional index. */
1958 case 4: {
1959 int i, cache_type;
1960
1961 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1962 /* read more entries until cache_type is zero */
1963 for (i = 1; *nent < maxnent; ++i) {
1964 cache_type = entry[i - 1].eax & 0x1f;
1965 if (!cache_type)
1966 break;
1967 do_cpuid_1_ent(&entry[i], function, i);
1968 entry[i].flags |=
1969 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1970 ++*nent;
1971 }
1972 break;
1973 }
1974 case 0xb: {
1975 int i, level_type;
1976
1977 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1978 /* read more entries until level_type is zero */
1979 for (i = 1; *nent < maxnent; ++i) {
1980 level_type = entry[i - 1].ecx & 0xff00;
1981 if (!level_type)
1982 break;
1983 do_cpuid_1_ent(&entry[i], function, i);
1984 entry[i].flags |=
1985 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1986 ++*nent;
1987 }
1988 break;
1989 }
1990 case KVM_CPUID_SIGNATURE: {
1991 char signature[12] = "KVMKVMKVM\0\0";
1992 u32 *sigptr = (u32 *)signature;
1993 entry->eax = 0;
1994 entry->ebx = sigptr[0];
1995 entry->ecx = sigptr[1];
1996 entry->edx = sigptr[2];
1997 break;
1998 }
1999 case KVM_CPUID_FEATURES:
2000 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2001 (1 << KVM_FEATURE_NOP_IO_DELAY) |
2002 (1 << KVM_FEATURE_CLOCKSOURCE2) |
2003 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2004 entry->ebx = 0;
2005 entry->ecx = 0;
2006 entry->edx = 0;
2007 break;
2008 case 0x80000000:
2009 entry->eax = min(entry->eax, 0x8000001a);
2010 break;
2011 case 0x80000001:
2012 entry->edx &= kvm_supported_word1_x86_features;
2013 entry->ecx &= kvm_supported_word6_x86_features;
2014 break;
2015 }
2016
2017 kvm_x86_ops->set_supported_cpuid(function, entry);
2018
2019 put_cpu();
2020 }
2021
2022 #undef F
2023
2024 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2025 struct kvm_cpuid_entry2 __user *entries)
2026 {
2027 struct kvm_cpuid_entry2 *cpuid_entries;
2028 int limit, nent = 0, r = -E2BIG;
2029 u32 func;
2030
2031 if (cpuid->nent < 1)
2032 goto out;
2033 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2034 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2035 r = -ENOMEM;
2036 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2037 if (!cpuid_entries)
2038 goto out;
2039
2040 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2041 limit = cpuid_entries[0].eax;
2042 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2043 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2044 &nent, cpuid->nent);
2045 r = -E2BIG;
2046 if (nent >= cpuid->nent)
2047 goto out_free;
2048
2049 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2050 limit = cpuid_entries[nent - 1].eax;
2051 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2052 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2053 &nent, cpuid->nent);
2054
2055
2056
2057 r = -E2BIG;
2058 if (nent >= cpuid->nent)
2059 goto out_free;
2060
2061 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2062 cpuid->nent);
2063
2064 r = -E2BIG;
2065 if (nent >= cpuid->nent)
2066 goto out_free;
2067
2068 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2069 cpuid->nent);
2070
2071 r = -E2BIG;
2072 if (nent >= cpuid->nent)
2073 goto out_free;
2074
2075 r = -EFAULT;
2076 if (copy_to_user(entries, cpuid_entries,
2077 nent * sizeof(struct kvm_cpuid_entry2)))
2078 goto out_free;
2079 cpuid->nent = nent;
2080 r = 0;
2081
2082 out_free:
2083 vfree(cpuid_entries);
2084 out:
2085 return r;
2086 }
2087
2088 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2089 struct kvm_lapic_state *s)
2090 {
2091 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2092
2093 return 0;
2094 }
2095
2096 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2097 struct kvm_lapic_state *s)
2098 {
2099 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2100 kvm_apic_post_state_restore(vcpu);
2101 update_cr8_intercept(vcpu);
2102
2103 return 0;
2104 }
2105
2106 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2107 struct kvm_interrupt *irq)
2108 {
2109 if (irq->irq < 0 || irq->irq >= 256)
2110 return -EINVAL;
2111 if (irqchip_in_kernel(vcpu->kvm))
2112 return -ENXIO;
2113
2114 kvm_queue_interrupt(vcpu, irq->irq, false);
2115
2116 return 0;
2117 }
2118
2119 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2120 {
2121 kvm_inject_nmi(vcpu);
2122
2123 return 0;
2124 }
2125
2126 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2127 struct kvm_tpr_access_ctl *tac)
2128 {
2129 if (tac->flags)
2130 return -EINVAL;
2131 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2132 return 0;
2133 }
2134
2135 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2136 u64 mcg_cap)
2137 {
2138 int r;
2139 unsigned bank_num = mcg_cap & 0xff, bank;
2140
2141 r = -EINVAL;
2142 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2143 goto out;
2144 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2145 goto out;
2146 r = 0;
2147 vcpu->arch.mcg_cap = mcg_cap;
2148 /* Init IA32_MCG_CTL to all 1s */
2149 if (mcg_cap & MCG_CTL_P)
2150 vcpu->arch.mcg_ctl = ~(u64)0;
2151 /* Init IA32_MCi_CTL to all 1s */
2152 for (bank = 0; bank < bank_num; bank++)
2153 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2154 out:
2155 return r;
2156 }
2157
2158 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2159 struct kvm_x86_mce *mce)
2160 {
2161 u64 mcg_cap = vcpu->arch.mcg_cap;
2162 unsigned bank_num = mcg_cap & 0xff;
2163 u64 *banks = vcpu->arch.mce_banks;
2164
2165 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2166 return -EINVAL;
2167 /*
2168 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2169 * reporting is disabled
2170 */
2171 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2172 vcpu->arch.mcg_ctl != ~(u64)0)
2173 return 0;
2174 banks += 4 * mce->bank;
2175 /*
2176 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2177 * reporting is disabled for the bank
2178 */
2179 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2180 return 0;
2181 if (mce->status & MCI_STATUS_UC) {
2182 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2183 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2184 printk(KERN_DEBUG "kvm: set_mce: "
2185 "injects mce exception while "
2186 "previous one is in progress!\n");
2187 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2188 return 0;
2189 }
2190 if (banks[1] & MCI_STATUS_VAL)
2191 mce->status |= MCI_STATUS_OVER;
2192 banks[2] = mce->addr;
2193 banks[3] = mce->misc;
2194 vcpu->arch.mcg_status = mce->mcg_status;
2195 banks[1] = mce->status;
2196 kvm_queue_exception(vcpu, MC_VECTOR);
2197 } else if (!(banks[1] & MCI_STATUS_VAL)
2198 || !(banks[1] & MCI_STATUS_UC)) {
2199 if (banks[1] & MCI_STATUS_VAL)
2200 mce->status |= MCI_STATUS_OVER;
2201 banks[2] = mce->addr;
2202 banks[3] = mce->misc;
2203 banks[1] = mce->status;
2204 } else
2205 banks[1] |= MCI_STATUS_OVER;
2206 return 0;
2207 }
2208
2209 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2210 struct kvm_vcpu_events *events)
2211 {
2212 events->exception.injected =
2213 vcpu->arch.exception.pending &&
2214 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2215 events->exception.nr = vcpu->arch.exception.nr;
2216 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2217 events->exception.error_code = vcpu->arch.exception.error_code;
2218
2219 events->interrupt.injected =
2220 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2221 events->interrupt.nr = vcpu->arch.interrupt.nr;
2222 events->interrupt.soft = 0;
2223 events->interrupt.shadow =
2224 kvm_x86_ops->get_interrupt_shadow(vcpu,
2225 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2226
2227 events->nmi.injected = vcpu->arch.nmi_injected;
2228 events->nmi.pending = vcpu->arch.nmi_pending;
2229 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2230
2231 events->sipi_vector = vcpu->arch.sipi_vector;
2232
2233 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2234 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2235 | KVM_VCPUEVENT_VALID_SHADOW);
2236 }
2237
2238 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2239 struct kvm_vcpu_events *events)
2240 {
2241 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2242 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2243 | KVM_VCPUEVENT_VALID_SHADOW))
2244 return -EINVAL;
2245
2246 vcpu->arch.exception.pending = events->exception.injected;
2247 vcpu->arch.exception.nr = events->exception.nr;
2248 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2249 vcpu->arch.exception.error_code = events->exception.error_code;
2250
2251 vcpu->arch.interrupt.pending = events->interrupt.injected;
2252 vcpu->arch.interrupt.nr = events->interrupt.nr;
2253 vcpu->arch.interrupt.soft = events->interrupt.soft;
2254 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2255 kvm_pic_clear_isr_ack(vcpu->kvm);
2256 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2257 kvm_x86_ops->set_interrupt_shadow(vcpu,
2258 events->interrupt.shadow);
2259
2260 vcpu->arch.nmi_injected = events->nmi.injected;
2261 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2262 vcpu->arch.nmi_pending = events->nmi.pending;
2263 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2264
2265 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2266 vcpu->arch.sipi_vector = events->sipi_vector;
2267
2268 return 0;
2269 }
2270
2271 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2272 struct kvm_debugregs *dbgregs)
2273 {
2274 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2275 dbgregs->dr6 = vcpu->arch.dr6;
2276 dbgregs->dr7 = vcpu->arch.dr7;
2277 dbgregs->flags = 0;
2278 }
2279
2280 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2281 struct kvm_debugregs *dbgregs)
2282 {
2283 if (dbgregs->flags)
2284 return -EINVAL;
2285
2286 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2287 vcpu->arch.dr6 = dbgregs->dr6;
2288 vcpu->arch.dr7 = dbgregs->dr7;
2289
2290 return 0;
2291 }
2292
2293 long kvm_arch_vcpu_ioctl(struct file *filp,
2294 unsigned int ioctl, unsigned long arg)
2295 {
2296 struct kvm_vcpu *vcpu = filp->private_data;
2297 void __user *argp = (void __user *)arg;
2298 int r;
2299 struct kvm_lapic_state *lapic = NULL;
2300
2301 vcpu_load(vcpu);
2302 switch (ioctl) {
2303 case KVM_GET_LAPIC: {
2304 r = -EINVAL;
2305 if (!vcpu->arch.apic)
2306 goto out;
2307 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2308
2309 r = -ENOMEM;
2310 if (!lapic)
2311 goto out;
2312 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
2313 if (r)
2314 goto out;
2315 r = -EFAULT;
2316 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
2317 goto out;
2318 r = 0;
2319 break;
2320 }
2321 case KVM_SET_LAPIC: {
2322 r = -EINVAL;
2323 if (!vcpu->arch.apic)
2324 goto out;
2325 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2326 r = -ENOMEM;
2327 if (!lapic)
2328 goto out;
2329 r = -EFAULT;
2330 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
2331 goto out;
2332 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
2333 if (r)
2334 goto out;
2335 r = 0;
2336 break;
2337 }
2338 case KVM_INTERRUPT: {
2339 struct kvm_interrupt irq;
2340
2341 r = -EFAULT;
2342 if (copy_from_user(&irq, argp, sizeof irq))
2343 goto out;
2344 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2345 if (r)
2346 goto out;
2347 r = 0;
2348 break;
2349 }
2350 case KVM_NMI: {
2351 r = kvm_vcpu_ioctl_nmi(vcpu);
2352 if (r)
2353 goto out;
2354 r = 0;
2355 break;
2356 }
2357 case KVM_SET_CPUID: {
2358 struct kvm_cpuid __user *cpuid_arg = argp;
2359 struct kvm_cpuid cpuid;
2360
2361 r = -EFAULT;
2362 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2363 goto out;
2364 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2365 if (r)
2366 goto out;
2367 break;
2368 }
2369 case KVM_SET_CPUID2: {
2370 struct kvm_cpuid2 __user *cpuid_arg = argp;
2371 struct kvm_cpuid2 cpuid;
2372
2373 r = -EFAULT;
2374 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2375 goto out;
2376 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2377 cpuid_arg->entries);
2378 if (r)
2379 goto out;
2380 break;
2381 }
2382 case KVM_GET_CPUID2: {
2383 struct kvm_cpuid2 __user *cpuid_arg = argp;
2384 struct kvm_cpuid2 cpuid;
2385
2386 r = -EFAULT;
2387 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2388 goto out;
2389 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2390 cpuid_arg->entries);
2391 if (r)
2392 goto out;
2393 r = -EFAULT;
2394 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2395 goto out;
2396 r = 0;
2397 break;
2398 }
2399 case KVM_GET_MSRS:
2400 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2401 break;
2402 case KVM_SET_MSRS:
2403 r = msr_io(vcpu, argp, do_set_msr, 0);
2404 break;
2405 case KVM_TPR_ACCESS_REPORTING: {
2406 struct kvm_tpr_access_ctl tac;
2407
2408 r = -EFAULT;
2409 if (copy_from_user(&tac, argp, sizeof tac))
2410 goto out;
2411 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2412 if (r)
2413 goto out;
2414 r = -EFAULT;
2415 if (copy_to_user(argp, &tac, sizeof tac))
2416 goto out;
2417 r = 0;
2418 break;
2419 };
2420 case KVM_SET_VAPIC_ADDR: {
2421 struct kvm_vapic_addr va;
2422
2423 r = -EINVAL;
2424 if (!irqchip_in_kernel(vcpu->kvm))
2425 goto out;
2426 r = -EFAULT;
2427 if (copy_from_user(&va, argp, sizeof va))
2428 goto out;
2429 r = 0;
2430 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2431 break;
2432 }
2433 case KVM_X86_SETUP_MCE: {
2434 u64 mcg_cap;
2435
2436 r = -EFAULT;
2437 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2438 goto out;
2439 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2440 break;
2441 }
2442 case KVM_X86_SET_MCE: {
2443 struct kvm_x86_mce mce;
2444
2445 r = -EFAULT;
2446 if (copy_from_user(&mce, argp, sizeof mce))
2447 goto out;
2448 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2449 break;
2450 }
2451 case KVM_GET_VCPU_EVENTS: {
2452 struct kvm_vcpu_events events;
2453
2454 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2455
2456 r = -EFAULT;
2457 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2458 break;
2459 r = 0;
2460 break;
2461 }
2462 case KVM_SET_VCPU_EVENTS: {
2463 struct kvm_vcpu_events events;
2464
2465 r = -EFAULT;
2466 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2467 break;
2468
2469 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2470 break;
2471 }
2472 case KVM_GET_DEBUGREGS: {
2473 struct kvm_debugregs dbgregs;
2474
2475 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2476
2477 r = -EFAULT;
2478 if (copy_to_user(argp, &dbgregs,
2479 sizeof(struct kvm_debugregs)))
2480 break;
2481 r = 0;
2482 break;
2483 }
2484 case KVM_SET_DEBUGREGS: {
2485 struct kvm_debugregs dbgregs;
2486
2487 r = -EFAULT;
2488 if (copy_from_user(&dbgregs, argp,
2489 sizeof(struct kvm_debugregs)))
2490 break;
2491
2492 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2493 break;
2494 }
2495 default:
2496 r = -EINVAL;
2497 }
2498 out:
2499 vcpu_put(vcpu);
2500 kfree(lapic);
2501 return r;
2502 }
2503
2504 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2505 {
2506 int ret;
2507
2508 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2509 return -1;
2510 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2511 return ret;
2512 }
2513
2514 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2515 u64 ident_addr)
2516 {
2517 kvm->arch.ept_identity_map_addr = ident_addr;
2518 return 0;
2519 }
2520
2521 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2522 u32 kvm_nr_mmu_pages)
2523 {
2524 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2525 return -EINVAL;
2526
2527 mutex_lock(&kvm->slots_lock);
2528 spin_lock(&kvm->mmu_lock);
2529
2530 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2531 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2532
2533 spin_unlock(&kvm->mmu_lock);
2534 mutex_unlock(&kvm->slots_lock);
2535 return 0;
2536 }
2537
2538 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2539 {
2540 return kvm->arch.n_alloc_mmu_pages;
2541 }
2542
2543 gfn_t unalias_gfn_instantiation(struct kvm *kvm, gfn_t gfn)
2544 {
2545 int i;
2546 struct kvm_mem_alias *alias;
2547 struct kvm_mem_aliases *aliases;
2548
2549 aliases = kvm_aliases(kvm);
2550
2551 for (i = 0; i < aliases->naliases; ++i) {
2552 alias = &aliases->aliases[i];
2553 if (alias->flags & KVM_ALIAS_INVALID)
2554 continue;
2555 if (gfn >= alias->base_gfn
2556 && gfn < alias->base_gfn + alias->npages)
2557 return alias->target_gfn + gfn - alias->base_gfn;
2558 }
2559 return gfn;
2560 }
2561
2562 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
2563 {
2564 int i;
2565 struct kvm_mem_alias *alias;
2566 struct kvm_mem_aliases *aliases;
2567
2568 aliases = kvm_aliases(kvm);
2569
2570 for (i = 0; i < aliases->naliases; ++i) {
2571 alias = &aliases->aliases[i];
2572 if (gfn >= alias->base_gfn
2573 && gfn < alias->base_gfn + alias->npages)
2574 return alias->target_gfn + gfn - alias->base_gfn;
2575 }
2576 return gfn;
2577 }
2578
2579 /*
2580 * Set a new alias region. Aliases map a portion of physical memory into
2581 * another portion. This is useful for memory windows, for example the PC
2582 * VGA region.
2583 */
2584 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
2585 struct kvm_memory_alias *alias)
2586 {
2587 int r, n;
2588 struct kvm_mem_alias *p;
2589 struct kvm_mem_aliases *aliases, *old_aliases;
2590
2591 r = -EINVAL;
2592 /* General sanity checks */
2593 if (alias->memory_size & (PAGE_SIZE - 1))
2594 goto out;
2595 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
2596 goto out;
2597 if (alias->slot >= KVM_ALIAS_SLOTS)
2598 goto out;
2599 if (alias->guest_phys_addr + alias->memory_size
2600 < alias->guest_phys_addr)
2601 goto out;
2602 if (alias->target_phys_addr + alias->memory_size
2603 < alias->target_phys_addr)
2604 goto out;
2605
2606 r = -ENOMEM;
2607 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2608 if (!aliases)
2609 goto out;
2610
2611 mutex_lock(&kvm->slots_lock);
2612
2613 /* invalidate any gfn reference in case of deletion/shrinking */
2614 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2615 aliases->aliases[alias->slot].flags |= KVM_ALIAS_INVALID;
2616 old_aliases = kvm->arch.aliases;
2617 rcu_assign_pointer(kvm->arch.aliases, aliases);
2618 synchronize_srcu_expedited(&kvm->srcu);
2619 kvm_mmu_zap_all(kvm);
2620 kfree(old_aliases);
2621
2622 r = -ENOMEM;
2623 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2624 if (!aliases)
2625 goto out_unlock;
2626
2627 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2628
2629 p = &aliases->aliases[alias->slot];
2630 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2631 p->npages = alias->memory_size >> PAGE_SHIFT;
2632 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2633 p->flags &= ~(KVM_ALIAS_INVALID);
2634
2635 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2636 if (aliases->aliases[n - 1].npages)
2637 break;
2638 aliases->naliases = n;
2639
2640 old_aliases = kvm->arch.aliases;
2641 rcu_assign_pointer(kvm->arch.aliases, aliases);
2642 synchronize_srcu_expedited(&kvm->srcu);
2643 kfree(old_aliases);
2644 r = 0;
2645
2646 out_unlock:
2647 mutex_unlock(&kvm->slots_lock);
2648 out:
2649 return r;
2650 }
2651
2652 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2653 {
2654 int r;
2655
2656 r = 0;
2657 switch (chip->chip_id) {
2658 case KVM_IRQCHIP_PIC_MASTER:
2659 memcpy(&chip->chip.pic,
2660 &pic_irqchip(kvm)->pics[0],
2661 sizeof(struct kvm_pic_state));
2662 break;
2663 case KVM_IRQCHIP_PIC_SLAVE:
2664 memcpy(&chip->chip.pic,
2665 &pic_irqchip(kvm)->pics[1],
2666 sizeof(struct kvm_pic_state));
2667 break;
2668 case KVM_IRQCHIP_IOAPIC:
2669 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2670 break;
2671 default:
2672 r = -EINVAL;
2673 break;
2674 }
2675 return r;
2676 }
2677
2678 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2679 {
2680 int r;
2681
2682 r = 0;
2683 switch (chip->chip_id) {
2684 case KVM_IRQCHIP_PIC_MASTER:
2685 raw_spin_lock(&pic_irqchip(kvm)->lock);
2686 memcpy(&pic_irqchip(kvm)->pics[0],
2687 &chip->chip.pic,
2688 sizeof(struct kvm_pic_state));
2689 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2690 break;
2691 case KVM_IRQCHIP_PIC_SLAVE:
2692 raw_spin_lock(&pic_irqchip(kvm)->lock);
2693 memcpy(&pic_irqchip(kvm)->pics[1],
2694 &chip->chip.pic,
2695 sizeof(struct kvm_pic_state));
2696 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2697 break;
2698 case KVM_IRQCHIP_IOAPIC:
2699 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2700 break;
2701 default:
2702 r = -EINVAL;
2703 break;
2704 }
2705 kvm_pic_update_irq(pic_irqchip(kvm));
2706 return r;
2707 }
2708
2709 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2710 {
2711 int r = 0;
2712
2713 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2714 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2715 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2716 return r;
2717 }
2718
2719 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2720 {
2721 int r = 0;
2722
2723 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2724 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2725 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2726 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2727 return r;
2728 }
2729
2730 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2731 {
2732 int r = 0;
2733
2734 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2735 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2736 sizeof(ps->channels));
2737 ps->flags = kvm->arch.vpit->pit_state.flags;
2738 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2739 return r;
2740 }
2741
2742 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2743 {
2744 int r = 0, start = 0;
2745 u32 prev_legacy, cur_legacy;
2746 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2747 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2748 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2749 if (!prev_legacy && cur_legacy)
2750 start = 1;
2751 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2752 sizeof(kvm->arch.vpit->pit_state.channels));
2753 kvm->arch.vpit->pit_state.flags = ps->flags;
2754 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2755 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2756 return r;
2757 }
2758
2759 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2760 struct kvm_reinject_control *control)
2761 {
2762 if (!kvm->arch.vpit)
2763 return -ENXIO;
2764 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2765 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2766 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2767 return 0;
2768 }
2769
2770 /*
2771 * Get (and clear) the dirty memory log for a memory slot.
2772 */
2773 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2774 struct kvm_dirty_log *log)
2775 {
2776 int r, i;
2777 struct kvm_memory_slot *memslot;
2778 unsigned long n;
2779 unsigned long is_dirty = 0;
2780
2781 mutex_lock(&kvm->slots_lock);
2782
2783 r = -EINVAL;
2784 if (log->slot >= KVM_MEMORY_SLOTS)
2785 goto out;
2786
2787 memslot = &kvm->memslots->memslots[log->slot];
2788 r = -ENOENT;
2789 if (!memslot->dirty_bitmap)
2790 goto out;
2791
2792 n = kvm_dirty_bitmap_bytes(memslot);
2793
2794 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
2795 is_dirty = memslot->dirty_bitmap[i];
2796
2797 /* If nothing is dirty, don't bother messing with page tables. */
2798 if (is_dirty) {
2799 struct kvm_memslots *slots, *old_slots;
2800 unsigned long *dirty_bitmap;
2801
2802 spin_lock(&kvm->mmu_lock);
2803 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2804 spin_unlock(&kvm->mmu_lock);
2805
2806 r = -ENOMEM;
2807 dirty_bitmap = vmalloc(n);
2808 if (!dirty_bitmap)
2809 goto out;
2810 memset(dirty_bitmap, 0, n);
2811
2812 r = -ENOMEM;
2813 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
2814 if (!slots) {
2815 vfree(dirty_bitmap);
2816 goto out;
2817 }
2818 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
2819 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
2820
2821 old_slots = kvm->memslots;
2822 rcu_assign_pointer(kvm->memslots, slots);
2823 synchronize_srcu_expedited(&kvm->srcu);
2824 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
2825 kfree(old_slots);
2826
2827 r = -EFAULT;
2828 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
2829 vfree(dirty_bitmap);
2830 goto out;
2831 }
2832 vfree(dirty_bitmap);
2833 } else {
2834 r = -EFAULT;
2835 if (clear_user(log->dirty_bitmap, n))
2836 goto out;
2837 }
2838
2839 r = 0;
2840 out:
2841 mutex_unlock(&kvm->slots_lock);
2842 return r;
2843 }
2844
2845 long kvm_arch_vm_ioctl(struct file *filp,
2846 unsigned int ioctl, unsigned long arg)
2847 {
2848 struct kvm *kvm = filp->private_data;
2849 void __user *argp = (void __user *)arg;
2850 int r = -ENOTTY;
2851 /*
2852 * This union makes it completely explicit to gcc-3.x
2853 * that these two variables' stack usage should be
2854 * combined, not added together.
2855 */
2856 union {
2857 struct kvm_pit_state ps;
2858 struct kvm_pit_state2 ps2;
2859 struct kvm_memory_alias alias;
2860 struct kvm_pit_config pit_config;
2861 } u;
2862
2863 switch (ioctl) {
2864 case KVM_SET_TSS_ADDR:
2865 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2866 if (r < 0)
2867 goto out;
2868 break;
2869 case KVM_SET_IDENTITY_MAP_ADDR: {
2870 u64 ident_addr;
2871
2872 r = -EFAULT;
2873 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2874 goto out;
2875 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2876 if (r < 0)
2877 goto out;
2878 break;
2879 }
2880 case KVM_SET_MEMORY_REGION: {
2881 struct kvm_memory_region kvm_mem;
2882 struct kvm_userspace_memory_region kvm_userspace_mem;
2883
2884 r = -EFAULT;
2885 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2886 goto out;
2887 kvm_userspace_mem.slot = kvm_mem.slot;
2888 kvm_userspace_mem.flags = kvm_mem.flags;
2889 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2890 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2891 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2892 if (r)
2893 goto out;
2894 break;
2895 }
2896 case KVM_SET_NR_MMU_PAGES:
2897 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2898 if (r)
2899 goto out;
2900 break;
2901 case KVM_GET_NR_MMU_PAGES:
2902 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2903 break;
2904 case KVM_SET_MEMORY_ALIAS:
2905 r = -EFAULT;
2906 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2907 goto out;
2908 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2909 if (r)
2910 goto out;
2911 break;
2912 case KVM_CREATE_IRQCHIP: {
2913 struct kvm_pic *vpic;
2914
2915 mutex_lock(&kvm->lock);
2916 r = -EEXIST;
2917 if (kvm->arch.vpic)
2918 goto create_irqchip_unlock;
2919 r = -ENOMEM;
2920 vpic = kvm_create_pic(kvm);
2921 if (vpic) {
2922 r = kvm_ioapic_init(kvm);
2923 if (r) {
2924 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
2925 &vpic->dev);
2926 kfree(vpic);
2927 goto create_irqchip_unlock;
2928 }
2929 } else
2930 goto create_irqchip_unlock;
2931 smp_wmb();
2932 kvm->arch.vpic = vpic;
2933 smp_wmb();
2934 r = kvm_setup_default_irq_routing(kvm);
2935 if (r) {
2936 mutex_lock(&kvm->irq_lock);
2937 kvm_ioapic_destroy(kvm);
2938 kvm_destroy_pic(kvm);
2939 mutex_unlock(&kvm->irq_lock);
2940 }
2941 create_irqchip_unlock:
2942 mutex_unlock(&kvm->lock);
2943 break;
2944 }
2945 case KVM_CREATE_PIT:
2946 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2947 goto create_pit;
2948 case KVM_CREATE_PIT2:
2949 r = -EFAULT;
2950 if (copy_from_user(&u.pit_config, argp,
2951 sizeof(struct kvm_pit_config)))
2952 goto out;
2953 create_pit:
2954 mutex_lock(&kvm->slots_lock);
2955 r = -EEXIST;
2956 if (kvm->arch.vpit)
2957 goto create_pit_unlock;
2958 r = -ENOMEM;
2959 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2960 if (kvm->arch.vpit)
2961 r = 0;
2962 create_pit_unlock:
2963 mutex_unlock(&kvm->slots_lock);
2964 break;
2965 case KVM_IRQ_LINE_STATUS:
2966 case KVM_IRQ_LINE: {
2967 struct kvm_irq_level irq_event;
2968
2969 r = -EFAULT;
2970 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2971 goto out;
2972 r = -ENXIO;
2973 if (irqchip_in_kernel(kvm)) {
2974 __s32 status;
2975 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2976 irq_event.irq, irq_event.level);
2977 if (ioctl == KVM_IRQ_LINE_STATUS) {
2978 r = -EFAULT;
2979 irq_event.status = status;
2980 if (copy_to_user(argp, &irq_event,
2981 sizeof irq_event))
2982 goto out;
2983 }
2984 r = 0;
2985 }
2986 break;
2987 }
2988 case KVM_GET_IRQCHIP: {
2989 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2990 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2991
2992 r = -ENOMEM;
2993 if (!chip)
2994 goto out;
2995 r = -EFAULT;
2996 if (copy_from_user(chip, argp, sizeof *chip))
2997 goto get_irqchip_out;
2998 r = -ENXIO;
2999 if (!irqchip_in_kernel(kvm))
3000 goto get_irqchip_out;
3001 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3002 if (r)
3003 goto get_irqchip_out;
3004 r = -EFAULT;
3005 if (copy_to_user(argp, chip, sizeof *chip))
3006 goto get_irqchip_out;
3007 r = 0;
3008 get_irqchip_out:
3009 kfree(chip);
3010 if (r)
3011 goto out;
3012 break;
3013 }
3014 case KVM_SET_IRQCHIP: {
3015 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3016 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3017
3018 r = -ENOMEM;
3019 if (!chip)
3020 goto out;
3021 r = -EFAULT;
3022 if (copy_from_user(chip, argp, sizeof *chip))
3023 goto set_irqchip_out;
3024 r = -ENXIO;
3025 if (!irqchip_in_kernel(kvm))
3026 goto set_irqchip_out;
3027 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3028 if (r)
3029 goto set_irqchip_out;
3030 r = 0;
3031 set_irqchip_out:
3032 kfree(chip);
3033 if (r)
3034 goto out;
3035 break;
3036 }
3037 case KVM_GET_PIT: {
3038 r = -EFAULT;
3039 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3040 goto out;
3041 r = -ENXIO;
3042 if (!kvm->arch.vpit)
3043 goto out;
3044 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3045 if (r)
3046 goto out;
3047 r = -EFAULT;
3048 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3049 goto out;
3050 r = 0;
3051 break;
3052 }
3053 case KVM_SET_PIT: {
3054 r = -EFAULT;
3055 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3056 goto out;
3057 r = -ENXIO;
3058 if (!kvm->arch.vpit)
3059 goto out;
3060 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3061 if (r)
3062 goto out;
3063 r = 0;
3064 break;
3065 }
3066 case KVM_GET_PIT2: {
3067 r = -ENXIO;
3068 if (!kvm->arch.vpit)
3069 goto out;
3070 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3071 if (r)
3072 goto out;
3073 r = -EFAULT;
3074 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3075 goto out;
3076 r = 0;
3077 break;
3078 }
3079 case KVM_SET_PIT2: {
3080 r = -EFAULT;
3081 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3082 goto out;
3083 r = -ENXIO;
3084 if (!kvm->arch.vpit)
3085 goto out;
3086 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3087 if (r)
3088 goto out;
3089 r = 0;
3090 break;
3091 }
3092 case KVM_REINJECT_CONTROL: {
3093 struct kvm_reinject_control control;
3094 r = -EFAULT;
3095 if (copy_from_user(&control, argp, sizeof(control)))
3096 goto out;
3097 r = kvm_vm_ioctl_reinject(kvm, &control);
3098 if (r)
3099 goto out;
3100 r = 0;
3101 break;
3102 }
3103 case KVM_XEN_HVM_CONFIG: {
3104 r = -EFAULT;
3105 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3106 sizeof(struct kvm_xen_hvm_config)))
3107 goto out;
3108 r = -EINVAL;
3109 if (kvm->arch.xen_hvm_config.flags)
3110 goto out;
3111 r = 0;
3112 break;
3113 }
3114 case KVM_SET_CLOCK: {
3115 struct timespec now;
3116 struct kvm_clock_data user_ns;
3117 u64 now_ns;
3118 s64 delta;
3119
3120 r = -EFAULT;
3121 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3122 goto out;
3123
3124 r = -EINVAL;
3125 if (user_ns.flags)
3126 goto out;
3127
3128 r = 0;
3129 ktime_get_ts(&now);
3130 now_ns = timespec_to_ns(&now);
3131 delta = user_ns.clock - now_ns;
3132 kvm->arch.kvmclock_offset = delta;
3133 break;
3134 }
3135 case KVM_GET_CLOCK: {
3136 struct timespec now;
3137 struct kvm_clock_data user_ns;
3138 u64 now_ns;
3139
3140 ktime_get_ts(&now);
3141 now_ns = timespec_to_ns(&now);
3142 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3143 user_ns.flags = 0;
3144
3145 r = -EFAULT;
3146 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3147 goto out;
3148 r = 0;
3149 break;
3150 }
3151
3152 default:
3153 ;
3154 }
3155 out:
3156 return r;
3157 }
3158
3159 static void kvm_init_msr_list(void)
3160 {
3161 u32 dummy[2];
3162 unsigned i, j;
3163
3164 /* skip the first msrs in the list. KVM-specific */
3165 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3166 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3167 continue;
3168 if (j < i)
3169 msrs_to_save[j] = msrs_to_save[i];
3170 j++;
3171 }
3172 num_msrs_to_save = j;
3173 }
3174
3175 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3176 const void *v)
3177 {
3178 if (vcpu->arch.apic &&
3179 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3180 return 0;
3181
3182 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3183 }
3184
3185 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3186 {
3187 if (vcpu->arch.apic &&
3188 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3189 return 0;
3190
3191 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3192 }
3193
3194 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3195 struct kvm_segment *var, int seg)
3196 {
3197 kvm_x86_ops->set_segment(vcpu, var, seg);
3198 }
3199
3200 void kvm_get_segment(struct kvm_vcpu *vcpu,
3201 struct kvm_segment *var, int seg)
3202 {
3203 kvm_x86_ops->get_segment(vcpu, var, seg);
3204 }
3205
3206 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3207 {
3208 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3209 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3210 }
3211
3212 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3213 {
3214 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3215 access |= PFERR_FETCH_MASK;
3216 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3217 }
3218
3219 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3220 {
3221 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3222 access |= PFERR_WRITE_MASK;
3223 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3224 }
3225
3226 /* uses this to access any guest's mapped memory without checking CPL */
3227 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3228 {
3229 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error);
3230 }
3231
3232 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3233 struct kvm_vcpu *vcpu, u32 access,
3234 u32 *error)
3235 {
3236 void *data = val;
3237 int r = X86EMUL_CONTINUE;
3238
3239 while (bytes) {
3240 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error);
3241 unsigned offset = addr & (PAGE_SIZE-1);
3242 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3243 int ret;
3244
3245 if (gpa == UNMAPPED_GVA) {
3246 r = X86EMUL_PROPAGATE_FAULT;
3247 goto out;
3248 }
3249 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3250 if (ret < 0) {
3251 r = X86EMUL_IO_NEEDED;
3252 goto out;
3253 }
3254
3255 bytes -= toread;
3256 data += toread;
3257 addr += toread;
3258 }
3259 out:
3260 return r;
3261 }
3262
3263 /* used for instruction fetching */
3264 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3265 struct kvm_vcpu *vcpu, u32 *error)
3266 {
3267 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3268 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3269 access | PFERR_FETCH_MASK, error);
3270 }
3271
3272 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3273 struct kvm_vcpu *vcpu, u32 *error)
3274 {
3275 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3276 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3277 error);
3278 }
3279
3280 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3281 struct kvm_vcpu *vcpu, u32 *error)
3282 {
3283 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3284 }
3285
3286 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3287 unsigned int bytes,
3288 struct kvm_vcpu *vcpu,
3289 u32 *error)
3290 {
3291 void *data = val;
3292 int r = X86EMUL_CONTINUE;
3293
3294 while (bytes) {
3295 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr,
3296 PFERR_WRITE_MASK, error);
3297 unsigned offset = addr & (PAGE_SIZE-1);
3298 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3299 int ret;
3300
3301 if (gpa == UNMAPPED_GVA) {
3302 r = X86EMUL_PROPAGATE_FAULT;
3303 goto out;
3304 }
3305 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3306 if (ret < 0) {
3307 r = X86EMUL_IO_NEEDED;
3308 goto out;
3309 }
3310
3311 bytes -= towrite;
3312 data += towrite;
3313 addr += towrite;
3314 }
3315 out:
3316 return r;
3317 }
3318
3319 static int emulator_read_emulated(unsigned long addr,
3320 void *val,
3321 unsigned int bytes,
3322 unsigned int *error_code,
3323 struct kvm_vcpu *vcpu)
3324 {
3325 gpa_t gpa;
3326
3327 if (vcpu->mmio_read_completed) {
3328 memcpy(val, vcpu->mmio_data, bytes);
3329 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3330 vcpu->mmio_phys_addr, *(u64 *)val);
3331 vcpu->mmio_read_completed = 0;
3332 return X86EMUL_CONTINUE;
3333 }
3334
3335 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3336
3337 if (gpa == UNMAPPED_GVA)
3338 return X86EMUL_PROPAGATE_FAULT;
3339
3340 /* For APIC access vmexit */
3341 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3342 goto mmio;
3343
3344 if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3345 == X86EMUL_CONTINUE)
3346 return X86EMUL_CONTINUE;
3347
3348 mmio:
3349 /*
3350 * Is this MMIO handled locally?
3351 */
3352 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3353 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3354 return X86EMUL_CONTINUE;
3355 }
3356
3357 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3358
3359 vcpu->mmio_needed = 1;
3360 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3361 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3362 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3363 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3364
3365 return X86EMUL_IO_NEEDED;
3366 }
3367
3368 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3369 const void *val, int bytes)
3370 {
3371 int ret;
3372
3373 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3374 if (ret < 0)
3375 return 0;
3376 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3377 return 1;
3378 }
3379
3380 static int emulator_write_emulated_onepage(unsigned long addr,
3381 const void *val,
3382 unsigned int bytes,
3383 unsigned int *error_code,
3384 struct kvm_vcpu *vcpu)
3385 {
3386 gpa_t gpa;
3387
3388 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3389
3390 if (gpa == UNMAPPED_GVA)
3391 return X86EMUL_PROPAGATE_FAULT;
3392
3393 /* For APIC access vmexit */
3394 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3395 goto mmio;
3396
3397 if (emulator_write_phys(vcpu, gpa, val, bytes))
3398 return X86EMUL_CONTINUE;
3399
3400 mmio:
3401 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3402 /*
3403 * Is this MMIO handled locally?
3404 */
3405 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3406 return X86EMUL_CONTINUE;
3407
3408 vcpu->mmio_needed = 1;
3409 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3410 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3411 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3412 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3413 memcpy(vcpu->run->mmio.data, val, bytes);
3414
3415 return X86EMUL_CONTINUE;
3416 }
3417
3418 int emulator_write_emulated(unsigned long addr,
3419 const void *val,
3420 unsigned int bytes,
3421 unsigned int *error_code,
3422 struct kvm_vcpu *vcpu)
3423 {
3424 /* Crossing a page boundary? */
3425 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3426 int rc, now;
3427
3428 now = -addr & ~PAGE_MASK;
3429 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3430 vcpu);
3431 if (rc != X86EMUL_CONTINUE)
3432 return rc;
3433 addr += now;
3434 val += now;
3435 bytes -= now;
3436 }
3437 return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3438 vcpu);
3439 }
3440
3441 #define CMPXCHG_TYPE(t, ptr, old, new) \
3442 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3443
3444 #ifdef CONFIG_X86_64
3445 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3446 #else
3447 # define CMPXCHG64(ptr, old, new) \
3448 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3449 #endif
3450
3451 static int emulator_cmpxchg_emulated(unsigned long addr,
3452 const void *old,
3453 const void *new,
3454 unsigned int bytes,
3455 unsigned int *error_code,
3456 struct kvm_vcpu *vcpu)
3457 {
3458 gpa_t gpa;
3459 struct page *page;
3460 char *kaddr;
3461 bool exchanged;
3462
3463 /* guests cmpxchg8b have to be emulated atomically */
3464 if (bytes > 8 || (bytes & (bytes - 1)))
3465 goto emul_write;
3466
3467 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3468
3469 if (gpa == UNMAPPED_GVA ||
3470 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3471 goto emul_write;
3472
3473 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3474 goto emul_write;
3475
3476 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3477
3478 kaddr = kmap_atomic(page, KM_USER0);
3479 kaddr += offset_in_page(gpa);
3480 switch (bytes) {
3481 case 1:
3482 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3483 break;
3484 case 2:
3485 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3486 break;
3487 case 4:
3488 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3489 break;
3490 case 8:
3491 exchanged = CMPXCHG64(kaddr, old, new);
3492 break;
3493 default:
3494 BUG();
3495 }
3496 kunmap_atomic(kaddr, KM_USER0);
3497 kvm_release_page_dirty(page);
3498
3499 if (!exchanged)
3500 return X86EMUL_CMPXCHG_FAILED;
3501
3502 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3503
3504 return X86EMUL_CONTINUE;
3505
3506 emul_write:
3507 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3508
3509 return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3510 }
3511
3512 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3513 {
3514 /* TODO: String I/O for in kernel device */
3515 int r;
3516
3517 if (vcpu->arch.pio.in)
3518 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3519 vcpu->arch.pio.size, pd);
3520 else
3521 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3522 vcpu->arch.pio.port, vcpu->arch.pio.size,
3523 pd);
3524 return r;
3525 }
3526
3527
3528 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3529 unsigned int count, struct kvm_vcpu *vcpu)
3530 {
3531 if (vcpu->arch.pio.count)
3532 goto data_avail;
3533
3534 trace_kvm_pio(1, port, size, 1);
3535
3536 vcpu->arch.pio.port = port;
3537 vcpu->arch.pio.in = 1;
3538 vcpu->arch.pio.count = count;
3539 vcpu->arch.pio.size = size;
3540
3541 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3542 data_avail:
3543 memcpy(val, vcpu->arch.pio_data, size * count);
3544 vcpu->arch.pio.count = 0;
3545 return 1;
3546 }
3547
3548 vcpu->run->exit_reason = KVM_EXIT_IO;
3549 vcpu->run->io.direction = KVM_EXIT_IO_IN;
3550 vcpu->run->io.size = size;
3551 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3552 vcpu->run->io.count = count;
3553 vcpu->run->io.port = port;
3554
3555 return 0;
3556 }
3557
3558 static int emulator_pio_out_emulated(int size, unsigned short port,
3559 const void *val, unsigned int count,
3560 struct kvm_vcpu *vcpu)
3561 {
3562 trace_kvm_pio(0, port, size, 1);
3563
3564 vcpu->arch.pio.port = port;
3565 vcpu->arch.pio.in = 0;
3566 vcpu->arch.pio.count = count;
3567 vcpu->arch.pio.size = size;
3568
3569 memcpy(vcpu->arch.pio_data, val, size * count);
3570
3571 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3572 vcpu->arch.pio.count = 0;
3573 return 1;
3574 }
3575
3576 vcpu->run->exit_reason = KVM_EXIT_IO;
3577 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3578 vcpu->run->io.size = size;
3579 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3580 vcpu->run->io.count = count;
3581 vcpu->run->io.port = port;
3582
3583 return 0;
3584 }
3585
3586 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3587 {
3588 return kvm_x86_ops->get_segment_base(vcpu, seg);
3589 }
3590
3591 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3592 {
3593 kvm_mmu_invlpg(vcpu, address);
3594 return X86EMUL_CONTINUE;
3595 }
3596
3597 int emulate_clts(struct kvm_vcpu *vcpu)
3598 {
3599 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3600 kvm_x86_ops->fpu_activate(vcpu);
3601 return X86EMUL_CONTINUE;
3602 }
3603
3604 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
3605 {
3606 return _kvm_get_dr(vcpu, dr, dest);
3607 }
3608
3609 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
3610 {
3611
3612 return __kvm_set_dr(vcpu, dr, value);
3613 }
3614
3615 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3616 {
3617 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3618 }
3619
3620 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3621 {
3622 unsigned long value;
3623
3624 switch (cr) {
3625 case 0:
3626 value = kvm_read_cr0(vcpu);
3627 break;
3628 case 2:
3629 value = vcpu->arch.cr2;
3630 break;
3631 case 3:
3632 value = vcpu->arch.cr3;
3633 break;
3634 case 4:
3635 value = kvm_read_cr4(vcpu);
3636 break;
3637 case 8:
3638 value = kvm_get_cr8(vcpu);
3639 break;
3640 default:
3641 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3642 return 0;
3643 }
3644
3645 return value;
3646 }
3647
3648 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
3649 {
3650 int res = 0;
3651
3652 switch (cr) {
3653 case 0:
3654 res = __kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3655 break;
3656 case 2:
3657 vcpu->arch.cr2 = val;
3658 break;
3659 case 3:
3660 res = __kvm_set_cr3(vcpu, val);
3661 break;
3662 case 4:
3663 res = __kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3664 break;
3665 case 8:
3666 res = __kvm_set_cr8(vcpu, val & 0xfUL);
3667 break;
3668 default:
3669 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3670 res = -1;
3671 }
3672
3673 return res;
3674 }
3675
3676 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
3677 {
3678 return kvm_x86_ops->get_cpl(vcpu);
3679 }
3680
3681 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3682 {
3683 kvm_x86_ops->get_gdt(vcpu, dt);
3684 }
3685
3686 static unsigned long emulator_get_cached_segment_base(int seg,
3687 struct kvm_vcpu *vcpu)
3688 {
3689 return get_segment_base(vcpu, seg);
3690 }
3691
3692 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
3693 struct kvm_vcpu *vcpu)
3694 {
3695 struct kvm_segment var;
3696
3697 kvm_get_segment(vcpu, &var, seg);
3698
3699 if (var.unusable)
3700 return false;
3701
3702 if (var.g)
3703 var.limit >>= 12;
3704 set_desc_limit(desc, var.limit);
3705 set_desc_base(desc, (unsigned long)var.base);
3706 desc->type = var.type;
3707 desc->s = var.s;
3708 desc->dpl = var.dpl;
3709 desc->p = var.present;
3710 desc->avl = var.avl;
3711 desc->l = var.l;
3712 desc->d = var.db;
3713 desc->g = var.g;
3714
3715 return true;
3716 }
3717
3718 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
3719 struct kvm_vcpu *vcpu)
3720 {
3721 struct kvm_segment var;
3722
3723 /* needed to preserve selector */
3724 kvm_get_segment(vcpu, &var, seg);
3725
3726 var.base = get_desc_base(desc);
3727 var.limit = get_desc_limit(desc);
3728 if (desc->g)
3729 var.limit = (var.limit << 12) | 0xfff;
3730 var.type = desc->type;
3731 var.present = desc->p;
3732 var.dpl = desc->dpl;
3733 var.db = desc->d;
3734 var.s = desc->s;
3735 var.l = desc->l;
3736 var.g = desc->g;
3737 var.avl = desc->avl;
3738 var.present = desc->p;
3739 var.unusable = !var.present;
3740 var.padding = 0;
3741
3742 kvm_set_segment(vcpu, &var, seg);
3743 return;
3744 }
3745
3746 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
3747 {
3748 struct kvm_segment kvm_seg;
3749
3750 kvm_get_segment(vcpu, &kvm_seg, seg);
3751 return kvm_seg.selector;
3752 }
3753
3754 static void emulator_set_segment_selector(u16 sel, int seg,
3755 struct kvm_vcpu *vcpu)
3756 {
3757 struct kvm_segment kvm_seg;
3758
3759 kvm_get_segment(vcpu, &kvm_seg, seg);
3760 kvm_seg.selector = sel;
3761 kvm_set_segment(vcpu, &kvm_seg, seg);
3762 }
3763
3764 static struct x86_emulate_ops emulate_ops = {
3765 .read_std = kvm_read_guest_virt_system,
3766 .write_std = kvm_write_guest_virt_system,
3767 .fetch = kvm_fetch_guest_virt,
3768 .read_emulated = emulator_read_emulated,
3769 .write_emulated = emulator_write_emulated,
3770 .cmpxchg_emulated = emulator_cmpxchg_emulated,
3771 .pio_in_emulated = emulator_pio_in_emulated,
3772 .pio_out_emulated = emulator_pio_out_emulated,
3773 .get_cached_descriptor = emulator_get_cached_descriptor,
3774 .set_cached_descriptor = emulator_set_cached_descriptor,
3775 .get_segment_selector = emulator_get_segment_selector,
3776 .set_segment_selector = emulator_set_segment_selector,
3777 .get_cached_segment_base = emulator_get_cached_segment_base,
3778 .get_gdt = emulator_get_gdt,
3779 .get_cr = emulator_get_cr,
3780 .set_cr = emulator_set_cr,
3781 .cpl = emulator_get_cpl,
3782 .get_dr = emulator_get_dr,
3783 .set_dr = emulator_set_dr,
3784 .set_msr = kvm_set_msr,
3785 .get_msr = kvm_get_msr,
3786 };
3787
3788 static void cache_all_regs(struct kvm_vcpu *vcpu)
3789 {
3790 kvm_register_read(vcpu, VCPU_REGS_RAX);
3791 kvm_register_read(vcpu, VCPU_REGS_RSP);
3792 kvm_register_read(vcpu, VCPU_REGS_RIP);
3793 vcpu->arch.regs_dirty = ~0;
3794 }
3795
3796 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
3797 {
3798 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
3799 /*
3800 * an sti; sti; sequence only disable interrupts for the first
3801 * instruction. So, if the last instruction, be it emulated or
3802 * not, left the system with the INT_STI flag enabled, it
3803 * means that the last instruction is an sti. We should not
3804 * leave the flag on in this case. The same goes for mov ss
3805 */
3806 if (!(int_shadow & mask))
3807 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
3808 }
3809
3810 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
3811 {
3812 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
3813 if (ctxt->exception == PF_VECTOR)
3814 kvm_inject_page_fault(vcpu, ctxt->cr2, ctxt->error_code);
3815 else if (ctxt->error_code_valid)
3816 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
3817 else
3818 kvm_queue_exception(vcpu, ctxt->exception);
3819 }
3820
3821 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
3822 {
3823 ++vcpu->stat.insn_emulation_fail;
3824 trace_kvm_emulate_insn_failed(vcpu);
3825 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
3826 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
3827 vcpu->run->internal.ndata = 0;
3828 kvm_queue_exception(vcpu, UD_VECTOR);
3829 return EMULATE_FAIL;
3830 }
3831
3832 int emulate_instruction(struct kvm_vcpu *vcpu,
3833 unsigned long cr2,
3834 u16 error_code,
3835 int emulation_type)
3836 {
3837 int r;
3838 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
3839
3840 kvm_clear_exception_queue(vcpu);
3841 vcpu->arch.mmio_fault_cr2 = cr2;
3842 /*
3843 * TODO: fix emulate.c to use guest_read/write_register
3844 * instead of direct ->regs accesses, can save hundred cycles
3845 * on Intel for instructions that don't read/change RSP, for
3846 * for example.
3847 */
3848 cache_all_regs(vcpu);
3849
3850 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
3851 int cs_db, cs_l;
3852 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3853
3854 vcpu->arch.emulate_ctxt.vcpu = vcpu;
3855 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
3856 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
3857 vcpu->arch.emulate_ctxt.mode =
3858 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
3859 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
3860 ? X86EMUL_MODE_VM86 : cs_l
3861 ? X86EMUL_MODE_PROT64 : cs_db
3862 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
3863 memset(c, 0, sizeof(struct decode_cache));
3864 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
3865 vcpu->arch.emulate_ctxt.interruptibility = 0;
3866 vcpu->arch.emulate_ctxt.exception = -1;
3867
3868 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3869 trace_kvm_emulate_insn_start(vcpu);
3870
3871 /* Only allow emulation of specific instructions on #UD
3872 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3873 if (emulation_type & EMULTYPE_TRAP_UD) {
3874 if (!c->twobyte)
3875 return EMULATE_FAIL;
3876 switch (c->b) {
3877 case 0x01: /* VMMCALL */
3878 if (c->modrm_mod != 3 || c->modrm_rm != 1)
3879 return EMULATE_FAIL;
3880 break;
3881 case 0x34: /* sysenter */
3882 case 0x35: /* sysexit */
3883 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3884 return EMULATE_FAIL;
3885 break;
3886 case 0x05: /* syscall */
3887 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3888 return EMULATE_FAIL;
3889 break;
3890 default:
3891 return EMULATE_FAIL;
3892 }
3893
3894 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
3895 return EMULATE_FAIL;
3896 }
3897
3898 ++vcpu->stat.insn_emulation;
3899 if (r) {
3900 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3901 return EMULATE_DONE;
3902 if (emulation_type & EMULTYPE_SKIP)
3903 return EMULATE_FAIL;
3904 return handle_emulation_failure(vcpu);
3905 }
3906 }
3907
3908 if (emulation_type & EMULTYPE_SKIP) {
3909 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
3910 return EMULATE_DONE;
3911 }
3912
3913 /* this is needed for vmware backdor interface to work since it
3914 changes registers values during IO operation */
3915 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
3916
3917 restart:
3918 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3919
3920 if (r) { /* emulation failed */
3921 /*
3922 * if emulation was due to access to shadowed page table
3923 * and it failed try to unshadow page and re-entetr the
3924 * guest to let CPU execute the instruction.
3925 */
3926 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3927 return EMULATE_DONE;
3928
3929 return handle_emulation_failure(vcpu);
3930 }
3931
3932 toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
3933 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
3934 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
3935 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
3936
3937 if (vcpu->arch.emulate_ctxt.exception >= 0) {
3938 inject_emulated_exception(vcpu);
3939 return EMULATE_DONE;
3940 }
3941
3942 if (vcpu->arch.pio.count) {
3943 if (!vcpu->arch.pio.in)
3944 vcpu->arch.pio.count = 0;
3945 return EMULATE_DO_MMIO;
3946 }
3947
3948 if (vcpu->mmio_needed) {
3949 if (vcpu->mmio_is_write)
3950 vcpu->mmio_needed = 0;
3951 return EMULATE_DO_MMIO;
3952 }
3953
3954 if (vcpu->arch.emulate_ctxt.restart)
3955 goto restart;
3956
3957 return EMULATE_DONE;
3958 }
3959 EXPORT_SYMBOL_GPL(emulate_instruction);
3960
3961 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
3962 {
3963 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3964 int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
3965 /* do not return to emulator after return from userspace */
3966 vcpu->arch.pio.count = 0;
3967 return ret;
3968 }
3969 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
3970
3971 static void bounce_off(void *info)
3972 {
3973 /* nothing */
3974 }
3975
3976 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3977 void *data)
3978 {
3979 struct cpufreq_freqs *freq = data;
3980 struct kvm *kvm;
3981 struct kvm_vcpu *vcpu;
3982 int i, send_ipi = 0;
3983
3984 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3985 return 0;
3986 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3987 return 0;
3988 per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
3989
3990 spin_lock(&kvm_lock);
3991 list_for_each_entry(kvm, &vm_list, vm_list) {
3992 kvm_for_each_vcpu(i, vcpu, kvm) {
3993 if (vcpu->cpu != freq->cpu)
3994 continue;
3995 if (!kvm_request_guest_time_update(vcpu))
3996 continue;
3997 if (vcpu->cpu != smp_processor_id())
3998 send_ipi++;
3999 }
4000 }
4001 spin_unlock(&kvm_lock);
4002
4003 if (freq->old < freq->new && send_ipi) {
4004 /*
4005 * We upscale the frequency. Must make the guest
4006 * doesn't see old kvmclock values while running with
4007 * the new frequency, otherwise we risk the guest sees
4008 * time go backwards.
4009 *
4010 * In case we update the frequency for another cpu
4011 * (which might be in guest context) send an interrupt
4012 * to kick the cpu out of guest context. Next time
4013 * guest context is entered kvmclock will be updated,
4014 * so the guest will not see stale values.
4015 */
4016 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
4017 }
4018 return 0;
4019 }
4020
4021 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4022 .notifier_call = kvmclock_cpufreq_notifier
4023 };
4024
4025 static void kvm_timer_init(void)
4026 {
4027 int cpu;
4028
4029 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4030 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4031 CPUFREQ_TRANSITION_NOTIFIER);
4032 for_each_online_cpu(cpu) {
4033 unsigned long khz = cpufreq_get(cpu);
4034 if (!khz)
4035 khz = tsc_khz;
4036 per_cpu(cpu_tsc_khz, cpu) = khz;
4037 }
4038 } else {
4039 for_each_possible_cpu(cpu)
4040 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
4041 }
4042 }
4043
4044 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4045
4046 static int kvm_is_in_guest(void)
4047 {
4048 return percpu_read(current_vcpu) != NULL;
4049 }
4050
4051 static int kvm_is_user_mode(void)
4052 {
4053 int user_mode = 3;
4054
4055 if (percpu_read(current_vcpu))
4056 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4057
4058 return user_mode != 0;
4059 }
4060
4061 static unsigned long kvm_get_guest_ip(void)
4062 {
4063 unsigned long ip = 0;
4064
4065 if (percpu_read(current_vcpu))
4066 ip = kvm_rip_read(percpu_read(current_vcpu));
4067
4068 return ip;
4069 }
4070
4071 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4072 .is_in_guest = kvm_is_in_guest,
4073 .is_user_mode = kvm_is_user_mode,
4074 .get_guest_ip = kvm_get_guest_ip,
4075 };
4076
4077 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4078 {
4079 percpu_write(current_vcpu, vcpu);
4080 }
4081 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4082
4083 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4084 {
4085 percpu_write(current_vcpu, NULL);
4086 }
4087 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4088
4089 int kvm_arch_init(void *opaque)
4090 {
4091 int r;
4092 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4093
4094 if (kvm_x86_ops) {
4095 printk(KERN_ERR "kvm: already loaded the other module\n");
4096 r = -EEXIST;
4097 goto out;
4098 }
4099
4100 if (!ops->cpu_has_kvm_support()) {
4101 printk(KERN_ERR "kvm: no hardware support\n");
4102 r = -EOPNOTSUPP;
4103 goto out;
4104 }
4105 if (ops->disabled_by_bios()) {
4106 printk(KERN_ERR "kvm: disabled by bios\n");
4107 r = -EOPNOTSUPP;
4108 goto out;
4109 }
4110
4111 r = kvm_mmu_module_init();
4112 if (r)
4113 goto out;
4114
4115 kvm_init_msr_list();
4116
4117 kvm_x86_ops = ops;
4118 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4119 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4120 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4121 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4122
4123 kvm_timer_init();
4124
4125 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4126
4127 return 0;
4128
4129 out:
4130 return r;
4131 }
4132
4133 void kvm_arch_exit(void)
4134 {
4135 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4136
4137 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4138 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4139 CPUFREQ_TRANSITION_NOTIFIER);
4140 kvm_x86_ops = NULL;
4141 kvm_mmu_module_exit();
4142 }
4143
4144 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4145 {
4146 ++vcpu->stat.halt_exits;
4147 if (irqchip_in_kernel(vcpu->kvm)) {
4148 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4149 return 1;
4150 } else {
4151 vcpu->run->exit_reason = KVM_EXIT_HLT;
4152 return 0;
4153 }
4154 }
4155 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4156
4157 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4158 unsigned long a1)
4159 {
4160 if (is_long_mode(vcpu))
4161 return a0;
4162 else
4163 return a0 | ((gpa_t)a1 << 32);
4164 }
4165
4166 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4167 {
4168 u64 param, ingpa, outgpa, ret;
4169 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4170 bool fast, longmode;
4171 int cs_db, cs_l;
4172
4173 /*
4174 * hypercall generates UD from non zero cpl and real mode
4175 * per HYPER-V spec
4176 */
4177 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4178 kvm_queue_exception(vcpu, UD_VECTOR);
4179 return 0;
4180 }
4181
4182 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4183 longmode = is_long_mode(vcpu) && cs_l == 1;
4184
4185 if (!longmode) {
4186 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4187 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4188 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4189 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4190 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4191 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4192 }
4193 #ifdef CONFIG_X86_64
4194 else {
4195 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4196 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4197 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4198 }
4199 #endif
4200
4201 code = param & 0xffff;
4202 fast = (param >> 16) & 0x1;
4203 rep_cnt = (param >> 32) & 0xfff;
4204 rep_idx = (param >> 48) & 0xfff;
4205
4206 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4207
4208 switch (code) {
4209 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4210 kvm_vcpu_on_spin(vcpu);
4211 break;
4212 default:
4213 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4214 break;
4215 }
4216
4217 ret = res | (((u64)rep_done & 0xfff) << 32);
4218 if (longmode) {
4219 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4220 } else {
4221 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4222 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4223 }
4224
4225 return 1;
4226 }
4227
4228 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4229 {
4230 unsigned long nr, a0, a1, a2, a3, ret;
4231 int r = 1;
4232
4233 if (kvm_hv_hypercall_enabled(vcpu->kvm))
4234 return kvm_hv_hypercall(vcpu);
4235
4236 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4237 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4238 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4239 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4240 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4241
4242 trace_kvm_hypercall(nr, a0, a1, a2, a3);
4243
4244 if (!is_long_mode(vcpu)) {
4245 nr &= 0xFFFFFFFF;
4246 a0 &= 0xFFFFFFFF;
4247 a1 &= 0xFFFFFFFF;
4248 a2 &= 0xFFFFFFFF;
4249 a3 &= 0xFFFFFFFF;
4250 }
4251
4252 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4253 ret = -KVM_EPERM;
4254 goto out;
4255 }
4256
4257 switch (nr) {
4258 case KVM_HC_VAPIC_POLL_IRQ:
4259 ret = 0;
4260 break;
4261 case KVM_HC_MMU_OP:
4262 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4263 break;
4264 default:
4265 ret = -KVM_ENOSYS;
4266 break;
4267 }
4268 out:
4269 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4270 ++vcpu->stat.hypercalls;
4271 return r;
4272 }
4273 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4274
4275 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4276 {
4277 char instruction[3];
4278 unsigned long rip = kvm_rip_read(vcpu);
4279
4280 /*
4281 * Blow out the MMU to ensure that no other VCPU has an active mapping
4282 * to ensure that the updated hypercall appears atomically across all
4283 * VCPUs.
4284 */
4285 kvm_mmu_zap_all(vcpu->kvm);
4286
4287 kvm_x86_ops->patch_hypercall(vcpu, instruction);
4288
4289 return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4290 }
4291
4292 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4293 {
4294 struct desc_ptr dt = { limit, base };
4295
4296 kvm_x86_ops->set_gdt(vcpu, &dt);
4297 }
4298
4299 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4300 {
4301 struct desc_ptr dt = { limit, base };
4302
4303 kvm_x86_ops->set_idt(vcpu, &dt);
4304 }
4305
4306 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4307 {
4308 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4309 int j, nent = vcpu->arch.cpuid_nent;
4310
4311 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4312 /* when no next entry is found, the current entry[i] is reselected */
4313 for (j = i + 1; ; j = (j + 1) % nent) {
4314 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4315 if (ej->function == e->function) {
4316 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4317 return j;
4318 }
4319 }
4320 return 0; /* silence gcc, even though control never reaches here */
4321 }
4322
4323 /* find an entry with matching function, matching index (if needed), and that
4324 * should be read next (if it's stateful) */
4325 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4326 u32 function, u32 index)
4327 {
4328 if (e->function != function)
4329 return 0;
4330 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4331 return 0;
4332 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4333 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4334 return 0;
4335 return 1;
4336 }
4337
4338 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4339 u32 function, u32 index)
4340 {
4341 int i;
4342 struct kvm_cpuid_entry2 *best = NULL;
4343
4344 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4345 struct kvm_cpuid_entry2 *e;
4346
4347 e = &vcpu->arch.cpuid_entries[i];
4348 if (is_matching_cpuid_entry(e, function, index)) {
4349 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4350 move_to_next_stateful_cpuid_entry(vcpu, i);
4351 best = e;
4352 break;
4353 }
4354 /*
4355 * Both basic or both extended?
4356 */
4357 if (((e->function ^ function) & 0x80000000) == 0)
4358 if (!best || e->function > best->function)
4359 best = e;
4360 }
4361 return best;
4362 }
4363 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4364
4365 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4366 {
4367 struct kvm_cpuid_entry2 *best;
4368
4369 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4370 if (!best || best->eax < 0x80000008)
4371 goto not_found;
4372 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4373 if (best)
4374 return best->eax & 0xff;
4375 not_found:
4376 return 36;
4377 }
4378
4379 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4380 {
4381 u32 function, index;
4382 struct kvm_cpuid_entry2 *best;
4383
4384 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4385 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4386 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4387 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4388 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4389 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4390 best = kvm_find_cpuid_entry(vcpu, function, index);
4391 if (best) {
4392 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4393 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4394 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4395 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4396 }
4397 kvm_x86_ops->skip_emulated_instruction(vcpu);
4398 trace_kvm_cpuid(function,
4399 kvm_register_read(vcpu, VCPU_REGS_RAX),
4400 kvm_register_read(vcpu, VCPU_REGS_RBX),
4401 kvm_register_read(vcpu, VCPU_REGS_RCX),
4402 kvm_register_read(vcpu, VCPU_REGS_RDX));
4403 }
4404 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4405
4406 /*
4407 * Check if userspace requested an interrupt window, and that the
4408 * interrupt window is open.
4409 *
4410 * No need to exit to userspace if we already have an interrupt queued.
4411 */
4412 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4413 {
4414 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4415 vcpu->run->request_interrupt_window &&
4416 kvm_arch_interrupt_allowed(vcpu));
4417 }
4418
4419 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4420 {
4421 struct kvm_run *kvm_run = vcpu->run;
4422
4423 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4424 kvm_run->cr8 = kvm_get_cr8(vcpu);
4425 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4426 if (irqchip_in_kernel(vcpu->kvm))
4427 kvm_run->ready_for_interrupt_injection = 1;
4428 else
4429 kvm_run->ready_for_interrupt_injection =
4430 kvm_arch_interrupt_allowed(vcpu) &&
4431 !kvm_cpu_has_interrupt(vcpu) &&
4432 !kvm_event_needs_reinjection(vcpu);
4433 }
4434
4435 static void vapic_enter(struct kvm_vcpu *vcpu)
4436 {
4437 struct kvm_lapic *apic = vcpu->arch.apic;
4438 struct page *page;
4439
4440 if (!apic || !apic->vapic_addr)
4441 return;
4442
4443 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4444
4445 vcpu->arch.apic->vapic_page = page;
4446 }
4447
4448 static void vapic_exit(struct kvm_vcpu *vcpu)
4449 {
4450 struct kvm_lapic *apic = vcpu->arch.apic;
4451 int idx;
4452
4453 if (!apic || !apic->vapic_addr)
4454 return;
4455
4456 idx = srcu_read_lock(&vcpu->kvm->srcu);
4457 kvm_release_page_dirty(apic->vapic_page);
4458 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4459 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4460 }
4461
4462 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4463 {
4464 int max_irr, tpr;
4465
4466 if (!kvm_x86_ops->update_cr8_intercept)
4467 return;
4468
4469 if (!vcpu->arch.apic)
4470 return;
4471
4472 if (!vcpu->arch.apic->vapic_addr)
4473 max_irr = kvm_lapic_find_highest_irr(vcpu);
4474 else
4475 max_irr = -1;
4476
4477 if (max_irr != -1)
4478 max_irr >>= 4;
4479
4480 tpr = kvm_lapic_get_cr8(vcpu);
4481
4482 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4483 }
4484
4485 static void inject_pending_event(struct kvm_vcpu *vcpu)
4486 {
4487 /* try to reinject previous events if any */
4488 if (vcpu->arch.exception.pending) {
4489 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4490 vcpu->arch.exception.has_error_code,
4491 vcpu->arch.exception.error_code);
4492 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4493 vcpu->arch.exception.has_error_code,
4494 vcpu->arch.exception.error_code,
4495 vcpu->arch.exception.reinject);
4496 return;
4497 }
4498
4499 if (vcpu->arch.nmi_injected) {
4500 kvm_x86_ops->set_nmi(vcpu);
4501 return;
4502 }
4503
4504 if (vcpu->arch.interrupt.pending) {
4505 kvm_x86_ops->set_irq(vcpu);
4506 return;
4507 }
4508
4509 /* try to inject new event if pending */
4510 if (vcpu->arch.nmi_pending) {
4511 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4512 vcpu->arch.nmi_pending = false;
4513 vcpu->arch.nmi_injected = true;
4514 kvm_x86_ops->set_nmi(vcpu);
4515 }
4516 } else if (kvm_cpu_has_interrupt(vcpu)) {
4517 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4518 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4519 false);
4520 kvm_x86_ops->set_irq(vcpu);
4521 }
4522 }
4523 }
4524
4525 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4526 {
4527 int r;
4528 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4529 vcpu->run->request_interrupt_window;
4530
4531 if (vcpu->requests)
4532 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
4533 kvm_mmu_unload(vcpu);
4534
4535 r = kvm_mmu_reload(vcpu);
4536 if (unlikely(r))
4537 goto out;
4538
4539 if (vcpu->requests) {
4540 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
4541 __kvm_migrate_timers(vcpu);
4542 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
4543 kvm_write_guest_time(vcpu);
4544 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
4545 kvm_mmu_sync_roots(vcpu);
4546 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
4547 kvm_x86_ops->tlb_flush(vcpu);
4548 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
4549 &vcpu->requests)) {
4550 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4551 r = 0;
4552 goto out;
4553 }
4554 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
4555 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4556 r = 0;
4557 goto out;
4558 }
4559 if (test_and_clear_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests)) {
4560 vcpu->fpu_active = 0;
4561 kvm_x86_ops->fpu_deactivate(vcpu);
4562 }
4563 }
4564
4565 preempt_disable();
4566
4567 kvm_x86_ops->prepare_guest_switch(vcpu);
4568 if (vcpu->fpu_active)
4569 kvm_load_guest_fpu(vcpu);
4570
4571 atomic_set(&vcpu->guest_mode, 1);
4572 smp_wmb();
4573
4574 local_irq_disable();
4575
4576 if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
4577 || need_resched() || signal_pending(current)) {
4578 atomic_set(&vcpu->guest_mode, 0);
4579 smp_wmb();
4580 local_irq_enable();
4581 preempt_enable();
4582 r = 1;
4583 goto out;
4584 }
4585
4586 inject_pending_event(vcpu);
4587
4588 /* enable NMI/IRQ window open exits if needed */
4589 if (vcpu->arch.nmi_pending)
4590 kvm_x86_ops->enable_nmi_window(vcpu);
4591 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4592 kvm_x86_ops->enable_irq_window(vcpu);
4593
4594 if (kvm_lapic_enabled(vcpu)) {
4595 update_cr8_intercept(vcpu);
4596 kvm_lapic_sync_to_vapic(vcpu);
4597 }
4598
4599 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4600
4601 kvm_guest_enter();
4602
4603 if (unlikely(vcpu->arch.switch_db_regs)) {
4604 set_debugreg(0, 7);
4605 set_debugreg(vcpu->arch.eff_db[0], 0);
4606 set_debugreg(vcpu->arch.eff_db[1], 1);
4607 set_debugreg(vcpu->arch.eff_db[2], 2);
4608 set_debugreg(vcpu->arch.eff_db[3], 3);
4609 }
4610
4611 trace_kvm_entry(vcpu->vcpu_id);
4612 kvm_x86_ops->run(vcpu);
4613
4614 /*
4615 * If the guest has used debug registers, at least dr7
4616 * will be disabled while returning to the host.
4617 * If we don't have active breakpoints in the host, we don't
4618 * care about the messed up debug address registers. But if
4619 * we have some of them active, restore the old state.
4620 */
4621 if (hw_breakpoint_active())
4622 hw_breakpoint_restore();
4623
4624 atomic_set(&vcpu->guest_mode, 0);
4625 smp_wmb();
4626 local_irq_enable();
4627
4628 ++vcpu->stat.exits;
4629
4630 /*
4631 * We must have an instruction between local_irq_enable() and
4632 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4633 * the interrupt shadow. The stat.exits increment will do nicely.
4634 * But we need to prevent reordering, hence this barrier():
4635 */
4636 barrier();
4637
4638 kvm_guest_exit();
4639
4640 preempt_enable();
4641
4642 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4643
4644 /*
4645 * Profile KVM exit RIPs:
4646 */
4647 if (unlikely(prof_on == KVM_PROFILING)) {
4648 unsigned long rip = kvm_rip_read(vcpu);
4649 profile_hit(KVM_PROFILING, (void *)rip);
4650 }
4651
4652
4653 kvm_lapic_sync_from_vapic(vcpu);
4654
4655 r = kvm_x86_ops->handle_exit(vcpu);
4656 out:
4657 return r;
4658 }
4659
4660
4661 static int __vcpu_run(struct kvm_vcpu *vcpu)
4662 {
4663 int r;
4664 struct kvm *kvm = vcpu->kvm;
4665
4666 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
4667 pr_debug("vcpu %d received sipi with vector # %x\n",
4668 vcpu->vcpu_id, vcpu->arch.sipi_vector);
4669 kvm_lapic_reset(vcpu);
4670 r = kvm_arch_vcpu_reset(vcpu);
4671 if (r)
4672 return r;
4673 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4674 }
4675
4676 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4677 vapic_enter(vcpu);
4678
4679 r = 1;
4680 while (r > 0) {
4681 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
4682 r = vcpu_enter_guest(vcpu);
4683 else {
4684 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4685 kvm_vcpu_block(vcpu);
4686 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4687 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
4688 {
4689 switch(vcpu->arch.mp_state) {
4690 case KVM_MP_STATE_HALTED:
4691 vcpu->arch.mp_state =
4692 KVM_MP_STATE_RUNNABLE;
4693 case KVM_MP_STATE_RUNNABLE:
4694 break;
4695 case KVM_MP_STATE_SIPI_RECEIVED:
4696 default:
4697 r = -EINTR;
4698 break;
4699 }
4700 }
4701 }
4702
4703 if (r <= 0)
4704 break;
4705
4706 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
4707 if (kvm_cpu_has_pending_timer(vcpu))
4708 kvm_inject_pending_timer_irqs(vcpu);
4709
4710 if (dm_request_for_irq_injection(vcpu)) {
4711 r = -EINTR;
4712 vcpu->run->exit_reason = KVM_EXIT_INTR;
4713 ++vcpu->stat.request_irq_exits;
4714 }
4715 if (signal_pending(current)) {
4716 r = -EINTR;
4717 vcpu->run->exit_reason = KVM_EXIT_INTR;
4718 ++vcpu->stat.signal_exits;
4719 }
4720 if (need_resched()) {
4721 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4722 kvm_resched(vcpu);
4723 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4724 }
4725 }
4726
4727 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4728
4729 vapic_exit(vcpu);
4730
4731 return r;
4732 }
4733
4734 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
4735 {
4736 int r;
4737 sigset_t sigsaved;
4738
4739 if (vcpu->sigset_active)
4740 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
4741
4742 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
4743 kvm_vcpu_block(vcpu);
4744 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
4745 r = -EAGAIN;
4746 goto out;
4747 }
4748
4749 /* re-sync apic's tpr */
4750 if (!irqchip_in_kernel(vcpu->kvm))
4751 kvm_set_cr8(vcpu, kvm_run->cr8);
4752
4753 if (vcpu->arch.pio.count || vcpu->mmio_needed ||
4754 vcpu->arch.emulate_ctxt.restart) {
4755 if (vcpu->mmio_needed) {
4756 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
4757 vcpu->mmio_read_completed = 1;
4758 vcpu->mmio_needed = 0;
4759 }
4760 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4761 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
4762 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4763 if (r != EMULATE_DONE) {
4764 r = 0;
4765 goto out;
4766 }
4767 }
4768 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
4769 kvm_register_write(vcpu, VCPU_REGS_RAX,
4770 kvm_run->hypercall.ret);
4771
4772 r = __vcpu_run(vcpu);
4773
4774 out:
4775 post_kvm_run_save(vcpu);
4776 if (vcpu->sigset_active)
4777 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
4778
4779 return r;
4780 }
4781
4782 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4783 {
4784 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4785 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4786 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4787 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4788 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4789 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4790 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4791 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4792 #ifdef CONFIG_X86_64
4793 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
4794 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
4795 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
4796 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
4797 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
4798 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
4799 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
4800 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
4801 #endif
4802
4803 regs->rip = kvm_rip_read(vcpu);
4804 regs->rflags = kvm_get_rflags(vcpu);
4805
4806 return 0;
4807 }
4808
4809 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4810 {
4811 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
4812 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
4813 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
4814 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
4815 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
4816 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
4817 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
4818 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
4819 #ifdef CONFIG_X86_64
4820 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
4821 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
4822 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
4823 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
4824 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
4825 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
4826 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
4827 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
4828 #endif
4829
4830 kvm_rip_write(vcpu, regs->rip);
4831 kvm_set_rflags(vcpu, regs->rflags);
4832
4833 vcpu->arch.exception.pending = false;
4834
4835 return 0;
4836 }
4837
4838 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
4839 {
4840 struct kvm_segment cs;
4841
4842 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
4843 *db = cs.db;
4844 *l = cs.l;
4845 }
4846 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
4847
4848 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
4849 struct kvm_sregs *sregs)
4850 {
4851 struct desc_ptr dt;
4852
4853 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4854 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4855 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4856 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4857 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4858 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4859
4860 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4861 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4862
4863 kvm_x86_ops->get_idt(vcpu, &dt);
4864 sregs->idt.limit = dt.size;
4865 sregs->idt.base = dt.address;
4866 kvm_x86_ops->get_gdt(vcpu, &dt);
4867 sregs->gdt.limit = dt.size;
4868 sregs->gdt.base = dt.address;
4869
4870 sregs->cr0 = kvm_read_cr0(vcpu);
4871 sregs->cr2 = vcpu->arch.cr2;
4872 sregs->cr3 = vcpu->arch.cr3;
4873 sregs->cr4 = kvm_read_cr4(vcpu);
4874 sregs->cr8 = kvm_get_cr8(vcpu);
4875 sregs->efer = vcpu->arch.efer;
4876 sregs->apic_base = kvm_get_apic_base(vcpu);
4877
4878 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
4879
4880 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
4881 set_bit(vcpu->arch.interrupt.nr,
4882 (unsigned long *)sregs->interrupt_bitmap);
4883
4884 return 0;
4885 }
4886
4887 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
4888 struct kvm_mp_state *mp_state)
4889 {
4890 mp_state->mp_state = vcpu->arch.mp_state;
4891 return 0;
4892 }
4893
4894 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
4895 struct kvm_mp_state *mp_state)
4896 {
4897 vcpu->arch.mp_state = mp_state->mp_state;
4898 return 0;
4899 }
4900
4901 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
4902 bool has_error_code, u32 error_code)
4903 {
4904 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4905 int cs_db, cs_l, ret;
4906 cache_all_regs(vcpu);
4907
4908 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4909
4910 vcpu->arch.emulate_ctxt.vcpu = vcpu;
4911 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4912 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4913 vcpu->arch.emulate_ctxt.mode =
4914 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4915 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4916 ? X86EMUL_MODE_VM86 : cs_l
4917 ? X86EMUL_MODE_PROT64 : cs_db
4918 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4919 memset(c, 0, sizeof(struct decode_cache));
4920 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4921
4922 ret = emulator_task_switch(&vcpu->arch.emulate_ctxt, &emulate_ops,
4923 tss_selector, reason, has_error_code,
4924 error_code);
4925
4926 if (ret)
4927 return EMULATE_FAIL;
4928
4929 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4930 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4931 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4932 return EMULATE_DONE;
4933 }
4934 EXPORT_SYMBOL_GPL(kvm_task_switch);
4935
4936 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4937 struct kvm_sregs *sregs)
4938 {
4939 int mmu_reset_needed = 0;
4940 int pending_vec, max_bits;
4941 struct desc_ptr dt;
4942
4943 dt.size = sregs->idt.limit;
4944 dt.address = sregs->idt.base;
4945 kvm_x86_ops->set_idt(vcpu, &dt);
4946 dt.size = sregs->gdt.limit;
4947 dt.address = sregs->gdt.base;
4948 kvm_x86_ops->set_gdt(vcpu, &dt);
4949
4950 vcpu->arch.cr2 = sregs->cr2;
4951 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4952 vcpu->arch.cr3 = sregs->cr3;
4953
4954 kvm_set_cr8(vcpu, sregs->cr8);
4955
4956 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
4957 kvm_x86_ops->set_efer(vcpu, sregs->efer);
4958 kvm_set_apic_base(vcpu, sregs->apic_base);
4959
4960 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
4961 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4962 vcpu->arch.cr0 = sregs->cr0;
4963
4964 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
4965 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4966 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
4967 load_pdptrs(vcpu, vcpu->arch.cr3);
4968 mmu_reset_needed = 1;
4969 }
4970
4971 if (mmu_reset_needed)
4972 kvm_mmu_reset_context(vcpu);
4973
4974 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4975 pending_vec = find_first_bit(
4976 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4977 if (pending_vec < max_bits) {
4978 kvm_queue_interrupt(vcpu, pending_vec, false);
4979 pr_debug("Set back pending irq %d\n", pending_vec);
4980 if (irqchip_in_kernel(vcpu->kvm))
4981 kvm_pic_clear_isr_ack(vcpu->kvm);
4982 }
4983
4984 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4985 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4986 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4987 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4988 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4989 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4990
4991 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4992 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4993
4994 update_cr8_intercept(vcpu);
4995
4996 /* Older userspace won't unhalt the vcpu on reset. */
4997 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
4998 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4999 !is_protmode(vcpu))
5000 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5001
5002 return 0;
5003 }
5004
5005 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5006 struct kvm_guest_debug *dbg)
5007 {
5008 unsigned long rflags;
5009 int i, r;
5010
5011 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5012 r = -EBUSY;
5013 if (vcpu->arch.exception.pending)
5014 goto out;
5015 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5016 kvm_queue_exception(vcpu, DB_VECTOR);
5017 else
5018 kvm_queue_exception(vcpu, BP_VECTOR);
5019 }
5020
5021 /*
5022 * Read rflags as long as potentially injected trace flags are still
5023 * filtered out.
5024 */
5025 rflags = kvm_get_rflags(vcpu);
5026
5027 vcpu->guest_debug = dbg->control;
5028 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5029 vcpu->guest_debug = 0;
5030
5031 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5032 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5033 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5034 vcpu->arch.switch_db_regs =
5035 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5036 } else {
5037 for (i = 0; i < KVM_NR_DB_REGS; i++)
5038 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5039 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5040 }
5041
5042 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5043 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5044 get_segment_base(vcpu, VCPU_SREG_CS);
5045
5046 /*
5047 * Trigger an rflags update that will inject or remove the trace
5048 * flags.
5049 */
5050 kvm_set_rflags(vcpu, rflags);
5051
5052 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5053
5054 r = 0;
5055
5056 out:
5057
5058 return r;
5059 }
5060
5061 /*
5062 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
5063 * we have asm/x86/processor.h
5064 */
5065 struct fxsave {
5066 u16 cwd;
5067 u16 swd;
5068 u16 twd;
5069 u16 fop;
5070 u64 rip;
5071 u64 rdp;
5072 u32 mxcsr;
5073 u32 mxcsr_mask;
5074 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
5075 #ifdef CONFIG_X86_64
5076 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
5077 #else
5078 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
5079 #endif
5080 };
5081
5082 /*
5083 * Translate a guest virtual address to a guest physical address.
5084 */
5085 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5086 struct kvm_translation *tr)
5087 {
5088 unsigned long vaddr = tr->linear_address;
5089 gpa_t gpa;
5090 int idx;
5091
5092 idx = srcu_read_lock(&vcpu->kvm->srcu);
5093 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5094 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5095 tr->physical_address = gpa;
5096 tr->valid = gpa != UNMAPPED_GVA;
5097 tr->writeable = 1;
5098 tr->usermode = 0;
5099
5100 return 0;
5101 }
5102
5103 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5104 {
5105 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
5106
5107 memcpy(fpu->fpr, fxsave->st_space, 128);
5108 fpu->fcw = fxsave->cwd;
5109 fpu->fsw = fxsave->swd;
5110 fpu->ftwx = fxsave->twd;
5111 fpu->last_opcode = fxsave->fop;
5112 fpu->last_ip = fxsave->rip;
5113 fpu->last_dp = fxsave->rdp;
5114 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5115
5116 return 0;
5117 }
5118
5119 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5120 {
5121 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
5122
5123 memcpy(fxsave->st_space, fpu->fpr, 128);
5124 fxsave->cwd = fpu->fcw;
5125 fxsave->swd = fpu->fsw;
5126 fxsave->twd = fpu->ftwx;
5127 fxsave->fop = fpu->last_opcode;
5128 fxsave->rip = fpu->last_ip;
5129 fxsave->rdp = fpu->last_dp;
5130 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5131
5132 return 0;
5133 }
5134
5135 void fx_init(struct kvm_vcpu *vcpu)
5136 {
5137 unsigned after_mxcsr_mask;
5138
5139 /*
5140 * Touch the fpu the first time in non atomic context as if
5141 * this is the first fpu instruction the exception handler
5142 * will fire before the instruction returns and it'll have to
5143 * allocate ram with GFP_KERNEL.
5144 */
5145 if (!used_math())
5146 kvm_fx_save(&vcpu->arch.host_fx_image);
5147
5148 /* Initialize guest FPU by resetting ours and saving into guest's */
5149 preempt_disable();
5150 kvm_fx_save(&vcpu->arch.host_fx_image);
5151 kvm_fx_finit();
5152 kvm_fx_save(&vcpu->arch.guest_fx_image);
5153 kvm_fx_restore(&vcpu->arch.host_fx_image);
5154 preempt_enable();
5155
5156 vcpu->arch.cr0 |= X86_CR0_ET;
5157 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
5158 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
5159 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
5160 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
5161 }
5162 EXPORT_SYMBOL_GPL(fx_init);
5163
5164 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5165 {
5166 if (vcpu->guest_fpu_loaded)
5167 return;
5168
5169 vcpu->guest_fpu_loaded = 1;
5170 kvm_fx_save(&vcpu->arch.host_fx_image);
5171 kvm_fx_restore(&vcpu->arch.guest_fx_image);
5172 trace_kvm_fpu(1);
5173 }
5174
5175 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5176 {
5177 if (!vcpu->guest_fpu_loaded)
5178 return;
5179
5180 vcpu->guest_fpu_loaded = 0;
5181 kvm_fx_save(&vcpu->arch.guest_fx_image);
5182 kvm_fx_restore(&vcpu->arch.host_fx_image);
5183 ++vcpu->stat.fpu_reload;
5184 set_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests);
5185 trace_kvm_fpu(0);
5186 }
5187
5188 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5189 {
5190 if (vcpu->arch.time_page) {
5191 kvm_release_page_dirty(vcpu->arch.time_page);
5192 vcpu->arch.time_page = NULL;
5193 }
5194
5195 kvm_x86_ops->vcpu_free(vcpu);
5196 }
5197
5198 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5199 unsigned int id)
5200 {
5201 return kvm_x86_ops->vcpu_create(kvm, id);
5202 }
5203
5204 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5205 {
5206 int r;
5207
5208 /* We do fxsave: this must be aligned. */
5209 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
5210
5211 vcpu->arch.mtrr_state.have_fixed = 1;
5212 vcpu_load(vcpu);
5213 r = kvm_arch_vcpu_reset(vcpu);
5214 if (r == 0)
5215 r = kvm_mmu_setup(vcpu);
5216 vcpu_put(vcpu);
5217 if (r < 0)
5218 goto free_vcpu;
5219
5220 return 0;
5221 free_vcpu:
5222 kvm_x86_ops->vcpu_free(vcpu);
5223 return r;
5224 }
5225
5226 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5227 {
5228 vcpu_load(vcpu);
5229 kvm_mmu_unload(vcpu);
5230 vcpu_put(vcpu);
5231
5232 kvm_x86_ops->vcpu_free(vcpu);
5233 }
5234
5235 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5236 {
5237 vcpu->arch.nmi_pending = false;
5238 vcpu->arch.nmi_injected = false;
5239
5240 vcpu->arch.switch_db_regs = 0;
5241 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5242 vcpu->arch.dr6 = DR6_FIXED_1;
5243 vcpu->arch.dr7 = DR7_FIXED_1;
5244
5245 return kvm_x86_ops->vcpu_reset(vcpu);
5246 }
5247
5248 int kvm_arch_hardware_enable(void *garbage)
5249 {
5250 /*
5251 * Since this may be called from a hotplug notifcation,
5252 * we can't get the CPU frequency directly.
5253 */
5254 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5255 int cpu = raw_smp_processor_id();
5256 per_cpu(cpu_tsc_khz, cpu) = 0;
5257 }
5258
5259 kvm_shared_msr_cpu_online();
5260
5261 return kvm_x86_ops->hardware_enable(garbage);
5262 }
5263
5264 void kvm_arch_hardware_disable(void *garbage)
5265 {
5266 kvm_x86_ops->hardware_disable(garbage);
5267 drop_user_return_notifiers(garbage);
5268 }
5269
5270 int kvm_arch_hardware_setup(void)
5271 {
5272 return kvm_x86_ops->hardware_setup();
5273 }
5274
5275 void kvm_arch_hardware_unsetup(void)
5276 {
5277 kvm_x86_ops->hardware_unsetup();
5278 }
5279
5280 void kvm_arch_check_processor_compat(void *rtn)
5281 {
5282 kvm_x86_ops->check_processor_compatibility(rtn);
5283 }
5284
5285 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5286 {
5287 struct page *page;
5288 struct kvm *kvm;
5289 int r;
5290
5291 BUG_ON(vcpu->kvm == NULL);
5292 kvm = vcpu->kvm;
5293
5294 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5295 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5296 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5297 else
5298 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5299
5300 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5301 if (!page) {
5302 r = -ENOMEM;
5303 goto fail;
5304 }
5305 vcpu->arch.pio_data = page_address(page);
5306
5307 r = kvm_mmu_create(vcpu);
5308 if (r < 0)
5309 goto fail_free_pio_data;
5310
5311 if (irqchip_in_kernel(kvm)) {
5312 r = kvm_create_lapic(vcpu);
5313 if (r < 0)
5314 goto fail_mmu_destroy;
5315 }
5316
5317 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5318 GFP_KERNEL);
5319 if (!vcpu->arch.mce_banks) {
5320 r = -ENOMEM;
5321 goto fail_free_lapic;
5322 }
5323 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5324
5325 return 0;
5326 fail_free_lapic:
5327 kvm_free_lapic(vcpu);
5328 fail_mmu_destroy:
5329 kvm_mmu_destroy(vcpu);
5330 fail_free_pio_data:
5331 free_page((unsigned long)vcpu->arch.pio_data);
5332 fail:
5333 return r;
5334 }
5335
5336 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5337 {
5338 int idx;
5339
5340 kfree(vcpu->arch.mce_banks);
5341 kvm_free_lapic(vcpu);
5342 idx = srcu_read_lock(&vcpu->kvm->srcu);
5343 kvm_mmu_destroy(vcpu);
5344 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5345 free_page((unsigned long)vcpu->arch.pio_data);
5346 }
5347
5348 struct kvm *kvm_arch_create_vm(void)
5349 {
5350 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5351
5352 if (!kvm)
5353 return ERR_PTR(-ENOMEM);
5354
5355 kvm->arch.aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
5356 if (!kvm->arch.aliases) {
5357 kfree(kvm);
5358 return ERR_PTR(-ENOMEM);
5359 }
5360
5361 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5362 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5363
5364 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5365 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5366
5367 rdtscll(kvm->arch.vm_init_tsc);
5368
5369 return kvm;
5370 }
5371
5372 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5373 {
5374 vcpu_load(vcpu);
5375 kvm_mmu_unload(vcpu);
5376 vcpu_put(vcpu);
5377 }
5378
5379 static void kvm_free_vcpus(struct kvm *kvm)
5380 {
5381 unsigned int i;
5382 struct kvm_vcpu *vcpu;
5383
5384 /*
5385 * Unpin any mmu pages first.
5386 */
5387 kvm_for_each_vcpu(i, vcpu, kvm)
5388 kvm_unload_vcpu_mmu(vcpu);
5389 kvm_for_each_vcpu(i, vcpu, kvm)
5390 kvm_arch_vcpu_free(vcpu);
5391
5392 mutex_lock(&kvm->lock);
5393 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5394 kvm->vcpus[i] = NULL;
5395
5396 atomic_set(&kvm->online_vcpus, 0);
5397 mutex_unlock(&kvm->lock);
5398 }
5399
5400 void kvm_arch_sync_events(struct kvm *kvm)
5401 {
5402 kvm_free_all_assigned_devices(kvm);
5403 }
5404
5405 void kvm_arch_destroy_vm(struct kvm *kvm)
5406 {
5407 kvm_iommu_unmap_guest(kvm);
5408 kvm_free_pit(kvm);
5409 kfree(kvm->arch.vpic);
5410 kfree(kvm->arch.vioapic);
5411 kvm_free_vcpus(kvm);
5412 kvm_free_physmem(kvm);
5413 if (kvm->arch.apic_access_page)
5414 put_page(kvm->arch.apic_access_page);
5415 if (kvm->arch.ept_identity_pagetable)
5416 put_page(kvm->arch.ept_identity_pagetable);
5417 cleanup_srcu_struct(&kvm->srcu);
5418 kfree(kvm->arch.aliases);
5419 kfree(kvm);
5420 }
5421
5422 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5423 struct kvm_memory_slot *memslot,
5424 struct kvm_memory_slot old,
5425 struct kvm_userspace_memory_region *mem,
5426 int user_alloc)
5427 {
5428 int npages = memslot->npages;
5429
5430 /*To keep backward compatibility with older userspace,
5431 *x86 needs to hanlde !user_alloc case.
5432 */
5433 if (!user_alloc) {
5434 if (npages && !old.rmap) {
5435 unsigned long userspace_addr;
5436
5437 down_write(&current->mm->mmap_sem);
5438 userspace_addr = do_mmap(NULL, 0,
5439 npages * PAGE_SIZE,
5440 PROT_READ | PROT_WRITE,
5441 MAP_PRIVATE | MAP_ANONYMOUS,
5442 0);
5443 up_write(&current->mm->mmap_sem);
5444
5445 if (IS_ERR((void *)userspace_addr))
5446 return PTR_ERR((void *)userspace_addr);
5447
5448 memslot->userspace_addr = userspace_addr;
5449 }
5450 }
5451
5452
5453 return 0;
5454 }
5455
5456 void kvm_arch_commit_memory_region(struct kvm *kvm,
5457 struct kvm_userspace_memory_region *mem,
5458 struct kvm_memory_slot old,
5459 int user_alloc)
5460 {
5461
5462 int npages = mem->memory_size >> PAGE_SHIFT;
5463
5464 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5465 int ret;
5466
5467 down_write(&current->mm->mmap_sem);
5468 ret = do_munmap(current->mm, old.userspace_addr,
5469 old.npages * PAGE_SIZE);
5470 up_write(&current->mm->mmap_sem);
5471 if (ret < 0)
5472 printk(KERN_WARNING
5473 "kvm_vm_ioctl_set_memory_region: "
5474 "failed to munmap memory\n");
5475 }
5476
5477 spin_lock(&kvm->mmu_lock);
5478 if (!kvm->arch.n_requested_mmu_pages) {
5479 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5480 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5481 }
5482
5483 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5484 spin_unlock(&kvm->mmu_lock);
5485 }
5486
5487 void kvm_arch_flush_shadow(struct kvm *kvm)
5488 {
5489 kvm_mmu_zap_all(kvm);
5490 kvm_reload_remote_mmus(kvm);
5491 }
5492
5493 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5494 {
5495 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5496 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5497 || vcpu->arch.nmi_pending ||
5498 (kvm_arch_interrupt_allowed(vcpu) &&
5499 kvm_cpu_has_interrupt(vcpu));
5500 }
5501
5502 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5503 {
5504 int me;
5505 int cpu = vcpu->cpu;
5506
5507 if (waitqueue_active(&vcpu->wq)) {
5508 wake_up_interruptible(&vcpu->wq);
5509 ++vcpu->stat.halt_wakeup;
5510 }
5511
5512 me = get_cpu();
5513 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5514 if (atomic_xchg(&vcpu->guest_mode, 0))
5515 smp_send_reschedule(cpu);
5516 put_cpu();
5517 }
5518
5519 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5520 {
5521 return kvm_x86_ops->interrupt_allowed(vcpu);
5522 }
5523
5524 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5525 {
5526 unsigned long current_rip = kvm_rip_read(vcpu) +
5527 get_segment_base(vcpu, VCPU_SREG_CS);
5528
5529 return current_rip == linear_rip;
5530 }
5531 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5532
5533 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5534 {
5535 unsigned long rflags;
5536
5537 rflags = kvm_x86_ops->get_rflags(vcpu);
5538 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5539 rflags &= ~X86_EFLAGS_TF;
5540 return rflags;
5541 }
5542 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5543
5544 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5545 {
5546 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5547 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
5548 rflags |= X86_EFLAGS_TF;
5549 kvm_x86_ops->set_rflags(vcpu, rflags);
5550 }
5551 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5552
5553 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5554 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5555 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5556 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5557 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5558 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5559 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5560 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5561 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5562 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5563 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
5564 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
Linux kernel - Deliverables
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