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KVM: x86 emulator: add get_cached_segment_base() callback to x86_emulate_ops
[deliverable/linux.git] / arch / x86 / kvm / x86.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 *
10 * Authors:
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
15 *
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
18 *
19 */
20
21 #include <linux/kvm_host.h>
22 #include "irq.h"
23 #include "mmu.h"
24 #include "i8254.h"
25 #include "tss.h"
26 #include "kvm_cache_regs.h"
27 #include "x86.h"
28
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
32 #include <linux/fs.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <linux/user-return-notifier.h>
41 #include <linux/srcu.h>
42 #include <linux/slab.h>
43 #include <linux/perf_event.h>
44 #include <trace/events/kvm.h>
45
46 #define CREATE_TRACE_POINTS
47 #include "trace.h"
48
49 #include <asm/debugreg.h>
50 #include <asm/uaccess.h>
51 #include <asm/msr.h>
52 #include <asm/desc.h>
53 #include <asm/mtrr.h>
54 #include <asm/mce.h>
55
56 #define MAX_IO_MSRS 256
57 #define CR0_RESERVED_BITS \
58 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
59 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
60 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
61 #define CR4_RESERVED_BITS \
62 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
63 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
64 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
65 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
66
67 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
68
69 #define KVM_MAX_MCE_BANKS 32
70 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
71
72 /* EFER defaults:
73 * - enable syscall per default because its emulated by KVM
74 * - enable LME and LMA per default on 64 bit KVM
75 */
76 #ifdef CONFIG_X86_64
77 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
78 #else
79 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
80 #endif
81
82 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
83 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
84
85 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
86 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
87 struct kvm_cpuid_entry2 __user *entries);
88
89 struct kvm_x86_ops *kvm_x86_ops;
90 EXPORT_SYMBOL_GPL(kvm_x86_ops);
91
92 int ignore_msrs = 0;
93 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
94
95 #define KVM_NR_SHARED_MSRS 16
96
97 struct kvm_shared_msrs_global {
98 int nr;
99 u32 msrs[KVM_NR_SHARED_MSRS];
100 };
101
102 struct kvm_shared_msrs {
103 struct user_return_notifier urn;
104 bool registered;
105 struct kvm_shared_msr_values {
106 u64 host;
107 u64 curr;
108 } values[KVM_NR_SHARED_MSRS];
109 };
110
111 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
112 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
113
114 struct kvm_stats_debugfs_item debugfs_entries[] = {
115 { "pf_fixed", VCPU_STAT(pf_fixed) },
116 { "pf_guest", VCPU_STAT(pf_guest) },
117 { "tlb_flush", VCPU_STAT(tlb_flush) },
118 { "invlpg", VCPU_STAT(invlpg) },
119 { "exits", VCPU_STAT(exits) },
120 { "io_exits", VCPU_STAT(io_exits) },
121 { "mmio_exits", VCPU_STAT(mmio_exits) },
122 { "signal_exits", VCPU_STAT(signal_exits) },
123 { "irq_window", VCPU_STAT(irq_window_exits) },
124 { "nmi_window", VCPU_STAT(nmi_window_exits) },
125 { "halt_exits", VCPU_STAT(halt_exits) },
126 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
127 { "hypercalls", VCPU_STAT(hypercalls) },
128 { "request_irq", VCPU_STAT(request_irq_exits) },
129 { "irq_exits", VCPU_STAT(irq_exits) },
130 { "host_state_reload", VCPU_STAT(host_state_reload) },
131 { "efer_reload", VCPU_STAT(efer_reload) },
132 { "fpu_reload", VCPU_STAT(fpu_reload) },
133 { "insn_emulation", VCPU_STAT(insn_emulation) },
134 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
135 { "irq_injections", VCPU_STAT(irq_injections) },
136 { "nmi_injections", VCPU_STAT(nmi_injections) },
137 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
138 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
139 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
140 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
141 { "mmu_flooded", VM_STAT(mmu_flooded) },
142 { "mmu_recycled", VM_STAT(mmu_recycled) },
143 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
144 { "mmu_unsync", VM_STAT(mmu_unsync) },
145 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
146 { "largepages", VM_STAT(lpages) },
147 { NULL }
148 };
149
150 static void kvm_on_user_return(struct user_return_notifier *urn)
151 {
152 unsigned slot;
153 struct kvm_shared_msrs *locals
154 = container_of(urn, struct kvm_shared_msrs, urn);
155 struct kvm_shared_msr_values *values;
156
157 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
158 values = &locals->values[slot];
159 if (values->host != values->curr) {
160 wrmsrl(shared_msrs_global.msrs[slot], values->host);
161 values->curr = values->host;
162 }
163 }
164 locals->registered = false;
165 user_return_notifier_unregister(urn);
166 }
167
168 static void shared_msr_update(unsigned slot, u32 msr)
169 {
170 struct kvm_shared_msrs *smsr;
171 u64 value;
172
173 smsr = &__get_cpu_var(shared_msrs);
174 /* only read, and nobody should modify it at this time,
175 * so don't need lock */
176 if (slot >= shared_msrs_global.nr) {
177 printk(KERN_ERR "kvm: invalid MSR slot!");
178 return;
179 }
180 rdmsrl_safe(msr, &value);
181 smsr->values[slot].host = value;
182 smsr->values[slot].curr = value;
183 }
184
185 void kvm_define_shared_msr(unsigned slot, u32 msr)
186 {
187 if (slot >= shared_msrs_global.nr)
188 shared_msrs_global.nr = slot + 1;
189 shared_msrs_global.msrs[slot] = msr;
190 /* we need ensured the shared_msr_global have been updated */
191 smp_wmb();
192 }
193 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
194
195 static void kvm_shared_msr_cpu_online(void)
196 {
197 unsigned i;
198
199 for (i = 0; i < shared_msrs_global.nr; ++i)
200 shared_msr_update(i, shared_msrs_global.msrs[i]);
201 }
202
203 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
204 {
205 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
206
207 if (((value ^ smsr->values[slot].curr) & mask) == 0)
208 return;
209 smsr->values[slot].curr = value;
210 wrmsrl(shared_msrs_global.msrs[slot], value);
211 if (!smsr->registered) {
212 smsr->urn.on_user_return = kvm_on_user_return;
213 user_return_notifier_register(&smsr->urn);
214 smsr->registered = true;
215 }
216 }
217 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
218
219 static void drop_user_return_notifiers(void *ignore)
220 {
221 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
222
223 if (smsr->registered)
224 kvm_on_user_return(&smsr->urn);
225 }
226
227 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
228 {
229 if (irqchip_in_kernel(vcpu->kvm))
230 return vcpu->arch.apic_base;
231 else
232 return vcpu->arch.apic_base;
233 }
234 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
235
236 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
237 {
238 /* TODO: reserve bits check */
239 if (irqchip_in_kernel(vcpu->kvm))
240 kvm_lapic_set_base(vcpu, data);
241 else
242 vcpu->arch.apic_base = data;
243 }
244 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
245
246 #define EXCPT_BENIGN 0
247 #define EXCPT_CONTRIBUTORY 1
248 #define EXCPT_PF 2
249
250 static int exception_class(int vector)
251 {
252 switch (vector) {
253 case PF_VECTOR:
254 return EXCPT_PF;
255 case DE_VECTOR:
256 case TS_VECTOR:
257 case NP_VECTOR:
258 case SS_VECTOR:
259 case GP_VECTOR:
260 return EXCPT_CONTRIBUTORY;
261 default:
262 break;
263 }
264 return EXCPT_BENIGN;
265 }
266
267 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
268 unsigned nr, bool has_error, u32 error_code,
269 bool reinject)
270 {
271 u32 prev_nr;
272 int class1, class2;
273
274 if (!vcpu->arch.exception.pending) {
275 queue:
276 vcpu->arch.exception.pending = true;
277 vcpu->arch.exception.has_error_code = has_error;
278 vcpu->arch.exception.nr = nr;
279 vcpu->arch.exception.error_code = error_code;
280 vcpu->arch.exception.reinject = reinject;
281 return;
282 }
283
284 /* to check exception */
285 prev_nr = vcpu->arch.exception.nr;
286 if (prev_nr == DF_VECTOR) {
287 /* triple fault -> shutdown */
288 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
289 return;
290 }
291 class1 = exception_class(prev_nr);
292 class2 = exception_class(nr);
293 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
294 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
295 /* generate double fault per SDM Table 5-5 */
296 vcpu->arch.exception.pending = true;
297 vcpu->arch.exception.has_error_code = true;
298 vcpu->arch.exception.nr = DF_VECTOR;
299 vcpu->arch.exception.error_code = 0;
300 } else
301 /* replace previous exception with a new one in a hope
302 that instruction re-execution will regenerate lost
303 exception */
304 goto queue;
305 }
306
307 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
308 {
309 kvm_multiple_exception(vcpu, nr, false, 0, false);
310 }
311 EXPORT_SYMBOL_GPL(kvm_queue_exception);
312
313 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
314 {
315 kvm_multiple_exception(vcpu, nr, false, 0, true);
316 }
317 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
318
319 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
320 u32 error_code)
321 {
322 ++vcpu->stat.pf_guest;
323 vcpu->arch.cr2 = addr;
324 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
325 }
326
327 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
328 {
329 vcpu->arch.nmi_pending = 1;
330 }
331 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
332
333 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
334 {
335 kvm_multiple_exception(vcpu, nr, true, error_code, false);
336 }
337 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
338
339 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
340 {
341 kvm_multiple_exception(vcpu, nr, true, error_code, true);
342 }
343 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
344
345 /*
346 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
347 * a #GP and return false.
348 */
349 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
350 {
351 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
352 return true;
353 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
354 return false;
355 }
356 EXPORT_SYMBOL_GPL(kvm_require_cpl);
357
358 /*
359 * Load the pae pdptrs. Return true is they are all valid.
360 */
361 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
362 {
363 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
364 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
365 int i;
366 int ret;
367 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
368
369 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
370 offset * sizeof(u64), sizeof(pdpte));
371 if (ret < 0) {
372 ret = 0;
373 goto out;
374 }
375 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
376 if (is_present_gpte(pdpte[i]) &&
377 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
378 ret = 0;
379 goto out;
380 }
381 }
382 ret = 1;
383
384 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
385 __set_bit(VCPU_EXREG_PDPTR,
386 (unsigned long *)&vcpu->arch.regs_avail);
387 __set_bit(VCPU_EXREG_PDPTR,
388 (unsigned long *)&vcpu->arch.regs_dirty);
389 out:
390
391 return ret;
392 }
393 EXPORT_SYMBOL_GPL(load_pdptrs);
394
395 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
396 {
397 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
398 bool changed = true;
399 int r;
400
401 if (is_long_mode(vcpu) || !is_pae(vcpu))
402 return false;
403
404 if (!test_bit(VCPU_EXREG_PDPTR,
405 (unsigned long *)&vcpu->arch.regs_avail))
406 return true;
407
408 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
409 if (r < 0)
410 goto out;
411 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
412 out:
413
414 return changed;
415 }
416
417 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
418 {
419 cr0 |= X86_CR0_ET;
420
421 #ifdef CONFIG_X86_64
422 if (cr0 & 0xffffffff00000000UL) {
423 kvm_inject_gp(vcpu, 0);
424 return;
425 }
426 #endif
427
428 cr0 &= ~CR0_RESERVED_BITS;
429
430 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
431 kvm_inject_gp(vcpu, 0);
432 return;
433 }
434
435 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
436 kvm_inject_gp(vcpu, 0);
437 return;
438 }
439
440 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
441 #ifdef CONFIG_X86_64
442 if ((vcpu->arch.efer & EFER_LME)) {
443 int cs_db, cs_l;
444
445 if (!is_pae(vcpu)) {
446 kvm_inject_gp(vcpu, 0);
447 return;
448 }
449 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
450 if (cs_l) {
451 kvm_inject_gp(vcpu, 0);
452 return;
453
454 }
455 } else
456 #endif
457 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
458 kvm_inject_gp(vcpu, 0);
459 return;
460 }
461
462 }
463
464 kvm_x86_ops->set_cr0(vcpu, cr0);
465
466 kvm_mmu_reset_context(vcpu);
467 return;
468 }
469 EXPORT_SYMBOL_GPL(kvm_set_cr0);
470
471 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
472 {
473 kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
474 }
475 EXPORT_SYMBOL_GPL(kvm_lmsw);
476
477 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
478 {
479 unsigned long old_cr4 = kvm_read_cr4(vcpu);
480 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
481
482 if (cr4 & CR4_RESERVED_BITS) {
483 kvm_inject_gp(vcpu, 0);
484 return;
485 }
486
487 if (is_long_mode(vcpu)) {
488 if (!(cr4 & X86_CR4_PAE)) {
489 kvm_inject_gp(vcpu, 0);
490 return;
491 }
492 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
493 && ((cr4 ^ old_cr4) & pdptr_bits)
494 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
495 kvm_inject_gp(vcpu, 0);
496 return;
497 }
498
499 if (cr4 & X86_CR4_VMXE) {
500 kvm_inject_gp(vcpu, 0);
501 return;
502 }
503 kvm_x86_ops->set_cr4(vcpu, cr4);
504 vcpu->arch.cr4 = cr4;
505 kvm_mmu_reset_context(vcpu);
506 }
507 EXPORT_SYMBOL_GPL(kvm_set_cr4);
508
509 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
510 {
511 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
512 kvm_mmu_sync_roots(vcpu);
513 kvm_mmu_flush_tlb(vcpu);
514 return;
515 }
516
517 if (is_long_mode(vcpu)) {
518 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
519 kvm_inject_gp(vcpu, 0);
520 return;
521 }
522 } else {
523 if (is_pae(vcpu)) {
524 if (cr3 & CR3_PAE_RESERVED_BITS) {
525 kvm_inject_gp(vcpu, 0);
526 return;
527 }
528 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
529 kvm_inject_gp(vcpu, 0);
530 return;
531 }
532 }
533 /*
534 * We don't check reserved bits in nonpae mode, because
535 * this isn't enforced, and VMware depends on this.
536 */
537 }
538
539 /*
540 * Does the new cr3 value map to physical memory? (Note, we
541 * catch an invalid cr3 even in real-mode, because it would
542 * cause trouble later on when we turn on paging anyway.)
543 *
544 * A real CPU would silently accept an invalid cr3 and would
545 * attempt to use it - with largely undefined (and often hard
546 * to debug) behavior on the guest side.
547 */
548 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
549 kvm_inject_gp(vcpu, 0);
550 else {
551 vcpu->arch.cr3 = cr3;
552 vcpu->arch.mmu.new_cr3(vcpu);
553 }
554 }
555 EXPORT_SYMBOL_GPL(kvm_set_cr3);
556
557 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
558 {
559 if (cr8 & CR8_RESERVED_BITS) {
560 kvm_inject_gp(vcpu, 0);
561 return;
562 }
563 if (irqchip_in_kernel(vcpu->kvm))
564 kvm_lapic_set_tpr(vcpu, cr8);
565 else
566 vcpu->arch.cr8 = cr8;
567 }
568 EXPORT_SYMBOL_GPL(kvm_set_cr8);
569
570 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
571 {
572 if (irqchip_in_kernel(vcpu->kvm))
573 return kvm_lapic_get_cr8(vcpu);
574 else
575 return vcpu->arch.cr8;
576 }
577 EXPORT_SYMBOL_GPL(kvm_get_cr8);
578
579 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
580 {
581 switch (dr) {
582 case 0 ... 3:
583 vcpu->arch.db[dr] = val;
584 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
585 vcpu->arch.eff_db[dr] = val;
586 break;
587 case 4:
588 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) {
589 kvm_queue_exception(vcpu, UD_VECTOR);
590 return 1;
591 }
592 /* fall through */
593 case 6:
594 if (val & 0xffffffff00000000ULL) {
595 kvm_inject_gp(vcpu, 0);
596 return 1;
597 }
598 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
599 break;
600 case 5:
601 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) {
602 kvm_queue_exception(vcpu, UD_VECTOR);
603 return 1;
604 }
605 /* fall through */
606 default: /* 7 */
607 if (val & 0xffffffff00000000ULL) {
608 kvm_inject_gp(vcpu, 0);
609 return 1;
610 }
611 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
612 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
613 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
614 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
615 }
616 break;
617 }
618
619 return 0;
620 }
621 EXPORT_SYMBOL_GPL(kvm_set_dr);
622
623 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
624 {
625 switch (dr) {
626 case 0 ... 3:
627 *val = vcpu->arch.db[dr];
628 break;
629 case 4:
630 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) {
631 kvm_queue_exception(vcpu, UD_VECTOR);
632 return 1;
633 }
634 /* fall through */
635 case 6:
636 *val = vcpu->arch.dr6;
637 break;
638 case 5:
639 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) {
640 kvm_queue_exception(vcpu, UD_VECTOR);
641 return 1;
642 }
643 /* fall through */
644 default: /* 7 */
645 *val = vcpu->arch.dr7;
646 break;
647 }
648
649 return 0;
650 }
651 EXPORT_SYMBOL_GPL(kvm_get_dr);
652
653 static inline u32 bit(int bitno)
654 {
655 return 1 << (bitno & 31);
656 }
657
658 /*
659 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
660 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
661 *
662 * This list is modified at module load time to reflect the
663 * capabilities of the host cpu. This capabilities test skips MSRs that are
664 * kvm-specific. Those are put in the beginning of the list.
665 */
666
667 #define KVM_SAVE_MSRS_BEGIN 7
668 static u32 msrs_to_save[] = {
669 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
670 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
671 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
672 HV_X64_MSR_APIC_ASSIST_PAGE,
673 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
674 MSR_K6_STAR,
675 #ifdef CONFIG_X86_64
676 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
677 #endif
678 MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
679 };
680
681 static unsigned num_msrs_to_save;
682
683 static u32 emulated_msrs[] = {
684 MSR_IA32_MISC_ENABLE,
685 };
686
687 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
688 {
689 if (efer & efer_reserved_bits)
690 return 1;
691
692 if (is_paging(vcpu)
693 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
694 return 1;
695
696 if (efer & EFER_FFXSR) {
697 struct kvm_cpuid_entry2 *feat;
698
699 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
700 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
701 return 1;
702 }
703
704 if (efer & EFER_SVME) {
705 struct kvm_cpuid_entry2 *feat;
706
707 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
708 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
709 return 1;
710 }
711
712 efer &= ~EFER_LMA;
713 efer |= vcpu->arch.efer & EFER_LMA;
714
715 kvm_x86_ops->set_efer(vcpu, efer);
716
717 vcpu->arch.efer = efer;
718
719 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
720 kvm_mmu_reset_context(vcpu);
721
722 return 0;
723 }
724
725 void kvm_enable_efer_bits(u64 mask)
726 {
727 efer_reserved_bits &= ~mask;
728 }
729 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
730
731
732 /*
733 * Writes msr value into into the appropriate "register".
734 * Returns 0 on success, non-0 otherwise.
735 * Assumes vcpu_load() was already called.
736 */
737 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
738 {
739 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
740 }
741
742 /*
743 * Adapt set_msr() to msr_io()'s calling convention
744 */
745 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
746 {
747 return kvm_set_msr(vcpu, index, *data);
748 }
749
750 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
751 {
752 int version;
753 int r;
754 struct pvclock_wall_clock wc;
755 struct timespec boot;
756
757 if (!wall_clock)
758 return;
759
760 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
761 if (r)
762 return;
763
764 if (version & 1)
765 ++version; /* first time write, random junk */
766
767 ++version;
768
769 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
770
771 /*
772 * The guest calculates current wall clock time by adding
773 * system time (updated by kvm_write_guest_time below) to the
774 * wall clock specified here. guest system time equals host
775 * system time for us, thus we must fill in host boot time here.
776 */
777 getboottime(&boot);
778
779 wc.sec = boot.tv_sec;
780 wc.nsec = boot.tv_nsec;
781 wc.version = version;
782
783 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
784
785 version++;
786 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
787 }
788
789 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
790 {
791 uint32_t quotient, remainder;
792
793 /* Don't try to replace with do_div(), this one calculates
794 * "(dividend << 32) / divisor" */
795 __asm__ ( "divl %4"
796 : "=a" (quotient), "=d" (remainder)
797 : "0" (0), "1" (dividend), "r" (divisor) );
798 return quotient;
799 }
800
801 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
802 {
803 uint64_t nsecs = 1000000000LL;
804 int32_t shift = 0;
805 uint64_t tps64;
806 uint32_t tps32;
807
808 tps64 = tsc_khz * 1000LL;
809 while (tps64 > nsecs*2) {
810 tps64 >>= 1;
811 shift--;
812 }
813
814 tps32 = (uint32_t)tps64;
815 while (tps32 <= (uint32_t)nsecs) {
816 tps32 <<= 1;
817 shift++;
818 }
819
820 hv_clock->tsc_shift = shift;
821 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
822
823 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
824 __func__, tsc_khz, hv_clock->tsc_shift,
825 hv_clock->tsc_to_system_mul);
826 }
827
828 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
829
830 static void kvm_write_guest_time(struct kvm_vcpu *v)
831 {
832 struct timespec ts;
833 unsigned long flags;
834 struct kvm_vcpu_arch *vcpu = &v->arch;
835 void *shared_kaddr;
836 unsigned long this_tsc_khz;
837
838 if ((!vcpu->time_page))
839 return;
840
841 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
842 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
843 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
844 vcpu->hv_clock_tsc_khz = this_tsc_khz;
845 }
846 put_cpu_var(cpu_tsc_khz);
847
848 /* Keep irq disabled to prevent changes to the clock */
849 local_irq_save(flags);
850 kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
851 ktime_get_ts(&ts);
852 monotonic_to_bootbased(&ts);
853 local_irq_restore(flags);
854
855 /* With all the info we got, fill in the values */
856
857 vcpu->hv_clock.system_time = ts.tv_nsec +
858 (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
859
860 vcpu->hv_clock.flags = 0;
861
862 /*
863 * The interface expects us to write an even number signaling that the
864 * update is finished. Since the guest won't see the intermediate
865 * state, we just increase by 2 at the end.
866 */
867 vcpu->hv_clock.version += 2;
868
869 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
870
871 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
872 sizeof(vcpu->hv_clock));
873
874 kunmap_atomic(shared_kaddr, KM_USER0);
875
876 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
877 }
878
879 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
880 {
881 struct kvm_vcpu_arch *vcpu = &v->arch;
882
883 if (!vcpu->time_page)
884 return 0;
885 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
886 return 1;
887 }
888
889 static bool msr_mtrr_valid(unsigned msr)
890 {
891 switch (msr) {
892 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
893 case MSR_MTRRfix64K_00000:
894 case MSR_MTRRfix16K_80000:
895 case MSR_MTRRfix16K_A0000:
896 case MSR_MTRRfix4K_C0000:
897 case MSR_MTRRfix4K_C8000:
898 case MSR_MTRRfix4K_D0000:
899 case MSR_MTRRfix4K_D8000:
900 case MSR_MTRRfix4K_E0000:
901 case MSR_MTRRfix4K_E8000:
902 case MSR_MTRRfix4K_F0000:
903 case MSR_MTRRfix4K_F8000:
904 case MSR_MTRRdefType:
905 case MSR_IA32_CR_PAT:
906 return true;
907 case 0x2f8:
908 return true;
909 }
910 return false;
911 }
912
913 static bool valid_pat_type(unsigned t)
914 {
915 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
916 }
917
918 static bool valid_mtrr_type(unsigned t)
919 {
920 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
921 }
922
923 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
924 {
925 int i;
926
927 if (!msr_mtrr_valid(msr))
928 return false;
929
930 if (msr == MSR_IA32_CR_PAT) {
931 for (i = 0; i < 8; i++)
932 if (!valid_pat_type((data >> (i * 8)) & 0xff))
933 return false;
934 return true;
935 } else if (msr == MSR_MTRRdefType) {
936 if (data & ~0xcff)
937 return false;
938 return valid_mtrr_type(data & 0xff);
939 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
940 for (i = 0; i < 8 ; i++)
941 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
942 return false;
943 return true;
944 }
945
946 /* variable MTRRs */
947 return valid_mtrr_type(data & 0xff);
948 }
949
950 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
951 {
952 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
953
954 if (!mtrr_valid(vcpu, msr, data))
955 return 1;
956
957 if (msr == MSR_MTRRdefType) {
958 vcpu->arch.mtrr_state.def_type = data;
959 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
960 } else if (msr == MSR_MTRRfix64K_00000)
961 p[0] = data;
962 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
963 p[1 + msr - MSR_MTRRfix16K_80000] = data;
964 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
965 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
966 else if (msr == MSR_IA32_CR_PAT)
967 vcpu->arch.pat = data;
968 else { /* Variable MTRRs */
969 int idx, is_mtrr_mask;
970 u64 *pt;
971
972 idx = (msr - 0x200) / 2;
973 is_mtrr_mask = msr - 0x200 - 2 * idx;
974 if (!is_mtrr_mask)
975 pt =
976 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
977 else
978 pt =
979 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
980 *pt = data;
981 }
982
983 kvm_mmu_reset_context(vcpu);
984 return 0;
985 }
986
987 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
988 {
989 u64 mcg_cap = vcpu->arch.mcg_cap;
990 unsigned bank_num = mcg_cap & 0xff;
991
992 switch (msr) {
993 case MSR_IA32_MCG_STATUS:
994 vcpu->arch.mcg_status = data;
995 break;
996 case MSR_IA32_MCG_CTL:
997 if (!(mcg_cap & MCG_CTL_P))
998 return 1;
999 if (data != 0 && data != ~(u64)0)
1000 return -1;
1001 vcpu->arch.mcg_ctl = data;
1002 break;
1003 default:
1004 if (msr >= MSR_IA32_MC0_CTL &&
1005 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1006 u32 offset = msr - MSR_IA32_MC0_CTL;
1007 /* only 0 or all 1s can be written to IA32_MCi_CTL
1008 * some Linux kernels though clear bit 10 in bank 4 to
1009 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1010 * this to avoid an uncatched #GP in the guest
1011 */
1012 if ((offset & 0x3) == 0 &&
1013 data != 0 && (data | (1 << 10)) != ~(u64)0)
1014 return -1;
1015 vcpu->arch.mce_banks[offset] = data;
1016 break;
1017 }
1018 return 1;
1019 }
1020 return 0;
1021 }
1022
1023 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1024 {
1025 struct kvm *kvm = vcpu->kvm;
1026 int lm = is_long_mode(vcpu);
1027 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1028 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1029 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1030 : kvm->arch.xen_hvm_config.blob_size_32;
1031 u32 page_num = data & ~PAGE_MASK;
1032 u64 page_addr = data & PAGE_MASK;
1033 u8 *page;
1034 int r;
1035
1036 r = -E2BIG;
1037 if (page_num >= blob_size)
1038 goto out;
1039 r = -ENOMEM;
1040 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1041 if (!page)
1042 goto out;
1043 r = -EFAULT;
1044 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1045 goto out_free;
1046 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1047 goto out_free;
1048 r = 0;
1049 out_free:
1050 kfree(page);
1051 out:
1052 return r;
1053 }
1054
1055 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1056 {
1057 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1058 }
1059
1060 static bool kvm_hv_msr_partition_wide(u32 msr)
1061 {
1062 bool r = false;
1063 switch (msr) {
1064 case HV_X64_MSR_GUEST_OS_ID:
1065 case HV_X64_MSR_HYPERCALL:
1066 r = true;
1067 break;
1068 }
1069
1070 return r;
1071 }
1072
1073 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1074 {
1075 struct kvm *kvm = vcpu->kvm;
1076
1077 switch (msr) {
1078 case HV_X64_MSR_GUEST_OS_ID:
1079 kvm->arch.hv_guest_os_id = data;
1080 /* setting guest os id to zero disables hypercall page */
1081 if (!kvm->arch.hv_guest_os_id)
1082 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1083 break;
1084 case HV_X64_MSR_HYPERCALL: {
1085 u64 gfn;
1086 unsigned long addr;
1087 u8 instructions[4];
1088
1089 /* if guest os id is not set hypercall should remain disabled */
1090 if (!kvm->arch.hv_guest_os_id)
1091 break;
1092 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1093 kvm->arch.hv_hypercall = data;
1094 break;
1095 }
1096 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1097 addr = gfn_to_hva(kvm, gfn);
1098 if (kvm_is_error_hva(addr))
1099 return 1;
1100 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1101 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1102 if (copy_to_user((void __user *)addr, instructions, 4))
1103 return 1;
1104 kvm->arch.hv_hypercall = data;
1105 break;
1106 }
1107 default:
1108 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1109 "data 0x%llx\n", msr, data);
1110 return 1;
1111 }
1112 return 0;
1113 }
1114
1115 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1116 {
1117 switch (msr) {
1118 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1119 unsigned long addr;
1120
1121 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1122 vcpu->arch.hv_vapic = data;
1123 break;
1124 }
1125 addr = gfn_to_hva(vcpu->kvm, data >>
1126 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1127 if (kvm_is_error_hva(addr))
1128 return 1;
1129 if (clear_user((void __user *)addr, PAGE_SIZE))
1130 return 1;
1131 vcpu->arch.hv_vapic = data;
1132 break;
1133 }
1134 case HV_X64_MSR_EOI:
1135 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1136 case HV_X64_MSR_ICR:
1137 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1138 case HV_X64_MSR_TPR:
1139 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1140 default:
1141 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1142 "data 0x%llx\n", msr, data);
1143 return 1;
1144 }
1145
1146 return 0;
1147 }
1148
1149 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1150 {
1151 switch (msr) {
1152 case MSR_EFER:
1153 return set_efer(vcpu, data);
1154 case MSR_K7_HWCR:
1155 data &= ~(u64)0x40; /* ignore flush filter disable */
1156 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1157 if (data != 0) {
1158 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1159 data);
1160 return 1;
1161 }
1162 break;
1163 case MSR_FAM10H_MMIO_CONF_BASE:
1164 if (data != 0) {
1165 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1166 "0x%llx\n", data);
1167 return 1;
1168 }
1169 break;
1170 case MSR_AMD64_NB_CFG:
1171 break;
1172 case MSR_IA32_DEBUGCTLMSR:
1173 if (!data) {
1174 /* We support the non-activated case already */
1175 break;
1176 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1177 /* Values other than LBR and BTF are vendor-specific,
1178 thus reserved and should throw a #GP */
1179 return 1;
1180 }
1181 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1182 __func__, data);
1183 break;
1184 case MSR_IA32_UCODE_REV:
1185 case MSR_IA32_UCODE_WRITE:
1186 case MSR_VM_HSAVE_PA:
1187 case MSR_AMD64_PATCH_LOADER:
1188 break;
1189 case 0x200 ... 0x2ff:
1190 return set_msr_mtrr(vcpu, msr, data);
1191 case MSR_IA32_APICBASE:
1192 kvm_set_apic_base(vcpu, data);
1193 break;
1194 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1195 return kvm_x2apic_msr_write(vcpu, msr, data);
1196 case MSR_IA32_MISC_ENABLE:
1197 vcpu->arch.ia32_misc_enable_msr = data;
1198 break;
1199 case MSR_KVM_WALL_CLOCK_NEW:
1200 case MSR_KVM_WALL_CLOCK:
1201 vcpu->kvm->arch.wall_clock = data;
1202 kvm_write_wall_clock(vcpu->kvm, data);
1203 break;
1204 case MSR_KVM_SYSTEM_TIME_NEW:
1205 case MSR_KVM_SYSTEM_TIME: {
1206 if (vcpu->arch.time_page) {
1207 kvm_release_page_dirty(vcpu->arch.time_page);
1208 vcpu->arch.time_page = NULL;
1209 }
1210
1211 vcpu->arch.time = data;
1212
1213 /* we verify if the enable bit is set... */
1214 if (!(data & 1))
1215 break;
1216
1217 /* ...but clean it before doing the actual write */
1218 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1219
1220 vcpu->arch.time_page =
1221 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1222
1223 if (is_error_page(vcpu->arch.time_page)) {
1224 kvm_release_page_clean(vcpu->arch.time_page);
1225 vcpu->arch.time_page = NULL;
1226 }
1227
1228 kvm_request_guest_time_update(vcpu);
1229 break;
1230 }
1231 case MSR_IA32_MCG_CTL:
1232 case MSR_IA32_MCG_STATUS:
1233 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1234 return set_msr_mce(vcpu, msr, data);
1235
1236 /* Performance counters are not protected by a CPUID bit,
1237 * so we should check all of them in the generic path for the sake of
1238 * cross vendor migration.
1239 * Writing a zero into the event select MSRs disables them,
1240 * which we perfectly emulate ;-). Any other value should be at least
1241 * reported, some guests depend on them.
1242 */
1243 case MSR_P6_EVNTSEL0:
1244 case MSR_P6_EVNTSEL1:
1245 case MSR_K7_EVNTSEL0:
1246 case MSR_K7_EVNTSEL1:
1247 case MSR_K7_EVNTSEL2:
1248 case MSR_K7_EVNTSEL3:
1249 if (data != 0)
1250 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1251 "0x%x data 0x%llx\n", msr, data);
1252 break;
1253 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1254 * so we ignore writes to make it happy.
1255 */
1256 case MSR_P6_PERFCTR0:
1257 case MSR_P6_PERFCTR1:
1258 case MSR_K7_PERFCTR0:
1259 case MSR_K7_PERFCTR1:
1260 case MSR_K7_PERFCTR2:
1261 case MSR_K7_PERFCTR3:
1262 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1263 "0x%x data 0x%llx\n", msr, data);
1264 break;
1265 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1266 if (kvm_hv_msr_partition_wide(msr)) {
1267 int r;
1268 mutex_lock(&vcpu->kvm->lock);
1269 r = set_msr_hyperv_pw(vcpu, msr, data);
1270 mutex_unlock(&vcpu->kvm->lock);
1271 return r;
1272 } else
1273 return set_msr_hyperv(vcpu, msr, data);
1274 break;
1275 default:
1276 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1277 return xen_hvm_config(vcpu, data);
1278 if (!ignore_msrs) {
1279 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1280 msr, data);
1281 return 1;
1282 } else {
1283 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1284 msr, data);
1285 break;
1286 }
1287 }
1288 return 0;
1289 }
1290 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1291
1292
1293 /*
1294 * Reads an msr value (of 'msr_index') into 'pdata'.
1295 * Returns 0 on success, non-0 otherwise.
1296 * Assumes vcpu_load() was already called.
1297 */
1298 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1299 {
1300 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1301 }
1302
1303 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1304 {
1305 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1306
1307 if (!msr_mtrr_valid(msr))
1308 return 1;
1309
1310 if (msr == MSR_MTRRdefType)
1311 *pdata = vcpu->arch.mtrr_state.def_type +
1312 (vcpu->arch.mtrr_state.enabled << 10);
1313 else if (msr == MSR_MTRRfix64K_00000)
1314 *pdata = p[0];
1315 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1316 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1317 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1318 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1319 else if (msr == MSR_IA32_CR_PAT)
1320 *pdata = vcpu->arch.pat;
1321 else { /* Variable MTRRs */
1322 int idx, is_mtrr_mask;
1323 u64 *pt;
1324
1325 idx = (msr - 0x200) / 2;
1326 is_mtrr_mask = msr - 0x200 - 2 * idx;
1327 if (!is_mtrr_mask)
1328 pt =
1329 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1330 else
1331 pt =
1332 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1333 *pdata = *pt;
1334 }
1335
1336 return 0;
1337 }
1338
1339 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1340 {
1341 u64 data;
1342 u64 mcg_cap = vcpu->arch.mcg_cap;
1343 unsigned bank_num = mcg_cap & 0xff;
1344
1345 switch (msr) {
1346 case MSR_IA32_P5_MC_ADDR:
1347 case MSR_IA32_P5_MC_TYPE:
1348 data = 0;
1349 break;
1350 case MSR_IA32_MCG_CAP:
1351 data = vcpu->arch.mcg_cap;
1352 break;
1353 case MSR_IA32_MCG_CTL:
1354 if (!(mcg_cap & MCG_CTL_P))
1355 return 1;
1356 data = vcpu->arch.mcg_ctl;
1357 break;
1358 case MSR_IA32_MCG_STATUS:
1359 data = vcpu->arch.mcg_status;
1360 break;
1361 default:
1362 if (msr >= MSR_IA32_MC0_CTL &&
1363 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1364 u32 offset = msr - MSR_IA32_MC0_CTL;
1365 data = vcpu->arch.mce_banks[offset];
1366 break;
1367 }
1368 return 1;
1369 }
1370 *pdata = data;
1371 return 0;
1372 }
1373
1374 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1375 {
1376 u64 data = 0;
1377 struct kvm *kvm = vcpu->kvm;
1378
1379 switch (msr) {
1380 case HV_X64_MSR_GUEST_OS_ID:
1381 data = kvm->arch.hv_guest_os_id;
1382 break;
1383 case HV_X64_MSR_HYPERCALL:
1384 data = kvm->arch.hv_hypercall;
1385 break;
1386 default:
1387 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1388 return 1;
1389 }
1390
1391 *pdata = data;
1392 return 0;
1393 }
1394
1395 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1396 {
1397 u64 data = 0;
1398
1399 switch (msr) {
1400 case HV_X64_MSR_VP_INDEX: {
1401 int r;
1402 struct kvm_vcpu *v;
1403 kvm_for_each_vcpu(r, v, vcpu->kvm)
1404 if (v == vcpu)
1405 data = r;
1406 break;
1407 }
1408 case HV_X64_MSR_EOI:
1409 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1410 case HV_X64_MSR_ICR:
1411 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1412 case HV_X64_MSR_TPR:
1413 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1414 default:
1415 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1416 return 1;
1417 }
1418 *pdata = data;
1419 return 0;
1420 }
1421
1422 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1423 {
1424 u64 data;
1425
1426 switch (msr) {
1427 case MSR_IA32_PLATFORM_ID:
1428 case MSR_IA32_UCODE_REV:
1429 case MSR_IA32_EBL_CR_POWERON:
1430 case MSR_IA32_DEBUGCTLMSR:
1431 case MSR_IA32_LASTBRANCHFROMIP:
1432 case MSR_IA32_LASTBRANCHTOIP:
1433 case MSR_IA32_LASTINTFROMIP:
1434 case MSR_IA32_LASTINTTOIP:
1435 case MSR_K8_SYSCFG:
1436 case MSR_K7_HWCR:
1437 case MSR_VM_HSAVE_PA:
1438 case MSR_P6_PERFCTR0:
1439 case MSR_P6_PERFCTR1:
1440 case MSR_P6_EVNTSEL0:
1441 case MSR_P6_EVNTSEL1:
1442 case MSR_K7_EVNTSEL0:
1443 case MSR_K7_PERFCTR0:
1444 case MSR_K8_INT_PENDING_MSG:
1445 case MSR_AMD64_NB_CFG:
1446 case MSR_FAM10H_MMIO_CONF_BASE:
1447 data = 0;
1448 break;
1449 case MSR_MTRRcap:
1450 data = 0x500 | KVM_NR_VAR_MTRR;
1451 break;
1452 case 0x200 ... 0x2ff:
1453 return get_msr_mtrr(vcpu, msr, pdata);
1454 case 0xcd: /* fsb frequency */
1455 data = 3;
1456 break;
1457 case MSR_IA32_APICBASE:
1458 data = kvm_get_apic_base(vcpu);
1459 break;
1460 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1461 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1462 break;
1463 case MSR_IA32_MISC_ENABLE:
1464 data = vcpu->arch.ia32_misc_enable_msr;
1465 break;
1466 case MSR_IA32_PERF_STATUS:
1467 /* TSC increment by tick */
1468 data = 1000ULL;
1469 /* CPU multiplier */
1470 data |= (((uint64_t)4ULL) << 40);
1471 break;
1472 case MSR_EFER:
1473 data = vcpu->arch.efer;
1474 break;
1475 case MSR_KVM_WALL_CLOCK:
1476 case MSR_KVM_WALL_CLOCK_NEW:
1477 data = vcpu->kvm->arch.wall_clock;
1478 break;
1479 case MSR_KVM_SYSTEM_TIME:
1480 case MSR_KVM_SYSTEM_TIME_NEW:
1481 data = vcpu->arch.time;
1482 break;
1483 case MSR_IA32_P5_MC_ADDR:
1484 case MSR_IA32_P5_MC_TYPE:
1485 case MSR_IA32_MCG_CAP:
1486 case MSR_IA32_MCG_CTL:
1487 case MSR_IA32_MCG_STATUS:
1488 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1489 return get_msr_mce(vcpu, msr, pdata);
1490 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1491 if (kvm_hv_msr_partition_wide(msr)) {
1492 int r;
1493 mutex_lock(&vcpu->kvm->lock);
1494 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1495 mutex_unlock(&vcpu->kvm->lock);
1496 return r;
1497 } else
1498 return get_msr_hyperv(vcpu, msr, pdata);
1499 break;
1500 default:
1501 if (!ignore_msrs) {
1502 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1503 return 1;
1504 } else {
1505 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1506 data = 0;
1507 }
1508 break;
1509 }
1510 *pdata = data;
1511 return 0;
1512 }
1513 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1514
1515 /*
1516 * Read or write a bunch of msrs. All parameters are kernel addresses.
1517 *
1518 * @return number of msrs set successfully.
1519 */
1520 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1521 struct kvm_msr_entry *entries,
1522 int (*do_msr)(struct kvm_vcpu *vcpu,
1523 unsigned index, u64 *data))
1524 {
1525 int i, idx;
1526
1527 vcpu_load(vcpu);
1528
1529 idx = srcu_read_lock(&vcpu->kvm->srcu);
1530 for (i = 0; i < msrs->nmsrs; ++i)
1531 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1532 break;
1533 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1534
1535 vcpu_put(vcpu);
1536
1537 return i;
1538 }
1539
1540 /*
1541 * Read or write a bunch of msrs. Parameters are user addresses.
1542 *
1543 * @return number of msrs set successfully.
1544 */
1545 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1546 int (*do_msr)(struct kvm_vcpu *vcpu,
1547 unsigned index, u64 *data),
1548 int writeback)
1549 {
1550 struct kvm_msrs msrs;
1551 struct kvm_msr_entry *entries;
1552 int r, n;
1553 unsigned size;
1554
1555 r = -EFAULT;
1556 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1557 goto out;
1558
1559 r = -E2BIG;
1560 if (msrs.nmsrs >= MAX_IO_MSRS)
1561 goto out;
1562
1563 r = -ENOMEM;
1564 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1565 entries = kmalloc(size, GFP_KERNEL);
1566 if (!entries)
1567 goto out;
1568
1569 r = -EFAULT;
1570 if (copy_from_user(entries, user_msrs->entries, size))
1571 goto out_free;
1572
1573 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1574 if (r < 0)
1575 goto out_free;
1576
1577 r = -EFAULT;
1578 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1579 goto out_free;
1580
1581 r = n;
1582
1583 out_free:
1584 kfree(entries);
1585 out:
1586 return r;
1587 }
1588
1589 int kvm_dev_ioctl_check_extension(long ext)
1590 {
1591 int r;
1592
1593 switch (ext) {
1594 case KVM_CAP_IRQCHIP:
1595 case KVM_CAP_HLT:
1596 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1597 case KVM_CAP_SET_TSS_ADDR:
1598 case KVM_CAP_EXT_CPUID:
1599 case KVM_CAP_CLOCKSOURCE:
1600 case KVM_CAP_PIT:
1601 case KVM_CAP_NOP_IO_DELAY:
1602 case KVM_CAP_MP_STATE:
1603 case KVM_CAP_SYNC_MMU:
1604 case KVM_CAP_REINJECT_CONTROL:
1605 case KVM_CAP_IRQ_INJECT_STATUS:
1606 case KVM_CAP_ASSIGN_DEV_IRQ:
1607 case KVM_CAP_IRQFD:
1608 case KVM_CAP_IOEVENTFD:
1609 case KVM_CAP_PIT2:
1610 case KVM_CAP_PIT_STATE2:
1611 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1612 case KVM_CAP_XEN_HVM:
1613 case KVM_CAP_ADJUST_CLOCK:
1614 case KVM_CAP_VCPU_EVENTS:
1615 case KVM_CAP_HYPERV:
1616 case KVM_CAP_HYPERV_VAPIC:
1617 case KVM_CAP_HYPERV_SPIN:
1618 case KVM_CAP_PCI_SEGMENT:
1619 case KVM_CAP_DEBUGREGS:
1620 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1621 r = 1;
1622 break;
1623 case KVM_CAP_COALESCED_MMIO:
1624 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1625 break;
1626 case KVM_CAP_VAPIC:
1627 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1628 break;
1629 case KVM_CAP_NR_VCPUS:
1630 r = KVM_MAX_VCPUS;
1631 break;
1632 case KVM_CAP_NR_MEMSLOTS:
1633 r = KVM_MEMORY_SLOTS;
1634 break;
1635 case KVM_CAP_PV_MMU: /* obsolete */
1636 r = 0;
1637 break;
1638 case KVM_CAP_IOMMU:
1639 r = iommu_found();
1640 break;
1641 case KVM_CAP_MCE:
1642 r = KVM_MAX_MCE_BANKS;
1643 break;
1644 default:
1645 r = 0;
1646 break;
1647 }
1648 return r;
1649
1650 }
1651
1652 long kvm_arch_dev_ioctl(struct file *filp,
1653 unsigned int ioctl, unsigned long arg)
1654 {
1655 void __user *argp = (void __user *)arg;
1656 long r;
1657
1658 switch (ioctl) {
1659 case KVM_GET_MSR_INDEX_LIST: {
1660 struct kvm_msr_list __user *user_msr_list = argp;
1661 struct kvm_msr_list msr_list;
1662 unsigned n;
1663
1664 r = -EFAULT;
1665 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1666 goto out;
1667 n = msr_list.nmsrs;
1668 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1669 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1670 goto out;
1671 r = -E2BIG;
1672 if (n < msr_list.nmsrs)
1673 goto out;
1674 r = -EFAULT;
1675 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1676 num_msrs_to_save * sizeof(u32)))
1677 goto out;
1678 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1679 &emulated_msrs,
1680 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1681 goto out;
1682 r = 0;
1683 break;
1684 }
1685 case KVM_GET_SUPPORTED_CPUID: {
1686 struct kvm_cpuid2 __user *cpuid_arg = argp;
1687 struct kvm_cpuid2 cpuid;
1688
1689 r = -EFAULT;
1690 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1691 goto out;
1692 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1693 cpuid_arg->entries);
1694 if (r)
1695 goto out;
1696
1697 r = -EFAULT;
1698 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1699 goto out;
1700 r = 0;
1701 break;
1702 }
1703 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1704 u64 mce_cap;
1705
1706 mce_cap = KVM_MCE_CAP_SUPPORTED;
1707 r = -EFAULT;
1708 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1709 goto out;
1710 r = 0;
1711 break;
1712 }
1713 default:
1714 r = -EINVAL;
1715 }
1716 out:
1717 return r;
1718 }
1719
1720 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1721 {
1722 kvm_x86_ops->vcpu_load(vcpu, cpu);
1723 if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1724 unsigned long khz = cpufreq_quick_get(cpu);
1725 if (!khz)
1726 khz = tsc_khz;
1727 per_cpu(cpu_tsc_khz, cpu) = khz;
1728 }
1729 kvm_request_guest_time_update(vcpu);
1730 }
1731
1732 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1733 {
1734 kvm_x86_ops->vcpu_put(vcpu);
1735 kvm_put_guest_fpu(vcpu);
1736 }
1737
1738 static int is_efer_nx(void)
1739 {
1740 unsigned long long efer = 0;
1741
1742 rdmsrl_safe(MSR_EFER, &efer);
1743 return efer & EFER_NX;
1744 }
1745
1746 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1747 {
1748 int i;
1749 struct kvm_cpuid_entry2 *e, *entry;
1750
1751 entry = NULL;
1752 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1753 e = &vcpu->arch.cpuid_entries[i];
1754 if (e->function == 0x80000001) {
1755 entry = e;
1756 break;
1757 }
1758 }
1759 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1760 entry->edx &= ~(1 << 20);
1761 printk(KERN_INFO "kvm: guest NX capability removed\n");
1762 }
1763 }
1764
1765 /* when an old userspace process fills a new kernel module */
1766 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1767 struct kvm_cpuid *cpuid,
1768 struct kvm_cpuid_entry __user *entries)
1769 {
1770 int r, i;
1771 struct kvm_cpuid_entry *cpuid_entries;
1772
1773 r = -E2BIG;
1774 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1775 goto out;
1776 r = -ENOMEM;
1777 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1778 if (!cpuid_entries)
1779 goto out;
1780 r = -EFAULT;
1781 if (copy_from_user(cpuid_entries, entries,
1782 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1783 goto out_free;
1784 vcpu_load(vcpu);
1785 for (i = 0; i < cpuid->nent; i++) {
1786 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1787 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1788 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1789 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1790 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1791 vcpu->arch.cpuid_entries[i].index = 0;
1792 vcpu->arch.cpuid_entries[i].flags = 0;
1793 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1794 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1795 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1796 }
1797 vcpu->arch.cpuid_nent = cpuid->nent;
1798 cpuid_fix_nx_cap(vcpu);
1799 r = 0;
1800 kvm_apic_set_version(vcpu);
1801 kvm_x86_ops->cpuid_update(vcpu);
1802 vcpu_put(vcpu);
1803
1804 out_free:
1805 vfree(cpuid_entries);
1806 out:
1807 return r;
1808 }
1809
1810 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1811 struct kvm_cpuid2 *cpuid,
1812 struct kvm_cpuid_entry2 __user *entries)
1813 {
1814 int r;
1815
1816 r = -E2BIG;
1817 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1818 goto out;
1819 r = -EFAULT;
1820 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1821 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1822 goto out;
1823 vcpu_load(vcpu);
1824 vcpu->arch.cpuid_nent = cpuid->nent;
1825 kvm_apic_set_version(vcpu);
1826 kvm_x86_ops->cpuid_update(vcpu);
1827 vcpu_put(vcpu);
1828 return 0;
1829
1830 out:
1831 return r;
1832 }
1833
1834 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1835 struct kvm_cpuid2 *cpuid,
1836 struct kvm_cpuid_entry2 __user *entries)
1837 {
1838 int r;
1839
1840 vcpu_load(vcpu);
1841 r = -E2BIG;
1842 if (cpuid->nent < vcpu->arch.cpuid_nent)
1843 goto out;
1844 r = -EFAULT;
1845 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1846 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1847 goto out;
1848 return 0;
1849
1850 out:
1851 cpuid->nent = vcpu->arch.cpuid_nent;
1852 vcpu_put(vcpu);
1853 return r;
1854 }
1855
1856 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1857 u32 index)
1858 {
1859 entry->function = function;
1860 entry->index = index;
1861 cpuid_count(entry->function, entry->index,
1862 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1863 entry->flags = 0;
1864 }
1865
1866 #define F(x) bit(X86_FEATURE_##x)
1867
1868 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1869 u32 index, int *nent, int maxnent)
1870 {
1871 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1872 #ifdef CONFIG_X86_64
1873 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
1874 ? F(GBPAGES) : 0;
1875 unsigned f_lm = F(LM);
1876 #else
1877 unsigned f_gbpages = 0;
1878 unsigned f_lm = 0;
1879 #endif
1880 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
1881
1882 /* cpuid 1.edx */
1883 const u32 kvm_supported_word0_x86_features =
1884 F(FPU) | F(VME) | F(DE) | F(PSE) |
1885 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1886 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1887 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1888 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1889 0 /* Reserved, DS, ACPI */ | F(MMX) |
1890 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1891 0 /* HTT, TM, Reserved, PBE */;
1892 /* cpuid 0x80000001.edx */
1893 const u32 kvm_supported_word1_x86_features =
1894 F(FPU) | F(VME) | F(DE) | F(PSE) |
1895 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1896 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1897 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1898 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1899 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1900 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
1901 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1902 /* cpuid 1.ecx */
1903 const u32 kvm_supported_word4_x86_features =
1904 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1905 0 /* DS-CPL, VMX, SMX, EST */ |
1906 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1907 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1908 0 /* Reserved, DCA */ | F(XMM4_1) |
1909 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1910 0 /* Reserved, XSAVE, OSXSAVE */;
1911 /* cpuid 0x80000001.ecx */
1912 const u32 kvm_supported_word6_x86_features =
1913 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1914 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1915 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1916 0 /* SKINIT */ | 0 /* WDT */;
1917
1918 /* all calls to cpuid_count() should be made on the same cpu */
1919 get_cpu();
1920 do_cpuid_1_ent(entry, function, index);
1921 ++*nent;
1922
1923 switch (function) {
1924 case 0:
1925 entry->eax = min(entry->eax, (u32)0xb);
1926 break;
1927 case 1:
1928 entry->edx &= kvm_supported_word0_x86_features;
1929 entry->ecx &= kvm_supported_word4_x86_features;
1930 /* we support x2apic emulation even if host does not support
1931 * it since we emulate x2apic in software */
1932 entry->ecx |= F(X2APIC);
1933 break;
1934 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1935 * may return different values. This forces us to get_cpu() before
1936 * issuing the first command, and also to emulate this annoying behavior
1937 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1938 case 2: {
1939 int t, times = entry->eax & 0xff;
1940
1941 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1942 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1943 for (t = 1; t < times && *nent < maxnent; ++t) {
1944 do_cpuid_1_ent(&entry[t], function, 0);
1945 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1946 ++*nent;
1947 }
1948 break;
1949 }
1950 /* function 4 and 0xb have additional index. */
1951 case 4: {
1952 int i, cache_type;
1953
1954 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1955 /* read more entries until cache_type is zero */
1956 for (i = 1; *nent < maxnent; ++i) {
1957 cache_type = entry[i - 1].eax & 0x1f;
1958 if (!cache_type)
1959 break;
1960 do_cpuid_1_ent(&entry[i], function, i);
1961 entry[i].flags |=
1962 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1963 ++*nent;
1964 }
1965 break;
1966 }
1967 case 0xb: {
1968 int i, level_type;
1969
1970 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1971 /* read more entries until level_type is zero */
1972 for (i = 1; *nent < maxnent; ++i) {
1973 level_type = entry[i - 1].ecx & 0xff00;
1974 if (!level_type)
1975 break;
1976 do_cpuid_1_ent(&entry[i], function, i);
1977 entry[i].flags |=
1978 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1979 ++*nent;
1980 }
1981 break;
1982 }
1983 case KVM_CPUID_SIGNATURE: {
1984 char signature[12] = "KVMKVMKVM\0\0";
1985 u32 *sigptr = (u32 *)signature;
1986 entry->eax = 0;
1987 entry->ebx = sigptr[0];
1988 entry->ecx = sigptr[1];
1989 entry->edx = sigptr[2];
1990 break;
1991 }
1992 case KVM_CPUID_FEATURES:
1993 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
1994 (1 << KVM_FEATURE_NOP_IO_DELAY) |
1995 (1 << KVM_FEATURE_CLOCKSOURCE2) |
1996 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
1997 entry->ebx = 0;
1998 entry->ecx = 0;
1999 entry->edx = 0;
2000 break;
2001 case 0x80000000:
2002 entry->eax = min(entry->eax, 0x8000001a);
2003 break;
2004 case 0x80000001:
2005 entry->edx &= kvm_supported_word1_x86_features;
2006 entry->ecx &= kvm_supported_word6_x86_features;
2007 break;
2008 }
2009
2010 kvm_x86_ops->set_supported_cpuid(function, entry);
2011
2012 put_cpu();
2013 }
2014
2015 #undef F
2016
2017 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2018 struct kvm_cpuid_entry2 __user *entries)
2019 {
2020 struct kvm_cpuid_entry2 *cpuid_entries;
2021 int limit, nent = 0, r = -E2BIG;
2022 u32 func;
2023
2024 if (cpuid->nent < 1)
2025 goto out;
2026 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2027 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2028 r = -ENOMEM;
2029 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2030 if (!cpuid_entries)
2031 goto out;
2032
2033 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2034 limit = cpuid_entries[0].eax;
2035 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2036 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2037 &nent, cpuid->nent);
2038 r = -E2BIG;
2039 if (nent >= cpuid->nent)
2040 goto out_free;
2041
2042 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2043 limit = cpuid_entries[nent - 1].eax;
2044 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2045 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2046 &nent, cpuid->nent);
2047
2048
2049
2050 r = -E2BIG;
2051 if (nent >= cpuid->nent)
2052 goto out_free;
2053
2054 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2055 cpuid->nent);
2056
2057 r = -E2BIG;
2058 if (nent >= cpuid->nent)
2059 goto out_free;
2060
2061 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2062 cpuid->nent);
2063
2064 r = -E2BIG;
2065 if (nent >= cpuid->nent)
2066 goto out_free;
2067
2068 r = -EFAULT;
2069 if (copy_to_user(entries, cpuid_entries,
2070 nent * sizeof(struct kvm_cpuid_entry2)))
2071 goto out_free;
2072 cpuid->nent = nent;
2073 r = 0;
2074
2075 out_free:
2076 vfree(cpuid_entries);
2077 out:
2078 return r;
2079 }
2080
2081 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2082 struct kvm_lapic_state *s)
2083 {
2084 vcpu_load(vcpu);
2085 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2086 vcpu_put(vcpu);
2087
2088 return 0;
2089 }
2090
2091 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2092 struct kvm_lapic_state *s)
2093 {
2094 vcpu_load(vcpu);
2095 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2096 kvm_apic_post_state_restore(vcpu);
2097 update_cr8_intercept(vcpu);
2098 vcpu_put(vcpu);
2099
2100 return 0;
2101 }
2102
2103 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2104 struct kvm_interrupt *irq)
2105 {
2106 if (irq->irq < 0 || irq->irq >= 256)
2107 return -EINVAL;
2108 if (irqchip_in_kernel(vcpu->kvm))
2109 return -ENXIO;
2110 vcpu_load(vcpu);
2111
2112 kvm_queue_interrupt(vcpu, irq->irq, false);
2113
2114 vcpu_put(vcpu);
2115
2116 return 0;
2117 }
2118
2119 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2120 {
2121 vcpu_load(vcpu);
2122 kvm_inject_nmi(vcpu);
2123 vcpu_put(vcpu);
2124
2125 return 0;
2126 }
2127
2128 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2129 struct kvm_tpr_access_ctl *tac)
2130 {
2131 if (tac->flags)
2132 return -EINVAL;
2133 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2134 return 0;
2135 }
2136
2137 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2138 u64 mcg_cap)
2139 {
2140 int r;
2141 unsigned bank_num = mcg_cap & 0xff, bank;
2142
2143 vcpu_load(vcpu);
2144 r = -EINVAL;
2145 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2146 goto out;
2147 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2148 goto out;
2149 r = 0;
2150 vcpu->arch.mcg_cap = mcg_cap;
2151 /* Init IA32_MCG_CTL to all 1s */
2152 if (mcg_cap & MCG_CTL_P)
2153 vcpu->arch.mcg_ctl = ~(u64)0;
2154 /* Init IA32_MCi_CTL to all 1s */
2155 for (bank = 0; bank < bank_num; bank++)
2156 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2157 out:
2158 vcpu_put(vcpu);
2159 return r;
2160 }
2161
2162 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2163 struct kvm_x86_mce *mce)
2164 {
2165 u64 mcg_cap = vcpu->arch.mcg_cap;
2166 unsigned bank_num = mcg_cap & 0xff;
2167 u64 *banks = vcpu->arch.mce_banks;
2168
2169 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2170 return -EINVAL;
2171 /*
2172 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2173 * reporting is disabled
2174 */
2175 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2176 vcpu->arch.mcg_ctl != ~(u64)0)
2177 return 0;
2178 banks += 4 * mce->bank;
2179 /*
2180 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2181 * reporting is disabled for the bank
2182 */
2183 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2184 return 0;
2185 if (mce->status & MCI_STATUS_UC) {
2186 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2187 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2188 printk(KERN_DEBUG "kvm: set_mce: "
2189 "injects mce exception while "
2190 "previous one is in progress!\n");
2191 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2192 return 0;
2193 }
2194 if (banks[1] & MCI_STATUS_VAL)
2195 mce->status |= MCI_STATUS_OVER;
2196 banks[2] = mce->addr;
2197 banks[3] = mce->misc;
2198 vcpu->arch.mcg_status = mce->mcg_status;
2199 banks[1] = mce->status;
2200 kvm_queue_exception(vcpu, MC_VECTOR);
2201 } else if (!(banks[1] & MCI_STATUS_VAL)
2202 || !(banks[1] & MCI_STATUS_UC)) {
2203 if (banks[1] & MCI_STATUS_VAL)
2204 mce->status |= MCI_STATUS_OVER;
2205 banks[2] = mce->addr;
2206 banks[3] = mce->misc;
2207 banks[1] = mce->status;
2208 } else
2209 banks[1] |= MCI_STATUS_OVER;
2210 return 0;
2211 }
2212
2213 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2214 struct kvm_vcpu_events *events)
2215 {
2216 vcpu_load(vcpu);
2217
2218 events->exception.injected =
2219 vcpu->arch.exception.pending &&
2220 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2221 events->exception.nr = vcpu->arch.exception.nr;
2222 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2223 events->exception.error_code = vcpu->arch.exception.error_code;
2224
2225 events->interrupt.injected =
2226 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2227 events->interrupt.nr = vcpu->arch.interrupt.nr;
2228 events->interrupt.soft = 0;
2229 events->interrupt.shadow =
2230 kvm_x86_ops->get_interrupt_shadow(vcpu,
2231 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2232
2233 events->nmi.injected = vcpu->arch.nmi_injected;
2234 events->nmi.pending = vcpu->arch.nmi_pending;
2235 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2236
2237 events->sipi_vector = vcpu->arch.sipi_vector;
2238
2239 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2240 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2241 | KVM_VCPUEVENT_VALID_SHADOW);
2242
2243 vcpu_put(vcpu);
2244 }
2245
2246 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2247 struct kvm_vcpu_events *events)
2248 {
2249 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2250 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2251 | KVM_VCPUEVENT_VALID_SHADOW))
2252 return -EINVAL;
2253
2254 vcpu_load(vcpu);
2255
2256 vcpu->arch.exception.pending = events->exception.injected;
2257 vcpu->arch.exception.nr = events->exception.nr;
2258 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2259 vcpu->arch.exception.error_code = events->exception.error_code;
2260
2261 vcpu->arch.interrupt.pending = events->interrupt.injected;
2262 vcpu->arch.interrupt.nr = events->interrupt.nr;
2263 vcpu->arch.interrupt.soft = events->interrupt.soft;
2264 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2265 kvm_pic_clear_isr_ack(vcpu->kvm);
2266 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2267 kvm_x86_ops->set_interrupt_shadow(vcpu,
2268 events->interrupt.shadow);
2269
2270 vcpu->arch.nmi_injected = events->nmi.injected;
2271 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2272 vcpu->arch.nmi_pending = events->nmi.pending;
2273 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2274
2275 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2276 vcpu->arch.sipi_vector = events->sipi_vector;
2277
2278 vcpu_put(vcpu);
2279
2280 return 0;
2281 }
2282
2283 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2284 struct kvm_debugregs *dbgregs)
2285 {
2286 vcpu_load(vcpu);
2287
2288 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2289 dbgregs->dr6 = vcpu->arch.dr6;
2290 dbgregs->dr7 = vcpu->arch.dr7;
2291 dbgregs->flags = 0;
2292
2293 vcpu_put(vcpu);
2294 }
2295
2296 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2297 struct kvm_debugregs *dbgregs)
2298 {
2299 if (dbgregs->flags)
2300 return -EINVAL;
2301
2302 vcpu_load(vcpu);
2303
2304 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2305 vcpu->arch.dr6 = dbgregs->dr6;
2306 vcpu->arch.dr7 = dbgregs->dr7;
2307
2308 vcpu_put(vcpu);
2309
2310 return 0;
2311 }
2312
2313 long kvm_arch_vcpu_ioctl(struct file *filp,
2314 unsigned int ioctl, unsigned long arg)
2315 {
2316 struct kvm_vcpu *vcpu = filp->private_data;
2317 void __user *argp = (void __user *)arg;
2318 int r;
2319 struct kvm_lapic_state *lapic = NULL;
2320
2321 switch (ioctl) {
2322 case KVM_GET_LAPIC: {
2323 r = -EINVAL;
2324 if (!vcpu->arch.apic)
2325 goto out;
2326 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2327
2328 r = -ENOMEM;
2329 if (!lapic)
2330 goto out;
2331 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
2332 if (r)
2333 goto out;
2334 r = -EFAULT;
2335 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
2336 goto out;
2337 r = 0;
2338 break;
2339 }
2340 case KVM_SET_LAPIC: {
2341 r = -EINVAL;
2342 if (!vcpu->arch.apic)
2343 goto out;
2344 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2345 r = -ENOMEM;
2346 if (!lapic)
2347 goto out;
2348 r = -EFAULT;
2349 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
2350 goto out;
2351 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
2352 if (r)
2353 goto out;
2354 r = 0;
2355 break;
2356 }
2357 case KVM_INTERRUPT: {
2358 struct kvm_interrupt irq;
2359
2360 r = -EFAULT;
2361 if (copy_from_user(&irq, argp, sizeof irq))
2362 goto out;
2363 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2364 if (r)
2365 goto out;
2366 r = 0;
2367 break;
2368 }
2369 case KVM_NMI: {
2370 r = kvm_vcpu_ioctl_nmi(vcpu);
2371 if (r)
2372 goto out;
2373 r = 0;
2374 break;
2375 }
2376 case KVM_SET_CPUID: {
2377 struct kvm_cpuid __user *cpuid_arg = argp;
2378 struct kvm_cpuid cpuid;
2379
2380 r = -EFAULT;
2381 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2382 goto out;
2383 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2384 if (r)
2385 goto out;
2386 break;
2387 }
2388 case KVM_SET_CPUID2: {
2389 struct kvm_cpuid2 __user *cpuid_arg = argp;
2390 struct kvm_cpuid2 cpuid;
2391
2392 r = -EFAULT;
2393 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2394 goto out;
2395 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2396 cpuid_arg->entries);
2397 if (r)
2398 goto out;
2399 break;
2400 }
2401 case KVM_GET_CPUID2: {
2402 struct kvm_cpuid2 __user *cpuid_arg = argp;
2403 struct kvm_cpuid2 cpuid;
2404
2405 r = -EFAULT;
2406 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2407 goto out;
2408 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2409 cpuid_arg->entries);
2410 if (r)
2411 goto out;
2412 r = -EFAULT;
2413 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2414 goto out;
2415 r = 0;
2416 break;
2417 }
2418 case KVM_GET_MSRS:
2419 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2420 break;
2421 case KVM_SET_MSRS:
2422 r = msr_io(vcpu, argp, do_set_msr, 0);
2423 break;
2424 case KVM_TPR_ACCESS_REPORTING: {
2425 struct kvm_tpr_access_ctl tac;
2426
2427 r = -EFAULT;
2428 if (copy_from_user(&tac, argp, sizeof tac))
2429 goto out;
2430 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2431 if (r)
2432 goto out;
2433 r = -EFAULT;
2434 if (copy_to_user(argp, &tac, sizeof tac))
2435 goto out;
2436 r = 0;
2437 break;
2438 };
2439 case KVM_SET_VAPIC_ADDR: {
2440 struct kvm_vapic_addr va;
2441
2442 r = -EINVAL;
2443 if (!irqchip_in_kernel(vcpu->kvm))
2444 goto out;
2445 r = -EFAULT;
2446 if (copy_from_user(&va, argp, sizeof va))
2447 goto out;
2448 r = 0;
2449 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2450 break;
2451 }
2452 case KVM_X86_SETUP_MCE: {
2453 u64 mcg_cap;
2454
2455 r = -EFAULT;
2456 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2457 goto out;
2458 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2459 break;
2460 }
2461 case KVM_X86_SET_MCE: {
2462 struct kvm_x86_mce mce;
2463
2464 r = -EFAULT;
2465 if (copy_from_user(&mce, argp, sizeof mce))
2466 goto out;
2467 vcpu_load(vcpu);
2468 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2469 vcpu_put(vcpu);
2470 break;
2471 }
2472 case KVM_GET_VCPU_EVENTS: {
2473 struct kvm_vcpu_events events;
2474
2475 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2476
2477 r = -EFAULT;
2478 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2479 break;
2480 r = 0;
2481 break;
2482 }
2483 case KVM_SET_VCPU_EVENTS: {
2484 struct kvm_vcpu_events events;
2485
2486 r = -EFAULT;
2487 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2488 break;
2489
2490 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2491 break;
2492 }
2493 case KVM_GET_DEBUGREGS: {
2494 struct kvm_debugregs dbgregs;
2495
2496 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2497
2498 r = -EFAULT;
2499 if (copy_to_user(argp, &dbgregs,
2500 sizeof(struct kvm_debugregs)))
2501 break;
2502 r = 0;
2503 break;
2504 }
2505 case KVM_SET_DEBUGREGS: {
2506 struct kvm_debugregs dbgregs;
2507
2508 r = -EFAULT;
2509 if (copy_from_user(&dbgregs, argp,
2510 sizeof(struct kvm_debugregs)))
2511 break;
2512
2513 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2514 break;
2515 }
2516 default:
2517 r = -EINVAL;
2518 }
2519 out:
2520 kfree(lapic);
2521 return r;
2522 }
2523
2524 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2525 {
2526 int ret;
2527
2528 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2529 return -1;
2530 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2531 return ret;
2532 }
2533
2534 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2535 u64 ident_addr)
2536 {
2537 kvm->arch.ept_identity_map_addr = ident_addr;
2538 return 0;
2539 }
2540
2541 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2542 u32 kvm_nr_mmu_pages)
2543 {
2544 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2545 return -EINVAL;
2546
2547 mutex_lock(&kvm->slots_lock);
2548 spin_lock(&kvm->mmu_lock);
2549
2550 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2551 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2552
2553 spin_unlock(&kvm->mmu_lock);
2554 mutex_unlock(&kvm->slots_lock);
2555 return 0;
2556 }
2557
2558 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2559 {
2560 return kvm->arch.n_alloc_mmu_pages;
2561 }
2562
2563 gfn_t unalias_gfn_instantiation(struct kvm *kvm, gfn_t gfn)
2564 {
2565 int i;
2566 struct kvm_mem_alias *alias;
2567 struct kvm_mem_aliases *aliases;
2568
2569 aliases = kvm_aliases(kvm);
2570
2571 for (i = 0; i < aliases->naliases; ++i) {
2572 alias = &aliases->aliases[i];
2573 if (alias->flags & KVM_ALIAS_INVALID)
2574 continue;
2575 if (gfn >= alias->base_gfn
2576 && gfn < alias->base_gfn + alias->npages)
2577 return alias->target_gfn + gfn - alias->base_gfn;
2578 }
2579 return gfn;
2580 }
2581
2582 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
2583 {
2584 int i;
2585 struct kvm_mem_alias *alias;
2586 struct kvm_mem_aliases *aliases;
2587
2588 aliases = kvm_aliases(kvm);
2589
2590 for (i = 0; i < aliases->naliases; ++i) {
2591 alias = &aliases->aliases[i];
2592 if (gfn >= alias->base_gfn
2593 && gfn < alias->base_gfn + alias->npages)
2594 return alias->target_gfn + gfn - alias->base_gfn;
2595 }
2596 return gfn;
2597 }
2598
2599 /*
2600 * Set a new alias region. Aliases map a portion of physical memory into
2601 * another portion. This is useful for memory windows, for example the PC
2602 * VGA region.
2603 */
2604 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
2605 struct kvm_memory_alias *alias)
2606 {
2607 int r, n;
2608 struct kvm_mem_alias *p;
2609 struct kvm_mem_aliases *aliases, *old_aliases;
2610
2611 r = -EINVAL;
2612 /* General sanity checks */
2613 if (alias->memory_size & (PAGE_SIZE - 1))
2614 goto out;
2615 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
2616 goto out;
2617 if (alias->slot >= KVM_ALIAS_SLOTS)
2618 goto out;
2619 if (alias->guest_phys_addr + alias->memory_size
2620 < alias->guest_phys_addr)
2621 goto out;
2622 if (alias->target_phys_addr + alias->memory_size
2623 < alias->target_phys_addr)
2624 goto out;
2625
2626 r = -ENOMEM;
2627 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2628 if (!aliases)
2629 goto out;
2630
2631 mutex_lock(&kvm->slots_lock);
2632
2633 /* invalidate any gfn reference in case of deletion/shrinking */
2634 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2635 aliases->aliases[alias->slot].flags |= KVM_ALIAS_INVALID;
2636 old_aliases = kvm->arch.aliases;
2637 rcu_assign_pointer(kvm->arch.aliases, aliases);
2638 synchronize_srcu_expedited(&kvm->srcu);
2639 kvm_mmu_zap_all(kvm);
2640 kfree(old_aliases);
2641
2642 r = -ENOMEM;
2643 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2644 if (!aliases)
2645 goto out_unlock;
2646
2647 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2648
2649 p = &aliases->aliases[alias->slot];
2650 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2651 p->npages = alias->memory_size >> PAGE_SHIFT;
2652 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2653 p->flags &= ~(KVM_ALIAS_INVALID);
2654
2655 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2656 if (aliases->aliases[n - 1].npages)
2657 break;
2658 aliases->naliases = n;
2659
2660 old_aliases = kvm->arch.aliases;
2661 rcu_assign_pointer(kvm->arch.aliases, aliases);
2662 synchronize_srcu_expedited(&kvm->srcu);
2663 kfree(old_aliases);
2664 r = 0;
2665
2666 out_unlock:
2667 mutex_unlock(&kvm->slots_lock);
2668 out:
2669 return r;
2670 }
2671
2672 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2673 {
2674 int r;
2675
2676 r = 0;
2677 switch (chip->chip_id) {
2678 case KVM_IRQCHIP_PIC_MASTER:
2679 memcpy(&chip->chip.pic,
2680 &pic_irqchip(kvm)->pics[0],
2681 sizeof(struct kvm_pic_state));
2682 break;
2683 case KVM_IRQCHIP_PIC_SLAVE:
2684 memcpy(&chip->chip.pic,
2685 &pic_irqchip(kvm)->pics[1],
2686 sizeof(struct kvm_pic_state));
2687 break;
2688 case KVM_IRQCHIP_IOAPIC:
2689 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2690 break;
2691 default:
2692 r = -EINVAL;
2693 break;
2694 }
2695 return r;
2696 }
2697
2698 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2699 {
2700 int r;
2701
2702 r = 0;
2703 switch (chip->chip_id) {
2704 case KVM_IRQCHIP_PIC_MASTER:
2705 raw_spin_lock(&pic_irqchip(kvm)->lock);
2706 memcpy(&pic_irqchip(kvm)->pics[0],
2707 &chip->chip.pic,
2708 sizeof(struct kvm_pic_state));
2709 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2710 break;
2711 case KVM_IRQCHIP_PIC_SLAVE:
2712 raw_spin_lock(&pic_irqchip(kvm)->lock);
2713 memcpy(&pic_irqchip(kvm)->pics[1],
2714 &chip->chip.pic,
2715 sizeof(struct kvm_pic_state));
2716 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2717 break;
2718 case KVM_IRQCHIP_IOAPIC:
2719 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2720 break;
2721 default:
2722 r = -EINVAL;
2723 break;
2724 }
2725 kvm_pic_update_irq(pic_irqchip(kvm));
2726 return r;
2727 }
2728
2729 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2730 {
2731 int r = 0;
2732
2733 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2734 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2735 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2736 return r;
2737 }
2738
2739 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2740 {
2741 int r = 0;
2742
2743 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2744 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2745 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2746 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2747 return r;
2748 }
2749
2750 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2751 {
2752 int r = 0;
2753
2754 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2755 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2756 sizeof(ps->channels));
2757 ps->flags = kvm->arch.vpit->pit_state.flags;
2758 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2759 return r;
2760 }
2761
2762 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2763 {
2764 int r = 0, start = 0;
2765 u32 prev_legacy, cur_legacy;
2766 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2767 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2768 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2769 if (!prev_legacy && cur_legacy)
2770 start = 1;
2771 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2772 sizeof(kvm->arch.vpit->pit_state.channels));
2773 kvm->arch.vpit->pit_state.flags = ps->flags;
2774 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2775 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2776 return r;
2777 }
2778
2779 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2780 struct kvm_reinject_control *control)
2781 {
2782 if (!kvm->arch.vpit)
2783 return -ENXIO;
2784 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2785 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2786 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2787 return 0;
2788 }
2789
2790 /*
2791 * Get (and clear) the dirty memory log for a memory slot.
2792 */
2793 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2794 struct kvm_dirty_log *log)
2795 {
2796 int r, i;
2797 struct kvm_memory_slot *memslot;
2798 unsigned long n;
2799 unsigned long is_dirty = 0;
2800
2801 mutex_lock(&kvm->slots_lock);
2802
2803 r = -EINVAL;
2804 if (log->slot >= KVM_MEMORY_SLOTS)
2805 goto out;
2806
2807 memslot = &kvm->memslots->memslots[log->slot];
2808 r = -ENOENT;
2809 if (!memslot->dirty_bitmap)
2810 goto out;
2811
2812 n = kvm_dirty_bitmap_bytes(memslot);
2813
2814 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
2815 is_dirty = memslot->dirty_bitmap[i];
2816
2817 /* If nothing is dirty, don't bother messing with page tables. */
2818 if (is_dirty) {
2819 struct kvm_memslots *slots, *old_slots;
2820 unsigned long *dirty_bitmap;
2821
2822 spin_lock(&kvm->mmu_lock);
2823 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2824 spin_unlock(&kvm->mmu_lock);
2825
2826 r = -ENOMEM;
2827 dirty_bitmap = vmalloc(n);
2828 if (!dirty_bitmap)
2829 goto out;
2830 memset(dirty_bitmap, 0, n);
2831
2832 r = -ENOMEM;
2833 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
2834 if (!slots) {
2835 vfree(dirty_bitmap);
2836 goto out;
2837 }
2838 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
2839 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
2840
2841 old_slots = kvm->memslots;
2842 rcu_assign_pointer(kvm->memslots, slots);
2843 synchronize_srcu_expedited(&kvm->srcu);
2844 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
2845 kfree(old_slots);
2846
2847 r = -EFAULT;
2848 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
2849 vfree(dirty_bitmap);
2850 goto out;
2851 }
2852 vfree(dirty_bitmap);
2853 } else {
2854 r = -EFAULT;
2855 if (clear_user(log->dirty_bitmap, n))
2856 goto out;
2857 }
2858
2859 r = 0;
2860 out:
2861 mutex_unlock(&kvm->slots_lock);
2862 return r;
2863 }
2864
2865 long kvm_arch_vm_ioctl(struct file *filp,
2866 unsigned int ioctl, unsigned long arg)
2867 {
2868 struct kvm *kvm = filp->private_data;
2869 void __user *argp = (void __user *)arg;
2870 int r = -ENOTTY;
2871 /*
2872 * This union makes it completely explicit to gcc-3.x
2873 * that these two variables' stack usage should be
2874 * combined, not added together.
2875 */
2876 union {
2877 struct kvm_pit_state ps;
2878 struct kvm_pit_state2 ps2;
2879 struct kvm_memory_alias alias;
2880 struct kvm_pit_config pit_config;
2881 } u;
2882
2883 switch (ioctl) {
2884 case KVM_SET_TSS_ADDR:
2885 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2886 if (r < 0)
2887 goto out;
2888 break;
2889 case KVM_SET_IDENTITY_MAP_ADDR: {
2890 u64 ident_addr;
2891
2892 r = -EFAULT;
2893 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2894 goto out;
2895 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2896 if (r < 0)
2897 goto out;
2898 break;
2899 }
2900 case KVM_SET_MEMORY_REGION: {
2901 struct kvm_memory_region kvm_mem;
2902 struct kvm_userspace_memory_region kvm_userspace_mem;
2903
2904 r = -EFAULT;
2905 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2906 goto out;
2907 kvm_userspace_mem.slot = kvm_mem.slot;
2908 kvm_userspace_mem.flags = kvm_mem.flags;
2909 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2910 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2911 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2912 if (r)
2913 goto out;
2914 break;
2915 }
2916 case KVM_SET_NR_MMU_PAGES:
2917 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2918 if (r)
2919 goto out;
2920 break;
2921 case KVM_GET_NR_MMU_PAGES:
2922 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2923 break;
2924 case KVM_SET_MEMORY_ALIAS:
2925 r = -EFAULT;
2926 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2927 goto out;
2928 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2929 if (r)
2930 goto out;
2931 break;
2932 case KVM_CREATE_IRQCHIP: {
2933 struct kvm_pic *vpic;
2934
2935 mutex_lock(&kvm->lock);
2936 r = -EEXIST;
2937 if (kvm->arch.vpic)
2938 goto create_irqchip_unlock;
2939 r = -ENOMEM;
2940 vpic = kvm_create_pic(kvm);
2941 if (vpic) {
2942 r = kvm_ioapic_init(kvm);
2943 if (r) {
2944 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
2945 &vpic->dev);
2946 kfree(vpic);
2947 goto create_irqchip_unlock;
2948 }
2949 } else
2950 goto create_irqchip_unlock;
2951 smp_wmb();
2952 kvm->arch.vpic = vpic;
2953 smp_wmb();
2954 r = kvm_setup_default_irq_routing(kvm);
2955 if (r) {
2956 mutex_lock(&kvm->irq_lock);
2957 kvm_ioapic_destroy(kvm);
2958 kvm_destroy_pic(kvm);
2959 mutex_unlock(&kvm->irq_lock);
2960 }
2961 create_irqchip_unlock:
2962 mutex_unlock(&kvm->lock);
2963 break;
2964 }
2965 case KVM_CREATE_PIT:
2966 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2967 goto create_pit;
2968 case KVM_CREATE_PIT2:
2969 r = -EFAULT;
2970 if (copy_from_user(&u.pit_config, argp,
2971 sizeof(struct kvm_pit_config)))
2972 goto out;
2973 create_pit:
2974 mutex_lock(&kvm->slots_lock);
2975 r = -EEXIST;
2976 if (kvm->arch.vpit)
2977 goto create_pit_unlock;
2978 r = -ENOMEM;
2979 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2980 if (kvm->arch.vpit)
2981 r = 0;
2982 create_pit_unlock:
2983 mutex_unlock(&kvm->slots_lock);
2984 break;
2985 case KVM_IRQ_LINE_STATUS:
2986 case KVM_IRQ_LINE: {
2987 struct kvm_irq_level irq_event;
2988
2989 r = -EFAULT;
2990 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2991 goto out;
2992 r = -ENXIO;
2993 if (irqchip_in_kernel(kvm)) {
2994 __s32 status;
2995 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2996 irq_event.irq, irq_event.level);
2997 if (ioctl == KVM_IRQ_LINE_STATUS) {
2998 r = -EFAULT;
2999 irq_event.status = status;
3000 if (copy_to_user(argp, &irq_event,
3001 sizeof irq_event))
3002 goto out;
3003 }
3004 r = 0;
3005 }
3006 break;
3007 }
3008 case KVM_GET_IRQCHIP: {
3009 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3010 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3011
3012 r = -ENOMEM;
3013 if (!chip)
3014 goto out;
3015 r = -EFAULT;
3016 if (copy_from_user(chip, argp, sizeof *chip))
3017 goto get_irqchip_out;
3018 r = -ENXIO;
3019 if (!irqchip_in_kernel(kvm))
3020 goto get_irqchip_out;
3021 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3022 if (r)
3023 goto get_irqchip_out;
3024 r = -EFAULT;
3025 if (copy_to_user(argp, chip, sizeof *chip))
3026 goto get_irqchip_out;
3027 r = 0;
3028 get_irqchip_out:
3029 kfree(chip);
3030 if (r)
3031 goto out;
3032 break;
3033 }
3034 case KVM_SET_IRQCHIP: {
3035 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3036 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3037
3038 r = -ENOMEM;
3039 if (!chip)
3040 goto out;
3041 r = -EFAULT;
3042 if (copy_from_user(chip, argp, sizeof *chip))
3043 goto set_irqchip_out;
3044 r = -ENXIO;
3045 if (!irqchip_in_kernel(kvm))
3046 goto set_irqchip_out;
3047 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3048 if (r)
3049 goto set_irqchip_out;
3050 r = 0;
3051 set_irqchip_out:
3052 kfree(chip);
3053 if (r)
3054 goto out;
3055 break;
3056 }
3057 case KVM_GET_PIT: {
3058 r = -EFAULT;
3059 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3060 goto out;
3061 r = -ENXIO;
3062 if (!kvm->arch.vpit)
3063 goto out;
3064 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3065 if (r)
3066 goto out;
3067 r = -EFAULT;
3068 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3069 goto out;
3070 r = 0;
3071 break;
3072 }
3073 case KVM_SET_PIT: {
3074 r = -EFAULT;
3075 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3076 goto out;
3077 r = -ENXIO;
3078 if (!kvm->arch.vpit)
3079 goto out;
3080 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3081 if (r)
3082 goto out;
3083 r = 0;
3084 break;
3085 }
3086 case KVM_GET_PIT2: {
3087 r = -ENXIO;
3088 if (!kvm->arch.vpit)
3089 goto out;
3090 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3091 if (r)
3092 goto out;
3093 r = -EFAULT;
3094 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3095 goto out;
3096 r = 0;
3097 break;
3098 }
3099 case KVM_SET_PIT2: {
3100 r = -EFAULT;
3101 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3102 goto out;
3103 r = -ENXIO;
3104 if (!kvm->arch.vpit)
3105 goto out;
3106 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3107 if (r)
3108 goto out;
3109 r = 0;
3110 break;
3111 }
3112 case KVM_REINJECT_CONTROL: {
3113 struct kvm_reinject_control control;
3114 r = -EFAULT;
3115 if (copy_from_user(&control, argp, sizeof(control)))
3116 goto out;
3117 r = kvm_vm_ioctl_reinject(kvm, &control);
3118 if (r)
3119 goto out;
3120 r = 0;
3121 break;
3122 }
3123 case KVM_XEN_HVM_CONFIG: {
3124 r = -EFAULT;
3125 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3126 sizeof(struct kvm_xen_hvm_config)))
3127 goto out;
3128 r = -EINVAL;
3129 if (kvm->arch.xen_hvm_config.flags)
3130 goto out;
3131 r = 0;
3132 break;
3133 }
3134 case KVM_SET_CLOCK: {
3135 struct timespec now;
3136 struct kvm_clock_data user_ns;
3137 u64 now_ns;
3138 s64 delta;
3139
3140 r = -EFAULT;
3141 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3142 goto out;
3143
3144 r = -EINVAL;
3145 if (user_ns.flags)
3146 goto out;
3147
3148 r = 0;
3149 ktime_get_ts(&now);
3150 now_ns = timespec_to_ns(&now);
3151 delta = user_ns.clock - now_ns;
3152 kvm->arch.kvmclock_offset = delta;
3153 break;
3154 }
3155 case KVM_GET_CLOCK: {
3156 struct timespec now;
3157 struct kvm_clock_data user_ns;
3158 u64 now_ns;
3159
3160 ktime_get_ts(&now);
3161 now_ns = timespec_to_ns(&now);
3162 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3163 user_ns.flags = 0;
3164
3165 r = -EFAULT;
3166 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3167 goto out;
3168 r = 0;
3169 break;
3170 }
3171
3172 default:
3173 ;
3174 }
3175 out:
3176 return r;
3177 }
3178
3179 static void kvm_init_msr_list(void)
3180 {
3181 u32 dummy[2];
3182 unsigned i, j;
3183
3184 /* skip the first msrs in the list. KVM-specific */
3185 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3186 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3187 continue;
3188 if (j < i)
3189 msrs_to_save[j] = msrs_to_save[i];
3190 j++;
3191 }
3192 num_msrs_to_save = j;
3193 }
3194
3195 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3196 const void *v)
3197 {
3198 if (vcpu->arch.apic &&
3199 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3200 return 0;
3201
3202 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3203 }
3204
3205 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3206 {
3207 if (vcpu->arch.apic &&
3208 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3209 return 0;
3210
3211 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3212 }
3213
3214 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3215 struct kvm_segment *var, int seg)
3216 {
3217 kvm_x86_ops->set_segment(vcpu, var, seg);
3218 }
3219
3220 void kvm_get_segment(struct kvm_vcpu *vcpu,
3221 struct kvm_segment *var, int seg)
3222 {
3223 kvm_x86_ops->get_segment(vcpu, var, seg);
3224 }
3225
3226 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3227 {
3228 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3229 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3230 }
3231
3232 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3233 {
3234 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3235 access |= PFERR_FETCH_MASK;
3236 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3237 }
3238
3239 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3240 {
3241 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3242 access |= PFERR_WRITE_MASK;
3243 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3244 }
3245
3246 /* uses this to access any guest's mapped memory without checking CPL */
3247 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3248 {
3249 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error);
3250 }
3251
3252 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3253 struct kvm_vcpu *vcpu, u32 access,
3254 u32 *error)
3255 {
3256 void *data = val;
3257 int r = X86EMUL_CONTINUE;
3258
3259 while (bytes) {
3260 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error);
3261 unsigned offset = addr & (PAGE_SIZE-1);
3262 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3263 int ret;
3264
3265 if (gpa == UNMAPPED_GVA) {
3266 r = X86EMUL_PROPAGATE_FAULT;
3267 goto out;
3268 }
3269 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3270 if (ret < 0) {
3271 r = X86EMUL_UNHANDLEABLE;
3272 goto out;
3273 }
3274
3275 bytes -= toread;
3276 data += toread;
3277 addr += toread;
3278 }
3279 out:
3280 return r;
3281 }
3282
3283 /* used for instruction fetching */
3284 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3285 struct kvm_vcpu *vcpu, u32 *error)
3286 {
3287 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3288 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3289 access | PFERR_FETCH_MASK, error);
3290 }
3291
3292 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3293 struct kvm_vcpu *vcpu, u32 *error)
3294 {
3295 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3296 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3297 error);
3298 }
3299
3300 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3301 struct kvm_vcpu *vcpu, u32 *error)
3302 {
3303 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3304 }
3305
3306 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3307 unsigned int bytes,
3308 struct kvm_vcpu *vcpu,
3309 u32 *error)
3310 {
3311 void *data = val;
3312 int r = X86EMUL_CONTINUE;
3313
3314 while (bytes) {
3315 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr,
3316 PFERR_WRITE_MASK, error);
3317 unsigned offset = addr & (PAGE_SIZE-1);
3318 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3319 int ret;
3320
3321 if (gpa == UNMAPPED_GVA) {
3322 r = X86EMUL_PROPAGATE_FAULT;
3323 goto out;
3324 }
3325 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3326 if (ret < 0) {
3327 r = X86EMUL_UNHANDLEABLE;
3328 goto out;
3329 }
3330
3331 bytes -= towrite;
3332 data += towrite;
3333 addr += towrite;
3334 }
3335 out:
3336 return r;
3337 }
3338
3339 static int emulator_read_emulated(unsigned long addr,
3340 void *val,
3341 unsigned int bytes,
3342 struct kvm_vcpu *vcpu)
3343 {
3344 gpa_t gpa;
3345 u32 error_code;
3346
3347 if (vcpu->mmio_read_completed) {
3348 memcpy(val, vcpu->mmio_data, bytes);
3349 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3350 vcpu->mmio_phys_addr, *(u64 *)val);
3351 vcpu->mmio_read_completed = 0;
3352 return X86EMUL_CONTINUE;
3353 }
3354
3355 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, &error_code);
3356
3357 if (gpa == UNMAPPED_GVA) {
3358 kvm_inject_page_fault(vcpu, addr, error_code);
3359 return X86EMUL_PROPAGATE_FAULT;
3360 }
3361
3362 /* For APIC access vmexit */
3363 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3364 goto mmio;
3365
3366 if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3367 == X86EMUL_CONTINUE)
3368 return X86EMUL_CONTINUE;
3369
3370 mmio:
3371 /*
3372 * Is this MMIO handled locally?
3373 */
3374 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3375 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3376 return X86EMUL_CONTINUE;
3377 }
3378
3379 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3380
3381 vcpu->mmio_needed = 1;
3382 vcpu->mmio_phys_addr = gpa;
3383 vcpu->mmio_size = bytes;
3384 vcpu->mmio_is_write = 0;
3385
3386 return X86EMUL_UNHANDLEABLE;
3387 }
3388
3389 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3390 const void *val, int bytes)
3391 {
3392 int ret;
3393
3394 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3395 if (ret < 0)
3396 return 0;
3397 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3398 return 1;
3399 }
3400
3401 static int emulator_write_emulated_onepage(unsigned long addr,
3402 const void *val,
3403 unsigned int bytes,
3404 struct kvm_vcpu *vcpu)
3405 {
3406 gpa_t gpa;
3407 u32 error_code;
3408
3409 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, &error_code);
3410
3411 if (gpa == UNMAPPED_GVA) {
3412 kvm_inject_page_fault(vcpu, addr, error_code);
3413 return X86EMUL_PROPAGATE_FAULT;
3414 }
3415
3416 /* For APIC access vmexit */
3417 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3418 goto mmio;
3419
3420 if (emulator_write_phys(vcpu, gpa, val, bytes))
3421 return X86EMUL_CONTINUE;
3422
3423 mmio:
3424 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3425 /*
3426 * Is this MMIO handled locally?
3427 */
3428 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3429 return X86EMUL_CONTINUE;
3430
3431 vcpu->mmio_needed = 1;
3432 vcpu->mmio_phys_addr = gpa;
3433 vcpu->mmio_size = bytes;
3434 vcpu->mmio_is_write = 1;
3435 memcpy(vcpu->mmio_data, val, bytes);
3436
3437 return X86EMUL_CONTINUE;
3438 }
3439
3440 int emulator_write_emulated(unsigned long addr,
3441 const void *val,
3442 unsigned int bytes,
3443 struct kvm_vcpu *vcpu)
3444 {
3445 /* Crossing a page boundary? */
3446 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3447 int rc, now;
3448
3449 now = -addr & ~PAGE_MASK;
3450 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
3451 if (rc != X86EMUL_CONTINUE)
3452 return rc;
3453 addr += now;
3454 val += now;
3455 bytes -= now;
3456 }
3457 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
3458 }
3459 EXPORT_SYMBOL_GPL(emulator_write_emulated);
3460
3461 #define CMPXCHG_TYPE(t, ptr, old, new) \
3462 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3463
3464 #ifdef CONFIG_X86_64
3465 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3466 #else
3467 # define CMPXCHG64(ptr, old, new) \
3468 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3469 #endif
3470
3471 static int emulator_cmpxchg_emulated(unsigned long addr,
3472 const void *old,
3473 const void *new,
3474 unsigned int bytes,
3475 struct kvm_vcpu *vcpu)
3476 {
3477 gpa_t gpa;
3478 struct page *page;
3479 char *kaddr;
3480 bool exchanged;
3481
3482 /* guests cmpxchg8b have to be emulated atomically */
3483 if (bytes > 8 || (bytes & (bytes - 1)))
3484 goto emul_write;
3485
3486 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3487
3488 if (gpa == UNMAPPED_GVA ||
3489 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3490 goto emul_write;
3491
3492 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3493 goto emul_write;
3494
3495 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3496
3497 kaddr = kmap_atomic(page, KM_USER0);
3498 kaddr += offset_in_page(gpa);
3499 switch (bytes) {
3500 case 1:
3501 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3502 break;
3503 case 2:
3504 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3505 break;
3506 case 4:
3507 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3508 break;
3509 case 8:
3510 exchanged = CMPXCHG64(kaddr, old, new);
3511 break;
3512 default:
3513 BUG();
3514 }
3515 kunmap_atomic(kaddr, KM_USER0);
3516 kvm_release_page_dirty(page);
3517
3518 if (!exchanged)
3519 return X86EMUL_CMPXCHG_FAILED;
3520
3521 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3522
3523 return X86EMUL_CONTINUE;
3524
3525 emul_write:
3526 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3527
3528 return emulator_write_emulated(addr, new, bytes, vcpu);
3529 }
3530
3531 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3532 {
3533 /* TODO: String I/O for in kernel device */
3534 int r;
3535
3536 if (vcpu->arch.pio.in)
3537 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3538 vcpu->arch.pio.size, pd);
3539 else
3540 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3541 vcpu->arch.pio.port, vcpu->arch.pio.size,
3542 pd);
3543 return r;
3544 }
3545
3546
3547 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3548 unsigned int count, struct kvm_vcpu *vcpu)
3549 {
3550 if (vcpu->arch.pio.count)
3551 goto data_avail;
3552
3553 trace_kvm_pio(1, port, size, 1);
3554
3555 vcpu->arch.pio.port = port;
3556 vcpu->arch.pio.in = 1;
3557 vcpu->arch.pio.count = count;
3558 vcpu->arch.pio.size = size;
3559
3560 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3561 data_avail:
3562 memcpy(val, vcpu->arch.pio_data, size * count);
3563 vcpu->arch.pio.count = 0;
3564 return 1;
3565 }
3566
3567 vcpu->run->exit_reason = KVM_EXIT_IO;
3568 vcpu->run->io.direction = KVM_EXIT_IO_IN;
3569 vcpu->run->io.size = size;
3570 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3571 vcpu->run->io.count = count;
3572 vcpu->run->io.port = port;
3573
3574 return 0;
3575 }
3576
3577 static int emulator_pio_out_emulated(int size, unsigned short port,
3578 const void *val, unsigned int count,
3579 struct kvm_vcpu *vcpu)
3580 {
3581 trace_kvm_pio(0, port, size, 1);
3582
3583 vcpu->arch.pio.port = port;
3584 vcpu->arch.pio.in = 0;
3585 vcpu->arch.pio.count = count;
3586 vcpu->arch.pio.size = size;
3587
3588 memcpy(vcpu->arch.pio_data, val, size * count);
3589
3590 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3591 vcpu->arch.pio.count = 0;
3592 return 1;
3593 }
3594
3595 vcpu->run->exit_reason = KVM_EXIT_IO;
3596 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3597 vcpu->run->io.size = size;
3598 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3599 vcpu->run->io.count = count;
3600 vcpu->run->io.port = port;
3601
3602 return 0;
3603 }
3604
3605 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3606 {
3607 return kvm_x86_ops->get_segment_base(vcpu, seg);
3608 }
3609
3610 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3611 {
3612 kvm_mmu_invlpg(vcpu, address);
3613 return X86EMUL_CONTINUE;
3614 }
3615
3616 int emulate_clts(struct kvm_vcpu *vcpu)
3617 {
3618 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3619 kvm_x86_ops->fpu_activate(vcpu);
3620 return X86EMUL_CONTINUE;
3621 }
3622
3623 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
3624 {
3625 return kvm_get_dr(vcpu, dr, dest);
3626 }
3627
3628 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
3629 {
3630 return kvm_set_dr(vcpu, dr, value);
3631 }
3632
3633 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
3634 {
3635 u8 opcodes[4];
3636 unsigned long rip = kvm_rip_read(vcpu);
3637 unsigned long rip_linear;
3638
3639 if (!printk_ratelimit())
3640 return;
3641
3642 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
3643
3644 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu, NULL);
3645
3646 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
3647 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
3648 }
3649 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
3650
3651 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3652 {
3653 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3654 }
3655
3656 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3657 {
3658 unsigned long value;
3659
3660 switch (cr) {
3661 case 0:
3662 value = kvm_read_cr0(vcpu);
3663 break;
3664 case 2:
3665 value = vcpu->arch.cr2;
3666 break;
3667 case 3:
3668 value = vcpu->arch.cr3;
3669 break;
3670 case 4:
3671 value = kvm_read_cr4(vcpu);
3672 break;
3673 case 8:
3674 value = kvm_get_cr8(vcpu);
3675 break;
3676 default:
3677 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3678 return 0;
3679 }
3680
3681 return value;
3682 }
3683
3684 static void emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
3685 {
3686 switch (cr) {
3687 case 0:
3688 kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3689 break;
3690 case 2:
3691 vcpu->arch.cr2 = val;
3692 break;
3693 case 3:
3694 kvm_set_cr3(vcpu, val);
3695 break;
3696 case 4:
3697 kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3698 break;
3699 case 8:
3700 kvm_set_cr8(vcpu, val & 0xfUL);
3701 break;
3702 default:
3703 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3704 }
3705 }
3706
3707 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
3708 {
3709 return kvm_x86_ops->get_cpl(vcpu);
3710 }
3711
3712 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3713 {
3714 kvm_x86_ops->get_gdt(vcpu, dt);
3715 }
3716
3717 static unsigned long emulator_get_cached_segment_base(int seg,
3718 struct kvm_vcpu *vcpu)
3719 {
3720 return get_segment_base(vcpu, seg);
3721 }
3722
3723 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
3724 struct kvm_vcpu *vcpu)
3725 {
3726 struct kvm_segment var;
3727
3728 kvm_get_segment(vcpu, &var, seg);
3729
3730 if (var.unusable)
3731 return false;
3732
3733 if (var.g)
3734 var.limit >>= 12;
3735 set_desc_limit(desc, var.limit);
3736 set_desc_base(desc, (unsigned long)var.base);
3737 desc->type = var.type;
3738 desc->s = var.s;
3739 desc->dpl = var.dpl;
3740 desc->p = var.present;
3741 desc->avl = var.avl;
3742 desc->l = var.l;
3743 desc->d = var.db;
3744 desc->g = var.g;
3745
3746 return true;
3747 }
3748
3749 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
3750 struct kvm_vcpu *vcpu)
3751 {
3752 struct kvm_segment var;
3753
3754 /* needed to preserve selector */
3755 kvm_get_segment(vcpu, &var, seg);
3756
3757 var.base = get_desc_base(desc);
3758 var.limit = get_desc_limit(desc);
3759 if (desc->g)
3760 var.limit = (var.limit << 12) | 0xfff;
3761 var.type = desc->type;
3762 var.present = desc->p;
3763 var.dpl = desc->dpl;
3764 var.db = desc->d;
3765 var.s = desc->s;
3766 var.l = desc->l;
3767 var.g = desc->g;
3768 var.avl = desc->avl;
3769 var.present = desc->p;
3770 var.unusable = !var.present;
3771 var.padding = 0;
3772
3773 kvm_set_segment(vcpu, &var, seg);
3774 return;
3775 }
3776
3777 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
3778 {
3779 struct kvm_segment kvm_seg;
3780
3781 kvm_get_segment(vcpu, &kvm_seg, seg);
3782 return kvm_seg.selector;
3783 }
3784
3785 static void emulator_set_segment_selector(u16 sel, int seg,
3786 struct kvm_vcpu *vcpu)
3787 {
3788 struct kvm_segment kvm_seg;
3789
3790 kvm_get_segment(vcpu, &kvm_seg, seg);
3791 kvm_seg.selector = sel;
3792 kvm_set_segment(vcpu, &kvm_seg, seg);
3793 }
3794
3795 static void emulator_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
3796 {
3797 kvm_x86_ops->set_rflags(vcpu, rflags);
3798 }
3799
3800 static struct x86_emulate_ops emulate_ops = {
3801 .read_std = kvm_read_guest_virt_system,
3802 .write_std = kvm_write_guest_virt_system,
3803 .fetch = kvm_fetch_guest_virt,
3804 .read_emulated = emulator_read_emulated,
3805 .write_emulated = emulator_write_emulated,
3806 .cmpxchg_emulated = emulator_cmpxchg_emulated,
3807 .pio_in_emulated = emulator_pio_in_emulated,
3808 .pio_out_emulated = emulator_pio_out_emulated,
3809 .get_cached_descriptor = emulator_get_cached_descriptor,
3810 .set_cached_descriptor = emulator_set_cached_descriptor,
3811 .get_segment_selector = emulator_get_segment_selector,
3812 .set_segment_selector = emulator_set_segment_selector,
3813 .get_cached_segment_base = emulator_get_cached_segment_base,
3814 .get_gdt = emulator_get_gdt,
3815 .get_cr = emulator_get_cr,
3816 .set_cr = emulator_set_cr,
3817 .cpl = emulator_get_cpl,
3818 .set_rflags = emulator_set_rflags,
3819 .get_dr = emulator_get_dr,
3820 .set_dr = emulator_set_dr,
3821 .set_msr = kvm_set_msr,
3822 .get_msr = kvm_get_msr,
3823 };
3824
3825 static void cache_all_regs(struct kvm_vcpu *vcpu)
3826 {
3827 kvm_register_read(vcpu, VCPU_REGS_RAX);
3828 kvm_register_read(vcpu, VCPU_REGS_RSP);
3829 kvm_register_read(vcpu, VCPU_REGS_RIP);
3830 vcpu->arch.regs_dirty = ~0;
3831 }
3832
3833 int emulate_instruction(struct kvm_vcpu *vcpu,
3834 unsigned long cr2,
3835 u16 error_code,
3836 int emulation_type)
3837 {
3838 int r, shadow_mask;
3839 struct decode_cache *c;
3840 struct kvm_run *run = vcpu->run;
3841
3842 kvm_clear_exception_queue(vcpu);
3843 vcpu->arch.mmio_fault_cr2 = cr2;
3844 /*
3845 * TODO: fix emulate.c to use guest_read/write_register
3846 * instead of direct ->regs accesses, can save hundred cycles
3847 * on Intel for instructions that don't read/change RSP, for
3848 * for example.
3849 */
3850 cache_all_regs(vcpu);
3851
3852 vcpu->mmio_is_write = 0;
3853
3854 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
3855 int cs_db, cs_l;
3856 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3857
3858 vcpu->arch.emulate_ctxt.vcpu = vcpu;
3859 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
3860 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
3861 vcpu->arch.emulate_ctxt.mode =
3862 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
3863 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
3864 ? X86EMUL_MODE_VM86 : cs_l
3865 ? X86EMUL_MODE_PROT64 : cs_db
3866 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
3867
3868 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3869 trace_kvm_emulate_insn_start(vcpu);
3870
3871 /* Only allow emulation of specific instructions on #UD
3872 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3873 c = &vcpu->arch.emulate_ctxt.decode;
3874 if (emulation_type & EMULTYPE_TRAP_UD) {
3875 if (!c->twobyte)
3876 return EMULATE_FAIL;
3877 switch (c->b) {
3878 case 0x01: /* VMMCALL */
3879 if (c->modrm_mod != 3 || c->modrm_rm != 1)
3880 return EMULATE_FAIL;
3881 break;
3882 case 0x34: /* sysenter */
3883 case 0x35: /* sysexit */
3884 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3885 return EMULATE_FAIL;
3886 break;
3887 case 0x05: /* syscall */
3888 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3889 return EMULATE_FAIL;
3890 break;
3891 default:
3892 return EMULATE_FAIL;
3893 }
3894
3895 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
3896 return EMULATE_FAIL;
3897 }
3898
3899 ++vcpu->stat.insn_emulation;
3900 if (r) {
3901 ++vcpu->stat.insn_emulation_fail;
3902 trace_kvm_emulate_insn_failed(vcpu);
3903 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3904 return EMULATE_DONE;
3905 return EMULATE_FAIL;
3906 }
3907 }
3908
3909 if (emulation_type & EMULTYPE_SKIP) {
3910 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
3911 return EMULATE_DONE;
3912 }
3913
3914 restart:
3915 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3916 shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
3917
3918 if (r == 0)
3919 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
3920
3921 if (vcpu->arch.pio.count) {
3922 if (!vcpu->arch.pio.in)
3923 vcpu->arch.pio.count = 0;
3924 return EMULATE_DO_MMIO;
3925 }
3926
3927 if (r || vcpu->mmio_is_write) {
3928 run->exit_reason = KVM_EXIT_MMIO;
3929 run->mmio.phys_addr = vcpu->mmio_phys_addr;
3930 memcpy(run->mmio.data, vcpu->mmio_data, 8);
3931 run->mmio.len = vcpu->mmio_size;
3932 run->mmio.is_write = vcpu->mmio_is_write;
3933 }
3934
3935 if (r) {
3936 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3937 goto done;
3938 if (!vcpu->mmio_needed) {
3939 ++vcpu->stat.insn_emulation_fail;
3940 trace_kvm_emulate_insn_failed(vcpu);
3941 kvm_report_emulation_failure(vcpu, "mmio");
3942 return EMULATE_FAIL;
3943 }
3944 return EMULATE_DO_MMIO;
3945 }
3946
3947 if (vcpu->mmio_is_write) {
3948 vcpu->mmio_needed = 0;
3949 return EMULATE_DO_MMIO;
3950 }
3951
3952 done:
3953 if (vcpu->arch.exception.pending)
3954 vcpu->arch.emulate_ctxt.restart = false;
3955
3956 if (vcpu->arch.emulate_ctxt.restart)
3957 goto restart;
3958
3959 return EMULATE_DONE;
3960 }
3961 EXPORT_SYMBOL_GPL(emulate_instruction);
3962
3963 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
3964 {
3965 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3966 int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
3967 /* do not return to emulator after return from userspace */
3968 vcpu->arch.pio.count = 0;
3969 return ret;
3970 }
3971 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
3972
3973 static void bounce_off(void *info)
3974 {
3975 /* nothing */
3976 }
3977
3978 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3979 void *data)
3980 {
3981 struct cpufreq_freqs *freq = data;
3982 struct kvm *kvm;
3983 struct kvm_vcpu *vcpu;
3984 int i, send_ipi = 0;
3985
3986 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3987 return 0;
3988 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3989 return 0;
3990 per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
3991
3992 spin_lock(&kvm_lock);
3993 list_for_each_entry(kvm, &vm_list, vm_list) {
3994 kvm_for_each_vcpu(i, vcpu, kvm) {
3995 if (vcpu->cpu != freq->cpu)
3996 continue;
3997 if (!kvm_request_guest_time_update(vcpu))
3998 continue;
3999 if (vcpu->cpu != smp_processor_id())
4000 send_ipi++;
4001 }
4002 }
4003 spin_unlock(&kvm_lock);
4004
4005 if (freq->old < freq->new && send_ipi) {
4006 /*
4007 * We upscale the frequency. Must make the guest
4008 * doesn't see old kvmclock values while running with
4009 * the new frequency, otherwise we risk the guest sees
4010 * time go backwards.
4011 *
4012 * In case we update the frequency for another cpu
4013 * (which might be in guest context) send an interrupt
4014 * to kick the cpu out of guest context. Next time
4015 * guest context is entered kvmclock will be updated,
4016 * so the guest will not see stale values.
4017 */
4018 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
4019 }
4020 return 0;
4021 }
4022
4023 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4024 .notifier_call = kvmclock_cpufreq_notifier
4025 };
4026
4027 static void kvm_timer_init(void)
4028 {
4029 int cpu;
4030
4031 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4032 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4033 CPUFREQ_TRANSITION_NOTIFIER);
4034 for_each_online_cpu(cpu) {
4035 unsigned long khz = cpufreq_get(cpu);
4036 if (!khz)
4037 khz = tsc_khz;
4038 per_cpu(cpu_tsc_khz, cpu) = khz;
4039 }
4040 } else {
4041 for_each_possible_cpu(cpu)
4042 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
4043 }
4044 }
4045
4046 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4047
4048 static int kvm_is_in_guest(void)
4049 {
4050 return percpu_read(current_vcpu) != NULL;
4051 }
4052
4053 static int kvm_is_user_mode(void)
4054 {
4055 int user_mode = 3;
4056
4057 if (percpu_read(current_vcpu))
4058 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4059
4060 return user_mode != 0;
4061 }
4062
4063 static unsigned long kvm_get_guest_ip(void)
4064 {
4065 unsigned long ip = 0;
4066
4067 if (percpu_read(current_vcpu))
4068 ip = kvm_rip_read(percpu_read(current_vcpu));
4069
4070 return ip;
4071 }
4072
4073 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4074 .is_in_guest = kvm_is_in_guest,
4075 .is_user_mode = kvm_is_user_mode,
4076 .get_guest_ip = kvm_get_guest_ip,
4077 };
4078
4079 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4080 {
4081 percpu_write(current_vcpu, vcpu);
4082 }
4083 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4084
4085 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4086 {
4087 percpu_write(current_vcpu, NULL);
4088 }
4089 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4090
4091 int kvm_arch_init(void *opaque)
4092 {
4093 int r;
4094 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4095
4096 if (kvm_x86_ops) {
4097 printk(KERN_ERR "kvm: already loaded the other module\n");
4098 r = -EEXIST;
4099 goto out;
4100 }
4101
4102 if (!ops->cpu_has_kvm_support()) {
4103 printk(KERN_ERR "kvm: no hardware support\n");
4104 r = -EOPNOTSUPP;
4105 goto out;
4106 }
4107 if (ops->disabled_by_bios()) {
4108 printk(KERN_ERR "kvm: disabled by bios\n");
4109 r = -EOPNOTSUPP;
4110 goto out;
4111 }
4112
4113 r = kvm_mmu_module_init();
4114 if (r)
4115 goto out;
4116
4117 kvm_init_msr_list();
4118
4119 kvm_x86_ops = ops;
4120 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4121 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4122 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4123 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4124
4125 kvm_timer_init();
4126
4127 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4128
4129 return 0;
4130
4131 out:
4132 return r;
4133 }
4134
4135 void kvm_arch_exit(void)
4136 {
4137 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4138
4139 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4140 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4141 CPUFREQ_TRANSITION_NOTIFIER);
4142 kvm_x86_ops = NULL;
4143 kvm_mmu_module_exit();
4144 }
4145
4146 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4147 {
4148 ++vcpu->stat.halt_exits;
4149 if (irqchip_in_kernel(vcpu->kvm)) {
4150 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4151 return 1;
4152 } else {
4153 vcpu->run->exit_reason = KVM_EXIT_HLT;
4154 return 0;
4155 }
4156 }
4157 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4158
4159 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4160 unsigned long a1)
4161 {
4162 if (is_long_mode(vcpu))
4163 return a0;
4164 else
4165 return a0 | ((gpa_t)a1 << 32);
4166 }
4167
4168 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4169 {
4170 u64 param, ingpa, outgpa, ret;
4171 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4172 bool fast, longmode;
4173 int cs_db, cs_l;
4174
4175 /*
4176 * hypercall generates UD from non zero cpl and real mode
4177 * per HYPER-V spec
4178 */
4179 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4180 kvm_queue_exception(vcpu, UD_VECTOR);
4181 return 0;
4182 }
4183
4184 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4185 longmode = is_long_mode(vcpu) && cs_l == 1;
4186
4187 if (!longmode) {
4188 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4189 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4190 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4191 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4192 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4193 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4194 }
4195 #ifdef CONFIG_X86_64
4196 else {
4197 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4198 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4199 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4200 }
4201 #endif
4202
4203 code = param & 0xffff;
4204 fast = (param >> 16) & 0x1;
4205 rep_cnt = (param >> 32) & 0xfff;
4206 rep_idx = (param >> 48) & 0xfff;
4207
4208 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4209
4210 switch (code) {
4211 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4212 kvm_vcpu_on_spin(vcpu);
4213 break;
4214 default:
4215 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4216 break;
4217 }
4218
4219 ret = res | (((u64)rep_done & 0xfff) << 32);
4220 if (longmode) {
4221 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4222 } else {
4223 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4224 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4225 }
4226
4227 return 1;
4228 }
4229
4230 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4231 {
4232 unsigned long nr, a0, a1, a2, a3, ret;
4233 int r = 1;
4234
4235 if (kvm_hv_hypercall_enabled(vcpu->kvm))
4236 return kvm_hv_hypercall(vcpu);
4237
4238 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4239 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4240 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4241 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4242 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4243
4244 trace_kvm_hypercall(nr, a0, a1, a2, a3);
4245
4246 if (!is_long_mode(vcpu)) {
4247 nr &= 0xFFFFFFFF;
4248 a0 &= 0xFFFFFFFF;
4249 a1 &= 0xFFFFFFFF;
4250 a2 &= 0xFFFFFFFF;
4251 a3 &= 0xFFFFFFFF;
4252 }
4253
4254 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4255 ret = -KVM_EPERM;
4256 goto out;
4257 }
4258
4259 switch (nr) {
4260 case KVM_HC_VAPIC_POLL_IRQ:
4261 ret = 0;
4262 break;
4263 case KVM_HC_MMU_OP:
4264 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4265 break;
4266 default:
4267 ret = -KVM_ENOSYS;
4268 break;
4269 }
4270 out:
4271 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4272 ++vcpu->stat.hypercalls;
4273 return r;
4274 }
4275 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4276
4277 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4278 {
4279 char instruction[3];
4280 unsigned long rip = kvm_rip_read(vcpu);
4281
4282 /*
4283 * Blow out the MMU to ensure that no other VCPU has an active mapping
4284 * to ensure that the updated hypercall appears atomically across all
4285 * VCPUs.
4286 */
4287 kvm_mmu_zap_all(vcpu->kvm);
4288
4289 kvm_x86_ops->patch_hypercall(vcpu, instruction);
4290
4291 return emulator_write_emulated(rip, instruction, 3, vcpu);
4292 }
4293
4294 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4295 {
4296 struct desc_ptr dt = { limit, base };
4297
4298 kvm_x86_ops->set_gdt(vcpu, &dt);
4299 }
4300
4301 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4302 {
4303 struct desc_ptr dt = { limit, base };
4304
4305 kvm_x86_ops->set_idt(vcpu, &dt);
4306 }
4307
4308 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4309 {
4310 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4311 int j, nent = vcpu->arch.cpuid_nent;
4312
4313 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4314 /* when no next entry is found, the current entry[i] is reselected */
4315 for (j = i + 1; ; j = (j + 1) % nent) {
4316 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4317 if (ej->function == e->function) {
4318 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4319 return j;
4320 }
4321 }
4322 return 0; /* silence gcc, even though control never reaches here */
4323 }
4324
4325 /* find an entry with matching function, matching index (if needed), and that
4326 * should be read next (if it's stateful) */
4327 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4328 u32 function, u32 index)
4329 {
4330 if (e->function != function)
4331 return 0;
4332 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4333 return 0;
4334 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4335 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4336 return 0;
4337 return 1;
4338 }
4339
4340 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4341 u32 function, u32 index)
4342 {
4343 int i;
4344 struct kvm_cpuid_entry2 *best = NULL;
4345
4346 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4347 struct kvm_cpuid_entry2 *e;
4348
4349 e = &vcpu->arch.cpuid_entries[i];
4350 if (is_matching_cpuid_entry(e, function, index)) {
4351 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4352 move_to_next_stateful_cpuid_entry(vcpu, i);
4353 best = e;
4354 break;
4355 }
4356 /*
4357 * Both basic or both extended?
4358 */
4359 if (((e->function ^ function) & 0x80000000) == 0)
4360 if (!best || e->function > best->function)
4361 best = e;
4362 }
4363 return best;
4364 }
4365 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4366
4367 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4368 {
4369 struct kvm_cpuid_entry2 *best;
4370
4371 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4372 if (!best || best->eax < 0x80000008)
4373 goto not_found;
4374 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4375 if (best)
4376 return best->eax & 0xff;
4377 not_found:
4378 return 36;
4379 }
4380
4381 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4382 {
4383 u32 function, index;
4384 struct kvm_cpuid_entry2 *best;
4385
4386 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4387 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4388 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4389 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4390 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4391 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4392 best = kvm_find_cpuid_entry(vcpu, function, index);
4393 if (best) {
4394 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4395 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4396 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4397 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4398 }
4399 kvm_x86_ops->skip_emulated_instruction(vcpu);
4400 trace_kvm_cpuid(function,
4401 kvm_register_read(vcpu, VCPU_REGS_RAX),
4402 kvm_register_read(vcpu, VCPU_REGS_RBX),
4403 kvm_register_read(vcpu, VCPU_REGS_RCX),
4404 kvm_register_read(vcpu, VCPU_REGS_RDX));
4405 }
4406 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4407
4408 /*
4409 * Check if userspace requested an interrupt window, and that the
4410 * interrupt window is open.
4411 *
4412 * No need to exit to userspace if we already have an interrupt queued.
4413 */
4414 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4415 {
4416 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4417 vcpu->run->request_interrupt_window &&
4418 kvm_arch_interrupt_allowed(vcpu));
4419 }
4420
4421 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4422 {
4423 struct kvm_run *kvm_run = vcpu->run;
4424
4425 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4426 kvm_run->cr8 = kvm_get_cr8(vcpu);
4427 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4428 if (irqchip_in_kernel(vcpu->kvm))
4429 kvm_run->ready_for_interrupt_injection = 1;
4430 else
4431 kvm_run->ready_for_interrupt_injection =
4432 kvm_arch_interrupt_allowed(vcpu) &&
4433 !kvm_cpu_has_interrupt(vcpu) &&
4434 !kvm_event_needs_reinjection(vcpu);
4435 }
4436
4437 static void vapic_enter(struct kvm_vcpu *vcpu)
4438 {
4439 struct kvm_lapic *apic = vcpu->arch.apic;
4440 struct page *page;
4441
4442 if (!apic || !apic->vapic_addr)
4443 return;
4444
4445 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4446
4447 vcpu->arch.apic->vapic_page = page;
4448 }
4449
4450 static void vapic_exit(struct kvm_vcpu *vcpu)
4451 {
4452 struct kvm_lapic *apic = vcpu->arch.apic;
4453 int idx;
4454
4455 if (!apic || !apic->vapic_addr)
4456 return;
4457
4458 idx = srcu_read_lock(&vcpu->kvm->srcu);
4459 kvm_release_page_dirty(apic->vapic_page);
4460 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4461 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4462 }
4463
4464 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4465 {
4466 int max_irr, tpr;
4467
4468 if (!kvm_x86_ops->update_cr8_intercept)
4469 return;
4470
4471 if (!vcpu->arch.apic)
4472 return;
4473
4474 if (!vcpu->arch.apic->vapic_addr)
4475 max_irr = kvm_lapic_find_highest_irr(vcpu);
4476 else
4477 max_irr = -1;
4478
4479 if (max_irr != -1)
4480 max_irr >>= 4;
4481
4482 tpr = kvm_lapic_get_cr8(vcpu);
4483
4484 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4485 }
4486
4487 static void inject_pending_event(struct kvm_vcpu *vcpu)
4488 {
4489 /* try to reinject previous events if any */
4490 if (vcpu->arch.exception.pending) {
4491 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4492 vcpu->arch.exception.has_error_code,
4493 vcpu->arch.exception.error_code);
4494 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4495 vcpu->arch.exception.has_error_code,
4496 vcpu->arch.exception.error_code,
4497 vcpu->arch.exception.reinject);
4498 return;
4499 }
4500
4501 if (vcpu->arch.nmi_injected) {
4502 kvm_x86_ops->set_nmi(vcpu);
4503 return;
4504 }
4505
4506 if (vcpu->arch.interrupt.pending) {
4507 kvm_x86_ops->set_irq(vcpu);
4508 return;
4509 }
4510
4511 /* try to inject new event if pending */
4512 if (vcpu->arch.nmi_pending) {
4513 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4514 vcpu->arch.nmi_pending = false;
4515 vcpu->arch.nmi_injected = true;
4516 kvm_x86_ops->set_nmi(vcpu);
4517 }
4518 } else if (kvm_cpu_has_interrupt(vcpu)) {
4519 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4520 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4521 false);
4522 kvm_x86_ops->set_irq(vcpu);
4523 }
4524 }
4525 }
4526
4527 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4528 {
4529 int r;
4530 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4531 vcpu->run->request_interrupt_window;
4532
4533 if (vcpu->requests)
4534 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
4535 kvm_mmu_unload(vcpu);
4536
4537 r = kvm_mmu_reload(vcpu);
4538 if (unlikely(r))
4539 goto out;
4540
4541 if (vcpu->requests) {
4542 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
4543 __kvm_migrate_timers(vcpu);
4544 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
4545 kvm_write_guest_time(vcpu);
4546 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
4547 kvm_mmu_sync_roots(vcpu);
4548 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
4549 kvm_x86_ops->tlb_flush(vcpu);
4550 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
4551 &vcpu->requests)) {
4552 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4553 r = 0;
4554 goto out;
4555 }
4556 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
4557 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4558 r = 0;
4559 goto out;
4560 }
4561 if (test_and_clear_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests)) {
4562 vcpu->fpu_active = 0;
4563 kvm_x86_ops->fpu_deactivate(vcpu);
4564 }
4565 }
4566
4567 preempt_disable();
4568
4569 kvm_x86_ops->prepare_guest_switch(vcpu);
4570 if (vcpu->fpu_active)
4571 kvm_load_guest_fpu(vcpu);
4572
4573 local_irq_disable();
4574
4575 clear_bit(KVM_REQ_KICK, &vcpu->requests);
4576 smp_mb__after_clear_bit();
4577
4578 if (vcpu->requests || need_resched() || signal_pending(current)) {
4579 set_bit(KVM_REQ_KICK, &vcpu->requests);
4580 local_irq_enable();
4581 preempt_enable();
4582 r = 1;
4583 goto out;
4584 }
4585
4586 inject_pending_event(vcpu);
4587
4588 /* enable NMI/IRQ window open exits if needed */
4589 if (vcpu->arch.nmi_pending)
4590 kvm_x86_ops->enable_nmi_window(vcpu);
4591 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4592 kvm_x86_ops->enable_irq_window(vcpu);
4593
4594 if (kvm_lapic_enabled(vcpu)) {
4595 update_cr8_intercept(vcpu);
4596 kvm_lapic_sync_to_vapic(vcpu);
4597 }
4598
4599 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4600
4601 kvm_guest_enter();
4602
4603 if (unlikely(vcpu->arch.switch_db_regs)) {
4604 set_debugreg(0, 7);
4605 set_debugreg(vcpu->arch.eff_db[0], 0);
4606 set_debugreg(vcpu->arch.eff_db[1], 1);
4607 set_debugreg(vcpu->arch.eff_db[2], 2);
4608 set_debugreg(vcpu->arch.eff_db[3], 3);
4609 }
4610
4611 trace_kvm_entry(vcpu->vcpu_id);
4612 kvm_x86_ops->run(vcpu);
4613
4614 /*
4615 * If the guest has used debug registers, at least dr7
4616 * will be disabled while returning to the host.
4617 * If we don't have active breakpoints in the host, we don't
4618 * care about the messed up debug address registers. But if
4619 * we have some of them active, restore the old state.
4620 */
4621 if (hw_breakpoint_active())
4622 hw_breakpoint_restore();
4623
4624 set_bit(KVM_REQ_KICK, &vcpu->requests);
4625 local_irq_enable();
4626
4627 ++vcpu->stat.exits;
4628
4629 /*
4630 * We must have an instruction between local_irq_enable() and
4631 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4632 * the interrupt shadow. The stat.exits increment will do nicely.
4633 * But we need to prevent reordering, hence this barrier():
4634 */
4635 barrier();
4636
4637 kvm_guest_exit();
4638
4639 preempt_enable();
4640
4641 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4642
4643 /*
4644 * Profile KVM exit RIPs:
4645 */
4646 if (unlikely(prof_on == KVM_PROFILING)) {
4647 unsigned long rip = kvm_rip_read(vcpu);
4648 profile_hit(KVM_PROFILING, (void *)rip);
4649 }
4650
4651
4652 kvm_lapic_sync_from_vapic(vcpu);
4653
4654 r = kvm_x86_ops->handle_exit(vcpu);
4655 out:
4656 return r;
4657 }
4658
4659
4660 static int __vcpu_run(struct kvm_vcpu *vcpu)
4661 {
4662 int r;
4663 struct kvm *kvm = vcpu->kvm;
4664
4665 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
4666 pr_debug("vcpu %d received sipi with vector # %x\n",
4667 vcpu->vcpu_id, vcpu->arch.sipi_vector);
4668 kvm_lapic_reset(vcpu);
4669 r = kvm_arch_vcpu_reset(vcpu);
4670 if (r)
4671 return r;
4672 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4673 }
4674
4675 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4676 vapic_enter(vcpu);
4677
4678 r = 1;
4679 while (r > 0) {
4680 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
4681 r = vcpu_enter_guest(vcpu);
4682 else {
4683 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4684 kvm_vcpu_block(vcpu);
4685 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4686 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
4687 {
4688 switch(vcpu->arch.mp_state) {
4689 case KVM_MP_STATE_HALTED:
4690 vcpu->arch.mp_state =
4691 KVM_MP_STATE_RUNNABLE;
4692 case KVM_MP_STATE_RUNNABLE:
4693 break;
4694 case KVM_MP_STATE_SIPI_RECEIVED:
4695 default:
4696 r = -EINTR;
4697 break;
4698 }
4699 }
4700 }
4701
4702 if (r <= 0)
4703 break;
4704
4705 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
4706 if (kvm_cpu_has_pending_timer(vcpu))
4707 kvm_inject_pending_timer_irqs(vcpu);
4708
4709 if (dm_request_for_irq_injection(vcpu)) {
4710 r = -EINTR;
4711 vcpu->run->exit_reason = KVM_EXIT_INTR;
4712 ++vcpu->stat.request_irq_exits;
4713 }
4714 if (signal_pending(current)) {
4715 r = -EINTR;
4716 vcpu->run->exit_reason = KVM_EXIT_INTR;
4717 ++vcpu->stat.signal_exits;
4718 }
4719 if (need_resched()) {
4720 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4721 kvm_resched(vcpu);
4722 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4723 }
4724 }
4725
4726 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4727
4728 vapic_exit(vcpu);
4729
4730 return r;
4731 }
4732
4733 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
4734 {
4735 int r;
4736 sigset_t sigsaved;
4737
4738 vcpu_load(vcpu);
4739
4740 if (vcpu->sigset_active)
4741 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
4742
4743 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
4744 kvm_vcpu_block(vcpu);
4745 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
4746 r = -EAGAIN;
4747 goto out;
4748 }
4749
4750 /* re-sync apic's tpr */
4751 if (!irqchip_in_kernel(vcpu->kvm))
4752 kvm_set_cr8(vcpu, kvm_run->cr8);
4753
4754 if (vcpu->arch.pio.count || vcpu->mmio_needed ||
4755 vcpu->arch.emulate_ctxt.restart) {
4756 if (vcpu->mmio_needed) {
4757 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
4758 vcpu->mmio_read_completed = 1;
4759 vcpu->mmio_needed = 0;
4760 }
4761 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4762 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
4763 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4764 if (r == EMULATE_DO_MMIO) {
4765 r = 0;
4766 goto out;
4767 }
4768 }
4769 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
4770 kvm_register_write(vcpu, VCPU_REGS_RAX,
4771 kvm_run->hypercall.ret);
4772
4773 r = __vcpu_run(vcpu);
4774
4775 out:
4776 post_kvm_run_save(vcpu);
4777 if (vcpu->sigset_active)
4778 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
4779
4780 vcpu_put(vcpu);
4781 return r;
4782 }
4783
4784 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4785 {
4786 vcpu_load(vcpu);
4787
4788 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4789 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4790 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4791 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4792 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4793 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4794 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4795 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4796 #ifdef CONFIG_X86_64
4797 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
4798 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
4799 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
4800 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
4801 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
4802 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
4803 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
4804 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
4805 #endif
4806
4807 regs->rip = kvm_rip_read(vcpu);
4808 regs->rflags = kvm_get_rflags(vcpu);
4809
4810 vcpu_put(vcpu);
4811
4812 return 0;
4813 }
4814
4815 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4816 {
4817 vcpu_load(vcpu);
4818
4819 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
4820 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
4821 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
4822 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
4823 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
4824 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
4825 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
4826 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
4827 #ifdef CONFIG_X86_64
4828 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
4829 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
4830 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
4831 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
4832 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
4833 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
4834 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
4835 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
4836 #endif
4837
4838 kvm_rip_write(vcpu, regs->rip);
4839 kvm_set_rflags(vcpu, regs->rflags);
4840
4841 vcpu->arch.exception.pending = false;
4842
4843 vcpu_put(vcpu);
4844
4845 return 0;
4846 }
4847
4848 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
4849 {
4850 struct kvm_segment cs;
4851
4852 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
4853 *db = cs.db;
4854 *l = cs.l;
4855 }
4856 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
4857
4858 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
4859 struct kvm_sregs *sregs)
4860 {
4861 struct desc_ptr dt;
4862
4863 vcpu_load(vcpu);
4864
4865 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4866 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4867 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4868 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4869 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4870 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4871
4872 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4873 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4874
4875 kvm_x86_ops->get_idt(vcpu, &dt);
4876 sregs->idt.limit = dt.size;
4877 sregs->idt.base = dt.address;
4878 kvm_x86_ops->get_gdt(vcpu, &dt);
4879 sregs->gdt.limit = dt.size;
4880 sregs->gdt.base = dt.address;
4881
4882 sregs->cr0 = kvm_read_cr0(vcpu);
4883 sregs->cr2 = vcpu->arch.cr2;
4884 sregs->cr3 = vcpu->arch.cr3;
4885 sregs->cr4 = kvm_read_cr4(vcpu);
4886 sregs->cr8 = kvm_get_cr8(vcpu);
4887 sregs->efer = vcpu->arch.efer;
4888 sregs->apic_base = kvm_get_apic_base(vcpu);
4889
4890 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
4891
4892 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
4893 set_bit(vcpu->arch.interrupt.nr,
4894 (unsigned long *)sregs->interrupt_bitmap);
4895
4896 vcpu_put(vcpu);
4897
4898 return 0;
4899 }
4900
4901 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
4902 struct kvm_mp_state *mp_state)
4903 {
4904 vcpu_load(vcpu);
4905 mp_state->mp_state = vcpu->arch.mp_state;
4906 vcpu_put(vcpu);
4907 return 0;
4908 }
4909
4910 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
4911 struct kvm_mp_state *mp_state)
4912 {
4913 vcpu_load(vcpu);
4914 vcpu->arch.mp_state = mp_state->mp_state;
4915 vcpu_put(vcpu);
4916 return 0;
4917 }
4918
4919 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
4920 bool has_error_code, u32 error_code)
4921 {
4922 int cs_db, cs_l, ret;
4923 cache_all_regs(vcpu);
4924
4925 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4926
4927 vcpu->arch.emulate_ctxt.vcpu = vcpu;
4928 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4929 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4930 vcpu->arch.emulate_ctxt.mode =
4931 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4932 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4933 ? X86EMUL_MODE_VM86 : cs_l
4934 ? X86EMUL_MODE_PROT64 : cs_db
4935 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4936
4937 ret = emulator_task_switch(&vcpu->arch.emulate_ctxt, &emulate_ops,
4938 tss_selector, reason, has_error_code,
4939 error_code);
4940
4941 if (ret)
4942 return EMULATE_FAIL;
4943
4944 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4945 return EMULATE_DONE;
4946 }
4947 EXPORT_SYMBOL_GPL(kvm_task_switch);
4948
4949 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4950 struct kvm_sregs *sregs)
4951 {
4952 int mmu_reset_needed = 0;
4953 int pending_vec, max_bits;
4954 struct desc_ptr dt;
4955
4956 vcpu_load(vcpu);
4957
4958 dt.size = sregs->idt.limit;
4959 dt.address = sregs->idt.base;
4960 kvm_x86_ops->set_idt(vcpu, &dt);
4961 dt.size = sregs->gdt.limit;
4962 dt.address = sregs->gdt.base;
4963 kvm_x86_ops->set_gdt(vcpu, &dt);
4964
4965 vcpu->arch.cr2 = sregs->cr2;
4966 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4967 vcpu->arch.cr3 = sregs->cr3;
4968
4969 kvm_set_cr8(vcpu, sregs->cr8);
4970
4971 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
4972 kvm_x86_ops->set_efer(vcpu, sregs->efer);
4973 kvm_set_apic_base(vcpu, sregs->apic_base);
4974
4975 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
4976 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4977 vcpu->arch.cr0 = sregs->cr0;
4978
4979 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
4980 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4981 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
4982 load_pdptrs(vcpu, vcpu->arch.cr3);
4983 mmu_reset_needed = 1;
4984 }
4985
4986 if (mmu_reset_needed)
4987 kvm_mmu_reset_context(vcpu);
4988
4989 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4990 pending_vec = find_first_bit(
4991 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4992 if (pending_vec < max_bits) {
4993 kvm_queue_interrupt(vcpu, pending_vec, false);
4994 pr_debug("Set back pending irq %d\n", pending_vec);
4995 if (irqchip_in_kernel(vcpu->kvm))
4996 kvm_pic_clear_isr_ack(vcpu->kvm);
4997 }
4998
4999 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5000 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5001 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5002 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5003 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5004 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5005
5006 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5007 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5008
5009 update_cr8_intercept(vcpu);
5010
5011 /* Older userspace won't unhalt the vcpu on reset. */
5012 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5013 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5014 !is_protmode(vcpu))
5015 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5016
5017 vcpu_put(vcpu);
5018
5019 return 0;
5020 }
5021
5022 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5023 struct kvm_guest_debug *dbg)
5024 {
5025 unsigned long rflags;
5026 int i, r;
5027
5028 vcpu_load(vcpu);
5029
5030 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5031 r = -EBUSY;
5032 if (vcpu->arch.exception.pending)
5033 goto unlock_out;
5034 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5035 kvm_queue_exception(vcpu, DB_VECTOR);
5036 else
5037 kvm_queue_exception(vcpu, BP_VECTOR);
5038 }
5039
5040 /*
5041 * Read rflags as long as potentially injected trace flags are still
5042 * filtered out.
5043 */
5044 rflags = kvm_get_rflags(vcpu);
5045
5046 vcpu->guest_debug = dbg->control;
5047 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5048 vcpu->guest_debug = 0;
5049
5050 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5051 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5052 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5053 vcpu->arch.switch_db_regs =
5054 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5055 } else {
5056 for (i = 0; i < KVM_NR_DB_REGS; i++)
5057 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5058 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5059 }
5060
5061 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5062 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5063 get_segment_base(vcpu, VCPU_SREG_CS);
5064
5065 /*
5066 * Trigger an rflags update that will inject or remove the trace
5067 * flags.
5068 */
5069 kvm_set_rflags(vcpu, rflags);
5070
5071 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5072
5073 r = 0;
5074
5075 unlock_out:
5076 vcpu_put(vcpu);
5077
5078 return r;
5079 }
5080
5081 /*
5082 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
5083 * we have asm/x86/processor.h
5084 */
5085 struct fxsave {
5086 u16 cwd;
5087 u16 swd;
5088 u16 twd;
5089 u16 fop;
5090 u64 rip;
5091 u64 rdp;
5092 u32 mxcsr;
5093 u32 mxcsr_mask;
5094 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
5095 #ifdef CONFIG_X86_64
5096 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
5097 #else
5098 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
5099 #endif
5100 };
5101
5102 /*
5103 * Translate a guest virtual address to a guest physical address.
5104 */
5105 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5106 struct kvm_translation *tr)
5107 {
5108 unsigned long vaddr = tr->linear_address;
5109 gpa_t gpa;
5110 int idx;
5111
5112 vcpu_load(vcpu);
5113 idx = srcu_read_lock(&vcpu->kvm->srcu);
5114 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5115 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5116 tr->physical_address = gpa;
5117 tr->valid = gpa != UNMAPPED_GVA;
5118 tr->writeable = 1;
5119 tr->usermode = 0;
5120 vcpu_put(vcpu);
5121
5122 return 0;
5123 }
5124
5125 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5126 {
5127 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
5128
5129 vcpu_load(vcpu);
5130
5131 memcpy(fpu->fpr, fxsave->st_space, 128);
5132 fpu->fcw = fxsave->cwd;
5133 fpu->fsw = fxsave->swd;
5134 fpu->ftwx = fxsave->twd;
5135 fpu->last_opcode = fxsave->fop;
5136 fpu->last_ip = fxsave->rip;
5137 fpu->last_dp = fxsave->rdp;
5138 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5139
5140 vcpu_put(vcpu);
5141
5142 return 0;
5143 }
5144
5145 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5146 {
5147 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
5148
5149 vcpu_load(vcpu);
5150
5151 memcpy(fxsave->st_space, fpu->fpr, 128);
5152 fxsave->cwd = fpu->fcw;
5153 fxsave->swd = fpu->fsw;
5154 fxsave->twd = fpu->ftwx;
5155 fxsave->fop = fpu->last_opcode;
5156 fxsave->rip = fpu->last_ip;
5157 fxsave->rdp = fpu->last_dp;
5158 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5159
5160 vcpu_put(vcpu);
5161
5162 return 0;
5163 }
5164
5165 void fx_init(struct kvm_vcpu *vcpu)
5166 {
5167 unsigned after_mxcsr_mask;
5168
5169 /*
5170 * Touch the fpu the first time in non atomic context as if
5171 * this is the first fpu instruction the exception handler
5172 * will fire before the instruction returns and it'll have to
5173 * allocate ram with GFP_KERNEL.
5174 */
5175 if (!used_math())
5176 kvm_fx_save(&vcpu->arch.host_fx_image);
5177
5178 /* Initialize guest FPU by resetting ours and saving into guest's */
5179 preempt_disable();
5180 kvm_fx_save(&vcpu->arch.host_fx_image);
5181 kvm_fx_finit();
5182 kvm_fx_save(&vcpu->arch.guest_fx_image);
5183 kvm_fx_restore(&vcpu->arch.host_fx_image);
5184 preempt_enable();
5185
5186 vcpu->arch.cr0 |= X86_CR0_ET;
5187 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
5188 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
5189 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
5190 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
5191 }
5192 EXPORT_SYMBOL_GPL(fx_init);
5193
5194 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5195 {
5196 if (vcpu->guest_fpu_loaded)
5197 return;
5198
5199 vcpu->guest_fpu_loaded = 1;
5200 kvm_fx_save(&vcpu->arch.host_fx_image);
5201 kvm_fx_restore(&vcpu->arch.guest_fx_image);
5202 trace_kvm_fpu(1);
5203 }
5204
5205 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5206 {
5207 if (!vcpu->guest_fpu_loaded)
5208 return;
5209
5210 vcpu->guest_fpu_loaded = 0;
5211 kvm_fx_save(&vcpu->arch.guest_fx_image);
5212 kvm_fx_restore(&vcpu->arch.host_fx_image);
5213 ++vcpu->stat.fpu_reload;
5214 set_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests);
5215 trace_kvm_fpu(0);
5216 }
5217
5218 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5219 {
5220 if (vcpu->arch.time_page) {
5221 kvm_release_page_dirty(vcpu->arch.time_page);
5222 vcpu->arch.time_page = NULL;
5223 }
5224
5225 kvm_x86_ops->vcpu_free(vcpu);
5226 }
5227
5228 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5229 unsigned int id)
5230 {
5231 return kvm_x86_ops->vcpu_create(kvm, id);
5232 }
5233
5234 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5235 {
5236 int r;
5237
5238 /* We do fxsave: this must be aligned. */
5239 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
5240
5241 vcpu->arch.mtrr_state.have_fixed = 1;
5242 vcpu_load(vcpu);
5243 r = kvm_arch_vcpu_reset(vcpu);
5244 if (r == 0)
5245 r = kvm_mmu_setup(vcpu);
5246 vcpu_put(vcpu);
5247 if (r < 0)
5248 goto free_vcpu;
5249
5250 return 0;
5251 free_vcpu:
5252 kvm_x86_ops->vcpu_free(vcpu);
5253 return r;
5254 }
5255
5256 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5257 {
5258 vcpu_load(vcpu);
5259 kvm_mmu_unload(vcpu);
5260 vcpu_put(vcpu);
5261
5262 kvm_x86_ops->vcpu_free(vcpu);
5263 }
5264
5265 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5266 {
5267 vcpu->arch.nmi_pending = false;
5268 vcpu->arch.nmi_injected = false;
5269
5270 vcpu->arch.switch_db_regs = 0;
5271 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5272 vcpu->arch.dr6 = DR6_FIXED_1;
5273 vcpu->arch.dr7 = DR7_FIXED_1;
5274
5275 return kvm_x86_ops->vcpu_reset(vcpu);
5276 }
5277
5278 int kvm_arch_hardware_enable(void *garbage)
5279 {
5280 /*
5281 * Since this may be called from a hotplug notifcation,
5282 * we can't get the CPU frequency directly.
5283 */
5284 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5285 int cpu = raw_smp_processor_id();
5286 per_cpu(cpu_tsc_khz, cpu) = 0;
5287 }
5288
5289 kvm_shared_msr_cpu_online();
5290
5291 return kvm_x86_ops->hardware_enable(garbage);
5292 }
5293
5294 void kvm_arch_hardware_disable(void *garbage)
5295 {
5296 kvm_x86_ops->hardware_disable(garbage);
5297 drop_user_return_notifiers(garbage);
5298 }
5299
5300 int kvm_arch_hardware_setup(void)
5301 {
5302 return kvm_x86_ops->hardware_setup();
5303 }
5304
5305 void kvm_arch_hardware_unsetup(void)
5306 {
5307 kvm_x86_ops->hardware_unsetup();
5308 }
5309
5310 void kvm_arch_check_processor_compat(void *rtn)
5311 {
5312 kvm_x86_ops->check_processor_compatibility(rtn);
5313 }
5314
5315 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5316 {
5317 struct page *page;
5318 struct kvm *kvm;
5319 int r;
5320
5321 BUG_ON(vcpu->kvm == NULL);
5322 kvm = vcpu->kvm;
5323
5324 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5325 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5326 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5327 else
5328 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5329
5330 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5331 if (!page) {
5332 r = -ENOMEM;
5333 goto fail;
5334 }
5335 vcpu->arch.pio_data = page_address(page);
5336
5337 r = kvm_mmu_create(vcpu);
5338 if (r < 0)
5339 goto fail_free_pio_data;
5340
5341 if (irqchip_in_kernel(kvm)) {
5342 r = kvm_create_lapic(vcpu);
5343 if (r < 0)
5344 goto fail_mmu_destroy;
5345 }
5346
5347 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5348 GFP_KERNEL);
5349 if (!vcpu->arch.mce_banks) {
5350 r = -ENOMEM;
5351 goto fail_free_lapic;
5352 }
5353 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5354
5355 return 0;
5356 fail_free_lapic:
5357 kvm_free_lapic(vcpu);
5358 fail_mmu_destroy:
5359 kvm_mmu_destroy(vcpu);
5360 fail_free_pio_data:
5361 free_page((unsigned long)vcpu->arch.pio_data);
5362 fail:
5363 return r;
5364 }
5365
5366 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5367 {
5368 int idx;
5369
5370 kfree(vcpu->arch.mce_banks);
5371 kvm_free_lapic(vcpu);
5372 idx = srcu_read_lock(&vcpu->kvm->srcu);
5373 kvm_mmu_destroy(vcpu);
5374 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5375 free_page((unsigned long)vcpu->arch.pio_data);
5376 }
5377
5378 struct kvm *kvm_arch_create_vm(void)
5379 {
5380 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5381
5382 if (!kvm)
5383 return ERR_PTR(-ENOMEM);
5384
5385 kvm->arch.aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
5386 if (!kvm->arch.aliases) {
5387 kfree(kvm);
5388 return ERR_PTR(-ENOMEM);
5389 }
5390
5391 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5392 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5393
5394 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5395 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5396
5397 rdtscll(kvm->arch.vm_init_tsc);
5398
5399 return kvm;
5400 }
5401
5402 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5403 {
5404 vcpu_load(vcpu);
5405 kvm_mmu_unload(vcpu);
5406 vcpu_put(vcpu);
5407 }
5408
5409 static void kvm_free_vcpus(struct kvm *kvm)
5410 {
5411 unsigned int i;
5412 struct kvm_vcpu *vcpu;
5413
5414 /*
5415 * Unpin any mmu pages first.
5416 */
5417 kvm_for_each_vcpu(i, vcpu, kvm)
5418 kvm_unload_vcpu_mmu(vcpu);
5419 kvm_for_each_vcpu(i, vcpu, kvm)
5420 kvm_arch_vcpu_free(vcpu);
5421
5422 mutex_lock(&kvm->lock);
5423 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5424 kvm->vcpus[i] = NULL;
5425
5426 atomic_set(&kvm->online_vcpus, 0);
5427 mutex_unlock(&kvm->lock);
5428 }
5429
5430 void kvm_arch_sync_events(struct kvm *kvm)
5431 {
5432 kvm_free_all_assigned_devices(kvm);
5433 }
5434
5435 void kvm_arch_destroy_vm(struct kvm *kvm)
5436 {
5437 kvm_iommu_unmap_guest(kvm);
5438 kvm_free_pit(kvm);
5439 kfree(kvm->arch.vpic);
5440 kfree(kvm->arch.vioapic);
5441 kvm_free_vcpus(kvm);
5442 kvm_free_physmem(kvm);
5443 if (kvm->arch.apic_access_page)
5444 put_page(kvm->arch.apic_access_page);
5445 if (kvm->arch.ept_identity_pagetable)
5446 put_page(kvm->arch.ept_identity_pagetable);
5447 cleanup_srcu_struct(&kvm->srcu);
5448 kfree(kvm->arch.aliases);
5449 kfree(kvm);
5450 }
5451
5452 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5453 struct kvm_memory_slot *memslot,
5454 struct kvm_memory_slot old,
5455 struct kvm_userspace_memory_region *mem,
5456 int user_alloc)
5457 {
5458 int npages = memslot->npages;
5459
5460 /*To keep backward compatibility with older userspace,
5461 *x86 needs to hanlde !user_alloc case.
5462 */
5463 if (!user_alloc) {
5464 if (npages && !old.rmap) {
5465 unsigned long userspace_addr;
5466
5467 down_write(&current->mm->mmap_sem);
5468 userspace_addr = do_mmap(NULL, 0,
5469 npages * PAGE_SIZE,
5470 PROT_READ | PROT_WRITE,
5471 MAP_PRIVATE | MAP_ANONYMOUS,
5472 0);
5473 up_write(&current->mm->mmap_sem);
5474
5475 if (IS_ERR((void *)userspace_addr))
5476 return PTR_ERR((void *)userspace_addr);
5477
5478 memslot->userspace_addr = userspace_addr;
5479 }
5480 }
5481
5482
5483 return 0;
5484 }
5485
5486 void kvm_arch_commit_memory_region(struct kvm *kvm,
5487 struct kvm_userspace_memory_region *mem,
5488 struct kvm_memory_slot old,
5489 int user_alloc)
5490 {
5491
5492 int npages = mem->memory_size >> PAGE_SHIFT;
5493
5494 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5495 int ret;
5496
5497 down_write(&current->mm->mmap_sem);
5498 ret = do_munmap(current->mm, old.userspace_addr,
5499 old.npages * PAGE_SIZE);
5500 up_write(&current->mm->mmap_sem);
5501 if (ret < 0)
5502 printk(KERN_WARNING
5503 "kvm_vm_ioctl_set_memory_region: "
5504 "failed to munmap memory\n");
5505 }
5506
5507 spin_lock(&kvm->mmu_lock);
5508 if (!kvm->arch.n_requested_mmu_pages) {
5509 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5510 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5511 }
5512
5513 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5514 spin_unlock(&kvm->mmu_lock);
5515 }
5516
5517 void kvm_arch_flush_shadow(struct kvm *kvm)
5518 {
5519 kvm_mmu_zap_all(kvm);
5520 kvm_reload_remote_mmus(kvm);
5521 }
5522
5523 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5524 {
5525 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5526 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5527 || vcpu->arch.nmi_pending ||
5528 (kvm_arch_interrupt_allowed(vcpu) &&
5529 kvm_cpu_has_interrupt(vcpu));
5530 }
5531
5532 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5533 {
5534 int me;
5535 int cpu = vcpu->cpu;
5536
5537 if (waitqueue_active(&vcpu->wq)) {
5538 wake_up_interruptible(&vcpu->wq);
5539 ++vcpu->stat.halt_wakeup;
5540 }
5541
5542 me = get_cpu();
5543 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5544 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
5545 smp_send_reschedule(cpu);
5546 put_cpu();
5547 }
5548
5549 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5550 {
5551 return kvm_x86_ops->interrupt_allowed(vcpu);
5552 }
5553
5554 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5555 {
5556 unsigned long current_rip = kvm_rip_read(vcpu) +
5557 get_segment_base(vcpu, VCPU_SREG_CS);
5558
5559 return current_rip == linear_rip;
5560 }
5561 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5562
5563 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5564 {
5565 unsigned long rflags;
5566
5567 rflags = kvm_x86_ops->get_rflags(vcpu);
5568 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5569 rflags &= ~X86_EFLAGS_TF;
5570 return rflags;
5571 }
5572 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5573
5574 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5575 {
5576 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5577 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
5578 rflags |= X86_EFLAGS_TF;
5579 kvm_x86_ops->set_rflags(vcpu, rflags);
5580 }
5581 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5582
5583 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5584 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5585 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5586 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5587 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5588 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5589 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5590 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5591 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5592 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5593 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
5594 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
Linux kernel - Deliverables
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